Devicetree
 help / color / mirror / Atom feed
From: "Heiko Stübner" <heiko@sntech.de>
To: Linus Walleij <linusw@kernel.org>, Simon Glass <sjg@chromium.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Rob Herring <robh@kernel.org>,
	devicetree@vger.kernel.org, Jonas Karlman <jonas@kwiboo.se>,
	linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Conor Dooley <conor+dt@kernel.org>,
	linux-rockchip@lists.infradead.org,
	Simon Glass <sjg@chromium.org>,
	Jeffy Chen <jeffy.chen@rock-chips.com>,
	Ye Zhang <ye.zhang@rock-chips.com>, huang lin <hl@rock-chips.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/4] pinctrl: rockchip: Decode drive strength in the get function
Date: Sun, 09 Aug 2026 11:39:33 +0200	[thread overview]
Message-ID: <8942531.Sb9uPGUboI@diego> (raw)
In-Reply-To: <20260729132736.3807082-2-sjg@chromium.org>

Am Mittwoch, 29. Juli 2026, 15:27:25 Mitteleuropäische Sommerzeit schrieb Simon Glass:
> The decoding of the 2-bit and 8-bit level drive-strength values sits in
> rockchip_set_drive_perpin(), where it is unreachable: the SoCs whose
> banks declare these drive types (RK3506 and RV1103B) take the early
> ctrl->type branch in the set path, and the read-and-decode logic in a
> set function has no purpose. Meanwhile rockchip_get_drive_perpin()
> lacks the decoding, so pin_config_get() and the debugfs output report
> -EINVAL for these SoCs.
> 
> Move the two cases to rockchip_get_drive_perpin(), where they belong.
> 
> Fixes: dbd2317d7b9f ("pinctrl: rockchip: Add rk3506 pinctrl support")
> Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Heiko Stuebner <heiko@sntech.de>

> ---
> 
> Changes in v3:
> - Add new patch moving the drive-strength decoding to the get function
> 
>  drivers/pinctrl/pinctrl-rockchip.c | 38 +++++++++++++++---------------
>  1 file changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
> index 7e0fcd45fd26..08a46a04a815 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c
> @@ -3267,6 +3267,25 @@ static int rockchip_get_drive_perpin(struct rockchip_pin_bank *bank,
>  	case DRV_TYPE_IO_1V8_ONLY:
>  		rmask_bits = RK3288_DRV_BITS_PER_PIN;
>  		break;
> +	case DRV_TYPE_IO_LEVEL_2_BIT:
> +		ret = regmap_read(regmap, reg, &data);
> +		if (ret)
> +			return ret;
> +		data >>= bit;
> +
> +		return data & 0x3;
> +	case DRV_TYPE_IO_LEVEL_8_BIT:
> +		ret = regmap_read(regmap, reg, &data);
> +		if (ret)
> +			return ret;
> +		data >>= bit;
> +		data &= (1 << 8) - 1;
> +
> +		ret = hweight8(data);
> +		if (ret > 0)
> +			return ret - 1;
> +		else
> +			return -EINVAL;
>  	default:
>  		dev_err(dev, "unsupported pinctrl drive type: %d\n", drv_type);
>  		return -EINVAL;
> @@ -3390,25 +3409,6 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
>  	case DRV_TYPE_IO_1V8_ONLY:
>  		rmask_bits = RK3288_DRV_BITS_PER_PIN;
>  		break;
> -	case DRV_TYPE_IO_LEVEL_2_BIT:
> -		ret = regmap_read(regmap, reg, &data);
> -		if (ret)
> -			return ret;
> -		data >>= bit;
> -
> -		return data & 0x3;
> -	case DRV_TYPE_IO_LEVEL_8_BIT:
> -		ret = regmap_read(regmap, reg, &data);
> -		if (ret)
> -			return ret;
> -		data >>= bit;
> -		data &= (1 << 8) - 1;
> -
> -		ret = hweight8(data);
> -		if (ret > 0)
> -			return ret - 1;
> -		else
> -			return -EINVAL;
>  	default:
>  		dev_err(dev, "unsupported pinctrl drive type: %d\n", drv_type);
>  		return -EINVAL;
> 





  parent reply	other threads:[~2026-08-09  9:39 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-29 13:27 [PATCH v3 0/4] pinctrl: Add support for the Rockchip RV1106 Simon Glass
2026-07-29 13:27 ` [PATCH v3 1/4] pinctrl: rockchip: Decode drive strength in the get function Simon Glass
2026-07-29 13:42   ` sashiko-bot
2026-08-09  9:39   ` Heiko Stübner [this message]
2026-07-29 13:27 ` [PATCH v3 2/4] dt-bindings: gpio: rockchip,gpio-bank: Add rockchip,grf property Simon Glass
2026-07-29 13:46   ` sashiko-bot
2026-08-04  6:51   ` Krzysztof Kozlowski
2026-08-09  9:42   ` Heiko Stübner
2026-07-29 13:27 ` [PATCH v3 3/4] dt-bindings: pinctrl: rockchip: Add RV1106 compatible Simon Glass
2026-07-29 13:48   ` sashiko-bot
2026-08-09  9:43   ` Heiko Stübner
2026-07-29 13:27 ` [PATCH v3 4/4] pinctrl: rockchip: Add RV1106 pinctrl support Simon Glass
2026-07-29 13:47   ` sashiko-bot
2026-08-09  9:51   ` Heiko Stübner
2026-08-10 11:38 ` (subset) [PATCH v3 0/4] pinctrl: Add support for the Rockchip RV1106 Bartosz Golaszewski

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8942531.Sb9uPGUboI@diego \
    --to=heiko@sntech.de \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=hl@rock-chips.com \
    --cc=jeffy.chen@rock-chips.com \
    --cc=jonas@kwiboo.se \
    --cc=krzk+dt@kernel.org \
    --cc=linusw@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=robh@kernel.org \
    --cc=sjg@chromium.org \
    --cc=ye.zhang@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox