* [PATCH 0/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatibles
@ 2026-07-03 12:08 Vivek Pernamitta
2026-07-03 12:08 ` [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible Vivek Pernamitta
2026-07-03 12:08 ` [PATCH 2/2] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Maili PCIe PHY compatibles Vivek Pernamitta
0 siblings, 2 replies; 10+ messages in thread
From: Vivek Pernamitta @ 2026-07-03 12:08 UTC (permalink / raw)
To: Lorenzo Pieralisi, Krzysztof Wilczyński,
Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul,
Neil Armstrong
Cc: linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy,
Vivek Pernamitta
Add the qcom,maili-pcie compatible string and make it fall back to
qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP.
Also add the qcom,maili-qmp-gen3x2-pcie-phy and
qcom,maili-qmp-gen4x1-pcie-phy compatible strings for the PCIe QMP PHYs
used on the Maili SoC.
The Maili SoC is a derivative of Hawi and shares the same PCIe
controller and PHY architecture, allowing reuse of the existing Hawi
PCIe DT bindings.
Dependencies:
- PCI: qcom: Add PCIe support for upcoming Hawi SoC
https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/
- phy: qcom: qmp-pcie: Add PCIe PHY support for Hawi
https://lore.kernel.org/all/20260618-hawi-phy-pcie-v3-0-3fa42ca45ea4@oss.qualcomm.com/
Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com>
---
Vivek Pernamitta (2):
dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Maili PCIe PHY compatibles
Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml | 7 ++++++-
.../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 6 ++++++
2 files changed, 12 insertions(+), 1 deletion(-)
---
base-commit: ac5f929f2f373245abe6fac242c8d3fec4ca38af
change-id: 20260702-vdev_maili_dt_bindings-80e0730f8390
prerequisite-change-id: 20260702-vdev_hawi_changes-275c59f70bfb:v1
Best regards,
--
Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-03 12:08 [PATCH 0/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatibles Vivek Pernamitta @ 2026-07-03 12:08 ` Vivek Pernamitta 2026-07-06 6:46 ` Krzysztof Kozlowski 2026-07-07 5:25 ` Manivannan Sadhasivam 2026-07-03 12:08 ` [PATCH 2/2] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Maili PCIe PHY compatibles Vivek Pernamitta 1 sibling, 2 replies; 10+ messages in thread From: Vivek Pernamitta @ 2026-07-03 12:08 UTC (permalink / raw) To: Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong Cc: linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy, Vivek Pernamitta Add qcom,maili-pcie as a compatible string that falls back to qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. The Maili SoC is a derivative of Hawi and shares the same PCIe controller architecture, allowing reuse of the existing Hawi PCIe DT bindings. Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> --- Dependencies: - PCI: qcom: Add PCIe support for upcoming Hawi SoC https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ --- Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml index 2c999ca6b2052760a192e9c464d86b73e86d3a88..aba89b59915528ef112e74982bfffc79ad6f93e0 100644 --- a/Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,hawi-pcie.yaml @@ -16,7 +16,12 @@ description: properties: compatible: - const: qcom,hawi-pcie + oneOf: + - const: qcom,hawi-pcie + - items: + - enum: + - qcom,maili-pcie + - const: qcom,hawi-pcie reg: items: -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-03 12:08 ` [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible Vivek Pernamitta @ 2026-07-06 6:46 ` Krzysztof Kozlowski 2026-07-06 16:36 ` Manivannan Sadhasivam 2026-07-07 5:25 ` Manivannan Sadhasivam 1 sibling, 1 reply; 10+ messages in thread From: Krzysztof Kozlowski @ 2026-07-06 6:46 UTC (permalink / raw) To: Vivek Pernamitta Cc: Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong, linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy On Fri, Jul 03, 2026 at 05:38:40PM +0530, Vivek Pernamitta wrote: > Add qcom,maili-pcie as a compatible string that falls back to > qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. > > The Maili SoC is a derivative of Hawi and shares the same PCIe > controller architecture, allowing reuse of the existing Hawi PCIe > DT bindings. > > Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> > --- > Dependencies: > - PCI: qcom: Add PCIe support for upcoming Hawi SoC > https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ Squash the patches then. I already requested this half a year ago for previous conflicting postings. Creating such dependencies makes it impossible for tooling to test and more difficult to review. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-06 6:46 ` Krzysztof Kozlowski @ 2026-07-06 16:36 ` Manivannan Sadhasivam 2026-07-06 17:35 ` Krzysztof Kozlowski 0 siblings, 1 reply; 10+ messages in thread From: Manivannan Sadhasivam @ 2026-07-06 16:36 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Vivek Pernamitta, Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong, linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy On Mon, Jul 06, 2026 at 08:46:41AM +0200, Krzysztof Kozlowski wrote: > On Fri, Jul 03, 2026 at 05:38:40PM +0530, Vivek Pernamitta wrote: > > Add qcom,maili-pcie as a compatible string that falls back to > > qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. > > > > The Maili SoC is a derivative of Hawi and shares the same PCIe > > controller architecture, allowing reuse of the existing Hawi PCIe > > DT bindings. > > > > Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> > > --- > > Dependencies: > > - PCI: qcom: Add PCIe support for upcoming Hawi SoC > > https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ > > Squash the patches then. > But these are two independent SoC additions, isn't it? - Mani -- மணிவண்ணன் சதாசிவம் ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-06 16:36 ` Manivannan Sadhasivam @ 2026-07-06 17:35 ` Krzysztof Kozlowski 2026-07-07 4:53 ` Manivannan Sadhasivam 0 siblings, 1 reply; 10+ messages in thread From: Krzysztof Kozlowski @ 2026-07-06 17:35 UTC (permalink / raw) To: Manivannan Sadhasivam Cc: Vivek Pernamitta, Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong, linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy On 06/07/2026 18:36, Manivannan Sadhasivam wrote: > On Mon, Jul 06, 2026 at 08:46:41AM +0200, Krzysztof Kozlowski wrote: >> On Fri, Jul 03, 2026 at 05:38:40PM +0530, Vivek Pernamitta wrote: >>> Add qcom,maili-pcie as a compatible string that falls back to >>> qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. >>> >>> The Maili SoC is a derivative of Hawi and shares the same PCIe >>> controller architecture, allowing reuse of the existing Hawi PCIe >>> DT bindings. >>> >>> Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> >>> --- >>> Dependencies: >>> - PCI: qcom: Add PCIe support for upcoming Hawi SoC >>> https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ >> >> Squash the patches then. >> > > But these are two independent SoC additions, isn't it? It's adding a single compatible, no? If a patch adding a single compatible cannot be done without multi-patchset dependencies making testing by tooling impossible, then probably that work should not be sent separately or even as separate patch. And I am not saying anything new because half a year ago (around Kaanapali and Glymur) I voiced strong opinion about that. But really, you do not need to add two compatibles in two separate patches. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-06 17:35 ` Krzysztof Kozlowski @ 2026-07-07 4:53 ` Manivannan Sadhasivam 2026-07-07 5:55 ` Krzysztof Kozlowski 0 siblings, 1 reply; 10+ messages in thread From: Manivannan Sadhasivam @ 2026-07-07 4:53 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Vivek Pernamitta, Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong, linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy On Mon, Jul 06, 2026 at 07:35:52PM +0200, Krzysztof Kozlowski wrote: > On 06/07/2026 18:36, Manivannan Sadhasivam wrote: > > On Mon, Jul 06, 2026 at 08:46:41AM +0200, Krzysztof Kozlowski wrote: > >> On Fri, Jul 03, 2026 at 05:38:40PM +0530, Vivek Pernamitta wrote: > >>> Add qcom,maili-pcie as a compatible string that falls back to > >>> qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. > >>> > >>> The Maili SoC is a derivative of Hawi and shares the same PCIe > >>> controller architecture, allowing reuse of the existing Hawi PCIe > >>> DT bindings. > >>> > >>> Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> > >>> --- > >>> Dependencies: > >>> - PCI: qcom: Add PCIe support for upcoming Hawi SoC > >>> https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ > >> > >> Squash the patches then. > >> > > > > But these are two independent SoC additions, isn't it? > > It's adding a single compatible, no? If a patch adding a single > compatible cannot be done without multi-patchset dependencies making > testing by tooling impossible, then probably that work should not be > sent separately or even as separate patch. And I am not saying anything > new because half a year ago (around Kaanapali and Glymur) I voiced > strong opinion about that. > > But really, you do not need to add two compatibles in two separate patches. > Ok then. I'll squash this patch with Hawi patch which already got applied. - Mani -- மணிவண்ணன் சதாசிவம் ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-07 4:53 ` Manivannan Sadhasivam @ 2026-07-07 5:55 ` Krzysztof Kozlowski 2026-07-07 7:19 ` Manivannan Sadhasivam 0 siblings, 1 reply; 10+ messages in thread From: Krzysztof Kozlowski @ 2026-07-07 5:55 UTC (permalink / raw) To: Manivannan Sadhasivam Cc: Vivek Pernamitta, Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong, linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy On 07/07/2026 06:53, Manivannan Sadhasivam wrote: > On Mon, Jul 06, 2026 at 07:35:52PM +0200, Krzysztof Kozlowski wrote: >> On 06/07/2026 18:36, Manivannan Sadhasivam wrote: >>> On Mon, Jul 06, 2026 at 08:46:41AM +0200, Krzysztof Kozlowski wrote: >>>> On Fri, Jul 03, 2026 at 05:38:40PM +0530, Vivek Pernamitta wrote: >>>>> Add qcom,maili-pcie as a compatible string that falls back to >>>>> qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. >>>>> >>>>> The Maili SoC is a derivative of Hawi and shares the same PCIe >>>>> controller architecture, allowing reuse of the existing Hawi PCIe >>>>> DT bindings. >>>>> >>>>> Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> >>>>> --- >>>>> Dependencies: >>>>> - PCI: qcom: Add PCIe support for upcoming Hawi SoC >>>>> https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ >>>> >>>> Squash the patches then. >>>> >>> >>> But these are two independent SoC additions, isn't it? >> >> It's adding a single compatible, no? If a patch adding a single >> compatible cannot be done without multi-patchset dependencies making >> testing by tooling impossible, then probably that work should not be >> sent separately or even as separate patch. And I am not saying anything >> new because half a year ago (around Kaanapali and Glymur) I voiced >> strong opinion about that. >> >> But really, you do not need to add two compatibles in two separate patches. >> > > Ok then. I'll squash this patch with Hawi patch which already got applied. Applied? That's not what I had in mind. This mentions external dependency, not something which was applied. Should be squashed there. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-07 5:55 ` Krzysztof Kozlowski @ 2026-07-07 7:19 ` Manivannan Sadhasivam 0 siblings, 0 replies; 10+ messages in thread From: Manivannan Sadhasivam @ 2026-07-07 7:19 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Vivek Pernamitta, Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong, linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy On Tue, Jul 07, 2026 at 07:55:45AM +0200, Krzysztof Kozlowski wrote: > On 07/07/2026 06:53, Manivannan Sadhasivam wrote: > > On Mon, Jul 06, 2026 at 07:35:52PM +0200, Krzysztof Kozlowski wrote: > >> On 06/07/2026 18:36, Manivannan Sadhasivam wrote: > >>> On Mon, Jul 06, 2026 at 08:46:41AM +0200, Krzysztof Kozlowski wrote: > >>>> On Fri, Jul 03, 2026 at 05:38:40PM +0530, Vivek Pernamitta wrote: > >>>>> Add qcom,maili-pcie as a compatible string that falls back to > >>>>> qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. > >>>>> > >>>>> The Maili SoC is a derivative of Hawi and shares the same PCIe > >>>>> controller architecture, allowing reuse of the existing Hawi PCIe > >>>>> DT bindings. > >>>>> > >>>>> Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> > >>>>> --- > >>>>> Dependencies: > >>>>> - PCI: qcom: Add PCIe support for upcoming Hawi SoC > >>>>> https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ > >>>> > >>>> Squash the patches then. > >>>> > >>> > >>> But these are two independent SoC additions, isn't it? > >> > >> It's adding a single compatible, no? If a patch adding a single > >> compatible cannot be done without multi-patchset dependencies making > >> testing by tooling impossible, then probably that work should not be > >> sent separately or even as separate patch. And I am not saying anything > >> new because half a year ago (around Kaanapali and Glymur) I voiced > >> strong opinion about that. > >> > >> But really, you do not need to add two compatibles in two separate patches. > >> > > > > Ok then. I'll squash this patch with Hawi patch which already got applied. > > Applied? That's not what I had in mind. This mentions external > dependency, not something which was applied. Should be squashed there. > I merged the dependency for 7.3 before looking at this series. So now, squashed this patch with that. - Mani -- மணிவண்ணன் சதாசிவம் ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible 2026-07-03 12:08 ` [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible Vivek Pernamitta 2026-07-06 6:46 ` Krzysztof Kozlowski @ 2026-07-07 5:25 ` Manivannan Sadhasivam 1 sibling, 0 replies; 10+ messages in thread From: Manivannan Sadhasivam @ 2026-07-07 5:25 UTC (permalink / raw) To: Vivek Pernamitta Cc: Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong, linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy On Fri, Jul 03, 2026 at 05:38:40PM +0530, Vivek Pernamitta wrote: > Add qcom,maili-pcie as a compatible string that falls back to > qcom,hawi-pcie, as the Maili SoC reuses the Hawi PCIe controller IP. > > The Maili SoC is a derivative of Hawi and shares the same PCIe > controller architecture, allowing reuse of the existing Hawi PCIe > DT bindings. > > Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> > --- > Dependencies: > - PCI: qcom: Add PCIe support for upcoming Hawi SoC > https://lore.kernel.org/all/20260625-hawi-pcie-v4-0-1a578603cd86@oss.qualcomm.com/ Squashed with the Hawi patch, thanks! - Mani -- மணிவண்ணன் சதாசிவம் ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/2] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Maili PCIe PHY compatibles 2026-07-03 12:08 [PATCH 0/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatibles Vivek Pernamitta 2026-07-03 12:08 ` [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible Vivek Pernamitta @ 2026-07-03 12:08 ` Vivek Pernamitta 1 sibling, 0 replies; 10+ messages in thread From: Vivek Pernamitta @ 2026-07-03 12:08 UTC (permalink / raw) To: Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring, Bjorn Helgaas, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Vinod Koul, Neil Armstrong Cc: linux-arm-msm, linux-pci, devicetree, linux-kernel, linux-phy, Vivek Pernamitta Add qcom,maili-qmp-gen3x2-pcie-phy and qcom,maili-qmp-gen4x1-pcie-phy compatible strings for the Maili SoC PCIe QMP PHY. The Maili SoC is a derivative of Hawi and shares the same PCIe QMP PHY architecture, allowing reuse of the existing Hawi PCIe PHY DT bindings. Signed-off-by: Vivek Pernamitta <vivek.pernamitta@oss.qualcomm.com> --- Dependencies: - phy: qcom: qmp-pcie: Add PCIe PHY support for Hawi https://lore.kernel.org/all/20260618-hawi-phy-pcie-v3-0-3fa42ca45ea4@oss.qualcomm.com/ --- .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 259ed9678393f12c03535389b972fed0c7e36517..971474526cf97cf333a80a31e8fb13abcb995e97 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -23,6 +23,8 @@ properties: - qcom,hawi-qmp-gen3x2-pcie-phy - qcom,hawi-qmp-gen4x1-pcie-phy - qcom,kaanapali-qmp-gen3x2-pcie-phy + - qcom,maili-qmp-gen3x2-pcie-phy + - qcom,maili-qmp-gen4x1-pcie-phy - qcom,qcs615-qmp-gen3x1-pcie-phy - qcom,qcs8300-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x2-pcie-phy @@ -200,6 +202,8 @@ allOf: - qcom,glymur-qmp-gen5x4-pcie-phy - qcom,hawi-qmp-gen3x2-pcie-phy - qcom,hawi-qmp-gen4x1-pcie-phy + - qcom,maili-qmp-gen3x2-pcie-phy + - qcom,maili-qmp-gen4x1-pcie-phy - qcom,qcs8300-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x2-pcie-phy - qcom,sa8775p-qmp-gen4x4-pcie-phy @@ -230,6 +234,8 @@ allOf: - qcom,hawi-qmp-gen3x2-pcie-phy - qcom,hawi-qmp-gen4x1-pcie-phy - qcom,kaanapali-qmp-gen3x2-pcie-phy + - qcom,maili-qmp-gen3x2-pcie-phy + - qcom,maili-qmp-gen4x1-pcie-phy - qcom,sm8550-qmp-gen4x2-pcie-phy - qcom,sm8650-qmp-gen4x2-pcie-phy - qcom,x1e80100-qmp-gen3x2-pcie-phy -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-07-07 7:19 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-03 12:08 [PATCH 0/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatibles Vivek Pernamitta 2026-07-03 12:08 ` [PATCH 1/2] dt-bindings: pci: qcom,hawi-pcie: Add Maili PCIe compatible Vivek Pernamitta 2026-07-06 6:46 ` Krzysztof Kozlowski 2026-07-06 16:36 ` Manivannan Sadhasivam 2026-07-06 17:35 ` Krzysztof Kozlowski 2026-07-07 4:53 ` Manivannan Sadhasivam 2026-07-07 5:55 ` Krzysztof Kozlowski 2026-07-07 7:19 ` Manivannan Sadhasivam 2026-07-07 5:25 ` Manivannan Sadhasivam 2026-07-03 12:08 ` [PATCH 2/2] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add Maili PCIe PHY compatibles Vivek Pernamitta
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