From: "Diederik de Haas" <diederik@cknow-tech.com>
To: "Dawid Olesinski" <dawidro@gmail.com>,
"Herbert Xu" <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>
Cc: "Diederik de Haas" <diederik@cknow-tech.com>,
"Eric Biggers" <ebiggers@kernel.org>,
"Sebastian Reichel" <sebastian.reichel@collabora.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Conor Dooley" <conor+dt@kernel.org>,
"Corentin Labbe" <clabbe@baylibre.com>,
<linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-rockchip@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/4] dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding
Date: Mon, 17 Aug 2026 10:14:58 +0200 [thread overview]
Message-ID: <DKR2I3X521F8.J6H7KW07GDD0@cknow-tech.com> (raw)
In-Reply-To: <20260816194112.552100-2-dawidro@gmail.com>
Hi Dawid,
On Sun Aug 16, 2026 at 9:39 PM CEST, Dawid Olesinski wrote:
> Add a YAML device tree binding for the Rockchip second-generation (V2)
> cryptographic hardware accelerator present on the RK3568 and RK3588 SoCs.
>
> The IP block exposes AES-ECB, AES-CBC, AES-XTS block ciphers, SHA-1,
> SHA-224, SHA-256, SHA-384, SHA-512, MD5, and SM3 hash algorithms, each
> with a hardware DMA engine controlled via linked-list descriptors.
>
> The binding covers two compatible strings:
>
> - rockchip,rk3568-crypto: clocks and resets are driven directly by the
> non-secure CRU (accessible to Linux at EL1).
> - rockchip,rk3588-crypto: clocks and resets live in SECURECRU, a
> register bank sandboxed to TrustZone. Linux must request them through
> the ARM SCMI firmware interface (scmi_clk / scmi_reset), as direct
> MMIO access to SECURECRU from EL1 triggers a bus fault.
>
> Co-developed-by: Corentin Labbe <clabbe@baylibre.com>
> Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> Signed-off-by: Dawid Olesinski <dawidro@gmail.com>
> Tested-by: Diederik de Haas <diederik@cknow-tech.com> # Quartz64-B,
> NanoPi R5S, NanoPC-T6 LTS
AFAIK these lines should not have a line break, ie must be on one line.
Cheers,
Diederik
> ---
> .../crypto/rockchip,rk3588-crypto.yaml | 83 +++++++++++++++++++
> MAINTAINERS | 2 +
> 2 files changed, 85 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml
>
> diff --git a/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml
> new file mode 100644
> index 000000000000..32d241c19453
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/rockchip,rk3588-crypto.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip cryptographic offloader
> +
> +maintainers:
> + - Heiko Stuebner <heiko@sntech.de>
> + - Corentin Labbe <clabbe@baylibre.com>
> + - Dawid Olesinski <dawidro@gmail.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: rockchip,rk3568-crypto
> + - items:
> + - enum:
> + - rockchip,rk3588-crypto
> + - const: rockchip,rk3568-crypto
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Core clock for the crypto IP internal logic
> + - description: AXI interconnect clock interface
> + - description: AHB interface clock
> +
> + clock-names:
> + items:
> + - const: core
> + - const: aclk
> + - const: hclk
> +
> + resets:
> + minItems: 1
> + maxItems: 3
> +
> + reset-names:
> + minItems: 1
> + items:
> + - const: core
> + - const: aclk
> + - const: hclk
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/rockchip,rk3588-cru.h>
> + #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> +
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + crypto@fe370000 {
> + compatible = "rockchip,rk3588-crypto", "rockchip,rk3568-crypto";
> + reg = <0x0 0xfe370000 0x0 0x2000>;
> + interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_ACLK_SECURE_NS>,
> + <&scmi_clk SCMI_HCLK_SECURE_NS>;
> + clock-names = "core", "aclk", "hclk";
> + resets = <&scmi_reset SCMI_SRST_CRYPTO_CORE>;
> + reset-names = "core";
> + };
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c8d4b913f26c..50b77a750db3 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -23131,9 +23131,11 @@ F: drivers/media/platform/rockchip/rkcif/
>
> ROCKCHIP CRYPTO DRIVERS
> M: Corentin Labbe <clabbe@baylibre.com>
> +M: Dawid Olesinski <dawidro@gmail.com>
> L: linux-crypto@vger.kernel.org
> S: Maintained
> F: Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml
> +F: Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml
> F: drivers/crypto/rockchip/
>
> ROCKCHIP I2S TDM DRIVER
next prev parent reply other threads:[~2026-08-17 8:15 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 17:58 [PATCH v2 0/4] crypto: rockchip: Add RK356x/RK3588 cryptographic offloader Dawid Olesinski
2026-07-08 17:58 ` [PATCH v2 1/4] dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding Dawid Olesinski
2026-07-08 18:13 ` sashiko-bot
2026-07-08 23:53 ` Sebastian Reichel
2026-07-08 17:58 ` [PATCH v2 2/4] crypto: rockchip: Add RK356x/RK3588 cryptographic offloader driver Dawid Olesinski
2026-07-08 18:13 ` sashiko-bot
2026-07-08 17:58 ` [PATCH v2 3/4] arm64: dts: rockchip: Add crypto node to rk356x-base Dawid Olesinski
2026-07-08 23:56 ` Sebastian Reichel
2026-07-09 7:07 ` Heiko Stübner
2026-07-10 14:30 ` Dawid Olesinski
2026-07-25 14:13 ` Diederik de Haas
2026-07-08 17:58 ` [PATCH v2 4/4] arm64: dts: rockchip: Add crypto node to rk3588-base Dawid Olesinski
2026-08-03 10:42 ` [PATCH v2 0/4] crypto: rockchip: Add RK356x/RK3588 cryptographic offloader Diederik de Haas
2026-08-16 19:39 ` [PATCH v3 " Dawid Olesinski
2026-08-16 19:39 ` [PATCH v3 1/4] dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding Dawid Olesinski
2026-08-16 19:49 ` sashiko-bot
2026-08-17 8:14 ` Diederik de Haas [this message]
2026-08-16 19:39 ` [PATCH v3 2/4] crypto: rockchip: Add RK356x/RK3588 cryptographic offloader driver Dawid Olesinski
2026-08-16 19:56 ` sashiko-bot
2026-08-16 19:39 ` [PATCH v3 3/4] arm64: dts: rockchip: Add crypto node to rk356x-base Dawid Olesinski
2026-08-16 19:48 ` sashiko-bot
2026-08-16 19:39 ` [PATCH v3 4/4] arm64: dts: rockchip: Add crypto node to rk3588-base Dawid Olesinski
2026-08-16 19:51 ` sashiko-bot
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