* [PATCH v4 0/2] Add Lenovo ThinkEdge SE70 carrier board support @ 2026-07-08 9:20 Jiqi Li 2026-07-08 9:20 ` [PATCH v4 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string Jiqi Li 2026-07-08 9:20 ` [PATCH v4 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li 0 siblings, 2 replies; 5+ messages in thread From: Jiqi Li @ 2026-07-08 9:20 UTC (permalink / raw) To: linux-tegra Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, mperttunen, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li This patch set introduces device tree binding and standalone DTS file for Lenovo ThinkEdge SE70, a fanless industrial edge gateway powered by the NVIDIA Jetson Xavier NX module (P3668-0001) on a custom carrier board. Patch 1 updates tegra.yaml bindings to add the three-stage compatible string matching board + SOM + SoC, following the existing Tegra carrier board convention. Patch 2 adds the complete carrier board device tree, including: - 40-pin expansion header pinmux configuration - External Micro SD card slot with dedicated 3.3V regulator - I2C bus for 40-pin header All static device tree checks pass: dtbs compile and dt_binding_check complete without errors. Jiqi Li (2): dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string arm64: tegra: Add Lenovo ThinkEdge SE70 device tree .../devicetree/bindings/arm/tegra.yaml | 5 + arch/arm64/boot/dts/nvidia/Makefile | 1 + .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ 3 files changed, 119 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts -- 2.43.0 ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string 2026-07-08 9:20 [PATCH v4 0/2] Add Lenovo ThinkEdge SE70 carrier board support Jiqi Li @ 2026-07-08 9:20 ` Jiqi Li 2026-07-08 9:20 ` [PATCH v4 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li 1 sibling, 0 replies; 5+ messages in thread From: Jiqi Li @ 2026-07-08 9:20 UTC (permalink / raw) To: linux-tegra Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, mperttunen, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li, Conor Dooley Lenovo ThinkEdge SE70 is a fanless industrial edge gateway carrier board based on NVIDIA Tegra194 (Xavier NX) SOM. Add the corresponding compatible string for device tree validation. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jiqi Li <lijq9@lenovo.com> --- Changes in v2: - No further modifications, adds Conor's Acked-by tag Changes in v3: - No further modifications Changes in v4: - No further modifications --- Documentation/devicetree/bindings/arm/tegra.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 033a63f6c068..a54d0024e636 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -268,6 +268,11 @@ properties: items: - const: nvidia,p3509-0000+p3668-0001 - const: nvidia,tegra194 + - description: Lenovo ThinkEdge SE70 + items: + - const: lenovo,thinkedge-se70 + - const: nvidia,p3668-0001 + - const: nvidia,tegra194 - items: - const: nvidia,tegra234-vdk - const: nvidia,tegra234 -- 2.43.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v4 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree 2026-07-08 9:20 [PATCH v4 0/2] Add Lenovo ThinkEdge SE70 carrier board support Jiqi Li 2026-07-08 9:20 ` [PATCH v4 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string Jiqi Li @ 2026-07-08 9:20 ` Jiqi Li 2026-07-31 7:51 ` Mikko Perttunen 1 sibling, 1 reply; 5+ messages in thread From: Jiqi Li @ 2026-07-08 9:20 UTC (permalink / raw) To: linux-tegra Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, mperttunen, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li Add initial device tree support for the Lenovo ThinkEdge SE70, an industrial edge gateway based on the NVIDIA Jetson Xavier NX module (P3668-0001) with a custom carrier board. This initial submission includes: - 40-pin expansion header pinmux configuration - External Micro SD card slot with dedicated 3.3V regulator - I2C bus for 40-pin header Static verification passed: dt_binding_check and dtbs compilation complete without errors. Signed-off-by: Jiqi Li <lijq9@lenovo.com> --- Changes in v2: - Remove unused input-related headers from baseboard DTSI Changes in v3: - Merge baseboard content into main DTS, drop separate baseboard DTSI - Use stdout-path instead of bootargs in chosen node Changes in v4: - Rename regulator node from regulator-sd-3v3 to regulator-vdd-3v3-sd to follow the naming convention (requested by Mikko). - Move regulator nodes to the bottom of the file and order alphabetically. - Keep vdd_5v0_sys as it is referenced by USB and PMIC nodes in the SoC and SOM layers (required for compilation). --- arch/arm64/boot/dts/nvidia/Makefile | 1 + .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ 2 files changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile index 72c0cb5efa47..736a3f8a923f 100644 --- a/arch/arm64/boot/dts/nvidia/Makefile +++ b/arch/arm64/boot/dts/nvidia/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts new file mode 100644 index 000000000000..02ac645a7784 --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra194-p3668-0001.dtsi" + +#include <dt-bindings/gpio/tegra194-gpio.h> + +/ { + model = "Lenovo ThinkEdge SE70"; + compatible = "lenovo,thinkedge-se70", "nvidia,p3668-0001", "nvidia,tegra194"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + bus@0 { + /* 40-pin expansion header custom pinmux configuration */ + pinmux@2430000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinmux_hdr40>; + + pinmux_hdr40: pinmux-hdr40 { + pin7 { + nvidia,pins = "aud_mclk_ps4"; + nvidia,function = "aud"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pin11 { + nvidia,pins = "uart1_rts_pr4"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pin12 { + nvidia,pins = "dap5_sclk_pt5"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin35 { + nvidia,pins = "dap5_fs_pu0"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin36 { + nvidia,pins = "uart1_cts_pr5"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin38 { + nvidia,pins = "dap5_din_pt7"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin40 { + nvidia,pins = "dap5_dout_pt6"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + }; + }; + + /* Configure i2c bus clock to 400kHz for carrier board peripherals */ + i2c@3160000 { + clock-frequency = <400000>; + status = "okay"; + }; + + /* SDMMC3: External Micro SD card slot */ + mmc@3440000 { + bus-width = <4>; + cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_LOW>; + disable-wp; + no-1-8-v; + vmmc-supply = <&vdd_3v3_sd>; + status = "okay"; + }; + }; + + /* Fixed 3.3V power supply regulator for external Micro SD slot */ + vdd_3v3_sd: regulator-vdd-3v3-sd { + compatible = "regulator-fixed"; + regulator-name = "VDD_3V3_SD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + }; + + /* System 5V main supply, referenced by SOM and USB nodes */ + vdd_5v0_sys: regulator-vdd-5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "VDD_5V_SYS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; -- 2.43.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree 2026-07-08 9:20 ` [PATCH v4 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li @ 2026-07-31 7:51 ` Mikko Perttunen 2026-07-31 9:24 ` [External] " Jiqi JQ9 Li 0 siblings, 1 reply; 5+ messages in thread From: Mikko Perttunen @ 2026-07-31 7:51 UTC (permalink / raw) To: linux-tegra, Jiqi Li Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li On Wednesday, July 8, 2026 6:20 PM Jiqi Li wrote: > Add initial device tree support for the Lenovo ThinkEdge SE70, an > industrial edge gateway based on the NVIDIA Jetson Xavier NX module > (P3668-0001) with a custom carrier board. > > This initial submission includes: > - 40-pin expansion header pinmux configuration > - External Micro SD card slot with dedicated 3.3V regulator > - I2C bus for 40-pin header > > Static verification passed: dt_binding_check and dtbs compilation > complete without errors. > > Signed-off-by: Jiqi Li <lijq9@lenovo.com> > --- > Changes in v2: > - Remove unused input-related headers from baseboard DTSI > > Changes in v3: > - Merge baseboard content into main DTS, drop separate baseboard DTSI > - Use stdout-path instead of bootargs in chosen node > > Changes in v4: > - Rename regulator node from regulator-sd-3v3 to regulator-vdd-3v3-sd > to follow the naming convention (requested by Mikko). > - Move regulator nodes to the bottom of the file and order > alphabetically. > - Keep vdd_5v0_sys as it is referenced by USB and PMIC nodes in the > SoC and SOM layers (required for compilation). > --- > arch/arm64/boot/dts/nvidia/Makefile | 1 + > .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ > 2 files changed, 114 insertions(+) > create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > > diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile > index 72c0cb5efa47..736a3f8a923f 100644 > --- a/arch/arm64/boot/dts/nvidia/Makefile > +++ b/arch/arm64/boot/dts/nvidia/Makefile > @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb > dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb > dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb > dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb > +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb > dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb > dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb > dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb > diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > new file mode 100644 > index 000000000000..02ac645a7784 > --- /dev/null > +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > @@ -0,0 +1,113 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/dts-v1/; > + > +#include "tegra194-p3668-0001.dtsi" > + > +#include <dt-bindings/gpio/tegra194-gpio.h> > + > +/ { > + model = "Lenovo ThinkEdge SE70"; > + compatible = "lenovo,thinkedge-se70", "nvidia,p3668-0001", "nvidia,tegra194"; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; Unnecessary: the P3668-0001 dtsi already includes this. > + > + bus@0 { > + /* 40-pin expansion header custom pinmux configuration */ > + pinmux@2430000 { > + status = "okay"; The pinmux node is already enabled. > + pinctrl-names = "default"; > + pinctrl-0 = <&pinmux_hdr40>; > + > + pinmux_hdr40: pinmux-hdr40 { > + pin7 { > + nvidia,pins = "aud_mclk_ps4"; > + nvidia,function = "aud"; > + nvidia,pull = <TEGRA_PIN_PULL_NONE>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > + }; > + pin11 { > + nvidia,pins = "uart1_rts_pr4"; > + nvidia,function = "uarta"; > + nvidia,pull = <TEGRA_PIN_PULL_NONE>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > + }; > + pin12 { > + nvidia,pins = "dap5_sclk_pt5"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin35 { > + nvidia,pins = "dap5_fs_pu0"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin36 { > + nvidia,pins = "uart1_cts_pr5"; > + nvidia,function = "uarta"; > + nvidia,pull = <TEGRA_PIN_PULL_UP>; > + nvidia,tristate = <TEGRA_PIN_ENABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin38 { > + nvidia,pins = "dap5_din_pt7"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_ENABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin40 { > + nvidia,pins = "dap5_dout_pt6"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > + }; > + }; > + }; > + > + /* Configure i2c bus clock to 400kHz for carrier board peripherals */ > + i2c@3160000 { > + clock-frequency = <400000>; > + status = "okay"; This is also already enabled. > + }; > + > + /* SDMMC3: External Micro SD card slot */ > + mmc@3440000 { > + bus-width = <4>; > + cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_LOW>; > + disable-wp; > + no-1-8-v; > + vmmc-supply = <&vdd_3v3_sd>; > + status = "okay"; > + }; Perhaps you want to add an mmc1 alias for this in /aliases. > + }; > + > + /* Fixed 3.3V power supply regulator for external Micro SD slot */ > + vdd_3v3_sd: regulator-vdd-3v3-sd { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_3V3_SD"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; > + regulator-boot-on; > + enable-active-high; > + }; > + > + /* System 5V main supply, referenced by SOM and USB nodes */ > + vdd_5v0_sys: regulator-vdd-5v0-sys { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_5V_SYS"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; > + regulator-boot-on; > + }; > +}; > -- > 2.43.0 > > So some nits, but overall: Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Thank you! ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [External] Re: [PATCH v4 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree 2026-07-31 7:51 ` Mikko Perttunen @ 2026-07-31 9:24 ` Jiqi JQ9 Li 0 siblings, 0 replies; 5+ messages in thread From: Jiqi JQ9 Li @ 2026-07-31 9:24 UTC (permalink / raw) To: Mikko Perttunen, linux-tegra@vger.kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, krzk@kernel.org, jonathanh@nvidia.com, thierry.reding@gmail.com, mpearson-lenovo@squebb.ca >> Add initial device tree support for the Lenovo ThinkEdge SE70, an >> industrial edge gateway based on the NVIDIA Jetson Xavier NX module >> (P3668-0001) with a custom carrier board. >> >> This initial submission includes: >> - 40-pin expansion header pinmux configuration >> - External Micro SD card slot with dedicated 3.3V regulator >> - I2C bus for 40-pin header >> >> Static verification passed: dt_binding_check and dtbs compilation >> complete without errors. >> >> Signed-off-by: Jiqi Li <lijq9@lenovo.com> >> --- >> Changes in v2: >> - Remove unused input-related headers from baseboard DTSI >> >> Changes in v3: >> - Merge baseboard content into main DTS, drop separate baseboard DTSI >> - Use stdout-path instead of bootargs in chosen node >> >> Changes in v4: >> - Rename regulator node from regulator-sd-3v3 to regulator-vdd-3v3-sd >> to follow the naming convention (requested by Mikko). >> - Move regulator nodes to the bottom of the file and order >> alphabetically. >> - Keep vdd_5v0_sys as it is referenced by USB and PMIC nodes in the >> SoC and SOM layers (required for compilation). >> --- >> arch/arm64/boot/dts/nvidia/Makefile | 1 + >> .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ >> 2 files changed, 114 insertions(+) >> create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts >> >> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile >> index 72c0cb5efa47..736a3f8a923f 100644 >> --- a/arch/arm64/boot/dts/nvidia/Makefile >> +++ b/arch/arm64/boot/dts/nvidia/Makefile >> @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb >> +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb >> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts >> new file mode 100644 >> index 000000000000..02ac645a7784 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts >> @@ -0,0 +1,113 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/dts-v1/; >> + >> +#include "tegra194-p3668-0001.dtsi" >> + >> +#include <dt-bindings/gpio/tegra194-gpio.h> >> + >> +/ { >> + model = "Lenovo ThinkEdge SE70"; >> + compatible = "lenovo,thinkedge-se70", "nvidia,p3668-0001", "nvidia,tegra194"; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; > >Unnecessary: the P3668-0001 dtsi already includes this. > >> + >> + bus@0 { >> + /* 40-pin expansion header custom pinmux configuration */ >> + pinmux@2430000 { >> + status = "okay"; > >The pinmux node is already enabled. > >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinmux_hdr40>; >> + >> + pinmux_hdr40: pinmux-hdr40 { >> + pin7 { >> + nvidia,pins = "aud_mclk_ps4"; >> + nvidia,function = "aud"; >> + nvidia,pull = <TEGRA_PIN_PULL_NONE>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; >> + }; >> + pin11 { >> + nvidia,pins = "uart1_rts_pr4"; >> + nvidia,function = "uarta"; >> + nvidia,pull = <TEGRA_PIN_PULL_NONE>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; >> + }; >> + pin12 { >> + nvidia,pins = "dap5_sclk_pt5"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin35 { >> + nvidia,pins = "dap5_fs_pu0"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin36 { >> + nvidia,pins = "uart1_cts_pr5"; >> + nvidia,function = "uarta"; >> + nvidia,pull = <TEGRA_PIN_PULL_UP>; >> + nvidia,tristate = <TEGRA_PIN_ENABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin38 { >> + nvidia,pins = "dap5_din_pt7"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_ENABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin40 { >> + nvidia,pins = "dap5_dout_pt6"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; >> + }; >> + }; >> + }; >> + >> + /* Configure i2c bus clock to 400kHz for carrier board peripherals */ >> + i2c@3160000 { >> + clock-frequency = <400000>; >> + status = "okay"; > >This is also already enabled. > >> + }; >> + >> + /* SDMMC3: External Micro SD card slot */ >> + mmc@3440000 { >> + bus-width = <4>; >> + cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_LOW>; >> + disable-wp; >> + no-1-8-v; >> + vmmc-supply = <&vdd_3v3_sd>; >> + status = "okay"; >> + }; > >Perhaps you want to add an mmc1 alias for this in /aliases. > >> + }; >> + >> + /* Fixed 3.3V power supply regulator for external Micro SD slot */ >> + vdd_3v3_sd: regulator-vdd-3v3-sd { >> + compatible = "regulator-fixed"; >> + regulator-name = "VDD_3V3_SD"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; >> + regulator-boot-on; >> + enable-active-high; >> + }; >> + >> + /* System 5V main supply, referenced by SOM and USB nodes */ >> + vdd_5v0_sys: regulator-vdd-5v0-sys { >> + compatible = "regulator-fixed"; >> + regulator-name = "VDD_5V_SYS"; >> + regulator-min-microvolt = <5000000>; >> + regulator-max-microvolt = <5000000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> +}; >> -- >> 2.43.0 >> >> > >So some nits, but overall: > >Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> > >Thank you! Hi Mikko, Thanks for the review! I've fixed the nits you pointed out: - Dropped the redundant chosen node - Removed unnecessary status="okay" - Added mmc1 alias I'll send v5 shortly. Best regards, Jiqi Li ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-07-31 9:24 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-08 9:20 [PATCH v4 0/2] Add Lenovo ThinkEdge SE70 carrier board support Jiqi Li 2026-07-08 9:20 ` [PATCH v4 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string Jiqi Li 2026-07-08 9:20 ` [PATCH v4 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li 2026-07-31 7:51 ` Mikko Perttunen 2026-07-31 9:24 ` [External] " Jiqi JQ9 Li
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox