* [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support
@ 2026-07-01 9:06 Jiqi Li
2026-07-01 9:06 ` [PATCH 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string Jiqi Li
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Jiqi Li @ 2026-07-01 9:06 UTC (permalink / raw)
To: linux-tegra
Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, mperttunen,
jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li
This patch set introduces device tree binding and standalone DTS file
for Lenovo ThinkEdge SE70, a fanless industrial edge gateway powered by
the NVIDIA Jetson Xavier NX module (P3668-0001) on a custom carrier board.
Patch 1 updates tegra.yaml bindings to add the three-stage compatible
string matching board + SOM + SoC, following the existing Tegra
carrier board convention.
Patch 2 adds the complete carrier board device tree, including:
- 40-pin expansion header pinmux configuration
- External Micro SD card slot with dedicated 3.3V regulator
- I2C bus for 40-pin header
All static device tree checks pass: dtbs compile and dt_binding_check
complete without errors.
Jiqi Li (2):
dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string
arm64: tegra: Add Lenovo ThinkEdge SE70 device tree
.../devicetree/bindings/arm/tegra.yaml | 5 +
arch/arm64/boot/dts/nvidia/Makefile | 1 +
.../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++
3 files changed, 119 insertions(+)
create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts
--
2.43.0
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string 2026-07-01 9:06 [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Jiqi Li @ 2026-07-01 9:06 ` Jiqi Li 2026-07-01 9:06 ` [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li 2026-07-08 1:58 ` [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Mikko Perttunen 2 siblings, 0 replies; 8+ messages in thread From: Jiqi Li @ 2026-07-01 9:06 UTC (permalink / raw) To: linux-tegra Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, mperttunen, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li, Conor Dooley Lenovo ThinkEdge SE70 is a fanless industrial edge gateway carrier board based on NVIDIA Tegra194 (Xavier NX) SOM. Add the corresponding compatible string for device tree validation. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jiqi Li <lijq9@lenovo.com> --- Changes in v2: - No further modifications, adds Conor's Acked-by tag Changes in v3: - No further modifications --- Documentation/devicetree/bindings/arm/tegra.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index 033a63f6c068..a54d0024e636 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -268,6 +268,11 @@ properties: items: - const: nvidia,p3509-0000+p3668-0001 - const: nvidia,tegra194 + - description: Lenovo ThinkEdge SE70 + items: + - const: lenovo,thinkedge-se70 + - const: nvidia,p3668-0001 + - const: nvidia,tegra194 - items: - const: nvidia,tegra234-vdk - const: nvidia,tegra234 -- 2.43.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree 2026-07-01 9:06 [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Jiqi Li 2026-07-01 9:06 ` [PATCH 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string Jiqi Li @ 2026-07-01 9:06 ` Jiqi Li 2026-07-08 2:22 ` Mikko Perttunen 2026-07-08 1:58 ` [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Mikko Perttunen 2 siblings, 1 reply; 8+ messages in thread From: Jiqi Li @ 2026-07-01 9:06 UTC (permalink / raw) To: linux-tegra Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, mperttunen, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li Add initial device tree support for the Lenovo ThinkEdge SE70, an industrial edge gateway based on the NVIDIA Jetson Xavier NX module (P3668-0001) with a custom carrier board. This initial submission includes: - 40-pin expansion header pinmux configuration - External Micro SD card slot with dedicated 3.3V regulator - I2C bus for 40-pin header Static verification passed: dt_binding_check and dtbs compilation complete without errors. Signed-off-by: Jiqi Li <lijq9@lenovo.com> --- Changes in v2: - Remove unused input-related headers from baseboard DTSI Changes in v3: - Merge baseboard content into main DTS, drop separate baseboard DTSI - Use stdout-path instead of bootargs in chosen node --- arch/arm64/boot/dts/nvidia/Makefile | 1 + .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ 2 files changed, 114 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile index 72c0cb5efa47..736a3f8a923f 100644 --- a/arch/arm64/boot/dts/nvidia/Makefile +++ b/arch/arm64/boot/dts/nvidia/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts new file mode 100644 index 000000000000..530d5bcaeba7 --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "tegra194-p3668-0001.dtsi" + +#include <dt-bindings/gpio/tegra194-gpio.h> + +/ { + model = "Lenovo ThinkEdge SE70"; + compatible = "lenovo,thinkedge-se70", "nvidia,p3668-0001", "nvidia,tegra194"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + vdd_5v0_sys: regulator-vdd-5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "VDD_5V_SYS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + /* Fixed 3.3V power supply regulator for external Micro SD slot */ + vdd_3v3_sd: regulator-sd-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDD_3V3_SD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + }; + + bus@0 { + /* 40-pin expansion header custom pinmux configuration */ + pinmux@2430000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinmux_hdr40>; + + pinmux_hdr40: pinmux-hdr40 { + pin7 { + nvidia,pins = "aud_mclk_ps4"; + nvidia,function = "aud"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pin11 { + nvidia,pins = "uart1_rts_pr4"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pin12 { + nvidia,pins = "dap5_sclk_pt5"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin35 { + nvidia,pins = "dap5_fs_pu0"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin36 { + nvidia,pins = "uart1_cts_pr5"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin38 { + nvidia,pins = "dap5_din_pt7"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pin40 { + nvidia,pins = "dap5_dout_pt6"; + nvidia,function = "i2s5"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + }; + }; + + /* Configure i2c bus clock to 400kHz for carrier board peripherals */ + i2c@3160000 { + clock-frequency = <400000>; + status = "okay"; + }; + + /* SDMMC3: External Micro SD card slot */ + mmc@3440000 { + bus-width = <4>; + cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_LOW>; + disable-wp; + no-1-8-v; + vmmc-supply = <&vdd_3v3_sd>; + status = "okay"; + }; + + }; +}; -- 2.43.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree 2026-07-01 9:06 ` [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li @ 2026-07-08 2:22 ` Mikko Perttunen 2026-07-08 3:17 ` [External] " Jiqi JQ9 Li 0 siblings, 1 reply; 8+ messages in thread From: Mikko Perttunen @ 2026-07-08 2:22 UTC (permalink / raw) To: linux-tegra, Jiqi Li Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li On Wednesday, July 1, 2026 6:06 PM Jiqi Li wrote: > Add initial device tree support for the Lenovo ThinkEdge SE70, an > industrial edge gateway based on the NVIDIA Jetson Xavier NX module > (P3668-0001) with a custom carrier board. > > This initial submission includes: > - 40-pin expansion header pinmux configuration > - External Micro SD card slot with dedicated 3.3V regulator > - I2C bus for 40-pin header > > Static verification passed: dt_binding_check and dtbs compilation > complete without errors. > > Signed-off-by: Jiqi Li <lijq9@lenovo.com> > --- > Changes in v2: > - Remove unused input-related headers from baseboard DTSI > > Changes in v3: > - Merge baseboard content into main DTS, drop separate baseboard DTSI > - Use stdout-path instead of bootargs in chosen node > --- > arch/arm64/boot/dts/nvidia/Makefile | 1 + > .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ > 2 files changed, 114 insertions(+) > create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > > diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile > index 72c0cb5efa47..736a3f8a923f 100644 > --- a/arch/arm64/boot/dts/nvidia/Makefile > +++ b/arch/arm64/boot/dts/nvidia/Makefile > @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb > dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb > dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb > dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb > +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb > dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb > dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb > dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb > diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > new file mode 100644 > index 000000000000..530d5bcaeba7 > --- /dev/null > +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > @@ -0,0 +1,113 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/dts-v1/; > + > +#include "tegra194-p3668-0001.dtsi" > + > +#include <dt-bindings/gpio/tegra194-gpio.h> > + > +/ { > + model = "Lenovo ThinkEdge SE70"; > + compatible = "lenovo,thinkedge-se70", "nvidia,p3668-0001", "nvidia,tegra194"; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + vdd_5v0_sys: regulator-vdd-5v0-sys { > + compatible = "regulator-fixed"; > + regulator-name = "VDD_5V_SYS"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; > + regulator-boot-on; > + }; Nothing currently references this regulator. Should e.g. the SD regulator below supply from it, or should it be removed? > + > + /* Fixed 3.3V power supply regulator for external Micro SD slot */ > + vdd_3v3_sd: regulator-sd-3v3 { Should be called regulator-vdd-3v3-sd. Also, please move the regulator nodes to the bottom of the file matching other device trees (alphabetical order). Thank you! Mikko > + compatible = "regulator-fixed"; > + regulator-name = "VDD_3V3_SD"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; > + regulator-boot-on; > + enable-active-high; > + }; > + > + bus@0 { > + /* 40-pin expansion header custom pinmux configuration */ > + pinmux@2430000 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinmux_hdr40>; > + > + pinmux_hdr40: pinmux-hdr40 { > + pin7 { > + nvidia,pins = "aud_mclk_ps4"; > + nvidia,function = "aud"; > + nvidia,pull = <TEGRA_PIN_PULL_NONE>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > + }; > + pin11 { > + nvidia,pins = "uart1_rts_pr4"; > + nvidia,function = "uarta"; > + nvidia,pull = <TEGRA_PIN_PULL_NONE>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > + }; > + pin12 { > + nvidia,pins = "dap5_sclk_pt5"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin35 { > + nvidia,pins = "dap5_fs_pu0"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin36 { > + nvidia,pins = "uart1_cts_pr5"; > + nvidia,function = "uarta"; > + nvidia,pull = <TEGRA_PIN_PULL_UP>; > + nvidia,tristate = <TEGRA_PIN_ENABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin38 { > + nvidia,pins = "dap5_din_pt7"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_ENABLE>; > + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > + }; > + pin40 { > + nvidia,pins = "dap5_dout_pt6"; > + nvidia,function = "i2s5"; > + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > + nvidia,tristate = <TEGRA_PIN_DISABLE>; > + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > + }; > + }; > + }; > + > + /* Configure i2c bus clock to 400kHz for carrier board peripherals */ > + i2c@3160000 { > + clock-frequency = <400000>; > + status = "okay"; > + }; > + > + /* SDMMC3: External Micro SD card slot */ > + mmc@3440000 { > + bus-width = <4>; > + cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_LOW>; > + disable-wp; > + no-1-8-v; > + vmmc-supply = <&vdd_3v3_sd>; > + status = "okay"; > + }; > + > + }; > +}; > -- > 2.43.0 > > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [External] Re: [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree 2026-07-08 2:22 ` Mikko Perttunen @ 2026-07-08 3:17 ` Jiqi JQ9 Li 2026-07-08 5:55 ` Mikko Perttunen 0 siblings, 1 reply; 8+ messages in thread From: Jiqi JQ9 Li @ 2026-07-08 3:17 UTC (permalink / raw) To: Mikko Perttunen, linux-tegra@vger.kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, krzk@kernel.org, jonathanh@nvidia.com, thierry.reding@gmail.com, mpearson-lenovo@squebb.ca >> Add initial device tree support for the Lenovo ThinkEdge SE70, an >> industrial edge gateway based on the NVIDIA Jetson Xavier NX module >> (P3668-0001) with a custom carrier board. >> >> This initial submission includes: >> - 40-pin expansion header pinmux configuration >> - External Micro SD card slot with dedicated 3.3V regulator >> - I2C bus for 40-pin header >> >> Static verification passed: dt_binding_check and dtbs compilation >> complete without errors. >> >> Signed-off-by: Jiqi Li <lijq9@lenovo.com> >> --- >> Changes in v2: >> - Remove unused input-related headers from baseboard DTSI >> >> Changes in v3: >> - Merge baseboard content into main DTS, drop separate baseboard DTSI >> - Use stdout-path instead of bootargs in chosen node >> --- >> arch/arm64/boot/dts/nvidia/Makefile | 1 + >> .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ >> 2 files changed, 114 insertions(+) >> create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts >> >> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile >> index 72c0cb5efa47..736a3f8a923f 100644 >> --- a/arch/arm64/boot/dts/nvidia/Makefile >> +++ b/arch/arm64/boot/dts/nvidia/Makefile >> @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb >> +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb >> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts >> new file mode 100644 >> index 000000000000..530d5bcaeba7 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts >> @@ -0,0 +1,113 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/dts-v1/; >> + >> +#include "tegra194-p3668-0001.dtsi" >> + >> +#include <dt-bindings/gpio/tegra194-gpio.h> >> + >> +/ { >> + model = "Lenovo ThinkEdge SE70"; >> + compatible = "lenovo,thinkedge-se70", "nvidia,p3668-0001", "nvidia,tegra194"; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> + >> + vdd_5v0_sys: regulator-vdd-5v0-sys { >> + compatible = "regulator-fixed"; >> + regulator-name = "VDD_5V_SYS"; >> + regulator-min-microvolt = <5000000>; >> + regulator-max-microvolt = <5000000>; >> + regulator-always-on; >> + regulator-boot-on; >> + }; > >Nothing currently references this regulator. Should e.g. the SD >regulator below supply from it, or should it be removed? > >> + >> + /* Fixed 3.3V power supply regulator for external Micro SD slot */ >> + vdd_3v3_sd: regulator-sd-3v3 { > >Should be called regulator-vdd-3v3-sd. > >Also, please move the regulator nodes to the bottom of the file >matching other device trees (alphabetical order). > >Thank you! >Mikko > Hi Mikko, Thank you for the detailed review of the regulator nodes. I have addressed your comments for the upcoming v4 as follows: 1. Regulator naming and placement: - I will rename `vdd_3v3_sd: regulator-sd-3v3` to `regulator-vdd-3v3-sd` to follow the naming convention. - I will move both regulator nodes to the bottom of the file and order them alphabetically (regulator-vdd-3v3-sd then regulator-vdd-5v0-sys). 2. Regarding `vdd_5v0_sys`: - After removing it, I encountered compilation errors because it is referenced by nodes in `tegra194.dtsi` (USB padctl) and `tegra194-p3668.dtsi` (PMIC regulators). Therefore, it must be kept in the file. I will add a comment to clarify it is a system supply required by the SoM and SoC layers. I will submit v4 shortly with these changes incorporated. Best regards, Jiqi Li >> + compatible = "regulator-fixed"; >> + regulator-name = "VDD_3V3_SD"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; >> + regulator-boot-on; >> + enable-active-high; >> + }; >> + >> + bus@0 { >> + /* 40-pin expansion header custom pinmux configuration */ >> + pinmux@2430000 { >> + status = "okay"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinmux_hdr40>; >> + >> + pinmux_hdr40: pinmux-hdr40 { >> + pin7 { >> + nvidia,pins = "aud_mclk_ps4"; >> + nvidia,function = "aud"; >> + nvidia,pull = <TEGRA_PIN_PULL_NONE>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; >> + }; >> + pin11 { >> + nvidia,pins = "uart1_rts_pr4"; >> + nvidia,function = "uarta"; >> + nvidia,pull = <TEGRA_PIN_PULL_NONE>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; >> + }; >> + pin12 { >> + nvidia,pins = "dap5_sclk_pt5"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin35 { >> + nvidia,pins = "dap5_fs_pu0"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin36 { >> + nvidia,pins = "uart1_cts_pr5"; >> + nvidia,function = "uarta"; >> + nvidia,pull = <TEGRA_PIN_PULL_UP>; >> + nvidia,tristate = <TEGRA_PIN_ENABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin38 { >> + nvidia,pins = "dap5_din_pt7"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_ENABLE>; >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; >> + }; >> + pin40 { >> + nvidia,pins = "dap5_dout_pt6"; >> + nvidia,function = "i2s5"; >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; >> + }; >> + }; >> + }; >> + >> + /* Configure i2c bus clock to 400kHz for carrier board peripherals */ >> + i2c@3160000 { >> + clock-frequency = <400000>; >> + status = "okay"; >> + }; >> + >> + /* SDMMC3: External Micro SD card slot */ >> + mmc@3440000 { >> + bus-width = <4>; >> + cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_LOW>; >> + disable-wp; >> + no-1-8-v; >> + vmmc-supply = <&vdd_3v3_sd>; >> + status = "okay"; >> + }; >> + >> + }; >> +}; >> -- >> 2.43.0 >> >> > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [External] Re: [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree 2026-07-08 3:17 ` [External] " Jiqi JQ9 Li @ 2026-07-08 5:55 ` Mikko Perttunen 0 siblings, 0 replies; 8+ messages in thread From: Mikko Perttunen @ 2026-07-08 5:55 UTC (permalink / raw) To: linux-tegra@vger.kernel.org, Jiqi JQ9 Li Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, krzk@kernel.org, jonathanh@nvidia.com, thierry.reding@gmail.com, mpearson-lenovo@squebb.ca On Wednesday, July 8, 2026 12:17 PM Jiqi JQ9 Li wrote: > >> Add initial device tree support for the Lenovo ThinkEdge SE70, an > >> industrial edge gateway based on the NVIDIA Jetson Xavier NX module > >> (P3668-0001) with a custom carrier board. > >> > >> This initial submission includes: > >> - 40-pin expansion header pinmux configuration > >> - External Micro SD card slot with dedicated 3.3V regulator > >> - I2C bus for 40-pin header > >> > >> Static verification passed: dt_binding_check and dtbs compilation > >> complete without errors. > >> > >> Signed-off-by: Jiqi Li <lijq9@lenovo.com> > >> --- > >> Changes in v2: > >> - Remove unused input-related headers from baseboard DTSI > >> > >> Changes in v3: > >> - Merge baseboard content into main DTS, drop separate baseboard DTSI > >> - Use stdout-path instead of bootargs in chosen node > >> --- > >> arch/arm64/boot/dts/nvidia/Makefile | 1 + > >> .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ > >> 2 files changed, 114 insertions(+) > >> create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > >> > >> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile > >> index 72c0cb5efa47..736a3f8a923f 100644 > >> --- a/arch/arm64/boot/dts/nvidia/Makefile > >> +++ b/arch/arm64/boot/dts/nvidia/Makefile > >> @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb > >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb > >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb > >> dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb > >> +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb > >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb > >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb > >> dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb > >> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > >> new file mode 100644 > >> index 000000000000..530d5bcaeba7 > >> --- /dev/null > >> +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > >> @@ -0,0 +1,113 @@ > >> +// SPDX-License-Identifier: GPL-2.0 > >> +/dts-v1/; > >> + > >> +#include "tegra194-p3668-0001.dtsi" > >> + > >> +#include <dt-bindings/gpio/tegra194-gpio.h> > >> + > >> +/ { > >> + model = "Lenovo ThinkEdge SE70"; > >> + compatible = "lenovo,thinkedge-se70", "nvidia,p3668-0001", "nvidia,tegra194"; > >> + > >> + chosen { > >> + stdout-path = "serial0:115200n8"; > >> + }; > >> + > >> + vdd_5v0_sys: regulator-vdd-5v0-sys { > >> + compatible = "regulator-fixed"; > >> + regulator-name = "VDD_5V_SYS"; > >> + regulator-min-microvolt = <5000000>; > >> + regulator-max-microvolt = <5000000>; > >> + regulator-always-on; > >> + regulator-boot-on; > >> + }; > > > >Nothing currently references this regulator. Should e.g. the SD > >regulator below supply from it, or should it be removed? > > > >> + > >> + /* Fixed 3.3V power supply regulator for external Micro SD slot */ > >> + vdd_3v3_sd: regulator-sd-3v3 { > > > >Should be called regulator-vdd-3v3-sd. > > > >Also, please move the regulator nodes to the bottom of the file > >matching other device trees (alphabetical order). > > > >Thank you! > >Mikko > > > > Hi Mikko, > > Thank you for the detailed review of the regulator nodes. > > I have addressed your comments for the upcoming v4 as follows: > > 1. Regulator naming and placement: > - I will rename `vdd_3v3_sd: regulator-sd-3v3` to > `regulator-vdd-3v3-sd` to follow the naming convention. > - I will move both regulator nodes to the bottom of the file and > order them alphabetically (regulator-vdd-3v3-sd then > regulator-vdd-5v0-sys). > > 2. Regarding `vdd_5v0_sys`: > - After removing it, I encountered compilation errors because it is > referenced by nodes in `tegra194.dtsi` (USB padctl) and > `tegra194-p3668.dtsi` (PMIC regulators). Therefore, it must be > kept in the file. I will add a comment to clarify it is a system > supply required by the SoM and SoC layers. Ah, indeed. That's fine then. I agree that a brief comment would be helpful. > > I will submit v4 shortly with these changes incorporated. > > Best regards, > Jiqi Li > > >> + compatible = "regulator-fixed"; > >> + regulator-name = "VDD_3V3_SD"; > >> + regulator-min-microvolt = <3300000>; > >> + regulator-max-microvolt = <3300000>; > >> + gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; > >> + regulator-boot-on; > >> + enable-active-high; > >> + }; > >> + > >> + bus@0 { > >> + /* 40-pin expansion header custom pinmux configuration */ > >> + pinmux@2430000 { > >> + status = "okay"; > >> + pinctrl-names = "default"; > >> + pinctrl-0 = <&pinmux_hdr40>; > >> + > >> + pinmux_hdr40: pinmux-hdr40 { > >> + pin7 { > >> + nvidia,pins = "aud_mclk_ps4"; > >> + nvidia,function = "aud"; > >> + nvidia,pull = <TEGRA_PIN_PULL_NONE>; > >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; > >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > >> + }; > >> + pin11 { > >> + nvidia,pins = "uart1_rts_pr4"; > >> + nvidia,function = "uarta"; > >> + nvidia,pull = <TEGRA_PIN_PULL_NONE>; > >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; > >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > >> + }; > >> + pin12 { > >> + nvidia,pins = "dap5_sclk_pt5"; > >> + nvidia,function = "i2s5"; > >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; > >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > >> + }; > >> + pin35 { > >> + nvidia,pins = "dap5_fs_pu0"; > >> + nvidia,function = "i2s5"; > >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; > >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > >> + }; > >> + pin36 { > >> + nvidia,pins = "uart1_cts_pr5"; > >> + nvidia,function = "uarta"; > >> + nvidia,pull = <TEGRA_PIN_PULL_UP>; > >> + nvidia,tristate = <TEGRA_PIN_ENABLE>; > >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > >> + }; > >> + pin38 { > >> + nvidia,pins = "dap5_din_pt7"; > >> + nvidia,function = "i2s5"; > >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > >> + nvidia,tristate = <TEGRA_PIN_ENABLE>; > >> + nvidia,enable-input = <TEGRA_PIN_ENABLE>; > >> + }; > >> + pin40 { > >> + nvidia,pins = "dap5_dout_pt6"; > >> + nvidia,function = "i2s5"; > >> + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; > >> + nvidia,tristate = <TEGRA_PIN_DISABLE>; > >> + nvidia,enable-input = <TEGRA_PIN_DISABLE>; > >> + }; > >> + }; > >> + }; > >> + > >> + /* Configure i2c bus clock to 400kHz for carrier board peripherals */ > >> + i2c@3160000 { > >> + clock-frequency = <400000>; > >> + status = "okay"; > >> + }; > >> + > >> + /* SDMMC3: External Micro SD card slot */ > >> + mmc@3440000 { > >> + bus-width = <4>; > >> + cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_LOW>; > >> + disable-wp; > >> + no-1-8-v; > >> + vmmc-supply = <&vdd_3v3_sd>; > >> + status = "okay"; > >> + }; > >> + > >> + }; > >> +}; > >> -- > >> 2.43.0 > >> > >> > > > > > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support 2026-07-01 9:06 [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Jiqi Li 2026-07-01 9:06 ` [PATCH 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string Jiqi Li 2026-07-01 9:06 ` [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li @ 2026-07-08 1:58 ` Mikko Perttunen 2026-07-08 3:04 ` [External] " Jiqi JQ9 Li 2 siblings, 1 reply; 8+ messages in thread From: Mikko Perttunen @ 2026-07-08 1:58 UTC (permalink / raw) To: linux-tegra, Jiqi Li Cc: devicetree, robh+dt, krzk+dt, conor+dt, krzk, jonathanh, thierry.reding, mpearson-lenovo, Jiqi Li On Wednesday, July 1, 2026 6:06 PM Jiqi Li wrote: > This patch set introduces device tree binding and standalone DTS file > for Lenovo ThinkEdge SE70, a fanless industrial edge gateway powered by > the NVIDIA Jetson Xavier NX module (P3668-0001) on a custom carrier board. > > Patch 1 updates tegra.yaml bindings to add the three-stage compatible > string matching board + SOM + SoC, following the existing Tegra > carrier board convention. > > Patch 2 adds the complete carrier board device tree, including: > - 40-pin expansion header pinmux configuration > - External Micro SD card slot with dedicated 3.3V regulator > - I2C bus for 40-pin header > > All static device tree checks pass: dtbs compile and dt_binding_check > complete without errors. > > Jiqi Li (2): > dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string > arm64: tegra: Add Lenovo ThinkEdge SE70 device tree > > .../devicetree/bindings/arm/tegra.yaml | 5 + > arch/arm64/boot/dts/nvidia/Makefile | 1 + > .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ > 3 files changed, 119 insertions(+) > create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts > > -- > 2.43.0 > > Your patch email formatting is off. The individual patch subjects should include the series version. That's what you should get out of the box with git send-email. Also, please don't restart series numbering. The above two make it hard to track the series. My strong recommendation is to use the 'b4' tool to manage and submit your patches. It will by default result in emails that are easier for maintainers to work with. Thank you Mikko ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [External] Re: [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support 2026-07-08 1:58 ` [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Mikko Perttunen @ 2026-07-08 3:04 ` Jiqi JQ9 Li 0 siblings, 0 replies; 8+ messages in thread From: Jiqi JQ9 Li @ 2026-07-08 3:04 UTC (permalink / raw) To: Mikko Perttunen, linux-tegra@vger.kernel.org Cc: devicetree@vger.kernel.org, robh+dt@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, krzk@kernel.org, jonathanh@nvidia.com, thierry.reding@gmail.com, mpearson-lenovo@squebb.ca >> This patch set introduces device tree binding and standalone DTS file >> for Lenovo ThinkEdge SE70, a fanless industrial edge gateway powered by >> the NVIDIA Jetson Xavier NX module (P3668-0001) on a custom carrier board. >> >> Patch 1 updates tegra.yaml bindings to add the three-stage compatible >> string matching board + SOM + SoC, following the existing Tegra >> carrier board convention. >> >> Patch 2 adds the complete carrier board device tree, including: >> - 40-pin expansion header pinmux configuration >> - External Micro SD card slot with dedicated 3.3V regulator >> - I2C bus for 40-pin header >> >> All static device tree checks pass: dtbs compile and dt_binding_check >> complete without errors. >> >> Jiqi Li (2): >> dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string >> arm64: tegra: Add Lenovo ThinkEdge SE70 device tree >> >> .../devicetree/bindings/arm/tegra.yaml | 5 + >> arch/arm64/boot/dts/nvidia/Makefile | 1 + >> .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 113 ++++++++++++++++++ >> 3 files changed, 119 insertions(+) >> create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts >> >> -- >> 2.43.0 >> >> > >Your patch email formatting is off. The individual patch subjects should >include the series version. That's what you should get out of the box >with git send-email. > >Also, please don't restart series numbering. The above two make it hard >to track the series. > >My strong recommendation is to use the 'b4' tool to manage and submit >your patches. It will by default result in emails that are easier for >maintainers to work with. > >Thank you >Mikko Hi Mikko, Thank you for pointing out the formatting issues. I understand that the individual patch subjects should include the series version (e.g., [PATCH v3 1/2]), and that I should not restart series numbering. I will prepare a v4 version with the following fixes: - Use `git format-patch --subject-prefix="PATCH v4"` to ensure all patches have the correct subject prefix. - Keep the same series numbering and clearly mention in the cover letter that this is v4 with no code changes (only format fixes). I will also look into using the 'b4' tool as you recommended for future submissions to make the process smoother. Thank you for your guidance. Best regards, Jiqi Li ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-07-08 5:55 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-07-01 9:06 [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Jiqi Li 2026-07-01 9:06 ` [PATCH 1/2] dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string Jiqi Li 2026-07-01 9:06 ` [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 device tree Jiqi Li 2026-07-08 2:22 ` Mikko Perttunen 2026-07-08 3:17 ` [External] " Jiqi JQ9 Li 2026-07-08 5:55 ` Mikko Perttunen 2026-07-08 1:58 ` [PATCH v3 0/2] Add Lenovo ThinkEdge SE70 carrier board support Mikko Perttunen 2026-07-08 3:04 ` [External] " Jiqi JQ9 Li
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