Re: [PATCH 2/2] arm64: tegra: Add Lenovo ThinkEdge SE70 carrier board DTS

[Mikko Perttunen <mperttunen@nvidia.com>]

On Sunday, June 28, 2026 9:43 PM Jiqi Li wrote:
> ThinkEdge SE70 is a fanless industrial edge gateway built around
> NVIDIA Tegra194 Xavier NX SOM. This patch adds a standalone device
> tree file describing core carrier board peripherals:
> - Custom 40-pin header pinmux configuration
> - External SD card slot with dedicated 3.3V fixed regulator
> 
> Unpopulated PWM and fan peripherals are explicitly disabled
> per hardware layout, following mainline device tree best practices.
> 
> Static verification passed: dt_binding_check and dtbs compilation
> complete without errors.
> 
> Signed-off-by: Jiqi Li <lijq9@lenovo.com>
> ---
> Changes in v2:
> - Refactor peripheral layout under root bus@0
> - Fix regulator label hyphen naming issue
> - Drop downstream-only nvidia,lpdr pinmux property
> - Fix SD card detect GPIO polarity, remove cd-inverted
> Changes in v3:
> - Reorganize all pin configurations under native pinmux@2430000 node
> - Rename sdhci@3440000 to mmc@3440000 to match upstream node naming
> - Move pwm-fan disable override to root level
> - Remove redundant disabled overrides for non-existent peripherals
> - Drop unused #address-cells / #size-cells properties from regulator wrapper
> - Extend root compatible string to triple board+SOM+SoC format
> Changes in v4:
> - Fix pinctrl subnode naming to satisfy tegra194 pinmux schema regex
> - Rework SD 3.3V regulator: remove invalid simple-bus wrapper, align naming
>   with official P3668 DTSI and add regulator-boot-on property
> - Add required MMC properties: bus-width = <4>, disable-wp, no-1-8-v
> - Remove incorrect spi@3270000 disable override, retain QSPI for SOM boot flash
> - Correct commit message wording to remove reference to disabled SPI
> - Resolve all remaining Sashiko static device tree violations
> ---
>  arch/arm64/boot/dts/nvidia/Makefile           |   1 +
>  .../nvidia/tegra194-lenovo-thinkedge-se70.dts | 125 ++++++++++++++++++
>  2 files changed, 126 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts
> 
> diff --git a/arch/arm64/boot/dts/nvidia/Makefile b/arch/arm64/boot/dts/nvidia/Makefile
> index 72c0cb5efa47..736a3f8a923f 100644
> --- a/arch/arm64/boot/dts/nvidia/Makefile
> +++ b/arch/arm64/boot/dts/nvidia/Makefile
> @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_TEGRA_186_SOC) += tegra186-p3509-0000+p3636-0001.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p2972-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-p3509-0000+p3668-0001.dtb
> +dtb-$(CONFIG_ARCH_TEGRA_194_SOC) += tegra194-lenovo-thinkedge-se70.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-sim-vdk.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0000.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_234_SOC) += tegra234-p3737-0000+p3701-0008.dtb
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts
> new file mode 100644
> index 000000000000..969ea1783bbd
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nvidia/tegra194-lenovo-thinkedge-se70.dts
> @@ -0,0 +1,125 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/dts-v1/;
> +
> +#include "tegra194-p3668-0001.dtsi"
> +#include "tegra194-p3509-0000.dtsi"

Based on your description, this platform uses the Xavier NX module
w/ eMMC (P3668-0001), but a custom carrier board. P3509 is the Jetson
Xavier NX carrier board, so you should add a new baseboard device tree
file. This will also avoid the need to disable nodes that don't exist
on your baseboard.

Best regards
Mikko

> +
> +/ {
> +	model = "Lenovo ThinkEdge SE70";
> +	compatible = "lenovo,thinkedge-se70", "nvidia,p3509-0000+p3668-0001", "nvidia,tegra194";
> +
> +	chosen {
> +		bootargs = "console=ttyTCU0,115200";
> +	};
> +
> +	/* Fixed 3.3V regulator for external SD card slot */
> +	vdd_3v3_sd: regulator-sd-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "VDD_3V3_SD";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&gpio TEGRA194_MAIN_GPIO(Q, 5) GPIO_ACTIVE_HIGH>;
> +		regulator-boot-on;
> +		enable-active-high;
> +		status = "okay";
> +	};
> +
> +	bus@0 {
> +
> +		/* Custom pinmux configurations for 40-pin expansion header */
> +		pinmux@2430000 {
> +			status = "okay";
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&pinmux_hdr40>;
> +
> +			pinmux_hdr40: pinmux-hdr40 {
> +				pin7 {
> +					nvidia,pins = "aud_mclk_ps4";
> +					nvidia,function = "aud";
> +					nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> +					nvidia,tristate = <TEGRA_PIN_DISABLE>;
> +					nvidia,enable-input = <TEGRA_PIN_DISABLE>;
> +				};
> +				pin11 {
> +					nvidia,pins = "uart1_rts_pr4";
> +					nvidia,function = "uarta";
> +					nvidia,pull = <TEGRA_PIN_PULL_NONE>;
> +					nvidia,tristate = <TEGRA_PIN_DISABLE>;
> +					nvidia,enable-input = <TEGRA_PIN_DISABLE>;
> +				};
> +				pin12 {
> +					nvidia,pins = "dap5_sclk_pt5";
> +					nvidia,function = "i2s5";
> +					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
> +					nvidia,tristate = <TEGRA_PIN_DISABLE>;
> +					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> +				};
> +				pin35 {
> +					nvidia,pins = "dap5_fs_pu0";
> +					nvidia,function = "i2s5";
> +					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
> +					nvidia,tristate = <TEGRA_PIN_DISABLE>;
> +					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> +				};
> +				pin36 {
> +					nvidia,pins = "uart1_cts_pr5";
> +					nvidia,function = "uarta";
> +					nvidia,pull = <TEGRA_PIN_PULL_UP>;
> +					nvidia,tristate = <TEGRA_PIN_ENABLE>;
> +					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> +				};
> +				pin38 {
> +					nvidia,pins = "dap5_din_pt7";
> +					nvidia,function = "i2s5";
> +					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
> +					nvidia,tristate = <TEGRA_PIN_ENABLE>;
> +					nvidia,enable-input = <TEGRA_PIN_ENABLE>;
> +				};
> +				pin40 {
> +					nvidia,pins = "dap5_dout_pt6";
> +					nvidia,function = "i2s5";
> +					nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
> +					nvidia,tristate = <TEGRA_PIN_DISABLE>;
> +					nvidia,enable-input = <TEGRA_PIN_DISABLE>;
> +				};
> +			};
> +		};
> +
> +		/* Configure i2c bus clock to 400kHz for carrier board peripherals */
> +		i2c@3160000 {
> +			clock-frequency = <400000>;
> +			status = "okay";
> +		};
> +
> +		/* SDMMC3 for external user SD card slot with dedicated 3.3V power */
> +		mmc@3440000 {
> +			bus-width = <4>;
> +			cd-gpios = <&gpio_aon TEGRA194_AON_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
> +			disable-wp;
> +			no-1-8-v;
> +			vmmc-supply = <&vdd_3v3_sd>;
> +			status = "okay";
> +		};
> +
> +		pwm@c340000 {
> +			status = "disabled";
> +		};
> +		pwm@3280000 {
> +			status = "disabled";
> +		};
> +		pwm@32c0000 {
> +			status = "disabled";
> +		};
> +		pwm@32d0000 {
> +			status = "disabled";
> +		};
> +		pwm@32f0000 {
> +			status = "disabled";
> +		};
> +	};
> +
> +	/* Disable fan hardware not populated on SE70 carrier board */
> +	pwm-fan {
> +		status = "disabled";
> +	};
> +};
> -- 
> 2.43.0
> 
>