From: Matthias Brugger <matthias.bgg@kernel.org>
To: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
Cc: Conor Dooley <conor@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Samuel Holland <samuel.holland@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Min Lin <linmin@eswincomputing.com>,
Pritesh Patel <pritesh.patel@einfochips.com>,
Yangyu Chen <cyy@cyyself.name>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Yu Chien Peter Lin <peterlin@andestech.com>,
Charlie Jenkins <charlie@rivosinc.com>,
Kanak Shilledar <kanakshilledar@gmail.com>,
Darshan Prajapati <darshan.prajapati@einfochips.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Aradhya Bhatia <a-bhatia1@ti.com>,
rafal@milecki.pl, Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 04/10] dt-bindings: riscv: Add SiFive HiFive Premier P550 board
Date: Wed, 12 Mar 2025 13:03:09 +0100 [thread overview]
Message-ID: <Z9F3_Zb4RvHLvgSd@ziggy.stardust> (raw)
In-Reply-To: <20250311073432.4068512-5-pinkesh.vaghela@einfochips.com>
On Tue, Mar 11, 2025 at 01:04:26PM +0530, Pinkesh Vaghela wrote:
> From: Pritesh Patel <pritesh.patel@einfochips.com>
>
> Add DT binding documentation for the ESWIN EIC7700 SoC and
> HiFive Premier P550 Board
>
> Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com>
> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
> Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
> ---
> .../devicetree/bindings/riscv/eswin.yaml | 29 +++++++++++++++++++
> MAINTAINERS | 6 ++++
> 2 files changed, 35 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/riscv/eswin.yaml
>
> diff --git a/Documentation/devicetree/bindings/riscv/eswin.yaml b/Documentation/devicetree/bindings/riscv/eswin.yaml
> new file mode 100644
> index 000000000000..c603c45eef22
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/riscv/eswin.yaml
> @@ -0,0 +1,29 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/riscv/eswin.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ESWIN SoC-based boards
> +
> +maintainers:
> + - Min Lin <linmin@eswincomputing.com>
> + - Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
> + - Pritesh Patel <pritesh.patel@einfochips.com>
> +
> +description:
> + ESWIN SoC-based boards
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - sifive,hifive-premier-p550
> + - const: eswin,eic7700
That should be the other way around. You could have, let's say eic7701
with different peripherals but smae p550 IP core. I don't expect a new
eic7700 with a CPU IP other then p550.
Regards,
Matthias
> +
> +additionalProperties: true
> +
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 25c86f47353d..901d0e0adb25 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8572,6 +8572,12 @@ L: linux-can@vger.kernel.org
> S: Maintained
> F: drivers/net/can/usb/esd_usb.c
>
> +ESWIN DEVICETREES
> +M: Min Lin <linmin@eswincomputing.com>
> +M: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
> +M: Pritesh Patel <pritesh.patel@einfochips.com>
> +S: Maintained
> +
> ET131X NETWORK DRIVER
> M: Mark Einon <mark.einon@gmail.com>
> S: Odd Fixes
> --
> 2.25.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2025-03-12 12:03 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-11 7:34 [PATCH 00/10] Basic device tree support for ESWIN EIC7700 RISC-V SoC Pinkesh Vaghela
2025-03-11 7:34 ` [PATCH 01/10] dt-bindings: riscv: Add SiFive P550 CPU compatible Pinkesh Vaghela
2025-03-11 18:14 ` Conor Dooley
2025-03-11 7:34 ` [PATCH 02/10] riscv: Add Kconfig option for ESWIN platforms Pinkesh Vaghela
2025-03-11 18:14 ` Conor Dooley
2025-03-11 7:34 ` [PATCH 03/10] dt-bindings: vendor-prefixes: add eswin Pinkesh Vaghela
2025-03-11 18:15 ` Conor Dooley
2025-03-11 7:34 ` [PATCH 04/10] dt-bindings: riscv: Add SiFive HiFive Premier P550 board Pinkesh Vaghela
2025-03-12 12:03 ` Matthias Brugger [this message]
2025-03-12 12:50 ` Conor Dooley
2025-03-12 12:52 ` Matthias Brugger
2025-03-12 12:55 ` Krzysztof Kozlowski
2025-03-12 14:25 ` [External] " Pinkesh Vaghela
2025-03-13 8:15 ` Samuel Holland
2025-03-13 8:39 ` Krzysztof Kozlowski
2025-03-11 7:34 ` [PATCH 05/10] dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility Pinkesh Vaghela
2025-03-11 18:11 ` Conor Dooley
2025-03-12 13:51 ` [External] " Pinkesh Vaghela
2025-03-11 7:34 ` [PATCH 06/10] cache: sifive_ccache: Add ESWIN EIC7700 support Pinkesh Vaghela
2025-03-11 7:34 ` [PATCH 07/10] dt-bindings: interrupt-controller: Add ESWIN EIC7700 PLIC Pinkesh Vaghela
2025-03-11 18:12 ` Conor Dooley
2025-03-11 7:34 ` [PATCH 08/10] dt-bindings: timer: Add ESWIN EIC7700 CLINT Pinkesh Vaghela
2025-03-11 18:12 ` Conor Dooley
2025-03-11 7:34 ` [PATCH 09/10] riscv: dts: add initial support for EIC7700 SoC Pinkesh Vaghela
2025-03-11 7:34 ` [PATCH 10/10] riscv: dts: eswin: add HiFive Premier P550 board device tree Pinkesh Vaghela
2025-03-11 18:07 ` [PATCH 00/10] Basic device tree support for ESWIN EIC7700 RISC-V SoC Conor Dooley
2025-03-20 10:39 ` Pinkesh Vaghela
2025-03-20 12:00 ` Conor Dooley
2025-03-21 9:37 ` Krzysztof Kozlowski
2025-03-21 11:29 ` Pinkesh Vaghela
2025-03-21 13:41 ` Conor Dooley
2025-03-21 11:25 ` Pinkesh Vaghela
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