From: Sunil V L <sunilvl@ventanamicro.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: "Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Frank Rowand" <frowand.list@gmail.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Marc Zyngier" <maz@kernel.org>, "Björn Töpel" <bjorn@kernel.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Saravana Kannan" <saravanak@google.com>,
"Anup Patel" <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v11 12/14] irqchip/riscv-aplic: Add support for MSI-mode
Date: Tue, 24 Oct 2023 11:01:37 +0530 [thread overview]
Message-ID: <ZTdWueglO1iXuS1D@sunil-laptop> (raw)
In-Reply-To: <20231023172800.315343-13-apatel@ventanamicro.com>
Hi Anup,
On Mon, Oct 23, 2023 at 10:57:58PM +0530, Anup Patel wrote:
> The RISC-V advanced platform-level interrupt controller (APLIC) has
> two modes of operation: 1) Direct mode and 2) MSI mode.
> (For more details, refer https://github.com/riscv/riscv-aia)
>
> In APLIC MSI-mode, wired interrupts are forwared as message signaled
> interrupts (MSIs) to CPUs via IMSIC.
>
> We extend the existing APLIC irqchip driver to support MSI-mode for
> RISC-V platforms having both wired interrupts and MSIs.
>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
[...]
> +int aplic_msi_setup(struct device *dev, void __iomem *regs)
> +{
> + const struct imsic_global_config *imsic_global;
> + struct irq_domain *irqdomain;
> + struct aplic_priv *priv;
> + struct aplic_msicfg *mc;
> + phys_addr_t pa;
> + int rc;
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + rc = aplic_setup_priv(priv, dev, regs);
> + if (!priv) {
This should check rc instead of priv.
> + dev_err(dev, "failed to create APLIC context\n");
> + return rc;
> + }
> + mc = &priv->msicfg;
> +
> + /*
> + * The APLIC outgoing MSI config registers assume target MSI
> + * controller to be RISC-V AIA IMSIC controller.
> + */
> + imsic_global = imsic_get_global_config();
> + if (!imsic_global) {
> + dev_err(dev, "IMSIC global config not found\n");
> + return -ENODEV;
For all error return paths, priv should be freed.
Thanks,
Sunil
next prev parent reply other threads:[~2023-10-24 5:31 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 17:27 [PATCH v11 00/14] Linux RISC-V AIA Support Anup Patel
2023-10-23 17:27 ` [PATCH v11 01/14] RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs Anup Patel
2023-10-24 11:55 ` Björn Töpel
2023-10-24 12:07 ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 02/14] of: property: Add fw_devlink support for msi-parent Anup Patel
2023-10-23 17:27 ` [PATCH v11 03/14] irqchip/sifive-plic: Fix syscore registration for multi-socket systems Anup Patel
2023-10-23 17:27 ` [PATCH v11 04/14] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2023-10-23 17:27 ` [PATCH v11 05/14] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2023-10-24 12:17 ` Andrew Jones
2023-10-23 17:27 ` [PATCH v11 06/14] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2023-10-24 12:30 ` Andrew Jones
2023-10-23 17:27 ` [PATCH v11 07/14] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2023-10-24 9:25 ` Conor Dooley
2023-10-24 12:08 ` Anup Patel
2023-10-24 13:05 ` Björn Töpel
2023-10-25 5:08 ` Anup Patel
2023-10-25 16:05 ` Björn Töpel
2023-10-25 17:25 ` Anup Patel
2023-10-26 8:51 ` Björn Töpel
2023-10-28 18:18 ` Thomas Gleixner
2023-10-28 18:34 ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 08/14] irqchip/riscv-imsic: Add support for platform MSI irqdomain Anup Patel
2023-10-25 19:56 ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 09/14] irqchip/riscv-imsic: Add support for PCI " Anup Patel
2023-10-24 13:09 ` Björn Töpel
2023-10-25 5:08 ` Anup Patel
2023-10-25 8:55 ` Björn Töpel
2023-10-28 18:36 ` Thomas Gleixner
2023-10-29 19:53 ` Björn Töpel
2023-10-25 19:59 ` Thomas Gleixner
2023-10-23 17:27 ` [PATCH v11 10/14] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2023-10-23 17:27 ` [PATCH v11 11/14] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2023-10-23 17:27 ` [PATCH v11 12/14] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2023-10-24 5:31 ` Sunil V L [this message]
2023-11-02 6:38 ` Ben
[not found] ` <210e2757.3169.18b8eb4495c.Coremail.figure1802@126.com>
2023-11-02 12:37 ` [PATCH " Anup Patel
2023-11-03 9:39 ` Ben
2023-11-03 11:04 ` Anup Patel
2023-11-04 0:58 ` Ben
2023-11-08 14:20 ` Ben
2023-11-08 14:43 ` [PATCH " Anup Patel
2023-11-08 14:51 ` Ben
2023-11-08 14:56 ` Anup Patel
2023-11-08 15:32 ` Ben
2023-11-14 9:21 ` Anup Patel
2023-10-23 17:27 ` [PATCH v11 13/14] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2023-10-23 17:28 ` [PATCH v11 14/14] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
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