Re: [PATCH v3 2/2] gpio: tegra186: Add support for Tegra410

[Jon Hunter <jonathanh@nvidia.com>]

On 10/10/2025 10:29, Kartik Rajput wrote:
> From: Prathamesh Shete <pshete@nvidia.com>
> 
> Extend the existing Tegra186 GPIO controller driver with support for
> the GPIO controller found on Tegra410. Tegra410 supports two GPIO
> controllers referred to as 'COMPUTE' and 'SYSTEM'.
> 
> Co-developed-by: Nathan Hartman <nhartman@nvidia.com>
> Signed-off-by: Nathan Hartman <nhartman@nvidia.com>
> Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
> Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
> ---
> v2 -> v3:
>          * Add a generic TEGRA_GPIO_PORT macro and use it to define
>            TEGRA410_COMPUTE_GPIO_PORT and TEGRA410_SYSTEM_GPIO_PORT.
> v1 -> v2:
>          * Move Tegra410 GPIO Ports definition to gpio-tegra186.c
>          * Rename Tegra410 Main GPIO as System GPIO.
>          * Add Compute GPIOs.
>          * Update ACPI IDs.
>          * Set instance ID as 0 for SYSTEM and COMPUTE GPIOs.
>          * Added Nathan as co-author for adding compute GPIO support
>            and renaming MAIN GPIOs as SYSTEM GPIOs.
> ---
>   drivers/gpio/gpio-tegra186.c | 82 +++++++++++++++++++++++++++++++++++-
>   1 file changed, 81 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c
> index 7ea541d6d537..c6ebe29f9cf1 100644
> --- a/drivers/gpio/gpio-tegra186.c
> +++ b/drivers/gpio/gpio-tegra186.c
> @@ -1,6 +1,6 @@
>   // SPDX-License-Identifier: GPL-2.0-only
>   /*
> - * Copyright (c) 2016-2022 NVIDIA Corporation
> + * Copyright (c) 2016-2025 NVIDIA Corporation
>    *
>    * Author: Thierry Reding <treding@nvidia.com>
>    *	   Dipen Patel <dpatel@nvidia.com>
> @@ -69,6 +69,36 @@
>   
>   #define TEGRA186_GPIO_INTERRUPT_STATUS(x) (0x100 + (x) * 4)
>   
> +/* Tegra410 GPIOs implemented by the COMPUTE GPIO controller */
> +#define TEGRA410_COMPUTE_GPIO_PORT_A 0
> +#define TEGRA410_COMPUTE_GPIO_PORT_B 1
> +#define TEGRA410_COMPUTE_GPIO_PORT_C 2
> +#define TEGRA410_COMPUTE_GPIO_PORT_D 3
> +#define TEGRA410_COMPUTE_GPIO_PORT_E 4
> +
> +#define TEGRA410_COMPUTE_GPIO(port, offset) \
> +	((TEGRA410_COMPUTE_GPIO_PORT_##port * 8) + (offset))

This macro does not appear to be used anywhere.

> +/* Tegra410 GPIOs implemented by the SYSTEM GPIO controller */
> +#define TEGRA410_SYSTEM_GPIO_PORT_A 0
> +#define TEGRA410_SYSTEM_GPIO_PORT_B 1
> +#define TEGRA410_SYSTEM_GPIO_PORT_C 2
> +#define TEGRA410_SYSTEM_GPIO_PORT_D 3
> +#define TEGRA410_SYSTEM_GPIO_PORT_E 4
> +#define TEGRA410_SYSTEM_GPIO_PORT_I 5
> +#define TEGRA410_SYSTEM_GPIO_PORT_J 6
> +#define TEGRA410_SYSTEM_GPIO_PORT_K 7
> +#define TEGRA410_SYSTEM_GPIO_PORT_L 8
> +#define TEGRA410_SYSTEM_GPIO_PORT_M 9
> +#define TEGRA410_SYSTEM_GPIO_PORT_N 10
> +#define TEGRA410_SYSTEM_GPIO_PORT_P 11
> +#define TEGRA410_SYSTEM_GPIO_PORT_Q 12
> +#define TEGRA410_SYSTEM_GPIO_PORT_R 13
> +#define TEGRA410_SYSTEM_GPIO_PORT_V 14
> +
> +#define TEGRA410_SYSTEM_GPIO(port, offset) \
> +	((TEGRA410_SYSTEM_GPIO_PORT_##port * 8) + (offset))

Same here.

Jon

-- 
nvpublic