* [PATCH v2 0/2] PCI: imx6: Add external reference clock mode support @ 2025-06-19 9:10 Richard Zhu 2025-06-19 9:10 ` [PATCH v2 1/2] dt-binding: pci-imx6: " Richard Zhu 2025-06-19 9:10 ` [PATCH v2 2/2] PCI: imx6: " Richard Zhu 0 siblings, 2 replies; 5+ messages in thread From: Richard Zhu @ 2025-06-19 9:10 UTC (permalink / raw) To: frank.li, l.stach, lpieralisi, kwilczynski, mani, robh, krzk+dt, conor+dt, bhelgaas, shawnguo, s.hauer, kernel, festevam Cc: linux-pci, linux-arm-kernel, devicetree, imx, linux-kernel On i.MX, the PCIe reference clock might come from either internal system PLL or external clock source. Add the external reference clock source for reference clock. Main change in v2: - Fix yamllint warning. - Refine the driver codes. [PATCH v2 1/2] dt-binding: pci-imx6: Add external reference clock [PATCH v2 2/2] PCI: imx6: Add external reference clock mode support Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++- drivers/pci/controller/dwc/pci-imx6.c | 22 +++++++++++++++------- 2 files changed, 21 insertions(+), 8 deletions(-) ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 1/2] dt-binding: pci-imx6: Add external reference clock mode support 2025-06-19 9:10 [PATCH v2 0/2] PCI: imx6: Add external reference clock mode support Richard Zhu @ 2025-06-19 9:10 ` Richard Zhu 2025-06-19 14:49 ` Frank Li 2025-06-19 9:10 ` [PATCH v2 2/2] PCI: imx6: " Richard Zhu 1 sibling, 1 reply; 5+ messages in thread From: Richard Zhu @ 2025-06-19 9:10 UTC (permalink / raw) To: frank.li, l.stach, lpieralisi, kwilczynski, mani, robh, krzk+dt, conor+dt, bhelgaas, shawnguo, s.hauer, kernel, festevam Cc: linux-pci, linux-arm-kernel, devicetree, imx, linux-kernel, Richard Zhu On i.MX, the PCIe reference clock might come from either internal system PLL or external clock source. Add the external reference clock source for reference clock. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index ca5f2970f217..c472a5daae6e 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -219,7 +219,12 @@ allOf: - const: pcie_bus - const: pcie_phy - const: pcie_aux - - const: ref + - description: PCIe reference clock. + oneOf: + - description: The controller might be configured clocking + coming in from either an internal system PLL or an + external clock source. + enum: [ref, gio] unevaluatedProperties: false -- 2.37.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/2] dt-binding: pci-imx6: Add external reference clock mode support 2025-06-19 9:10 ` [PATCH v2 1/2] dt-binding: pci-imx6: " Richard Zhu @ 2025-06-19 14:49 ` Frank Li 0 siblings, 0 replies; 5+ messages in thread From: Frank Li @ 2025-06-19 14:49 UTC (permalink / raw) To: Richard Zhu Cc: l.stach, lpieralisi, kwilczynski, mani, robh, krzk+dt, conor+dt, bhelgaas, shawnguo, s.hauer, kernel, festevam, linux-pci, linux-arm-kernel, devicetree, imx, linux-kernel On Thu, Jun 19, 2025 at 05:10:03PM +0800, Richard Zhu wrote: > On i.MX, the PCIe reference clock might come from either internal > system PLL or external clock source. > Add the external reference clock source for reference clock. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > index ca5f2970f217..c472a5daae6e 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > @@ -219,7 +219,12 @@ allOf: > - const: pcie_bus > - const: pcie_phy > - const: pcie_aux > - - const: ref > + - description: PCIe reference clock. > + oneOf: > + - description: The controller might be configured clocking > + coming in from either an internal system PLL or an > + external clock source. > + enum: [ref, gio] > > unevaluatedProperties: false > > -- > 2.37.1 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] PCI: imx6: Add external reference clock mode support 2025-06-19 9:10 [PATCH v2 0/2] PCI: imx6: Add external reference clock mode support Richard Zhu 2025-06-19 9:10 ` [PATCH v2 1/2] dt-binding: pci-imx6: " Richard Zhu @ 2025-06-19 9:10 ` Richard Zhu 2025-06-19 14:54 ` Frank Li 1 sibling, 1 reply; 5+ messages in thread From: Richard Zhu @ 2025-06-19 9:10 UTC (permalink / raw) To: frank.li, l.stach, lpieralisi, kwilczynski, mani, robh, krzk+dt, conor+dt, bhelgaas, shawnguo, s.hauer, kernel, festevam Cc: linux-pci, linux-arm-kernel, devicetree, imx, linux-kernel, Richard Zhu The PCI Express reference clock of i.MX9 PCIes might come from external clock source. Add the external reference clock mode support. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 5a38cfaf989b..71f318bbc254 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -149,6 +149,7 @@ struct imx_pcie { struct gpio_desc *reset_gpiod; struct clk_bulk_data *clks; int num_clks; + bool enable_ext_refclk; struct regmap *iomuxc_gpr; u16 msi_ctrl; u32 controller_id; @@ -241,6 +242,8 @@ static unsigned int imx_pcie_grp_offset(const struct imx_pcie *imx_pcie) static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie) { + bool ext = imx_pcie->enable_ext_refclk; + /* * ERR051624: The Controller Without Vaux Cannot Exit L23 Ready * Through Beacon or PERST# De-assertion @@ -259,13 +262,12 @@ static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie) IMX95_PCIE_PHY_CR_PARA_SEL, IMX95_PCIE_PHY_CR_PARA_SEL); - regmap_update_bits(imx_pcie->iomuxc_gpr, - IMX95_PCIE_PHY_GEN_CTRL, - IMX95_PCIE_REF_USE_PAD, 0); - regmap_update_bits(imx_pcie->iomuxc_gpr, - IMX95_PCIE_SS_RW_REG_0, + regmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_PHY_GEN_CTRL, + ext ? IMX95_PCIE_REF_USE_PAD : 0, + IMX95_PCIE_REF_USE_PAD); + regmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_0, IMX95_PCIE_REF_CLKEN, - IMX95_PCIE_REF_CLKEN); + ext ? 0 : IMX95_PCIE_REF_CLKEN); return 0; } @@ -1600,7 +1602,7 @@ static int imx_pcie_probe(struct platform_device *pdev) struct imx_pcie *imx_pcie; struct device_node *np; struct device_node *node = dev->of_node; - int ret, domain; + int i, ret, domain; u16 val; imx_pcie = devm_kzalloc(dev, sizeof(*imx_pcie), GFP_KERNEL); @@ -1651,6 +1653,12 @@ static int imx_pcie_probe(struct platform_device *pdev) if (imx_pcie->num_clks < 0) return dev_err_probe(dev, imx_pcie->num_clks, "failed to get clocks\n"); + for (i = 0; i < imx_pcie->num_clks; i++) { + if (strncmp(imx_pcie->clks[i].id, "ref", 3) == 0) + imx_pcie->enable_ext_refclk = false; + else + imx_pcie->enable_ext_refclk = true; + } if (imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_PHYDRV)) { imx_pcie->phy = devm_phy_get(dev, "pcie-phy"); -- 2.37.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 2/2] PCI: imx6: Add external reference clock mode support 2025-06-19 9:10 ` [PATCH v2 2/2] PCI: imx6: " Richard Zhu @ 2025-06-19 14:54 ` Frank Li 0 siblings, 0 replies; 5+ messages in thread From: Frank Li @ 2025-06-19 14:54 UTC (permalink / raw) To: Richard Zhu Cc: l.stach, lpieralisi, kwilczynski, mani, robh, krzk+dt, conor+dt, bhelgaas, shawnguo, s.hauer, kernel, festevam, linux-pci, linux-arm-kernel, devicetree, imx, linux-kernel On Thu, Jun 19, 2025 at 05:10:04PM +0800, Richard Zhu wrote: > The PCI Express reference clock of i.MX9 PCIes might come from external > clock source. Add the external reference clock mode support. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 22 +++++++++++++++------- > 1 file changed, 15 insertions(+), 7 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 5a38cfaf989b..71f318bbc254 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -149,6 +149,7 @@ struct imx_pcie { > struct gpio_desc *reset_gpiod; > struct clk_bulk_data *clks; > int num_clks; > + bool enable_ext_refclk; > struct regmap *iomuxc_gpr; > u16 msi_ctrl; > u32 controller_id; > @@ -241,6 +242,8 @@ static unsigned int imx_pcie_grp_offset(const struct imx_pcie *imx_pcie) > > static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie) > { > + bool ext = imx_pcie->enable_ext_refclk; > + > /* > * ERR051624: The Controller Without Vaux Cannot Exit L23 Ready > * Through Beacon or PERST# De-assertion > @@ -259,13 +262,12 @@ static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie) > IMX95_PCIE_PHY_CR_PARA_SEL, > IMX95_PCIE_PHY_CR_PARA_SEL); > > - regmap_update_bits(imx_pcie->iomuxc_gpr, > - IMX95_PCIE_PHY_GEN_CTRL, > - IMX95_PCIE_REF_USE_PAD, 0); > - regmap_update_bits(imx_pcie->iomuxc_gpr, > - IMX95_PCIE_SS_RW_REG_0, > + regmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_PHY_GEN_CTRL, > + ext ? IMX95_PCIE_REF_USE_PAD : 0, > + IMX95_PCIE_REF_USE_PAD); > + regmap_update_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_0, > IMX95_PCIE_REF_CLKEN, > - IMX95_PCIE_REF_CLKEN); > + ext ? 0 : IMX95_PCIE_REF_CLKEN); > > return 0; > } > @@ -1600,7 +1602,7 @@ static int imx_pcie_probe(struct platform_device *pdev) > struct imx_pcie *imx_pcie; > struct device_node *np; > struct device_node *node = dev->of_node; > - int ret, domain; > + int i, ret, domain; > u16 val; > > imx_pcie = devm_kzalloc(dev, sizeof(*imx_pcie), GFP_KERNEL); > @@ -1651,6 +1653,12 @@ static int imx_pcie_probe(struct platform_device *pdev) > if (imx_pcie->num_clks < 0) > return dev_err_probe(dev, imx_pcie->num_clks, > "failed to get clocks\n"); > + for (i = 0; i < imx_pcie->num_clks; i++) { > + if (strncmp(imx_pcie->clks[i].id, "ref", 3) == 0) > + imx_pcie->enable_ext_refclk = false; need break here, incase ref is not last one. Or: imx_pcie->enable_ext_refclk = true for (...) if (...) imx_pcie->enable_ext_refclk = false; Frank > + else > + imx_pcie->enable_ext_refclk = true; > + } > > if (imx_check_flag(imx_pcie, IMX_PCIE_FLAG_HAS_PHYDRV)) { > imx_pcie->phy = devm_phy_get(dev, "pcie-phy"); > -- > 2.37.1 > ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2025-06-19 14:54 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-06-19 9:10 [PATCH v2 0/2] PCI: imx6: Add external reference clock mode support Richard Zhu 2025-06-19 9:10 ` [PATCH v2 1/2] dt-binding: pci-imx6: " Richard Zhu 2025-06-19 14:49 ` Frank Li 2025-06-19 9:10 ` [PATCH v2 2/2] PCI: imx6: " Richard Zhu 2025-06-19 14:54 ` Frank Li
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