Re: [PATCH v4 0/2] arm64: dts: socfpga: Enable SMMU and add DMA coherency for XGMAC

[Dinh Nguyen <dinguyen@kernel.org>]

On 6/24/26 01:22, muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
> From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
> 
> This series enables the SMMU and adds DMA coherency support for the
> XGMAC nodes across the affected board device trees.
> 
> Patch 1 enables the SMMU for the SoCFPGA board device trees where it
> was missing. The SoC uses a different memory-mapped base address for
> its peripherals, which requires the SMMU to be active so that the
> Secure Device Manager (SDM) can correctly access those regions through
> address translation.
> 
> Patch 2 adds the dma-coherent property to the XGMAC nodes. The SMMU
> is enabled and transactions going through it are cache coherent.
> Adding dma-coherent prevents redundant cache flush/invalidate
> operations and potential stale data issues.
> 
> Changes in v4:
> - Remove status = "disabled" instead of setting status = "okay", as nodes
>    without a status property are enabled by default
> 
> Changes in v3:
> - Fix commit header to follow subsystem naming convention (patches 1 and 2)
> - Remove commit body line that restated the subject
> - Clarify which file had the SMMU disabled
> 
> Changes in v2:
> - Move SMMU enable into the base DTSI file instead of individual DTS files
> - Move dma-coherent property into the base DTSI file instead of individual DTS files
> - Improve commit messages and cover letter descriptions with more context on why the changes are needed
> 
> Nazim Amirul (2):
>    arm64: dts: socfpga: agilex5: Enable the SMMU
>    arm64: dts: socfpga: agilex5: Add dma-coherent to XGMAC nodes
> 
>   arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 


Applied!

Thanks,
Dinh