Re: [PATCH v4 02/15] ASoC: dt-bindings: qcom: q6dsp: add internal mi2s support

[Richard Acayan <mailingradian@gmail.com>]

On Sun, May 03, 2026 at 02:11:31PM +0200, Krzysztof Kozlowski wrote:
> On Fri, May 01, 2026 at 11:31:15AM -0400, Richard Acayan wrote:
> > The internal MI2S ports are found on devices with the internal sound
> > card for Snapdragon 660. Add support for them.
> > 
> > Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> > ---
> >  .../bindings/sound/qcom,q6dsp-lpass-ports.yaml     |  4 ++--
> >  include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 14 ++++++++++++++
> >  2 files changed, 16 insertions(+), 2 deletions(-)
> 
> Same feedback as last time. DO NOT send next versions, untill you reply
> or address the feedback.

Ok, I believe this is about [1] and [2] with reference to the patches
already in v7.1-rc1 [3].

My patches add INT0_MI2S_RX through INT6_MI2S_TX, which correspond to
q6afe port IDs 0x102e - 0x103b. Srini's patches add LPI_MI2S_RX_0
through LPI_MI2S_TX_4, but no q6afe port IDs.

I asked if the LPI_MI2S ports have q6afe port IDs to check if we're
referring to the same ports, but apparently q6afe is too old to have it
[4]:

	> Is the LPI MI2S on Q6AFE? I don't see the AFE port ID.
	I think the older SOCs did not have this I guess,

Even if there's already an allocation of dt-bindings ports for LPI_MI2S,
they can't just be reused for INT_MI2S. There are allegedly INT5_MI2S
and INT6_MI2S (each RX and TX) but LPI_MI2S only counts to 4.

[1] https://lore.kernel.org/r/20260305-fluorescent-gainful-unicorn-4f8d7e@quoll/
[2] https://lore.kernel.org/r/20260305-gigantic-gay-boar-86db8a@quoll/
[3] https://lore.kernel.org/r/20260402081118.348071-1-srinivas.kandagatla@oss.qualcomm.com/
[4] https://lore.kernel.org/r/23434dcf-5f45-4d16-95fb-a13021331de6@oss.qualcomm.com/