* [PATCH v2 1/4] dt-bindings: vendor-prefixes: Add IMDT
2026-05-05 20:09 [PATCH v2 0/4] arm64: dts: qcom: Add IMDT QCS8550 SBC William Bright
@ 2026-05-05 20:09 ` William Bright
2026-05-06 7:41 ` Krzysztof Kozlowski
2026-05-05 20:09 ` [PATCH v2 2/4] dt-bindings: qcom: Document IMDT QCS8550 SBC and SoM William Bright
` (2 subsequent siblings)
3 siblings, 1 reply; 8+ messages in thread
From: William Bright @ 2026-05-05 20:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio
Cc: devicetree, linux-kernel, linux-arm-msm, William Bright
Add IMDT (IMD Technologies Ltd) to the vendor prefixes
list.
Signed-off-by: William Bright <william.bright@imd-tec.com>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index ee7fd3cfe203..2db12a1cb6e1 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -769,6 +769,8 @@ patternProperties:
description: ILI Technology Corporation (ILITEK)
"^imagis,.*":
description: Imagis Technologies Co., Ltd.
+ "^imdt,.*":
+ description: IMD Technologies Ltd.
"^img,.*":
description: Imagination Technologies Ltd.
"^imi,.*":
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2 1/4] dt-bindings: vendor-prefixes: Add IMDT
2026-05-05 20:09 ` [PATCH v2 1/4] dt-bindings: vendor-prefixes: Add IMDT William Bright
@ 2026-05-06 7:41 ` Krzysztof Kozlowski
0 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2026-05-06 7:41 UTC (permalink / raw)
To: William Bright
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, devicetree, linux-kernel, linux-arm-msm
On Tue, May 05, 2026 at 09:09:51PM +0100, William Bright wrote:
> Add IMDT (IMD Technologies Ltd) to the vendor prefixes
> list.
One line. Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597
>
> Signed-off-by: William Bright <william.bright@imd-tec.com>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> index ee7fd3cfe203..2db12a1cb6e1 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> @@ -769,6 +769,8 @@ patternProperties:
> description: ILI Technology Corporation (ILITEK)
> "^imagis,.*":
> description: Imagis Technologies Co., Ltd.
> + "^imdt,.*":
Domain is imd-tec, so that is your prefix.
> + description: IMD Technologies Ltd.
> "^img,.*":
> description: Imagination Technologies Ltd.
> "^imi,.*":
>
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 2/4] dt-bindings: qcom: Document IMDT QCS8550 SBC and SoM
2026-05-05 20:09 [PATCH v2 0/4] arm64: dts: qcom: Add IMDT QCS8550 SBC William Bright
2026-05-05 20:09 ` [PATCH v2 1/4] dt-bindings: vendor-prefixes: Add IMDT William Bright
@ 2026-05-05 20:09 ` William Bright
2026-05-05 20:09 ` [PATCH v2 3/4] arm64: dts: qcom: Add IMDT QCS8550 SoM William Bright
2026-05-05 20:09 ` [PATCH v2 4/4] arm64: dts: qcom: Add IMDT QCS8550 SBC William Bright
3 siblings, 0 replies; 8+ messages in thread
From: William Bright @ 2026-05-05 20:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio
Cc: devicetree, linux-kernel, linux-arm-msm, William Bright
Document the IMDT QCS8550 SBC which consists of an IMDT QCS8550 SoM
soldered onto an IMDT QCS8550 carrier board.
The IMDT QCS8550 SoM consists of a QCS8550, UFS and PMICs.
Signed-off-by: William Bright <william.bright@imd-tec.com>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index cc29b06621a9..97735d31f1cf 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -1073,6 +1073,13 @@ properties:
- sony,pdx234
- const: qcom,sm8550
+ - items:
+ - enum:
+ - imdt,qcs8550-sbc
+ - const: imdt,qcs8550-som
+ - const: qcom,qcs8550
+ - const: qcom,sm8550
+
- items:
- enum:
- qcom,qcs8550-aim300-aiot
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 3/4] arm64: dts: qcom: Add IMDT QCS8550 SoM
2026-05-05 20:09 [PATCH v2 0/4] arm64: dts: qcom: Add IMDT QCS8550 SBC William Bright
2026-05-05 20:09 ` [PATCH v2 1/4] dt-bindings: vendor-prefixes: Add IMDT William Bright
2026-05-05 20:09 ` [PATCH v2 2/4] dt-bindings: qcom: Document IMDT QCS8550 SBC and SoM William Bright
@ 2026-05-05 20:09 ` William Bright
2026-05-05 20:09 ` [PATCH v2 4/4] arm64: dts: qcom: Add IMDT QCS8550 SBC William Bright
3 siblings, 0 replies; 8+ messages in thread
From: William Bright @ 2026-05-05 20:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio
Cc: devicetree, linux-kernel, linux-arm-msm, William Bright
The IMDT QCS8550 SoM is a System-on-Module from IMD Technologies Ltd
built around the Qualcomm QCS8550 SoC. It is intended to be soldered
onto a carrier board that supplies VPH_PWR and exposes the off-module
peripherals.
Add qcs8550-imdt-som.dtsi describing the SoM's PMICs (PM8550,
PM8550VE, PM8550VS, PMK8550) and the apps_rsc PMIC outputs.
Compared to other SM8550/QCS8550 boards, this SoM excludes the
PM8550B charger PMIC.
Assisted-by: Claude:claude-opus-4.7
Signed-off-by: William Bright <william.bright@imd-tec.com>
---
arch/arm64/boot/dts/qcom/qcs8550-imdt-som.dtsi | 319 +++++++++++++++++++++++++
1 file changed, 319 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-imdt-som.dtsi b/arch/arm64/boot/dts/qcom/qcs8550-imdt-som.dtsi
new file mode 100644
index 000000000000..816cbd254dea
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-imdt-som.dtsi
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2026 IMD Technologies Ltd
+ */
+
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "qcs8550.dtsi"
+#include "pm8550.dtsi"
+#define PMK8550VE_SID 5
+#include "pm8550ve.dtsi"
+#include "pm8550vs.dtsi"
+#include "pmk8550.dtsi"
+
+&apps_rsc {
+ regulators-0 {
+ compatible = "qcom,pm8550-rpmh-regulators";
+ qcom,pmic-id = "b";
+
+ vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>;
+ vdd-l2-l13-l14-supply = <&vreg_bob1>;
+ vdd-l3-supply = <&vreg_s4g_1p25>;
+ vdd-l5-l16-supply = <&vreg_bob1>;
+ vdd-l6-l7-supply = <&vreg_bob1>;
+ vdd-l8-l9-supply = <&vreg_bob1>;
+ vdd-l11-supply = <&vreg_s4g_1p25>;
+ vdd-l12-supply = <&vreg_s6g_1p86>;
+ vdd-l15-supply = <&vreg_s6g_1p86>;
+ vdd-l17-supply = <&vreg_bob2>;
+
+ /*
+ * PMIC outputs whose testpoints lack capacitors are
+ * omitted to prevent accidental use:
+ * L1B_1P8, L4B_1P8, L6B_1P8, L7B_1P8, L8B_1P8,
+ * L13B_3P0, L14B_3P2.
+ * Other outputs are unused.
+ */
+ vreg_bob1: bob1 {
+ regulator-name = "vreg_bob1";
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_bob2: bob2 {
+ regulator-name = "vreg_bob2";
+ regulator-min-microvolt = <2720000>;
+ regulator-max-microvolt = <3960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5b_3p1: ldo5 {
+ regulator-name = "vreg_l5b_3p1";
+ regulator-min-microvolt = <3104000>;
+ regulator-max-microvolt = <3104000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l15b_1p8: ldo15 {
+ regulator-name = "vreg_l15b_1p8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l17b_2p5: ldo17 {
+ regulator-name = "vreg_l17b_2p5";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <2504000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-1 {
+ compatible = "qcom,pm8550vs-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-l1-supply = <&vreg_s4g_1p25>;
+ vdd-l2-supply = <&vreg_s4e_0p95>;
+ vdd-l3-supply = <&vreg_s4e_0p95>;
+
+ vreg_l3c_0p9: ldo3 {
+ regulator-name = "vreg_l3c_0p9";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-2 {
+ compatible = "qcom,pm8550vs-rpmh-regulators";
+ qcom,pmic-id = "d";
+
+ vdd-l1-supply = <&vreg_s4e_0p95>;
+ vdd-l2-supply = <&vreg_s4e_0p95>;
+ vdd-l3-supply = <&vreg_s4e_0p95>;
+
+ vreg_l1d_0p88: ldo1 {
+ regulator-name = "vreg_l1d_0p88";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ /* ldo2 supplies SM8550 VDD_LPI_MX */
+ };
+
+ regulators-3 {
+ compatible = "qcom,pm8550vs-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vdd-l1-supply = <&vreg_s4e_0p95>;
+ vdd-l2-supply = <&vreg_s4e_0p95>;
+ vdd-l3-supply = <&vreg_s4g_1p25>;
+
+ vreg_s4e_0p95: smps4 {
+ regulator-name = "vreg_s4e_0p95";
+ regulator-min-microvolt = <904000>;
+ regulator-max-microvolt = <984000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s5e_1p08: smps5 {
+ regulator-name = "vreg_s5e_1p08";
+ regulator-min-microvolt = <1080000>;
+ regulator-max-microvolt = <1120000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1e_0p88: ldo1 {
+ regulator-name = "vreg_l1e_0p88";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2e_0p9: ldo2 {
+ regulator-name = "vreg_l2e_0p9";
+ regulator-min-microvolt = <904000>;
+ regulator-max-microvolt = <970000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3e_1p2: ldo3 {
+ regulator-name = "vreg_l3e_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-4 {
+ compatible = "qcom,pm8550ve-rpmh-regulators";
+ qcom,pmic-id = "f";
+
+ vdd-l1-supply = <&vreg_s4e_0p95>;
+ vdd-l2-supply = <&vreg_s4e_0p95>;
+ vdd-l3-supply = <&vreg_s4e_0p95>;
+
+ vreg_s4f_0p5: smps4 {
+ regulator-name = "vreg_s4f_0p5";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <700000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1f_0p9: ldo1 {
+ regulator-name = "vreg_l1f_0p9";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l2f_0p88: ldo2 {
+ regulator-name = "vreg_l2f_0p88";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3f_0p88: ldo3 {
+ regulator-name = "vreg_l3f_0p88";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ regulators-5 {
+ compatible = "qcom,pm8550vs-rpmh-regulators";
+ qcom,pmic-id = "g";
+
+ vdd-l1-supply = <&vreg_s4g_1p25>;
+ vdd-l2-supply = <&vreg_s4g_1p25>;
+ vdd-l3-supply = <&vreg_s4g_1p25>;
+
+ vreg_s1g_1p25: smps1 {
+ regulator-name = "vreg_s1g_1p25";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s2g_0p85: smps2 {
+ regulator-name = "vreg_s2g_0p85";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s3g_0p8: smps3 {
+ regulator-name = "vreg_s3g_0p8";
+ regulator-min-microvolt = <300000>;
+ regulator-max-microvolt = <1004000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s4g_1p25: smps4 {
+ regulator-name = "vreg_s4g_1p25";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1352000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s5g_0p85: smps5 {
+ regulator-name = "vreg_s5g_0p85";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1004000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s6g_1p86: smps6 {
+ regulator-name = "vreg_s6g_1p86";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1g_1p2: ldo1 {
+ regulator-name = "vreg_l1g_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3g_1p2: ldo3 {
+ regulator-name = "vreg_l3g_1p2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-allow-set-load;
+ regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+&pm8550vs_c {
+ status = "okay";
+};
+
+&pm8550vs_d {
+ status = "okay";
+};
+
+&pm8550vs_d_gpios {
+ status = "okay";
+};
+
+&pm8550vs_e {
+ status = "okay";
+};
+
+&pm8550vs_g {
+ status = "okay";
+};
+
+&sleep_clk {
+ clock-frequency = <32764>;
+};
+
+&xo_board {
+ clock-frequency = <76800000>;
+};
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 4/4] arm64: dts: qcom: Add IMDT QCS8550 SBC
2026-05-05 20:09 [PATCH v2 0/4] arm64: dts: qcom: Add IMDT QCS8550 SBC William Bright
` (2 preceding siblings ...)
2026-05-05 20:09 ` [PATCH v2 3/4] arm64: dts: qcom: Add IMDT QCS8550 SoM William Bright
@ 2026-05-05 20:09 ` William Bright
2026-05-06 7:53 ` Krzysztof Kozlowski
3 siblings, 1 reply; 8+ messages in thread
From: William Bright @ 2026-05-05 20:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio
Cc: devicetree, linux-kernel, linux-arm-msm, William Bright
The IMDT QCS8550 SBC is a two-board design from IMD Technologies Ltd
built around the Qualcomm QCS8550 SoC. An IMDT QCS8550 SoM is soldered
onto the IMDT QCS8550 carrier board that supplies VPH_PWR and exposes
the off-module peripherals.
With this DTS, the board can boot to shell with a UFS rootfs with
debugging through uart7. USB and ethernet also are fully functional.
Features enabled are:
- On-board regulators
- uSD
- UART
- UFS
- PCIe0
- PCIe1
- USB (gadget only)
- Ethernet via LAN7430 (PCIe1)
- ADSP, CDSP
Assisted-by: Claude:claude-opus-4.7
Signed-off-by: William Bright <william.bright@imd-tec.com>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/qcs8550-imdt-sbc.dts | 827 ++++++++++++++++++++++++++
2 files changed, 828 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 88c5c0c1cb8e..d38fb3c43c13 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -181,6 +181,7 @@ qcs8300-ride-el2-dtbs := qcs8300-ride.dtb monaco-el2.dtbo
dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride-el2.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb
+dtb-$(CONFIG_ARCH_QCOM) += qcs8550-imdt-sbc.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb
diff --git a/arch/arm64/boot/dts/qcom/qcs8550-imdt-sbc.dts b/arch/arm64/boot/dts/qcom/qcs8550-imdt-sbc.dts
new file mode 100644
index 000000000000..d8ed92e746a2
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qcs8550-imdt-sbc.dts
@@ -0,0 +1,827 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2026 IMD Technologies Ltd
+ */
+
+/dts-v1/;
+
+#include "qcs8550-imdt-som.dtsi"
+
+/ {
+ model = "IMDT QCS8550 SBC";
+ compatible = "imdt,qcs8550-sbc", "imdt,qcs8550-som",
+ "qcom,qcs8550", "qcom,sm8550";
+ chassis-type = "embedded";
+
+ aliases {
+ serial0 = &uart7;
+ serial1 = &uart14;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ backlight: backlight {
+ compatible = "gpio-backlight";
+ gpios = <&pm8550_gpios 6 GPIO_ACTIVE_HIGH>;
+ default-on;
+ };
+
+ cam_1v2_reg: regulator-cam-1v2 {
+ compatible = "regulator-fixed";
+ regulator-name = "cam_1v2_reg";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ vin-supply = <&hr_cam_pwr>;
+ };
+
+ cam_1v8_reg: regulator-cam-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "cam_1v8_reg";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&hr_cam_pwr>;
+ };
+
+ cam_2v8_reg: regulator-cam-2v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "cam_2v8_reg";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ vin-supply = <&hr_cam_pwr>;
+ };
+
+ cam_3v3_reg: regulator-cam-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "cam_3v3_reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&hr_cam_pwr>;
+ };
+
+ display_panel_pwr_en: regulator-display-panel-en {
+ compatible = "regulator-fixed";
+ regulator-name = "display_panel_pwr_en";
+ regulator-min-microvolt = <8000000>;
+ regulator-max-microvolt = <8000000>;
+ startup-delay-us = <10000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&panel_en_default>;
+
+ gpio = <&tlmm 123 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ vin-supply = <&som_vph_pwr>;
+ };
+
+ /* 5V VIN to backlight LED driver PMIC */
+ dsi_5v_en: regulator-dsi-5v-en {
+ compatible = "regulator-fixed";
+ regulator-name = "dsi_5v_en";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&dsi_5v_en_default>;
+
+ gpio = <&tlmm 140 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ vin-supply = <&som_vph_pwr>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ /* Enables 1V2, 1V8_CAM and 3V3_CAM */
+ hr_cam_pwr: regulator-hr-cam-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "hr_cam_pwr";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&hr_cam_en_default>;
+
+ gpio = <&tlmm 146 GPIO_ACTIVE_LOW>;
+
+ vin-supply = <&som_vph_pwr>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ /* Enables V2MB_3V8 and V2ME_3V3 */
+ m2_pd_pwr: regulator-m2-pd-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "m2_pd_pwr";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&m2_pd_en_default>;
+
+ gpio = <&tlmm 144 GPIO_ACTIVE_LOW>;
+
+ vin-supply = <&som_vph_pwr>;
+
+ regulator-always-on;
+ regulator-boot-on;
+
+ gpio-open-drain;
+ };
+
+ per_1v8_reg: regulator-per-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "per_1v8_reg";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&per_pwr>;
+ };
+
+ per_3v3_reg: regulator-per-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "per_3v3_reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&per_pwr>;
+ };
+
+ per_5v_reg: regulator-per-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "per_5v_reg";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&per_pwr>;
+ };
+
+ /* Enables 5V_PER, 3V3_PER and 1V8_PER */
+ per_pwr: regulator-per-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "per_pwr";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_per_en_default>;
+
+ gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ vin-supply = <&som_vph_pwr>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ sdhci_2_vqmmc: regulator-sdhci-2-vqmmc {
+ compatible = "regulator-gpio";
+
+ regulator-name = "sdhci_2_vqmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-type = "voltage";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_vset_default>;
+
+ gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ gpios-states = <0>;
+ states = <3300000 0>,
+ <1800000 1>;
+
+ startup-delay-us = <10000>;
+ };
+
+ sdhci_4_vqmmc: regulator-sdhci-4-vqmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "sdhci_4_vqmmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ som_vph_pwr: regulator-som-vph-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "som_vph_pwr";
+ regulator-min-microvolt = <3900000>;
+ regulator-max-microvolt = <3900000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vph_pwr: regulator-vph-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_sd_3v3_reg: regulator-vsys-sd-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_sd_3v3_reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_wlan_3v3_reg: regulator-vsys-wlan-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_wlan_3v3_reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ /*
+ * NXP IW416 chip enables: PMIC_EN (master) and WLAN_EN.
+ * Held asserted (low) before SDHC4 powers up, then
+ * released after vmmc/vqmmc are stable.
+ */
+ reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>,
+ <&tlmm 5 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <50>;
+ };
+};
+
+&apps_rsc {
+ regulators-0 {
+ vdd-bob1-supply = <&vph_pwr>;
+ vdd-bob2-supply = <&vph_pwr>;
+ };
+
+ regulators-3 {
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ };
+
+ regulators-4 {
+ vdd-s4-supply = <&vph_pwr>;
+ };
+
+ regulators-5 {
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+ };
+};
+
+&gpi_dma1 {
+ status = "okay";
+};
+
+&gpu {
+ status = "okay";
+};
+
+&gpu_zap_shader {
+ firmware-name = "qcom/sm8550/a740_zap.mbn";
+ /* Zap shader doesn't load so is disabled */
+ status = "disabled";
+};
+
+&i2c_master_hub_0 {
+ status = "okay";
+};
+
+&i2c_hub_2 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ ptn3222: redriver@43 {
+ compatible = "nxp,ptn3222";
+ reg = <0x43>;
+ #phy-cells = <0>;
+
+ vdd1v8-supply = <&vreg_l15b_1p8>;
+ vdd3v3-supply = <&vreg_l5b_3p1>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&eusb2_repeater_reset_default>;
+
+ reset-gpios = <&pm8550vs_d_gpios 4 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&ipa {
+ qcom,gsi-loader = "self";
+ memory-region = <&ipa_fw_mem>;
+ firmware-name = "qcom/sm8550/ipa_fws.mbn";
+ status = "okay";
+};
+
+&iris {
+ status = "okay";
+};
+
+&lpass_rxmacro {
+ status = "disabled";
+};
+
+&lpass_tlmm {
+ status = "disabled";
+};
+
+&lpass_txmacro {
+ status = "disabled";
+};
+
+&lpass_vamacro {
+ status = "disabled";
+};
+
+&lpass_wsa2macro {
+ status = "disabled";
+};
+
+&lpass_wsamacro {
+ status = "disabled";
+};
+
+&pcie0 {
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
+
+ /*
+ * pcie0 hosts the M.2 Key-E slot. Apply the SDIO reset
+ * de-assert here so any module's chip enable is settled
+ * before pcie0 trains its link.
+ */
+ pinctrl-0 = <&pcie0_default_state>, <&m2e_sdio_resetn_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie0_phy {
+ vdda-phy-supply = <&vreg_l1e_0p88>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
+&pcie1 {
+ wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+ perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
+
+ /*
+ * pcie_switch_sel_default and gbe_reset_default are board-init
+ * lines that must be stable before pcie1 trains its link: the
+ * PCIe switch needs its mode-select strap settled, and the
+ * downstream LAN743x must be out of reset to enumerate.
+ * Applying them via pcie1's pinctrl-0 fires them during
+ * qcom-pcie probe, before bus enumeration.
+ */
+ pinctrl-0 = <&pcie1_default_state>,
+ <&pcie_switch_sel_default>,
+ <&gbe_reset_default>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pcie1_phy {
+ vdda-phy-supply = <&vreg_l3c_0p9>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+ vdda-qref-supply = <&vreg_l1e_0p88>;
+
+ status = "okay";
+};
+
+&pm8550_gpios {
+ sd_card_detect_default: sd-card-detect-default-state {
+ pins = "gpio12";
+ function = "normal";
+ input-enable;
+ output-disable;
+ bias-disable;
+ power-source = <1>; /* 1.8 V */
+ };
+};
+
+&pm8550vs_d_gpios {
+ eusb2_repeater_reset_default: eusb2-repeater-reset-default-state {
+ pins = "gpio4";
+ function = "normal";
+
+ input-enable;
+ output-enable;
+ bias-disable;
+
+ drive-push-pull;
+ power-source = <1>; /* 1.8V */
+ qcom,drive-strength = <3>;
+ };
+};
+
+&pmk8550_gpios {
+ pmk8550_sleep_clk: sleep-clk-state {
+ pins = "gpio3";
+ function = "func1";
+ input-disable;
+ output-enable;
+ bias-disable;
+ power-source = <1>; /* 1.8 V */
+ };
+};
+
+&pon_pwrkey {
+ status = "okay";
+};
+
+&pon_resin {
+ linux,code = <KEY_VOLUMEDOWN>;
+
+ status = "okay";
+};
+
+&qupv3_id_0 {
+ status = "okay";
+};
+
+&qupv3_id_1 {
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/sm8550/adsp.mbn",
+ "qcom/sm8550/adsp_dtb.mbn";
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/sm8550/cdsp.mbn",
+ "qcom/sm8550/cdsp_dtb.mbn";
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ firmware-name = "qcom/sm8550/modem.mbn",
+ "qcom/sm8550/modem_dtb.mbn";
+ status = "okay";
+};
+
+&sdc2_default {
+ clk-pins {
+ drive-strength = <16>;
+ };
+
+ cmd-pins {
+ /delete-property/ bias-pull-up;
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ data-pins {
+ /delete-property/ bias-pull-up;
+ bias-disable;
+ drive-strength = <16>;
+ };
+};
+
+&sdhc_2 {
+ cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>;
+
+ pinctrl-0 = <&sdc2_default>, <&sd_card_detect_default>;
+ pinctrl-1 = <&sdc2_default>, <&sd_card_detect_default>;
+ pinctrl-names = "default", "sleep";
+
+ vmmc-supply = <&vsys_sd_3v3_reg>;
+ vqmmc-supply = <&sdhci_2_vqmmc>;
+
+ bus-width = <4>;
+ no-sdio;
+ no-mmc;
+
+ status = "okay";
+};
+
+&tlmm {
+ /* Reserved I/Os for NFC */
+ gpio-reserved-ranges = <32 8>;
+
+ bt_default: bt-default-state {
+ bt-en-pins {
+ pins = "gpio81";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ sw-ctrl-pins {
+ pins = "gpio82";
+ function = "gpio";
+ bias-pull-down;
+ };
+ };
+
+ dsi_5v_en_default: dsi-5v-en-default-state {
+ pins = "gpio140";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ goodix_int_default: goodix-int-default-state {
+ goodix-int-pins {
+ pins = "gpio88";
+ function = "gpio";
+ bias-disable;
+ };
+ };
+
+ goodix_reset_default: goodix-reset-default-state {
+ goodix-reset-pins {
+ pins = "gpio122";
+ function = "gpio";
+ drive-strength = <8>;
+ drive-open-drain;
+ bias-disable;
+ };
+ };
+
+ hr_cam_en_default: hr-cam-en-default-state {
+ hr-cam-en-pins {
+ pins = "gpio146";
+ function = "gpio";
+ drive-strength = <16>;
+ };
+ };
+
+ lt9611_irq_pin: lt9611-irq-state {
+ pins = "gpio8";
+ function = "gpio";
+ bias-disable;
+ };
+
+ lt9611_rst_pin: lt9611-rst-state {
+ pins = "gpio7";
+ function = "gpio";
+ output-high;
+ };
+
+ m2_pd_en_default: m2-pd-en-default-state {
+ m2-pd-en-pins {
+ pins = "gpio144";
+ function = "gpio";
+ drive-strength = <16>;
+ drive-open-drain;
+ };
+ };
+
+ panel_en_default: panel-en-default-state {
+ pins = "gpio123";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ panel_reset_default: panel-reset-default-state {
+ pins = "gpio133";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-disable;
+ drive-open-drain;
+ };
+
+ pwr_per_en_default: pwr-per-en-default-state {
+ pwr-per-en-pins {
+ pins = "gpio142";
+ function = "gpio";
+ drive-strength = <16>;
+ };
+ };
+
+ sd_vset_default: sd-vset-default-state {
+ sd-vset-pins {
+ pins = "gpio4";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <16>;
+ };
+ };
+
+ sdc4_default: sdc4-default-state {
+ clk-pins {
+ pins = "gpio50";
+ function = "sdc4_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ cmd-pins {
+ pins = "gpio51";
+ function = "sdc4_cmd";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ data0-pins {
+ pins = "gpio89";
+ function = "sdc40";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ data1-pins {
+ pins = "gpio90";
+ function = "sdc41";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ data2-pins {
+ pins = "gpio48";
+ function = "sdc42";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ data3-pins {
+ pins = "gpio49";
+ function = "sdc43";
+ bias-disable;
+ drive-strength = <16>;
+ };
+ };
+
+ sdc4_sleep: sdc4-sleep-state {
+ clk-pins {
+ pins = "gpio50";
+ function = "sdc4_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ cmd-pins {
+ pins = "gpio51";
+ function = "sdc4_cmd";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ data0-pins {
+ pins = "gpio89";
+ function = "sdc40";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ data1-pins {
+ pins = "gpio90";
+ function = "sdc41";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ data2-pins {
+ pins = "gpio48";
+ function = "sdc42";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ data3-pins {
+ pins = "gpio49";
+ function = "sdc43";
+ bias-disable;
+ drive-strength = <2>;
+ };
+ };
+
+ wcd_default: wcd-reset-n-active-state {
+ pins = "gpio108";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ output-low;
+ };
+
+ wlan_en: wlan-en-state {
+ pins = "gpio80";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ audio-speaker-dac-reset-default-state {
+ pins = "gpio171";
+ function = "gpio";
+ drive-strength = <2>;
+ drive-open-drain;
+ };
+
+ /*
+ * Drive LAN743x reset high (de-asserted) when pcie1 probes,
+ * so the PHY enumerates on the bus. Open-drain matches the
+ * board's external pull-up on the reset line.
+ */
+ gbe_reset_default: gbe-reset-default-state {
+ pins = "gpio138";
+ function = "gpio";
+ drive-strength = <2>;
+ drive-open-drain;
+ bias-disable;
+ output-high;
+ };
+
+ /*
+ * We drive this GPIO physically high on the M2 Key-E
+ * connector to make sure the module is enabled. An M2
+ * Key-E module could be using this pin as a chip enable.
+ */
+ m2e_sdio_resetn_default: m2e-sdio-resetn-default-state {
+ pins = "gpio41";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ output-high;
+ };
+
+ /* Force the on-board PCIe switch to select the GbE upstream port. */
+ pcie_switch_sel_default: pcie-switch-sel-default-state {
+ pins = "gpio16";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ output-low;
+ };
+};
+
+&uart7 {
+ status = "okay";
+};
+
+&uart14 {
+ status = "okay";
+
+ /*
+ * NXP IW416 WiFi+BT combo, BT side over UART. The btnxpuart
+ * driver auto-detects the chip ID at runtime; the upstream
+ * binding only enumerates 88w8987/8997 compatibles, so use
+ * the closest match until an iw416-bt compatible is added.
+ */
+ bluetooth {
+ compatible = "nxp,88w8987-bt";
+ fw-init-baudrate = <115200>;
+ max-speed = <3000000>;
+ firmware-name = "uartiw416_bt.bin";
+ reset-gpios = <&tlmm 160 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&ufs_mem_hc {
+ reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l17b_2p5>;
+ vcc-max-microamp = <1300000>;
+ vccq-supply = <&vreg_l1g_1p2>;
+ vccq-max-microamp = <1200000>;
+ vdd-hba-supply = <&vreg_l3g_1p2>;
+
+ status = "okay";
+};
+
+&ufs_mem_phy {
+ vdda-phy-supply = <&vreg_l1d_0p88>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
+&usb_1 {
+ /delete-property/ usb-role-switch;
+ dr_mode = "peripheral";
+
+ status = "okay";
+};
+
+&usb_1_hsphy {
+ vdd-supply = <&vreg_l1e_0p88>;
+ vdda12-supply = <&vreg_l3e_1p2>;
+
+ phys = <&ptn3222>;
+
+ status = "okay";
+};
+
+&usb_dp_qmpphy {
+ vdda-phy-supply = <&vreg_l3e_1p2>;
+ vdda-pll-supply = <&vreg_l3f_0p88>;
+
+ status = "okay";
+};
--
2.43.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2 4/4] arm64: dts: qcom: Add IMDT QCS8550 SBC
2026-05-05 20:09 ` [PATCH v2 4/4] arm64: dts: qcom: Add IMDT QCS8550 SBC William Bright
@ 2026-05-06 7:53 ` Krzysztof Kozlowski
2026-05-06 15:14 ` William Bright
0 siblings, 1 reply; 8+ messages in thread
From: Krzysztof Kozlowski @ 2026-05-06 7:53 UTC (permalink / raw)
To: William Bright
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, devicetree, linux-kernel, linux-arm-msm
On Tue, May 05, 2026 at 09:09:54PM +0100, William Bright wrote:
> +#include "qcs8550-imdt-som.dtsi"
> +
> +/ {
> + model = "IMDT QCS8550 SBC";
> + compatible = "imdt,qcs8550-sbc", "imdt,qcs8550-som",
> + "qcom,qcs8550", "qcom,sm8550";
> + chassis-type = "embedded";
> +
> + aliases {
> + serial0 = &uart7;
> + serial1 = &uart14;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + backlight: backlight {
> + compatible = "gpio-backlight";
> + gpios = <&pm8550_gpios 6 GPIO_ACTIVE_HIGH>;
> + default-on;
> + };
> +
> + cam_1v2_reg: regulator-cam-1v2 {
This is not used. Drop regulator completely.
> + compatible = "regulator-fixed";
> + regulator-name = "cam_1v2_reg";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + vin-supply = <&hr_cam_pwr>;
> + };
> +
> + cam_1v8_reg: regulator-cam-1v8 {
Same here
> + compatible = "regulator-fixed";
> + regulator-name = "cam_1v8_reg";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + vin-supply = <&hr_cam_pwr>;
> + };
> +
> + cam_2v8_reg: regulator-cam-2v8 {
Same here
> + compatible = "regulator-fixed";
> + regulator-name = "cam_2v8_reg";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + vin-supply = <&hr_cam_pwr>;
> + };
> +
> + cam_3v3_reg: regulator-cam-3v3 {
Same here
> + compatible = "regulator-fixed";
> + regulator-name = "cam_3v3_reg";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&hr_cam_pwr>;
> + };
> +
> + display_panel_pwr_en: regulator-display-panel-en {
Again, unused
> + compatible = "regulator-fixed";
> + regulator-name = "display_panel_pwr_en";
> + regulator-min-microvolt = <8000000>;
> + regulator-max-microvolt = <8000000>;
> + startup-delay-us = <10000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&panel_en_default>;
> +
> + gpio = <&tlmm 123 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + vin-supply = <&som_vph_pwr>;
> + };
> +
> + /* 5V VIN to backlight LED driver PMIC */
> + dsi_5v_en: regulator-dsi-5v-en {
Also unused.
> + compatible = "regulator-fixed";
> + regulator-name = "dsi_5v_en";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&dsi_5v_en_default>;
> +
> + gpio = <&tlmm 140 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + vin-supply = <&som_vph_pwr>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + /* Enables 1V2, 1V8_CAM and 3V3_CAM */
> + hr_cam_pwr: regulator-hr-cam-pwr {
And this becames unused after dropping fake regulators. Why don't you
have proper users of these controllable supplies?
> + compatible = "regulator-fixed";
> + regulator-name = "hr_cam_pwr";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&hr_cam_en_default>;
> +
> + gpio = <&tlmm 146 GPIO_ACTIVE_LOW>;
> +
> + vin-supply = <&som_vph_pwr>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + /* Enables V2MB_3V8 and V2ME_3V3 */
> + m2_pd_pwr: regulator-m2-pd-pwr {
> + compatible = "regulator-fixed";
> + regulator-name = "m2_pd_pwr";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&m2_pd_en_default>;
> +
> + gpio = <&tlmm 144 GPIO_ACTIVE_LOW>;
> +
> + vin-supply = <&som_vph_pwr>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> +
> + gpio-open-drain;
> + };
> +
> + per_1v8_reg: regulator-per-1v8 {
Drop node
> + compatible = "regulator-fixed";
> + regulator-name = "per_1v8_reg";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + vin-supply = <&per_pwr>;
> + };
> +
> + per_3v3_reg: regulator-per-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "per_3v3_reg";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&per_pwr>;
> + };
> +
> + per_5v_reg: regulator-per-5v {
> + compatible = "regulator-fixed";
> + regulator-name = "per_5v_reg";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&per_pwr>;
> + };
Drop all these
> +
> + /* Enables 5V_PER, 3V3_PER and 1V8_PER */
> + per_pwr: regulator-per-pwr {
> + compatible = "regulator-fixed";
> + regulator-name = "per_pwr";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pwr_per_en_default>;
> +
> + gpio = <&tlmm 142 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + vin-supply = <&som_vph_pwr>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + sdhci_2_vqmmc: regulator-sdhci-2-vqmmc {
> + compatible = "regulator-gpio";
> +
> + regulator-name = "sdhci_2_vqmmc";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-type = "voltage";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&sd_vset_default>;
> +
> + gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + gpios-states = <0>;
> + states = <3300000 0>,
> + <1800000 1>;
> +
> + startup-delay-us = <10000>;
> + };
> +
> + sdhci_4_vqmmc: regulator-sdhci-4-vqmmc {
Even more completely redundant nodes.
> + compatible = "regulator-fixed";
> + regulator-name = "sdhci_4_vqmmc";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + som_vph_pwr: regulator-som-vph-pwr {
Not used (usage by other redundant nodes does not count). Drop.
> + compatible = "regulator-fixed";
> + regulator-name = "som_vph_pwr";
> + regulator-min-microvolt = <3900000>;
> + regulator-max-microvolt = <3900000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vph_pwr: regulator-vph-pwr {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vsys_sd_3v3_reg: regulator-vsys-sd-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vsys_sd_3v3_reg";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vsys_wlan_3v3_reg: regulator-vsys-wlan-3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vsys_wlan_3v3_reg";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
Probably most of them are to be dropped :/
> +
> + wifi_pwrseq: wifi-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + /*
> + * NXP IW416 chip enables: PMIC_EN (master) and WLAN_EN.
> + * Held asserted (low) before SDHC4 powers up, then
> + * released after vmmc/vqmmc are stable.
> + */
> + reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>,
> + <&tlmm 5 GPIO_ACTIVE_LOW>;
> + post-power-on-delay-ms = <50>;
> + };
> +};
> +
> +&apps_rsc {
> + regulators-0 {
> + vdd-bob1-supply = <&vph_pwr>;
> + vdd-bob2-supply = <&vph_pwr>;
> + };
> +
> + regulators-3 {
> + vdd-s4-supply = <&vph_pwr>;
> + vdd-s5-supply = <&vph_pwr>;
> + };
> +
> + regulators-4 {
> + vdd-s4-supply = <&vph_pwr>;
> + };
> +
> + regulators-5 {
> + vdd-s1-supply = <&vph_pwr>;
> + vdd-s2-supply = <&vph_pwr>;
> + vdd-s3-supply = <&vph_pwr>;
> + vdd-s4-supply = <&vph_pwr>;
> + vdd-s5-supply = <&vph_pwr>;
> + vdd-s6-supply = <&vph_pwr>;
> + };
> +};
> +
> +&gpi_dma1 {
> + status = "okay";
> +};
> +
> +&gpu {
> + status = "okay";
> +};
> +
> +&gpu_zap_shader {
> + firmware-name = "qcom/sm8550/a740_zap.mbn";
> + /* Zap shader doesn't load so is disabled */
> + status = "disabled";
> +};
> +
> +&i2c_master_hub_0 {
> + status = "okay";
> +};
> +
> +&i2c_hub_2 {
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + ptn3222: redriver@43 {
> + compatible = "nxp,ptn3222";
> + reg = <0x43>;
> + #phy-cells = <0>;
> +
> + vdd1v8-supply = <&vreg_l15b_1p8>;
> + vdd3v3-supply = <&vreg_l5b_3p1>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&eusb2_repeater_reset_default>;
> +
> + reset-gpios = <&pm8550vs_d_gpios 4 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&ipa {
> + qcom,gsi-loader = "self";
> + memory-region = <&ipa_fw_mem>;
> + firmware-name = "qcom/sm8550/ipa_fws.mbn";
> + status = "okay";
> +};
> +
> +&iris {
> + status = "okay";
> +};
> +
> +&lpass_rxmacro {
> + status = "disabled";
> +};
> +
> +&lpass_tlmm {
> + status = "disabled";
> +};
> +
> +&lpass_txmacro {
> + status = "disabled";
> +};
> +
> +&lpass_vamacro {
> + status = "disabled";
> +};
> +
> +&lpass_wsa2macro {
> + status = "disabled";
> +};
> +
> +&lpass_wsamacro {
> + status = "disabled";
> +};
Why are all these LPASS codecs disabled?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v2 4/4] arm64: dts: qcom: Add IMDT QCS8550 SBC
2026-05-06 7:53 ` Krzysztof Kozlowski
@ 2026-05-06 15:14 ` William Bright
0 siblings, 0 replies; 8+ messages in thread
From: William Bright @ 2026-05-06 15:14 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, devicetree, linux-kernel, linux-arm-msm
On Wed, May 06, 2026 at 09:53:01AM +0200, Krzysztof Kozlowski wrote:
> On Tue, May 05, 2026 at 09:09:54PM +0100, William Bright wrote:
> > + compatible = "regulator-fixed";
> > + regulator-name = "cam_3v3_reg";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + vin-supply = <&hr_cam_pwr>;
> > + };
> > +
> > + display_panel_pwr_en: regulator-display-panel-en {
>
> Again, unused
>
For the camera regulators, I intended these to be used within device tree
overlays (I.E a DTSO would be made for an AR1335 connected to CSI0).
I don't have any camera device tree overlays in this patch series
as the only camera I have tested is the OnSemi AR1335 which isn't supported
upstream. So I will drop these camera regulator nodes.
> > + compatible = "regulator-fixed";
> > + regulator-name = "dsi_5v_en";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&dsi_5v_en_default>;
> > +
> > + gpio = <&tlmm 140 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > +
> > + vin-supply = <&som_vph_pwr>;
> > +
> > + regulator-always-on;
> > + regulator-boot-on;
> > + };
> > +
> > + /* Enables 1V2, 1V8_CAM and 3V3_CAM */
> > + hr_cam_pwr: regulator-hr-cam-pwr {
>
> And this becames unused after dropping fake regulators. Why don't you
> have proper users of these controllable supplies?
>
I will drop the on-board regulators for panels. These were intended to
be used by a panel DTSO. So I will these back in when I
submit patches for a panel DTSO for this board.
> > + per_1v8_reg: regulator-per-1v8 {
>
> Drop node
>
I have omitted that its used by the LAN7430. I will add this
usage in V3.
> > + compatible = "regulator-fixed";
> > + regulator-name = "per_1v8_reg";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + vin-supply = <&per_pwr>;
> > + };
> > +
> > + per_3v3_reg: regulator-per-3v3 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "per_3v3_reg";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + vin-supply = <&per_pwr>;
> > + };
> > +
> > + per_5v_reg: regulator-per-5v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "per_5v_reg";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + vin-supply = <&per_pwr>;
> > + };
>
> Drop all these
>
per_3v3_reg: Used by the LAN7430 but omitted by accident so I will define
that it's used by the LAN7430 in V3.
per_5v_reg: Used by onboard audio but audio support is omitted within this
patch series so I will drop this regulator.
>
> Probably most of them are to be dropped :/
>
For V3, I will go through all of these and eliminate any redundant regulators
or add where they're used.
Most of them likely became unused when removing SDHC4 whilst
preparing this patch series.
> > +&lpass_rxmacro {
> > + status = "disabled";
> > +};
> > +
> > +&lpass_tlmm {
> > + status = "disabled";
> > +};
> > +
> > +&lpass_txmacro {
> > + status = "disabled";
> > +};
> > +
> > +&lpass_vamacro {
> > + status = "disabled";
> > +};
> > +
> > +&lpass_wsa2macro {
> > + status = "disabled";
> > +};
> > +
> > +&lpass_wsamacro {
> > + status = "disabled";
> > +};
>
> Why are all these LPASS codecs disabled?
>
> Best regards,
> Krzysztof
>
No audio driver support is included in this series, but disabling the LPASS
codec nodes is unnecessary so I'll drop these changes in V3.
Many thanks for your feedback.
Best regards,
William Bright
^ permalink raw reply [flat|nested] 8+ messages in thread