* [PATCH v2 1/2] dt-bindings: pinctrl: qcom,eliza-tlmm: Merge QUP1_SE4 lane functions
2026-05-15 11:21 [PATCH v2 0/2] pinctrl: qcom: eliza: Merge QUP1_SE4 lane functions Abel Vesa
@ 2026-05-15 11:21 ` Abel Vesa
2026-05-15 11:21 ` [PATCH v2 2/2] pinctrl: qcom: eliza: Merge QUP1_SE4 lanes in groups Abel Vesa
2026-05-19 3:36 ` [PATCH v2 0/2] pinctrl: qcom: eliza: Merge QUP1_SE4 lane functions Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2026-05-15 11:21 UTC (permalink / raw)
To: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Koskovich, Konrad Dybcio
Cc: Krzysztof Kozlowski, linux-arm-msm, linux-gpio, devicetree,
linux-kernel, Abel Vesa
QUP1_SE4 uses GPIO36 and GPIO37 for two selectable lane pairs. The
previous split added one function name per lane. Since these are usually
configured in pairs in devicetree, it makes more sense to have them
grouped.
So replace the per-lane qup1_se4_l[0-3] names with names for the two
selectable pairs, qup1_se4_01 and qup1_se4_23.
Fixes: 1bd5c56253c5 ("dt-bindings: pinctrl: qcom,eliza-tlmm: Split QUP1_SE4 lanes")
Suggested-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml
index fa0177529277..aaaeca8e7bb7 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,eliza-tlmm.yaml
@@ -88,8 +88,8 @@ $defs:
qlink_little_request, qlink_wmss, qspi0, qspi_clk,
qspi_cs, qup1_se0, qup1_se1, qup1_se2, qup1_se2_l2_mira,
qup1_se2_l2_mirb, qup1_se2_l3_mira, qup1_se2_l3_mirb,
- qup1_se3, qup1_se4_l0, qup1_se4_l1, qup1_se4_l2,
- qup1_se4_l3, qup1_se5, qup1_se6, qup1_se6_l1_mira,
+ qup1_se3, qup1_se4_01, qup1_se4_23,
+ qup1_se5, qup1_se6, qup1_se6_l1_mira,
qup1_se6_l1_mirb, qup1_se6_l3_mira, qup1_se6_l3_mirb,
qup1_se7, qup1_se7_l0_mira, qup1_se7_l0_mirb,
qup1_se7_l1_mira, qup1_se7_l1_mirb, qup2_se0, qup2_se1,
--
2.54.0
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 2/2] pinctrl: qcom: eliza: Merge QUP1_SE4 lanes in groups
2026-05-15 11:21 [PATCH v2 0/2] pinctrl: qcom: eliza: Merge QUP1_SE4 lane functions Abel Vesa
2026-05-15 11:21 ` [PATCH v2 1/2] dt-bindings: pinctrl: qcom,eliza-tlmm: " Abel Vesa
@ 2026-05-15 11:21 ` Abel Vesa
2026-05-19 3:36 ` [PATCH v2 0/2] pinctrl: qcom: eliza: Merge QUP1_SE4 lane functions Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Abel Vesa @ 2026-05-15 11:21 UTC (permalink / raw)
To: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Koskovich, Konrad Dybcio
Cc: Krzysztof Kozlowski, linux-arm-msm, linux-gpio, devicetree,
linux-kernel, Abel Vesa
QUP1_SE4 uses GPIO36 and GPIO37 for two selectable lane pairs. The
current driver exposes lanes 0, 1, 2 and 3 as independent functions.
However, since these are usually configured in pairs in devicetree,
it makes more sense to merge them into groups.
So merge the per-lane functions into qup1_se4_01 and qup1_se4_23, and list
both GPIO36 and GPIO37 in each function group.
Fixes: 4f5b1f4e770b ("pinctrl: qcom: eliza: Split QUP1_SE4 lanes")
Suggested-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
drivers/pinctrl/qcom/pinctrl-eliza.c | 32 ++++++++++----------------------
1 file changed, 10 insertions(+), 22 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-eliza.c b/drivers/pinctrl/qcom/pinctrl-eliza.c
index 636442d0afed..da2fead23aa1 100644
--- a/drivers/pinctrl/qcom/pinctrl-eliza.c
+++ b/drivers/pinctrl/qcom/pinctrl-eliza.c
@@ -544,10 +544,8 @@ enum eliza_functions {
msm_mux_qup1_se2_l3_mira,
msm_mux_qup1_se2_l3_mirb,
msm_mux_qup1_se3,
- msm_mux_qup1_se4_l0,
- msm_mux_qup1_se4_l1,
- msm_mux_qup1_se4_l2,
- msm_mux_qup1_se4_l3,
+ msm_mux_qup1_se4_01,
+ msm_mux_qup1_se4_23,
msm_mux_qup1_se5,
msm_mux_qup1_se6,
msm_mux_qup1_se6_l1_mira,
@@ -996,20 +994,12 @@ static const char *const qup1_se3_groups[] = {
"gpio44", "gpio45", "gpio46", "gpio47",
};
-static const char *const qup1_se4_l0_groups[] = {
- "gpio36",
+static const char *const qup1_se4_01_groups[] = {
+ "gpio36", "gpio37",
};
-static const char *const qup1_se4_l1_groups[] = {
- "gpio37",
-};
-
-static const char *const qup1_se4_l2_groups[] = {
- "gpio37",
-};
-
-static const char *const qup1_se4_l3_groups[] = {
- "gpio36",
+static const char *const qup1_se4_23_groups[] = {
+ "gpio36", "gpio37",
};
static const char *const qup1_se5_groups[] = {
@@ -1312,10 +1302,8 @@ static const struct pinfunction eliza_functions[] = {
MSM_PIN_FUNCTION(qup1_se2_l3_mira),
MSM_PIN_FUNCTION(qup1_se2_l3_mirb),
MSM_PIN_FUNCTION(qup1_se3),
- MSM_PIN_FUNCTION(qup1_se4_l0),
- MSM_PIN_FUNCTION(qup1_se4_l1),
- MSM_PIN_FUNCTION(qup1_se4_l2),
- MSM_PIN_FUNCTION(qup1_se4_l3),
+ MSM_PIN_FUNCTION(qup1_se4_01),
+ MSM_PIN_FUNCTION(qup1_se4_23),
MSM_PIN_FUNCTION(qup1_se5),
MSM_PIN_FUNCTION(qup1_se6),
MSM_PIN_FUNCTION(qup1_se6_l1_mira),
@@ -1412,8 +1400,8 @@ static const struct msm_pingroup eliza_groups[] = {
[33] = PINGROUP(33, qup1_se1, ibi_i3c, host2wlan_sol, gcc_gp3, _, _, _, _, _, _, _),
[34] = PINGROUP(34, qup1_se1, qup1_se5, tb_trig_sdc1, ddr_bist_start, qdss_gpio_tracedata, _, _, _, _, _, _),
[35] = PINGROUP(35, qup1_se1, qup1_se5, tb_trig_sdc2, gcc_gp2, qdss_gpio_tracedata, _, _, _, _, _, _),
- [36] = PINGROUP(36, qup1_se4_l0, qup1_se4_l3, ibi_i3c, _, _, _, _, _, _, _, _),
- [37] = PINGROUP(37, qup1_se4_l1, qup1_se4_l2, ibi_i3c, _, _, _, _, _, _, _, _),
+ [36] = PINGROUP(36, qup1_se4_01, qup1_se4_23, ibi_i3c, _, _, _, _, _, _, _, _),
+ [37] = PINGROUP(37, qup1_se4_01, qup1_se4_23, ibi_i3c, _, _, _, _, _, _, _, _),
[38] = PINGROUP(38, _, _, _, _, _, _, _, _, _, _, _),
[39] = PINGROUP(39, _, _, _, _, _, _, _, _, _, _, _),
[40] = PINGROUP(40, qup1_se6, qup1_se2, qup1_se6_l3_mira, _, qdss_gpio_tracedata, gnss_adc1, ddr_pxi1, _, _, _, _),
--
2.54.0
^ permalink raw reply related [flat|nested] 4+ messages in thread