* [PATCH 01/17] dt-bindings: mmc: renesas,sdhi: Document RZ/G3L (r9a08g046) SoC
2026-05-30 16:07 [PATCH 00/17] Add Renesas RZ/G3L SD/eMMC support Biju
@ 2026-05-30 16:07 ` Biju
2026-06-02 17:06 ` Conor Dooley
2026-06-02 21:01 ` [PATCH 00/17] Add Renesas RZ/G3L SD/eMMC support Wolfram Sang
1 sibling, 1 reply; 5+ messages in thread
From: Biju @ 2026-05-30 16:07 UTC (permalink / raw)
To: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Magnus Damm
Cc: Biju Das, Wolfram Sang, linux-mmc, devicetree, linux-kernel,
linux-renesas-soc, Prabhakar Mahadev Lad, Biju Das
From: Biju Das <biju.das.jz@bp.renesas.com>
Document the RZ/G3L (r9a08g046) SDHI controller. The RZ/G3L SDHI
controller is similar to RZ/G2L but has five clocks (core, clkh,
cd, aclk, aclkm) and three resets (rst, axim, axis), so update the
clocks/clock-names maximum to 5 and resets/reset-names maximum to 3.
It has an internal divider for all modes except HS400, and a 2048-bit
divider compared to 512 on others.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../devicetree/bindings/mmc/renesas,sdhi.yaml | 101 +++++++++++++-----
1 file changed, 75 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
index 4d66966ce290..16cb395403f6 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
+++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
@@ -18,6 +18,7 @@ properties:
- renesas,sdhi-r7s9210 # SH-Mobile AG5
- renesas,sdhi-r8a73a4 # R-Mobile APE6
- renesas,sdhi-r8a7740 # R-Mobile A1
+ - renesas,sdhi-r9a08g046 # RZ/G3L
- renesas,sdhi-r9a09g057 # RZ/V2H(P)
- renesas,sdhi-sh73a0 # R-Mobile APE6
- items:
@@ -86,11 +87,11 @@ properties:
clocks:
minItems: 1
- maxItems: 4
+ maxItems: 5
clock-names:
minItems: 1
- maxItems: 4
+ maxItems: 5
dmas:
minItems: 4
@@ -116,7 +117,12 @@ properties:
maxItems: 1
resets:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
+
+ reset-names:
+ minItems: 1
+ maxItems: 3
pinctrl-0:
minItems: 1
@@ -155,60 +161,101 @@ allOf:
properties:
compatible:
contains:
- enum:
- - renesas,sdhi-r9a09g057
- - renesas,rzg2l-sdhi
+ const: renesas,sdhi-r9a08g046
then:
properties:
clocks:
items:
- description: IMCLK, SDHI channel main clock1.
- description: CLK_HS, SDHI channel High speed clock which operates
- 4 times that of SDHI channel main clock1.
+ 2 times that of SDHI channel main clock1.
- description: IMCLK2, SDHI channel main clock2. When this clock is
turned off, external SD card detection cannot be
detected.
- - description: ACLK, SDHI channel bus clock.
+ - description: ACLK/IACLKS, SDHI channel bus clock.
+ - description: IACLKM, SDHI channel bus clock m.
clock-names:
items:
- const: core
- const: clkh
- const: cd
- const: aclk
+ - const: aclkm
+ resets:
+ items:
+ - description: rst, Core reset.
+ - description: axim, SDHI axi bus reset m.
+ - description: axis, SDHI axi bus reset s.
+ reset-names:
+ items:
+ - const: rst
+ - const: axim
+ - const: axis
required:
- clock-names
- resets
+ - reset-names
else:
if:
properties:
compatible:
contains:
enum:
- - renesas,rcar-gen2-sdhi
- - renesas,rcar-gen3-sdhi
- - renesas,rcar-gen4-sdhi
+ - renesas,sdhi-r9a09g057
+ - renesas,rzg2l-sdhi
then:
properties:
clocks:
- minItems: 1
- maxItems: 3
- clock-names:
- minItems: 1
- uniqueItems: true
items:
- - const: core
- - enum: [ clkh, cd ]
- - const: cd
- else:
- properties:
- clocks:
- minItems: 1
- maxItems: 2
+ - description: IMCLK, SDHI channel main clock1.
+ - description: CLK_HS, SDHI channel High speed clock which operates
+ 4 times that of SDHI channel main clock1.
+ - description: IMCLK2, SDHI channel main clock2. When this clock is
+ turned off, external SD card detection cannot be
+ detected.
+ - description: ACLK, SDHI channel bus clock.
clock-names:
- minItems: 1
items:
- const: core
+ - const: clkh
- const: cd
+ - const: aclk
+ resets:
+ maxItems: 1
+ required:
+ - clock-names
+ - resets
+ else:
+ if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,rcar-gen2-sdhi
+ - renesas,rcar-gen3-sdhi
+ - renesas,rcar-gen4-sdhi
+ then:
+ properties:
+ clocks:
+ minItems: 1
+ maxItems: 3
+ clock-names:
+ minItems: 1
+ uniqueItems: true
+ items:
+ - const: core
+ - enum: [ clkh, cd ]
+ - const: cd
+ else:
+ properties:
+ clocks:
+ minItems: 1
+ maxItems: 2
+ clock-names:
+ minItems: 1
+ items:
+ - const: core
+ - const: cd
- if:
properties:
@@ -247,7 +294,9 @@ allOf:
properties:
compatible:
contains:
- const: renesas,sdhi-r9a09g057
+ enum:
+ - renesas,sdhi-r9a08g046
+ - renesas,sdhi-r9a09g057
then:
properties:
vqmmc-regulator:
--
2.43.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 00/17] Add Renesas RZ/G3L SD/eMMC support
2026-05-30 16:07 [PATCH 00/17] Add Renesas RZ/G3L SD/eMMC support Biju
2026-05-30 16:07 ` [PATCH 01/17] dt-bindings: mmc: renesas,sdhi: Document RZ/G3L (r9a08g046) SoC Biju
@ 2026-06-02 21:01 ` Wolfram Sang
2026-06-03 5:34 ` Biju Das
1 sibling, 1 reply; 5+ messages in thread
From: Wolfram Sang @ 2026-06-02 21:01 UTC (permalink / raw)
To: Biju
Cc: Ulf Hansson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Philipp Zabel, Magnus Damm, Biju Das,
linux-mmc, devicetree, linux-kernel, linux-renesas-soc,
Prabhakar Mahadev Lad
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On Sat, May 30, 2026 at 05:07:54PM +0100, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> RZ/G3L SoC has:
>
> Channel 0 supports SD and eMMC (including HS400/HS400ES).
> Channel 1 supports SD and eMMC (except for HS400).
> Channel 2 supports SD.
>
> The SoC supports a maximum frequency of 150 MHz. The SD0 interface does
> not support IOVS and PWEN in the SDHI register (no internal regulator),
> unlike SD1 and SD2. It has an internal divider for all modes except HS400.
> It also has a 2048-bit divider compared to 512 on others. Moreover
> RZ/G3L supports HS400 enhanced strobe mode.
Sigh, so many HW changes again...
I want to review it but I won't have time before the next merge window
ends. In the meantime, could you resend the series properly in just one
thread, please? From patch 14 on, it gets messy...
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^ permalink raw reply [flat|nested] 5+ messages in thread