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From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Salih Erim <salih.erim@amd.com>
Cc: jic23@kernel.org, andy@kernel.org, dlechner@baylibre.com,
	nuno.sa@analog.com, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, conall.ogriofa@amd.com,
	michal.simek@amd.com, linux@roeck-us.net, erimsalih@gmail.com,
	linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 5/5] iio: adc: versal-sysmon: add oversampling support
Date: Mon, 15 Jun 2026 17:28:15 +0300	[thread overview]
Message-ID: <ajAL__3jUtSgSb7r@ashevche-desk.local> (raw)
In-Reply-To: <20260614233722.2603459-6-salih.erim@amd.com>

On Mon, Jun 15, 2026 at 12:37:22AM +0100, Salih Erim wrote:
> Add support for reading and writing the oversampling ratio through
> the IIO oversampling_ratio attribute. The hardware supports averaging
> 2, 4, 8, or 16 samples, plus a ratio of 1 (no averaging).
> 
> Temperature and supply channels share oversampling configuration at
> the type level (all temperature channels share one ratio, all supply
> channels share another), exposed through info_mask_shared_by_type.
> 
> The hardware encoding uses sample_count / 2 in a 4-bit field within
> the CONFIG register. Per-channel averaging enable registers must also
> be updated to activate or deactivate averaging.

...

> +static int sysmon_osr_write_temp(struct sysmon *sysmon, int val)
> +{
> +	/*
> +	 * HW register encoding is sample_count / 2:
> +	 * 0=none, 1=2x, 2=4x, 4=8x, 8=16x (not log2-based).
> +	 */
> +	int hw_val = val >> 1;

If, for some reason, val happens to be a small negative number, here might be
a surprising behaviour.

> +	unsigned int readback;
> +	int ret;
> +
> +	ret = regmap_update_bits(sysmon->regmap, SYSMON_CONFIG,
> +				SYSMON_CONFIG_TEMP_SAT_OSR,
> +				FIELD_PREP(SYSMON_CONFIG_TEMP_SAT_OSR, hw_val));
> +	if (ret)
> +		return ret;
> +
> +	/*
> +	 * Readback fence: the SysMon CONFIG register resides in the
> +	 * PMC domain behind the NoC. A posted write may not reach the
> +	 * hardware before the next MMIO access. Reading the register
> +	 * back forces the interconnect to complete the write, preventing
> +	 * a bus hang on the subsequent access.
> +	 */
> +	regmap_read(sysmon->regmap, SYSMON_CONFIG, &readback);
> +
> +	return sysmon_set_avg_enable(sysmon, SYSMON_TEMP_EN_AVG_BASE,
> +				     SYSMON_TEMP_EN_AVG_COUNT,
> +				     hw_val ? ~0U : 0);

Is the last parameter > 32-bit? If not, drop 'U' as it might have a nice
side-effect in case this become actually > 32-bit. Same for other cases.
In other words, using ~0U should be quite cautious.

> +}

-- 
With Best Regards,
Andy Shevchenko



  parent reply	other threads:[~2026-06-15 14:28 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-14 23:37 [PATCH v7 0/5] iio: adc: add AMD/Xilinx Versal SysMon driver Salih Erim
2026-06-14 23:37 ` [PATCH v7 1/5] dt-bindings: iio: adc: add xlnx,versal-sysmon binding Salih Erim
2026-06-14 23:37 ` [PATCH v7 2/5] iio: adc: add Versal SysMon driver Salih Erim
2026-06-15 14:22   ` Andy Shevchenko
2026-06-15 15:41     ` Erim, Salih
2026-06-14 23:37 ` [PATCH v7 3/5] iio: adc: versal-sysmon: add I2C driver Salih Erim
2026-06-15 14:30   ` Andy Shevchenko
2026-06-15 15:42     ` Erim, Salih
2026-06-14 23:37 ` [PATCH v7 4/5] iio: adc: versal-sysmon: add threshold event support Salih Erim
2026-06-14 23:48   ` sashiko-bot
2026-06-15 14:43   ` Andy Shevchenko
2026-06-15 15:45     ` Erim, Salih
2026-06-14 23:37 ` [PATCH v7 5/5] iio: adc: versal-sysmon: add oversampling support Salih Erim
2026-06-14 23:47   ` sashiko-bot
2026-06-15 14:28   ` Andy Shevchenko [this message]
2026-06-15 15:50     ` Erim, Salih

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