From: Qiang Yu <qiang.yu@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: "Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>,
"Vinod Koul" <vkoul@kernel.org>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Bjorn Andersson" <andersson@kernel.org>,
"Maxime Chevallier" <maxime.chevallier@bootlin.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 1/4] dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding
Date: Sun, 6 Sep 2026 19:26:06 -0700 [thread overview]
Message-ID: <ap4gvmokukHV1RHT@hu-qianyu-lv.qualcomm.com> (raw)
In-Reply-To: <aabdae7c-5294-4789-b123-4fcff8a733e0@oss.qualcomm.com>
On Mon, Aug 31, 2026 at 09:54:40AM +0200, Konrad Dybcio wrote:
> On 8/28/26 10:43 AM, Krishna Chaitanya Chundru wrote:
> > Document the PCIe PHY found on the Qualcomm Nord platform.
> >
> > Nord has a Gen5-capable QMP PCIe PHY that can operate in multiple
> > lane configurations using four PHY segments (A/B/C/D). The active
> > topology is selected by firmware through a TCSR configuration
> > register and may be configured as x16, x8+x8, x8+x4+x4, or
> > x8+x4+x2+x2.
> >
> > The binding describes the register regions, clocks, resets, power
> > domains, regulators, PHY provider interface, clock provider interface,
> > and the qcom,link-mode property used by the driver to discover the
> > active lane configuration programmed by firmware.
> >
> > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> > ---
> > .../phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml | 276 +++++++++++++++++++++
> > 1 file changed, 276 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml
> > new file mode 100644
> > index 000000000000..37198f82c611
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml
> > @@ -0,0 +1,276 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/qcom,nord-qmp-gen5x16-pcie-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm Nord QMP Bifurcated PCIe PHY
>
> Quadfurcated, perhaps? Is there a word in the spec that doesn't get too
> detailed about the number of effective slots that the PHY is divided into?
>
What about multiple link-mode PHY?
- Qiang Yu
> [...]
>
> > + vdda-phy-a-supply: true
> > +
> > + vdda-phy-b-supply: true
> > +
> > + vdda-phy-c-supply: true
> > +
> > + vdda-phy-d-supply: true
> > +
> > + vdda-pll-a-supply: true
> > +
> > + vdda-pll-b-supply: true
> > +
> > + vdda-pll-c-supply: true
> > +
> > + vdda-pll-d-supply: true
>
> I'm really surprised they aren't all connected to the same pair but oh well
>
> Konrad
>
next prev parent reply other threads:[~2026-09-07 2:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-28 8:43 [PATCH v2 0/4] Add PCIe support for Qualcomm Nord platform Krishna Chaitanya Chundru
2026-08-28 8:43 ` [PATCH v2 1/4] dt-bindings: phy: qcom: add Nord QMP PCIe PHY binding Krishna Chaitanya Chundru
2026-08-28 8:49 ` sashiko-bot
2026-08-31 7:54 ` Konrad Dybcio
2026-09-07 2:26 ` Qiang Yu [this message]
2026-08-31 8:43 ` Krzysztof Kozlowski
2026-08-28 8:43 ` [PATCH v2 2/4] dt-bindings: pci: qcom: add Nord PCIe controller compatible Krishna Chaitanya Chundru
2026-08-28 8:49 ` sashiko-bot
2026-08-31 8:44 ` Krzysztof Kozlowski
2026-08-28 8:43 ` [PATCH v2 3/4] PCI: qcom: Add CGC disable workaround for Nord PCIe Krishna Chaitanya Chundru
2026-08-28 8:50 ` sashiko-bot
2026-09-02 15:16 ` Konrad Dybcio
2026-08-28 8:43 ` [PATCH v2 4/4] phy: qcom: qmp-pcie: Add Nord Gen5x16 PCIe multi-PHY support Krishna Chaitanya Chundru
2026-08-28 8:54 ` sashiko-bot
2026-09-02 10:11 ` Konrad Dybcio
2026-09-07 6:12 ` Qiang Yu
2026-09-09 10:34 ` Krishna Chaitanya Chundru
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