[PATCH v2 0/6] media: imx8-isi: Add i.MX952 ISI support

[PATCH v2 0/6] media: imx8-isi: Add i.MX952 ISI support

[Guoniu Zhou]

The series adds support for the i.MX952 Image Sensing Interface (ISI),
which is a minor silicon revision of the i.MX95 ISI.

The i.MX952 ISI reuses the i.MX95 ISI core with the same 8-channel
pipeline and 4 pixel link inputs. The key hardware improvement is the
addition of RAW10/12/14 output LSB alignment, which allows the ISI to
output right-aligned RAW data directly, matching the V4L2 format
requirement without the RAW16 workaround needed on earlier platforms.

The series is organized as follows:

  1. Reorder mxc_imx95_data definition to follow mxc_imx93_data,
     matching the order in the of_match array.
  2. Use per-platform format_mask for the output format field to
     match the hardware register width: 6-bit for i.MX8 series,
     7-bit for i.MX8ULP and i.MX9 series.
  3. Remove unused model field from platform data.
  4. Add the i.MX952 compatible string to the DT binding, using
     fallback compatible fsl,imx95-isi.
  5. Add the i.MX952 platform data and of_match entry.
  6. Enable RAW10/12/14 output LSB alignment on platforms that
     support it, removing the RAW16 workaround for i.MX952.

Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v2:
- Use fallback compatible fsl,imx95-isi for imx952 (Frank)
- Remove unused model field from platform data (Frank)
- Add Reviewed-by tag from Frank Li for patch 1/6 and 2/6
- Link to v1: https://lore.kernel.org/r/20260826-isi_imx952-v1-0-cbfaaa3f0000@oss.nxp.com

---
Guoniu Zhou (6):
      media: imx8-isi: Reorder mxc_imx95_data to follow mxc_imx93_data
      media: imx8-isi: Use per-platform format_mask for output format field
      media: imx8-isi: Remove unused model field from platform data
      media: dt-bindings: nxp,imx8-isi: Add i.MX952 ISI compatible string
      media: nxp: imx8-isi: Add i.MX952 ISI support
      media: imx8-isi: Enable ISI RAW10/12/14 output LSB alignment

 .../devicetree/bindings/media/nxp,imx8-isi.yaml    | 18 +++++---
 .../media/platform/nxp/imx8-isi/imx8-isi-core.c    | 52 ++++++++++++++--------
 .../media/platform/nxp/imx8-isi/imx8-isi-core.h    | 14 +-----
 drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c  | 42 ++++++++++++++++-
 .../media/platform/nxp/imx8-isi/imx8-isi-regs.h    |  6 ++-
 .../media/platform/nxp/imx8-isi/imx8-isi-video.c   | 40 ++++++++---------
 6 files changed, 110 insertions(+), 62 deletions(-)
---
base-commit: 4900cad020c0580dfb1be27776ff10a4ef110cfa
change-id: 20260817-isi_imx952-66ca65f9b638

Best regards,
-- 
Guoniu Zhou <guoniu.zhou@oss.nxp.com>

[PATCH v2 1/6] media: imx8-isi: Reorder mxc_imx95_data to follow mxc_imx93_data

[Guoniu Zhou]

Move mxc_imx95_data definition after mxc_imx93_data to match the
order defined in the of_match array.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v2:
- Add Reviewed-by tag from Frank Li
---
 .../media/platform/nxp/imx8-isi/imx8-isi-core.c    | 24 +++++++++++-----------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
index 0ae5f35e017c..f2a8eb82fbfd 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
@@ -314,18 +314,6 @@ static const struct mxc_isi_plat_data mxc_imx8mp_data = {
 	.has_36bit_dma		= true,
 };
 
-static const struct mxc_isi_plat_data mxc_imx95_data = {
-	.model			= MXC_ISI_IMX95,
-	.num_ports		= 4,
-	.num_channels		= 8,
-	.num_vc			= 8,
-	.reg_offset		= 0x10000,
-	.ier_reg		= &mxc_imx8_isi_ier_v2,
-	.set_thd		= &mxc_imx8_isi_thd_v1,
-	.buf_active_reverse	= true,
-	.has_36bit_dma		= true,
-};
-
 static const struct mxc_isi_plat_data mxc_imx8qm_data = {
 	.model			= MXC_ISI_IMX8QM,
 	.num_ports		= 5,
@@ -384,6 +372,18 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
 	.has_36bit_dma		= false,
 };
 
+static const struct mxc_isi_plat_data mxc_imx95_data = {
+	.model			= MXC_ISI_IMX95,
+	.num_ports		= 4,
+	.num_channels		= 8,
+	.num_vc			= 8,
+	.reg_offset		= 0x10000,
+	.ier_reg		= &mxc_imx8_isi_ier_v2,
+	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.buf_active_reverse	= true,
+	.has_36bit_dma		= true,
+};
+
 /* -----------------------------------------------------------------------------
  * Power management
  */

-- 
2.34.1

[PATCH v2 2/6] media: imx8-isi: Use per-platform format_mask for output format field

[Guoniu Zhou]

The ISI output format field width differs across SoC generations:
i.MX8 series (MN/MP/QM/QXP) use a 6-bit field (bits 29:24), while
from i.MX8ULP onwards (including i.MX91/93/95/952) the field is
extended to 7 bits (bits 30:24) to support RAW32 and RAW14 formats.

Replace the static CHNL_IMG_CTRL_FORMAT_MASK with a per-platform
format_mask in mxc_isi_plat_data to correctly match the hardware
format field width for each SoC.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v2:
- Add Reviewed-by tag from Frank Li
---
 drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c | 8 ++++++++
 drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h | 1 +
 drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c   | 3 ++-
 drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h | 1 -
 4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
index f2a8eb82fbfd..c1c16dbc1539 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
@@ -297,6 +297,7 @@ static const struct mxc_isi_plat_data mxc_imx8mn_data = {
 	.reg_offset		= 0,
 	.ier_reg		= &mxc_imx8_isi_ier_v1,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(29, 24),
 	.buf_active_reverse	= false,
 	.gasket_ops		= &mxc_imx8_gasket_ops,
 	.has_36bit_dma		= false,
@@ -309,6 +310,7 @@ static const struct mxc_isi_plat_data mxc_imx8mp_data = {
 	.reg_offset		= 0x2000,
 	.ier_reg		= &mxc_imx8_isi_ier_v2,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(29, 24),
 	.buf_active_reverse	= true,
 	.gasket_ops		= &mxc_imx8_gasket_ops,
 	.has_36bit_dma		= true,
@@ -322,6 +324,7 @@ static const struct mxc_isi_plat_data mxc_imx8qm_data = {
 	.reg_offset		= 0x10000,
 	.ier_reg		= &mxc_imx8_isi_ier_qm,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(29, 24),
 	.buf_active_reverse	= true,
 	.has_36bit_dma		= false,
 };
@@ -334,6 +337,7 @@ static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
 	.reg_offset		= 0x10000,
 	.ier_reg		= &mxc_imx8_isi_ier_v2,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(29, 24),
 	.buf_active_reverse	= true,
 	.has_36bit_dma		= false,
 };
@@ -345,6 +349,7 @@ static const struct mxc_isi_plat_data mxc_imx8ulp_data = {
 	.reg_offset		= 0x0,
 	.ier_reg		= &mxc_imx8_isi_ier_v2,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(30, 24),
 	.buf_active_reverse	= true,
 	.has_36bit_dma		= false,
 };
@@ -356,6 +361,7 @@ static const struct mxc_isi_plat_data mxc_imx91_data = {
 	.reg_offset		= 0,
 	.ier_reg		= &mxc_imx8_isi_ier_v2,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(30, 24),
 	.buf_active_reverse	= true,
 	.has_36bit_dma		= false,
 };
@@ -367,6 +373,7 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
 	.reg_offset		= 0,
 	.ier_reg		= &mxc_imx8_isi_ier_v2,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(30, 24),
 	.buf_active_reverse	= true,
 	.gasket_ops		= &mxc_imx93_gasket_ops,
 	.has_36bit_dma		= false,
@@ -380,6 +387,7 @@ static const struct mxc_isi_plat_data mxc_imx95_data = {
 	.reg_offset		= 0x10000,
 	.ier_reg		= &mxc_imx8_isi_ier_v2,
 	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(30, 24),
 	.buf_active_reverse	= true,
 	.has_36bit_dma		= true,
 };
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
index 58b47335afc7..05c21c448b93 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
@@ -175,6 +175,7 @@ struct mxc_isi_plat_data {
 	const struct mxc_isi_ier_reg  *ier_reg;
 	const struct mxc_isi_set_thd *set_thd;
 	const struct mxc_gasket_ops *gasket_ops;
+	u32 format_mask;
 	bool buf_active_reverse;
 	bool has_36bit_dma;
 };
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
index 6aa760ce3605..2405f7d33d0a 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
@@ -410,13 +410,14 @@ void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
 				       const struct mxc_isi_format_info *info,
 				       struct v4l2_pix_format_mplane *format)
 {
+	const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
 	u32 val;
 
 	/* set outbuf format */
 	dev_dbg(pipe->isi->dev, "output format %p4cc", &format->pixelformat);
 
 	val = mxc_isi_read(pipe, CHNL_IMG_CTRL);
-	val &= ~CHNL_IMG_CTRL_FORMAT_MASK;
+	val &= ~pdata->format_mask;
 	val |= CHNL_IMG_CTRL_FORMAT(info->isi_out_format);
 	mxc_isi_write(pipe, CHNL_IMG_CTRL, val);
 
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
index e795f4daf3ff..7c4e736f4651 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
@@ -39,7 +39,6 @@
 /* Channel Image Control Register */
 #define CHNL_IMG_CTRL						0x0004
 #define CHNL_IMG_CTRL_FORMAT(n)					((n) << 24)
-#define CHNL_IMG_CTRL_FORMAT_MASK				GENMASK(29, 24)
 #define CHNL_IMG_CTRL_FORMAT_RGBA8888				0x00
 #define CHNL_IMG_CTRL_FORMAT_ABGR8888				0x01
 #define CHNL_IMG_CTRL_FORMAT_ARGB8888				0x02

-- 
2.34.1

[PATCH v2 3/6] media: imx8-isi: Remove unused model field from platform data

[Guoniu Zhou]

The model field in struct mxc_isi_plat_data and the corresponding
enum model are never referenced in any driver logic. Remove them
to simplify the platform data structures.

Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v2:
- New added in v2 (Frank)
---
 drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c |  8 --------
 drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h | 12 ------------
 2 files changed, 20 deletions(-)

diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
index c1c16dbc1539..e627054bbc8e 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
@@ -291,7 +291,6 @@ static const struct mxc_isi_set_thd mxc_imx8_isi_thd_v1 = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx8mn_data = {
-	.model			= MXC_ISI_IMX8MN,
 	.num_ports		= 1,
 	.num_channels		= 1,
 	.reg_offset		= 0,
@@ -304,7 +303,6 @@ static const struct mxc_isi_plat_data mxc_imx8mn_data = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx8mp_data = {
-	.model			= MXC_ISI_IMX8MP,
 	.num_ports		= 2,
 	.num_channels		= 2,
 	.reg_offset		= 0x2000,
@@ -317,7 +315,6 @@ static const struct mxc_isi_plat_data mxc_imx8mp_data = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx8qm_data = {
-	.model			= MXC_ISI_IMX8QM,
 	.num_ports		= 5,
 	.num_channels		= 8,
 	.num_vc			= 4,
@@ -330,7 +327,6 @@ static const struct mxc_isi_plat_data mxc_imx8qm_data = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
-	.model			= MXC_ISI_IMX8QXP,
 	.num_ports		= 5,
 	.num_channels		= 6,
 	.num_vc			= 4,
@@ -343,7 +339,6 @@ static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx8ulp_data = {
-	.model			= MXC_ISI_IMX8ULP,
 	.num_ports		= 1,
 	.num_channels		= 1,
 	.reg_offset		= 0x0,
@@ -355,7 +350,6 @@ static const struct mxc_isi_plat_data mxc_imx8ulp_data = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx91_data = {
-	.model			= MXC_ISI_IMX91,
 	.num_ports		= 1,
 	.num_channels		= 1,
 	.reg_offset		= 0,
@@ -367,7 +361,6 @@ static const struct mxc_isi_plat_data mxc_imx91_data = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx93_data = {
-	.model			= MXC_ISI_IMX93,
 	.num_ports		= 1,
 	.num_channels		= 1,
 	.reg_offset		= 0,
@@ -380,7 +373,6 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
 };
 
 static const struct mxc_isi_plat_data mxc_imx95_data = {
-	.model			= MXC_ISI_IMX95,
 	.num_ports		= 4,
 	.num_channels		= 8,
 	.num_vc			= 8,
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
index 05c21c448b93..73f6ea7b0ea1 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
@@ -155,19 +155,7 @@ struct mxc_gasket_ops {
 	void (*disable)(struct mxc_isi_dev *isi, const unsigned int port);
 };
 
-enum model {
-	MXC_ISI_IMX8MN,
-	MXC_ISI_IMX8MP,
-	MXC_ISI_IMX8QM,
-	MXC_ISI_IMX8QXP,
-	MXC_ISI_IMX8ULP,
-	MXC_ISI_IMX91,
-	MXC_ISI_IMX93,
-	MXC_ISI_IMX95,
-};
-
 struct mxc_isi_plat_data {
-	enum model model;
 	unsigned int num_ports;
 	unsigned int num_channels;
 	unsigned int num_vc;		/* Number of VCs, 0 = no VC support */

-- 
2.34.1

Re: [PATCH v2 3/6] media: imx8-isi: Remove unused model field from platform data

[Frank Li]

On Mon, Aug 31, 2026 at 11:36:58AM +0800, Guoniu Zhou wrote:
> The model field in struct mxc_isi_plat_data and the corresponding
> enum model are never referenced in any driver logic. Remove them
> to simplify the platform data structures.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> Changes in v2:
> - New added in v2 (Frank)
> ---
>  drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c |  8 --------
>  drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h | 12 ------------
>  2 files changed, 20 deletions(-)
>
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> index c1c16dbc1539..e627054bbc8e 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> @@ -291,7 +291,6 @@ static const struct mxc_isi_set_thd mxc_imx8_isi_thd_v1 = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx8mn_data = {
> -	.model			= MXC_ISI_IMX8MN,
>  	.num_ports		= 1,
>  	.num_channels		= 1,
>  	.reg_offset		= 0,
> @@ -304,7 +303,6 @@ static const struct mxc_isi_plat_data mxc_imx8mn_data = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx8mp_data = {
> -	.model			= MXC_ISI_IMX8MP,
>  	.num_ports		= 2,
>  	.num_channels		= 2,
>  	.reg_offset		= 0x2000,
> @@ -317,7 +315,6 @@ static const struct mxc_isi_plat_data mxc_imx8mp_data = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx8qm_data = {
> -	.model			= MXC_ISI_IMX8QM,
>  	.num_ports		= 5,
>  	.num_channels		= 8,
>  	.num_vc			= 4,
> @@ -330,7 +327,6 @@ static const struct mxc_isi_plat_data mxc_imx8qm_data = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
> -	.model			= MXC_ISI_IMX8QXP,
>  	.num_ports		= 5,
>  	.num_channels		= 6,
>  	.num_vc			= 4,
> @@ -343,7 +339,6 @@ static const struct mxc_isi_plat_data mxc_imx8qxp_data = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx8ulp_data = {
> -	.model			= MXC_ISI_IMX8ULP,
>  	.num_ports		= 1,
>  	.num_channels		= 1,
>  	.reg_offset		= 0x0,
> @@ -355,7 +350,6 @@ static const struct mxc_isi_plat_data mxc_imx8ulp_data = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx91_data = {
> -	.model			= MXC_ISI_IMX91,
>  	.num_ports		= 1,
>  	.num_channels		= 1,
>  	.reg_offset		= 0,
> @@ -367,7 +361,6 @@ static const struct mxc_isi_plat_data mxc_imx91_data = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx93_data = {
> -	.model			= MXC_ISI_IMX93,
>  	.num_ports		= 1,
>  	.num_channels		= 1,
>  	.reg_offset		= 0,
> @@ -380,7 +373,6 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
>  };
>
>  static const struct mxc_isi_plat_data mxc_imx95_data = {
> -	.model			= MXC_ISI_IMX95,
>  	.num_ports		= 4,
>  	.num_channels		= 8,
>  	.num_vc			= 8,
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> index 05c21c448b93..73f6ea7b0ea1 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> @@ -155,19 +155,7 @@ struct mxc_gasket_ops {
>  	void (*disable)(struct mxc_isi_dev *isi, const unsigned int port);
>  };
>
> -enum model {
> -	MXC_ISI_IMX8MN,
> -	MXC_ISI_IMX8MP,
> -	MXC_ISI_IMX8QM,
> -	MXC_ISI_IMX8QXP,
> -	MXC_ISI_IMX8ULP,
> -	MXC_ISI_IMX91,
> -	MXC_ISI_IMX93,
> -	MXC_ISI_IMX95,
> -};
> -
>  struct mxc_isi_plat_data {
> -	enum model model;
>  	unsigned int num_ports;
>  	unsigned int num_channels;
>  	unsigned int num_vc;		/* Number of VCs, 0 = no VC support */
>
> --
> 2.34.1
>
>

[PATCH v2 4/6] media: dt-bindings: nxp,imx8-isi: Add i.MX952 ISI compatible string

[Guoniu Zhou]

The i.MX952 ISI is a minor silicon revision of the i.MX95 ISI,
primarily addressing RAW data alignment. The core functionality
remains identical, so the i.MX952 ISI uses a fallback compatible
string to fsl,imx95-isi.

Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
Changes in v2:
- Use fallback compatible fsl,imx95-isi for imx952 (Frank, Conor Dooley)
---
 .../devicetree/bindings/media/nxp,imx8-isi.yaml        | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
index 279c9cd3034a..d0a99f00a45e 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
@@ -18,13 +18,17 @@ description: |
 
 properties:
   compatible:
-    enum:
-      - fsl,imx8mn-isi
-      - fsl,imx8mp-isi
-      - fsl,imx8ulp-isi
-      - fsl,imx91-isi
-      - fsl,imx93-isi
-      - fsl,imx95-isi
+    oneOf:
+      - enum:
+          - fsl,imx8mn-isi
+          - fsl,imx8mp-isi
+          - fsl,imx8ulp-isi
+          - fsl,imx91-isi
+          - fsl,imx93-isi
+          - fsl,imx95-isi
+      - items:
+          - const: fsl,imx952-isi
+          - const: fsl,imx95-isi
 
   reg:
     maxItems: 1

-- 
2.34.1

Re: [PATCH v2 4/6] media: dt-bindings: nxp,imx8-isi: Add i.MX952 ISI compatible string

[Frank Li]

On Mon, Aug 31, 2026 at 11:36:59AM +0800, Guoniu Zhou wrote:
> The i.MX952 ISI is a minor silicon revision of the i.MX95 ISI,
> primarily addressing RAW data alignment. The core functionality
> remains identical, so the i.MX952 ISI uses a fallback compatible
> string to fsl,imx95-isi.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
> ---
> Changes in v2:
> - Use fallback compatible fsl,imx95-isi for imx952 (Frank, Conor Dooley)
> ---
>  .../devicetree/bindings/media/nxp,imx8-isi.yaml        | 18 +++++++++++-------
>  1 file changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> index 279c9cd3034a..d0a99f00a45e 100644
> --- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
> @@ -18,13 +18,17 @@ description: |
>
>  properties:
>    compatible:
> -    enum:
> -      - fsl,imx8mn-isi
> -      - fsl,imx8mp-isi
> -      - fsl,imx8ulp-isi
> -      - fsl,imx91-isi
> -      - fsl,imx93-isi
> -      - fsl,imx95-isi
> +    oneOf:
> +      - enum:
> +          - fsl,imx8mn-isi
> +          - fsl,imx8mp-isi
> +          - fsl,imx8ulp-isi
> +          - fsl,imx91-isi
> +          - fsl,imx93-isi
> +          - fsl,imx95-isi
> +      - items:
> +          - const: fsl,imx952-isi

Nit:
	If need spin, suggest
             -enum:
                -  fsl,imx952-isi

In case more compatible string, which need fallback to fsl,imx95-isi in
future. Anyways, it is also fine for now.

Reviewed-by: Frank Li <Frank.Li@nxp.com>


> +          - const: fsl,imx95-isi
>
>    reg:
>      maxItems: 1
>
> --
> 2.34.1
>
>

Re: [PATCH v2 4/6] media: dt-bindings: nxp,imx8-isi: Add i.MX952 ISI compatible string

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 75 bytes --]

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH v2 5/6] media: nxp: imx8-isi: Add i.MX952 ISI support

[Guoniu Zhou]

The i.MX952 ISI is reused from the i.MX95 ISI with a minor silicon
revision. It can process up to 8 image sources simultaneously and
obtain image data from up to 4 pixel link sources.

Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
 drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c | 13 +++++++++++++
 drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h |  2 +-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
index e627054bbc8e..d492631dfb6d 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
@@ -384,6 +384,18 @@ static const struct mxc_isi_plat_data mxc_imx95_data = {
 	.has_36bit_dma		= true,
 };
 
+static const struct mxc_isi_plat_data mxc_imx952_data = {
+	.num_ports		= 4,
+	.num_channels		= 8,
+	.num_vc			= 8,
+	.reg_offset		= 0x10000,
+	.ier_reg		= &mxc_imx8_isi_ier_v2,
+	.set_thd		= &mxc_imx8_isi_thd_v1,
+	.format_mask		= GENMASK(30, 24),
+	.buf_active_reverse	= true,
+	.has_36bit_dma		= true,
+};
+
 /* -----------------------------------------------------------------------------
  * Power management
  */
@@ -574,6 +586,7 @@ static const struct of_device_id mxc_isi_of_match[] = {
 	{ .compatible = "fsl,imx91-isi", .data = &mxc_imx91_data },
 	{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
 	{ .compatible = "fsl,imx95-isi", .data = &mxc_imx95_data },
+	{ .compatible = "fsl,imx952-isi", .data = &mxc_imx952_data },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mxc_isi_of_match);
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
index 7c4e736f4651..35dec3a650ac 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
@@ -22,7 +22,7 @@
 #define CHNL_CTRL_SW_RST					BIT(24)
 /*
  * CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
- * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX95 only
+ * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
  */
 #define CHNL_CTRL_BLANK_PXL(n)					FIELD_PREP(GENMASK(23, 16), (n))
 #define CHNL_CTRL_VC_ID_1(n)					FIELD_PREP(BIT(16), (n))

-- 
2.34.1

Re: [PATCH v2 5/6] media: nxp: imx8-isi: Add i.MX952 ISI support

[Frank Li]

On Mon, Aug 31, 2026 at 11:37:00AM +0800, Guoniu Zhou wrote:
> The i.MX952 ISI is reused from the i.MX95 ISI with a minor silicon
> revision. It can process up to 8 image sources simultaneously and
> obtain image data from up to 4 pixel link sources.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
> ---

If fallback to imx95, needn't this patch at all.

Frank

>  drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c | 13 +++++++++++++
>  drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h |  2 +-
>  2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> index e627054bbc8e..d492631dfb6d 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> @@ -384,6 +384,18 @@ static const struct mxc_isi_plat_data mxc_imx95_data = {
>  	.has_36bit_dma		= true,
>  };
>
> +static const struct mxc_isi_plat_data mxc_imx952_data = {
> +	.num_ports		= 4,
> +	.num_channels		= 8,
> +	.num_vc			= 8,
> +	.reg_offset		= 0x10000,
> +	.ier_reg		= &mxc_imx8_isi_ier_v2,
> +	.set_thd		= &mxc_imx8_isi_thd_v1,
> +	.format_mask		= GENMASK(30, 24),
> +	.buf_active_reverse	= true,
> +	.has_36bit_dma		= true,
> +};
> +
>  /* -----------------------------------------------------------------------------
>   * Power management
>   */
> @@ -574,6 +586,7 @@ static const struct of_device_id mxc_isi_of_match[] = {
>  	{ .compatible = "fsl,imx91-isi", .data = &mxc_imx91_data },
>  	{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
>  	{ .compatible = "fsl,imx95-isi", .data = &mxc_imx95_data },
> +	{ .compatible = "fsl,imx952-isi", .data = &mxc_imx952_data },
>  	{ /* sentinel */ },
>  };
>  MODULE_DEVICE_TABLE(of, mxc_isi_of_match);
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> index 7c4e736f4651..35dec3a650ac 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> @@ -22,7 +22,7 @@
>  #define CHNL_CTRL_SW_RST					BIT(24)
>  /*
>   * CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
> - * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX95 only
> + * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
>   */
>  #define CHNL_CTRL_BLANK_PXL(n)					FIELD_PREP(GENMASK(23, 16), (n))
>  #define CHNL_CTRL_VC_ID_1(n)					FIELD_PREP(BIT(16), (n))
>
> --
> 2.34.1
>
>

[PATCH v2 6/6] media: imx8-isi: Enable ISI RAW10/12/14 output LSB alignment

[Guoniu Zhou]

V4L2 requires RAW formats to be LSB-aligned (right-aligned). Before
i.MX952, the ISI shifts RAW10/12/14 output left to MSB, so the driver
works around this by using RAW16 format instead.

The i.MX952 ISI introduces a RAW output LSB alignment bit. Enable it
along with the input MSB alignment on platforms that support this
feature, so that RAW10/12/14 output formats can be used directly
without the RAW16 workaround.

Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
---
 .../media/platform/nxp/imx8-isi/imx8-isi-core.c    |  1 +
 .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  1 +
 drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c  | 39 ++++++++++++++++++++-
 .../media/platform/nxp/imx8-isi/imx8-isi-regs.h    |  3 ++
 .../media/platform/nxp/imx8-isi/imx8-isi-video.c   | 40 +++++++++++-----------
 5 files changed, 63 insertions(+), 21 deletions(-)

diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
index d492631dfb6d..0f776fc8fd7e 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
@@ -394,6 +394,7 @@ static const struct mxc_isi_plat_data mxc_imx952_data = {
 	.format_mask		= GENMASK(30, 24),
 	.buf_active_reverse	= true,
 	.has_36bit_dma		= true,
+	.raw_out_lsb		= true,
 };
 
 /* -----------------------------------------------------------------------------
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
index 73f6ea7b0ea1..c352bcf8dc47 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
@@ -166,6 +166,7 @@ struct mxc_isi_plat_data {
 	u32 format_mask;
 	bool buf_active_reverse;
 	bool has_36bit_dma;
+	bool raw_out_lsb;
 };
 
 struct mxc_isi_dma_buffer {
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
index 2405f7d33d0a..4838b445f279 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
@@ -308,6 +308,7 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
 					unsigned int vc,
 					bool bypass)
 {
+	const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
 	u32 val;
 
 	mutex_lock(&pipe->lock);
@@ -357,6 +358,20 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
 			val |= CHNL_CTRL_VC_ID_1(vc >> 2);
 	}
 
+	if (pdata->raw_out_lsb) {
+		/*
+		 * Enable RAW10/12/14 output LSB alignment to match the
+		 * V4L2 requirement that RAW formats are LSB-aligned.
+		 */
+		val |= CHNL_CTRL_RAW_OUT_LSB_ALIGN;
+
+		/*
+		 * Align the data selection from pixel link to MSB to
+		 * avoid data shift since the data from PL is MSB.
+		 */
+		val |= CHNL_CTRL_RAW_IN_MSB_ALIGN;
+	}
+
 	mxc_isi_write(pipe, CHNL_CTRL, val);
 
 	mutex_unlock(&pipe->lock);
@@ -406,11 +421,19 @@ void mxc_isi_channel_set_input_format(struct mxc_isi_pipe *pipe,
 		      CHNL_IN_BUF_PITCH_LINE_PITCH(bpl));
 }
 
+static bool isi_out_raw(u32 format)
+{
+	return format == CHNL_IMG_CTRL_FORMAT_RAW10 ||
+	       format == CHNL_IMG_CTRL_FORMAT_RAW12 ||
+	       format == CHNL_IMG_CTRL_FORMAT_RAW14;
+}
+
 void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
 				       const struct mxc_isi_format_info *info,
 				       struct v4l2_pix_format_mplane *format)
 {
 	const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
+	u32 fmt;
 	u32 val;
 
 	/* set outbuf format */
@@ -418,7 +441,21 @@ void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
 
 	val = mxc_isi_read(pipe, CHNL_IMG_CTRL);
 	val &= ~pdata->format_mask;
-	val |= CHNL_IMG_CTRL_FORMAT(info->isi_out_format);
+
+	/*
+	 * Before i.MX952, the ISI shifts the 10/12/14-bit formats left
+	 * by 6, 4 and 2 bits when using CHNL_IMG_CTRL_FORMAT_RAW10/12/14
+	 * respectively, to align the bits to the left and pad with zeros in
+	 * the LSBs. The corresponding V4L2 formats are however right-aligned,
+	 * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left shift.
+	 * After i.MX952, ISI add RAW10/12/14 LSB output alignment, so skip
+	 * the above workaround.
+	 */
+	fmt = !pdata->raw_out_lsb && isi_out_raw(info->isi_out_format) ?
+	      CHNL_IMG_CTRL_FORMAT_RAW16 :
+	      info->isi_out_format;
+
+	val |= CHNL_IMG_CTRL_FORMAT(fmt);
 	mxc_isi_write(pipe, CHNL_IMG_CTRL, val);
 
 	/* line pitch */
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
index 35dec3a650ac..c9c22a3668f9 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
@@ -20,6 +20,8 @@
 #define CHNL_CTRL_CHAIN_BUF_NO_CHAIN				0
 #define CHNL_CTRL_CHAIN_BUF_2_CHAIN				1
 #define CHNL_CTRL_SW_RST					BIT(24)
+#define CHNL_CTRL_RAW_OUT_LSB_ALIGN				BIT(23)	/* i.MX952 only */
+#define CHNL_CTRL_RAW_IN_MSB_ALIGN				BIT(22)	/* i.MX{91,93,95,952} only */
 /*
  * CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
  * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
@@ -88,6 +90,7 @@
 #define CHNL_IMG_CTRL_FORMAT_YUV420_3P10P			0x3a
 #define CHNL_IMG_CTRL_FORMAT_YUV420_2P12			0x3d
 #define CHNL_IMG_CTRL_FORMAT_YUV420_3P12			0x3e
+#define CHNL_IMG_CTRL_FORMAT_RAW14				0x41	/* i.MX{8ULP,91,93,95,952} only */
 #define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n)				((n) << 16)
 #define CHNL_IMG_CTRL_GBL_ALPHA_VAL_MASK			GENMASK(23, 16)
 #define CHNL_IMG_CTRL_GBL_ALPHA_EN				BIT(15)
diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
index f45c2aae59ce..9a6a8302774c 100644
--- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
+++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
@@ -221,11 +221,11 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 	/*
 	 * RAW formats
 	 *
-	 * The ISI shifts the 10-bit and 12-bit formats left by 6 and 4 bits
-	 * when using CHNL_IMG_CTRL_FORMAT_RAW10 or MXC_ISI_OUT_FMT_RAW12
-	 * respectively, to align the bits to the left and pad with zeros in
-	 * the LSBs. The corresponding V4L2 formats are however right-aligned,
-	 * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left shift.
+	 * The format entries use the native RAW10/12/14 ISI format codes.
+	 * On platforms without hardware LSB alignment, the driver
+	 * substitutes RAW16 at runtime in
+	 * mxc_isi_channel_set_output_format() to avoid the left shift
+	 * that the ISI applies to RAW10/12/14 output.
 	 */
 	{
 		.mbus_code	= MEDIA_BUS_FMT_Y8_1X8,
@@ -240,7 +240,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_Y10_1X10,
 		.fourcc		= V4L2_PIX_FMT_Y10,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -249,7 +249,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_Y12_1X12,
 		.fourcc		= V4L2_PIX_FMT_Y12,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -258,7 +258,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_Y14_1X14,
 		.fourcc		= V4L2_PIX_FMT_Y14,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -312,7 +312,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SBGGR10_1X10,
 		.fourcc		= V4L2_PIX_FMT_SBGGR10,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -321,7 +321,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SGBRG10_1X10,
 		.fourcc		= V4L2_PIX_FMT_SGBRG10,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -330,7 +330,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
 		.fourcc		= V4L2_PIX_FMT_SGRBG10,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -339,7 +339,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SRGGB10_1X10,
 		.fourcc		= V4L2_PIX_FMT_SRGGB10,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -348,7 +348,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SBGGR12_1X12,
 		.fourcc		= V4L2_PIX_FMT_SBGGR12,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -357,7 +357,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SGBRG12_1X12,
 		.fourcc		= V4L2_PIX_FMT_SGBRG12,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -366,7 +366,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
 		.fourcc		= V4L2_PIX_FMT_SGRBG12,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -375,7 +375,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SRGGB12_1X12,
 		.fourcc		= V4L2_PIX_FMT_SRGGB12,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -384,7 +384,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SBGGR14_1X14,
 		.fourcc		= V4L2_PIX_FMT_SBGGR14,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -393,7 +393,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SGBRG14_1X14,
 		.fourcc		= V4L2_PIX_FMT_SGBRG14,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -402,7 +402,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SGRBG14_1X14,
 		.fourcc		= V4L2_PIX_FMT_SGRBG14,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },
@@ -411,7 +411,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
 		.mbus_code	= MEDIA_BUS_FMT_SRGGB14_1X14,
 		.fourcc		= V4L2_PIX_FMT_SRGGB14,
 		.type		= MXC_ISI_VIDEO_CAP,
-		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
+		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
 		.mem_planes	= 1,
 		.color_planes	= 1,
 		.depth		= { 16 },

-- 
2.34.1

Re: [PATCH v2 6/6] media: imx8-isi: Enable ISI RAW10/12/14 output LSB alignment

[Frank Li]

On Mon, Aug 31, 2026 at 11:37:01AM +0800, Guoniu Zhou wrote:
> V4L2 requires RAW formats to be LSB-aligned (right-aligned). Before
> i.MX952, the ISI shifts RAW10/12/14 output left to MSB, so the driver
> works around this by using RAW16 format instead.
>
> The i.MX952 ISI introduces a RAW output LSB alignment bit. Enable it
> along with the input MSB alignment on platforms that support this
> feature, so that RAW10/12/14 output formats can be used directly
> without the RAW16 workaround.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
> ---
>  .../media/platform/nxp/imx8-isi/imx8-isi-core.c    |  1 +
>  .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  1 +
>  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c  | 39 ++++++++++++++++++++-
>  .../media/platform/nxp/imx8-isi/imx8-isi-regs.h    |  3 ++
>  .../media/platform/nxp/imx8-isi/imx8-isi-video.c   | 40 +++++++++++-----------
>  5 files changed, 63 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> index d492631dfb6d..0f776fc8fd7e 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> @@ -394,6 +394,7 @@ static const struct mxc_isi_plat_data mxc_imx952_data = {
>  	.format_mask		= GENMASK(30, 24),
>  	.buf_active_reverse	= true,
>  	.has_36bit_dma		= true,
> +	.raw_out_lsb		= true,

Sorry, I may miss this change before, if it is difference with imx95,
needn't fallback to imx95. You just mention what's difference at binding
doc.

Frank

>  };
>
>  /* -----------------------------------------------------------------------------
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> index 73f6ea7b0ea1..c352bcf8dc47 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> @@ -166,6 +166,7 @@ struct mxc_isi_plat_data {
>  	u32 format_mask;
>  	bool buf_active_reverse;
>  	bool has_36bit_dma;
> +	bool raw_out_lsb;
>  };
>
>  struct mxc_isi_dma_buffer {
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> index 2405f7d33d0a..4838b445f279 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> @@ -308,6 +308,7 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
>  					unsigned int vc,
>  					bool bypass)
>  {
> +	const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
>  	u32 val;
>
>  	mutex_lock(&pipe->lock);
> @@ -357,6 +358,20 @@ static void mxc_isi_channel_set_control(struct mxc_isi_pipe *pipe,
>  			val |= CHNL_CTRL_VC_ID_1(vc >> 2);
>  	}
>
> +	if (pdata->raw_out_lsb) {
> +		/*
> +		 * Enable RAW10/12/14 output LSB alignment to match the
> +		 * V4L2 requirement that RAW formats are LSB-aligned.
> +		 */
> +		val |= CHNL_CTRL_RAW_OUT_LSB_ALIGN;
> +
> +		/*
> +		 * Align the data selection from pixel link to MSB to
> +		 * avoid data shift since the data from PL is MSB.
> +		 */
> +		val |= CHNL_CTRL_RAW_IN_MSB_ALIGN;
> +	}
> +
>  	mxc_isi_write(pipe, CHNL_CTRL, val);
>
>  	mutex_unlock(&pipe->lock);
> @@ -406,11 +421,19 @@ void mxc_isi_channel_set_input_format(struct mxc_isi_pipe *pipe,
>  		      CHNL_IN_BUF_PITCH_LINE_PITCH(bpl));
>  }
>
> +static bool isi_out_raw(u32 format)
> +{
> +	return format == CHNL_IMG_CTRL_FORMAT_RAW10 ||
> +	       format == CHNL_IMG_CTRL_FORMAT_RAW12 ||
> +	       format == CHNL_IMG_CTRL_FORMAT_RAW14;
> +}
> +
>  void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
>  				       const struct mxc_isi_format_info *info,
>  				       struct v4l2_pix_format_mplane *format)
>  {
>  	const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
> +	u32 fmt;
>  	u32 val;
>
>  	/* set outbuf format */
> @@ -418,7 +441,21 @@ void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
>
>  	val = mxc_isi_read(pipe, CHNL_IMG_CTRL);
>  	val &= ~pdata->format_mask;
> -	val |= CHNL_IMG_CTRL_FORMAT(info->isi_out_format);
> +
> +	/*
> +	 * Before i.MX952, the ISI shifts the 10/12/14-bit formats left
> +	 * by 6, 4 and 2 bits when using CHNL_IMG_CTRL_FORMAT_RAW10/12/14
> +	 * respectively, to align the bits to the left and pad with zeros in
> +	 * the LSBs. The corresponding V4L2 formats are however right-aligned,
> +	 * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left shift.
> +	 * After i.MX952, ISI add RAW10/12/14 LSB output alignment, so skip
> +	 * the above workaround.
> +	 */
> +	fmt = !pdata->raw_out_lsb && isi_out_raw(info->isi_out_format) ?
> +	      CHNL_IMG_CTRL_FORMAT_RAW16 :
> +	      info->isi_out_format;
> +
> +	val |= CHNL_IMG_CTRL_FORMAT(fmt);
>  	mxc_isi_write(pipe, CHNL_IMG_CTRL, val);
>
>  	/* line pitch */
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> index 35dec3a650ac..c9c22a3668f9 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> @@ -20,6 +20,8 @@
>  #define CHNL_CTRL_CHAIN_BUF_NO_CHAIN				0
>  #define CHNL_CTRL_CHAIN_BUF_2_CHAIN				1
>  #define CHNL_CTRL_SW_RST					BIT(24)
> +#define CHNL_CTRL_RAW_OUT_LSB_ALIGN				BIT(23)	/* i.MX952 only */
> +#define CHNL_CTRL_RAW_IN_MSB_ALIGN				BIT(22)	/* i.MX{91,93,95,952} only */
>  /*
>   * CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
>   * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
> @@ -88,6 +90,7 @@
>  #define CHNL_IMG_CTRL_FORMAT_YUV420_3P10P			0x3a
>  #define CHNL_IMG_CTRL_FORMAT_YUV420_2P12			0x3d
>  #define CHNL_IMG_CTRL_FORMAT_YUV420_3P12			0x3e
> +#define CHNL_IMG_CTRL_FORMAT_RAW14				0x41	/* i.MX{8ULP,91,93,95,952} only */
>  #define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n)				((n) << 16)
>  #define CHNL_IMG_CTRL_GBL_ALPHA_VAL_MASK			GENMASK(23, 16)
>  #define CHNL_IMG_CTRL_GBL_ALPHA_EN				BIT(15)
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> index f45c2aae59ce..9a6a8302774c 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> @@ -221,11 +221,11 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  	/*
>  	 * RAW formats
>  	 *
> -	 * The ISI shifts the 10-bit and 12-bit formats left by 6 and 4 bits
> -	 * when using CHNL_IMG_CTRL_FORMAT_RAW10 or MXC_ISI_OUT_FMT_RAW12
> -	 * respectively, to align the bits to the left and pad with zeros in
> -	 * the LSBs. The corresponding V4L2 formats are however right-aligned,
> -	 * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left shift.
> +	 * The format entries use the native RAW10/12/14 ISI format codes.
> +	 * On platforms without hardware LSB alignment, the driver
> +	 * substitutes RAW16 at runtime in
> +	 * mxc_isi_channel_set_output_format() to avoid the left shift
> +	 * that the ISI applies to RAW10/12/14 output.
>  	 */
>  	{
>  		.mbus_code	= MEDIA_BUS_FMT_Y8_1X8,
> @@ -240,7 +240,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_Y10_1X10,
>  		.fourcc		= V4L2_PIX_FMT_Y10,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -249,7 +249,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_Y12_1X12,
>  		.fourcc		= V4L2_PIX_FMT_Y12,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -258,7 +258,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_Y14_1X14,
>  		.fourcc		= V4L2_PIX_FMT_Y14,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -312,7 +312,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SBGGR10_1X10,
>  		.fourcc		= V4L2_PIX_FMT_SBGGR10,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -321,7 +321,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SGBRG10_1X10,
>  		.fourcc		= V4L2_PIX_FMT_SGBRG10,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -330,7 +330,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
>  		.fourcc		= V4L2_PIX_FMT_SGRBG10,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -339,7 +339,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SRGGB10_1X10,
>  		.fourcc		= V4L2_PIX_FMT_SRGGB10,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW10,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -348,7 +348,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SBGGR12_1X12,
>  		.fourcc		= V4L2_PIX_FMT_SBGGR12,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -357,7 +357,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SGBRG12_1X12,
>  		.fourcc		= V4L2_PIX_FMT_SGBRG12,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -366,7 +366,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
>  		.fourcc		= V4L2_PIX_FMT_SGRBG12,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -375,7 +375,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SRGGB12_1X12,
>  		.fourcc		= V4L2_PIX_FMT_SRGGB12,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW12,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -384,7 +384,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SBGGR14_1X14,
>  		.fourcc		= V4L2_PIX_FMT_SBGGR14,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -393,7 +393,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SGBRG14_1X14,
>  		.fourcc		= V4L2_PIX_FMT_SGBRG14,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -402,7 +402,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SGRBG14_1X14,
>  		.fourcc		= V4L2_PIX_FMT_SGRBG14,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
> @@ -411,7 +411,7 @@ static const struct mxc_isi_format_info mxc_isi_formats[] = {
>  		.mbus_code	= MEDIA_BUS_FMT_SRGGB14_1X14,
>  		.fourcc		= V4L2_PIX_FMT_SRGGB14,
>  		.type		= MXC_ISI_VIDEO_CAP,
> -		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW16,
> +		.isi_out_format	= CHNL_IMG_CTRL_FORMAT_RAW14,
>  		.mem_planes	= 1,
>  		.color_planes	= 1,
>  		.depth		= { 16 },
>
> --
> 2.34.1
>
>

RE: [PATCH v2 6/6] media: imx8-isi: Enable ISI RAW10/12/14 output LSB alignment

[G.N. Zhou (OSS)]

Hi Frank,

Thanks for your review.


NXP Confidential
> -----Original Message-----
> From: Frank Li (OSS) <frank.li@oss.nxp.com>
> Sent: Monday, August 31, 2026 11:37 PM
> To: G.N. Zhou (OSS) <guoniu.zhou@oss.nxp.com>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>; Frank Li
> <frank.li@nxp.com>; Mauro Carvalho Chehab <mchehab@kernel.org>; Sascha
> Hauer <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Rob
> Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Loic Poulain
> <loic.poulain@oss.qualcomm.com>; linux-media@vger.kernel.org;
> imx@lists.linux.dev; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org
> Subject: Re: [PATCH v2 6/6] media: imx8-isi: Enable ISI RAW10/12/14 output
> LSB alignment
>
> On Mon, Aug 31, 2026 at 11:37:01AM +0800, Guoniu Zhou wrote:
> > V4L2 requires RAW formats to be LSB-aligned (right-aligned). Before
> > i.MX952, the ISI shifts RAW10/12/14 output left to MSB, so the driver
> > works around this by using RAW16 format instead.
> >
> > The i.MX952 ISI introduces a RAW output LSB alignment bit. Enable it
> > along with the input MSB alignment on platforms that support this
> > feature, so that RAW10/12/14 output formats can be used directly
> > without the RAW16 workaround.
> >
> > Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
> > ---
> >  .../media/platform/nxp/imx8-isi/imx8-isi-core.c    |  1 +
> >  .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  1 +
> >  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c  | 39
> ++++++++++++++++++++-
> >  .../media/platform/nxp/imx8-isi/imx8-isi-regs.h    |  3 ++
> >  .../media/platform/nxp/imx8-isi/imx8-isi-video.c   | 40 +++++++++++----------
> -
> >  5 files changed, 63 insertions(+), 21 deletions(-)
> >
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > index d492631dfb6d..0f776fc8fd7e 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > @@ -394,6 +394,7 @@ static const struct mxc_isi_plat_data
> mxc_imx952_data = {
> >     .format_mask            = GENMASK(30, 24),
> >     .buf_active_reverse     = true,
> >     .has_36bit_dma          = true,
> > +   .raw_out_lsb            = true,
>
> Sorry, I may miss this change before, if it is difference with imx95, needn't
> fallback to imx95. You just mention what's difference at binding doc.

I think the fallback to imx95 can still be retained for imx952. Although there is
a raw_out_lsb difference, RAW10/12/14 will still work through the RAW16 path
when this feature is not enabled, so the behavior remains compatible with imx95.

Therefore, I believe the fallback is still valid, while the raw_out_lsb difference can
be documented in the binding description.

Best Regards
G.N Zhou

>
> Frank
>
> >  };
> >
> >  /*
> > ----------------------------------------------------------------------
> > ------- diff --git
> > a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > index 73f6ea7b0ea1..c352bcf8dc47 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > @@ -166,6 +166,7 @@ struct mxc_isi_plat_data {
> >     u32 format_mask;
> >     bool buf_active_reverse;
> >     bool has_36bit_dma;
> > +   bool raw_out_lsb;
> >  };
> >
> >  struct mxc_isi_dma_buffer {
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > index 2405f7d33d0a..4838b445f279 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > @@ -308,6 +308,7 @@ static void mxc_isi_channel_set_control(struct
> mxc_isi_pipe *pipe,
> >                                     unsigned int vc,
> >                                     bool bypass)
> >  {
> > +   const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
> >     u32 val;
> >
> >     mutex_lock(&pipe->lock);
> > @@ -357,6 +358,20 @@ static void mxc_isi_channel_set_control(struct
> mxc_isi_pipe *pipe,
> >                     val |= CHNL_CTRL_VC_ID_1(vc >> 2);
> >     }
> >
> > +   if (pdata->raw_out_lsb) {
> > +           /*
> > +            * Enable RAW10/12/14 output LSB alignment to match the
> > +            * V4L2 requirement that RAW formats are LSB-aligned.
> > +            */
> > +           val |= CHNL_CTRL_RAW_OUT_LSB_ALIGN;
> > +
> > +           /*
> > +            * Align the data selection from pixel link to MSB to
> > +            * avoid data shift since the data from PL is MSB.
> > +            */
> > +           val |= CHNL_CTRL_RAW_IN_MSB_ALIGN;
> > +   }
> > +
> >     mxc_isi_write(pipe, CHNL_CTRL, val);
> >
> >     mutex_unlock(&pipe->lock);
> > @@ -406,11 +421,19 @@ void mxc_isi_channel_set_input_format(struct
> mxc_isi_pipe *pipe,
> >                   CHNL_IN_BUF_PITCH_LINE_PITCH(bpl));
> >  }
> >
> > +static bool isi_out_raw(u32 format)
> > +{
> > +   return format == CHNL_IMG_CTRL_FORMAT_RAW10 ||
> > +          format == CHNL_IMG_CTRL_FORMAT_RAW12 ||
> > +          format == CHNL_IMG_CTRL_FORMAT_RAW14; }
> > +
> >  void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
> >                                    const struct mxc_isi_format_info *info,
> >                                    struct v4l2_pix_format_mplane *format)  {
> >     const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
> > +   u32 fmt;
> >     u32 val;
> >
> >     /* set outbuf format */
> > @@ -418,7 +441,21 @@ void mxc_isi_channel_set_output_format(struct
> > mxc_isi_pipe *pipe,
> >
> >     val = mxc_isi_read(pipe, CHNL_IMG_CTRL);
> >     val &= ~pdata->format_mask;
> > -   val |= CHNL_IMG_CTRL_FORMAT(info->isi_out_format);
> > +
> > +   /*
> > +    * Before i.MX952, the ISI shifts the 10/12/14-bit formats left
> > +    * by 6, 4 and 2 bits when using
> CHNL_IMG_CTRL_FORMAT_RAW10/12/14
> > +    * respectively, to align the bits to the left and pad with zeros in
> > +    * the LSBs. The corresponding V4L2 formats are however right-aligned,
> > +    * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left
> shift.
> > +    * After i.MX952, ISI add RAW10/12/14 LSB output alignment, so skip
> > +    * the above workaround.
> > +    */
> > +   fmt = !pdata->raw_out_lsb && isi_out_raw(info->isi_out_format) ?
> > +         CHNL_IMG_CTRL_FORMAT_RAW16 :
> > +         info->isi_out_format;
> > +
> > +   val |= CHNL_IMG_CTRL_FORMAT(fmt);
> >     mxc_isi_write(pipe, CHNL_IMG_CTRL, val);
> >
> >     /* line pitch */
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > index 35dec3a650ac..c9c22a3668f9 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > @@ -20,6 +20,8 @@
> >  #define CHNL_CTRL_CHAIN_BUF_NO_CHAIN                               0
> >  #define CHNL_CTRL_CHAIN_BUF_2_CHAIN                                1
> >  #define CHNL_CTRL_SW_RST                                   BIT(24)
> > +#define CHNL_CTRL_RAW_OUT_LSB_ALIGN
>       BIT(23) /* i.MX952 only */
> > +#define CHNL_CTRL_RAW_IN_MSB_ALIGN
>       BIT(22) /* i.MX{91,93,95,952} only */
> >  /*
> >   * CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
> >   * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
> @@
> > -88,6 +90,7 @@
> >  #define CHNL_IMG_CTRL_FORMAT_YUV420_3P10P                  0x3a
> >  #define CHNL_IMG_CTRL_FORMAT_YUV420_2P12                   0x3d
> >  #define CHNL_IMG_CTRL_FORMAT_YUV420_3P12                   0x3e
> > +#define CHNL_IMG_CTRL_FORMAT_RAW14                         0x41
>       /* i.MX{8ULP,91,93,95,952} only */
> >  #define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n)                             ((n) <<
> 16)
> >  #define CHNL_IMG_CTRL_GBL_ALPHA_VAL_MASK
>       GENMASK(23, 16)
> >  #define CHNL_IMG_CTRL_GBL_ALPHA_EN
>       BIT(15)
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > index f45c2aae59ce..9a6a8302774c 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > @@ -221,11 +221,11 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >     /*
> >      * RAW formats
> >      *
> > -    * The ISI shifts the 10-bit and 12-bit formats left by 6 and 4 bits
> > -    * when using CHNL_IMG_CTRL_FORMAT_RAW10 or
> MXC_ISI_OUT_FMT_RAW12
> > -    * respectively, to align the bits to the left and pad with zeros in
> > -    * the LSBs. The corresponding V4L2 formats are however right-aligned,
> > -    * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left
> shift.
> > +    * The format entries use the native RAW10/12/14 ISI format codes.
> > +    * On platforms without hardware LSB alignment, the driver
> > +    * substitutes RAW16 at runtime in
> > +    * mxc_isi_channel_set_output_format() to avoid the left shift
> > +    * that the ISI applies to RAW10/12/14 output.
> >      */
> >     {
> >             .mbus_code      = MEDIA_BUS_FMT_Y8_1X8,
> > @@ -240,7 +240,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_Y10_1X10,
> >             .fourcc         = V4L2_PIX_FMT_Y10,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -249,7 +249,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_Y12_1X12,
> >             .fourcc         = V4L2_PIX_FMT_Y12,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -258,7 +258,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_Y14_1X14,
> >             .fourcc         = V4L2_PIX_FMT_Y14,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -312,7 +312,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SBGGR10_1X10,
> >             .fourcc         = V4L2_PIX_FMT_SBGGR10,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -321,7 +321,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SGBRG10_1X10,
> >             .fourcc         = V4L2_PIX_FMT_SGBRG10,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -330,7 +330,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SGRBG10_1X10,
> >             .fourcc         = V4L2_PIX_FMT_SGRBG10,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -339,7 +339,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SRGGB10_1X10,
> >             .fourcc         = V4L2_PIX_FMT_SRGGB10,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -348,7 +348,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SBGGR12_1X12,
> >             .fourcc         = V4L2_PIX_FMT_SBGGR12,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -357,7 +357,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SGBRG12_1X12,
> >             .fourcc         = V4L2_PIX_FMT_SGBRG12,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -366,7 +366,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SGRBG12_1X12,
> >             .fourcc         = V4L2_PIX_FMT_SGRBG12,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -375,7 +375,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SRGGB12_1X12,
> >             .fourcc         = V4L2_PIX_FMT_SRGGB12,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -384,7 +384,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SBGGR14_1X14,
> >             .fourcc         = V4L2_PIX_FMT_SBGGR14,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -393,7 +393,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SGBRG14_1X14,
> >             .fourcc         = V4L2_PIX_FMT_SGBRG14,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -402,7 +402,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SGRBG14_1X14,
> >             .fourcc         = V4L2_PIX_FMT_SGRBG14,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> > @@ -411,7 +411,7 @@ static const struct mxc_isi_format_info
> mxc_isi_formats[] = {
> >             .mbus_code      = MEDIA_BUS_FMT_SRGGB14_1X14,
> >             .fourcc         = V4L2_PIX_FMT_SRGGB14,
> >             .type           = MXC_ISI_VIDEO_CAP,
> > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> >             .mem_planes     = 1,
> >             .color_planes   = 1,
> >             .depth          = { 16 },
> >
> > --
> > 2.34.1
> >
> >

Re: [PATCH v2 6/6] media: imx8-isi: Enable ISI RAW10/12/14 output LSB alignment

[Frank Li]

On Tue, Sep 01, 2026 at 06:16:36AM +0000, G.N. Zhou (OSS) wrote:
> Hi Frank,
>
> Thanks for your review.
>
>
> NXP Confidential
> > -----Original Message-----
> > From: Frank Li (OSS) <frank.li@oss.nxp.com>
> > Sent: Monday, August 31, 2026 11:37 PM
> > To: G.N. Zhou (OSS) <guoniu.zhou@oss.nxp.com>
> > Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>; Frank Li
> > <frank.li@nxp.com>; Mauro Carvalho Chehab <mchehab@kernel.org>; Sascha
> > Hauer <s.hauer@pengutronix.de>; Pengutronix Kernel Team
> > <kernel@pengutronix.de>; Fabio Estevam <festevam@gmail.com>; Rob
> > Herring <robh@kernel.org>; Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor
> > Dooley <conor+dt@kernel.org>; Loic Poulain
> > <loic.poulain@oss.qualcomm.com>; linux-media@vger.kernel.org;
> > imx@lists.linux.dev; linux-arm-kernel@lists.infradead.org; linux-
> > kernel@vger.kernel.org; devicetree@vger.kernel.org
> > Subject: Re: [PATCH v2 6/6] media: imx8-isi: Enable ISI RAW10/12/14 output
> > LSB alignment
> >
> > On Mon, Aug 31, 2026 at 11:37:01AM +0800, Guoniu Zhou wrote:
> > > V4L2 requires RAW formats to be LSB-aligned (right-aligned). Before
> > > i.MX952, the ISI shifts RAW10/12/14 output left to MSB, so the driver
> > > works around this by using RAW16 format instead.
> > >
> > > The i.MX952 ISI introduces a RAW output LSB alignment bit. Enable it
> > > along with the input MSB alignment on platforms that support this
> > > feature, so that RAW10/12/14 output formats can be used directly
> > > without the RAW16 workaround.
> > >
> > > Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com>
> > > ---
> > >  .../media/platform/nxp/imx8-isi/imx8-isi-core.c    |  1 +
> > >  .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  1 +
> > >  drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c  | 39
> > ++++++++++++++++++++-
> > >  .../media/platform/nxp/imx8-isi/imx8-isi-regs.h    |  3 ++
> > >  .../media/platform/nxp/imx8-isi/imx8-isi-video.c   | 40 +++++++++++----------
> > -
> > >  5 files changed, 63 insertions(+), 21 deletions(-)
> > >
> > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > > index d492631dfb6d..0f776fc8fd7e 100644
> > > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > > @@ -394,6 +394,7 @@ static const struct mxc_isi_plat_data
> > mxc_imx952_data = {
> > >     .format_mask            = GENMASK(30, 24),
> > >     .buf_active_reverse     = true,
> > >     .has_36bit_dma          = true,
> > > +   .raw_out_lsb            = true,
> >
> > Sorry, I may miss this change before, if it is difference with imx95, needn't
> > fallback to imx95. You just mention what's difference at binding doc.
>
> I think the fallback to imx95 can still be retained for imx952. Although there is
> a raw_out_lsb difference, RAW10/12/14 will still work through the RAW16 path
> when this feature is not enabled, so the behavior remains compatible with imx95.
>
> Therefore, I believe the fallback is still valid, while the raw_out_lsb difference can
> be documented in the binding description.

Okay, make sense

Frank
>
> Best Regards
> G.N Zhou
>
> >
> > Frank
> >
> > >  };
> > >
> > >  /*
> > > ----------------------------------------------------------------------
> > > ------- diff --git
> > > a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > > index 73f6ea7b0ea1..c352bcf8dc47 100644
> > > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > > @@ -166,6 +166,7 @@ struct mxc_isi_plat_data {
> > >     u32 format_mask;
> > >     bool buf_active_reverse;
> > >     bool has_36bit_dma;
> > > +   bool raw_out_lsb;
> > >  };
> > >
> > >  struct mxc_isi_dma_buffer {
> > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > index 2405f7d33d0a..4838b445f279 100644
> > > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c
> > > @@ -308,6 +308,7 @@ static void mxc_isi_channel_set_control(struct
> > mxc_isi_pipe *pipe,
> > >                                     unsigned int vc,
> > >                                     bool bypass)
> > >  {
> > > +   const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
> > >     u32 val;
> > >
> > >     mutex_lock(&pipe->lock);
> > > @@ -357,6 +358,20 @@ static void mxc_isi_channel_set_control(struct
> > mxc_isi_pipe *pipe,
> > >                     val |= CHNL_CTRL_VC_ID_1(vc >> 2);
> > >     }
> > >
> > > +   if (pdata->raw_out_lsb) {
> > > +           /*
> > > +            * Enable RAW10/12/14 output LSB alignment to match the
> > > +            * V4L2 requirement that RAW formats are LSB-aligned.
> > > +            */
> > > +           val |= CHNL_CTRL_RAW_OUT_LSB_ALIGN;
> > > +
> > > +           /*
> > > +            * Align the data selection from pixel link to MSB to
> > > +            * avoid data shift since the data from PL is MSB.
> > > +            */
> > > +           val |= CHNL_CTRL_RAW_IN_MSB_ALIGN;
> > > +   }
> > > +
> > >     mxc_isi_write(pipe, CHNL_CTRL, val);
> > >
> > >     mutex_unlock(&pipe->lock);
> > > @@ -406,11 +421,19 @@ void mxc_isi_channel_set_input_format(struct
> > mxc_isi_pipe *pipe,
> > >                   CHNL_IN_BUF_PITCH_LINE_PITCH(bpl));
> > >  }
> > >
> > > +static bool isi_out_raw(u32 format)
> > > +{
> > > +   return format == CHNL_IMG_CTRL_FORMAT_RAW10 ||
> > > +          format == CHNL_IMG_CTRL_FORMAT_RAW12 ||
> > > +          format == CHNL_IMG_CTRL_FORMAT_RAW14; }
> > > +
> > >  void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe,
> > >                                    const struct mxc_isi_format_info *info,
> > >                                    struct v4l2_pix_format_mplane *format)  {
> > >     const struct mxc_isi_plat_data *pdata = pipe->isi->pdata;
> > > +   u32 fmt;
> > >     u32 val;
> > >
> > >     /* set outbuf format */
> > > @@ -418,7 +441,21 @@ void mxc_isi_channel_set_output_format(struct
> > > mxc_isi_pipe *pipe,
> > >
> > >     val = mxc_isi_read(pipe, CHNL_IMG_CTRL);
> > >     val &= ~pdata->format_mask;
> > > -   val |= CHNL_IMG_CTRL_FORMAT(info->isi_out_format);
> > > +
> > > +   /*
> > > +    * Before i.MX952, the ISI shifts the 10/12/14-bit formats left
> > > +    * by 6, 4 and 2 bits when using
> > CHNL_IMG_CTRL_FORMAT_RAW10/12/14
> > > +    * respectively, to align the bits to the left and pad with zeros in
> > > +    * the LSBs. The corresponding V4L2 formats are however right-aligned,
> > > +    * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left
> > shift.
> > > +    * After i.MX952, ISI add RAW10/12/14 LSB output alignment, so skip
> > > +    * the above workaround.
> > > +    */
> > > +   fmt = !pdata->raw_out_lsb && isi_out_raw(info->isi_out_format) ?
> > > +         CHNL_IMG_CTRL_FORMAT_RAW16 :
> > > +         info->isi_out_format;
> > > +
> > > +   val |= CHNL_IMG_CTRL_FORMAT(fmt);
> > >     mxc_isi_write(pipe, CHNL_IMG_CTRL, val);
> > >
> > >     /* line pitch */
> > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > > index 35dec3a650ac..c9c22a3668f9 100644
> > > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h
> > > @@ -20,6 +20,8 @@
> > >  #define CHNL_CTRL_CHAIN_BUF_NO_CHAIN                               0
> > >  #define CHNL_CTRL_CHAIN_BUF_2_CHAIN                                1
> > >  #define CHNL_CTRL_SW_RST                                   BIT(24)
> > > +#define CHNL_CTRL_RAW_OUT_LSB_ALIGN
> >       BIT(23) /* i.MX952 only */
> > > +#define CHNL_CTRL_RAW_IN_MSB_ALIGN
> >       BIT(22) /* i.MX{91,93,95,952} only */
> > >  /*
> > >   * CHNL_CTRL_BLANK_PXL: i.MX8{QM,QXP} only
> > >   * CHNL_CTRL_VC_ID_1, CHNL_CTRL_VC_ID_1_MASK: i.MX{95,952} only
> > @@
> > > -88,6 +90,7 @@
> > >  #define CHNL_IMG_CTRL_FORMAT_YUV420_3P10P                  0x3a
> > >  #define CHNL_IMG_CTRL_FORMAT_YUV420_2P12                   0x3d
> > >  #define CHNL_IMG_CTRL_FORMAT_YUV420_3P12                   0x3e
> > > +#define CHNL_IMG_CTRL_FORMAT_RAW14                         0x41
> >       /* i.MX{8ULP,91,93,95,952} only */
> > >  #define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n)                             ((n) <<
> > 16)
> > >  #define CHNL_IMG_CTRL_GBL_ALPHA_VAL_MASK
> >       GENMASK(23, 16)
> > >  #define CHNL_IMG_CTRL_GBL_ALPHA_EN
> >       BIT(15)
> > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > > b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > > index f45c2aae59ce..9a6a8302774c 100644
> > > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c
> > > @@ -221,11 +221,11 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >     /*
> > >      * RAW formats
> > >      *
> > > -    * The ISI shifts the 10-bit and 12-bit formats left by 6 and 4 bits
> > > -    * when using CHNL_IMG_CTRL_FORMAT_RAW10 or
> > MXC_ISI_OUT_FMT_RAW12
> > > -    * respectively, to align the bits to the left and pad with zeros in
> > > -    * the LSBs. The corresponding V4L2 formats are however right-aligned,
> > > -    * we have to use CHNL_IMG_CTRL_FORMAT_RAW16 to avoid the left
> > shift.
> > > +    * The format entries use the native RAW10/12/14 ISI format codes.
> > > +    * On platforms without hardware LSB alignment, the driver
> > > +    * substitutes RAW16 at runtime in
> > > +    * mxc_isi_channel_set_output_format() to avoid the left shift
> > > +    * that the ISI applies to RAW10/12/14 output.
> > >      */
> > >     {
> > >             .mbus_code      = MEDIA_BUS_FMT_Y8_1X8,
> > > @@ -240,7 +240,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_Y10_1X10,
> > >             .fourcc         = V4L2_PIX_FMT_Y10,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -249,7 +249,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_Y12_1X12,
> > >             .fourcc         = V4L2_PIX_FMT_Y12,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -258,7 +258,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_Y14_1X14,
> > >             .fourcc         = V4L2_PIX_FMT_Y14,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -312,7 +312,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SBGGR10_1X10,
> > >             .fourcc         = V4L2_PIX_FMT_SBGGR10,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -321,7 +321,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SGBRG10_1X10,
> > >             .fourcc         = V4L2_PIX_FMT_SGBRG10,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -330,7 +330,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SGRBG10_1X10,
> > >             .fourcc         = V4L2_PIX_FMT_SGRBG10,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -339,7 +339,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SRGGB10_1X10,
> > >             .fourcc         = V4L2_PIX_FMT_SRGGB10,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW10,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -348,7 +348,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SBGGR12_1X12,
> > >             .fourcc         = V4L2_PIX_FMT_SBGGR12,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -357,7 +357,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SGBRG12_1X12,
> > >             .fourcc         = V4L2_PIX_FMT_SGBRG12,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -366,7 +366,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SGRBG12_1X12,
> > >             .fourcc         = V4L2_PIX_FMT_SGRBG12,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -375,7 +375,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SRGGB12_1X12,
> > >             .fourcc         = V4L2_PIX_FMT_SRGGB12,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW12,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -384,7 +384,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SBGGR14_1X14,
> > >             .fourcc         = V4L2_PIX_FMT_SBGGR14,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -393,7 +393,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SGBRG14_1X14,
> > >             .fourcc         = V4L2_PIX_FMT_SGBRG14,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -402,7 +402,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SGRBG14_1X14,
> > >             .fourcc         = V4L2_PIX_FMT_SGRBG14,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > > @@ -411,7 +411,7 @@ static const struct mxc_isi_format_info
> > mxc_isi_formats[] = {
> > >             .mbus_code      = MEDIA_BUS_FMT_SRGGB14_1X14,
> > >             .fourcc         = V4L2_PIX_FMT_SRGGB14,
> > >             .type           = MXC_ISI_VIDEO_CAP,
> > > -           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW16,
> > > +           .isi_out_format = CHNL_IMG_CTRL_FORMAT_RAW14,
> > >             .mem_planes     = 1,
> > >             .color_planes   = 1,
> > >             .depth          = { 16 },
> > >
> > > --
> > > 2.34.1
> > >
> > >