From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: "Cosmin Tanislav" <cosmin-gabriel.tanislav.xa@renesas.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Prabhakar <prabhakar.csengg+renesas@gmail.com>,
"Biju Das" <biju.das.jz@bp.renesas.com>,
"Fabrizio Castro" <fabrizio.castro.jz@renesas.com>,
"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 2/8] iio: adc: rzt2h: Wait for the analog part to stop after a forced stop
Date: Wed, 30 Sep 2026 12:23:42 +0300 [thread overview]
Message-ID: <arzVHnMtKqQx5rdZ@ashevche-desk.local> (raw)
In-Reply-To: <20260929124248.237032-3-prabhakar.mahadev-lad.rj@bp.renesas.com>
On Tue, Sep 29, 2026 at 01:42:42PM +0100, Prabhakar wrote:
> When ADCSR.ADST is cleared to forcibly stop a conversion, the analog part
> of the A/D converter can take up to 2 ADCLK cycles to stop operating.
>
> Wait for the write to ADCSR to complete and allow the analog part to stop
> before reconfiguring or restarting the converter.
...
> + /*
> + * When a conversion is forcibly stopped, the analog part of the A/D
> + * converter takes up to 2 ADCLK cycles to stop operating.
> + */
> + ndelay(DIV_ROUND_UP_ULL((u64)RZT2H_ADC_STOP_CYCLES * NSEC_PER_SEC,
> + adc->adclk_rate));
I do not see the point in having _ULL (64-bit) division. Do you?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-09-30 9:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 12:42 [PATCH 0/8] Add ADC support for RZ/V2H(P) and RZ/V2N SoCs Prabhakar
2026-09-29 12:42 ` [PATCH 1/8] dt-bindings: iio: adc: renesas,r9a09g077-adc: Add RZ/V2H(P) and RZ/V2N support Prabhakar
2026-09-29 12:42 ` [PATCH 2/8] iio: adc: rzt2h: Wait for the analog part to stop after a forced stop Prabhakar
2026-09-29 12:51 ` sashiko-bot
2026-09-30 9:23 ` Andy Shevchenko [this message]
2026-09-30 16:45 ` Lad, Prabhakar
2026-09-29 12:42 ` [PATCH 3/8] iio: adc: rzt2h: Add chip-specific configuration Prabhakar
2026-09-30 9:26 ` Andy Shevchenko
2026-09-30 16:59 ` Lad, Prabhakar
2026-09-29 12:42 ` [PATCH 4/8] iio: adc: rzt2h: Add optional reset support Prabhakar
2026-09-29 12:58 ` sashiko-bot
2026-09-29 12:42 ` [PATCH 5/8] iio: adc: rzt2h: Prepare for SoCs without sample state registers Prabhakar
2026-09-29 12:42 ` [PATCH 6/8] iio: adc: rzt2h: Prepare for SoCs with different ADC info Prabhakar
2026-09-29 12:42 ` [PATCH 7/8] iio: adc: rzt2h: Use scan type for ADC scale Prabhakar
2026-09-30 9:28 ` Andy Shevchenko
2026-09-30 17:03 ` Lad, Prabhakar
2026-09-29 12:42 ` [PATCH 8/8] iio: adc: rzt2h: Add support for RZ/V2H(P) SoC Prabhakar
2026-09-30 9:35 ` Andy Shevchenko
2026-09-30 17:14 ` Lad, Prabhakar
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