From: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Bryan O'Donoghue <bod@kernel.org>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Subject: Re: [PATCH v7 11/18] media: iris: Add framework support for AR50_LITE video core
Date: Fri, 17 Jul 2026 10:00:26 +0530 [thread overview]
Message-ID: <b9285a2b-af62-2df1-9a09-84ff11e59fde@oss.qualcomm.com> (raw)
In-Reply-To: <20260709-iris-ar50lt-v7-11-76af9dd4d1f6@oss.qualcomm.com>
On 7/9/2026 7:12 PM, Dmitry Baryshkov wrote:
> From: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
>
> Add power sequence for ar5lt core.
> Add register handling for ar50lt by hooking up vpu op with ar50lt
> specific implemtation or resue from earlier generation wherever
> feasible.
>
> Signed-off-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> drivers/media/platform/qcom/iris/Makefile | 1 +
> .../platform/qcom/iris/iris_platform_common.h | 2 +
> drivers/media/platform/qcom/iris/iris_vpu2.c | 28 +----
> drivers/media/platform/qcom/iris/iris_vpu_ar50lt.c | 130 +++++++++++++++++++++
> drivers/media/platform/qcom/iris/iris_vpu_common.c | 29 ++++-
> drivers/media/platform/qcom/iris/iris_vpu_common.h | 2 +
> 6 files changed, 164 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/platform/qcom/iris/Makefile
> index 48e415cbc439..f1b204b95694 100644
> --- a/drivers/media/platform/qcom/iris/Makefile
> +++ b/drivers/media/platform/qcom/iris/Makefile
> @@ -26,6 +26,7 @@ qcom-iris-objs += iris_buffer.o \
> iris_vpu2.o \
> iris_vpu3x.o \
> iris_vpu4x.o \
> + iris_vpu_ar50lt.o \
> iris_vpu_buffer.o \
> iris_vpu_common.o \
>
> diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h
> index accc1627defd..6a189489369f 100644
> --- a/drivers/media/platform/qcom/iris/iris_platform_common.h
> +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
> @@ -74,6 +74,7 @@ enum platform_clk_type {
> IRIS_VPP0_HW_CLK,
> IRIS_VPP1_HW_CLK,
> IRIS_APV_HW_CLK,
> + IRIS_THROTTLE_CLK,
> };
>
> struct platform_clk_data {
> @@ -315,6 +316,7 @@ struct iris_platform_data {
> u32 tz_cp_config_data_size;
> u32 num_vpp_pipe;
> bool no_aon;
> + bool no_rpmh;
> u32 wd_intr_mask;
> u32 icc_ib_multiplier;
> u32 max_session_count;
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/platform/qcom/iris/iris_vpu2.c
> index dd2eeae0d9eb..5419a5096b00 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu2.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c
> @@ -12,38 +12,12 @@
>
> #include "iris_vpu_register_defines.h"
>
> -static u64 iris_vpu2_calc_freq(struct iris_inst *inst, size_t data_size)
> -{
> - struct platform_inst_caps *caps = inst->core->iris_platform_data->inst_caps;
> - struct v4l2_format *inp_f = inst->fmt_src;
> - u32 mbs_per_second, mbpf, height, width;
> - unsigned long vpp_freq, vsp_freq;
> - u32 fps = inst->frame_rate;
> -
> - width = max(inp_f->fmt.pix_mp.width, inst->crop.width);
> - height = max(inp_f->fmt.pix_mp.height, inst->crop.height);
> -
> - mbpf = NUM_MBS_PER_FRAME(height, width);
> - mbs_per_second = mbpf * fps;
> -
> - vpp_freq = mbs_per_second * caps->mb_cycles_vpp;
> -
> - /* 21 / 20 is overhead factor */
> - vpp_freq += vpp_freq / 20;
> - vsp_freq = mbs_per_second * caps->mb_cycles_vsp;
> -
> - /* 10 / 7 is overhead factor */
> - vsp_freq += ((fps * data_size * 8) * 10) / 7;
> -
> - return max(vpp_freq, vsp_freq);
> -}
> -
> const struct vpu_ops iris_vpu2_ops = {
> .power_off_hw = iris_vpu_power_off_hw,
> .power_on_hw = iris_vpu_power_on_hw,
> .power_off_controller = iris_vpu_power_off_controller,
> .power_on_controller = iris_vpu_power_on_controller,
> - .calc_freq = iris_vpu2_calc_freq,
> + .calc_freq = iris_vpu2_calculate_frequency,
> .set_hwmode = iris_vpu_set_hwmode,
> .set_preset_registers = iris_vpu_set_preset_registers,
> .interrupt_init = iris_vpu_interrupt_init,
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_ar50lt.c b/drivers/media/platform/qcom/iris/iris_vpu_ar50lt.c
> new file mode 100644
> index 000000000000..e084a5b49f2e
> --- /dev/null
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_ar50lt.c
> @@ -0,0 +1,130 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2026 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +#include <linux/bits.h>
> +#include <linux/iopoll.h>
> +#include <linux/reset.h>
> +
> +#include "iris_instance.h"
> +#include "iris_vpu_common.h"
> +
> +#include "iris_vpu_register_defines.h"
> +
> +#define WRAPPER_INTR_MASK_A2HVCODEC_BMSK_AR50LT BIT(3)
> +
> +#define WRAPPER_VCODEC0_CLOCK_CONFIG_AR50LT 0xb0080
> +
> +#define CPU_CS_VCICMD 0xa0020
> +#define CPU_CS_VCICMD_ARP_OFF 0x1
> +
> +static void iris_vpu_ar50lt_set_preset_registers(struct iris_core *core)
> +{
> + writel(0x0, core->reg_base + WRAPPER_VCODEC0_CLOCK_CONFIG_AR50LT);
> +}
> +
> +static void iris_vpu_ar50lt_interrupt_init(struct iris_core *core)
> +{
> + writel(WRAPPER_INTR_MASK_A2HVCODEC_BMSK_AR50LT, core->reg_base + WRAPPER_INTR_MASK);
> +}
> +
> +static void iris_vpu_ar50lt_disable_arp(struct iris_core *core)
> +{
> + writel(CPU_CS_VCICMD_ARP_OFF, core->reg_base + CPU_CS_VCICMD);
> +}
> +
> +static int iris_vpu_ar50lt_power_off_controller(struct iris_core *core)
> +{
> + iris_disable_unprepare_clock(core, IRIS_AHB_CLK);
> + iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
> + iris_disable_unprepare_clock(core, IRIS_CTRL_CLK);
> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
> +
> + return 0;
> +}
> +
> +static void iris_vpu_ar50lt_power_off_hw(struct iris_core *core)
> +{
> + dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], false);
> + iris_disable_unprepare_clock(core, IRIS_THROTTLE_CLK);
> + iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK);
> + iris_disable_unprepare_clock(core, IRIS_HW_CLK);
> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
> +}
> +
> +static int iris_vpu_ar50lt_power_on_controller(struct iris_core *core)
> +{
> + int ret;
> +
> + ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
> + if (ret)
> + return ret;
> +
> + ret = iris_prepare_enable_clock(core, IRIS_CTRL_CLK);
> + if (ret)
> + goto err_disable_power;
> +
> + ret = iris_prepare_enable_clock(core, IRIS_AXI_CLK);
> + if (ret && ret != -ENOENT)
> + goto err_disable_ctrl_clock;
> +
> + ret = iris_prepare_enable_clock(core, IRIS_AHB_CLK);
> + if (ret)
> + goto err_disable_axi_clock;
> +
> + return 0;
> +
> +err_disable_axi_clock:
> + iris_disable_unprepare_clock(core, IRIS_AXI_CLK);
> +err_disable_ctrl_clock:
> + iris_disable_unprepare_clock(core, IRIS_CTRL_CLK);
> +err_disable_power:
> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]);
> +
> + return ret;
> +}
> +
> +static int iris_vpu_ar50lt_power_on_hw(struct iris_core *core)
> +{
> + int ret;
> +
> + ret = iris_enable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
> + if (ret)
> + return ret;
> +
> + ret = iris_prepare_enable_clock(core, IRIS_HW_CLK);
> + if (ret)
> + goto err_disable_power;
> +
> + ret = iris_prepare_enable_clock(core, IRIS_HW_AHB_CLK);
> + if (ret)
> + goto err_disable_hw_clock;
> +
> + ret = iris_prepare_enable_clock(core, IRIS_THROTTLE_CLK);
> + if (ret)
> + goto err_disable_hw_ahb_clock;
> +
> + return 0;
> +
> +err_disable_hw_ahb_clock:
> + iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK);
> +err_disable_hw_clock:
> + iris_disable_unprepare_clock(core, IRIS_HW_CLK);
> +err_disable_power:
> + iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
> +
> + return ret;
> +}
> +
> +const struct vpu_ops iris_vpu_ar50lt_ops = {
> + .power_off_hw = iris_vpu_ar50lt_power_off_hw,
> + .power_on_hw = iris_vpu_ar50lt_power_on_hw,
> + .power_off_controller = iris_vpu_ar50lt_power_off_controller,
> + .power_on_controller = iris_vpu_ar50lt_power_on_controller,
> + .calc_freq = iris_vpu2_calculate_frequency,
> + .set_hwmode = iris_vpu_set_hwmode,
> + .set_preset_registers = iris_vpu_ar50lt_set_preset_registers,
> + .interrupt_init = iris_vpu_ar50lt_interrupt_init,
> + .disable_arp = iris_vpu_ar50lt_disable_arp,
> +};
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> index 41498f94480e..d64e7745a63d 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> @@ -97,7 +97,8 @@ int iris_vpu_boot_firmware(struct iris_core *core)
> }
>
> writel(HOST2XTENSA_INTR_ENABLE, core->reg_base + CPU_CS_H2XSOFTINTEN);
> - writel(0x0, core->reg_base + CPU_CS_X2RPMH);
> + if (!core->iris_platform_data->no_rpmh)
> + writel(0x0, core->reg_base + CPU_CS_X2RPMH);
>
> return 0;
> }
> @@ -422,6 +423,32 @@ void iris_vpu35_vpu4x_program_bootup_registers(struct iris_core *core)
> writel(0x1, core->reg_base + WRAPPER_IRIS_VCODEC_VPU_WRAPPER_SPARE_0);
> }
>
> +u64 iris_vpu2_calculate_frequency(struct iris_inst *inst, size_t data_size)
> +{
> + struct platform_inst_caps *caps = inst->core->iris_platform_data->inst_caps;
> + struct v4l2_format *inp_f = inst->fmt_src;
> + u32 mbs_per_second, mbpf, height, width;
> + unsigned long vpp_freq, vsp_freq;
> + u32 fps = inst->frame_rate;
> +
> + width = max(inp_f->fmt.pix_mp.width, inst->crop.width);
> + height = max(inp_f->fmt.pix_mp.height, inst->crop.height);
> +
> + mbpf = NUM_MBS_PER_FRAME(height, width);
> + mbs_per_second = mbpf * fps;
> +
> + vpp_freq = mbs_per_second * caps->mb_cycles_vpp;
> +
> + /* 21 / 20 is overhead factor */
> + vpp_freq += vpp_freq / 20;
> + vsp_freq = mbs_per_second * caps->mb_cycles_vsp;
> +
> + /* 10 / 7 is overhead factor */
> + vsp_freq += ((fps * data_size * 8) * 10) / 7;
> +
> + return max(vpp_freq, vsp_freq);
> +}
> +
> u64 iris_vpu3x_vpu4x_calculate_frequency(struct iris_inst *inst, size_t data_size)
> {
> struct platform_inst_caps *caps = inst->core->iris_platform_data->inst_caps;
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/media/platform/qcom/iris/iris_vpu_common.h
> index 71d96921ed37..a62b6184bde7 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h
> @@ -13,6 +13,7 @@ extern const struct vpu_ops iris_vpu3_ops;
> extern const struct vpu_ops iris_vpu33_ops;
> extern const struct vpu_ops iris_vpu35_ops;
> extern const struct vpu_ops iris_vpu4x_ops;
> +extern const struct vpu_ops iris_vpu_ar50lt_ops;
>
> struct vpu_ops {
> void (*power_off_hw)(struct iris_core *core);
> @@ -40,6 +41,7 @@ int iris_vpu_power_on(struct iris_core *core);
> int iris_vpu_power_off_controller(struct iris_core *core);
> void iris_vpu_power_off_hw(struct iris_core *core);
> void iris_vpu_power_off(struct iris_core *core);
> +u64 iris_vpu2_calculate_frequency(struct iris_inst *inst, size_t data_size);
> int iris_vpu35_vpu4x_power_off_controller(struct iris_core *core);
> int iris_vpu35_vpu4x_power_on_controller(struct iris_core *core);
> void iris_vpu35_vpu4x_program_bootup_registers(struct iris_core *core);
Reviewed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
next prev parent reply other threads:[~2026-07-17 4:30 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 13:41 [PATCH v7 00/18] media: iris: Add AR50LT core support and enable Agatti platform Dmitry Baryshkov
2026-07-09 13:41 ` [PATCH v7 01/18] media: iris: Add Gen2 firmware autodetect and fallback Dmitry Baryshkov
2026-07-09 13:58 ` sashiko-bot
2026-07-10 4:23 ` Vishnu Reddy
2026-07-21 13:49 ` Vikash Garodia
2026-07-21 22:15 ` Bryan O'Donoghue
2026-07-21 22:17 ` Dmitry Baryshkov
2026-07-09 13:41 ` [PATCH v7 02/18] media: iris: Skip UBWC configuration when not supported Dmitry Baryshkov
2026-07-09 13:41 ` [PATCH v7 03/18] media: iris: drop IRIS_FMT_foo enumeration Dmitry Baryshkov
2026-07-17 3:38 ` Vishnu Reddy
2026-07-09 13:41 ` [PATCH v7 04/18] media: iris: Filter UBWC raw formats based on hardware capabilities Dmitry Baryshkov
2026-07-17 3:46 ` Vishnu Reddy
2026-07-21 14:07 ` Vikash Garodia
2026-07-21 15:04 ` Dmitry Baryshkov
2026-07-21 16:23 ` Vikash Garodia
2026-07-21 22:16 ` Bryan O'Donoghue
2026-07-22 5:54 ` Vikash Garodia
2026-07-09 13:41 ` [PATCH v7 05/18] media: iris: Introduce set_preset_register as a vpu_op Dmitry Baryshkov
2026-07-09 13:41 ` [PATCH v7 06/18] media: iris: Introduce interrupt_init " Dmitry Baryshkov
2026-07-09 13:41 ` [PATCH v7 07/18] media: iris: add vpu op hook to disable ARP buffer Dmitry Baryshkov
2026-07-09 13:41 ` [PATCH v7 08/18] media: iris: Add platform data field for watchdog interrupt mask Dmitry Baryshkov
2026-07-09 13:42 ` [PATCH v7 09/18] media: iris: Add platform flag for instantaneous bandwidth voting Dmitry Baryshkov
2026-07-09 13:59 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v7 10/18] media: iris: skip PIPE if it is not supported by the platform Dmitry Baryshkov
2026-07-09 14:14 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v7 11/18] media: iris: Add framework support for AR50_LITE video core Dmitry Baryshkov
2026-07-09 13:59 ` sashiko-bot
2026-07-10 10:25 ` Vikash Garodia
2026-07-17 4:30 ` Vishnu Reddy [this message]
2026-07-09 13:42 ` [PATCH v7 12/18] media: iris: add minimal GET_PROPERTY implementation Dmitry Baryshkov
2026-07-09 14:06 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v7 13/18] media: iris: update buffer requirements based on received info Dmitry Baryshkov
2026-07-09 14:05 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v7 14/18] media: iris: implement support for the Agatti platform Dmitry Baryshkov
2026-07-09 14:19 ` sashiko-bot
2026-07-21 15:23 ` Vikash Garodia
2026-07-09 13:42 ` [PATCH v7 15/18] media: iris: Introduce buffer size calculations for AR50LT Dmitry Baryshkov
2026-07-09 14:09 ` sashiko-bot
2026-07-21 15:30 ` Vikash Garodia
2026-07-21 20:30 ` Dmitry Baryshkov
2026-07-09 13:42 ` [PATCH v7 16/18] media: iris: add Gen2 firmware support on the Agatti platform Dmitry Baryshkov
2026-07-09 14:25 ` sashiko-bot
2026-07-09 13:42 ` [PATCH v7 17/18] media: venus: skip QCM2290 if Iris driver is enabled Dmitry Baryshkov
2026-07-09 13:42 ` [PATCH v7 18/18] media: iris: constify inst_fw_cap_sm8250_dec Dmitry Baryshkov
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