* [PATCH] arm64: dts: qcom: kaanapali: enable ETR and CTCU devices
@ 2026-07-14 8:05 Jie Gan
2026-07-15 9:39 ` Konrad Dybcio
0 siblings, 1 reply; 2+ messages in thread
From: Jie Gan @ 2026-07-14 8:05 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tingwei Zhang
Cc: linux-arm-msm, devicetree, linux-kernel, Jie Gan
Embedded Trace Router(ETR) is working as a DDR memory sink to collect
tracing data from source device and the CTCU device serves as the
control unit for the ETR device.
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 176 ++++++++++++++++++++++++++++++++
1 file changed, 176 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
index 0bf664cd4b40..07a0b00dfb62 100644
--- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
+++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
@@ -4984,6 +4984,35 @@ card-detect-pins {
};
};
+ ctcu@10001000 {
+ compatible = "qcom,kaanapali-ctcu", "qcom,sa8775p-ctcu";
+ reg = <0x0 0x10001000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ctcu_in0: endpoint {
+ remote-endpoint = <&tmc_etr_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ctcu_in1: endpoint {
+ remote-endpoint = <&tmc_etr1_out>;
+ };
+ };
+ };
+ };
+
stm@10002000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0x0 0x10002000 0x0 0x1000>,
@@ -5123,6 +5152,121 @@ funnel_in0_out: endpoint {
};
};
+ replicator@10046000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x10046000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ replicator_qdss_in: endpoint {
+ remote-endpoint = <&replicator_swao_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ replicator_qdss_out: endpoint {
+ remote-endpoint = <&replicator_etr_in>;
+ };
+ };
+ };
+ };
+
+ tmc@10048000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x10048000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ iommus = <&apps_smmu 0x04e0 0x0>;
+ arm,scatter-gather;
+
+ in-ports {
+ port {
+ tmc_etr_in: endpoint {
+ remote-endpoint = <&replicator_etr_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ tmc_etr_out: endpoint {
+ remote-endpoint = <&ctcu_in0>;
+ };
+ };
+ };
+ };
+
+ replicator@1004e000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1004e000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ replicator_etr_in: endpoint {
+ remote-endpoint = <&replicator_qdss_out>;
+ };
+ };
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ replicator_etr_out0: endpoint {
+ remote-endpoint = <&tmc_etr_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ replicator_etr_out1: endpoint {
+ remote-endpoint = <&tmc_etr1_in>;
+ };
+ };
+ };
+ };
+
+ tmc@1004f000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x1004f000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ iommus = <&apps_smmu 0x0500 0x0>;
+ arm,scatter-gather;
+
+ in-ports {
+ port {
+ tmc_etr1_in: endpoint {
+ remote-endpoint = <&replicator_etr_out1>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ tmc_etr1_out: endpoint {
+ remote-endpoint = <&ctcu_in1>;
+ };
+ };
+ };
+ };
+
tpdm@11000000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x11000000 0x0 0x1000>;
@@ -5937,6 +6081,38 @@ tmc_etf_in: endpoint {
};
};
};
+
+ out-ports {
+ port {
+ tmc_etf_out: endpoint {
+ remote-endpoint = <&replicator_swao_in>;
+ };
+ };
+ };
+ };
+
+ replicator@11306000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x11306000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ replicator_swao_in: endpoint {
+ remote-endpoint = <&tmc_etf_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ replicator_swao_out0: endpoint {
+ remote-endpoint = <&replicator_qdss_in>;
+ };
+ };
+ };
};
tpda@11308000 {
---
base-commit: 49362394dad7df66c274c867a271394c10ca2bb8
change-id: 20260714-add-etr-ctcu-for-kaanapali-9aa6b297778c
Best regards,
--
Jie Gan <jie.gan@oss.qualcomm.com>
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] arm64: dts: qcom: kaanapali: enable ETR and CTCU devices
2026-07-14 8:05 [PATCH] arm64: dts: qcom: kaanapali: enable ETR and CTCU devices Jie Gan
@ 2026-07-15 9:39 ` Konrad Dybcio
0 siblings, 0 replies; 2+ messages in thread
From: Konrad Dybcio @ 2026-07-15 9:39 UTC (permalink / raw)
To: Jie Gan, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Tingwei Zhang
Cc: linux-arm-msm, devicetree, linux-kernel
On 7/14/26 10:05 AM, Jie Gan wrote:
> Embedded Trace Router(ETR) is working as a DDR memory sink to collect
> tracing data from source device and the CTCU device serves as the
> control unit for the ETR device.
>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2026-07-15 9:39 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-07-14 8:05 [PATCH] arm64: dts: qcom: kaanapali: enable ETR and CTCU devices Jie Gan
2026-07-15 9:39 ` Konrad Dybcio
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox