From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org,
devicetree@vger.kernel.org,
Neil Armstrong <neil.armstrong@linaro.org>
Subject: Re: [PATCH 3/6] drm/msm/adreno: Allow specifying default speedbin value
Date: Wed, 10 Apr 2024 13:47:00 +0200 [thread overview]
Message-ID: <c547e19c-158a-4512-b2d9-01668b7ac2f0@linaro.org> (raw)
In-Reply-To: <CAA8EJprAcBDEwYeGJZ=JX2qkS4wQEraXsgCiCyZU3z1ksuxivw@mail.gmail.com>
On 4/9/24 20:31, Dmitry Baryshkov wrote:
> On Tue, 9 Apr 2024 at 21:27, Konrad Dybcio <konrad.dybcio@linaro.org> wrote:
>>
>>
>>
>> On 4/9/24 20:15, Dmitry Baryshkov wrote:
>>> On Tue, Apr 09, 2024 at 08:07:56PM +0200, Konrad Dybcio wrote:
>>>>
>>>>
>>>> On 4/9/24 20:04, Dmitry Baryshkov wrote:
>>>>> On Tue, Apr 09, 2024 at 10:12:00AM -0700, Rob Clark wrote:
>>>>>> On Tue, Apr 9, 2024 at 8:23 AM Dmitry Baryshkov
>>>>>> <dmitry.baryshkov@linaro.org> wrote:
>>>>>>>
>>>>>>> On Tue, Apr 09, 2024 at 05:12:46PM +0200, Konrad Dybcio wrote:
>>>>>>>>
>>>>>>>>
>>>>>>>> On 4/6/24 04:56, Dmitry Baryshkov wrote:
>>>>>>>>> On Fri, Apr 05, 2024 at 10:41:31AM +0200, Konrad Dybcio wrote:
>>>>>>>>>> From: Neil Armstrong <neil.armstrong@linaro.org>
>>>>>>>>>>
>>>>>>>>>> Usually, speedbin 0 is the "super SKU", a.k.a the one which can clock
>>>>>>>>>> the highest. Falling back to it when things go wrong is largely
>>>>>>>>>> suboptimal, as more often than not, the top frequencies are not
>>>>>>>>>> supposed to work on other bins.
>>>>>>>>>
>>>>>>>>> Isn't it better to just return an error here instead of trying to guess
>>>>>>>>> which speedbin to use?
>>>>>>>>
>>>>>>>> Not sure. I'd rather better compatibility for e.g. booting up a new
>>>>>>>> laptop with just dt.
>>>>>>>
>>>>>>> New speedbin can have lower max speed, so by attempting to run it at
>>>>>>> higher freq you might be breaking it.
>>>>>>
>>>>>> Usually there are some OPPs in common to all speedbins, so picking a
>>>>>> freq from that set would seem like the safe thing to do
>>>>>
>>>>> Well, the issue is about an uknown speed bin. So in theory we know
>>>>> nothing about the set of speeds itsupports. My point is that we should
>>>>> simplfy fail in such case.
>>>>
>>>> Or we could allow e.g. the lowest frequency (or 2) which if often shared
>>>> across the board to work, giving a compromise between OOBE and sanity
>>>
>>> That's also an option. But we should not be using existing speed table for
>>> the unknown bin.
>>
>> I derived this logic from msm-5.15 where it's "intended behavior".. I
>> suppose we can do better as you said though
>>
>> There have been cases in the past where the default speed bin ended up
>> having a higher max freq than subsequent ones, and I don't think I can
>> trust this product/feature code approach to guarantee this never
>> happening again.
>>
>> So. I think sticking to a single lowest freq and printing a big red line
>> in dmesg makes sense here
>
> Make 0x80 the default supported-hw, make sure that the lowest freq has
> 0xff. Plus big-red-line.
> And hope that we'll never see 16 speed bins for the hardware.
opp-supported-hw is a u32 bitmask fwiw
I was thinking, either 0xffffffff or some driver-side hackery
(dev_pm_opp_enable).
Perhaps I'd be more in favor of the latter, as putting meaningless gobblygoo
in dt is not good
Konrad
next prev parent reply other threads:[~2024-04-10 11:47 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-05 8:41 [PATCH 0/6] Add SMEM-based speedbin matching Konrad Dybcio
2024-04-05 8:41 ` [PATCH 1/6] soc: qcom: Move some socinfo defines to the header, expand them Konrad Dybcio
2024-04-06 2:22 ` Dmitry Baryshkov
2024-04-11 18:55 ` Elliot Berman
2024-04-11 20:05 ` Konrad Dybcio
2024-04-11 20:09 ` Elliot Berman
2024-04-11 20:24 ` Konrad Dybcio
2024-04-11 23:49 ` Elliot Berman
2024-04-12 0:10 ` Konrad Dybcio
2024-04-12 0:49 ` Elliot Berman
2024-04-05 8:41 ` [PATCH 2/6] soc: qcom: smem: Add pcode/fcode getters Konrad Dybcio
2024-04-05 22:31 ` kernel test robot
2024-04-06 2:21 ` Dmitry Baryshkov
2024-04-09 15:04 ` Konrad Dybcio
2024-04-09 15:20 ` Bjorn Andersson
2024-04-11 19:09 ` Elliot Berman
2024-04-05 8:41 ` [PATCH 3/6] drm/msm/adreno: Allow specifying default speedbin value Konrad Dybcio
2024-04-06 2:56 ` Dmitry Baryshkov
2024-04-09 15:12 ` Konrad Dybcio
2024-04-09 15:23 ` Dmitry Baryshkov
2024-04-09 17:12 ` Rob Clark
2024-04-09 18:04 ` Dmitry Baryshkov
2024-04-09 18:07 ` Konrad Dybcio
2024-04-09 18:15 ` Dmitry Baryshkov
2024-04-09 18:27 ` Konrad Dybcio
2024-04-09 18:31 ` Dmitry Baryshkov
2024-04-10 11:47 ` Konrad Dybcio [this message]
2024-04-05 8:41 ` [PATCH 4/6] drm/msm/adreno: Implement SMEM-based speed bin Konrad Dybcio
2024-04-06 3:23 ` Dmitry Baryshkov
2024-04-10 11:42 ` Konrad Dybcio
2024-04-10 19:26 ` Dmitry Baryshkov
2024-04-11 21:35 ` Konrad Dybcio
2024-04-11 21:46 ` Dmitry Baryshkov
2024-04-11 22:14 ` Konrad Dybcio
2024-04-06 10:32 ` kernel test robot
2024-04-06 10:42 ` kernel test robot
2024-04-05 8:41 ` [PATCH 5/6] drm/msm/adreno: Add speedbin data for SM8550 / A740 Konrad Dybcio
2024-04-06 3:25 ` Dmitry Baryshkov
2024-04-09 15:13 ` Konrad Dybcio
2024-04-09 15:24 ` Dmitry Baryshkov
2024-04-09 18:13 ` Konrad Dybcio
2024-04-05 8:41 ` [PATCH 6/6] arm64: dts: qcom: sm8550: Wire up GPU speed bin & more OPPs Konrad Dybcio
2024-04-06 3:28 ` [PATCH 0/6] Add SMEM-based speedbin matching Dmitry Baryshkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c547e19c-158a-4512-b2d9-01668b7ac2f0@linaro.org \
--to=konrad.dybcio@linaro.org \
--cc=airlied@gmail.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=daniel@ffwll.ch \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=freedreno@lists.freedesktop.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marijn.suijten@somainline.org \
--cc=neil.armstrong@linaro.org \
--cc=quic_abhinavk@quicinc.com \
--cc=robdclark@gmail.com \
--cc=robh@kernel.org \
--cc=sean@poorly.run \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox