From: Hardeep Sharma <hardeep.sharma@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Ulf Hansson <ulfh@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Taniya Das <quic_tdas@quicinc.com>,
Georgi Djakov <djakov@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Linus Walleij <linusw@kernel.org>,
Thomas Gleixner <tglx@kernel.org>, Radu Rendec <radu@rendec.net>,
Robert Marko <robimarko@gmail.com>,
Guru Das Srinagesh <linux@gurudas.dev>
Cc: linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-pm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org
Subject: Re: [PATCH v2 09/15] pinctrl: qcom: Add Kuno pinctrl driver
Date: Fri, 21 Aug 2026 21:49:26 +0530 [thread overview]
Message-ID: <c82359a1-6b64-468d-9823-a196f291df0c@oss.qualcomm.com> (raw)
In-Reply-To: <f7386ff7-9700-4a19-bde4-df4460ec6963@oss.qualcomm.com>
On 8/17/2026 8:55 PM, Konrad Dybcio wrote:
> On 8/17/26 3:42 PM, Hardeep Sharma wrote:
>> On 8/17/2026 6:54 PM, Konrad Dybcio wrote:
>>> On 8/14/26 9:31 AM, Hardeep Sharma wrote:
>>>> Add the TLMM pinctrl driver for the Qualcomm Kuno platform, supporting
>>>> 110 GPIOs and their pin multiplexing, pin configuration and gpiolib
>>>> interface through the common pinctrl-msm driver.
>>>>
>>>> Signed-off-by: Hardeep Sharma <hardeep.sharma@oss.qualcomm.com>
>>>> ---
>>> [...]
>>>
>>>> + [65] = PINGROUP(65, qup0_se1, qdss_cti_trig1, qdss_cti_trig1, NA, NA, NA, NA, NA, NA),
>>>> + [66] = PINGROUP(66, qup0_se1, qdss_cti_trig1, qdss_cti_trig1, NA, NA, NA, NA, NA, NA),
>>> Function3 can't be selected because of repeating names
>>>
>>> In qdss_cti_trig1_groups, you have qdss_cti_trig1 specified twice.
>>> Perhaps there was a longer name that got truncated?
>>>
>>> Konrad
>> Thanks Konrad for review.
>>
>> It's a real qdss_cti_trig1 line - the in/out
>> mirror partner of funcsel 2:
>>
>> GPIO65: fsel2 = qdss_cti_trig1_in_mirb, fsel3 = qdss_cti_trig1_out_mire
>> GPIO66: fsel2 = qdss_cti_trig1_out_mirb, fsel3 = qdss_cti_trig1_in_mire
>>
>> Both map to the same name because the driver uses one coarse
>> "qdss_cti_trig1" for the in/out mirror variants.
> But these are physically separate functions, even if the mirror feature
> makes them seemingly one and the same
>
>> Listing the function on both funcsels is the normal sdx convention for
>> these mirror pairs - the in-tree drivers do it, including the same pins
>> on sdx65:
>>
>> - sdx55 [16][17][22][23][54][55][94][95] → in pinctrl-sdx55.c, pins
>> 16, 17, 22, 23, 54, 55, 94, 95 each repeat qdss_cti at two funcsels.
>> - sdx65 [65]/[66] → in pinctrl-sdx65.c, pins 65 and 66 do it —
>> - sdx75 [16][52][53][56][57][78][79] → in pinctrl-sdx75.c, those pins
>> do it.
>>
>> Only funcsel 2
>> is selectable from DT (first-match), which is expected and matches those
>> drivers.
> As you described it, you found a bug (FSEL3 is not selectable), please
> fix it in all the instances you've mentioned.
>
> Konrad
Thanks for review.
Corrected in v3 :
https://lore.kernel.org/all/20260821-kuno-soc-support-v3-0-196e2b306368@oss.qualcomm.com/
Best Wishes
Hardeep Sharma
next prev parent reply other threads:[~2026-08-21 16:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-14 7:31 [PATCH v2 00/15] Add initial support for Qualcomm Kuno SoC Hardeep Sharma
2026-08-14 7:31 ` [PATCH v2 01/15] soc: qcom: geni-se: allow selection on 32-bit ARM Qualcomm SoCs Hardeep Sharma
2026-08-14 7:31 ` [PATCH v2 02/15] dt-bindings: power: rpmpd: Document Kuno RPMh power domains Hardeep Sharma
2026-08-17 7:24 ` Krzysztof Kozlowski
2026-08-14 7:31 ` [PATCH v2 03/15] pmdomain: qcom: rpmhpd: Add power domains for Kuno Hardeep Sharma
2026-08-17 13:20 ` Konrad Dybcio
2026-08-14 7:31 ` [PATCH v2 04/15] dt-bindings: clock: qcom,rpmhcc: Add Kuno RPMh clock controller Hardeep Sharma
2026-08-17 7:25 ` Krzysztof Kozlowski
2026-08-14 7:31 ` [PATCH v2 05/15] clk: qcom: clk-rpmh: Add support for Kuno RPMh clocks Hardeep Sharma
2026-08-14 7:45 ` sashiko-bot
2026-08-17 13:20 ` Konrad Dybcio
2026-08-14 7:31 ` [PATCH v2 06/15] dt-bindings: interconnect: Add Qualcomm Kuno NoC Hardeep Sharma
2026-08-17 7:28 ` Krzysztof Kozlowski
2026-08-21 16:29 ` Hardeep Sharma
2026-08-14 7:31 ` [PATCH v2 07/15] interconnect: qcom: Add Kuno interconnect provider driver Hardeep Sharma
2026-08-17 13:21 ` Konrad Dybcio
2026-08-14 7:31 ` [PATCH v2 08/15] dt-bindings: pinctrl: qcom: Add Kuno TLMM Hardeep Sharma
2026-08-14 7:31 ` [PATCH v2 09/15] pinctrl: qcom: Add Kuno pinctrl driver Hardeep Sharma
2026-08-17 13:24 ` Konrad Dybcio
2026-08-17 13:42 ` Hardeep Sharma
2026-08-17 15:25 ` Konrad Dybcio
2026-08-21 16:19 ` Hardeep Sharma [this message]
2026-08-14 7:31 ` [PATCH v2 10/15] dt-bindings: clock: qcom: Add Kuno Global Clock Controller Hardeep Sharma
2026-08-17 7:30 ` Krzysztof Kozlowski
2026-08-17 7:54 ` Hardeep Sharma
2026-08-17 7:56 ` Krzysztof Kozlowski
2026-08-14 7:31 ` [PATCH v2 11/15] clk: qcom: Add Global Clock Controller driver for Kuno Hardeep Sharma
2026-08-14 7:52 ` sashiko-bot
2026-08-17 13:25 ` Konrad Dybcio
2026-08-14 7:31 ` [PATCH v2 12/15] dt-bindings: interrupt-controller: qcom,pdc: Add Kuno compatible string Hardeep Sharma
2026-08-14 7:31 ` [PATCH v2 13/15] dt-bindings: firmware: qcom,scm: Document SCM on Kuno SoC Hardeep Sharma
2026-08-14 7:44 ` sashiko-bot
2026-08-14 7:31 ` [PATCH v2 14/15] dt-bindings: arm: qcom: Document Kuno IDP board Hardeep Sharma
2026-08-17 7:34 ` Krzysztof Kozlowski
2026-08-14 7:31 ` [PATCH v2 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC Hardeep Sharma
2026-08-14 7:53 ` sashiko-bot
2026-08-17 12:39 ` Linus Walleij
2026-08-17 12:34 ` [PATCH v2 00/15] Add initial support for Qualcomm " Linus Walleij
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