[PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm

[PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm

[Luca Weiss]

Without the correct clock votes set, we may be hitting a synchronous
external abort error when touching the lpi registers.

  Internal error: synchronous external abort: 0000000096000010 [#1]  SMP
  <...>
  Call trace:
   lpi_gpio_read.isra.0+0x2c/0x58 (P)
   pinmux_enable_setting+0x218/0x300
   pinctrl_commit_state+0xb0/0x280
   pinctrl_select_state+0x28/0x48
   pinctrl_bind_pins+0x1f4/0x2a0
   really_probe+0x64/0x3a8

Add the clocks to fix that.

Platforms with this SoC using AudioReach won't be impacted due to
qcs6490-audioreach.dtsi already setting clocks & clock-names for
q6prmcc. The sc7280-chrome-common.dtsi has also been adjusted to keep
the behavior the same as they also do not use Elite with q6afecc.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
This issue is somewhat of a race condition, with some kernel configs it
cannot (easily) be triggered, with others relatively reliably but it
seems also to be somewhat related to cold boot.

Also I can't pinpoint a good Fixes tag, lpass_tlmm was introduced before
q6afecc got added for this SoC, and that worked fine for those boards it
seems. It's just needed on boards with Elite audio architecture.
---
 arch/arm64/boot/dts/qcom/kodiak.dtsi               | 5 +++++
 arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index 076069f14495..f478c5e1d2d5 100644
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -2994,6 +2994,11 @@ lpass_tlmm: pinctrl@33c0000 {
 			compatible = "qcom,sc7280-lpass-lpi-pinctrl";
 			reg = <0 0x033c0000 0x0 0x20000>,
 				<0 0x03550000 0x0 0x10000>;
+
+			clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+				 <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+			clock-names = "core", "audio";
+
 			gpio-controller;
 			#gpio-cells = <2>;
 			gpio-ranges = <&lpass_tlmm 0 0 15>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
index 84c6d662b54f..617a39d32488 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
@@ -67,6 +67,11 @@ &lpass_hm {
 	status = "okay";
 };
 
+&lpass_tlmm {
+	/delete-property/ clocks;
+	/delete-property/ clock-names;
+};
+
 &lpasscc {
 	status = "okay";
 };

---
base-commit: ef1c7b875741bef0ff37ae8ab8a9aaf407dc141c
change-id: 20260109-kodiak-lpass-tlmm-clocks-7da465d40eaf

Best regards,
-- 
Luca Weiss <luca.weiss@fairphone.com>

Re: [PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm

[Bhushan Shah]

On Friday, 9 January 2026 20:44:34 IST Luca Weiss wrote:
> Without the correct clock votes set, we may be hitting a synchronous
> external abort error when touching the lpi registers.
> 
>   Internal error: synchronous external abort: 0000000096000010 [#1]  SMP
>   <...>
>   Call trace:
>    lpi_gpio_read.isra.0+0x2c/0x58 (P)
>    pinmux_enable_setting+0x218/0x300
>    pinctrl_commit_state+0xb0/0x280
>    pinctrl_select_state+0x28/0x48
>    pinctrl_bind_pins+0x1f4/0x2a0
>    really_probe+0x64/0x3a8
> 
> Add the clocks to fix that.
> 
> Platforms with this SoC using AudioReach won't be impacted due to
> qcs6490-audioreach.dtsi already setting clocks & clock-names for
> q6prmcc. The sc7280-chrome-common.dtsi has also been adjusted to keep
> the behavior the same as they also do not use Elite with q6afecc.
> 
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

Tested-by: Bhushan Shah <bhushan.shah@machinesoul.in> # On fairphone-fp5

> ---
> This issue is somewhat of a race condition, with some kernel configs it
> cannot (easily) be triggered, with others relatively reliably but it
> seems also to be somewhat related to cold boot.
> 
> Also I can't pinpoint a good Fixes tag, lpass_tlmm was introduced before
> q6afecc got added for this SoC, and that worked fine for those boards it
> seems. It's just needed on boards with Elite audio architecture.
> ---
>  arch/arm64/boot/dts/qcom/kodiak.dtsi               | 5 +++++
>  arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 +++++
>  2 files changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> b/arch/arm64/boot/dts/qcom/kodiak.dtsi index 076069f14495..f478c5e1d2d5
> 100644
> --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
> @@ -2994,6 +2994,11 @@ lpass_tlmm: pinctrl@33c0000 {
>  			compatible = "qcom,sc7280-lpass-lpi-
pinctrl";
>  			reg = <0 0x033c0000 0x0 0x20000>,
>  				<0 0x03550000 0x0 0x10000>;
> +
> +			clocks = <&q6afecc LPASS_HW_MACRO_VOTE 
LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
> +				 <&q6afecc LPASS_HW_DCODEC_VOTE 
LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
> +			clock-names = "core", "audio";
> +
>  			gpio-controller;
>  			#gpio-cells = <2>;
>  			gpio-ranges = <&lpass_tlmm 0 0 15>;
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
> b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi index
> 84c6d662b54f..617a39d32488 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
> @@ -67,6 +67,11 @@ &lpass_hm {
>  	status = "okay";
>  };
> 
> +&lpass_tlmm {
> +	/delete-property/ clocks;
> +	/delete-property/ clock-names;
> +};
> +
>  &lpasscc {
>  	status = "okay";
>  };
> 
> ---
> base-commit: ef1c7b875741bef0ff37ae8ab8a9aaf407dc141c
> change-id: 20260109-kodiak-lpass-tlmm-clocks-7da465d40eaf
> 
> Best regards,

Re: [PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm

[Dmitry Baryshkov]

On Fri, Jan 09, 2026 at 04:14:34PM +0100, Luca Weiss wrote:
> Without the correct clock votes set, we may be hitting a synchronous
> external abort error when touching the lpi registers.
> 
>   Internal error: synchronous external abort: 0000000096000010 [#1]  SMP
>   <...>
>   Call trace:
>    lpi_gpio_read.isra.0+0x2c/0x58 (P)
>    pinmux_enable_setting+0x218/0x300
>    pinctrl_commit_state+0xb0/0x280
>    pinctrl_select_state+0x28/0x48
>    pinctrl_bind_pins+0x1f4/0x2a0
>    really_probe+0x64/0x3a8
> 
> Add the clocks to fix that.
> 
> Platforms with this SoC using AudioReach won't be impacted due to
> qcs6490-audioreach.dtsi already setting clocks & clock-names for
> q6prmcc. The sc7280-chrome-common.dtsi has also been adjusted to keep
> the behavior the same as they also do not use Elite with q6afecc.
> 
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---
> This issue is somewhat of a race condition, with some kernel configs it
> cannot (easily) be triggered, with others relatively reliably but it
> seems also to be somewhat related to cold boot.
> 
> Also I can't pinpoint a good Fixes tag, lpass_tlmm was introduced before
> q6afecc got added for this SoC, and that worked fine for those boards it
> seems. It's just needed on boards with Elite audio architecture.

Yeah... If those clocks are not necessary for Chrome, then I'd pick up
the q6afecc introduction as a Fixes tag.

> ---
>  arch/arm64/boot/dts/qcom/kodiak.dtsi               | 5 +++++
>  arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 +++++
>  2 files changed, 10 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry

Re: [PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm

[Bjorn Andersson]

On Fri, 09 Jan 2026 16:14:34 +0100, Luca Weiss wrote:
> Without the correct clock votes set, we may be hitting a synchronous
> external abort error when touching the lpi registers.
> 
>   Internal error: synchronous external abort: 0000000096000010 [#1]  SMP
>   <...>
>   Call trace:
>    lpi_gpio_read.isra.0+0x2c/0x58 (P)
>    pinmux_enable_setting+0x218/0x300
>    pinctrl_commit_state+0xb0/0x280
>    pinctrl_select_state+0x28/0x48
>    pinctrl_bind_pins+0x1f4/0x2a0
>    really_probe+0x64/0x3a8
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm
      commit: ee021b27333b657d0799ac791c1a6b9ddb293547

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: [PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm

[Bhushan Shah]

On Friday, 9 January 2026 21:08:32 IST Bhushan Shah wrote:
> On Friday, 9 January 2026 20:44:34 IST Luca Weiss wrote:
> > Without the correct clock votes set, we may be hitting a synchronous
> > external abort error when touching the lpi registers.
> > 
> >   Internal error: synchronous external abort: 0000000096000010 [#1]  SMP
> >   <...>
> >   
> >   Call trace:
> >    lpi_gpio_read.isra.0+0x2c/0x58 (P)
> >    pinmux_enable_setting+0x218/0x300
> >    pinctrl_commit_state+0xb0/0x280
> >    pinctrl_select_state+0x28/0x48
> >    pinctrl_bind_pins+0x1f4/0x2a0
> >    really_probe+0x64/0x3a8
> > 
> > Add the clocks to fix that.
> > 
> > Platforms with this SoC using AudioReach won't be impacted due to
> > qcs6490-audioreach.dtsi already setting clocks & clock-names for
> > q6prmcc. The sc7280-chrome-common.dtsi has also been adjusted to keep
> > the behavior the same as they also do not use Elite with q6afecc.
> > 
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> 
> Tested-by: Bhushan Shah <bhushan.shah@machinesoul.in> # On fairphone-fp5

As a follow-up;

While this fixes original abort, it seems on some coldboots or as such(?); it fails
to vote the clocks and then eventually soundcard fails to probe, so there is still
some issue that needs to be solved.

[   17.944296] Bluetooth: hci0: Frame reassembly failed (-84)
[   20.961100] qcom-q6afe aprsvc:service:4:4: AFE failed to vote (3)
[   20.961131] Failed to prepare clk 'core': -110                                                                                           
[   20.961137] qcom-sc7280-lpass-lpi-pinctrl 33c0000.pinctrl: error -ETIMEDOUT: Can't enable clocks
[   20.961144] qcom-sc7280-lpass-lpi-pinctrl 33c0000.pinctrl: probe with driver qcom-sc7280-lpass-lpi-pinctrl failed with error -110

So far I was not able to find a precise pattern to this, but doing bunch of coldboots
is most easiest way to reproduce I have found.

If anyone has any inputs on this, I would love to hear.

Best Regards,
Bhushan

Re: Re: [PATCH] arm64: dts: qcom: kodiak: Add missing clock votes for lpass_tlmm

[Val Packett]

On 1/20/26 7:53 AM, Bhushan Shah wrote:
> On Friday, 9 January 2026 21:08:32 IST Bhushan Shah wrote:
>> On Friday, 9 January 2026 20:44:34 IST Luca Weiss wrote:
>>> Without the correct clock votes set, we may be hitting a synchronous
>>> external abort error when touching the lpi registers.
>>>
>>>    Internal error: synchronous external abort: 0000000096000010 [#1]  SMP
>>>    <...>
>>>    
>>>    Call trace:
>>>     lpi_gpio_read.isra.0+0x2c/0x58 (P)
>>>     pinmux_enable_setting+0x218/0x300
>>>     pinctrl_commit_state+0xb0/0x280
>>>     pinctrl_select_state+0x28/0x48
>>>     pinctrl_bind_pins+0x1f4/0x2a0
>>>     really_probe+0x64/0x3a8
>>>
>>> Add the clocks to fix that.
>>>
>>> Platforms with this SoC using AudioReach won't be impacted due to
>>> qcs6490-audioreach.dtsi already setting clocks & clock-names for
>>> q6prmcc. The sc7280-chrome-common.dtsi has also been adjusted to keep
>>> the behavior the same as they also do not use Elite with q6afecc.
>>>
>>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>> Tested-by: Bhushan Shah <bhushan.shah@machinesoul.in> # On fairphone-fp5
> As a follow-up;
>
> While this fixes original abort, it seems on some coldboots or as such(?); it fails
> to vote the clocks and then eventually soundcard fails to probe, so there is still
> some issue that needs to be solved.
>
> [   17.944296] Bluetooth: hci0: Frame reassembly failed (-84)
> [   20.961100] qcom-q6afe aprsvc:service:4:4: AFE failed to vote (3)
> [   20.961131] Failed to prepare clk 'core': -110
> [   20.961137] qcom-sc7280-lpass-lpi-pinctrl 33c0000.pinctrl: error -ETIMEDOUT: Can't enable clocks
> [   20.961144] qcom-sc7280-lpass-lpi-pinctrl 33c0000.pinctrl: probe with driver qcom-sc7280-lpass-lpi-pinctrl failed with error -110
>
> So far I was not able to find a precise pattern to this, but doing bunch of coldboots
> is most easiest way to reproduce I have found.

This issue has appeared for a fellow postmarketOS user in the audio 
chatroom on the sm8250-xiaomi-pipa, the most interesting thing is the 
error code that was returned:

[ 10.823380] PDR: Indication received from msm/adsp/audio_pd, state: 
0x1fffffff, trans-id: 1
[ 10.823413] qcom,apr 
17300000.remoteproc:glink-edge.apr_audio_svc.-1.-1: Adding APR/GPR dev: 
aprsvc:service:4:3
[ 10.823476] qcom,apr 
17300000.remoteproc:glink-edge.apr_audio_svc.-1.-1: Adding APR/GPR dev: 
aprsvc:service:4:4
[ 10.825541] qcom,apr 
17300000.remoteproc:glink-edge.apr_audio_svc.-1.-1: Adding APR/GPR dev: 
aprsvc:service:4:7
[ 10.826034] platform 17300000.remoteproc:glink-edge:apr:service@7:dais: 
Adding to iommu group 28
[ 10.826399] qcom,apr 
17300000.remoteproc:glink-edge.apr_audio_svc.-1.-1: Adding APR/GPR dev: 
aprsvc:service:4:8
[ 10.827469] qcom-q6afe aprsvc:service:4:4: cmd = 0x100f4 returned error 
= 0x16
[ 10.827512] qcom-q6afe aprsvc:service:4:4: Unknown cmd 0x100f4
…
[ 14.052896] qcom-q6afe aprsvc:service:4:4: AFE failed to vote (3)
[ 14.052934] va_macro 3370000.codec: probe with driver va_macro failed 
with error -110


Uhh, 0x16 is out of the known range of error codes!

q6dsp-errno.h both upstream and downstream ends at 0x15! Wat?!

(Also the "Unknown cmd" error message is confusing, it makes it seem 
like the ADSP had told us that it doesn't know the cmd, but in reality 
the *error handler* hit a path where it's an unknown opcode for its 
processing of the response!)


Thanks,
~val