Re: [PATCH v1 5/9] arm64: dts: agilex5: add SOCDK eMMC daughter board support

["Kathpalia, Tanmay" <tanmay.kathpalia@altera.com>]

On 5/13/2026 6:52 AM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> - [High] The `no-1-8-v` property in the `&emmc` node explicitly disables the 1.8V HS200 and HS400 modes, contradicting the commit intent.
> - [Medium] A board-specific fixed regulator (`emmc_io_1v8_reg`) is improperly defined in the shared SoC-level `.dtsi` file and placed under a memory-mapped bus.
> --
>
> commit 832d2f01748902348b5ee8ddc2a87d8dfab30896
> Author: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
>
> arm64: dts: agilex5: add SOCDK eMMC daughter board support
>
> This commit adds device tree support for the Agilex5 SOCDK eMMC daughter
> board. It introduces the new board dts file and adds a fixed 1.8V regulator
> for the eMMC I/O voltage to the common SoC dtsi.
>
>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>> index 7e080f13166f2..feb4ccb317a71 100644
>> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> [ ... ]
>> @@ -317,6 +317,14 @@ sd_io_1v8_reg: regulator-1p8v {
>>   					<3300000 0x0>;
>>   		};
>>   
>> +		emmc_io_1v8_reg: regulator-fixed-1p8v {
>> +			compatible = "regulator-fixed";
>> +			regulator-name = "emmc-io-power";
>> +			regulator-min-microvolt = <1800000>;
>> +			regulator-max-microvolt = <1800000>;
>> +			regulator-always-on;
>> +		};
>> +
> Will this cause every Agilex 5 board to inadvertently instantiate and enable
> this regulator, even if they do not have the eMMC daughter card attached?
> Since this appears to be a board-specific regulator, would it be better
> placed at the root level of the board-specific socfpga_agilex5_socdk_emmc.dts
> file?
>
> Additionally, does placing this node inside a memory-mapped bus without a reg
> property trigger device tree compiler warnings?

Agreed, this is board-specific and should not be in the shared SoC dtsi.
Will be moved to socfpga_agilex5_socdk_emmc.dts in v2.
>
>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts
>> new file mode 100644
>> index 0000000000000..87bde9fa69c6c
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts
> [ ... ]
>> +&emmc {
>> +	status = "okay";
>> +
>> +	no-sd;
>> +	no-sdio;
>> +	no-1-8-v;
> The commit message states the eMMC controller is configured for HS200 and
> HS400 modes at 1.8V. Does the no-1-8-v property prevent these high-speed
> modes from functioning?
>
> In the SDHCI core, parsing no-1-8-v sets the SDHCI_QUIRK2_NO_1_8_V flag,
> which strips out the MMC_CAP2_HSX00_1_8V and MMC_CAP2_HS400_ES capabilities
> during host setup. Since the eMMC IO is explicitly supplied by a 1.8V
> regulator, shouldn't this property be removed to allow HS200 and HS400
> negotiation?


no-1-8-v sets SDHCI_QUIRK2_NO_1_8_V which prevents HS200/HS400
negotiation — contradicting the intent. Will be removed in v2.