[PATCH RFC 0/2] pinctrl: Add support gpiod_to_irq

[PATCH RFC 0/2] pinctrl: Add support gpiod_to_irq

[Xianwei Zhao via B4 Relay]

Some users need to obtain an IRQ directly from a GPIO descriptor through gpiod_to_irq().
Add the required DT binding and implementation to support this use case.
Since this introduces a new DT property, the property is kept optional to
maintain compatibility with existing SoCs and DTS files.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
Xianwei Zhao (2):
      dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property
      pinctrl: meson: amlogic-a4: support gpiod_to_irq

 .../bindings/pinctrl/amlogic,pinctrl-a4.yaml       |  5 ++
 drivers/pinctrl/meson/pinctrl-amlogic-a4.c         | 54 ++++++++++++++++++++++
 2 files changed, 59 insertions(+)
---
base-commit: 4ca496f6285e16d91751e5c84c6010e03285528c
change-id: 20260520-gpio-to-irq-be4797d2a23f

Best regards,
-- 
Xianwei Zhao <xianwei.zhao@amlogic.com>

[PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Add the hw-irq property for each GPIO bank and enable interrupt-parent
for pinctrl so that gpiod_to_irq() can translate GPIO lines to IRQs.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
index b69db1b95345..65ec9121300e 100644
--- a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
@@ -37,6 +37,8 @@ properties:
 
   ranges: true
 
+  interrupt-parent: true
+
 patternProperties:
   "^gpio@[0-9a-f]+$":
     type: object
@@ -65,6 +67,9 @@ patternProperties:
       gpio-ranges:
         maxItems: 1
 
+      hw-irq:
+        $ref: /schemas/types.yaml#/definitions/uint32
+
     required:
       - reg
       - reg-names

-- 
2.52.0

[PATCH RFC 2/2] pinctrl: meson: amlogic-a4: support gpiod_to_irq

[Xianwei Zhao via B4 Relay]

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Add the to_irq() callback implementation so that
gpiod_to_irq() can map GPIO lines to IRQs correctly.

Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 drivers/pinctrl/meson/pinctrl-amlogic-a4.c | 54 ++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-a4.c b/drivers/pinctrl/meson/pinctrl-amlogic-a4.c
index 5ae0c19d007d..663681887f35 100644
--- a/drivers/pinctrl/meson/pinctrl-amlogic-a4.c
+++ b/drivers/pinctrl/meson/pinctrl-amlogic-a4.c
@@ -10,6 +10,7 @@
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/of.h>
+#include <linux/of_irq.h>
 #include <linux/of_address.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
@@ -97,6 +98,8 @@ struct aml_gpio_bank {
 	struct regmap			*reg_gpio;
 	struct regmap			*reg_ds;
 	const struct multi_mux		*p_mux;
+	struct device_node		*of_irq;
+	u32				irq_start;
 };
 
 struct aml_pinctrl {
@@ -836,6 +839,32 @@ static int aml_pctl_parse_functions(struct device_node *np,
 	return 0;
 }
 
+static struct device_node *aml_get_of_irq(struct device_node *np)
+{
+	struct device_node *of_irq;
+
+	of_irq = of_irq_find_parent(np);
+	if (of_irq && of_device_is_compatible(of_irq, "amlogic,meson-gpio-intc")) {
+		of_node_put(of_irq);
+		return of_irq;
+	}
+
+	if (of_irq)
+		of_node_put(of_irq);
+
+	return NULL;
+}
+
+static u32 aml_bank_irq(struct device_node *np)
+{
+	u32 hw_irq;
+
+	if (of_property_read_u32(np, "hw-irq", &hw_irq))
+		return U32_MAX;
+
+	return hw_irq;
+}
+
 static u32 aml_bank_pins(struct device_node *np)
 {
 	struct of_phandle_args of_args;
@@ -1003,6 +1032,27 @@ static int aml_gpio_get(struct gpio_chip *chip, unsigned int gpio)
 	return !!(val & BIT(bit));
 }
 
+static int aml_gpio_to_irq(struct gpio_chip *chip, unsigned int gpio)
+{
+	struct aml_gpio_bank *bank = gpiochip_get_data(chip);
+	struct irq_fwspec fwspec;
+	int hwirq;
+
+	if (bank->irq_start == U32_MAX)
+		return -EINVAL;
+	if (!bank->of_irq)
+		return -EINVAL;
+
+	hwirq = gpio + bank->irq_start;
+
+	fwspec.fwnode = of_fwnode_handle(bank->of_irq);
+	fwspec.param_count = 2;
+	fwspec.param[0] = hwirq;
+	fwspec.param[1] = IRQ_TYPE_NONE;
+
+	return irq_create_fwspec_mapping(&fwspec);
+}
+
 static const struct gpio_chip aml_gpio_template = {
 	.request		= gpiochip_generic_request,
 	.free			= gpiochip_generic_free,
@@ -1012,6 +1062,7 @@ static const struct gpio_chip aml_gpio_template = {
 	.direction_input	= aml_gpio_direction_input,
 	.direction_output	= aml_gpio_direction_output,
 	.get_direction		= aml_gpio_get_direction,
+	.to_irq			= aml_gpio_to_irq,
 	.can_sleep		= true,
 };
 
@@ -1079,6 +1130,7 @@ static int aml_gpiolib_register_bank(struct aml_pinctrl *info,
 		bank->reg_ds = bank->reg_gpio;
 	}
 
+	bank->irq_start = aml_bank_irq(np);
 	bank->gpio_chip = aml_gpio_template;
 	bank->gpio_chip.base = -1;
 	bank->gpio_chip.ngpio = aml_bank_pins(np);
@@ -1154,6 +1206,8 @@ static int aml_pctl_probe_dt(struct platform_device *pdev,
 				pdesc->name = pin_names[j];
 				pdesc++;
 			}
+
+			info->banks[bank].of_irq = aml_get_of_irq(np);
 			bank++;
 		} else {
 			ret = aml_pctl_parse_functions(child, info,

-- 
2.52.0

Re: [PATCH RFC 2/2] pinctrl: meson: amlogic-a4: support gpiod_to_irq

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Premature `of_node_put()` in `aml_get_of_irq()` creates a dangling pointer, leading to a Use-After-Free.
--

commit 682e8ff8b51a310ddf41177d04828ab2fd8a5670
Author: Xianwei Zhao <xianwei.zhao@amlogic.com>

pinctrl: meson: amlogic-a4: support gpiod_to_irq

This patch adds the to_irq() callback implementation so that gpiod_to_irq()
can map GPIO lines to IRQs correctly.

> diff --git a/drivers/pinctrl/meson/pinctrl-amlogic-a4.c b/drivers/pinctrl/meson/pinctrl-amlogic-a4.c
> index 5ae0c19d007d7..663681887f35c 100644
> --- a/drivers/pinctrl/meson/pinctrl-amlogic-a4.c
> +++ b/drivers/pinctrl/meson/pinctrl-amlogic-a4.c

[ ... ]

> @@ -836,6 +839,32 @@ static int aml_pctl_parse_functions(struct device_node *np,
>  	return 0;
>  }
>  
> +static struct device_node *aml_get_of_irq(struct device_node *np)
> +{
> +	struct device_node *of_irq;
> +
> +	of_irq = of_irq_find_parent(np);
> +	if (of_irq && of_device_is_compatible(of_irq, "amlogic,meson-gpio-intc")) {
> +		of_node_put(of_irq);
> +		return of_irq;

[Severity: High]
Does this premature of_node_put() call create a use-after-free risk?

of_irq_find_parent() returns a device node with an incremented reference
count. By calling of_node_put() before returning the pointer, the reference
is dropped while the pointer is still passed back and cached in bank->of_irq.

Later, aml_gpio_to_irq() dereferences this pointer:

    fwspec.fwnode = of_fwnode_handle(bank->of_irq);

If the device node is dynamically freed (for example, during Device Tree
overlay removal) between caching and use, this would lead to a
use-after-free. Should we retain the reference here until driver teardown
instead?

> +	}
> +
> +	if (of_irq)
> +		of_node_put(of_irq);
> +
> +	return NULL;
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260611-gpio-to-irq-v1-0-12201716f23f@amlogic.com?part=2

Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [Medium] The newly added `hw-irq` property is not marked as required for the GPIO banks, and the example is not updated.
- [Medium] The custom device tree property `hw-irq` lacks a vendor prefix.
- [Low] The newly added `hw-irq` property lacks a description field.
--

commit 779e29b8c4c1e37224d568880fcfcc77220c1d72
Author: Xianwei Zhao <xianwei.zhao@amlogic.com>

dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

Add the hw-irq property for each GPIO bank and enable interrupt-parent
for pinctrl so that gpiod_to_irq() can translate GPIO lines to IRQs.

> diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
> --- a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml

[ ... ]

> @@ -65,6 +67,9 @@ patternProperties:
>        gpio-ranges:
>          maxItems: 1
>  
> +      hw-irq:
> +        $ref: /schemas/types.yaml#/definitions/uint32

[Severity: Medium]
Should this custom property have a vendor prefix to prevent namespace
collisions, such as amlogic,hw-irq? 

[Severity: Low]
Would it be helpful to include a description field here to document the
purpose and semantic usage of this new property?

> +
>      required:
>        - reg
>        - reg-names

[Severity: Medium]
The commit message indicates this property is added for each GPIO bank.
Should hw-irq be included in this required list under the 
patternProperties:^gpio@[0-9a-f]+$ node to ensure incomplete configurations
fail schema validation?

Additionally, the example at the bottom of the file doesn't seem to include
this new property:

examples:
  ...
    gpio@4240 {
        reg = <0 0x4240 0 0x40>, <0 0x4000 0 0x8>;
        reg-names = "gpio", "mux";
        gpio-controller;
        #gpio-cells = <2>;
        gpio-ranges = <&periphs_pinctrl 0 8 10>;
    };

Does the example section need to be updated to demonstrate the usage of the
newly added property?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260611-gpio-to-irq-v1-0-12201716f23f@amlogic.com?part=1

Re: [PATCH RFC 0/2] pinctrl: Add support gpiod_to_irq

[Linus Walleij]

Hi Xianwei,

thanks for your patches!

On Thu, Jun 11, 2026 at 9:54 AM Xianwei Zhao via B4 Relay
<devnull+xianwei.zhao.amlogic.com@kernel.org> wrote:

> Some users need to obtain an IRQ directly from a GPIO descriptor through gpiod_to_irq().
> Add the required DT binding and implementation to support this use case.
> Since this introduces a new DT property, the property is kept optional to
> maintain compatibility with existing SoCs and DTS files.

To me it looks like you have just re-implemented hierarchical
irqs.

Look into the section "Infrastructure helpers for GPIO irqchips"
in Documentation/driver-api/gpio/driver.rst, especially towards
the end.

Solve this by using GPIOLIB_IRQCHIP and a custom
child_to_parent_hwirq() callback to translate the GPIO into
an IRQ.

To just implement gpiod_to_irq() without any irqchip abstraction
is also broken: you can't force all users to just use this way
to get an IRQ it's excessively restricting.

Add

  interrupt-controller: true

  "#interrupt-cells":
    const: 2

to the pinctrl node as well so that DT users can simply request
the IRQ from the irqchip inside of the pin controller. It will
be hierarchical and lightweight but an irqchip nevertheless.

The GPIOLIB_IRQCHIP approach will help you to get this
right.

Yours,
Linus Walleij

Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1305 bytes --]

On Thu, Jun 11, 2026 at 07:54:33AM +0000, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <xianwei.zhao@amlogic.com>
> 
> Add the hw-irq property for each GPIO bank and enable interrupt-parent
> for pinctrl so that gpiod_to_irq() can translate GPIO lines to IRQs.

Uhhhhh, what? Why can't you just use the normal interrupts property?

> 
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> ---
>  Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
> index b69db1b95345..65ec9121300e 100644
> --- a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
> @@ -37,6 +37,8 @@ properties:
>  
>    ranges: true
>  
> +  interrupt-parent: true
> +
>  patternProperties:
>    "^gpio@[0-9a-f]+$":
>      type: object
> @@ -65,6 +67,9 @@ patternProperties:
>        gpio-ranges:
>          maxItems: 1
>  
> +      hw-irq:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +
>      required:
>        - reg
>        - reg-names
> 
> -- 
> 2.52.0
> 
> 

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[Xianwei Zhao]

Hi Conor,
    Thanks for your review.

On 2026/6/12 01:39, Conor Dooley wrote:
> Subject:
> Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio 
> irq property
> From:
> Conor Dooley <conor@kernel.org>
> Date:
> 2026/6/12 01:39
> 
> To:
> xianwei.zhao@amlogic.com
> CC:
> Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>, 
> Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley 
> <conor+dt@kernel.org>, Neil Armstrong <neil.armstrong@linaro.org>, Kevin 
> Hilman <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>, 
> Martin Blumenstingl <martin.blumenstingl@googlemail.com>, 
> linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, 
> devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, 
> linux-arm-kernel@lists.infradead.org
> 
> 
> 
> On Thu, Jun 11, 2026 at 07:54:33AM +0000, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>
>> Add the hw-irq property for each GPIO bank and enable interrupt-parent
>> for pinctrl so that gpiod_to_irq() can translate GPIO lines to IRQs.
> Uhhhhh, what? Why can't you just use the normal interrupts property?
> 

The interrupt cannot be used directly because the GPIO bank only 
provides an IRQ base, which does not have a one-to-one mapping with the 
actual hardware interrupts.

On Amlogic SoCs, GPIO interrupts are handled through a mux. Multiple 
GPIO pins are mapped to a limited number of real interrupt sources. The 
implementation can be found here:

https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-meson-gpio.c

To use a GPIO interrupt, an unused hardware interrupt must first be 
allocated, and then the corresponding mux register must be configured. 
This allocation and mapping are already implemented in the existing driver.

In that driver, the mapping is performed dynamically rather than simply 
calculating:

irq = irq_start + gpio_offset

If the interrupt is used directly, only the GPIO index can be obtained. 
The real interrupt number cannot be derived by simply adding an offset, 
because the hardware interrupt must be allocated first. Pre-allocating 
all interrupts during initialization would prevent later GPIOs from 
obtaining available interrupt sources.

Perhaps other names would be more appropriate here, such as "irq_start".

>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>> ---
>>   Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
>> index b69db1b95345..65ec9121300e 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
>> +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml
>> @@ -37,6 +37,8 @@ properties:
>>   
>>     ranges: true
>>   
>> +  interrupt-parent: true
>> +
>>   patternProperties:
>>     "^gpio@[0-9a-f]+$":
>>       type: object
>> @@ -65,6 +67,9 @@ patternProperties:
>>         gpio-ranges:
>>           maxItems: 1
>>   
>> +      hw-irq:
>> +        $ref: /schemas/types.yaml#/definitions/uint32
>> +
>>       required:
>>         - reg
>>         - reg-names
>>
>> -- 
>> 2.52.0

Re: [PATCH RFC 0/2] pinctrl: Add support gpiod_to_irq

[Xianwei Zhao]

Hi Linus,
    Thank you for your advice and review.

On 2026/6/11 20:51, Linus Walleij wrote:
> Hi Xianwei,
> 
> thanks for your patches!
> 
> On Thu, Jun 11, 2026 at 9:54 AM Xianwei Zhao via B4 Relay
> <devnull+xianwei.zhao.amlogic.com@kernel.org>  wrote:
> 
>> Some users need to obtain an IRQ directly from a GPIO descriptor through gpiod_to_irq().
>> Add the required DT binding and implementation to support this use case.
>> Since this introduces a new DT property, the property is kept optional to
>> maintain compatibility with existing SoCs and DTS files.
> To me it looks like you have just re-implemented hierarchical
> irqs.
> 
> Look into the section "Infrastructure helpers for GPIO irqchips"
> in Documentation/driver-api/gpio/driver.rst, especially towards
> the end.
> 
> Solve this by using GPIOLIB_IRQCHIP and a custom
> child_to_parent_hwirq() callback to translate the GPIO into
> an IRQ.
> 
> To just implement gpiod_to_irq() without any irqchip abstraction
> is also broken: you can't force all users to just use this way
> to get an IRQ it's excessively restricting.
> 
> Add
> 
>    interrupt-controller: true
> 
>    "#interrupt-cells":
>      const: 2
> 
> to the pinctrl node as well so that DT users can simply request
> the IRQ from the irqchip inside of the pin controller. It will
> be hierarchical and lightweight but an irqchip nevertheless.
> 
> The GPIOLIB_IRQCHIP approach will help you to get this
> right.
> 

I read the document (Documentation/driver-api/gpio/driver.rst) you 
pointed me to and found that the corresponding implementation has 
already been added in this file:

https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-meson-gpio.c

However, it is implemented as a standalone irqchip and is not integrated 
with the GPIO controller.

In this patch, I implemented the GPIO-to-IRQ conversion through 
gpiod_to_irq(). Users can still obtain the interrupt directly through 
the interrupt property, for example:

interrupts-extended = <&gpio_intc 16 1>;

The purpose of this change is to make GPIO-to-IRQ conversion easier for 
users who do not want to know the actual interrupt number. The interrupt 
mapping is not fixed and varies between different SoCs, so users should 
not need to handle the hardware interrupt allocation details.


> Yours,
> Linus Walleij

Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[Krzysztof Kozlowski]

On 15/06/2026 04:47, Xianwei Zhao wrote:
> Hi Conor,
>     Thanks for your review.
> 
> On 2026/6/12 01:39, Conor Dooley wrote:
>> Subject:
>> Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio 
>> irq property
>> From:
>> Conor Dooley <conor@kernel.org>
>> Date:
>> 2026/6/12 01:39
>>
>> To:
>> xianwei.zhao@amlogic.com
>> CC:
>> Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>, 
>> Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley 
>> <conor+dt@kernel.org>, Neil Armstrong <neil.armstrong@linaro.org>, Kevin 
>> Hilman <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>, 
>> Martin Blumenstingl <martin.blumenstingl@googlemail.com>, 
>> linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, 
>> devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, 
>> linux-arm-kernel@lists.infradead.org
>>
>>
>>
>> On Thu, Jun 11, 2026 at 07:54:33AM +0000, Xianwei Zhao via B4 Relay wrote:
>>> From: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>>
>>> Add the hw-irq property for each GPIO bank and enable interrupt-parent
>>> for pinctrl so that gpiod_to_irq() can translate GPIO lines to IRQs.
>> Uhhhhh, what? Why can't you just use the normal interrupts property?
>>
> 
> The interrupt cannot be used directly because the GPIO bank only 
> provides an IRQ base, which does not have a one-to-one mapping with the 
> actual hardware interrupts.
> 
> On Amlogic SoCs, GPIO interrupts are handled through a mux. Multiple 
> GPIO pins are mapped to a limited number of real interrupt sources. The 
> implementation can be found here:
> 
> https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-meson-gpio.c
> 
> To use a GPIO interrupt, an unused hardware interrupt must first be 
> allocated, and then the corresponding mux register must be configured. 
> This allocation and mapping are already implemented in the existing driver.
> 
> In that driver, the mapping is performed dynamically rather than simply 
> calculating:
> 
> irq = irq_start + gpio_offset
> 
> If the interrupt is used directly, only the GPIO index can be obtained. 


If it is performed dynamically, then it is not suitable for DT.

You still did not explain what hardware aspect exactly is described by
"hw-irq".



> The real interrupt number cannot be derived by simply adding an offset, 
> because the hardware interrupt must be allocated first. Pre-allocating 
> all interrupts during initialization would prevent later GPIOs from 
> obtaining available interrupt sources.
> 
> Perhaps other names would be more appropriate here, such as "irq_start".
> 
>>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>> ---
Best regards,
Krzysztof

Re: [PATCH RFC 0/2] pinctrl: Add support gpiod_to_irq

[Linus Walleij]

On Mon, Jun 15, 2026 at 5:17 AM Xianwei Zhao <xianwei.zhao@amlogic.com> wrote:
> On 2026/6/11 20:51, Linus Walleij wrote:
> > Hi Xianwei,
> >
> > thanks for your patches!
> >
> > On Thu, Jun 11, 2026 at 9:54 AM Xianwei Zhao via B4 Relay
> > <devnull+xianwei.zhao.amlogic.com@kernel.org>  wrote:
> >
> >> Some users need to obtain an IRQ directly from a GPIO descriptor through gpiod_to_irq().
> >> Add the required DT binding and implementation to support this use case.
> >> Since this introduces a new DT property, the property is kept optional to
> >> maintain compatibility with existing SoCs and DTS files.
> > To me it looks like you have just re-implemented hierarchical
> > irqs.
> >
> > Look into the section "Infrastructure helpers for GPIO irqchips"
> > in Documentation/driver-api/gpio/driver.rst, especially towards
> > the end.
> >
> > Solve this by using GPIOLIB_IRQCHIP and a custom
> > child_to_parent_hwirq() callback to translate the GPIO into
> > an IRQ.
> >
> > To just implement gpiod_to_irq() without any irqchip abstraction
> > is also broken: you can't force all users to just use this way
> > to get an IRQ it's excessively restricting.
> >
> > Add
> >
> >    interrupt-controller: true
> >
> >    "#interrupt-cells":
> >      const: 2
> >
> > to the pinctrl node as well so that DT users can simply request
> > the IRQ from the irqchip inside of the pin controller. It will
> > be hierarchical and lightweight but an irqchip nevertheless.
> >
> > The GPIOLIB_IRQCHIP approach will help you to get this
> > right.
> >
>
> I read the document (Documentation/driver-api/gpio/driver.rst) you
> pointed me to and found that the corresponding implementation has
> already been added in this file:
>
> https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-meson-gpio.c

That is the parent interrupt controller to the pinctrl+gpio isn't it.

It will be even clearer once you use interrupts = <>; instead of
the hwirq = <>; hack.

> However, it is implemented as a standalone irqchip and is not integrated
> with the GPIO controller.

Right, so it is the parent. Of course it it stand alone.

> In this patch, I implemented the GPIO-to-IRQ conversion through
> gpiod_to_irq(). Users can still obtain the interrupt directly through
> the interrupt property, for example:
>
> interrupts-extended = <&gpio_intc 16 1>;
>
> The purpose of this change is to make GPIO-to-IRQ conversion easier for
> users who do not want to know the actual interrupt number. The interrupt
> mapping is not fixed and varies between different SoCs, so users should
> not need to handle the hardware interrupt allocation details.

This is not why gpiod_to_irq() exists. It is not a convenience function
that is voluntary to implement.

If you implement gpiod_to_irq() you implement an entire
irqchip otherwise it is a bug.

If the pin control + GPIO driver should serve IRQ numbers in any
shape or form, you need to go the whole way and provide a
hierarchical irqchip.

It doesn't matter if you don't need to set a single bit in the
pinctrl + GPIO hardware for these IRQs, the fact that they are
routed internally on the SoC out through the pin control and
GPIO block by definition makes it hierarchical.

Yours,
Linus Walleij

Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[Conor Dooley]

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Given Linus' comments on the cover letter,
pw-bot: changes-requested

Thanks,
Conor.

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Re: [PATCH RFC 0/2] pinctrl: Add support gpiod_to_irq

[Xianwei Zhao]

Hi Linus,
    Understood. Thank you for your detailed explanation. I will drop 
this patch.

On 2026/6/15 20:59, Linus Walleij wrote:
>>> Hi Xianwei,
>>>
>>> thanks for your patches!
>>>
>>> On Thu, Jun 11, 2026 at 9:54 AM Xianwei Zhao via B4 Relay
>>> <devnull+xianwei.zhao.amlogic.com@kernel.org>   wrote:
>>>
>>>> Some users need to obtain an IRQ directly from a GPIO descriptor through gpiod_to_irq().
>>>> Add the required DT binding and implementation to support this use case.
>>>> Since this introduces a new DT property, the property is kept optional to
>>>> maintain compatibility with existing SoCs and DTS files.
>>> To me it looks like you have just re-implemented hierarchical
>>> irqs.
>>>
>>> Look into the section "Infrastructure helpers for GPIO irqchips"
>>> in Documentation/driver-api/gpio/driver.rst, especially towards
>>> the end.
>>>
>>> Solve this by using GPIOLIB_IRQCHIP and a custom
>>> child_to_parent_hwirq() callback to translate the GPIO into
>>> an IRQ.
>>>
>>> To just implement gpiod_to_irq() without any irqchip abstraction
>>> is also broken: you can't force all users to just use this way
>>> to get an IRQ it's excessively restricting.
>>>
>>> Add
>>>
>>>     interrupt-controller: true
>>>
>>>     "#interrupt-cells":
>>>       const: 2
>>>
>>> to the pinctrl node as well so that DT users can simply request
>>> the IRQ from the irqchip inside of the pin controller. It will
>>> be hierarchical and lightweight but an irqchip nevertheless.
>>>
>>> The GPIOLIB_IRQCHIP approach will help you to get this
>>> right.
>>>
>> I read the document (Documentation/driver-api/gpio/driver.rst) you
>> pointed me to and found that the corresponding implementation has
>> already been added in this file:
>>
>> https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-meson-gpio.c
> That is the parent interrupt controller to the pinctrl+gpio isn't it.
> 
> It will be even clearer once you use interrupts = <>; instead of
> the hwirq = <>; hack.
> 
>> However, it is implemented as a standalone irqchip and is not integrated
>> with the GPIO controller.
> Right, so it is the parent. Of course it it stand alone.
> 
>> In this patch, I implemented the GPIO-to-IRQ conversion through
>> gpiod_to_irq(). Users can still obtain the interrupt directly through
>> the interrupt property, for example:
>>
>> interrupts-extended = <&gpio_intc 16 1>;
>>
>> The purpose of this change is to make GPIO-to-IRQ conversion easier for
>> users who do not want to know the actual interrupt number. The interrupt
>> mapping is not fixed and varies between different SoCs, so users should
>> not need to handle the hardware interrupt allocation details.
> This is not why gpiod_to_irq() exists. It is not a convenience function
> that is voluntary to implement.
> 
> If you implement gpiod_to_irq() you implement an entire
> irqchip otherwise it is a bug.
> 
> If the pin control + GPIO driver should serve IRQ numbers in any
> shape or form, you need to go the whole way and provide a
> hierarchical irqchip.
> 
> It doesn't matter if you don't need to set a single bit in the
> pinctrl + GPIO hardware for these IRQs, the fact that they are
> routed internally on the SoC out through the pin control and
> GPIO block by definition makes it hierarchical.
> 
> Yours,
> Linus Walleij

Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[Xianwei Zhao]

Hi Krzysztof,
    Thanks for your detailed review. After considering the feedback, I 
think this approach is not suitable, so I will drop this patch.

On 2026/6/15 13:32, Krzysztof Kozlowski wrote:
> On 15/06/2026 04:47, Xianwei Zhao wrote:
>> Hi Conor,
>>      Thanks for your review.
>>
>> On 2026/6/12 01:39, Conor Dooley wrote:
>>> Subject:
>>> Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio
>>> irq property
>>> From:
>>> Conor Dooley<conor@kernel.org>
>>> Date:
>>> 2026/6/12 01:39
>>>
>>> To:
>>> xianwei.zhao@amlogic.com
>>> CC:
>>> Linus Walleij<linusw@kernel.org>, Rob Herring<robh@kernel.org>,
>>> Krzysztof Kozlowski<krzk+dt@kernel.org>, Conor Dooley
>>> <conor+dt@kernel.org>, Neil Armstrong<neil.armstrong@linaro.org>, Kevin
>>> Hilman<khilman@baylibre.com>, Jerome Brunet<jbrunet@baylibre.com>,
>>> Martin Blumenstingl<martin.blumenstingl@googlemail.com>,
>>> linux-amlogic@lists.infradead.org,linux-gpio@vger.kernel.org,
>>> devicetree@vger.kernel.org,linux-kernel@vger.kernel.org,
>>> linux-arm-kernel@lists.infradead.org
>>>
>>>
>>>
>>> On Thu, Jun 11, 2026 at 07:54:33AM +0000, Xianwei Zhao via B4 Relay wrote:
>>>> From: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>>>
>>>> Add the hw-irq property for each GPIO bank and enable interrupt-parent
>>>> for pinctrl so that gpiod_to_irq() can translate GPIO lines to IRQs.
>>> Uhhhhh, what? Why can't you just use the normal interrupts property?
>>>
>> The interrupt cannot be used directly because the GPIO bank only
>> provides an IRQ base, which does not have a one-to-one mapping with the
>> actual hardware interrupts.
>>
>> On Amlogic SoCs, GPIO interrupts are handled through a mux. Multiple
>> GPIO pins are mapped to a limited number of real interrupt sources. The
>> implementation can be found here:
>>
>> https://github.com/torvalds/linux/blob/master/drivers/irqchip/irq-meson-gpio.c
>>
>> To use a GPIO interrupt, an unused hardware interrupt must first be
>> allocated, and then the corresponding mux register must be configured.
>> This allocation and mapping are already implemented in the existing driver.
>>
>> In that driver, the mapping is performed dynamically rather than simply
>> calculating:
>>
>> irq = irq_start + gpio_offset
>>
>> If the interrupt is used directly, only the GPIO index can be obtained.
> 
> If it is performed dynamically, then it is not suitable for DT.
> 
> You still did not explain what hardware aspect exactly is described by
> "hw-irq".
> 
> 
> 
>> The real interrupt number cannot be derived by simply adding an offset,
>> because the hardware interrupt must be allocated first. Pre-allocating
>> all interrupts during initialization would prevent later GPIOs from
>> obtaining available interrupt sources.
>>
>> Perhaps other names would be more appropriate here, such as "irq_start".
>>
>>>> Signed-off-by: Xianwei Zhao<xianwei.zhao@amlogic.com>
>>>> ---
> Best regards,
> Krzysztof

Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio irq property

[Xianwei Zhao]

Hi Conor,
    Thanks for your detailed review. I will drop this patch.

On 2026/6/16 00:52, Conor Dooley wrote:
> Subject:
> Re: [PATCH RFC 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add gpio 
> irq property
> From:
> Conor Dooley <conor@kernel.org>
> Date:
> 2026/6/16 00:52
> 
> To:
> xianwei.zhao@amlogic.com
> CC:
> Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>, 
> Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley 
> <conor+dt@kernel.org>, Neil Armstrong <neil.armstrong@linaro.org>, Kevin 
> Hilman <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>, 
> Martin Blumenstingl <martin.blumenstingl@googlemail.com>, 
> linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, 
> devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, 
> linux-arm-kernel@lists.infradead.org
> 
> 
> Given Linus' comments on the cover letter,
> pw-bot: changes-requested
> 
> Thanks,
> Conor.