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From: Andrew Davis <afd@ti.com>
To: Judith Mendez <jm@ti.com>, Nishanth Menon <nm@ti.com>,
	Vignesh Raghavendra <vigneshr@ti.com>
Cc: Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Hari Nagalla <hnagalla@ti.com>, Beleswar Prasad <b-padhi@ti.com>,
	Markus Schneider-Pargmann <msp@baylibre.com>,
	Devarsh Thakkar <devarsht@lewv0571a.ent.ti.com>
Subject: Re: [PATCH v7 07/11] arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors
Date: Mon, 28 Apr 2025 11:22:54 -0500	[thread overview]
Message-ID: <dbb5e793-a7b9-43ab-a54e-28d5205fd0db@ti.com> (raw)
In-Reply-To: <20250415153147.1844076-8-jm@ti.com>

On 4/15/25 10:31 AM, Judith Mendez wrote:
> From: Devarsh Thakkar <devarsht@ti.com>
> 
> For each remote proc, reserve memory for IPC and bind the mailbox
> assignments. Two memory regions are reserved for each remote processor.
> The first region of 1MB of memory is used for Vring shared buffers
> and the second region is used as external memory to the remote processor
> for the resource table and for tracebuffer allocations.
> 
> Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 50 ++++++++++++++++++++++---
>   1 file changed, 44 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> index d29f524600af0..05760507da4ed 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> @@ -49,6 +49,30 @@ reserved-memory {
>   		#size-cells = <2>;
>   		ranges;
>   
> +		mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x00 0x9b800000 0x00 0x100000>;
> +			no-map;
> +		};
> +
> +		mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x00 0x9b900000 0x00 0xf00000>;
> +			no-map;
> +		};
> +
> +		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x00 0x9c800000 0x00 0x100000>;
> +			no-map;
> +		};
> +
> +		wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x00 0x9c900000 0x00 0xf00000>;

Since this size did change we should keep an eye out for any existing firmware
that made use of the top part of this DDR range. I haven't found any yet, but please
do work with the MCU+SDK folks to get this fixed here[0] so no one ever runs into
issues over this someday.

Reviewed-by: Andrew Davis <afd@ti.com>

[0] https://github.com/TexasInstruments/mcupsdk-core-k3/blob/93978d24d1224b43a898e9bc5182569b9abd1545/.project/templates/am62px/common/linker_wkup-r5f.cmd.xdt#L294

> +			no-map;
> +		};
> +
>   		secure_tfa_ddr: tfa@9e780000 {
>   			reg = <0x00 0x9e780000 0x00 0x80000>;
>   			no-map;
> @@ -58,12 +82,6 @@ secure_ddr: optee@9e800000 {
>   			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
>   			no-map;
>   		};
> -
> -		wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
> -			compatible = "shared-dma-pool";
> -			reg = <0x00 0x9c900000 0x00 0x01e00000>;
> -			no-map;
> -		};
>   	};
>   
>   	vmain_pd: regulator-0 {
> @@ -640,6 +658,26 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 {
>   	};
>   };
>   
> +&wkup_r5fss0 {
> +	status = "okay";
> +};
> +
> +&wkup_r5fss0_core0 {
> +	mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
> +	memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> +			<&wkup_r5fss0_core0_memory_region>;
> +};
> +
> +&mcu_r5fss0 {
> +	status = "okay";
> +};
> +
> +&mcu_r5fss0_core0 {
> +	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
> +	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> +			<&mcu_r5fss0_core0_memory_region>;
> +};
> +
>   &main_uart0 {
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&main_uart0_pins_default>;

  reply	other threads:[~2025-04-28 16:23 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-15 15:31 [PATCH v7 00/11] Add R5F and C7xv device nodes Judith Mendez
2025-04-15 15:31 ` [PATCH v7 01/11] arm64: dts: ti: k3-am62: Add ATCM and BTCM cbass ranges Judith Mendez
2025-04-15 16:34   ` Andrew Davis
2025-04-15 15:31 ` [PATCH v7 02/11] arm64: dts: ti: k3-am62-wakeup: Add wakeup R5F node Judith Mendez
2025-04-15 15:31 ` [PATCH v7 03/11] arm64: dts: ti: k3-am62a-mcu: Add R5F remote proc node Judith Mendez
2025-04-15 15:31 ` [PATCH v7 04/11] arm64: dts: ti: k3-am62a-wakeup: Add R5F device node Judith Mendez
2025-04-15 15:31 ` [PATCH v7 05/11] arm64: dts: ti: k3-am62a-main: Add C7xv " Judith Mendez
2025-04-15 15:31 ` [PATCH v7 06/11] arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors Judith Mendez
2025-04-19 15:04   ` Bryan Brattlof
2025-04-21 11:40     ` Nishanth Menon
2025-04-21 16:26       ` Bryan Brattlof
2025-04-21 19:05         ` Judith Mendez
2025-04-21 20:28           ` Andrew Davis
2025-04-21 21:49             ` Bryan Brattlof
2025-05-02 11:53   ` Nishanth Menon
2025-05-02 21:09     ` Judith Mendez
2025-04-15 15:31 ` [PATCH v7 07/11] arm64: dts: ti: k3-am62p5-sk: " Judith Mendez
2025-04-28 16:22   ` Andrew Davis [this message]
2025-04-15 15:31 ` [PATCH v7 08/11] arm64: dts: ti: k3-am62x-sk-common: " Judith Mendez
2025-04-28 16:24   ` Andrew Davis
2025-04-15 15:31 ` [PATCH v7 09/11] arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP Judith Mendez
2025-04-28 16:28   ` Andrew Davis
2025-04-15 15:31 ` [PATCH v7 10/11] arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 " Judith Mendez
2025-04-28 16:29   ` Andrew Davis
2025-04-15 15:31 ` [PATCH v7 11/11] arm64: dts: ti: k3-am64: Reserve timers used by MCU FW Judith Mendez
2025-04-28 16:29   ` Andrew Davis

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