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From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Rabara, Niravkumar L" <niravkumar.l.rabara@intel.com>,
	Dinh Nguyen <dinguyen@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: socfpga: agilex5: add clock-names property to nand node
Date: Wed, 8 Jan 2025 08:14:06 +0100	[thread overview]
Message-ID: <e85dd7c3-0dfc-499b-bd74-f9be998e488a@kernel.org> (raw)
In-Reply-To: <BL3PR11MB65326A8A7F2E413B0D8162A6A2112@BL3PR11MB6532.namprd11.prod.outlook.com>

On 07/01/2025 11:21, Rabara, Niravkumar L wrote:
> 
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>> Sent: Tuesday, 7 January, 2025 5:21 PM
>> To: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>; Dinh Nguyen
>> <dinguyen@kernel.org>; Rob Herring <robh@kernel.org>; Krzysztof Kozlowski
>> <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>;
>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH] arm64: dts: socfpga: agilex5: add clock-names property
>> to nand node
>>
>> On 07/01/2025 09:49, niravkumar.l.rabara@intel.com wrote:
>>> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>>
>>> Cadence nand controller driver requires clock-names = "nf_clk" property.
>>>
>>
>> Fixes tag.
>>
>>> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>> ---
>>>  arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>>> b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>>> index 51c6e19e40b8..4357572e96e3 100644
>>> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>>> @@ -272,6 +272,7 @@ nand: nand-controller@10b80000 {
>>>  			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>>>  			clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
>>>  			cdns,board-delay-ps = <4830>;
>>> +			clock-names = "nf_clk";
>>
>> It does not look like you tested the DTS against bindings. Please run `make
>> dtbs_check W=1` (see Documentation/devicetree/bindings/writing-
>> schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-
>> devicetree-sources-with-the-devicetree-schema/
>> for instructions).
>> Maybe you need to update your dtschema and yamllint. Don't rely on distro
>> packages for dtschema and be sure you are using the latest released
>> dtschema.
> 
> I believe you are pointing to this error message
> /soc@0/nand-controller@10b80000: failed to match any schema with
> compatible: ['cdns,hp-nfc']
> 

No. I refer to this clock-names property. As you can easily see in the
binding: there is no clock-names.

Best regards,
Krzysztof

  reply	other threads:[~2025-01-08  7:14 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-07  8:49 [PATCH] arm64: dts: socfpga: agilex5: add clock-names property to nand node niravkumar.l.rabara
2025-01-07  9:21 ` Krzysztof Kozlowski
2025-01-07 10:21   ` Rabara, Niravkumar L
2025-01-08  7:14     ` Krzysztof Kozlowski [this message]
2025-01-08 10:00       ` Rabara, Niravkumar L

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