From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Shawn Guo <shengchao.guo@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>
Cc: Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Pushpendra Singh <pussin@qti.qualcomm.com>,
Zhangfei Gao <zhangfei.gao@oss.qualcomm.com>
Subject: Re: [PATCH] arm64: dts: qcom: nord: Add bwmon node for Nord
Date: Tue, 22 Sep 2026 12:32:56 +0200 [thread overview]
Message-ID: <f2fdd3f9-4412-40b9-a4a4-c777ff023663@oss.qualcomm.com> (raw)
In-Reply-To: <20260922080416.484280-1-shengchao.guo@oss.qualcomm.com>
On 9/22/26 10:04 AM, Shawn Guo wrote:
> From: Pushpendra Singh <pussin@qti.qualcomm.com>
>
> Add BWMON nodes and associated OPP tables to enable dynamic DDR/LLCC
> frequency scaling.
[...]
> + bwmon_cluster2: pmu@1014400 {
> + reg = <0x0 0x01014400 0x0 0x600>;
len=0x500 for all the region is 0x600-long, but the docs say
it starts 0x100 earlier (with registers actually starting
at +0x400 like your node here) - unless you want to solve that
discrepancy in the driver, but i'm not sure it's worth the
hassle
otherwise
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-09-22 10:33 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-22 8:04 [PATCH] arm64: dts: qcom: nord: Add bwmon node for Nord Shawn Guo
2026-09-22 8:13 ` sashiko-bot
2026-09-22 8:26 ` Bartosz Golaszewski
2026-09-22 10:32 ` Konrad Dybcio [this message]
2026-09-22 14:56 ` Zhangfei Gao
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