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* Re: [PATCH v10 0/4] ata: Add APM X-Gene SoC SATA host controller support
From: Tejun Heo @ 2014-02-14 15:03 UTC (permalink / raw)
  To: Loc Ho
  Cc: Olof Johansson, Arnd Bergmann, Linux SCSI List,
	linux-ide@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, David Milburn, Jon Masters,
	patches@apm.com, Tuan Phan, Suman Tripathi
In-Reply-To: <CAPw-ZTn5c=v+7pbetEjXWpw9i=cG+zdeHPxO1QD0e42uFrKnCg@mail.gmail.com>

Hello, Loc.

On Thu, Feb 13, 2014 at 03:28:01PM -0800, Loc Ho wrote:
> 1. There are a number of errata that require workaround. Some can be
> fixed by adding broken flags while others are better to just wrap
> around the existent libahci library routines and not overly polluting
> the libahci routines.
> 2. There are additional controller programming sequences to configure.
> 2a. By default, RAM are powered down and require brought out of shutdown.
> 2b. The controller has an additional corresponding PHY part that needs
> to be programmed after PHY configuration.

Have you looked at the latest patchset Hans posted?  He added multiple
PHY support and split up init to three steps so that each platform
driver can mix and match as they see fit.  Looking at xgene driver,
sure there are things specific to the driver but there also are
non-insignificant amount of boilerplate code and that's what I'm
primarily concerned about.  It may be okay when you have two or three
drivers duplicating some code but it looks like we could have many
more and I *really* want to avoid the situation where the same piece
of code is copied over N times.  In addition, frankly, not many people
except yourself would care about these drivers once they're merged and
many of these are gonna be painful to test making later refactoring a
lot harder.

> 2c. The controller requires extra programming sequence for the
> hardreset due to errata.
> 2d. For the IO flush, it requires additional memory resources.

Sure, you'll need to override good parts of the driver.  What I'm
saying is please try to reuse whatever you can.  If that takes
refactoring and librarize ahci_platform, please do so and I do see
healthy chunk of duplicated code in the init path.  Please take a look
at Hans' patches and if necessary work with him so that your driver
can be part of the refactoring.

Thanks.

-- 
tejun

^ permalink raw reply

* Re: [PATCH 1/2] mfd: twl4030-madc: Add devicetree support.
From: Belisko Marek @ 2014-02-14 14:53 UTC (permalink / raw)
  To: Lee Jones
  Cc: Rob Herring, Pawel Moll, Mark Rutland,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	Kumar Gala, Rob Landley, Russell King - ARM Linux, Grant Likely,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Dr. H. Nikolaus Schaller, LKML, linux-arm-kernel
In-Reply-To: <20140214134815.GD13293@lee--X1>

On Fri, Feb 14, 2014 at 2:48 PM, Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> Signed-off-by: Marek Belisko <marek-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
>> ---
>>  .../devicetree/bindings/mfd/twl4030-madc.txt       | 18 +++++++++++++
>>  drivers/mfd/twl4030-madc.c                         | 31
>> ++++++++++++++++++++--
>
> Please separate these into different patches.
OK.
>
>>  2 files changed, 47 insertions(+), 2 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/mfd/twl4030-madc.txt
>
> <snip>
>
>> +++ b/drivers/mfd/twl4030-madc.c
>> @@ -695,6 +695,29 @@ static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
>>       return 0;
>>  }
>>
>> +#ifdef CONFIG_OF
>
> I believe we're heading for a more:
>
>   if (IS_ENABLED(CONFIG_OF))
>
> ... approach. I won't enforce it, but please consider using it.
OK I'll use it in next version.
>
>> +static struct twl4030_madc_platform_data *
>> +     twl4030_madc_of_parse(struct platform_device *pdev)
>> +{
>> +     struct twl4030_madc_platform_data *pdata;
>> +
>> +     pdata = devm_kzalloc(&pdev->dev,
>> +                     sizeof(struct twl4030_madc_platform_data), GFP_KERNEL);
>
> s/struct twl4030_madc_platform_data/*pdata/
Right typo.
>
>> +     if (!pdata)
>> +             return ERR_PTR(-ENOMEM);
>> +
>> +     pdata->irq_line = platform_get_irq(pdev, 0);
>
> Why weren't 'resources' used in the original implementation?
Not sure I'm not an author :). It's passed in platform data.
>
>> +     return pdata;
>> +}
>> +
>> +static const struct of_device_id twl4030_madc_dt_match_table[] = {
>> +     { .compatible = "ti,twl4030-madc" },
>> +     {},
>> +};
>> +
>> +#endif
>> +
>>  /*
>>   * Initialize MADC and request for threaded irq
>>   */
>> @@ -706,8 +729,11 @@ static int twl4030_madc_probe(struct platform_device *pdev)
>>       u8 regval;
>>
>>       if (!pdata) {
>> -             dev_err(&pdev->dev, "platform_data not available\n");
>> -             return -EINVAL;
>> +             pdata = twl4030_madc_of_parse(pdev);
>> +             if (!pdata) {
>
> And if you received -ENOMEM?
Hmm right. I'll fix that.
>
>> +                     dev_err(&pdev->dev, "platform_data not available\n");
>> +                     return -EINVAL;
>> +             }
>>       }
>>       madc = kzalloc(sizeof(*madc), GFP_KERNEL);
>>       if (!madc)
>> @@ -807,6 +833,7 @@ static struct platform_driver twl4030_madc_driver = {
>>       .driver = {
>>                  .name = "twl4030_madc",
>>                  .owner = THIS_MODULE,
>> +                .of_match_table = of_match_ptr(twl4030_madc_dt_match_table),
>>                  },
>>  };
>>
>
> --
> Lee Jones
> Linaro STMicroelectronics Landing Team Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog

BR,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com
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^ permalink raw reply

* Re: [PATCH] power: twl4030_madc_battery: Add device tree support.
From: Belisko Marek @ 2014-02-14 14:49 UTC (permalink / raw)
  To: Mark Rutland
  Cc: robh+dt@kernel.org, Pawel Moll, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rob@landley.net, dbaryshkov@gmail.com,
	dwmw2@infradead.org, grant.likely@linaro.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, hns@goldelico.com
In-Reply-To: <20140214134349.GB17796@e106331-lin.cambridge.arm.com>

On Fri, Feb 14, 2014 at 2:43 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> On Fri, Feb 14, 2014 at 01:24:19PM +0000, Marek Belisko wrote:
>> Signed-off-by: Marek Belisko <marek@goldelico.com>
>> ---
>>  .../bindings/power_supply/twl4030_madc_battery.txt |  15 +++
>>  drivers/power/twl4030_madc_battery.c               | 109 +++++++++++++++++++++
>>  2 files changed, 124 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt
>>
>> diff --git a/Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt b/Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt
>> new file mode 100644
>> index 0000000..bebc876
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt
>> @@ -0,0 +1,15 @@
>> +twl4030_madc_battery
>> +
>> +Required properties:
>> + - compatible : "ti,twl4030-madc-battery"
>> + - capacity : battery capacity in uAh
>> + - charging-calibration-data : list of voltage(mV):level(%) values for charging calibration (see example)
>> + - discharging-calibration-data : list of voltage(mV):level(%) values for discharging calibration (see example)
>> +
>> +Example:
>> +     madc-battery {
>> +             compatible = "ti,twl4030-madc-battery";
>> +             capacity = <1200000>;
>> +             charging-calibration-data = <4200 100 4100 75 4000 55 3900 25 3800 5 3700 2 3600 1 3300 0>;
>> +             discharging-calibration-data = <4200 100 4100 95 4000 70 3800 50 3700 10 3600 5 3300 0>;
>
> Please bracket list entries individually.
OK.
>
>> +     };
>> diff --git a/drivers/power/twl4030_madc_battery.c b/drivers/power/twl4030_madc_battery.c
>> index 7ef445a..2843382 100644
>> --- a/drivers/power/twl4030_madc_battery.c
>> +++ b/drivers/power/twl4030_madc_battery.c
>> @@ -19,6 +19,7 @@
>>  #include <linux/sort.h>
>>  #include <linux/i2c/twl4030-madc.h>
>>  #include <linux/power/twl4030_madc_battery.h>
>> +#include <linux/of.h>
>>
>>  struct twl4030_madc_battery {
>>       struct power_supply psy;
>> @@ -188,6 +189,110 @@ static int twl4030_cmp(const void *a, const void *b)
>>               ((struct twl4030_madc_bat_calibration *)a)->voltage;
>>  }
>>
>> +#ifdef CONFIG_OF
>> +static struct twl4030_madc_bat_platform_data *
>> +     twl4030_madc_dt_probe(struct platform_device *pdev)
>> +{
>> +     struct twl4030_madc_bat_platform_data *pdata;
>> +     struct device_node *np = pdev->dev.of_node;
>> +     struct property *prop;
>> +     int ret;
>> +     int sz, i, j = 0;
>> +
>> +     pdata = devm_kzalloc(&pdev->dev,
>> +                     sizeof(struct twl4030_madc_bat_platform_data),
>> +                     GFP_KERNEL);
>> +     if (!pdata)
>> +             return ERR_PTR(-ENOMEM);
>> +
>> +     ret = of_property_read_u32(np, "capacity", &pdata->capacity);
>> +     if (ret != 0)
>> +             return ERR_PTR(-EINVAL);
>> +
>> +     /* parse and prepare charging data */
>> +     prop = of_find_property(np, "charging-calibration-data", &sz);
>> +     if (!prop)
>> +             return ERR_PTR(-EINVAL);
>> +
>> +     if (sz % 2) {
>> +             dev_warn(&pdev->dev, "Count of charging-calibration-data must be even!\n");
>> +             return ERR_PTR(-EINVAL);
>> +     }
>
> As sz is in bytes this checks that the property is a multiple of 2
> bytes, not that it has an even number of u32 elements.
>
> Heiko Stübner recently added of_property_count_u32_elems [1,2]. Use that
> instead.
OK I'll convert it to that approach. Then seems code will be much
easier. Thanks for pointing to it.
>
>> +
>> +     sz /= sizeof(u32);
>> +
>> +     {
>> +             u32 data[sz];
>> +
>> +             ret = of_property_read_u32_array(np,
>> +                             "charging-calibration-data", &data[0], sz);
>> +             if (ret)
>> +                     return ERR_PTR(ret);
>
> Why not just allocate then try to read, possibly having to free if the
> read fails?
>
> Otherwise we're trying to put an arbitrarily large value onto the stack
> for no good reason.
>
>> +
>> +             pdata->charging = devm_kzalloc(&pdev->dev,
>> +                             sizeof(struct twl4030_madc_bat_calibration) * (sz / 2),
>> +                             GFP_KERNEL);
>> +
>> +             for (i = 0; i < sz; i += 2) {
>> +                     pdata->charging[j].voltage = data[i];
>> +                     pdata->charging[j].level = data[i+1];
>> +                     j++;
>
> Why not have (i = 0; i < sz/2; i++), and get rid of j?
>
>> +             }
>> +
>> +             pdata->charging_size = sz / 2;
>> +     }
>> +
>> +     /* parse and prepare discharging data */
>> +     prop = of_find_property(np, "discharging-calibration-data", &sz);
>> +     if (!prop)
>> +             return ERR_PTR(-EINVAL);
>> +
>> +     if (sz % 2) {
>> +             dev_warn(&pdev->dev, "Count of discharging-calibration-data must be even!\n");
>> +             return ERR_PTR(-EINVAL);
>> +     }
>
> This has the same issues as with charging-calibration-data.
>
> Thanks,
> Mark.
>
> [1] http://www.spinics.net/lists/devicetree/msg21358.html
> [2] http://www.spinics.net/lists/devicetree/msg21502.html

BR,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com

^ permalink raw reply

* Re: [PATCH v4 3/4] ARM: OMAP2+: add legacy display for omap3 DBB056
From: Tomi Valkeinen @ 2014-02-14 14:35 UTC (permalink / raw)
  To: Christoph Fritz
  Cc: bcousson, Nishanth Menon, Tero Kristo, Javier Martinez Canillas,
	Tony Lindgren, Daniel Mack, devicetree, linux-arm-kernel,
	linux-omap
In-Reply-To: <1392387656-15186-4-git-send-email-chf.fritz@googlemail.com>

[-- Attachment #1: Type: text/plain, Size: 935 bytes --]

Hi,

On 14/02/14 16:20, Christoph Fritz wrote:
> Full device tree support for omapdss is not yet accomplished. Until
> then, init display by legacy platform code.
> 
> Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
> ---
>  arch/arm/mach-omap2/dss-common.c   |   49 ++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-omap2/dss-common.h   |    1 +
>  arch/arm/mach-omap2/pdata-quirks.c |    8 +++++-
>  3 files changed, 57 insertions(+), 1 deletion(-)

I'm not nack'ing this, but I'm again hoping to get DSS DT support for
3.15. I haven't done any bigger changes to my branch for some time now,
and I'm just waiting to get some comments/acks for the bindings.

So I suggest to also try out DSS DT for your board, based on the latest
DSS DT branch:

git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git work/dss-dt

That way you have it ready and tested if DSS DT goes forward.

 Tomi



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^ permalink raw reply

* [PATCH] [media] of: move common endpoint parsing to drivers/media
From: Philipp Zabel @ 2014-02-14 14:33 UTC (permalink / raw)
  To: Russell King - ARM Linux, Mauro Carvalho Chehab
  Cc: Grant Likely, Rob Herring, Sylwester Nawrocki, Laurent Pinchart,
	Tomi Valkeinen, Kyungmin Park, linux-kernel, linux-media,
	devicetree, Guennadi Liakhovetski, Philipp Zabel

This patch adds a new struct of_endpoint which is embedded in struct
v4l2_of_endpoint and contains the endpoint properties that are not V4L2
specific: port number, endpoint id, local device tree node.
of_graph_parse_endpoint parses those properties and is used by
v4l2_of_parse_endpoint, which just adds the V4L2 MBUS information
to the containing v4l2_of_endpoint structure. of_graph_parse_endpoint
is split out so that non-V4L2 drivers don't have to open code reading
the port and endpoint ids from the reg properties.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 drivers/media/of_graph.c          | 32 ++++++++++++++++++++++++++++++++
 drivers/media/v4l2-core/v4l2-of.c | 16 +++-------------
 include/media/of_graph.h          | 20 ++++++++++++++++++++
 include/media/v4l2-of.h           |  9 +++------
 4 files changed, 58 insertions(+), 19 deletions(-)

diff --git a/drivers/media/of_graph.c b/drivers/media/of_graph.c
index aa526d7..5d1448a 100644
--- a/drivers/media/of_graph.c
+++ b/drivers/media/of_graph.c
@@ -14,6 +14,38 @@
 #include <linux/kernel.h>
 #include <linux/of.h>
 #include <linux/types.h>
+#include <media/of_graph.h>
+
+/**
+ * of_graph_parse_endpoint() - parse common endpoint node properties
+ * @node: pointer to endpoint device_node
+ * @endpoint: pointer to the OF endpoint data structure
+ *
+ * All properties are optional. If none are found, we don't set any flags.
+ * This means the port has a static configuration and no properties have
+ * to be specified explicitly.
+ * The caller should hold a reference to @node.
+ */
+int of_graph_parse_endpoint(const struct device_node *node,
+			    struct of_endpoint *endpoint)
+{
+	struct device_node *port_node = of_get_parent(node);
+
+	memset(endpoint, 0, sizeof(*endpoint));
+
+	endpoint->local_node = node;
+	/*
+	 * It doesn't matter whether the two calls below succeed.
+	 * If they don't then the default value 0 is used.
+	 */
+	of_property_read_u32(port_node, "reg", &endpoint->port);
+	of_property_read_u32(node, "reg", &endpoint->id);
+
+	of_node_put(port_node);
+
+	return 0;
+}
+EXPORT_SYMBOL(of_graph_parse_endpoint);
 
 /**
  * of_graph_get_next_endpoint() - get next endpoint node
diff --git a/drivers/media/v4l2-core/v4l2-of.c b/drivers/media/v4l2-core/v4l2-of.c
index f919db3..a338c88 100644
--- a/drivers/media/v4l2-core/v4l2-of.c
+++ b/drivers/media/v4l2-core/v4l2-of.c
@@ -127,17 +127,9 @@ static void v4l2_of_parse_parallel_bus(const struct device_node *node,
 int v4l2_of_parse_endpoint(const struct device_node *node,
 			   struct v4l2_of_endpoint *endpoint)
 {
-	struct device_node *port_node = of_get_parent(node);
-
-	memset(endpoint, 0, offsetof(struct v4l2_of_endpoint, head));
-
-	endpoint->local_node = node;
-	/*
-	 * It doesn't matter whether the two calls below succeed.
-	 * If they don't then the default value 0 is used.
-	 */
-	of_property_read_u32(port_node, "reg", &endpoint->port);
-	of_property_read_u32(node, "reg", &endpoint->id);
+	ret = of_graph_parse_endpoint(node, &endpoint->ep);
+	endpoint->bus_type = 0;
+	memset(&endpoint->bus, 0, sizeof(endpoint->bus));
 
 	v4l2_of_parse_csi_bus(node, endpoint);
 	/*
@@ -147,8 +139,6 @@ int v4l2_of_parse_endpoint(const struct device_node *node,
 	if (endpoint->bus.mipi_csi2.flags == 0)
 		v4l2_of_parse_parallel_bus(node, endpoint);
 
-	of_node_put(port_node);
-
 	return 0;
 }
 EXPORT_SYMBOL(v4l2_of_parse_endpoint);
diff --git a/include/media/of_graph.h b/include/media/of_graph.h
index 3bbeb60..2b233db 100644
--- a/include/media/of_graph.h
+++ b/include/media/of_graph.h
@@ -14,7 +14,21 @@
 #ifndef __LINUX_OF_GRAPH_H
 #define __LINUX_OF_GRAPH_H
 
+/**
+ * struct of_endpoint - the OF graph endpoint data structure
+ * @port: identifier (value of reg property) of a port this endpoint belongs to
+ * @id: identifier (value of reg property) of this endpoint
+ * @local_node: pointer to device_node of this endpoint
+ */
+struct of_endpoint {
+	unsigned int port;
+	unsigned int id;
+	const struct device_node *local_node;
+};
+
 #ifdef CONFIG_OF
+int of_graph_parse_endpoint(const struct device_node *node,
+				struct of_endpoint *endpoint);
 struct device_node *of_graph_get_next_endpoint(const struct device_node *parent,
 					struct device_node *previous);
 struct device_node *of_graph_get_remote_port_parent(
@@ -22,6 +36,12 @@ struct device_node *of_graph_get_remote_port_parent(
 struct device_node *of_graph_get_remote_port(const struct device_node *node);
 #else
 
+static inline int of_graph_parse_endpoint(const struct device_node *node,
+					struct of_endpoint *endpoint);
+{
+	return -ENOSYS;
+}
+
 static inline struct device_node *of_graph_get_next_endpoint(
 					const struct device_node *parent,
 					struct device_node *previous)
diff --git a/include/media/v4l2-of.h b/include/media/v4l2-of.h
index 8174282..d61def1 100644
--- a/include/media/v4l2-of.h
+++ b/include/media/v4l2-of.h
@@ -18,6 +18,7 @@
 #include <linux/types.h>
 #include <linux/errno.h>
 
+#include <media/of_graph.h>
 #include <media/v4l2-mediabus.h>
 
 struct device_node;
@@ -50,17 +51,13 @@ struct v4l2_of_bus_parallel {
 
 /**
  * struct v4l2_of_endpoint - the endpoint data structure
- * @port: identifier (value of reg property) of a port this endpoint belongs to
- * @id: identifier (value of reg property) of this endpoint
- * @local_node: pointer to device_node of this endpoint
+ * @ep: struct of_endpoint containing port, id, and local of_node
  * @bus_type: bus type
  * @bus: bus configuration data structure
  * @head: list head for this structure
  */
 struct v4l2_of_endpoint {
-	unsigned int port;
-	unsigned int id;
-	const struct device_node *local_node;
+	struct of_endpoint ep;
 	enum v4l2_mbus_type bus_type;
 	union {
 		struct v4l2_of_bus_parallel parallel;
-- 
1.8.5.3

^ permalink raw reply related

* [PATCH 2/2] Documentation: iio: Extend documentation for hmc5843 bindings.
From: Marek Belisko @ 2014-02-14 14:25 UTC (permalink / raw)
  To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak, rob,
	jic23
  Cc: devel, devicetree, linux-doc, linux-iio, hns, linux-kernel,
	pmeerw, Marek Belisko
In-Reply-To: <1392387929-31491-1-git-send-email-marek@goldelico.com>

Signed-off-by: Marek Belisko <marek@goldelico.com>
---
 Documentation/devicetree/bindings/iio/magnetometer/hmc5843.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/iio/magnetometer/hmc5843.txt b/Documentation/devicetree/bindings/iio/magnetometer/hmc5843.txt
index 90d5f34..b8cbdd5 100644
--- a/Documentation/devicetree/bindings/iio/magnetometer/hmc5843.txt
+++ b/Documentation/devicetree/bindings/iio/magnetometer/hmc5843.txt
@@ -3,6 +3,9 @@
 Required properties:
 
   - compatible : should be "honeywell,hmc5843"
+  Other models which are supported with driver are:
+	"honeywell,hmc5883"
+	"honeywell,hmc5883l"
   - reg : the I2C address of the magnetometer - typically 0x1e
 
 Optional properties:
-- 
1.8.3.2

^ permalink raw reply related

* [PATCH 1/2] staging: iio: hmc5843: Add all available models to device tree id table.
From: Marek Belisko @ 2014-02-14 14:25 UTC (permalink / raw)
  To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, pawel.moll-5wv7dgnIgG8,
	mark.rutland-5wv7dgnIgG8, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg,
	galak-sgV2jX0FEOL9JmXXK+q4OQ, rob-VoJi6FS/r0vR7s880joybQ,
	jic23-DgEjT+Ai2ygdnm+yROfE0A
  Cc: pmeerw-jW+XmwGofnusTnJN9+BGXg, devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-doc-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-iio-u79uwXL29TY76Z2rM5mHXA,
	devel-gWbeCf7V1WCQmaza687I9mD2FQJk+8+b,
	hns-xXXSsgcRVICgSpxsJD1C4w, Marek Belisko

Signed-off-by: Marek Belisko <marek-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
---
 drivers/staging/iio/magnetometer/hmc5843.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/iio/magnetometer/hmc5843.c b/drivers/staging/iio/magnetometer/hmc5843.c
index d4f4dd9..f595fdc 100644
--- a/drivers/staging/iio/magnetometer/hmc5843.c
+++ b/drivers/staging/iio/magnetometer/hmc5843.c
@@ -630,7 +630,9 @@ static const struct i2c_device_id hmc5843_id[] = {
 MODULE_DEVICE_TABLE(i2c, hmc5843_id);
 
 static const struct of_device_id hmc5843_of_match[] = {
-	{ .compatible = "honeywell,hmc5843" },
+	{ .compatible = "honeywell,hmc5843", .data = (void *)HMC5843_ID },
+	{ .compatible = "honeywell,hmc5883", .data = (void *)HMC5883_ID },
+	{ .compatible = "honeywell,hmc5883l", .data = (void *)HMC5883L_ID },
 	{}
 };
 MODULE_DEVICE_TABLE(of, hmc5843_of_match);
-- 
1.8.3.2

^ permalink raw reply related

* [PATCH v4 4/4] ARM: OMAP2+: Add pdata quirk for sys_clkout2 for omap3 DBB056
From: Christoph Fritz @ 2014-02-14 14:20 UTC (permalink / raw)
  To: bcousson-rdvid1DuHRBWk0Htik3J/w
  Cc: Tomi Valkeinen, Nishanth Menon, Tero Kristo,
	Javier Martinez Canillas, Tony Lindgren, Daniel Mack,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-omap-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1392387656-15186-1-git-send-email-chf.fritz-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>

Full device tree support for clock control, especially to set frequencies,
is not yet accomplished. Until then, configure the 24Mhz of sys_clkout2 to
feed an USB-Hub here.

Signed-off-by: Christoph Fritz <chf.fritz-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
---
 arch/arm/mach-omap2/pdata-quirks.c |   37 ++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 435a823..e36ac3f 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -172,6 +172,43 @@ static void __init am3517_evm_legacy_init(void)
 
 static void __init omap3_dbb056_legacy_init(void)
 {
+	struct clk *clkout2;
+	struct clk *cm96fck;
+
+	/* Reparent clkout2 to 96M_FCK */
+	pr_info("%s: Late Reparent clkout2 to 96M_FCK\n", __func__);
+	clkout2 = clk_get(NULL, "clkout2_src_ck");
+	if (clkout2 < 0) {
+		pr_err("a83x-quirk: couldn't get clkout2_src_ck\n");
+		return;
+	}
+	cm96fck = clk_get(NULL, "cm_96m_fck");
+	if (cm96fck < 0) {
+		pr_err("a83x-quirk: couldn't get cm_96m_fck\n");
+		return;
+	}
+	if (clk_set_parent(clkout2, cm96fck) < 0) {
+		pr_err("a83x-quirk: couldn't reparent clkout2_src_ck\n");
+		return;
+	}
+
+	/* Set clkout2 to 24MHz for internal usb hub*/
+	pr_info("%s: Set clkout2 to 24MHz for internal usb hub\n", __func__);
+	clkout2 = clk_get(NULL, "sys_clkout2");
+	if (clkout2 < 0) {
+		pr_err("%s: couldn't get sys_clkout2\n", __func__);
+		return;
+	}
+	if (clk_set_rate(clkout2, 24000000) < 0) {
+		pr_err("%s: couldn't set sys_clkout2 rate\n", __func__);
+		return;
+	}
+	if (clk_prepare_enable(clkout2) < 0) {
+		pr_err("%s: couldn't enable sys_clkout2\n", __func__);
+		return;
+	}
+
+	/* Initialize display */
 	omap3_dbb056_display_init_of();
 }
 #endif /* CONFIG_ARCH_OMAP3 */
-- 
1.7.10.4

--
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^ permalink raw reply related

* [PATCH v4 3/4] ARM: OMAP2+: add legacy display for omap3 DBB056
From: Christoph Fritz @ 2014-02-14 14:20 UTC (permalink / raw)
  To: bcousson
  Cc: Tomi Valkeinen, Nishanth Menon, Tero Kristo,
	Javier Martinez Canillas, Tony Lindgren, Daniel Mack, devicetree,
	linux-arm-kernel, linux-omap
In-Reply-To: <1392387656-15186-1-git-send-email-chf.fritz@googlemail.com>

Full device tree support for omapdss is not yet accomplished. Until
then, init display by legacy platform code.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
---
 arch/arm/mach-omap2/dss-common.c   |   49 ++++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/dss-common.h   |    1 +
 arch/arm/mach-omap2/pdata-quirks.c |    8 +++++-
 3 files changed, 57 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c
index dadccc9..b8b4e39 100644
--- a/arch/arm/mach-omap2/dss-common.c
+++ b/arch/arm/mach-omap2/dss-common.c
@@ -257,3 +257,52 @@ void __init omap3_igep2_display_init_of(void)
 	platform_device_register(&omap3_igep2_tfp410_device);
 	platform_device_register(&omap3_igep2_dvi_connector_device);
 }
+
+/* OMAP3 dbb056 data */
+
+#define DBB056_DISPLAY_ENABLE_GPIO 156
+
+static const struct display_timing dbb056_lcd_videomode = {
+	.pixelclock = { 0, 19200000, 0 },
+
+	.hactive = { 0, 640, 0 },
+	.hfront_porch = { 0, 104, 0 },
+	.hback_porch = { 0, 8, 0 },
+	.hsync_len = { 0, 8, 0 },
+
+	.vactive = { 0, 480, 0 },
+	.vfront_porch = { 0, 104, 0 },
+	.vback_porch = { 0, 8, 0 },
+	.vsync_len = { 0, 8, 0 },
+
+	.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
+		DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE,
+};
+
+static struct panel_dpi_platform_data dbb056_lcd_pdata = {
+	.name                   = "lcd",
+	.source                 = "dpi.0",
+
+	.data_lines             = 18,
+
+	.display_timing         = &dbb056_lcd_videomode,
+
+	.enable_gpio            = DBB056_DISPLAY_ENABLE_GPIO,
+	.backlight_gpio         = -1,
+};
+
+static struct platform_device dbb056_lcd_device = {
+	.name                   = "panel-dpi",
+	.id                     = 0,
+	.dev.platform_data      = &dbb056_lcd_pdata,
+};
+
+static struct omap_dss_board_info omap_dbb056_dss_data = {
+	.default_display_name = "lcd",
+};
+
+void __init omap3_dbb056_display_init_of(void)
+{
+	platform_device_register(&dbb056_lcd_device);
+	omap_display_init(&omap_dbb056_dss_data);
+}
diff --git a/arch/arm/mach-omap2/dss-common.h b/arch/arm/mach-omap2/dss-common.h
index a9becf0..a125b55 100644
--- a/arch/arm/mach-omap2/dss-common.h
+++ b/arch/arm/mach-omap2/dss-common.h
@@ -9,5 +9,6 @@
 void __init omap4_panda_display_init_of(void);
 void __init omap_4430sdp_display_init_of(void);
 void __init omap3_igep2_display_init_of(void);
+void __init omap3_dbb056_display_init_of(void);
 
 #endif
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 3d5b24d..435a823 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -169,6 +169,11 @@ static void __init am3517_evm_legacy_init(void)
 	omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
 	omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
 }
+
+static void __init omap3_dbb056_legacy_init(void)
+{
+	omap3_dbb056_display_init_of();
+}
 #endif /* CONFIG_ARCH_OMAP3 */
 
 #ifdef CONFIG_ARCH_OMAP4
@@ -259,10 +264,11 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
 static struct pdata_init pdata_quirks[] __initdata = {
 #ifdef CONFIG_ARCH_OMAP3
 	{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
+	{ "incostartec,omap3-lilly-dbb056", omap3_dbb056_legacy_init, },
+	{ "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
 	{ "nokia,omap3-n900", hsmmc2_internal_input_clk, },
 	{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },
 	{ "nokia,omap3-n950", hsmmc2_internal_input_clk, },
-	{ "isee,omap3-igep0020", omap3_igep0020_legacy_init, },
 	{ "ti,omap3-evm-37xx", omap3_evm_legacy_init, },
 	{ "ti,omap3-zoom3", omap3_zoom_legacy_init, },
 	{ "ti,am3517-evm", am3517_evm_legacy_init, },
-- 
1.7.10.4


^ permalink raw reply related

* [PATCH v4 2/4] ARM: dts: omap3: Add support for INCOstartec DBB056 baseboard
From: Christoph Fritz @ 2014-02-14 14:20 UTC (permalink / raw)
  To: bcousson
  Cc: Tomi Valkeinen, Nishanth Menon, Tero Kristo,
	Javier Martinez Canillas, Tony Lindgren, Daniel Mack, devicetree,
	linux-arm-kernel, linux-omap
In-Reply-To: <1392387656-15186-1-git-send-email-chf.fritz@googlemail.com>

INCOstartec LILLY-DBB056 is a carrier board (baseboard) for
computer-on-module LILLY-A83X.

This patch adds device-tree support for most of its features.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
---
 arch/arm/boot/dts/Makefile               |    1 +
 arch/arm/boot/dts/omap3-lilly-dbb056.dts |  170 ++++++++++++++++++++++++++++++
 2 files changed, 171 insertions(+)
 create mode 100644 arch/arm/boot/dts/omap3-lilly-dbb056.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b..cee7564 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -212,6 +212,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
 	omap3-gta04.dtb \
 	omap3-igep0020.dtb \
 	omap3-igep0030.dtb \
+	omap3-lilly-dbb056.dtb \
 	omap3-zoom3.dtb \
 	omap4-panda.dtb \
 	omap4-panda-a4.dtb \
diff --git a/arch/arm/boot/dts/omap3-lilly-dbb056.dts b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
new file mode 100644
index 0000000..834f7c6
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
@@ -0,0 +1,170 @@
+/*
+ * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+/dts-v1/;
+
+#include "omap3-lilly-a83x.dtsi"
+
+/ {
+	model = "INCOstartec LILLY-DBB056 (DM3730)";
+	compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
+};
+
+&twl {
+	vaux2: regulator-vaux2 {
+		compatible = "ti,twl4030-vaux2";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		regulator-always-on;
+	};
+};
+
+&omap3_pmx_core {
+	pinctrl-names = "default";
+	pinctrl-0 = <&lcd_pins>;
+
+	lan9117_pins: pinmux_lan9117_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4)   /* cam_fld.gpio_98 */
+		>;
+	};
+
+	gpio4_pins: pinmux_gpio4_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4)   /* cam_xclkb.gpio_111 -> sja1000 IRQ */
+		>;
+	};
+
+	gpio5_pins: pinmux_gpio5_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x218c, PIN_OUTPUT | PIN_OFF_OUTPUT_HIGH | MUX_MODE4)   /* mcbsp1_clk.gpio_156 -> enable DSS */
+		>;
+	};
+
+	lcd_pins: pinmux_lcd_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
+			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
+			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
+			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
+			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
+			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
+			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
+			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
+			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
+			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
+			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
+			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
+			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
+			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
+			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
+			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
+			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
+			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
+			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
+			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
+			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
+			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
+		>;
+	};
+
+	mmc2_pins: pinmux_mmc2_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc2_clk.sdmmc2_clk */
+			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc2_cmd.sdmmc2_cmd */
+			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc2_dat0.sdmmc2_dat0 */
+			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc2_dat1.sdmmc2_dat1 */
+			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc2_dat2.sdmmc2_dat2 */
+			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc2_dat3.sdmmc2_dat3 */
+			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1)   /* sdmmc2_dat4.sdmmc2_dir_dat0 */
+			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1)   /* sdmmc2_dat5.sdmmc2_dir_dat1 */
+			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1)   /* sdmmc2_dat6.sdmmc2_dir_cmd */
+			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1)    /* sdmmc2_dat7.sdmmc2_clkin */
+			OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4)   /* uart3_cts_rctx.gpio_163 -> wp */
+			OMAP3_CORE1_IOPAD(0x219c, PIN_INPUT_PULLUP | MUX_MODE4)   /* uart3_rts_sd.gpio_164 -> cd */
+		>;
+	};
+
+	spi1_pins: pinmux_spi1_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)   /* mcspi1_clk.mcspi1_clk */
+			OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0)   /* mcspi1_simo.mcspi1_simo */
+			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0)   /* mcspi1_somi.mcspi1_somi */
+			OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi1_cs0.mcspi1_cs0 */
+		>;
+	};
+};
+
+&gpio4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&gpio4_pins>;
+};
+
+&gpio5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&gpio5_pins>;
+};
+
+&mmc2 {
+	status = "okay";
+	bus-width = <4>;
+	vmmc-supply = <&vmmc1>;
+	cd-gpios = <&gpio6 4 0>;   /* gpio_164 */
+	wp-gpios = <&gpio6 3 0>;   /* gpio_163 */
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_pins>;
+	ti,dual-volt;
+};
+
+&mcspi1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_pins>;
+};
+
+&gpmc {
+	ranges = <0 0 0x30000000 0x1000000>,   /* nand assigned by COM a83x */
+		<4 0 0x20000000 0x01000000>,
+		<7 0 0x15000000 0x01000000>;   /* eth assigend by COM a83x */
+
+	ethernet@4,0 {
+		compatible = "smsc,lan9117", "smsc,lan9115";
+		bank-width = <2>;
+		gpmc,mux-add-data = <2>;
+		gpmc,cs-on-ns = <10>;
+		gpmc,cs-rd-off-ns = <65>;
+		gpmc,cs-wr-off-ns = <65>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <10>;
+		gpmc,adv-wr-off-ns = <10>;
+		gpmc,oe-on-ns = <10>;
+		gpmc,oe-off-ns = <65>;
+		gpmc,we-on-ns = <10>;
+		gpmc,we-off-ns = <65>;
+		gpmc,rd-cycle-ns = <100>;
+		gpmc,wr-cycle-ns = <100>;
+		gpmc,access-ns = <60>;
+		gpmc,page-burst-access-ns = <5>;
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <75>;
+		gpmc,wr-data-mux-bus-ns = <15>;
+		gpmc,wr-access-ns = <75>;
+		gpmc,cycle2cycle-samecsen;
+		gpmc,cycle2cycle-diffcsen;
+		vddvario-supply = <&reg_vcc3>;
+		vdd33a-supply = <&reg_vcc3>;
+		reg-io-width = <4>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <2 0x2>;
+		reg = <4 0 0xff>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&lan9117_pins>;
+		phy-mode = "mii";
+		smsc,force-internal-phy;
+	};
+};
-- 
1.7.10.4


^ permalink raw reply related

* [PATCH v4 1/4] ARM: dts: omap3: Add support for INCOstartec a83x module
From: Christoph Fritz @ 2014-02-14 14:20 UTC (permalink / raw)
  To: bcousson
  Cc: Tomi Valkeinen, Nishanth Menon, Tero Kristo,
	Javier Martinez Canillas, Tony Lindgren, Daniel Mack, devicetree,
	linux-arm-kernel, linux-omap
In-Reply-To: <1392387656-15186-1-git-send-email-chf.fritz@googlemail.com>

INCOstartec LILLY-A83X module is a TI DM3730xx100 (OMAP3) SoC
computer-on-module.

This patch adds device tree support for most of its features.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
---
 arch/arm/boot/dts/omap3-lilly-a83x.dtsi |  459 +++++++++++++++++++++++++++++++
 1 file changed, 459 insertions(+)
 create mode 100644 arch/arm/boot/dts/omap3-lilly-a83x.dtsi

diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
new file mode 100644
index 0000000..6369d9f
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -0,0 +1,459 @@
+/*
+ * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include "omap36xx.dtsi"
+
+/ {
+	model = "INCOstartec LILLY-A83X module (DM3730)";
+	compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
+
+	chosen {
+			bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x8000000>;   /* 128 MB */
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led1 {
+			label = "lilly-a83x::led1";
+			gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "default-on";
+		};
+
+	};
+
+	sound {
+		compatible = "ti,omap-twl4030";
+		ti,model = "lilly-a83x";
+
+		ti,mcbsp = <&mcbsp2>;
+		ti,codec = <&twl_audio>;
+	};
+
+	reg_vcc3: vcc3 {
+		compatible = "regulator-fixed";
+		regulator-name = "VCC3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
+	hsusb1_phy: hsusb1_phy {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&reg_vcc3>;
+	};
+};
+
+&omap3_pmx_wkup {
+	pinctrl-names = "default";
+
+	lan9221_pins: pinmux_lan9221_pins {
+		pinctrl-single,pins = <
+			OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_129 */
+		>;
+	};
+
+	tsc2048_pins: pinmux_tsc2048_pins {
+		pinctrl-single,pins = <
+			OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4)   /* sys_boot6.gpio_8 */
+		>;
+	};
+
+	mmc1cd_pins: pinmux_mmc1cd_pins {
+		pinctrl-single,pins = <
+			OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_126 */
+		>;
+	};
+};
+
+&omap3_pmx_core {
+	pinctrl-names = "default";
+
+	uart1_pins: pinmux_uart1_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)   /* uart1_tx.uart1_tx */
+			OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)   /* uart1_rts.uart1_rts */
+			OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)    /* uart1_cts.uart1_cts */
+			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)    /* uart1_rx.uart1_rx */
+		>;
+	};
+
+	uart2_pins: pinmux_uart2_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)   /* mcbsp3_clkx.uart2_tx */
+			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)    /* mcbsp3_fsx.uart2_rx */
+		>;
+	};
+
+	uart3_pins: pinmux_uart3_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)    /* uart3_rx_irrx.uart3_rx_irrx */
+			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)   /* uart3_tx_irtx.uart3_tx_irtx */
+		>;
+	};
+
+	i2c1_pins: pinmux_i2c1_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_scl.i2c1_scl */
+			OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_sda.i2c1_sda */
+		>;
+	};
+
+	i2c2_pins: pinmux_i2c2_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
+			OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
+		>;
+	};
+
+	i2c3_pins: pinmux_i2c3_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
+			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
+		>;
+	};
+
+	hsusb1_pins: pinmux_hsusb1_pins {
+		pinctrl-single,pins = <
+
+			/* GPIO 182 controls USB-Hub reset. But USB-Phy its
+			 * reset can't be controlled. So we clamp this GPIO to
+			 * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
+			 */
+
+			OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4)   /* mcspi2_cs1.gpio_182 */
+		>;
+	};
+
+	hsusb_otg_pins: pinmux_hsusb_otg_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)   /* hsusb0_clk.hsusb0_clk */
+			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)  /* hsusb0_stp.hsusb0_stp */
+			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)   /* hsusb0_dir.hsusb0_dir */
+			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)   /* hsusb0_nxt.hsusb0_nxt */
+			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)   /* hsusb0_data0.hsusb0_data0 */
+			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)   /* hsusb0_data1.hsusb0_data1 */
+			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)   /* hsusb0_data2.hsusb0_data2 */
+			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)   /* hsusb0_data3.hsusb0_data3 */
+			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)   /* hsusb0_data4.hsusb0_data4 */
+			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)   /* hsusb0_data5.hsusb0_data5 */
+			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)   /* hsusb0_data6.hsusb0_data6 */
+			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)   /* hsusb0_data7.hsusb0_data7 */
+		>;
+	};
+
+	mmc1_pins: pinmux_mmc1_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
+			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_cmd.sdmmc1_cmd */
+			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat0.sdmmc1_dat0 */
+			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat1.sdmmc1_dat1 */
+			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat2.sdmmc1_dat2 */
+			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat3.sdmmc1_dat3 */
+		>;
+	};
+
+	spi2_pins: pinmux_spi2_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_clk.mcspi2_clk */
+			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_simo.mcspi2_simo */
+			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_somi.mcspi2_somi */
+			OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0)   /* mcspi2_cs0.mcspi2_cs0 */
+		>;
+	};
+};
+
+&omap3_pmx_core2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&hsusb1_2_pins
+	>;
+
+	hsusb1_2_pins: pinmux_hsusb1_2_pins {
+		pinctrl-single,pins = <
+			OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)  /* etk_clk.hsusb1_stp */
+			OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3)   /* etk_ctl.hsusb1_clk */
+			OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3)   /* etk_d0.hsusb1_data0 */
+			OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3)   /* etk_d1.hsusb1_data1 */
+			OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3)   /* etk_d2.hsusb1_data2 */
+			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3)   /* etk_d3.hsusb1_data7 */
+			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3)   /* etk_d4.hsusb1_data4 */
+			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3)   /* etk_d5.hsusb1_data5 */
+			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3)   /* etk_d6.hsusb1_data6 */
+			OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3)   /* etk_d7.hsusb1_data3 */
+			OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3)   /* etk_d8.hsusb1_dir */
+			OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3)   /* etk_d9.hsusb1_nxt */
+		>;
+	};
+
+	gpio1_pins: pinmux_gpio1_pins {
+		pinctrl-single,pins = <
+			OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4)   /* etk_d15.gpio_29 */
+		>;
+	};
+
+};
+
+&gpio1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&gpio1_pins>;
+};
+
+&gpio6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hsusb1_pins>;
+};
+
+&i2c1 {
+	clock-frequency = <2600000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_pins>;
+
+	twl: twl@48 {
+		reg = <0x48>;
+		interrupts = <7>;   /* SYS_NIRQ cascaded to intc */
+		interrupt-parent = <&intc>;
+
+		twl_audio: audio {
+			compatible = "ti,twl4030-audio";
+			codec {
+			};
+		};
+	};
+};
+
+#include "twl4030.dtsi"
+#include "twl4030_omap3.dtsi"
+
+&twl {
+	vmmc1: regulator-vmmc1 {
+		regulator-always-on;
+	};
+
+	vdd1: regulator-vdd1 {
+		regulator-always-on;
+	};
+
+	vdd2: regulator-vdd2 {
+		regulator-always-on;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <2600000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_pins>;
+};
+
+&i2c3 {
+	clock-frequency = <2600000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c3_pins>;
+		gpiom1: gpio@20 {
+			compatible = "mcp,mcp23017";
+			gpio-controller;
+			#gpio-cells = <2>;
+			reg = <0x20>;
+		};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pins>;
+};
+
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_pins>;
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart3_pins>;
+};
+
+&uart4 {
+	status = "disabled";
+};
+
+&mmc1 {
+	cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
+	cd-inverted;
+	vmmc-supply = <&vmmc1>;
+	bus-width = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
+	cap-sdio-irq;
+	cap-sd-highspeed;
+	cap-mmc-highspeed;
+};
+
+&mmc2 {
+	status = "disabled";
+};
+
+&mmc3 {
+	status = "disabled";
+};
+
+&mcspi2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi2_pins>;
+
+	tsc2046@0 {
+		reg = <0>;   /* CS0 */
+		compatible = "ti,tsc2046";
+		interrupt-parent = <&gpio1>;
+		interrupts = <8 0>;   /* boot6 / gpio_8 */
+		spi-max-frequency = <1000000>;
+		pendown-gpio = <&gpio1 8 0>;
+		vcc-supply = <&reg_vcc3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tsc2048_pins>;
+
+		ti,x-min = <300>;
+		ti,x-max = <3000>;
+		ti,y-min = <600>;
+		ti,y-max = <3600>;
+		ti,x-plate-ohms = <80>;
+		ti,pressure-max = <255>;
+		ti,swap-xy;
+
+		linux,wakeup;
+	};
+};
+
+&usbhsehci {
+	phys = <&hsusb1_phy>;
+};
+
+&usbhshost {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hsusb1_2_pins>;
+	num-ports = <2>;
+	port1-mode = "ehci-phy";
+};
+
+&usb_otg_hs {
+	pinctrl-names = "default";
+	pinctrl-0 = <&hsusb_otg_pins>;
+	interface-type = <0>;
+	usb-phy = <&usb2_phy>;
+	phys = <&usb2_phy>;
+	phy-names = "usb2-phy";
+	mode = <3>;
+	power = <50>;
+};
+
+&gpmc {
+	ranges = <0 0 0x30000000 0x1000000>,
+		<7 0 0x15000000 0x01000000>;
+
+	nand@0,0 {
+		reg = <0 0 0x1000000>;
+		nand-bus-width = <16>;
+		ti,nand-ecc-opt = "bch8";
+		/* no elm on omap3 */
+
+		gpmc,mux-add-data = <0>;
+		gpmc,device-nand;
+		gpmc,device-width = <2>;
+		gpmc,wait-pin = <0>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,burst-length= <4>;
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <100>;
+		gpmc,cs-wr-off-ns = <100>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <100>;
+		gpmc,adv-wr-off-ns = <100>;
+		gpmc,oe-on-ns = <5>;
+		gpmc,oe-off-ns = <75>;
+		gpmc,we-on-ns = <5>;
+		gpmc,we-off-ns = <75>;
+		gpmc,rd-cycle-ns = <100>;
+		gpmc,wr-cycle-ns = <100>;
+		gpmc,access-ns = <60>;
+		gpmc,page-burst-access-ns = <5>;
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-samecsen;
+		gpmc,cycle2cycle-delay-ns = <50>;
+		gpmc,wr-data-mux-bus-ns = <75>;
+		gpmc,wr-access-ns = <155>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "MLO";
+			reg = <0 0x80000>;
+		};
+
+		partition@0x80000 {
+			label = "u-boot";
+			reg = <0x80000 0x1e0000>;
+		};
+
+		partition@0x260000 {
+			label = "u-boot-environment";
+			reg = <0x260000 0x20000>;
+		};
+
+		partition@0x280000 {
+			label = "kernel";
+			reg = <0x280000 0x500000>;
+		};
+
+		partition@0x780000 {
+			label = "filesystem";
+			reg = <0x780000 0xf880000>;
+		};
+	};
+
+	ethernet@7,0 {
+		compatible = "smsc,lan9221", "smsc,lan9115";
+		bank-width = <2>;
+		gpmc,mux-add-data = <2>;
+		gpmc,cs-on-ns = <10>;
+		gpmc,cs-rd-off-ns = <60>;
+		gpmc,cs-wr-off-ns = <60>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <10>;
+		gpmc,adv-wr-off-ns = <10>;
+		gpmc,oe-on-ns = <10>;
+		gpmc,oe-off-ns = <60>;
+		gpmc,we-on-ns = <10>;
+		gpmc,we-off-ns = <60>;
+		gpmc,rd-cycle-ns = <100>;
+		gpmc,wr-cycle-ns = <100>;
+		gpmc,access-ns = <50>;
+		gpmc,page-burst-access-ns = <5>;
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <75>;
+		gpmc,wr-data-mux-bus-ns = <15>;
+		gpmc,wr-access-ns = <75>;
+		gpmc,cycle2cycle-samecsen;
+		gpmc,cycle2cycle-diffcsen;
+		vddvario-supply = <&reg_vcc3>;
+		vdd33a-supply = <&reg_vcc3>;
+		reg-io-width = <4>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <1 0x2>;
+		reg = <7 0 0xff>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&lan9221_pins>;
+		phy-mode = "mii";
+	};
+};
-- 
1.7.10.4


^ permalink raw reply related

* [PATCH v4 0/4]
From: Christoph Fritz @ 2014-02-14 14:20 UTC (permalink / raw)
  To: bcousson
  Cc: Tomi Valkeinen, Nishanth Menon, Tero Kristo,
	Javier Martinez Canillas, Tony Lindgren, Daniel Mack, devicetree,
	linux-arm-kernel, linux-omap

This set of patches adds board support for an omap36 (dm3730) system
from INCOstartec.  It's based on Linux 3.14-rc2 + patch series:
"OMAP: OMAP3 DSS related clock patches".

Due to boot order and deferring probe, IRQs for network and USB couldn't
be requested (see Bootlog below).

Changes compared to previous version (v4):
 - rebased on Linux 3.14-rc2 + series: "OMAP: OMAP3 DSS related clock patches"
 - move gpio_156 (DSS enable pin) pinctrl to &gpio5 domain
Changes compared to previous version (v3):
 - rebased on next-20140124
 - use pinctrl macros OMAP3_WKUP_IOPAD, OMAP3_CORE1_IOPAD
   and OMAP3630_CORE2_IOPAD
 - use same convention for all comments
 - dss-quirk: name twl4030 VPLL2 regulator as vdds_dsi
 - fix style
Changes compared to previous version (v2):
 - rebased on next-20140122 from next-20140115
 - using omap36xx.dtsi instead of unsupported 1ghz omap37xx100
Initial version (v1):
 - based on next-20140115

Christoph Fritz (4):
  ARM: dts: omap3: Add support for INCOstartec a83x module
  ARM: dts: omap3: Add support for INCOstartec DBB056 baseboard
  ARM: OMAP2+: add legacy display for omap3 DBB056
  ARM: OMAP2+: Add pdata quirk for sys_clkout2 for omap3 DBB056

 arch/arm/boot/dts/Makefile               |    1 +
 arch/arm/boot/dts/omap3-lilly-a83x.dtsi  |  459 ++++++++++++++++++++++++++++++
 arch/arm/boot/dts/omap3-lilly-dbb056.dts |  170 +++++++++++
 arch/arm/mach-omap2/dss-common.c         |   49 ++++
 arch/arm/mach-omap2/dss-common.h         |    1 +
 arch/arm/mach-omap2/pdata-quirks.c       |   45 ++-
 6 files changed, 724 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/omap3-lilly-a83x.dtsi
 create mode 100644 arch/arm/boot/dts/omap3-lilly-dbb056.dts

Bootlog:

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 3.14.0-rc2+ (c@c) (gcc version 4.7.3 20121106 (prerelease) (linaro-4.7-2012.11) ) #1 PREEMPT Fri Feb 14 14:50:48 CET 2014
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] Machine model: INCOstartec LILLY-DBB056 (DM3730)
[    0.000000] Memory policy: Data cache writeback
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] OMAP3630 ES1.2 (l2cache iva sgx neon isp 192mhz_clk )
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32256
[    0.000000] Kernel command line: console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0 ip=dhcp root=/dev/nfs
[    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Memory: 115052K/130048K available (5686K kernel code, 415K rwdata, 1852K rodata, 216K init, 5434K bss, 14996K reserved, 0K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
[    0.000000]     vmalloc : 0xc8800000 - 0xff000000   ( 872 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xc8000000   ( 128 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0764c3c   (7540 kB)
[    0.000000]       .init : 0xc0765000 - 0xc079b3c8   ( 217 kB)
[    0.000000]       .data : 0xc079c000 - 0xc0803c40   ( 416 kB)
[    0.000000]        .bss : 0xc0803c4c - 0xc0d52814   (5435 kB)
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts
[    0.000000] Total of 96 interrupts on 1 active controller
[    0.000000] Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz
[    0.000000] OMAP clockevent source: timer1 at 32768 Hz
[    9.571105] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 65536000000000ns
[    0.000000] OMAP clocksource: 32k_counter at 32768 Hz
[    0.000915] Console: colour dummy device 80x30
[    0.001007] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[    0.001007] ... MAX_LOCKDEP_SUBCLASSES:  8
[    0.001007] ... MAX_LOCK_DEPTH:          48
[    0.001037] ... MAX_LOCKDEP_KEYS:        8191
[    0.001037] ... CLASSHASH_SIZE:          4096
[    0.001068] ... MAX_LOCKDEP_ENTRIES:     16384
[    0.001068] ... MAX_LOCKDEP_CHAINS:      32768
[    0.001068] ... CHAINHASH_SIZE:          16384
[    0.001098]  memory used by lock dependency info: 3695 kB
[    0.001098]  per task-struct memory footprint: 1152 bytes
[    0.001159] Calibrating delay loop... 594.73 BogoMIPS (lpj=2973696)
[    0.107971] pid_max: default: 4096 minimum: 301
[    0.108306] Security Framework initialized
[    0.108398] Mount-cache hash table entries: 512
[    0.167358] CPU: Testing write buffer coherency: ok
[    0.168914] Setting up static identity map for 0x805650f8 - 0x80565150
[    0.174591] devtmpfs: initialized
[    0.179748] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.252075] omap_hwmod: mcbsp2_sidetone using broken dt data from mcbsp
[    0.254119] omap_hwmod: mcbsp3_sidetone using broken dt data from mcbsp
[    0.281341] omap_hwmod: usb_host_hs: could not associate to clkdm l3_init_clkdm
[    0.283538] omap_hwmod: usb_tll_hs: could not associate to clkdm l3_init_clkdm
[    0.351043] pinctrl core: initialized pinctrl subsystem
[    0.354339] regulator-dummy: no parameters
[    0.356475] NET: Registered protocol family 16
[    0.357208] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.359466] cpuidle: using governor ladder
[    0.359497] cpuidle: using governor menu
[    0.365661] Reprogramming SDRC clock to 400000000 Hz
[    0.372924] omap_gpio 48310000.gpio: could not find pctldev for node /ocp/pinmux@480025a0/pinmux_gpio1_pins, deferring probe
[    0.372985] platform 48310000.gpio: Driver omap_gpio requests probe deferral
[    0.376647] OMAP GPIO hardware version 2.5
[    0.380523] omap_gpio 49054000.gpio: could not find pctldev for node /ocp/pinmux@48002030/pinmux_gpio4_pins, deferring probe
[    0.380554] platform 49054000.gpio: Driver omap_gpio requests probe deferral
[    0.381286] omap_gpio 49056000.gpio: could not find pctldev for node /ocp/pinmux@48002030/pinmux_gpio5_pins, deferring probe
[    0.381317] platform 49056000.gpio: Driver omap_gpio requests probe deferral
[    0.381988] omap_gpio 49058000.gpio: could not find pctldev for node /ocp/pinmux@48002030/pinmux_hsusb1_pins, deferring probe
[    0.382049] platform 49058000.gpio: Driver omap_gpio requests probe deferral
[    0.393676] platform 49022000.mcbsp: alias fck already exists
[    0.394683] platform 49024000.mcbsp: alias fck already exists
[    0.406311] omap-gpmc 6e000000.gpmc: GPMC revision 5.0
[    0.406677] gpmc_probe_nand_child: ti,elm-id property not found
[    0.406921] gpmc_read_settings_dt: page/burst-length set but not used!
[    0.406951] gpmc_read_settings_dt: read/write wait monitoring not enabled!
[    0.408020] irq: no irq domain found for /ocp/gpio@49056000 !
[    0.408050] ------------[ cut here ]------------
[    0.408081] WARNING: CPU: 0 PID: 1 at linux/drivers/of/platform.c:171 of_device_alloc+0x158/0x168()
[    0.408081] Modules linked in:
[    0.408111] CPU: 0 PID: 1 Comm: swapper Not tainted 3.14.0-rc2+ #856
[    0.408172] [<c0012fc4>] (unwind_backtrace) from [<c0010e30>] (show_stack+0x10/0x14)
[    0.408203] [<c0010e30>] (show_stack) from [<c003455c>] (warn_slowpath_common+0x64/0x84)
[    0.408203] [<c003455c>] (warn_slowpath_common) from [<c0034598>] (warn_slowpath_null+0x1c/0x24)
[    0.408233] [<c0034598>] (warn_slowpath_null) from [<c03e61d0>] (of_device_alloc+0x158/0x168)
[    0.408264] [<c03e61d0>] (of_device_alloc) from [<c03e6210>] (of_platform_device_create_pdata+0x30/0x9c)
[    0.408294] [<c03e6210>] (of_platform_device_create_pdata) from [<c001f0f4>] (gpmc_probe_generic_child+0xa4/0x2ac)
[    0.408325] [<c001f0f4>] (gpmc_probe_generic_child) from [<c001f6fc>] (gpmc_probe+0x400/0x7b0)
[    0.408325] [<c001f6fc>] (gpmc_probe) from [<c030312c>] (platform_drv_probe+0x18/0x48)
[    0.408386] [<c030312c>] (platform_drv_probe) from [<c0301d80>] (driver_probe_device+0x110/0x230)
[    0.408386] [<c0301d80>] (driver_probe_device) from [<c0300494>] (bus_for_each_drv+0x44/0x8c)
[    0.408416] [<c0300494>] (bus_for_each_drv) from [<c0301c38>] (device_attach+0x74/0x8c)
[    0.408447] [<c0301c38>] (device_attach) from [<c030132c>] (bus_probe_device+0x88/0xac)
[    0.408477] [<c030132c>] (bus_probe_device) from [<c02ff930>] (device_add+0x3e8/0x4f0)
[    0.408508] [<c02ff930>] (device_add) from [<c03e624c>] (of_platform_device_create_pdata+0x6c/0x9c)
[    0.408508] [<c03e624c>] (of_platform_device_create_pdata) from [<c03e634c>] (of_platform_bus_create+0xd0/0x29c)
[    0.408538] [<c03e634c>] (of_platform_bus_create) from [<c03e6398>] (of_platform_bus_create+0x11c/0x29c)
[    0.408569] [<c03e6398>] (of_platform_bus_create) from [<c03e6574>] (of_platform_populate+0x5c/0x9c)
[    0.408599] [<c03e6574>] (of_platform_populate) from [<c0771570>] (pdata_quirks_init+0x34/0x44)
[    0.408599] [<c0771570>] (pdata_quirks_init) from [<c0766f38>] (customize_machine+0x1c/0x40)
[    0.408630] [<c0766f38>] (customize_machine) from [<c000883c>] (do_one_initcall+0xe4/0x144)
[    0.408660] [<c000883c>] (do_one_initcall) from [<c0765af8>] (kernel_init_freeable+0xe8/0x1b0)
[    0.408691] [<c0765af8>] (kernel_init_freeable) from [<c05590f0>] (kernel_init+0x8/0xec)
[    0.408721] [<c05590f0>] (kernel_init) from [<c000e4c8>] (ret_from_fork+0x14/0x2c)
[    0.408905] ---[ end trace 2067aff632ad5d0c ]---
[    0.409851] irq: no irq domain found for /ocp/gpio@49054000 !
[    0.409851] ------------[ cut here ]------------
[    0.409881] WARNING: CPU: 0 PID: 1 at linux/drivers/of/platform.c:171 of_device_alloc+0x158/0x168()
[    0.409912] Modules linked in:
[    0.409942] CPU: 0 PID: 1 Comm: swapper Tainted: G        W    3.14.0-rc2+ #856
[    0.409973] [<c0012fc4>] (unwind_backtrace) from [<c0010e30>] (show_stack+0x10/0x14)
[    0.409973] [<c0010e30>] (show_stack) from [<c003455c>] (warn_slowpath_common+0x64/0x84)
[    0.410003] [<c003455c>] (warn_slowpath_common) from [<c0034598>] (warn_slowpath_null+0x1c/0x24)
[    0.410034] [<c0034598>] (warn_slowpath_null) from [<c03e61d0>] (of_device_alloc+0x158/0x168)
[    0.410064] [<c03e61d0>] (of_device_alloc) from [<c03e6210>] (of_platform_device_create_pdata+0x30/0x9c)
[    0.410095] [<c03e6210>] (of_platform_device_create_pdata) from [<c001f0f4>] (gpmc_probe_generic_child+0xa4/0x2ac)
[    0.410095] [<c001f0f4>] (gpmc_probe_generic_child) from [<c001f6fc>] (gpmc_probe+0x400/0x7b0)
[    0.410125] [<c001f6fc>] (gpmc_probe) from [<c030312c>] (platform_drv_probe+0x18/0x48)
[    0.410156] [<c030312c>] (platform_drv_probe) from [<c0301d80>] (driver_probe_device+0x110/0x230)
[    0.410186] [<c0301d80>] (driver_probe_device) from [<c0300494>] (bus_for_each_drv+0x44/0x8c)
[    0.410217] [<c0300494>] (bus_for_each_drv) from [<c0301c38>] (device_attach+0x74/0x8c)
[    0.410217] [<c0301c38>] (device_attach) from [<c030132c>] (bus_probe_device+0x88/0xac)
[    0.410247] [<c030132c>] (bus_probe_device) from [<c02ff930>] (device_add+0x3e8/0x4f0)
[    0.410278] [<c02ff930>] (device_add) from [<c03e624c>] (of_platform_device_create_pdata+0x6c/0x9c)
[    0.410308] [<c03e624c>] (of_platform_device_create_pdata) from [<c03e634c>] (of_platform_bus_create+0xd0/0x29c)
[    0.410308] [<c03e634c>] (of_platform_bus_create) from [<c03e6398>] (of_platform_bus_create+0x11c/0x29c)
[    0.410339] [<c03e6398>] (of_platform_bus_create) from [<c03e6574>] (of_platform_populate+0x5c/0x9c)
[    0.410369] [<c03e6574>] (of_platform_populate) from [<c0771570>] (pdata_quirks_init+0x34/0x44)
[    0.410400] [<c0771570>] (pdata_quirks_init) from [<c0766f38>] (customize_machine+0x1c/0x40)
[    0.410400] [<c0766f38>] (customize_machine) from [<c000883c>] (do_one_initcall+0xe4/0x144)
[    0.410430] [<c000883c>] (do_one_initcall) from [<c0765af8>] (kernel_init_freeable+0xe8/0x1b0)
[    0.410461] [<c0765af8>] (kernel_init_freeable) from [<c05590f0>] (kernel_init+0x8/0xec)
[    0.410491] [<c05590f0>] (kernel_init) from [<c000e4c8>] (ret_from_fork+0x14/0x2c)
[    0.410491] ---[ end trace 2067aff632ad5d0d ]---
[    0.413391] omap3_dbb056_legacy_init: Late Reparent clkout2 to 96M_FCK
[    0.413421] omap3_dbb056_legacy_init: Set clkout2 to 24MHz for internal usb hub
[    0.416900] No ATAGs?
[    0.416931] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.420379] OMAP DMA hardware revision 5.0
[    0.442382] bio: create slab <bio-0> at 0
[    0.486419] omap-dma-engine 48056000.dma-controller: OMAP DMA engine driver
[    0.488128] VCC3: 3300 mV
[    0.490509] SCSI subsystem initialized
[    0.491394] usbcore: registered new interface driver usbfs
[    0.491577] usbcore: registered new interface driver hub
[    0.492004] usbcore: registered new device driver usb
[    0.494323] musb-omap2430 480ab000.usb_otg_hs: could not find pctldev for node /ocp/pinmux@48002030/pinmux_hsusb_otg_pins, deferring probe
[    0.494354] platform 480ab000.usb_otg_hs: Driver musb-omap2430 requests probe deferral
[    0.495086] omap_i2c 48070000.i2c: could not find pctldev for node /ocp/pinmux@48002030/pinmux_i2c1_pins, deferring probe
[    0.495147] platform 48070000.i2c: Driver omap_i2c requests probe deferral
[    0.495239] omap_i2c 48072000.i2c: could not find pctldev for node /ocp/pinmux@48002030/pinmux_i2c2_pins, deferring probe
[    0.495269] platform 48072000.i2c: Driver omap_i2c requests probe deferral
[    0.495361] omap_i2c 48060000.i2c: could not find pctldev for node /ocp/pinmux@48002030/pinmux_i2c3_pins, deferring probe
[    0.495391] platform 48060000.i2c: Driver omap_i2c requests probe deferral
[    0.495788] pps_core: LinuxPPS API ver. 1 registered
[    0.495788] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.495849] PTP clock support registered
[    0.497070] Advanced Linux Sound Architecture Driver Initialized.
[    0.501129] cfg80211: Calling CRDA to update world regulatory domain
[    0.501861] Switched to clocksource 32k_counter
[    0.536651] NET: Registered protocol family 2
[    0.538818] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[    0.539031] TCP bind hash table entries: 1024 (order: 3, 36864 bytes)
[    0.539581] TCP: Hash tables configured (established 1024 bind 1024)
[    0.539825] TCP: reno registered
[    0.539855] UDP hash table entries: 128 (order: 1, 10240 bytes)
[    0.540008] UDP-Lite hash table entries: 128 (order: 1, 10240 bytes)
[    0.541473] NET: Registered protocol family 1
[    0.543060] RPC: Registered named UNIX socket transport module.
[    0.543090] RPC: Registered udp transport module.
[    0.543090] RPC: Registered tcp transport module.
[    0.543121] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.543640] usbhs_omap 48064000.usbhshost: could not find pctldev for node /ocp/pinmux@480025a0/pinmux_hsusb1_2_pins, deferring probe
[    0.543701] platform 48064000.usbhshost: Driver usbhs_omap requests probe deferral
[    0.544738] hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
[    0.551605] futex hash table entries: 16 (order: -3, 640 bytes)
[    0.555389] VFS: Disk quotas dquot_6.5.2
[    0.555480] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[    0.557891] NFS: Registering the id_resolver key type
[    0.558349] Key type id_resolver registered
[    0.558380] Key type id_legacy registered
[    0.558532] fuse init (API version 7.22)
[    0.559967] msgmni has been set to 224
[    0.565155] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
[    0.565277] io scheduler noop registered
[    0.565307] io scheduler deadline registered
[    0.565368] io scheduler cfq registered (default)
[    0.573059] pinctrl-single 48002030.pinmux: 284 pins at pa fa002030 size 568
[    0.574462] pinctrl-single 48002a00.pinmux: 46 pins at pa fa002a00 size 92
[    0.576599] pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
[    0.579772] OMAP DSS rev 2.0
[    0.581298] platform panel-dpi.0: Driver panel-dpi requests probe deferral
[    0.584259] omapfb omapfb: no displays
[    0.586761] omapfb omapfb: failed to setup omapfb
[    0.586791] platform omapfb: Driver omapfb requests probe deferral
[    0.587677] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    0.596679] 4806a000.serial: ttyO0 at MMIO 0x4806a000 (irq = 88, base_baud = 3000000) is a OMAP UART0
[    2.001129] console [ttyO0] enabled
[    2.007598] 4806c000.serial: ttyO1 at MMIO 0x4806c000 (irq = 89, base_baud = 3000000) is a OMAP UART1
[    2.019805] 49020000.serial: ttyO2 at MMIO 0x49020000 (irq = 90, base_baud = 3000000) is a OMAP UART2
[    2.054382] brd: module loaded
[    2.070831] loop: module loaded
[    2.077209] mtdoops: mtd device (mtddev=name/number) must be supplied
[    2.085540] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xbc
[    2.092285] nand: Micron NAND 512MiB 1,8V 16-bit
[    2.097106] nand: 512MiB, SLC, page size: 2048, OOB size: 64
[    2.103088] nand: using OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
[    2.111755] 5 ofpart partitions found on MTD device omap2-nand.0
[    2.118133] Creating 5 MTD partitions on "omap2-nand.0":
[    2.123779] 0x000000000000-0x000000080000 : "MLO"
[    2.135009] 0x000000080000-0x000000260000 : "u-boot"
[    2.145141] 0x000000260000-0x000000280000 : "u-boot-environment"
[    2.154785] 0x000000280000-0x000000780000 : "kernel"
[    2.167388] 0x000000780000-0x000010000000 : "filesystem"
[    2.391906] irq: no irq domain found for /ocp/gpio@48310000 !
[    2.404235] CAN device driver interface
[    2.408294] sja1000 CAN netdevice driver
[    2.414245] smsc911x: Driver version 2008-10-21
[    2.418975] smsc911x: Could not allocate irq resource
[    2.424926] smsc911x: Driver version 2008-10-21
[    2.429656] smsc911x: Could not allocate irq resource
[    2.435302] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    2.442230] ehci-omap: OMAP-EHCI Host Controller driver
[    2.448120] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    2.454803] ohci-omap3: OHCI OMAP3 driver
[    2.459625] usbcore: registered new interface driver usb-storage
[    2.468322] mousedev: PS/2 mouse device common for all mice
[    2.475463] ads7846: probe of spi2.0 failed with error -22
[    2.482330] i2c /dev entries driver
[    2.488983] omap_wdt: OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
[    2.498291] platform 4809c000.mmc: Driver omap_hsmmc requests probe deferral
[    2.506469] platform 480b4000.mmc: Driver omap_hsmmc requests probe deferral
[    2.514709] platform leds.3: Driver leds-gpio requests probe deferral
[    2.522674] usbcore: registered new interface driver usbhid
[    2.528503] usbhid: USB HID core driver
[    2.544219] omap-twl4030 sound.4: ASoC: CODEC twl4030-codec not registered
[    2.551727] omap-twl4030 sound.4: devm_snd_soc_register_card() failed: -517
[    2.560516] platform sound.4: Driver omap-twl4030 requests probe deferral
[    2.568359] TCP: cubic registered
[    2.571838] Initializing XFRM netlink socket
[    2.576721] NET: Registered protocol family 17
[    2.581481] NET: Registered protocol family 15
[    2.586273] can: controller area network core (rev 20120528 abi 9)
[    2.592987] NET: Registered protocol family 29
[    2.597656] can: raw protocol (rev 20120528)
[    2.602355] can: broadcast manager protocol (rev 20120528 t)
[    2.608306] can: netlink gateway (rev 20130117) max_hops=1
[    2.614654] Key type dns_resolver registered
[    2.622222] ThumbEE CPU extension supported.
[    2.626770] Registering SWP/SWPB emulation handler
[    2.633422] registered taskstats version 1
[    2.654754] musb-omap2430 480ab000.usb_otg_hs: unable to find phy
[    2.661224] HS USB OTG: no transceiver configured
[    2.666381] musb-hdrc musb-hdrc.0.auto: musb_init_controller failed with status -517
[    2.674652] platform musb-hdrc.0.auto: Driver musb-hdrc requests probe deferral
[    2.698242] twl 0-0048: PIH (irq 23) chaining IRQs 338..346
[    2.704803] twl 0-0048: power (irq 343) chaining IRQs 346..353
[    2.715057] twl_rtc rtc.8: Power up reset detected.
[    2.720367] twl_rtc rtc.8: Enabling TWL-RTC
[    2.729705] twl_rtc rtc.8: rtc core: registered rtc.8 as rtc0
[    2.741180] VAUX1: at 3000 mV
[    2.747283] VAUX2_4030: 2800 mV
[    2.752990] VAUX3: at 2800 mV
[    2.758209] VAUX4: at 2800 mV
[    2.763671] VDD1: 600 <--> 1450 mV at 1200 mV
[    2.770507] VDAC: 1800 mV
[    2.775787] VIO: at 1800 mV
[    2.780944] VINTANA1: 1500 mV
[    2.786468] VINTANA2: at 2750 mV
[    2.792266] VINTDIG: 1500 mV
[    2.797485] VMMC1: 1850 <--> 3150 mV at 3000 mV
[    2.804473] VMMC2: 1850 <--> 3150 mV at 2600 mV
[    2.811157] VUSB1V5: 1500 mV
[    2.816070] VUSB1V8: 1800 mV
[    2.820800] VUSB3V1: 3100 mV
[    2.826171] VPLL1: at 1800 mV
[    2.831604] VPLL2: 1800 mV
[    2.836639] VSIM: 1800 <--> 3000 mV at 1800 mV
[    2.844085] twl4030_gpio twl4030-gpio: gpio (irq 338) chaining IRQs 354..371
[    2.857788] twl4030_usb twl4030-usb.29: Initialized TWL4030 USB module
[    2.869354] omap_i2c 48070000.i2c: bus 0 rev4.4 at 2600 kHz
[    2.877777] omap_i2c 48072000.i2c: bus 1 rev4.4 at 2600 kHz
[    2.890533] omap_i2c 48060000.i2c: bus 2 rev4.4 at 2600 kHz
[    2.899658] omapdss_dpi.0 supply vdds_dsi not found, using dummy regulator
[    2.918701] Console: switching to colour frame buffer device 80x30
[    2.933471] omapfb omapfb: using display 'lcd' mode 640x480
[    2.942535] 4809c000.mmc supply vmmc_aux not found, using dummy regulator
[    2.995971] 480b4000.mmc supply vmmc_aux not found, using dummy regulator
[    3.004150] VMMC1: Restricting voltage, 3100000-1950000uV
[    3.009826] omap_hsmmc 480b4000.mmc: could not set regulator OCR (-22)
[    3.143157] omap-twl4030 sound.4: twl4030-hifi <-> 49022000.mcbsp mapping ok
[    3.179931] unable to find transceiver
[    3.183959] musb-hdrc musb-hdrc.0.auto: MUSB HDRC host driver
[    3.190765] musb-hdrc musb-hdrc.0.auto: new USB bus registered, assigned bus number 1
[    3.200500] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[    3.207702] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    3.215301] usb usb1: Product: MUSB HDRC host driver
[    3.220520] usb usb1: Manufacturer: Linux 3.14.0-rc2+ musb-hcd
[    3.226654] usb usb1: SerialNumber: musb-hdrc.0.auto
[    3.236572] hub 1-0:1.0: USB hub found
[    3.240997] hub 1-0:1.0: 1 port detected
[    3.277343] twl_rtc rtc.8: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
[   15.472961] ALSA device list:
[   15.476104]   #0: lilly-a83x
[   15.480895] omap_uart 4806a000.serial: no wakeirq for uart0
[   15.487518] Root-NFS: no NFS server address
[   15.491912] VFS: Unable to mount root fs via NFS, trying floppy.
[   15.499755] VFS: Cannot open root device "nfs" or unknown-block(2,0): error -6
[   15.507476] Please append a correct "root=" boot option; here are the available partitions:
[   15.516479] 1f00             512 mtdblock0  (driver?)
[   15.521789] 1f01            1920 mtdblock1  (driver?)
[   15.527221] 1f02             128 mtdblock2  (driver?)
[   15.532653] 1f03            5120 mtdblock3  (driver?)
[   15.537963] 1f04          254464 mtdblock4  (driver?)
[   15.543518] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0)

-- 
1.7.10.4


^ permalink raw reply

* Re: [PATCH] hwmon: twl4030-madc-hwmon: Add device tree support.
From: Belisko Marek @ 2014-02-14 14:08 UTC (permalink / raw)
  To: Mark Rutland
  Cc: robh+dt@kernel.org, Pawel Moll, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rob@landley.net, jdelvare@suse.de,
	linux@roeck-us.net, grant.likely@linaro.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, lm-sensors@lm-sensors.org,
	hns@goldelico.com
In-Reply-To: <20140214133101.GA17796@e106331-lin.cambridge.arm.com>

On Fri, Feb 14, 2014 at 2:31 PM, Mark Rutland <mark.rutland@arm.com> wrote:
> On Fri, Feb 14, 2014 at 01:20:58PM +0000, Marek Belisko wrote:
>> Signed-off-by: Marek Belisko <marek@goldelico.com>
>> ---
>>  Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt |  9 +++++++++
>>  drivers/hwmon/twl4030-madc-hwmon.c                             | 10 ++++++++++
>>  2 files changed, 19 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt
>>
>> diff --git a/Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt b/Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt
>> new file mode 100644
>> index 0000000..e8016d1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt
>> @@ -0,0 +1,9 @@
>> +TWL4030 MADC hwmon.
>> +
>> +Required properties:
>> +- compatible: "ti,twl4030-madc-hwmon"
>> +
>> +Example:
>> +madc-hwmon {
>> +     compatible = "ti,twl4030-madc-hwmon";
>> +};
>
> Huh?
>
> What is this a binding for? From a look at the driver in mainline this
> just calls into functions from the twl4030 madc driver (which doesn't
> seem to have a binding).
I post bindings for twl4030-madc [1]. Without probing this driver
other things will not work (twl4030-madc-battery e.g.).
Is there better way to handle this situation?
>
> This doesn't look like a description of hardware, but rather a hack to
> get a Linux driver to probe. As far as I can see, no useful information
> is given by this binding.
>
> Thanks,
> Mark.

BR,

marek

-- 
as simple and primitive as possible
-------------------------------------------------
Marek Belisko - OPEN-NANDRA
Freelance Developer

Ruska Nova Ves 219 | Presov, 08005 Slovak Republic
Tel: +421 915 052 184
skype: marekwhite
twitter: #opennandra
web: http://open-nandra.com

^ permalink raw reply

* Re: How to select between different display timings? (was: [PATCH 7/8] ARM: dts: tx28: restructure and update DTS file)
From: Lothar Waßmann @ 2014-02-14 14:02 UTC (permalink / raw)
  To: Dirk Behme
  Cc: Shawn Guo, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Rob Herring
In-Reply-To: <52FE1F2D.4010102-V5te9oGctAVWk0Htik3J/w@public.gmane.org>

Hi,

Dirk Behme wrote:
> Hi Lothar and Shawn,
> 
> On 08.08.2013 14:51, Lothar Waßmann wrote:
> > - add Copyright header
> > - use label references for better readability
> > - sort the entries alphabetically
> > - add some aliases used by U-Boot to edit the DT data
> >
> > Signed-off-by: Lothar Waßmann <LW-bxm8fMRDkQLDiMYJYoSAnRvVK+yQ3ZXh@public.gmane.org>
> > ---
> >   arch/arm/boot/dts/imx28-tx28.dts |  693 +++++++++++++++++++++++++++++++++-----
> >   1 files changed, 611 insertions(+), 82 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/imx28-tx28.dts b/arch/arm/boot/dts/imx28-tx28.dts
> > index 37be532..866af60 100644
> > --- a/arch/arm/boot/dts/imx28-tx28.dts
> > +++ b/arch/arm/boot/dts/imx28-tx28.dts
> ...
> > +&lcdif {
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_sync_pins_a &lcdif_ctrl_pins_a>;
> > +       lcd-supply = <&reg_lcd>;
> > +       display = <&display>;
> > +       status = "okay";
> > +
> > +       display: display@0 {
> > +               bits-per-pixel = <32>;
> > +               bus-width = <24>;
> > +
> > +               display-timings {
> > +                       native-mode = <&timing5>;
                            ^^^^^^^^^^^^^^^^^^^^^^^^^
> > +                       timing0: timing0 {
[...]
> > +                       };
> > +               };
> > +       };
> > +};
> 
> Being no graphics expert, looking at above device tree change, I'd like 
> to understand how this can be used to switch between different display 
> timings?
> 
> In the kernel, I've found the code which selects the default/native-mode 
> (of_display_timing.c). But, as here, if there is a native/default mode, 
> there are alternative modes. I haven't understood how and who to select 
> these other modes? In this case, how could the alternative modes 
> timing0/1/2/3/4 be selected in the kernel?
> 
> Do you have any pointers regarding this?
> 
You need to set the property 'native-mode' to the phandle of the
display-timings entry like marked above.


Lothar Waßmann
-- 
___________________________________________________________

Ka-Ro electronics GmbH | Pascalstraße 22 | D - 52076 Aachen
Phone: +49 2408 1402-0 | Fax: +49 2408 1402-10
Geschäftsführer: Matthias Kaussen
Handelsregistereintrag: Amtsgericht Aachen, HRB 4996

www.karo-electronics.de | info-AvR2QvxeiV7DiMYJYoSAnRvVK+yQ3ZXh@public.gmane.org
___________________________________________________________
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^ permalink raw reply

* Re: [PATCH v3] phy: Add new Exynos5 USB 3.0 PHY driver
From: Vivek Gautam @ 2014-02-14 13:53 UTC (permalink / raw)
  To: Tomasz Figa
  Cc: Vivek Gautam, Linux USB Mailing List,
	linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-doc, Greg KH, Kukjin Kim,
	Felipe Balbi, kishon, Kamil Debski, Sylwester Nawrocki,
	Julius Werner, Jingoo Han
In-Reply-To: <52F39710.80101@samsung.com>

Hi Tomasz,


On Thu, Feb 6, 2014 at 7:37 PM, Tomasz Figa <t.figa@samsung.com> wrote:
> Hi Vivek,
>
> This patch is just adding the PHY driver. I would also like to look at some
> users of it, to see how this works when put together.

The DWC3's changes had been posted by Kishon sometime back, which will enable
DWC3 to use generic PHY dirver. [1]
I had skipped posting corresponding arch patch to use DWC3 on Exynos5
(although i had
posted that in earlier versions of the patch-series).
I will post the corresponding arch patches in the next version of the
patch-series.

>
> For now, please see my comments inline.
>
>
> On 20.01.2014 14:42, Vivek Gautam wrote:
>>
>> Add a new driver for the USB 3.0 PHY on Exynos5 series of SoCs.
>> The new driver uses the generic PHY framework and will interact
>> with DWC3 controller present on Exynos5 series of SoCs.
>> Thereby, removing old phy-samsung-usb3 driver and related code
>> used untill now which was based on usb/phy framework.
>>
>> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
>> ---
>>
>> Changes from v2:
>> 1) Added support for multiple PHYs (UTMI+ and PIPE3) and
>>     related changes in the driver structuring.
>
>
> I'm a bit skeptical about this separation. Can the PHY operate with just the
> UTMI+ or PIPE3 part enabled alone without the other? Can any PHY consumer
> operate this way?

Yes :-)
As also pointed by Kishon the PHY consumer (which is DWC3 in case of
Exynos5 SoC series)
should theoretically be able use either UTMI+ phy for High speed
operations or both (UTMI+ and PIPE3)
for Super Speed operations.

>
> Introducing separation of something that can't exist alone doesn't add any
> value, but instead makes things more difficult to work with. Of course, it's
> fine if the answer to my questions above if yes, but better safe than sorry.



>
>
>> 2) Added a xlate function to get the required phy out of
>>     number of PHYs in mutiple PHY scenerio.
>> 3) Changed the names of few structures and variables to
>>     have a clearer meaning.
>> 4) Added 'usb3phy_config' structure to take care of mutiple
>>     phys for a SoC having 'exynos5_usb3phy_drv_data' driver data.
>> 5) Not deleting support for old driver 'phy-samsung-usb3' until
>>     required support for generic phy is added to DWC3.
>
>
> [snip]
>
>
>> +
>> +- aliases: For SoCs like Exynos5420 having multiple USB PHY controllers,
>> +          'usb3_phy' nodes should have numbered alias in the aliases
>> node,
>> +          in the form of usb3phyN, N = 0, 1... (depending on number of
>> +          controllers).
>> +Example:
>> +       aliases {
>> +               usb3phy0 = &usb3_phy0;
>> +               usb3phy1 = &usb3_phy1;
>> +       };
>
>
> What is the reason to have these aliases?
>
>
>> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
>> index 330ef2d..32f9f38 100644
>> --- a/drivers/phy/Kconfig
>> +++ b/drivers/phy/Kconfig
>> @@ -51,4 +51,12 @@ config PHY_EXYNOS_DP_VIDEO
>>         help
>>           Support for Display Port PHY found on Samsung EXYNOS SoCs.
>>
>> +config PHY_EXYNOS5_USB3
>> +       tristate "Exynos5 SoC series USB 3.0 PHY driver"
>> +       depends on ARCH_EXYNOS5
>> +       select GENERIC_PHY
>> +       select MFD_SYSCON
>> +       help
>> +         Enable USB 3.0 PHY support for Exynos 5 SoC series
>> +
>>   endmenu
>> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
>> index d0caae9..9c06a61 100644
>> --- a/drivers/phy/Makefile
>> +++ b/drivers/phy/Makefile
>> @@ -7,3 +7,4 @@ obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)       +=
>> phy-exynos-dp-video.o
>>   obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)   += phy-exynos-mipi-video.o
>>   obj-$(CONFIG_OMAP_USB2)                       += phy-omap-usb2.o
>>   obj-$(CONFIG_TWL4030_USB)             += phy-twl4030-usb.o
>> +obj-$(CONFIG_PHY_EXYNOS5_USB3)         += phy-exynos5-usb3.o
>> diff --git a/drivers/phy/phy-exynos5-usb3.c
>> b/drivers/phy/phy-exynos5-usb3.c
>> new file mode 100644
>> index 0000000..24efed0
>> --- /dev/null
>> +++ b/drivers/phy/phy-exynos5-usb3.c
>> @@ -0,0 +1,621 @@
>> +/*
>> + * Samsung EXYNOS5 SoC series USB 3.0 PHY driver
>> + *
>> + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
>> + * Author: Vivek Gautam <gautam.vivek@samsung.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/io.h>
>> +#include <linux/kernel.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/phy/phy.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/mutex.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/regmap.h>
>> +
>> +/* Exynos USB PHY registers */
>> +#define EXYNOS5_FSEL_9MHZ6             0x0
>> +#define EXYNOS5_FSEL_10MHZ             0x1
>> +#define EXYNOS5_FSEL_12MHZ             0x2
>> +#define EXYNOS5_FSEL_19MHZ2            0x3
>> +#define EXYNOS5_FSEL_20MHZ             0x4
>> +#define EXYNOS5_FSEL_24MHZ             0x5
>> +#define EXYNOS5_FSEL_50MHZ             0x7
>> +
>> +/* EXYNOS5: USB 3.0 DRD PHY registers */
>> +#define EXYNOS5_DRD_LINKSYSTEM                 (0x04)
>
>
> nit: No need for parentheses around simple literal. (+ more occurrences
> below)
Ok, will remove them.

>
>
>> +
>> +#define LINKSYSTEM_FLADJ_MASK                  (0x3f << 1)
>> +#define LINKSYSTEM_FLADJ(_x)                   ((_x) << 1)
>> +#define LINKSYSTEM_XHCI_VERSION_CONTROL                (0x1 << 27)
>
>
> nit: BIT() macro could be used for single bits. (+ more occurrences below)

Pointed out by Kishon too. :-)
Will use them.

>
>
>> +
>> +#define EXYNOS5_DRD_PHYUTMI                    (0x08)

[snip]

>> +
>> +static int exynos5_usb3phy_init(struct phy *phy)
>> +{
>> +       int ret;
>> +       u32 phyparam0;
>> +       u32 phyparam1;
>> +       u32 linksystem;
>> +       u32 phybatchg;
>> +       u32 phytest;
>> +       u32 phyclkrst;
>> +       struct phy_usb_instance *inst = phy_get_drvdata(phy);
>> +       struct exynos5_usb3phy_driver *drv = to_usb3phy_driver(inst);
>> +
>> +       ret = clk_prepare_enable(drv->clk);
>> +       if (ret)
>> +               return ret;
>> +
>> +       drv->extrefclk = exynos5_rate_to_clk(drv->rate);
>> +       if (drv->extrefclk == -EINVAL) {
>> +               dev_err(drv->dev, "Clock rate (%ld) not supported\n",
>> +                                               drv->rate);
>> +               return -EINVAL;
>> +       }
>> +
>> +       /* Reset USB 3.0 PHY */
>> +       writel(0x0, drv->reg_phy + EXYNOS5_DRD_PHYREG0);
>> +
>> +       phyparam0 = readl(drv->reg_phy + EXYNOS5_DRD_PHYPARAM0);
>> +       /* Select PHY CLK source */
>> +       phyparam0 &= ~PHYPARAM0_REF_USE_PAD;
>> +       /* Set Loss-of-Signal Detector sensitivity */
>> +       phyparam0 &= ~PHYPARAM0_REF_LOSLEVEL_MASK;
>> +       phyparam0 |= PHYPARAM0_REF_LOSLEVEL;
>> +       writel(phyparam0, drv->reg_phy + EXYNOS5_DRD_PHYPARAM0);
>> +
>> +       writel(0x0, drv->reg_phy + EXYNOS5_DRD_PHYRESUME);
>> +
>> +       /*
>> +        * Setting the Frame length Adj value[6:1] to default 0x20
>> +        * See xHCI 1.0 spec, 5.2.4
>> +        */
>> +       linksystem = LINKSYSTEM_XHCI_VERSION_CONTROL |
>> +                    LINKSYSTEM_FLADJ(0x20);
>> +       writel(linksystem, drv->reg_phy + EXYNOS5_DRD_LINKSYSTEM);
>> +
>> +       phyparam1 = readl(drv->reg_phy + EXYNOS5_DRD_PHYPARAM1);
>> +       /* Set Tx De-Emphasis level */
>> +       phyparam1 &= ~PHYPARAM1_PCS_TXDEEMPH_MASK;
>> +       phyparam1 |= PHYPARAM1_PCS_TXDEEMPH;
>> +       writel(phyparam1, drv->reg_phy + EXYNOS5_DRD_PHYPARAM1);
>> +
>> +       phybatchg = readl(drv->reg_phy + EXYNOS5_DRD_PHYBATCHG);
>> +       phybatchg |= PHYBATCHG_UTMI_CLKSEL;
>> +       writel(phybatchg, drv->reg_phy + EXYNOS5_DRD_PHYBATCHG);
>> +
>> +       /* PHYTEST POWERDOWN Control */
>> +       phytest = readl(drv->reg_phy + EXYNOS5_DRD_PHYTEST);
>> +       phytest &= ~(PHYTEST_POWERDOWN_SSP |
>> +                    PHYTEST_POWERDOWN_HSP);
>> +       writel(phytest, drv->reg_phy + EXYNOS5_DRD_PHYTEST);
>> +
>> +       /* UTMI Power Control */
>> +       writel(PHYUTMI_OTGDISABLE, drv->reg_phy + EXYNOS5_DRD_PHYUTMI);
>> +
>> +       phyclkrst = exynos5_usb3phy_set_refclk(drv);
>> +
>> +       phyclkrst |= PHYCLKRST_PORTRESET |
>> +                    /* Digital power supply in normal operating mode */
>> +                    PHYCLKRST_RETENABLEN |
>> +                    /* Enable ref clock for SS function */
>> +                    PHYCLKRST_REF_SSP_EN |
>> +                    /* Enable spread spectrum */
>> +                    PHYCLKRST_SSC_EN |
>> +                    /* Power down HS Bias and PLL blocks in suspend mode
>> */
>> +                    PHYCLKRST_COMMONONN;
>> +
>> +       writel(phyclkrst, drv->reg_phy + EXYNOS5_DRD_PHYCLKRST);
>> +
>> +       udelay(10);
>> +
>> +       phyclkrst &= ~PHYCLKRST_PORTRESET;
>> +       writel(phyclkrst, drv->reg_phy + EXYNOS5_DRD_PHYCLKRST);
>> +
>> +       clk_disable_unprepare(drv->clk);
>
>
> I'm still not convinced that this is the right place for this setup. This
> way you force consumer driver to always call phy_power_on() and phy_init()
> together, otherwise the PHY won't work.

Isn't how the things are supposed to work ?
call phy_init() to initialize the PHY and then call phy_power_on().
power_on() will simply
take care of disabling the power isolation for PHY (or simply provide
enable power to PHY)
and therefore doesn't need to worry about the initialization part.
Atleast that's the approach in DWC3 patch from Kishon [1]

>
> I believe the right thing to do here is to do all the initialization in
> .power_on() and let the driver simply call phy_power_on() when it needs the
> PHY and phy_power_off() otherwise.

If this is what we should be doing then what will be the purpose of
two separate APIs :
phy_power_on() and phy_init().
Am i missing while understanding the things.

>
> Analogically, .exit() should be merged into .power_off().
>
>
>> +
>> +       return 0;
>> +}
>
>
> [snip]
>
>
>> +       /*
>> +        * Exynos5420 SoC has multiple channels for USB 3.0 PHY, with
>> +        * each having separate power control registers.
>> +        * 'drv->channel' facilitates to set such registers.
>> +        */
>> +       if (drv->drv_data->has_multi_controller) {
>> +               drv->channel = of_alias_get_id(node, "usb3phy");
>> +               if (drv->channel < 0) {
>> +                       dev_err(dev, "Invalid usb3drd phy node\n");
>> +                       return -EINVAL;
>> +               }
>> +       }
>
>
> Aha, so this is why you need aliases. Maybe a "samsung,pmu-offset" property,
> simply specifying the offset to PMU regs would be better here?
Ok.

>
>
>> +
>> +       drv->clk = devm_clk_get(dev, "phy");
>> +       if (IS_ERR(drv->clk)) {
>> +               dev_err(dev, "Failed to get clock of phy controller\n");
>> +               return PTR_ERR(drv->clk);
>> +       }
>> +
>> +       /*
>> +        * Exysno5420 SoC has an additional special clock, used for
>> +        * for USB 3.0 PHY operation, this clock goes to the PHY block
>> +        * as a reference clock to clock generation block of the
>> controller,
>> +        * named as 'USB30_SCLK_100M'.
>> +        */
>> +       if (drv_data->has_usb30_sclk) {
>> +               drv->usb30_sclk = devm_clk_get(dev, "usb30_sclk_100m");
>> +               if (IS_ERR(drv->usb30_sclk)) {
>> +                       dev_err(dev, "Failed to get phy reference
>> clock\n");
>> +                       return PTR_ERR(drv->usb30_sclk);
>> +               }
>> +       }
>> +
>> +       clk = clk_get(dev, "usb3phy_refclk");
>> +       if (IS_ERR(clk)) {
>> +               dev_err(dev, "Failed to get reference clock of usb3drd
>> phy\n");
>> +               return PTR_ERR(clk);
>> +       }
>> +       drv->rate = clk_get_rate(clk);
>> +       clk_put(clk);
>
>
> To comply with clock API semantics, you should keep the reference on this
> clock until the driver is removed. Moreover, I believe you should call
> clk_prepare_enable() on it as well, to make sure that the clock is enabled,
> even if current implementation of clock drivers for Exynos 5 can't disable
> this clock.

Ok will do this.



-- 
Best Regards
Vivek Gautam
Samsung R&D Institute, Bangalore
India

^ permalink raw reply

* How to select between different display timings? (was: [PATCH 7/8] ARM: dts: tx28: restructure and update DTS file)
From: Dirk Behme @ 2014-02-14 13:50 UTC (permalink / raw)
  To: Lothar Waßmann, Shawn Guo
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Rob Herring
In-Reply-To: <1375966287-6784-8-git-send-email-LW-bxm8fMRDkQLDiMYJYoSAnRvVK+yQ3ZXh@public.gmane.org>

Hi Lothar and Shawn,

On 08.08.2013 14:51, Lothar Waßmann wrote:
> - add Copyright header
> - use label references for better readability
> - sort the entries alphabetically
> - add some aliases used by U-Boot to edit the DT data
>
> Signed-off-by: Lothar Waßmann <LW-bxm8fMRDkQLDiMYJYoSAnRvVK+yQ3ZXh@public.gmane.org>
> ---
>   arch/arm/boot/dts/imx28-tx28.dts |  693 +++++++++++++++++++++++++++++++++-----
>   1 files changed, 611 insertions(+), 82 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx28-tx28.dts b/arch/arm/boot/dts/imx28-tx28.dts
> index 37be532..866af60 100644
> --- a/arch/arm/boot/dts/imx28-tx28.dts
> +++ b/arch/arm/boot/dts/imx28-tx28.dts
...
> +&lcdif {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&lcdif_24bit_pins_a &lcdif_sync_pins_a &lcdif_ctrl_pins_a>;
> +       lcd-supply = <&reg_lcd>;
> +       display = <&display>;
> +       status = "okay";
> +
> +       display: display@0 {
> +               bits-per-pixel = <32>;
> +               bus-width = <24>;
> +
> +               display-timings {
> +                       native-mode = <&timing5>;
> +                       timing0: timing0 {
> +                               panel-name = "VGA";
> +                               clock-frequency = <25175000>;
> +                               hactive = <640>;
> +                               vactive = <480>;
> +                               hback-porch = <48>;
> +                               hsync-len = <96>;
> +                               hfront-porch = <16>;
> +                               vback-porch = <33>;
> +                               vsync-len = <2>;
> +                               vfront-porch = <10>;
> +                               hsync-active = <0>;
> +                               vsync-active = <0>;
> +                               de-active = <1>;
> +                               pixelclk-active = <1>;
> +                       };
> +
> +                       timing1: timing1 {
> +                               panel-name = "ETV570";
> +                               clock-frequency = <25175000>;
> +                               hactive = <640>;
> +                               vactive = <480>;
> +                               hback-porch = <114>;
> +                               hsync-len = <30>;
> +                               hfront-porch = <16>;
> +                               vback-porch = <32>;
> +                               vsync-len = <3>;
> +                               vfront-porch = <10>;
> +                               hsync-active = <0>;
> +                               vsync-active = <0>;
> +                               de-active = <1>;
> +                               pixelclk-active = <1>;
> +                       };
> +
> +                       timing2: timing2 {
> +                               panel-name = "ET0350";
> +                               clock-frequency = <6500000>;
> +                               hactive = <320>;
> +                               vactive = <240>;
> +                               hback-porch = <34>;
> +                               hsync-len = <34>;
> +                               hfront-porch = <20>;
> +                               vback-porch = <15>;
> +                               vsync-len = <3>;
> +                               vfront-porch = <4>;
> +                               hsync-active = <0>;
> +                               vsync-active = <0>;
> +                               de-active = <1>;
> +                               pixelclk-active = <1>;
> +                       };
> +
> +                       timing3: timing3 {
> +                               panel-name = "ET0430";
> +                               clock-frequency = <9000000>;
> +                               hactive = <480>;
> +                               vactive = <272>;
> +                               hback-porch = <2>;
> +                               hsync-len = <41>;
> +                               hfront-porch = <2>;
> +                               vback-porch = <2>;
> +                               vsync-len = <10>;
> +                               vfront-porch = <2>;
> +                               hsync-active = <0>;
> +                               vsync-active = <0>;
> +                               de-active = <1>;
> +                               pixelclk-active = <1>;
> +                       };
> +
> +                       timing4: timing4 {
> +                               panel-name = "ET0500", "ET0700";
> +                               clock-frequency = <33260000>;
> +                               hactive = <800>;
> +                               vactive = <480>;
> +                               hback-porch = <88>;
> +                               hsync-len = <128>;
> +                               hfront-porch = <40>;
> +                               vback-porch = <33>;
> +                               vsync-len = <2>;
> +                               vfront-porch = <10>;
> +                               hsync-active = <0>;
> +                               vsync-active = <0>;
> +                               de-active = <1>;
> +                               pixelclk-active = <1>;
> +                       };
> +
> +                       timing5: timing5 {
> +                               panel-name = "ETQ570";
> +                               clock-frequency = <6400000>;
> +                               hactive = <320>;
> +                               vactive = <240>;
> +                               hback-porch = <38>;
> +                               hsync-len = <30>;
> +                               hfront-porch = <30>;
> +                               vback-porch = <16>;
> +                               vsync-len = <3>;
> +                               vfront-porch = <4>;
> +                               hsync-active = <0>;
> +                               vsync-active = <0>;
> +                               de-active = <1>;
> +                               pixelclk-active = <1>;
> +                       };
> +               };
> +       };
> +};

Being no graphics expert, looking at above device tree change, I'd like 
to understand how this can be used to switch between different display 
timings?

In the kernel, I've found the code which selects the default/native-mode 
(of_display_timing.c). But, as here, if there is a native/default mode, 
there are alternative modes. I haven't understood how and who to select 
these other modes? In this case, how could the alternative modes 
timing0/1/2/3/4 be selected in the kernel?

Do you have any pointers regarding this?

Many thanks and best regards

Dirk



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^ permalink raw reply

* Re: [PATCH 1/2] mfd: twl4030-madc: Add devicetree support.
From: Lee Jones @ 2014-02-14 13:48 UTC (permalink / raw)
  To: Marek Belisko
  Cc: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak, rob,
	linux, grant.likely, devicetree, linux-doc, hns, linux-kernel,
	linux-arm-kernel
In-Reply-To: <1392383861-14169-1-git-send-email-marek@goldelico.com>

> Signed-off-by: Marek Belisko <marek@goldelico.com>
> ---
>  .../devicetree/bindings/mfd/twl4030-madc.txt       | 18 +++++++++++++
>  drivers/mfd/twl4030-madc.c                         | 31
> ++++++++++++++++++++--

Please separate these into different patches.

>  2 files changed, 47 insertions(+), 2 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/mfd/twl4030-madc.txt

<snip>

> +++ b/drivers/mfd/twl4030-madc.c
> @@ -695,6 +695,29 @@ static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_OF

I believe we're heading for a more:

  if (IS_ENABLED(CONFIG_OF))

... approach. I won't enforce it, but please consider using it.

> +static struct twl4030_madc_platform_data *
> +	twl4030_madc_of_parse(struct platform_device *pdev)
> +{
> +	struct twl4030_madc_platform_data *pdata;
> +
> +	pdata = devm_kzalloc(&pdev->dev,
> +			sizeof(struct twl4030_madc_platform_data), GFP_KERNEL);

s/struct twl4030_madc_platform_data/*pdata/

> +	if (!pdata)
> +		return ERR_PTR(-ENOMEM);
> +
> +	pdata->irq_line = platform_get_irq(pdev, 0);

Why weren't 'resources' used in the original implementation?

> +	return pdata;
> +}
> +
> +static const struct of_device_id twl4030_madc_dt_match_table[] = {
> +	{ .compatible = "ti,twl4030-madc" },
> +	{},
> +};
> +
> +#endif
> +
>  /*
>   * Initialize MADC and request for threaded irq
>   */
> @@ -706,8 +729,11 @@ static int twl4030_madc_probe(struct platform_device *pdev)
>  	u8 regval;
>  
>  	if (!pdata) {
> -		dev_err(&pdev->dev, "platform_data not available\n");
> -		return -EINVAL;
> +		pdata = twl4030_madc_of_parse(pdev);
> +		if (!pdata) {

And if you received -ENOMEM?

> +			dev_err(&pdev->dev, "platform_data not available\n");
> +			return -EINVAL;
> +		}
>  	}
>  	madc = kzalloc(sizeof(*madc), GFP_KERNEL);
>  	if (!madc)
> @@ -807,6 +833,7 @@ static struct platform_driver twl4030_madc_driver = {
>  	.driver = {
>  		   .name = "twl4030_madc",
>  		   .owner = THIS_MODULE,
> +		   .of_match_table = of_match_ptr(twl4030_madc_dt_match_table),
>  		   },
>  };
>  

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply

* Re: [PATCH] ARM: dts: omap3 clocks: simplify ssi aliases
From: Tero Kristo @ 2014-02-14 13:47 UTC (permalink / raw)
  To: Sebastian Reichel, Tony Lindgren
  Cc: mturquette, bcousson, linux-omap, devicetree
In-Reply-To: <20140214012546.GA7996@earth.universe>

On 02/14/2014 03:25 AM, Sebastian Reichel wrote:
> On Thu, Feb 13, 2014 at 02:49:14PM -0800, Tony Lindgren wrote:
>> * Sebastian Reichel <sre@debian.org> [140121 06:39]:
>>> update aliases for the ssi clocks ssi_ssr_fck, ssi_sst_fck and ssi_ick
>>> to make them consistent for omap34xx and omap36xx. This makes it
>>> possible to reference the clocks from generic omap3 dts files.
>>
>> Is this needed as a fix for v3.14-rc? If so, please let me know
>> and ack if you want me to take it.
>
> The SSI driver will not arrive before 3.15 and 3.14 dts files do not
> contain any SSI nodes.
>
> Thus it should be enough to queue it for 3.15 if it goes via the
> same tree as the SSI dts patches.
>
> -- Sebastian
>

The patch itself looks good to me, so acked.

-Tero

^ permalink raw reply

* Re: [PATCH] power: twl4030_madc_battery: Add device tree support.
From: Mark Rutland @ 2014-02-14 13:43 UTC (permalink / raw)
  To: Marek Belisko
  Cc: robh+dt@kernel.org, Pawel Moll, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rob@landley.net, dbaryshkov@gmail.com,
	dwmw2@infradead.org, grant.likely@linaro.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, hns@goldelico.com
In-Reply-To: <1392384259-14311-1-git-send-email-marek@goldelico.com>

On Fri, Feb 14, 2014 at 01:24:19PM +0000, Marek Belisko wrote:
> Signed-off-by: Marek Belisko <marek@goldelico.com>
> ---
>  .../bindings/power_supply/twl4030_madc_battery.txt |  15 +++
>  drivers/power/twl4030_madc_battery.c               | 109 +++++++++++++++++++++
>  2 files changed, 124 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt
> 
> diff --git a/Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt b/Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt
> new file mode 100644
> index 0000000..bebc876
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power_supply/twl4030_madc_battery.txt
> @@ -0,0 +1,15 @@
> +twl4030_madc_battery
> +
> +Required properties:
> + - compatible : "ti,twl4030-madc-battery"
> + - capacity : battery capacity in uAh
> + - charging-calibration-data : list of voltage(mV):level(%) values for charging calibration (see example)
> + - discharging-calibration-data : list of voltage(mV):level(%) values for discharging calibration (see example)
> +
> +Example:
> +	madc-battery {
> +		compatible = "ti,twl4030-madc-battery";
> +		capacity = <1200000>;
> +		charging-calibration-data = <4200 100 4100 75 4000 55 3900 25 3800 5 3700 2 3600 1 3300 0>;
> +		discharging-calibration-data = <4200 100 4100 95 4000 70 3800 50 3700 10 3600 5 3300 0>;

Please bracket list entries individually.

> +	};
> diff --git a/drivers/power/twl4030_madc_battery.c b/drivers/power/twl4030_madc_battery.c
> index 7ef445a..2843382 100644
> --- a/drivers/power/twl4030_madc_battery.c
> +++ b/drivers/power/twl4030_madc_battery.c
> @@ -19,6 +19,7 @@
>  #include <linux/sort.h>
>  #include <linux/i2c/twl4030-madc.h>
>  #include <linux/power/twl4030_madc_battery.h>
> +#include <linux/of.h>
>  
>  struct twl4030_madc_battery {
>  	struct power_supply psy;
> @@ -188,6 +189,110 @@ static int twl4030_cmp(const void *a, const void *b)
>  		((struct twl4030_madc_bat_calibration *)a)->voltage;
>  }
>  
> +#ifdef CONFIG_OF
> +static struct twl4030_madc_bat_platform_data *
> +	twl4030_madc_dt_probe(struct platform_device *pdev)
> +{
> +	struct twl4030_madc_bat_platform_data *pdata;
> +	struct device_node *np = pdev->dev.of_node;
> +	struct property *prop;
> +	int ret;
> +	int sz, i, j = 0;
> +
> +	pdata = devm_kzalloc(&pdev->dev,
> +			sizeof(struct twl4030_madc_bat_platform_data),
> +			GFP_KERNEL);
> +	if (!pdata)
> +		return ERR_PTR(-ENOMEM);
> +
> +	ret = of_property_read_u32(np, "capacity", &pdata->capacity);
> +	if (ret != 0)
> +		return ERR_PTR(-EINVAL);
> +
> +	/* parse and prepare charging data */
> +	prop = of_find_property(np, "charging-calibration-data", &sz);
> +	if (!prop)
> +		return ERR_PTR(-EINVAL);
> +
> +	if (sz % 2) {
> +		dev_warn(&pdev->dev, "Count of charging-calibration-data must be even!\n");
> +		return ERR_PTR(-EINVAL);
> +	}

As sz is in bytes this checks that the property is a multiple of 2
bytes, not that it has an even number of u32 elements.

Heiko Stübner recently added of_property_count_u32_elems [1,2]. Use that
instead.

> +
> +	sz /= sizeof(u32);
> +
> +	{
> +		u32 data[sz];
> +
> +		ret = of_property_read_u32_array(np,
> +				"charging-calibration-data", &data[0], sz);
> +		if (ret)
> +			return ERR_PTR(ret);

Why not just allocate then try to read, possibly having to free if the
read fails?

Otherwise we're trying to put an arbitrarily large value onto the stack
for no good reason.

> +
> +		pdata->charging = devm_kzalloc(&pdev->dev,
> +				sizeof(struct twl4030_madc_bat_calibration) * (sz / 2),
> +				GFP_KERNEL);
> +
> +		for (i = 0; i < sz; i += 2) {
> +			pdata->charging[j].voltage = data[i];
> +			pdata->charging[j].level = data[i+1];
> +			j++;

Why not have (i = 0; i < sz/2; i++), and get rid of j?

> +		}
> +
> +		pdata->charging_size = sz / 2;
> +	}
> +
> +	/* parse and prepare discharging data */
> +	prop = of_find_property(np, "discharging-calibration-data", &sz);
> +	if (!prop)
> +		return ERR_PTR(-EINVAL);
> +
> +	if (sz % 2) {
> +		dev_warn(&pdev->dev, "Count of discharging-calibration-data must be even!\n");
> +		return ERR_PTR(-EINVAL);
> +	}

This has the same issues as with charging-calibration-data.

Thanks,
Mark.

[1] http://www.spinics.net/lists/devicetree/msg21358.html
[2] http://www.spinics.net/lists/devicetree/msg21502.html

^ permalink raw reply

* [PATCH v3 3/3] ARM: dts: add dts files for xyref5260 board
From: Rahul Sharma @ 2014-02-14 13:37 UTC (permalink / raw)
  To: linux-samsung-soc
  Cc: devicetree, linux-arm-kernel, kgene.kim, tomasz.figa, joshi,
	r.sh.open, Rahul Sharma
In-Reply-To: <1392385032-22015-1-git-send-email-rahul.sharma@samsung.com>

The patch adds the dts files for xyref5260 board which
is based on Exynos5260 Evt0 sample.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 arch/arm/boot/dts/Makefile                      |    1 +
 arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts |  105 +++++++++++++++++++++++
 2 files changed, 106 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index fa70ea2..c513a69 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -64,6 +64,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 	exynos5250-arndale.dtb \
 	exynos5250-smdk5250.dtb \
 	exynos5250-snow.dtb \
+	exynos5260-xyref5260-evt0.dtb \
 	exynos5420-arndale-octa.dtb \
 	exynos5420-smdk5420.dtb \
 	exynos5440-sd5v1.dtb \
diff --git a/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts
new file mode 100644
index 0000000..c4efc1e
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts
@@ -0,0 +1,105 @@
+/*
+ * SAMSUNG XYREF5260 EVT0 board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+#include "exynos5260.dtsi"
+
+/ {
+	model = "SAMSUNG XYREF5260 EVT0 board based on EXYNOS5260";
+	compatible = "samsung,xyref5260", "samsung,exynos5260";
+
+	memory {
+		reg = <0x20000000 0x80000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttySAC2,115200";
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		fin_pll: oscillator@0 {
+			compatible = "fixed-clock";
+			reg = <0>;
+			clock-frequency = <24000000>;
+			clock-output-names = "fin_pll";
+			#clock-cells = <0>;
+		};
+	};
+};
+
+&pinctrl_0 {
+	hdmi_hpd_irq: hdmi-hpd-irq {
+		samsung,pins = "gpx3-7";
+		samsung,pin-function = <0>;
+		samsung,pin-pud = <1>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&mmc_0 {
+	status = "okay";
+	num-slots = <1>;
+	broken-cd;
+	bypass-smu;
+	supports-highspeed;
+	supports-hs200-mode; /* 200 Mhz */
+	fifo-depth = <0x40>;
+	card-detect-delay = <200>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <0 4>;
+	samsung,dw-mshc-ddr-timing = <0 2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd0_rdqs &sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+
+	slot@0 {
+		reg = <0>;
+		bus-width = <8>;
+	};
+};
+
+&mmc_2 {
+	status = "okay";
+	num-slots = <1>;
+	supports-highspeed;
+	fifo-depth = <0x40>;
+	card-detect-delay = <200>;
+	samsung,dw-mshc-ciu-div = <3>;
+	samsung,dw-mshc-sdr-timing = <2 3>;
+	samsung,dw-mshc-ddr-timing = <1 2>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
+
+	slot@0 {
+		reg = <0>;
+		bus-width = <4>;
+		disable-wp;
+	};
+};
-- 
1.7.9.5

^ permalink raw reply related

* [PATCH v3 2/3] ARM: dts: add dts files for exynos5260 SoC
From: Rahul Sharma @ 2014-02-14 13:37 UTC (permalink / raw)
  To: linux-samsung-soc
  Cc: devicetree, linux-arm-kernel, kgene.kim, tomasz.figa, joshi,
	r.sh.open, Rahul Sharma
In-Reply-To: <1392385032-22015-1-git-send-email-rahul.sharma@samsung.com>

The patch adds the dts files for exynos5260.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
---
 arch/arm/boot/dts/exynos5260-pinctrl.dtsi |  574 +++++++++++++++++++++++++++++
 arch/arm/boot/dts/exynos5260.dtsi         |  304 +++++++++++++++
 2 files changed, 878 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5260-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/exynos5260.dtsi

diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
new file mode 100644
index 0000000..f6ee55e
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
@@ -0,0 +1,574 @@
+/*
+ * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#define PIN_PULL_NONE	0
+#define PIN_PULL_DOWN	1
+#define PIN_PULL_UP	3
+
+&pinctrl_0 {
+	gpa0: gpa0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpa1: gpa1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpa2: gpa2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpb0: gpb0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpb1: gpb1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpb2: gpb2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpb3: gpb3 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpb4: gpb4 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpb5: gpb5 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd0: gpd0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd1: gpd1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpd2: gpd2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpe0: gpe0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpe1: gpe1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpf0: gpf0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpf1: gpf1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpk0: gpk0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpx0: gpx0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpx1: gpx1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpx2: gpx2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpx3: gpx3 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	uart0_data: uart0-data {
+		samsung,pins = "gpa0-0", "gpa0-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart0_fctl: uart0-fctl {
+		samsung,pins = "gpa0-2", "gpa0-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart1_data: uart1-data {
+		samsung,pins = "gpa1-0", "gpa1-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart1_fctl: uart1-fctl {
+		samsung,pins = "gpa1-2", "gpa1-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	uart2_data: uart2-data {
+		samsung,pins = "gpa1-4", "gpa1-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	spi0_bus: spi0-bus {
+		samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	spi1_bus: spi1-bus {
+		samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	usb3_vbus0_en: usb3-vbus0-en {
+		samsung,pins = "gpa2-4";
+		samsung,pin-function = <1>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2s1_bus: i2s1-bus {
+		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
+				"gpb0-4";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	pcm1_bus: pcm1-bus {
+		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3",
+				"gpb0-4";
+		samsung,pin-function = <3>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	spdif1_bus: spdif1-bus {
+		samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2";
+		samsung,pin-function = <4>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	spi2_bus: spi2-bus {
+		samsung,pins = "gpb1-0", "gpb1-2", "gpb1-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c0_hs_bus: i2c0-hs-bus {
+		samsung,pins = "gpb3-0", "gpb3-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c1_hs_bus: i2c1-hs-bus {
+		samsung,pins = "gpb3-2", "gpb3-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c2_hs_bus: i2c2-hs-bus {
+		samsung,pins = "gpb3-4", "gpb3-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c3_hs_bus: i2c3-hs-bus {
+		samsung,pins = "gpb3-6", "gpb3-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c4_bus: i2c4-bus {
+		samsung,pins = "gpb4-0", "gpb4-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c5_bus: i2c5-bus {
+		samsung,pins = "gpb4-2", "gpb4-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c6_bus: i2c6-bus {
+		samsung,pins = "gpb4-4", "gpb4-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c7_bus: i2c7-bus {
+		samsung,pins = "gpb4-6", "gpb4-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c8_bus: i2c8-bus {
+		samsung,pins = "gpb5-0", "gpb5-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c9_bus: i2c9-bus {
+		samsung,pins = "gpb5-2", "gpb5-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c10_bus: i2c10-bus {
+		samsung,pins = "gpb5-4", "gpb5-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	i2c11_bus: i2c11-bus {
+		samsung,pins = "gpb5-6", "gpb5-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	cam_gpio_a: cam-gpio-a {
+		samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3",
+			"gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7",
+			"gpe1-0", "gpe1-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	cam_gpio_b: cam-gpio-b {
+		samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3",
+			"gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
+		samsung,pin-function = <3>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	cam_i2c1_bus: cam-i2c1-bus {
+		samsung,pins = "gpf0-2", "gpf0-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	cam_i2c0_bus: cam-i2c0-bus {
+		samsung,pins = "gpf0-0", "gpf0-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <0>;
+	};
+
+	cam_spi0_bus: cam-spi0-bus {
+		samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+
+	cam_spi1_bus: cam-spi1-bus {
+		samsung,pins = "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <0>;
+	};
+};
+
+&pinctrl_1 {
+	gpc0: gpc0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc1: gpc1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc2: gpc2 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc3: gpc3 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpc4: gpc4 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	sd0_clk: sd0-clk {
+		samsung,pins = "gpc0-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_cmd: sd0-cmd {
+		samsung,pins = "gpc0-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_bus1: sd0-bus-width1 {
+		samsung,pins = "gpc0-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_bus4: sd0-bus-width4 {
+		samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_bus8: sd0-bus-width8 {
+		samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd0_rdqs: sd0-rdqs {
+		samsung,pins = "gpc0-6";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd1_clk: sd1-clk {
+		samsung,pins = "gpc1-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd1_cmd: sd1-cmd {
+		samsung,pins = "gpc1-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd1_bus1: sd1-bus-width1 {
+		samsung,pins = "gpc1-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd1_bus4: sd1-bus-width4 {
+		samsung,pins = "gpc1-3", "gpc1-4", "gpc1-5";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd1_bus8: sd1-bus-width8 {
+		samsung,pins = "gpc4-0", "gpc4-1", "gpc4-2", "gpc4-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_clk: sd2-clk {
+		samsung,pins = "gpc2-0";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_cmd: sd2-cmd {
+		samsung,pins = "gpc2-1";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_NONE>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_cd: sd2-cd {
+		samsung,pins = "gpc2-2";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_bus1: sd2-bus-width1 {
+		samsung,pins = "gpc2-3";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+
+	sd2_bus4: sd2-bus-width4 {
+		samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6";
+		samsung,pin-function = <2>;
+		samsung,pin-pud = <PIN_PULL_UP>;
+		samsung,pin-drv = <3>;
+	};
+};
+
+&pinctrl_2 {
+	gpz0: gpz0 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpz1: gpz1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+};
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
new file mode 100644
index 0000000..876e23f
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -0,0 +1,304 @@
+/*
+ * SAMSUNG EXYNOS5260 SoC device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include "skeleton.dtsi"
+
+#include <dt-bindings/clk/exynos5260-clk.h>
+
+/ {
+	compatible = "samsung,exynos5260";
+	interrupt-parent = <&gic>;
+
+	aliases {
+		pinctrl0 = &pinctrl_0;
+		pinctrl1 = &pinctrl_1;
+		pinctrl2 = &pinctrl_2;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x0>;
+			cci-control-port = <&cci_control1>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x1>;
+			cci-control-port = <&cci_control1>;
+		};
+
+		cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x100>;
+			cci-control-port = <&cci_control0>;
+		};
+
+		cpu@101 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x101>;
+			cci-control-port = <&cci_control0>;
+		};
+
+		cpu@102 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x102>;
+			cci-control-port = <&cci_control0>;
+		};
+
+		cpu@103 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x103>;
+			cci-control-port = <&cci_control0>;
+		};
+	};
+
+	soc: soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		clock_top: clock-controller@10010000 {
+			compatible = "samsung,exynos5260-clock-top";
+			reg = <0x10010000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_peri: clock-controller@10200000 {
+			compatible = "samsung,exynos5260-clock-peri";
+			reg = <0x10200000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_egl: clock-controller@10600000 {
+			compatible = "samsung,exynos5260-clock-egl";
+			reg = <0x10600000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_kfc: clock-controller@10700000 {
+			compatible = "samsung,exynos5260-clock-kfc";
+			reg = <0x10700000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_g2d: clock-controller@10A00000 {
+			compatible = "samsung,exynos5260-clock-g2d";
+			reg = <0x10A00000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_mif: clock-controller@10CE0000 {
+			compatible = "samsung,exynos5260-clock-mif";
+			reg = <0x10CE0000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_mfc: clock-controller@11090000 {
+			compatible = "samsung,exynos5260-clock-mfc";
+			reg = <0x11090000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_g3d: clock-controller@11830000 {
+			compatible = "samsung,exynos5260-clock-g3d";
+			reg = <0x11830000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_fsys: clock-controller@122E0000 {
+			compatible = "samsung,exynos5260-clock-fsys";
+			reg = <0x122E0000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_aud: clock-controller@128C0000 {
+			compatible = "samsung,exynos5260-clock-aud";
+			reg = <0x128C0000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_isp: clock-controller@133C0000 {
+			compatible = "samsung,exynos5260-clock-isp";
+			reg = <0x133C0000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_gscl: clock-controller@13F00000 {
+			compatible = "samsung,exynos5260-clock-gscl";
+			reg = <0x13F00000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		clock_disp: clock-controller@14550000 {
+			compatible = "samsung,exynos5260-clock-disp";
+			reg = <0x14550000 0x10000>;
+			#clock-cells = <1>;
+		};
+
+		gic: interrupt-controller@10481000 {
+			compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			#size-cells = <0>;
+			interrupt-controller;
+			reg = <0x10481000 0x1000>,
+				<0x10482000 0x1000>,
+				<0x10484000 0x2000>,
+				<0x10486000 0x2000>;
+			interrupts = <1 9 0xf04>;
+		};
+
+		chipid: chipid@10000000 {
+			compatible = "samsung,exynos4210-chipid";
+			reg = <0x10000000 0x100>;
+		};
+
+		mct: mct@100B0000 {
+			compatible = "samsung,exynos4210-mct";
+			reg = <0x100B0000 0x1000>;
+			clocks = <&clock_top FIN_PLL>, <&clock_peri PERI_CLK_MCT>;
+			clock-names = "fin_pll", "mct";
+			interrupts = <0 104 0>, <0 105 0>, <0 106 0>,
+					<0 107 0>, <0 122 0>, <0 123 0>,
+					<0 124 0>, <0 125 0>, <0 126 0>,
+					<0 127 0>, <0 128 0>, <0 129 0>;
+		};
+
+		cci: cci@10F00000 {
+			compatible = "arm,cci-400";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x10F00000 0x1000>;
+			ranges = <0x0 0x10F00000 0x6000>;
+
+			cci_control0: slave-if@4000 {
+				compatible = "arm,cci-400-ctrl-if";
+				interface-type = "ace";
+				reg = <0x4000 0x1000>;
+			};
+
+			cci_control1: slave-if@5000 {
+				compatible = "arm,cci-400-ctrl-if";
+				interface-type = "ace";
+				reg = <0x5000 0x1000>;
+			};
+		};
+
+		pinctrl_0: pinctrl@11600000 {
+			compatible = "samsung,exynos5260-pinctrl";
+			reg = <0x11600000 0x1000>;
+			interrupts = <0 79 0>;
+
+			wakeup-interrupt-controller {
+				compatible = "samsung,exynos4210-wakeup-eint";
+				interrupt-parent = <&gic>;
+				interrupts = <0 32 0>;
+			};
+		};
+
+		pinctrl_1: pinctrl@12290000 {
+			compatible = "samsung,exynos5260-pinctrl";
+			reg = <0x12290000 0x1000>;
+			interrupts = <0 157 0>;
+		};
+
+		pinctrl_2: pinctrl@128B0000 {
+			compatible = "samsung,exynos5260-pinctrl";
+			reg = <0x128B0000 0x1000>;
+			interrupts = <0 243 0>;
+		};
+
+		uart0: serial@12C00000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x12C00000 0x100>;
+			interrupts = <0 146 0>;
+			clocks = <&clock_peri PERI_CLK_UART0>, <&clock_peri PERI_SCLK_UART0>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		uart1: serial@12C10000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x12C10000 0x100>;
+			interrupts = <0 147 0>;
+			clocks = <&clock_peri PERI_CLK_UART1>, <&clock_peri PERI_SCLK_UART1>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		uart2: serial@12C20000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x12C20000 0x100>;
+			interrupts = <0 148 0>;
+			clocks = <&clock_peri PERI_CLK_UART2>, <&clock_peri PERI_SCLK_UART2>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		uart3: serial@12860000 {
+			compatible = "samsung,exynos4210-uart";
+			reg = <0x12860000 0x100>;
+			interrupts = <0 145 0>;
+			clocks = <&clock_aud AUD_CLK_AUD_UART>, <&clock_aud AUD_SCLK_AUD_UART>;
+			clock-names = "uart", "clk_uart_baud0";
+			status = "disabled";
+		};
+
+		mmc_0: mmc0@12140000 {
+			compatible = "samsung,exynos5250-dw-mshc";
+			reg = <0x12140000 0x2000>;
+			interrupts = <0 156 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&clock_fsys FSYS_CLK_MMC0>, <&clock_top TOP_SCLK_MMC0>;
+			clock-names = "biu", "ciu";
+			fifo-depth = <64>;
+			status = "disabled";
+		};
+
+		mmc_1: mmc1@12150000 {
+			compatible = "samsung,exynos5250-dw-mshc";
+			reg = <0x12150000 0x2000>;
+			interrupts = <0 158 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&clock_fsys FSYS_CLK_MMC1>, <&clock_top TOP_SCLK_MMC1>;
+			clock-names = "biu", "ciu";
+			fifo-depth = <64>;
+			status = "disabled";
+		};
+
+		mmc_2: mmc2@12160000 {
+			compatible = "samsung,exynos5250-dw-mshc";
+			reg = <0x12160000 0x2000>;
+			interrupts = <0 159 0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&clock_fsys FSYS_CLK_MMC2>, <&clock_top TOP_SCLK_MMC2>;
+			clock-names = "biu", "ciu";
+			fifo-depth = <64>;
+			status = "disabled";
+		};
+	};
+};
+
+#include "exynos5260-pinctrl.dtsi"
-- 
1.7.9.5

^ permalink raw reply related

* [PATCH v3 1/3] ARM: EXYNOS: initial board support for exynos5260 SoC
From: Rahul Sharma @ 2014-02-14 13:37 UTC (permalink / raw)
  To: linux-samsung-soc
  Cc: devicetree, linux-arm-kernel, kgene.kim, tomasz.figa, joshi,
	r.sh.open, Pankaj Dubey, Rahul Sharma
In-Reply-To: <1392385032-22015-1-git-send-email-rahul.sharma@samsung.com>

From: Pankaj Dubey <pankaj.dubey@samsung.com>

This patch add basic arch side support for exynos5260 SoC.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 arch/arm/mach-exynos/Kconfig             |    9 +++++++++
 arch/arm/mach-exynos/common.c            |   11 +++++++++++
 arch/arm/mach-exynos/include/mach/map.h  |    1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c   |    1 +
 arch/arm/plat-samsung/include/plat/cpu.h |    8 ++++++++
 5 files changed, 30 insertions(+)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 4c414af..5c96248 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -91,6 +91,15 @@ config SOC_EXYNOS5250
 	help
 	  Enable EXYNOS5250 SoC support
 
+config SOC_EXYNOS5260
+	bool "SAMSUNG EXYNOS5260"
+	default y
+	depends on ARCH_EXYNOS5
+	select AUTO_ZRELADDR
+	select SAMSUNG_DMADEV
+	help
+	  Enable EXYNOS5260 SoC support
+
 config SOC_EXYNOS5420
 	bool "SAMSUNG EXYNOS5420"
 	default y
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index bab52ca..02b142d 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -176,6 +176,15 @@ static struct map_desc exynos5250_iodesc[] __initdata = {
 	},
 };
 
+static struct map_desc exynos5260_iodesc[] __initdata = {
+	{
+		.virtual	= (unsigned long)S5P_VA_SYSRAM_NS,
+		.pfn		= __phys_to_pfn(EXYNOS5260_PA_SYSRAM_NS),
+		.length		= SZ_4K,
+		.type		= MT_DEVICE,
+	},
+};
+
 static struct map_desc exynos5_iodesc[] __initdata = {
 	{
 		.virtual	= (unsigned long)S3C_VA_SYS,
@@ -326,6 +335,8 @@ static void __init exynos_map_io(void)
 		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
 	if (soc_is_exynos5250())
 		iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
+	if (soc_is_exynos5260())
+		iotable_init(exynos5260_iodesc, ARRAY_SIZE(exynos5260_iodesc));
 }
 
 struct bus_type exynos_subsys = {
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 7b046b5..bd6fa02 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -29,6 +29,7 @@
 #define EXYNOS4210_PA_SYSRAM_NS		0x0203F000
 #define EXYNOS4x12_PA_SYSRAM_NS		0x0204F000
 #define EXYNOS5250_PA_SYSRAM_NS		0x0204F000
+#define EXYNOS5260_PA_SYSRAM_NS		0x02073000
 
 #define EXYNOS_PA_CHIPID		0x10000000
 
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 65a4646..18aee57 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -50,6 +50,7 @@ static void __init exynos5_dt_machine_init(void)
 
 static char const *exynos5_dt_compat[] __initdata = {
 	"samsung,exynos5250",
+	"samsung,exynos5260",
 	"samsung,exynos5420",
 	"samsung,exynos5440",
 	NULL
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 335beb3..60687aa 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -46,6 +46,7 @@ extern unsigned long samsung_cpu_id;
 #define EXYNOS4_CPU_MASK	0xFFFE0000
 
 #define EXYNOS5250_SOC_ID	0x43520000
+#define EXYNOS5260_SOC_ID	0xE5260000
 #define EXYNOS5420_SOC_ID	0xE5420000
 #define EXYNOS5440_SOC_ID	0xE5440000
 #define EXYNOS5_SOC_MASK	0xFFFFF000
@@ -68,6 +69,7 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
 IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
+IS_SAMSUNG_CPU(exynos5260, EXYNOS5260_SOC_ID, EXYNOS5_SOC_MASK)
 IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
 IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 
@@ -148,6 +150,12 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
 # define soc_is_exynos5250()	0
 #endif
 
+#if defined(CONFIG_SOC_EXYNOS5260)
+# define soc_is_exynos5260()	is_samsung_exynos5260()
+#else
+# define soc_is_exynos5260()	0
+#endif
+
 #if defined(CONFIG_SOC_EXYNOS5420)
 # define soc_is_exynos5420()	is_samsung_exynos5420()
 #else
-- 
1.7.9.5

^ permalink raw reply related

* [PATCH v3 0/3] exynos: arch: add support for exynos5260 SoC
From: Rahul Sharma @ 2014-02-14 13:37 UTC (permalink / raw)
  To: linux-samsung-soc
  Cc: devicetree, linux-arm-kernel, kgene.kim, tomasz.figa, joshi,
	r.sh.open, Rahul Sharma

From: Rahul Sharma <Rahul.Sharma@samsung.com>

V3:
  1) Addressed review comments from Tomasz figa.

V2:
  1) Split up DT patch into SoC and Board patch.

This series is dependent on Sachin's patch
"ARM: EXYNOS: Consolidate CPU init code" at
http://comments.gmane.org/gmane.linux.kernel.samsung-soc/26560

This series is based on Kukjin's for-next branch at
http://git.kernel.org/?p=linux/kernel/git/kgene/linux-samsung.git

Pankaj Dubey (1):
  ARM: EXYNOS: initial board support for exynos5260 SoC

Rahul Sharma (2):
  ARM: dts: add dts files for exynos5260 SoC
  ARM: dts: add dts files for xyref5260 board

 arch/arm/boot/dts/Makefile                      |    1 +
 arch/arm/boot/dts/exynos5260-pinctrl.dtsi       |  574 +++++++++++++++++++++++
 arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts |  105 +++++
 arch/arm/boot/dts/exynos5260.dtsi               |  304 ++++++++++++
 arch/arm/mach-exynos/Kconfig                    |    9 +
 arch/arm/mach-exynos/common.c                   |   11 +
 arch/arm/mach-exynos/include/mach/map.h         |    1 +
 arch/arm/mach-exynos/mach-exynos5-dt.c          |    1 +
 arch/arm/plat-samsung/include/plat/cpu.h        |    8 +
 9 files changed, 1014 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos5260-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/exynos5260-xyref5260-evt0.dts
 create mode 100644 arch/arm/boot/dts/exynos5260.dtsi

-- 
1.7.9.5

^ permalink raw reply

* Re: [PATCH v7 03/12] mfd: omap-usb-host: Use clock names as per function for reference clocks
From: Lee Jones @ 2014-02-14 13:33 UTC (permalink / raw)
  To: Roger Quadros
  Cc: tony, bcousson, balbi, nm, khilman, linux-omap, linux-arm-kernel,
	linux-kernel, devicetree, linux-usb, Samuel Ortiz
In-Reply-To: <52FE164F.80503@ti.com>

> >> Use a meaningful name for the reference clocks so that it indicates the function.
> >>
> >> CC: Lee Jones <lee.jones@linaro.org>
> >> CC: Samuel Ortiz <sameo@linux.intel.com>
> >> Signed-off-by: Roger Quadros <rogerq@ti.com>
> >> ---
> >>  drivers/mfd/omap-usb-host.c | 6 +++---
> >>  1 file changed, 3 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
> >> index 60a3bed..ce620a8 100644
> >> --- a/drivers/mfd/omap-usb-host.c
> >> +++ b/drivers/mfd/omap-usb-host.c
> >> @@ -714,21 +714,21 @@ static int usbhs_omap_probe(struct platform_device *pdev)
> >>  		goto err_mem;
> >>  	}
> >>  
> >> -	omap->xclk60mhsp1_ck = devm_clk_get(dev, "xclk60mhsp1_ck");
> >> +	omap->xclk60mhsp1_ck = devm_clk_get(dev, "refclk_60m_ext_p1");
> > 
> > You can't do that. These changes will have to be in the same patch as
> > the core change i.e. where they are initialised.
> 
> I'm not touching them anywhere in this series. When core changes are you
> referring to?

The ones in:
  arch/arm/mach-omap2/cclock3xxx_data.c

> >>  	if (IS_ERR(omap->xclk60mhsp1_ck)) {
> >>  		ret = PTR_ERR(omap->xclk60mhsp1_ck);
> >>  		dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
> >>  		goto err_mem;
> >>  	}
> >>  
> >> -	omap->xclk60mhsp2_ck = devm_clk_get(dev, "xclk60mhsp2_ck");
> >> +	omap->xclk60mhsp2_ck = devm_clk_get(dev, "refclk_60m_ext_p2");
> >>  	if (IS_ERR(omap->xclk60mhsp2_ck)) {
> >>  		ret = PTR_ERR(omap->xclk60mhsp2_ck);
> >>  		dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
> >>  		goto err_mem;
> >>  	}
> >>  
> >> -	omap->init_60m_fclk = devm_clk_get(dev, "init_60m_fclk");
> >> +	omap->init_60m_fclk = devm_clk_get(dev, "refclk_60m_int");
> >>  	if (IS_ERR(omap->init_60m_fclk)) {
> >>  		ret = PTR_ERR(omap->init_60m_fclk);
> >>  		dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
> > 
> 

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply

* Re: [PATCH] hwmon: twl4030-madc-hwmon: Add device tree support.
From: Mark Rutland @ 2014-02-14 13:31 UTC (permalink / raw)
  To: Marek Belisko
  Cc: robh+dt@kernel.org, Pawel Moll, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, rob@landley.net, jdelvare@suse.de,
	linux@roeck-us.net, grant.likely@linaro.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, lm-sensors@lm-sensors.org,
	hns@goldelico.com
In-Reply-To: <1392384058-14240-1-git-send-email-marek@goldelico.com>

On Fri, Feb 14, 2014 at 01:20:58PM +0000, Marek Belisko wrote:
> Signed-off-by: Marek Belisko <marek@goldelico.com>
> ---
>  Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt |  9 +++++++++
>  drivers/hwmon/twl4030-madc-hwmon.c                             | 10 ++++++++++
>  2 files changed, 19 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt
> 
> diff --git a/Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt b/Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt
> new file mode 100644
> index 0000000..e8016d1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hwmon/twl4030-madc-hwmon.txt
> @@ -0,0 +1,9 @@
> +TWL4030 MADC hwmon.
> +
> +Required properties:
> +- compatible: "ti,twl4030-madc-hwmon"
> +
> +Example:
> +madc-hwmon {
> +	compatible = "ti,twl4030-madc-hwmon";
> +};

Huh?

What is this a binding for? From a look at the driver in mainline this
just calls into functions from the twl4030 madc driver (which doesn't
seem to have a binding).

This doesn't look like a description of hardware, but rather a hack to
get a Linux driver to probe. As far as I can see, no useful information
is given by this binding.

Thanks,
Mark.

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