* Re: [PATCH] arm64: dts: mt8173: Fix auxadc node
From: Matthias Brugger @ 2016-10-31 0:15 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, zhiyong.tao-NuS5LvNUpcJWk0Htik3J/w,
s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: djkurtz-F7+t8E8rja9g9hUCZPvPmw, p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ,
hans.verkuil-FYB4Gu1CFyUAvxtiuMwx3w,
andrew-ct.chen-NuS5LvNUpcJWk0Htik3J/w,
ck.hu-NuS5LvNUpcJWk0Htik3J/w, bayi.cheng-NuS5LvNUpcJWk0Htik3J/w,
yong.wu-NuS5LvNUpcJWk0Htik3J/w,
dawei.chien-NuS5LvNUpcJWk0Htik3J/w,
chunfeng.yun-NuS5LvNUpcJWk0Htik3J/w,
tiffany.lin-NuS5LvNUpcJWk0Htik3J/w,
fan.chen-NuS5LvNUpcJWk0Htik3J/w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20161026141500.27105-1-matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 10/26/2016 04:15 PM, Matthias Brugger wrote:
> The devicetree node for mt8173-auxadc lacks the clock and
> io-channel-cells property. This leads to a non-working driver.
>
> mt6577-auxadc 11001000.auxadc: failed to get auxadc clock
> mt6577-auxadc: probe of 11001000.auxadc failed with error -2
>
> Fix these fields to get the device up and running.
>
> Fixes: 748c7d4de46a ("ARM64: dts: mt8173: Add thermal/auxadc device
> nodes")
> Signed-off-by: Matthias Brugger <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
Applied.
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^ permalink raw reply
* Re: [PATCH v9 2/4] soc: mediatek: Init MT8173 scpsys driver earlier
From: Matthias Brugger @ 2016-10-31 0:08 UTC (permalink / raw)
To: James Liao, Sascha Hauer
Cc: Rob Herring, Kevin Hilman, Daniel Kurtz,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1476953798-23263-3-git-send-email-jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Hi James,
On 10/20/2016 10:56 AM, James Liao wrote:
> Some power domain comsumers may init before module_init.
> So the power domain provider (scpsys) need to be initialized
> earlier too.
>
> Take an example for our IOMMU (M4U) and SMI. SMI is a bridge
> between IOMMU and multimedia HW. SMI is responsible to
> enable/disable iommu and help transfer data for each multimedia
> HW. Both of them have to wait until the power and clocks are
> enabled.
>
> So scpsys driver should be initialized before SMI, and SMI should
> be initialized before IOMMU, and then init IOMMU consumers
> (display/vdec/venc/camera etc.).
>
> IOMMU is subsys_init by default. So we need to init scpsys driver
> before subsys_init.
>
> Signed-off-by: James Liao <jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> Reviewed-by: Kevin Hilman <khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> ---
I didn't applied this patch for now.
I answered you in v7 of this series [1]. I would prefer to see if we can
fix that otherwise.
Would be great if you or Yong could provide some feedback.
Thanks,
Matthias
[1] https://patchwork.kernel.org/patch/9397405/
> drivers/soc/mediatek/mtk-scpsys.c | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
> index fa9ee69..dd7a07d 100644
> --- a/drivers/soc/mediatek/mtk-scpsys.c
> +++ b/drivers/soc/mediatek/mtk-scpsys.c
> @@ -613,4 +613,21 @@ static int scpsys_probe(struct platform_device *pdev)
> .of_match_table = of_match_ptr(of_scpsys_match_tbl),
> },
> };
> -builtin_platform_driver(scpsys_drv);
> +
> +static int __init scpsys_drv_init(void)
> +{
> + return platform_driver_register(&scpsys_drv);
> +}
> +
> +/*
> + * There are some Mediatek drivers which depend on the power domain driver need
> + * to probe in earlier initcall levels. So scpsys driver also need to probe
> + * earlier.
> + *
> + * IOMMU(M4U) and SMI drivers for example. SMI is a bridge between IOMMU and
> + * multimedia HW. IOMMU depends on SMI, and SMI is a power domain consumer,
> + * so the proper probe sequence should be scpsys -> SMI -> IOMMU driver.
> + * IOMMU drivers are initialized during subsys_init by default, so we need to
> + * move SMI and scpsys drivers to subsys_init or earlier init levels.
> + */
> +subsys_initcall(scpsys_drv_init);
>
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^ permalink raw reply
* Re: [PATCH v9 3/4] soc: mediatek: Add MT2701 power dt-bindings
From: Matthias Brugger @ 2016-10-31 0:01 UTC (permalink / raw)
To: James Liao, Sascha Hauer
Cc: Rob Herring, Kevin Hilman, Daniel Kurtz,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Shunli Wang
In-Reply-To: <19220b7f-84c3-eefe-333c-bd1ddfa988a3-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 10/31/2016 12:57 AM, Matthias Brugger wrote:
>
>
> On 10/20/2016 10:56 AM, James Liao wrote:
>> From: Shunli Wang <shunli.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
>>
>> Add power dt-bindings for MT2701.
>>
>> Signed-off-by: Shunli Wang <shunli.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
>> Signed-off-by: James Liao <jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
>> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>> Reviewed-by: Kevin Hilman <khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
>
> Applied to v4.9-next/soc
Of course this has to be applied to v4.9-next/dts, fixed now.
Thanks,
Matthias
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^ permalink raw reply
* Re: [PATCH v9 4/4] soc: mediatek: Add MT2701 scpsys driver
From: Matthias Brugger @ 2016-10-30 23:57 UTC (permalink / raw)
To: James Liao, Sascha Hauer
Cc: Rob Herring, Kevin Hilman, Daniel Kurtz, srv_heupstream,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
Shunli Wang
In-Reply-To: <1476953798-23263-5-git-send-email-jamesjj.liao@mediatek.com>
On 10/20/2016 10:56 AM, James Liao wrote:
> From: Shunli Wang <shunli.wang@mediatek.com>
>
> Add scpsys driver for MT2701.
>
> mtk-scpsys now supports MT8173 (arm64) and MT2701 (arm). So it should
> be enabled on both arm64 and arm platforms.
>
> Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
> Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
> Reviewed-by: Kevin Hilman <khilman@baylibre.com>
> ---
Applied to v4.9-next/soc
^ permalink raw reply
* Re: [PATCH v9 3/4] soc: mediatek: Add MT2701 power dt-bindings
From: Matthias Brugger @ 2016-10-30 23:57 UTC (permalink / raw)
To: James Liao, Sascha Hauer
Cc: Rob Herring, Kevin Hilman, Daniel Kurtz,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Shunli Wang
In-Reply-To: <1476953798-23263-4-git-send-email-jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
On 10/20/2016 10:56 AM, James Liao wrote:
> From: Shunli Wang <shunli.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
>
> Add power dt-bindings for MT2701.
>
> Signed-off-by: Shunli Wang <shunli.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> Signed-off-by: James Liao <jamesjj.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Reviewed-by: Kevin Hilman <khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Applied to v4.9-next/soc
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* Re: [PATCH v9 1/4] soc: mediatek: Refine scpsys to support multiple platform
From: Matthias Brugger @ 2016-10-30 23:57 UTC (permalink / raw)
To: James Liao
Cc: Sascha Hauer, Rob Herring, srv_heupstream, devicetree,
Kevin Hilman, linux-kernel, linux-mediatek, linux-arm-kernel
In-Reply-To: <1477647408.24014.6.camel@mtksdaap41>
On 10/28/2016 11:36 AM, James Liao wrote:
> Hi Matthias,
>
> Sorry for late reply due to our email service.
>
> On Tue, 2016-10-25 at 16:04 +0200, Matthias Brugger wrote:
>> Hi James,
>>
>> On 10/20/2016 10:56 AM, James Liao wrote:
>>> -static int scpsys_probe(struct platform_device *pdev)
>>> +static void init_clks(struct platform_device *pdev, struct clk *clk[CLK_MAX])
>>
>> I prefer struct clk **clk.
>
> Okay.
>
>>> +{
>>> + int i;
>>> +
>>> + for (i = CLK_NONE + 1; i < CLK_MAX; i++)
>>> + clk[i] = devm_clk_get(&pdev->dev, clk_names[i]);
>>> +}
>>> +
>>> +static struct scp *init_scp(struct platform_device *pdev,
>>> + const struct scp_domain_data *scp_domain_data, int num)
>>> {
>>> struct genpd_onecell_data *pd_data;
>>> struct resource *res;
>>> - int i, j, ret;
>>> + int i, j;
>>> struct scp *scp;
>>> - struct clk *clk[MT8173_CLK_MAX];
>>> + struct clk *clk[CLK_MAX];
>>
>> should be *[CLK_MAX - 1] but I would prefer to define in the enum:
>> CLK_MAX = CLK_VENC_LT,
>
> After init_clks() the clk[] will have valid contents between
> clk[1]..clk[CLK_MAX-1], so it's necessary to declare clk[] with CLK_MAX
> elements.
>
>> If you are ok with it, I can fix both of my comments when applying.
>
> Yes. struct clk **clk can be applied directly. But I think clk[CLK_MAX]
> should be kept in current implementation.
>
Ok, we won't never use clk[0] but it's ok for now.
Applied to v4.9-next/soc
>
> Best regards,
>
> James
>
>
^ permalink raw reply
* [PATCH v2 7/7] MIPS: jz4740: Remove obsolete code
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
Cc: Paul Cercueil
In-Reply-To: <20161030230247.20538-1-paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
This commit removes two things:
- The platform_device that corresponds to the RTC driver, since we now
probe this driver from devicetree;
- The platform power-off code, since all the jz4740-based platforms are
now using the jz4740-rtc driver as the system power controller.
Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Acked-by: Maarten ter Huurne <maarten-Ph2Y2OKCxY1M656bX5wj8A@public.gmane.org>
---
arch/mips/include/asm/mach-jz4740/platform.h | 1 -
arch/mips/jz4740/platform.c | 21 ----------
arch/mips/jz4740/reset.c | 63 ----------------------------
3 files changed, 85 deletions(-)
v2: New patch in this series
diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h
index 073b8bf..3645974 100644
--- a/arch/mips/include/asm/mach-jz4740/platform.h
+++ b/arch/mips/include/asm/mach-jz4740/platform.h
@@ -22,7 +22,6 @@
extern struct platform_device jz4740_udc_device;
extern struct platform_device jz4740_udc_xceiv_device;
extern struct platform_device jz4740_mmc_device;
-extern struct platform_device jz4740_rtc_device;
extern struct platform_device jz4740_i2c_device;
extern struct platform_device jz4740_nand_device;
extern struct platform_device jz4740_framebuffer_device;
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index 2f1dab3..5b7cdd6 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -88,27 +88,6 @@ struct platform_device jz4740_mmc_device = {
.resource = jz4740_mmc_resources,
};
-/* RTC controller */
-static struct resource jz4740_rtc_resources[] = {
- {
- .start = JZ4740_RTC_BASE_ADDR,
- .end = JZ4740_RTC_BASE_ADDR + 0x38 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = JZ4740_IRQ_RTC,
- .end = JZ4740_IRQ_RTC,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device jz4740_rtc_device = {
- .name = "jz4740-rtc",
- .id = -1,
- .num_resources = ARRAY_SIZE(jz4740_rtc_resources),
- .resource = jz4740_rtc_resources,
-};
-
/* I2C controller */
static struct resource jz4740_i2c_resources[] = {
{
diff --git a/arch/mips/jz4740/reset.c b/arch/mips/jz4740/reset.c
index 954e669..67780c4 100644
--- a/arch/mips/jz4740/reset.c
+++ b/arch/mips/jz4740/reset.c
@@ -57,71 +57,8 @@ static void jz4740_restart(char *command)
jz4740_halt();
}
-#define JZ_REG_RTC_CTRL 0x00
-#define JZ_REG_RTC_HIBERNATE 0x20
-#define JZ_REG_RTC_WAKEUP_FILTER 0x24
-#define JZ_REG_RTC_RESET_COUNTER 0x28
-
-#define JZ_RTC_CTRL_WRDY BIT(7)
-#define JZ_RTC_WAKEUP_FILTER_MASK 0x0000FFE0
-#define JZ_RTC_RESET_COUNTER_MASK 0x00000FE0
-
-static inline void jz4740_rtc_wait_ready(void __iomem *rtc_base)
-{
- uint32_t ctrl;
-
- do {
- ctrl = readl(rtc_base + JZ_REG_RTC_CTRL);
- } while (!(ctrl & JZ_RTC_CTRL_WRDY));
-}
-
-static void jz4740_power_off(void)
-{
- void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x38);
- unsigned long wakeup_filter_ticks;
- unsigned long reset_counter_ticks;
- struct clk *rtc_clk;
- unsigned long rtc_rate;
-
- rtc_clk = clk_get(NULL, "rtc");
- if (IS_ERR(rtc_clk))
- panic("unable to get RTC clock");
- rtc_rate = clk_get_rate(rtc_clk);
- clk_put(rtc_clk);
-
- /*
- * Set minimum wakeup pin assertion time: 100 ms.
- * Range is 0 to 2 sec if RTC is clocked at 32 kHz.
- */
- wakeup_filter_ticks = (100 * rtc_rate) / 1000;
- if (wakeup_filter_ticks < JZ_RTC_WAKEUP_FILTER_MASK)
- wakeup_filter_ticks &= JZ_RTC_WAKEUP_FILTER_MASK;
- else
- wakeup_filter_ticks = JZ_RTC_WAKEUP_FILTER_MASK;
- jz4740_rtc_wait_ready(rtc_base);
- writel(wakeup_filter_ticks, rtc_base + JZ_REG_RTC_WAKEUP_FILTER);
-
- /*
- * Set reset pin low-level assertion time after wakeup: 60 ms.
- * Range is 0 to 125 ms if RTC is clocked at 32 kHz.
- */
- reset_counter_ticks = (60 * rtc_rate) / 1000;
- if (reset_counter_ticks < JZ_RTC_RESET_COUNTER_MASK)
- reset_counter_ticks &= JZ_RTC_RESET_COUNTER_MASK;
- else
- reset_counter_ticks = JZ_RTC_RESET_COUNTER_MASK;
- jz4740_rtc_wait_ready(rtc_base);
- writel(reset_counter_ticks, rtc_base + JZ_REG_RTC_RESET_COUNTER);
-
- jz4740_rtc_wait_ready(rtc_base);
- writel(1, rtc_base + JZ_REG_RTC_HIBERNATE);
-
- jz4740_halt();
-}
-
void jz4740_reset_init(void)
{
_machine_restart = jz4740_restart;
_machine_halt = jz4740_halt;
- pm_power_off = jz4740_power_off;
}
--
2.9.3
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* [PATCH v2 6/7] MIPS: qi_lb60: Probe RTC driver from DT and use it as power controller
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
Cc: Paul Cercueil
In-Reply-To: <20161030230247.20538-1-paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Since we already have a devicetree node for the jz4740-rtc driver, we
don't have to probe it from platform code.
Besides, using the jz4740-rtc driver as the power controller for the
qi_lb60 platform allows us to remove the jz4740 platform power-off code,
since this is the only jz4740-based board upstream.
Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Acked-by: Maarten ter Huurne <maarten-Ph2Y2OKCxY1M656bX5wj8A@public.gmane.org>
---
arch/mips/boot/dts/ingenic/qi_lb60.dts | 4 ++++
arch/mips/jz4740/board-qi_lb60.c | 1 -
2 files changed, 4 insertions(+), 1 deletion(-)
v2: New patch in this series
diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts
index 2414d63..be1a7d3 100644
--- a/arch/mips/boot/dts/ingenic/qi_lb60.dts
+++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts
@@ -13,3 +13,7 @@
&ext {
clock-frequency = <12000000>;
};
+
+&rtc_dev {
+ system-power-controller;
+};
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 258fd03..a5bd94b 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -438,7 +438,6 @@ static struct platform_device *jz_platform_devices[] __initdata = {
&jz4740_pcm_device,
&jz4740_i2s_device,
&jz4740_codec_device,
- &jz4740_rtc_device,
&jz4740_adc_device,
&jz4740_pwm_device,
&jz4740_dma_device,
--
2.9.3
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^ permalink raw reply related
* [PATCH v2 5/7] MIPS: jz4740: DTS: Probe the jz4740-rtc driver from devicetree
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
Cc: Paul Cercueil
In-Reply-To: <20161030230247.20538-1-paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Now that the jz4740-rtc driver supports devicetree, we can add a
devicetree node for it.
Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Acked-by: Maarten ter Huurne <maarten-Ph2Y2OKCxY1M656bX5wj8A@public.gmane.org>
---
arch/mips/boot/dts/ingenic/jz4740.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
v2: Previous patch 5/5 was garbage. This is a new patch.
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index f6ae6ed..c6acd6a 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -44,6 +44,17 @@
#clock-cells = <1>;
};
+ rtc_dev: jz4740-rtc@10003000 {
+ compatible = "ingenic,jz4740-rtc";
+ reg = <0x10003000 0x40>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <15>;
+
+ clocks = <&cgu JZ4740_CLK_RTC>;
+ clock-names = "rtc";
+ };
+
uart0: serial@10030000 {
compatible = "ingenic,jz4740-uart";
reg = <0x10030000 0x100>;
--
2.9.3
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* [PATCH v2 4/7] rtc: jz4740_rtc: Add support for acting as the system power controller
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
Cc: Paul Cercueil
In-Reply-To: <20161030230247.20538-1-paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
The 'system-power-controller' singleton entry can be used in the
devicetree node of the jz4740-rtc driver to specify that the driver is
granted the right to power off the system through the registers of the
RTC unit.
See the documentation for more details:
Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Acked-by: Maarten ter Huurne <maarten-Ph2Y2OKCxY1M656bX5wj8A@public.gmane.org>
---
drivers/rtc/rtc-jz4740.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 81 insertions(+)
v2:
- Get a handle to the 'rtc' clock in the probe function, to handle errors early
- Call clk_prepare_enable() on the 'rtc' clock before calling clk_get_rate()
- Use the -msec suffix for the OF properties that deal with time
- Use of_property_read_32() instead of device_property_read_u32()
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index 4213554..3f9d0da 100644
--- a/drivers/rtc/rtc-jz4740.c
+++ b/drivers/rtc/rtc-jz4740.c
@@ -14,11 +14,13 @@
*
*/
+#include <linux/clk.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
+#include <linux/reboot.h>
#include <linux/rtc.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
@@ -28,6 +30,8 @@
#define JZ_REG_RTC_SEC_ALARM 0x08
#define JZ_REG_RTC_REGULATOR 0x0C
#define JZ_REG_RTC_HIBERNATE 0x20
+#define JZ_REG_RTC_WAKEUP_FILTER 0x24
+#define JZ_REG_RTC_RESET_COUNTER 0x28
#define JZ_REG_RTC_SCRATCHPAD 0x34
/* The following are present on the jz4780 */
@@ -45,6 +49,9 @@
/* Magic value to enable writes on jz4780 */
#define JZ_RTC_WENR_MAGIC 0xA55A
+#define JZ_RTC_WAKEUP_FILTER_MASK 0x0000FFE0
+#define JZ_RTC_RESET_COUNTER_MASK 0x00000FE0
+
enum jz4740_rtc_type {
ID_JZ4740,
ID_JZ4780,
@@ -55,12 +62,18 @@ struct jz4740_rtc {
enum jz4740_rtc_type type;
struct rtc_device *rtc;
+ struct clk *clk;
int irq;
spinlock_t lock;
+
+ unsigned int min_wakeup_pin_assert_time;
+ unsigned int reset_pin_assert_time;
};
+static struct device *dev_for_power_off;
+
static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg)
{
return readl(rtc->base + reg);
@@ -246,6 +259,46 @@ void jz4740_rtc_poweroff(struct device *dev)
}
EXPORT_SYMBOL_GPL(jz4740_rtc_poweroff);
+static void jz4740_rtc_power_off(void)
+{
+ struct jz4740_rtc *rtc = dev_get_drvdata(dev_for_power_off);
+ unsigned long rtc_rate;
+ unsigned long wakeup_filter_ticks;
+ unsigned long reset_counter_ticks;
+
+ clk_prepare_enable(rtc->clk);
+
+ rtc_rate = clk_get_rate(rtc->clk);
+
+ /*
+ * Set minimum wakeup pin assertion time: 100 ms.
+ * Range is 0 to 2 sec if RTC is clocked at 32 kHz.
+ */
+ wakeup_filter_ticks =
+ (rtc->min_wakeup_pin_assert_time * rtc_rate) / 1000;
+ if (wakeup_filter_ticks < JZ_RTC_WAKEUP_FILTER_MASK)
+ wakeup_filter_ticks &= JZ_RTC_WAKEUP_FILTER_MASK;
+ else
+ wakeup_filter_ticks = JZ_RTC_WAKEUP_FILTER_MASK;
+ jz4740_rtc_reg_write(rtc,
+ JZ_REG_RTC_WAKEUP_FILTER, wakeup_filter_ticks);
+
+ /*
+ * Set reset pin low-level assertion time after wakeup: 60 ms.
+ * Range is 0 to 125 ms if RTC is clocked at 32 kHz.
+ */
+ reset_counter_ticks = (rtc->reset_pin_assert_time * rtc_rate) / 1000;
+ if (reset_counter_ticks < JZ_RTC_RESET_COUNTER_MASK)
+ reset_counter_ticks &= JZ_RTC_RESET_COUNTER_MASK;
+ else
+ reset_counter_ticks = JZ_RTC_RESET_COUNTER_MASK;
+ jz4740_rtc_reg_write(rtc,
+ JZ_REG_RTC_RESET_COUNTER, reset_counter_ticks);
+
+ jz4740_rtc_poweroff(dev_for_power_off);
+ machine_halt();
+}
+
static const struct of_device_id jz4740_rtc_of_match[] = {
{ .compatible = "ingenic,jz4740-rtc", .data = (void *) ID_JZ4740 },
{ .compatible = "ingenic,jz4780-rtc", .data = (void *) ID_JZ4780 },
@@ -262,6 +315,7 @@ static int jz4740_rtc_probe(struct platform_device *pdev)
const struct platform_device_id *id = platform_get_device_id(pdev);
const struct of_device_id *of_id = of_match_device(
jz4740_rtc_of_match, &pdev->dev);
+ struct device_node *np = pdev->dev.of_node;
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
if (!rtc)
@@ -283,6 +337,12 @@ static int jz4740_rtc_probe(struct platform_device *pdev)
if (IS_ERR(rtc->base))
return PTR_ERR(rtc->base);
+ rtc->clk = devm_clk_get(&pdev->dev, "rtc");
+ if (IS_ERR(rtc->clk)) {
+ dev_err(&pdev->dev, "Failed to get RTC clock\n");
+ return PTR_ERR(rtc->clk);
+ }
+
spin_lock_init(&rtc->lock);
platform_set_drvdata(pdev, rtc);
@@ -314,6 +374,27 @@ static int jz4740_rtc_probe(struct platform_device *pdev)
}
}
+ if (np && of_device_is_system_power_controller(np)) {
+ if (!pm_power_off) {
+ /* Default: 60ms */
+ rtc->reset_pin_assert_time = 60;
+ of_property_read_u32(np, "reset-pin-assert-time-msec",
+ &rtc->reset_pin_assert_time);
+
+ /* Default: 100ms */
+ rtc->min_wakeup_pin_assert_time = 100;
+ of_property_read_u32(np,
+ "min-wakeup-pin-assert-time-msec",
+ &rtc->min_wakeup_pin_assert_time);
+
+ dev_for_power_off = &pdev->dev;
+ pm_power_off = jz4740_rtc_power_off;
+ } else {
+ dev_warn(&pdev->dev,
+ "Poweroff handler already present!\n");
+ }
+ }
+
return 0;
}
--
2.9.3
--
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* [PATCH v2 3/7] rtc: rtc-jz4740: Add support for devicetree
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
Cc: Paul Cercueil
In-Reply-To: <20161030230247.20538-1-paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
See
Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
for a description of the bindings.
Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Acked-by: Maarten ter Huurne <maarten-Ph2Y2OKCxY1M656bX5wj8A@public.gmane.org>
---
drivers/rtc/rtc-jz4740.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
v2: No change
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index c616efe..4213554 100644
--- a/drivers/rtc/rtc-jz4740.c
+++ b/drivers/rtc/rtc-jz4740.c
@@ -17,6 +17,7 @@
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>
#include <linux/slab.h>
@@ -245,6 +246,13 @@ void jz4740_rtc_poweroff(struct device *dev)
}
EXPORT_SYMBOL_GPL(jz4740_rtc_poweroff);
+static const struct of_device_id jz4740_rtc_of_match[] = {
+ { .compatible = "ingenic,jz4740-rtc", .data = (void *) ID_JZ4740 },
+ { .compatible = "ingenic,jz4780-rtc", .data = (void *) ID_JZ4780 },
+ {},
+};
+MODULE_DEVICE_TABLE(of, jz4740_rtc_of_match);
+
static int jz4740_rtc_probe(struct platform_device *pdev)
{
int ret;
@@ -252,12 +260,17 @@ static int jz4740_rtc_probe(struct platform_device *pdev)
uint32_t scratchpad;
struct resource *mem;
const struct platform_device_id *id = platform_get_device_id(pdev);
+ const struct of_device_id *of_id = of_match_device(
+ jz4740_rtc_of_match, &pdev->dev);
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
if (!rtc)
return -ENOMEM;
- rtc->type = id->driver_data;
+ if (of_id)
+ rtc->type = (enum jz4740_rtc_type) of_id->data;
+ else
+ rtc->type = id->driver_data;
rtc->irq = platform_get_irq(pdev, 0);
if (rtc->irq < 0) {
@@ -345,6 +358,7 @@ static struct platform_driver jz4740_rtc_driver = {
.driver = {
.name = "jz4740-rtc",
.pm = JZ4740_RTC_PM_OPS,
+ .of_match_table = of_match_ptr(jz4740_rtc_of_match),
},
.id_table = jz4740_rtc_ids,
};
--
2.9.3
--
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* [PATCH v2 2/7] Documentation: dt: Add binding info for jz4740-rtc driver
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
Cc: Paul Cercueil
In-Reply-To: <20161030230247.20538-1-paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
This commit adds documentation for the device-tree bindings of the
jz4740-rtc driver, which supports the RTC unit present in the JZ4740 and
JZ4780 SoCs from Ingenic.
Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Acked-by: Maarten ter Huurne <maarten-Ph2Y2OKCxY1M656bX5wj8A@public.gmane.org>
---
.../devicetree/bindings/rtc/ingenic,jz4740-rtc.txt | 37 ++++++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
v2:
- Remove 'interrupt-parent' of the list of required properties
- Add the -msec suffix for the DT entries that represent time
diff --git a/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt b/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
new file mode 100644
index 0000000..df97594
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/ingenic,jz4740-rtc.txt
@@ -0,0 +1,37 @@
+JZ4740 and similar SoCs real-time clock driver
+
+Required properties:
+
+- compatible: One of:
+ - "ingenic,jz4740-rtc" - for use with the JZ4740 SoC
+ - "ingenic,jz4780-rtc" - for use with the JZ4780 SoC
+- reg: Address range of rtc register set
+- interrupts: IRQ number for the alarm interrupt
+- clocks: phandle to the "rtc" clock
+- clock-names: must be "rtc"
+
+Optional properties:
+- system-power-controller: To use this component as the
+ system power controller
+- reset-pin-assert-time-msec: Reset pin low-level assertion
+ time after wakeup (default 60ms; range 0-125ms if RTC clock
+ at 32 kHz)
+- min-wakeup-pin-assert-time-msec: Minimum wakeup pin assertion
+ time (default 100ms; range 0-2s if RTC clock at 32 kHz)
+
+Example:
+
+rtc@10003000 {
+ compatible = "ingenic,jz4740-rtc";
+ reg = <0x10003000 0x3F>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <32>;
+
+ clocks = <&rtc_clock>;
+ clock-names = "rtc";
+
+ system-power-controller;
+ reset-pin-assert-time-msec = <60>;
+ min-wakeup-pin-assert-time-msec = <100>;
+};
--
2.9.3
--
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* [PATCH v2 1/7] rtc: rtc-jz4740: Add support for the RTC in the jz4780 SoC
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
Cc: Paul Cercueil
In-Reply-To: <20161030230247.20538-1-paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
The RTC unit present in the JZ4780 works mostly the same as the one in
the JZ4740. The major difference is that register writes need to be
explicitly enabled, by writing a magic code (0xA55A) to a "write
enable" register before each access.
Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
Acked-by: Maarten ter Huurne <maarten-Ph2Y2OKCxY1M656bX5wj8A@public.gmane.org>
---
drivers/rtc/Kconfig | 6 +++---
drivers/rtc/rtc-jz4740.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++--
2 files changed, 51 insertions(+), 5 deletions(-)
v2: No change
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4cbea34..1d0ae30 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1550,10 +1550,10 @@ config RTC_DRV_MPC5121
config RTC_DRV_JZ4740
tristate "Ingenic JZ4740 SoC"
- depends on MACH_JZ4740 || COMPILE_TEST
+ depends on MACH_INGENIC || COMPILE_TEST
help
- If you say yes here you get support for the Ingenic JZ4740 SoC RTC
- controller.
+ If you say yes here you get support for the Ingenic JZ47xx SoCs RTC
+ controllers.
This driver can also be buillt as a module. If so, the module
will be called rtc-jz4740.
diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
index 5e14651..c616efe 100644
--- a/drivers/rtc/rtc-jz4740.c
+++ b/drivers/rtc/rtc-jz4740.c
@@ -29,6 +29,10 @@
#define JZ_REG_RTC_HIBERNATE 0x20
#define JZ_REG_RTC_SCRATCHPAD 0x34
+/* The following are present on the jz4780 */
+#define JZ_REG_RTC_WENR 0x3C
+#define JZ_RTC_WENR_WEN BIT(31)
+
#define JZ_RTC_CTRL_WRDY BIT(7)
#define JZ_RTC_CTRL_1HZ BIT(6)
#define JZ_RTC_CTRL_1HZ_IRQ BIT(5)
@@ -37,8 +41,17 @@
#define JZ_RTC_CTRL_AE BIT(2)
#define JZ_RTC_CTRL_ENABLE BIT(0)
+/* Magic value to enable writes on jz4780 */
+#define JZ_RTC_WENR_MAGIC 0xA55A
+
+enum jz4740_rtc_type {
+ ID_JZ4740,
+ ID_JZ4780,
+};
+
struct jz4740_rtc {
void __iomem *base;
+ enum jz4740_rtc_type type;
struct rtc_device *rtc;
@@ -64,11 +77,33 @@ static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc)
return timeout ? 0 : -EIO;
}
+static inline int jz4780_rtc_enable_write(struct jz4740_rtc *rtc)
+{
+ uint32_t ctrl;
+ int ret, timeout = 1000;
+
+ ret = jz4740_rtc_wait_write_ready(rtc);
+ if (ret != 0)
+ return ret;
+
+ writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR);
+
+ do {
+ ctrl = readl(rtc->base + JZ_REG_RTC_WENR);
+ } while (!(ctrl & JZ_RTC_WENR_WEN) && --timeout);
+
+ return timeout ? 0 : -EIO;
+}
+
static inline int jz4740_rtc_reg_write(struct jz4740_rtc *rtc, size_t reg,
uint32_t val)
{
- int ret;
- ret = jz4740_rtc_wait_write_ready(rtc);
+ int ret = 0;
+
+ if (rtc->type >= ID_JZ4780)
+ ret = jz4780_rtc_enable_write(rtc);
+ if (ret == 0)
+ ret = jz4740_rtc_wait_write_ready(rtc);
if (ret == 0)
writel(val, rtc->base + reg);
@@ -216,11 +251,14 @@ static int jz4740_rtc_probe(struct platform_device *pdev)
struct jz4740_rtc *rtc;
uint32_t scratchpad;
struct resource *mem;
+ const struct platform_device_id *id = platform_get_device_id(pdev);
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
if (!rtc)
return -ENOMEM;
+ rtc->type = id->driver_data;
+
rtc->irq = platform_get_irq(pdev, 0);
if (rtc->irq < 0) {
dev_err(&pdev->dev, "Failed to get platform irq\n");
@@ -295,12 +333,20 @@ static const struct dev_pm_ops jz4740_pm_ops = {
#define JZ4740_RTC_PM_OPS NULL
#endif /* CONFIG_PM */
+static const struct platform_device_id jz4740_rtc_ids[] = {
+ { "jz4740-rtc", ID_JZ4740 },
+ { "jz4780-rtc", ID_JZ4780 },
+ {}
+};
+MODULE_DEVICE_TABLE(platform, jz4740_rtc_ids);
+
static struct platform_driver jz4740_rtc_driver = {
.probe = jz4740_rtc_probe,
.driver = {
.name = "jz4740-rtc",
.pm = JZ4740_RTC_PM_OPS,
},
+ .id_table = jz4740_rtc_ids,
};
module_platform_driver(jz4740_rtc_driver);
--
2.9.3
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^ permalink raw reply related
* [PATCH v2 0/7] DT bindings for the jz4740-rtc driver
From: Paul Cercueil @ 2016-10-30 23:02 UTC (permalink / raw)
To: rtc-linux-/JYPxA39Uh5TLH3MbocFFw, Alessandro Zummo,
Alexandre Belloni, Rob Herring, Mark Rutland, Ralf Baechle,
Maarten ter Huurne, Lars-Peter Clausen,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA
This patch set is a v2 of a patchset I sent in March.
The previous patch 5/5 was garbage and has been dropped.
It was garbage, for two reasons:
- It enforced the jz4740-rtc as the system power controller in the
SoC devicetree file, which introduced policy (maybe the jz4740-based
boards want to use something else as the system power controller)
- It added the 'system-power-controller' entry not to the jz4740-rtc driver
node, but to the 'rtc' clock node... I don't know how that slipped in, but
I apologise for that. I need to raise my QA standards.
For the rest:
1/7: No change
2/7:
- Remove 'interrupt-parent' of the list of required properties
- Add the -msec suffix for the DT entries that represent time
3/7: No change
4/7:
- Get a handle to the 'rtc' clock in the probe function, to handle errors early
- Call clk_prepare_enable() on the 'rtc' clock before calling clk_get_rate()
- Use the -msec suffix for the OF properties that deal with time
- Use of_property_read_32() instead of device_property_read_u32()
5/7, 6/7, 7/7: New patches
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^ permalink raw reply
* Re: [PATCH v4 2/2] fpga: Add support for Lattice iCE40 FPGAs
From: Joel Holdsworth @ 2016-10-30 21:34 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx,
moritz.fischer-+aYTwkv1SeIAvxtiuMwx3w,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-spi
In-Reply-To: <CAMuHMdWJYrUp2Bqh6PW7KCEv16HYpvKXG9dAQBjfw+pMxDQd_A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
>
> Plural, please, like in the previous version, cfr.
>
Hmm ok - it used to be plural, but I received advice to make it
singular. I'll change it back.
Joel
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^ permalink raw reply
* 图呼其乡
From: 反弹乏力 @ 2016-10-30 21:15 UTC (permalink / raw)
To: devicetree-u79uwXL29TY76Z2rM5mHXA
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 305 bytes --]
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^ permalink raw reply
* Re: [PATCH v3 2/8] iio: inkern: add helpers to query available values from channels
From: Peter Rosin @ 2016-10-30 21:12 UTC (permalink / raw)
To: Peter Meerwald-Stadler, Jonathan Cameron
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, Hartmut Knaack,
Lars-Peter Clausen, Rob Herring, Mark Rutland,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <alpine.DEB.2.02.1610301611070.32031-jW+XmwGofnusTnJN9+BGXg@public.gmane.org>
On 2016-10-30 16:23, Peter Meerwald-Stadler wrote:
>
>> On 23/10/16 23:39, Peter Rosin wrote:
>>> Specifically a helper for reading the available maximum raw value of a
>>> channel and a helper for forwarding read_avail requests for raw values
>>> from one iio driver to an iio channel that is consumed.
>>>
>>> These rather specific helpers are in turn built with generic helpers
>>> making it easy to build more helpers for available values as needed.
>>>
>>> Signed-off-by: Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
>> Looks good to me. Just what I was after.
>
> some comments below
>
>> Jonathan
>>> ---
>>> drivers/iio/inkern.c | 97 ++++++++++++++++++++++++++++++++++++++++++++
>>> include/linux/iio/consumer.h | 29 +++++++++++++
>>> include/linux/iio/iio.h | 17 ++++++++
>>> 3 files changed, 143 insertions(+)
>>>
>>> diff --git a/drivers/iio/inkern.c b/drivers/iio/inkern.c
>>> index c4757e6367e7..74808f8a187a 100644
>>> --- a/drivers/iio/inkern.c
>>> +++ b/drivers/iio/inkern.c
>>> @@ -703,6 +703,103 @@ int iio_read_channel_scale(struct iio_channel *chan, int *val, int *val2)
>>> }
>>> EXPORT_SYMBOL_GPL(iio_read_channel_scale);
>>>
>>> +static int iio_channel_read_avail(struct iio_channel *chan,
>>> + const int **vals, int *type, int *length,
>>> + enum iio_chan_info_enum info)
>>> +{
>>> + if (!iio_channel_has_available(chan->channel, info))
>>> + return -EINVAL;
>>> +
>>> + return chan->indio_dev->info->read_avail(chan->indio_dev, chan->channel,
>>> + vals, type, length, info);
>>> +}
>>> +
>>> +int iio_read_avail_channel_raw(struct iio_channel *chan,
>>> + const int **vals, int *type, int *length)
>>> +{
>>> + int ret;
>>> +
>>> + mutex_lock(&chan->indio_dev->info_exist_lock);
>>> + if (!chan->indio_dev->info) {
>>> + ret = -ENODEV;
>>> + goto err_unlock;
>>> + }
>>> +
>>> + ret = iio_channel_read_avail(chan,
>>> + vals, type, length, IIO_CHAN_INFO_RAW);
>>> +err_unlock:
>>> + mutex_unlock(&chan->indio_dev->info_exist_lock);
>>> +
>>> + return ret;
>>> +}
>>> +EXPORT_SYMBOL_GPL(iio_read_avail_channel_raw);
>>> +
>>> +static int iio_channel_read_max(struct iio_channel *chan,
>>> + int *val, int *val2, int *type,
>>> + enum iio_chan_info_enum info)
>>> +{
>>> + int unused;
>>> + const int *vals;
>>> + int length;
>>> + int ret;
>>> +
>>> + if (!val2)
>>> + val2 = &unused;
>>> +
>>> + ret = iio_channel_read_avail(chan, &vals, type, &length, info);
>>> + switch (ret) {
>>> + case IIO_AVAIL_RANGE:
>>> + switch (*type) {
>>> + case IIO_VAL_INT:
>>> + *val = vals[2];
>>> + break;
>>> + default:
>>> + *val = vals[4];
>>> + *val2 = vals[5];
>>> + }
>>> + return 0;
>>> +
>>> + case IIO_AVAIL_LIST:
>>> + if (length <= 0)
>>> + return -EINVAL;
>>> + switch (*type) {
>>> + case IIO_VAL_INT:
>>> + *val = vals[--length];
>>> + while (length) {
>>> + if (vals[--length] > *val)
>>> + *val = vals[length];
>>> + }
>>> + break;
>>> + default:
>>> + /* FIXME: learn about max for other iio values */
>>> + return -EINVAL;
>>> + }
>>> + return 0;
>>> +
>>> + default:
>>> + return ret;
>>> + }
>>> +}
>>> +
>>> +int iio_read_max_channel_raw(struct iio_channel *chan, int *val)
>>> +{
>>> + int ret;
>>> + int type;
>>> +
>>> + mutex_lock(&chan->indio_dev->info_exist_lock);
>>> + if (!chan->indio_dev->info) {
>>> + ret = -ENODEV;
>>> + goto err_unlock;
>>> + }
>>> +
>>> + ret = iio_channel_read_max(chan, val, NULL, &type, IIO_CHAN_INFO_RAW);
>>> +err_unlock:
>>> + mutex_unlock(&chan->indio_dev->info_exist_lock);
>>> +
>>> + return ret;
>>> +}
>>> +EXPORT_SYMBOL_GPL(iio_read_max_channel_raw);
>>> +
>>> int iio_get_channel_type(struct iio_channel *chan, enum iio_chan_type *type)
>>> {
>>> int ret = 0;
>>> diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h
>>> index 9edccfba1ffb..baab5e45734f 100644
>>> --- a/include/linux/iio/consumer.h
>>> +++ b/include/linux/iio/consumer.h
>>> @@ -226,6 +226,35 @@ int iio_read_channel_processed(struct iio_channel *chan, int *val);
>>> int iio_write_channel_raw(struct iio_channel *chan, int val);
>>>
>>> /**
>>> + * iio_read_max_channel_raw() - read maximum available raw value from a given
>>> + * channel
>>> + * @chan: The channel being queried.
>>> + * @val: Value read back.
>>> + *
>>> + * Note raw reads from iio channels are in adc counts and hence
>
> "Note: raw reads..." would be easier...
> here and below
All other function comments lack the colon after that Note, so I was just
following that lead. I suggest that this can be fixed up later with one
patch for all comments, if needed?
> why is there no val2 here?
Everything else in inkern.c that handles the raw channel assumes it
is of type IIO_VAL_INT. Again, just following the lead.
> just reading the documentation ("maximum available raw value") I am not
> sure what the function does: does it return the maximum value possible? or
> the maximum value in some internal buffer? maximum value ever seen?
Maximum possible, that's what the available attribute is all
about; possible values. How about:
* iio_read_max_channel_raw() - read maximum available raw value from a given
* channel, i.e. the maximum possible value.
>>> + * scale will need to be applied if standard units are required.
>>> + */
>>> +int iio_read_max_channel_raw(struct iio_channel *chan, int *val);
>>> +
>>> +/**
>>> + * iio_read_avail_channel_raw() - read available raw values from a given channel
>>> + * @chan: The channel being queried.
>>> + * @vals: Available values read back.
>
> no vals2?
Same raw channel assumption about IIO_VAL_INT.
>>> + * @type: Type of available values in vals.
>
> it is not clear what type is
Same as in the iio_channel_has_info function right above which has
the same kind of explanation. Again, just following the lead.
>>> + * @length: Number of entries in vals.
>>> + *
>>> + * Returns an error code, IIO_AVAIL_RANGE or IIO_AVAIL_LIST.
>>> + *
>>> + * For ranges, three vals are always returned; min, step and max.
>>> + * For lists, all the possible values are enumerated.
>>> + *
>>> + * Note raw available values from iio channels are in adc counts and
>>> + * hence scale will need to be applied if standard units are required.
>>> + */
>>> +int iio_read_avail_channel_raw(struct iio_channel *chan,
>>> + const int **vals, int *type, int *length);
>>> +
>>> +/**
>>> * iio_get_channel_type() - get the type of a channel
>>> * @channel: The channel being queried.
>>> * @type: The type of the channel.
>>> diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
>>> index 45b781084a4b..e565701d13ce 100644
>>> --- a/include/linux/iio/iio.h
>>> +++ b/include/linux/iio/iio.h
>>> @@ -315,6 +315,23 @@ static inline bool iio_channel_has_info(const struct iio_chan_spec *chan,
>>> (chan->info_mask_shared_by_all & BIT(type));
>>> }
>>>
>>> +/**
>>> + * iio_channel_has_available() - Checks if a channel has an available attribute
>>> + * @chan: The channel to be queried
>>> + * @type: Type of the available attribute to be checked
>>> + *
>>> + * Returns true if the channels supports reporting available values for the
>
> channel
I'll fix that.
Sigh, I guess there's enough small changes that I'll need to do a v4.
I'll hold off on that for a couple of days though since there is
nothing badly wrong...
Cheers,
Peter
>>> + * given attribute type, false otherwise.
>>> + */
>>> +static inline bool iio_channel_has_available(const struct iio_chan_spec *chan,
>>> + enum iio_chan_info_enum type)
>>> +{
>>> + return (chan->info_mask_separate_available & BIT(type)) |
>>> + (chan->info_mask_shared_by_type_available & BIT(type)) |
>>> + (chan->info_mask_shared_by_dir_available & BIT(type)) |
>>> + (chan->info_mask_shared_by_all_available & BIT(type));
>>> +}
>>> +
>>> #define IIO_CHAN_SOFT_TIMESTAMP(_si) { \
>>> .type = IIO_TIMESTAMP, \
>>> .channel = -1, \
>>>
>>
>
^ permalink raw reply
* Re: [PATCH v7 REPOST 8/9] arm: add sysfs cpu_capacity attribute
From: Russell King - ARM Linux @ 2016-10-30 20:45 UTC (permalink / raw)
To: Juri Lelli
Cc: linux-kernel, linux-pm, linux-arm-kernel, devicetree, peterz,
vincent.guittot, robh+dt, mark.rutland, sudeep.holla,
lorenzo.pieralisi, catalin.marinas, will.deacon, morten.rasmussen,
dietmar.eggemann, broonie
In-Reply-To: <20161017154650.18779-9-juri.lelli@arm.com>
On Mon, Oct 17, 2016 at 04:46:49PM +0100, Juri Lelli wrote:
> +#ifdef CONFIG_PROC_SYSCTL
> +#include <asm/cpu.h>
> +#include <linux/string.h>
Include files at the top of the file please. No need to ifdef them.
They're sorted alphabetically, so new additions should be alphabetical.
(That's a general rule - if something is already alphabetical, do not
make it non-alphabetical.)
> +static ssize_t show_cpu_capacity(struct device *dev,
> + struct device_attribute *attr,
> + char *buf)
> +{
> + struct cpu *cpu = container_of(dev, struct cpu, dev);
> + ssize_t rc;
> + int cpunum = cpu->dev.id;
> + unsigned long capacity = arch_scale_cpu_capacity(NULL, cpunum);
> +
> + rc = sprintf(buf, "%lu\n", capacity);
> +
> + return rc;
Way too many lines for such a simple function. This can be simplified
to just:
struct cpu *cpu = container_of(dev, struct cpu, dev);
return sprintf(buf, "%lu\n", arch_scale_cpu_capacity(NULL, cpu->dev.id);
If you don't like the last line ending on column 79, then feel free to
break it across two lines after the format string.
> +}
> +
> +static ssize_t store_cpu_capacity(struct device *dev,
> + struct device_attribute *attr,
> + const char *buf,
> + size_t count)
> +{
> + struct cpu *cpu = container_of(dev, struct cpu, dev);
> + int this_cpu = cpu->dev.id, i;
> + unsigned long new_capacity;
> + ssize_t ret;
> +
> + if (count) {
> + char *p = (char *) buf;
> +
> + ret = kstrtoul(p, 0, &new_capacity);
Unnecessary cast - kstrtoul takes a const char pointer, and in any case
it's really bad form to cast away the "const-ness" of any pointer. So,
just:
if (count) {
ret = kstrtoul(buf, 0, &new_capacity);
should work just fine.
> + if (ret)
> + return ret;
> + if (new_capacity > SCHED_CAPACITY_SCALE)
> + return -EINVAL;
> +
> + mutex_lock(&cpu_scale_mutex);
> + for_each_cpu(i, &cpu_topology[this_cpu].core_sibling)
> + set_capacity_scale(i, new_capacity);
> + mutex_unlock(&cpu_scale_mutex);
> + }
> +
> + return count;
> +}
> +
> +static DEVICE_ATTR(cpu_capacity,
> + 0644,
> + show_cpu_capacity,
> + store_cpu_capacity);
There's a move to use the named DEVICE_ATTR_RW() for this kind of thing,
it'll want the functions named xxx_show() and xxx_store(). I see
there's some recent patches to do this conversion across the kernel, so
this should probably be done before submission.
> +
> +static int register_cpu_capacity_sysctl(void)
> +{
> + int i;
> + struct device *cpu;
> +
> + for_each_possible_cpu(i) {
> + cpu = get_cpu_device(i);
> + if (!cpu) {
> + pr_err("%s: too early to get CPU%d device!\n",
> + __func__, i);
> + continue;
> + }
> + device_create_file(cpu, &dev_attr_cpu_capacity);
> + }
> +
> + return 0;
> +}
> +late_initcall(register_cpu_capacity_sysctl);
Hmm, this is really weird. topology_init() in arch/arm/kernel/setup.c
is where these devices get created, and they're created at
subsys_initcall() time. By that point, the list of possible CPUs has
to be static, it's not going to change. I don't see why this has to be
done at late_initcall() - and since topology.c will be linked after
setup.c, I don't see why it shouldn't be at subsys_initcall() level to
follow on after topology_init().
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
^ permalink raw reply
* Re: [PATCH/RFT v2 09/17] regulator: fixed: Add over current event
From: Rob Herring @ 2016-10-30 20:42 UTC (permalink / raw)
To: ahaslam
Cc: gregkh, johan, nsekhar, stern, khilman, sshtylyov, david,
manjunath.goudar, broonie, abailon, linux-usb, devicetree,
linux-kernel, linux-arm-kernel
In-Reply-To: <20161024164634.4330-10-ahaslam@baylibre.com>
On Mon, Oct 24, 2016 at 06:46:26PM +0200, ahaslam@baylibre.com wrote:
> From: Axel Haslam <ahaslam@baylibre.com>
>
> Some regulator supplies have an over-current pin that is
> activated when the hw detects an over current condition.
> When this happens, the hardware enters a current limited
> mode.
>
> Extend the fixed regulator driver with the ability
> to handle irq's from the over-current pin and report
> an over current event to the consumers via a regulator
> notifier. Also, add device tree bindings to allow to
> pass a gpio for over current monitoring.
>
> Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
> ---
> .../bindings/regulator/fixed-regulator.txt | 4 ++
> drivers/regulator/fixed.c | 64 ++++++++++++++++++++++
> include/linux/regulator/consumer.h | 5 ++
> include/linux/regulator/fixed.h | 3 +
> 4 files changed, 76 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.txt b/Documentation/devicetree/bindings/regulator/fixed-regulator.txt
> index 4fae41d..d20bf67 100644
> --- a/Documentation/devicetree/bindings/regulator/fixed-regulator.txt
> +++ b/Documentation/devicetree/bindings/regulator/fixed-regulator.txt
> @@ -11,6 +11,8 @@ If this property is missing, the default assumed is Active low.
> - gpio-open-drain: GPIO is open drain type.
> If this property is missing then default assumption is false.
> -vin-supply: Input supply name.
> +- oc-gpio: Input gpio that signals an over current condition
"-gpios" is the preferred form. So "oc-gpios".
> +- oc-active-high: The polarity of the over current pin is high
This should be specified in the gpio flags cell.
Rob
^ permalink raw reply
* Re: [PATCH] dmaengine: nbpfaxi: add optional max-burst property for memory reads/writes
From: Rob Herring @ 2016-10-30 20:41 UTC (permalink / raw)
To: Niklas Cassel
Cc: vinod.koul-ral2JQCrhuEAvxtiuMwx3w, mark.rutland-5wv7dgnIgG8,
dan.j.williams-ral2JQCrhuEAvxtiuMwx3w,
dmaengine-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Niklas Cassel
In-Reply-To: <1477315755-4783-1-git-send-email-niklass-VrBV9hrLPhE@public.gmane.org>
On Mon, Oct 24, 2016 at 03:29:15PM +0200, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel-VrBV9hrLPhE@public.gmane.org>
>
> Due to a hardware bug, reading memory (from the Accelerator Coherency Port)
> with a burst size equal to the maximum burst size allowed by the DMA
> hardware's buffer size will cause a hardware hang on the ARTPEC-6 SoC,
> where the only solution is a manual power cycle.
> On ARTPEC-6, this hardware bug does not trigger when writing memory (to the
> Accelerator Coherency Port) with a burst size equal to the maximum burst
> size allowed by the DMA hardware's buffer size.
>
> To avoid this hardware hang, introduce a new optional max-burst property
> for memory reads. For completeness, also introduce a max-burst property for
> memory writes.
>
> Signed-off-by: Niklas Cassel <niklas.cassel-VrBV9hrLPhE@public.gmane.org>
> ---
> Documentation/devicetree/bindings/dma/nbpfaxi.txt | 8 +++++
> drivers/dma/nbpfaxi.c | 38 ++++++++++++++++++++---
> 2 files changed, 42 insertions(+), 4 deletions(-)
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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^ permalink raw reply
* Re: [PATCH v3 7/8] dt-bindings: iio: document envelope-detector bindings
From: Rob Herring @ 2016-10-30 20:41 UTC (permalink / raw)
To: Peter Rosin
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Mark Rutland, linux-iio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1477262381-7800-8-git-send-email-peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
On Mon, Oct 24, 2016 at 12:39:40AM +0200, Peter Rosin wrote:
> Signed-off-by: Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
> ---
> .../bindings/iio/adc/envelope-detector.txt | 54 ++++++++++++++++++++++
> MAINTAINERS | 6 +++
> 2 files changed, 60 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/envelope-detector.txt
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
^ permalink raw reply
* Re: [PATCH v3 5/8] dt-bindings: iio: document dpot-dac bindings
From: Rob Herring @ 2016-10-30 20:41 UTC (permalink / raw)
To: Peter Rosin
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Mark Rutland, linux-iio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1477262381-7800-6-git-send-email-peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
On Mon, Oct 24, 2016 at 12:39:38AM +0200, Peter Rosin wrote:
> Signed-off-by: Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
> ---
> .../devicetree/bindings/iio/dac/dpot-dac.txt | 41 ++++++++++++++++++++++
> MAINTAINERS | 6 ++++
> 2 files changed, 47 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/dac/dpot-dac.txt
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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^ permalink raw reply
* Re: [PATCH v3 4/8] dt-bindings: add axentia to vendor-prefixes
From: Rob Herring @ 2016-10-30 20:41 UTC (permalink / raw)
To: Peter Rosin
Cc: linux-kernel, Jonathan Cameron, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, Mark Rutland,
linux-iio, devicetree
In-Reply-To: <1477262381-7800-5-git-send-email-peda@axentia.se>
On Mon, Oct 24, 2016 at 12:39:37AM +0200, Peter Rosin wrote:
> Signed-off-by: Peter Rosin <peda@axentia.se>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v4] media: et8ek8: add device tree binding documentation
From: Rob Herring @ 2016-10-30 20:41 UTC (permalink / raw)
To: Pavel Machek
Cc: ivo.g.dimitrov.75, sakari.ailus, sre, pali.rohar, linux-media,
pawel.moll, mark.rutland, ijc+devicetree, galak, mchehab,
devicetree, linux-kernel
In-Reply-To: <20161023191706.GA25754@amd>
On Sun, Oct 23, 2016 at 09:17:06PM +0200, Pavel Machek wrote:
>
> Add device tree binding documentation for toshiba et8ek8 sensor.
>
> Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
> Signed-off-by: Pavel Machek <pavel@ucw.cz>
>
> ---
>
> diff from v3: explain what clock-frequency means
>
>
> diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt
> new file mode 100644
> index 0000000..54863cf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt
> @@ -0,0 +1,51 @@
> +Toshiba et8ek8 5MP sensor
> +
> +Toshiba et8ek8 5MP sensor is an image sensor found in Nokia N900 device
> +
> +More detailed documentation can be found in
> +Documentation/devicetree/bindings/media/video-interfaces.txt .
> +
> +
> +Mandatory properties
> +--------------------
> +
> +- compatible: "toshiba,et8ek8"
> +- reg: I2C address (0x3e, or an alternative address)
> +- vana-supply: Analogue voltage supply (VANA), 2.8 volts
> +- clocks: External clock to the sensor
> +- clock-frequency: Frequency of the external clock to the sensor. Camera
> + driver will set this frequency on the external clock.
This is fine if the frequency is fixed (e.g. an oscillator), but you
should use the clock binding if clocks are programable.
> +- reset-gpios: XSHUTDOWN GPIO
Please state what the active polarity is.
> +
> +
> +Endpoint node mandatory properties
> +----------------------------------
> +
> +- remote-endpoint: A phandle to the bus receiver's endpoint node.
> +
> +Endpoint node optional properties
> +----------------------------------
> +
> +- clock-lanes: <0>
> +- data-lanes: <1..n>
> +
> +Example
> +-------
> +
> +&i2c3 {
> + clock-frequency = <400000>;
> +
> + cam1: camera@3e {
> + compatible = "toshiba,et8ek8";
> + reg = <0x3e>;
> + vana-supply = <&vaux4>;
> + clocks = <&isp 0>;
> + clock-frequency = <9600000>;
> + reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
> + port {
> + csi_cam1: endpoint {
> + remote-endpoint = <&csi_out1>;
> + };
> + };
> + };
> +};
>
> --
> (english) http://www.livejournal.com/~pavelmachek
> (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
^ permalink raw reply
* Re: [PATCH v2 3/3] clocksource: Add clockevent support to NPS400 driver
From: Rob Herring @ 2016-10-30 20:41 UTC (permalink / raw)
To: Noam Camus; +Cc: mark.rutland, daniel.lezcano, tglx, devicetree, linux-kernel
In-Reply-To: <1477224748-25223-4-git-send-email-noamca@mellanox.com>
On Sun, Oct 23, 2016 at 03:12:28PM +0300, Noam Camus wrote:
> From: Noam Camus <noamca@mellanox.com>
>
> Till now we used clockevent from generic ARC driver.
> This was enough as long as we worked with simple multicore SoC.
> When we are working with multithread SoC each HW thread can be
> scheduled to receive timer interrupt using timer mask register.
> This patch will provide a way to control clock events per HW thread.
>
> The design idea is that for each core there is dedicated regirtser
> (TSI) serving all 16 HW threads.
> The register is a bitmask with one bit for each HW thread.
> When HW thread wants that next expiration of timer interrupt will
> hit it then the proper bit should be set in this dedicated register.
> When timer expires all HW threads within this core which their bit
> is set at the TSI register will be interrupted.
>
> Driver can be used from device tree by:
> compatible = "ezchip,nps400-timer0" <-- for clocksource
> compatible = "ezchip,nps400-timer1" <-- for clockevent
>
> Note that name convention for timer0/timer1 was taken from legacy
> ARC design. This design is our base before adding HW threads.
>
> Signed-off-by: Noam Camus <noamca@mellanox.com>
>
> Change-Id: Ib351e6fc7a6b691293040ae655f202f3cc2c1298
> ---
> .../bindings/timer/ezchip,nps400-timer.txt | 15 --
> .../bindings/timer/ezchip,nps400-timer0.txt | 17 ++
> .../bindings/timer/ezchip,nps400-timer1.txt | 15 ++
For the binding,
Acked-by: Rob Herring <robh@kernel.org>
However, one issue below...
> drivers/clocksource/timer-nps.c | 220 +++++++++++++++++++-
> include/linux/cpuhotplug.h | 1 +
> 5 files changed, 248 insertions(+), 20 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer.txt
> create mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt
> create mode 100644 Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt
> diff --git a/drivers/clocksource/timer-nps.c b/drivers/clocksource/timer-nps.c
> index 6156e54..0757328 100644
> --- a/drivers/clocksource/timer-nps.c
> +++ b/drivers/clocksource/timer-nps.c
> @@ -46,7 +46,7 @@
> /* This array is per cluster of CPUs (Each NPS400 cluster got 256 CPUs) */
> static void *nps_msu_reg_low_addr[NPS_CLUSTER_NUM] __read_mostly;
>
> -static unsigned long nps_timer_rate;
> +static unsigned long nps_timer1_freq;
> static int nps_get_timer_clk(struct device_node *node,
> unsigned long *timer_freq,
> struct clk *clk)
> @@ -87,10 +87,10 @@ static int __init nps_setup_clocksource(struct device_node *node)
> nps_host_reg((cluster << NPS_CLUSTER_OFFSET),
> NPS_MSU_BLKID, NPS_MSU_TICK_LOW);
>
> - nps_get_timer_clk(node, &nps_timer_rate, clk);
> + nps_get_timer_clk(node, &nps_timer1_freq, clk);
>
> - ret = clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick",
> - nps_timer_rate, 301, 32, nps_clksrc_read);
> + ret = clocksource_mmio_init(nps_msu_reg_low_addr, "nps-tick",
> + nps_timer1_freq, 301, 32, nps_clksrc_read);
> if (ret) {
> pr_err("Couldn't register clock source.\n");
> clk_disable_unprepare(clk);
> @@ -99,5 +99,215 @@ static int __init nps_setup_clocksource(struct device_node *node)
> return ret;
> }
>
> -CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer",
> +CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer1",
> nps_setup_clocksource);
You should keep the old string here for backwards compatiblity.
Rob
^ permalink raw reply
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