* [PATCH 1/2] Add Documentation for Media Device, Video Device, and Synopsys DW MIPI CSI-2 Host
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
To: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
linux-media
Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil,
laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA,
Ramiro.Oliveira
In-Reply-To: <cover.1479132355.git.roliveir@synopsys.com>
Add documentation for Media and Video Device, as well as the DW MIPI CSI-2
Host.
Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
.../devicetree/bindings/media/snps,dw-mipi-csi.txt | 27 ++++++++++++++++++++++
.../devicetree/bindings/media/snps,plat-ipk.txt | 9 ++++++++
.../bindings/media/snps,video-device.txt | 12 ++++++++++
3 files changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
create mode 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt
create mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
diff --git a/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
new file mode 100644
index 0000000..bec7441
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
@@ -0,0 +1,27 @@
+Synopsys DesignWare CSI-2 Host controller
+
+Description
+-----------
+
+This HW block is used to receive image coming from an MIPI CSI-2 compatible
+camera.
+
+Required properties:
+- compatible: shall be "snps,dw-mipi-csi"
+- reg : physical base address and size of the device memory mapped
+ registers;
+- interrupts : CSI-2 Host interrupt
+- data-lanes : Number of lanes to be used
+- output-type : Core output to be used (IPI-> 0 or IDI->1 or BOTH->2)
+- phys, phy-names: List of one PHY specifier and identifier string (as defined
+ in Documentation/devicetree/bindings/phy/phy-bindings.txt).
+
+Optional properties(if in IPI mode):
+- ipi-mode : Mode to be used when in IPI(Camera -> 0 or Automatic -> 1)
+- ipi-color-mode: Color depth to be used in IPI (48 bits -> 0 or 16 bits -> 1)
+- ipi-auto-flush: Data auto-flush (1 -> Yes or 0 -> No)
+- virtual-channel: Virtual channel where data is present when in IPI
+
+The per-board settings:
+ - port sub-node describing a single endpoint connected to the dw-mipi-csi
+ as described in video-interfaces.txt[1].
diff --git a/Documentation/devicetree/bindings/media/snps,plat-ipk.txt b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
new file mode 100644
index 0000000..2d51541
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
@@ -0,0 +1,9 @@
+Synopsys DesignWare CSI-2 Host IPK Media Device
+
+This Media Device at the moment is not totally functional, however it is a base
+for the future.
+
+Required properties:
+
+- compatible: Must be "snps,plat-ipk".
+
diff --git a/Documentation/devicetree/bindings/media/snps,video-device.txt b/Documentation/devicetree/bindings/media/snps,video-device.txt
new file mode 100644
index 0000000..d467092
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,video-device.txt
@@ -0,0 +1,12 @@
+Synopsys DesignWare CSI-2 Host video device
+
+This driver handles all the video handling part of this platform.
+
+Required properties:
+
+- compatible: Must be "snps,video-device".
+
+- dmas, dma-names: List of one DMA specifier and identifier string (as defined
+ in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
+ requires a DMA channel with the identifier string set to "port" followed by
+ the port index.
--
2.10.2
^ permalink raw reply related
* [PATCH 2/2] Add basic support for DW CSI-2 Host IPK
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
To: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
linux-media
Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil,
laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA,
Ramiro.Oliveira
In-Reply-To: <cover.1479132355.git.roliveir@synopsys.com>
Add support for basic configuration of the DW CSI-2 Host IPK
Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
MAINTAINERS | 7 +
drivers/media/platform/Kconfig | 1 +
drivers/media/platform/Makefile | 2 +
drivers/media/platform/dwc/Kconfig | 36 ++
drivers/media/platform/dwc/Makefile | 3 +
drivers/media/platform/dwc/dw_mipi_csi.c | 687 +++++++++++++++++++++++
drivers/media/platform/dwc/dw_mipi_csi.h | 179 ++++++
drivers/media/platform/dwc/plat_ipk.c | 835 ++++++++++++++++++++++++++++
drivers/media/platform/dwc/plat_ipk.h | 97 ++++
drivers/media/platform/dwc/plat_ipk_video.h | 97 ++++
drivers/media/platform/dwc/video_device.c | 741 ++++++++++++++++++++++++
drivers/media/platform/dwc/video_device.h | 101 ++++
12 files changed, 2786 insertions(+)
create mode 100644 drivers/media/platform/dwc/Kconfig
create mode 100644 drivers/media/platform/dwc/Makefile
create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.c
create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.h
create mode 100644 drivers/media/platform/dwc/plat_ipk.c
create mode 100644 drivers/media/platform/dwc/plat_ipk.h
create mode 100644 drivers/media/platform/dwc/plat_ipk_video.h
create mode 100644 drivers/media/platform/dwc/video_device.c
create mode 100644 drivers/media/platform/dwc/video_device.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 6a71422..f54dfd8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10618,6 +10618,13 @@ S: Maintained
F: drivers/staging/media/st-cec/
F: Documentation/devicetree/bindings/media/stih-cec.txt
+SYNOPSYS DESIGNWARE CSI-2 HOST IPK DRIVER
+M: Ramiro Oliveira <roliveir@synopsys.com>
+L: linux-media@vger.kernel.org
+T: git git://linuxtv.org/media_tree.git
+S: Maintained
+F: drivers/media/platform/dwc/
+
SYNOPSYS DESIGNWARE DMAC DRIVER
M: Viresh Kumar <vireshk@kernel.org>
M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 754edbf1..6fef760f 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -120,6 +120,7 @@ source "drivers/media/platform/am437x/Kconfig"
source "drivers/media/platform/xilinx/Kconfig"
source "drivers/media/platform/rcar-vin/Kconfig"
source "drivers/media/platform/atmel/Kconfig"
+source "drivers/media/platform/dwc/Kconfig"
config VIDEO_TI_CAL
tristate "TI CAL (Camera Adaptation Layer) driver"
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index f842933..623f5d2 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -61,6 +61,8 @@ obj-$(CONFIG_VIDEO_RCAR_VIN) += rcar-vin/
obj-$(CONFIG_VIDEO_ATMEL_ISC) += atmel/
+obj-$(CONFIG_VIDEO_DWC) += dwc/
+
ccflags-y += -I$(srctree)/drivers/media/i2c
obj-$(CONFIG_VIDEO_MEDIATEK_VPU) += mtk-vpu/
diff --git a/drivers/media/platform/dwc/Kconfig b/drivers/media/platform/dwc/Kconfig
new file mode 100644
index 0000000..fb8533b
--- /dev/null
+++ b/drivers/media/platform/dwc/Kconfig
@@ -0,0 +1,36 @@
+config VIDEO_DWC
+ bool "Designware Cores CSI-2 IPK (EXPERIMENTAL)"
+ depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF && HAS_DMA
+ help
+ Say Y here to enable support for the DesignWare Cores CSI-2 Host IP
+ Prototyping Kit.
+
+if VIDEO_DWC
+config DWC_PLATFORM
+ tristate "SNPS DWC MIPI CSI2 Host"
+ depends on VIDEO_DWC
+ help
+ This is the V4L2 plaftorm driver driver for the DWC CSI-2 HOST IPK
+
+ To compile this driver as a module, choose M here
+
+
+config DWC_MIPI_CSI2_HOST
+ tristate "SNPS DWC MIPI CSI2 Host"
+ select GENERIC_PHY
+ depends on VIDEO_DWC
+ help
+ This is a V4L2 driver for SNPS DWC MIPI-CSI2
+
+ To compile this driver as a module, choose M here
+
+config DWC_VIDEO_DEVICE
+ tristate "DWC VIDEO DEVICE"
+ select VIDEOBUF2_VMALLOC
+ select VIDEOBUF2_DMA_CONTIG
+ depends on VIDEO_DWC
+ help
+ This is a V4L2 driver for SNPS Video device
+ To compile this driver as a module, choose M here
+
+endif # VIDEO_DWC
diff --git a/drivers/media/platform/dwc/Makefile b/drivers/media/platform/dwc/Makefile
new file mode 100644
index 0000000..75c74b7
--- /dev/null
+++ b/drivers/media/platform/dwc/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_DWC_PLATFORM) += plat_ipk.o
+obj-$(CONFIG_DWC_MIPI_CSI2_HOST) += dw_mipi_csi.o
+obj-$(CONFIG_DWC_VIDEO_DEVICE) += video_device.o
diff --git a/drivers/media/platform/dwc/dw_mipi_csi.c b/drivers/media/platform/dwc/dw_mipi_csi.c
new file mode 100644
index 0000000..1337a5e
--- /dev/null
+++ b/drivers/media/platform/dwc/dw_mipi_csi.c
@@ -0,0 +1,687 @@
+/*
+ * DWC MIPI CSI-2 Host device driver
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+
+#include "dw_mipi_csi.h"
+
+/** @short Driver args: debug */
+static unsigned int debug;
+module_param(debug, uint, 0644);
+MODULE_PARM_DESC(debug, "Activates debug info");
+
+/*
+ * Basic IO read and write operations
+ */
+
+/**
+ * @short Video formats supported by the MIPI CSI-2
+ */
+static const struct mipi_fmt dw_mipi_csi_formats[] = {
+ {
+ .name = "RAW BGGR 8",
+ .code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .depth = 8,
+ },
+ {
+ .name = "RAW10",
+ .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE,
+ .depth = 10,
+ },
+ {
+ .name = "RGB565",
+ .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
+ .depth = 16,
+ },
+ {
+ .name = "BGR565",
+ .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
+ .depth = 16,
+ },
+ {
+ .name = "RGB888",
+ .code = MEDIA_BUS_FMT_RGB888_2X12_LE,
+ .depth = 24,
+ },
+ {
+ .name = "BGR888",
+ .code = MEDIA_BUS_FMT_RGB888_2X12_BE,
+ .depth = 24,
+ },
+};
+
+static struct mipi_csi_dev *
+sd_to_mipi_csi_dev(struct v4l2_subdev *sdev)
+{
+ return container_of(sdev, struct mipi_csi_dev, sd);
+}
+
+void
+dw_mipi_csi_write(struct mipi_csi_dev *dev,
+ unsigned int address, unsigned int data)
+{
+ iowrite32(data, dev->base_address + address);
+}
+
+u32
+dw_mipi_csi_read(struct mipi_csi_dev *dev, unsigned long address)
+{
+ return ioread32(dev->base_address + address);
+}
+
+void
+dw_mipi_csi_write_part(struct mipi_csi_dev *dev,
+ unsigned long address, unsigned long data,
+ unsigned char shift, unsigned char width)
+{
+ u32 mask = (1 << width) - 1;
+ u32 temp = dw_mipi_csi_read(dev, address);
+
+ temp &= ~(mask << shift);
+ temp |= (data & mask) << shift;
+ dw_mipi_csi_write(dev, address, temp);
+}
+
+static const struct mipi_fmt *
+find_dw_mipi_csi_format(struct v4l2_mbus_framefmt *mf)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(dw_mipi_csi_formats); i++)
+ if (mf->code == dw_mipi_csi_formats[i].code)
+ return &dw_mipi_csi_formats[i];
+ return NULL;
+}
+
+int
+enable_video_output(struct mipi_csi_dev *dev)
+{
+ return 0;
+}
+
+int
+disable_video_output(struct mipi_csi_dev *dev)
+{
+ phy_power_off(dev->phy);
+ return 0;
+}
+
+static void
+dw_mipi_csi_reset(struct mipi_csi_dev *dev)
+{
+ dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 0);
+ /* mdelay(1); */
+ dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 1);
+}
+
+static int
+dw_mipi_csi_mask_irq_power_off(struct mipi_csi_dev *dev)
+{
+ /* set only one lane (lane 0) as active (ON) */
+ dw_mipi_csi_write(dev, R_CSI2_N_LANES, 0);
+
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY_FATAL, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT_FATAL, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_FRAME_FATAL, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_LINE, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_IPI, 0);
+
+ dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 0);
+
+ return 0;
+
+}
+
+static int
+dw_mipi_csi_hw_stdby(struct mipi_csi_dev *dev)
+{
+ /* set only one lane (lane 0) as active (ON) */
+ dw_mipi_csi_reset(dev);
+
+ dw_mipi_csi_write(dev, R_CSI2_N_LANES, 0);
+
+ phy_init(dev->phy);
+
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY_FATAL, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT_FATAL, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_FRAME_FATAL, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_LINE, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_IPI, 0xFFFFFFFF);
+
+ return 0;
+
+}
+
+void
+dw_mipi_csi_set_ipi_fmt(struct mipi_csi_dev *dev)
+{
+ switch (dev->fmt->code) {
+ case MEDIA_BUS_FMT_RGB565_2X8_BE:
+ case MEDIA_BUS_FMT_RGB565_2X8_LE:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB565);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RGB 565");
+ break;
+
+ case MEDIA_BUS_FMT_RGB888_2X12_LE:
+ case MEDIA_BUS_FMT_RGB888_2X12_BE:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB888);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RGB 888");
+ break;
+ case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RAW10);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RAW 10");
+ break;
+ case MEDIA_BUS_FMT_SBGGR8_1X8:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RAW8);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RAW 8");
+ break;
+ default:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB565);
+ v4l2_dbg(1, debug, &dev->sd, "Error");
+ break;
+ }
+}
+
+void
+__dw_mipi_csi_fill_timings(struct mipi_csi_dev *dev,
+ const struct v4l2_bt_timings *bt)
+{
+
+ if (bt == NULL)
+ return;
+
+ dev->hw.hsa = bt->hsync;
+ dev->hw.hbp = bt->hbackporch;
+ dev->hw.hsd = bt->hsync;
+ dev->hw.htotal = bt->height + bt->vfrontporch +
+ bt->vsync + bt->vbackporch;
+ dev->hw.vsa = bt->vsync;
+ dev->hw.vbp = bt->vbackporch;
+ dev->hw.vfp = bt->vfrontporch;
+ dev->hw.vactive = bt->height;
+}
+
+void
+dw_mipi_csi_start(struct mipi_csi_dev *dev)
+{
+ const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[0].bt;
+
+ __dw_mipi_csi_fill_timings(dev, bt);
+
+ dw_mipi_csi_write(dev, R_CSI2_N_LANES, (dev->hw.num_lanes - 1));
+ v4l2_dbg(1, debug, &dev->sd, "N Lanes: %d\n", dev->hw.num_lanes);
+
+ /*IPI Related Configuration */
+ if ((dev->hw.output_type == IPI_OUT)
+ || (dev->hw.output_type == BOTH_OUT)) {
+
+ dw_mipi_csi_write_part(dev, R_CSI2_IPI_MODE, dev->hw.ipi_mode,
+ 0, 1);
+ v4l2_dbg(1, debug, &dev->sd, "IPI MODE: %d\n",
+ dev->hw.ipi_mode);
+
+ dw_mipi_csi_write_part(dev, R_CSI2_IPI_MODE,
+ dev->hw.ipi_color_mode, 8, 1);
+ v4l2_dbg(1, debug, &dev->sd, "Color Mode: %d\n",
+ dev->hw.ipi_color_mode);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VCID, dev->hw.virtual_ch);
+ v4l2_dbg(1, debug, &dev->sd, "Virtual Channel: %d\n",
+ dev->hw.virtual_ch);
+
+ dw_mipi_csi_write_part(dev, R_CSI2_IPI_MEM_FLUSH,
+ dev->hw.ipi_auto_flush, 8, 1);
+ v4l2_dbg(1, debug, &dev->sd, "Auto-flush: %d\n",
+ dev->hw.ipi_auto_flush);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HSA_TIME, dev->hw.hsa);
+ v4l2_dbg(1, debug, &dev->sd, "HSA: %d\n", dev->hw.hsa);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HBP_TIME, dev->hw.hbp);
+ v4l2_dbg(1, debug, &dev->sd, "HBP: %d\n", dev->hw.hbp);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HSD_TIME, dev->hw.hsd);
+ v4l2_dbg(1, debug, &dev->sd, "HSD: %d\n", dev->hw.hsd);
+
+ if (dev->hw.ipi_mode == AUTO_TIMING) {
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HLINE_TIME,
+ dev->hw.htotal);
+ v4l2_dbg(1, debug, &dev->sd, "H total: %d\n",
+ dev->hw.htotal);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VSA_LINES,
+ dev->hw.vsa);
+ v4l2_dbg(1, debug, &dev->sd, "VSA: %d\n", dev->hw.vsa);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VBP_LINES,
+ dev->hw.vbp);
+ v4l2_dbg(1, debug, &dev->sd, "VBP: %d\n", dev->hw.vbp);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VFP_LINES,
+ dev->hw.vfp);
+ v4l2_dbg(1, debug, &dev->sd, "VFP: %d\n", dev->hw.vfp);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VACTIVE_LINES,
+ dev->hw.vactive);
+ v4l2_dbg(1, debug, &dev->sd, "V Active: %d\n",
+ dev->hw.vactive);
+ }
+ }
+
+ phy_power_on(dev->phy);
+}
+
+static int
+dw_mipi_csi_enum_mbus_code(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->index >= ARRAY_SIZE(dw_mipi_csi_formats))
+ return -EINVAL;
+
+ code->code = dw_mipi_csi_formats[code->index].code;
+ return 0;
+}
+
+static struct mipi_fmt const *
+dw_mipi_csi_try_format(struct v4l2_mbus_framefmt *mf)
+{
+ struct mipi_fmt const *fmt;
+
+ fmt = find_dw_mipi_csi_format(mf);
+ if (fmt == NULL)
+ fmt = &dw_mipi_csi_formats[0];
+
+ mf->code = fmt->code;
+ return fmt;
+}
+
+static struct v4l2_mbus_framefmt *
+__dw_mipi_csi_get_format(struct mipi_csi_dev *dev,
+ struct v4l2_subdev_pad_config *cfg,
+ enum v4l2_subdev_format_whence which)
+{
+ if (which == V4L2_SUBDEV_FORMAT_TRY)
+ return cfg ? v4l2_subdev_get_try_format(&dev->sd, cfg,
+ 0) : NULL;
+
+ return &dev->format;
+}
+
+static int
+dw_mipi_csi_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+ struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+ struct mipi_fmt const *dev_fmt;
+ struct v4l2_mbus_framefmt *mf;
+ int i = 0;
+ const struct v4l2_bt_timings *bt_r = &v4l2_dv_timings_presets[0].bt;
+
+ mf = __dw_mipi_csi_get_format(dev, cfg, fmt->which);
+
+ dev_fmt = dw_mipi_csi_try_format(&fmt->format);
+ if (dev_fmt) {
+ *mf = fmt->format;
+ if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
+ dev->fmt = dev_fmt;
+ dw_mipi_csi_set_ipi_fmt(dev);
+ }
+ while (v4l2_dv_timings_presets[i].bt.width) {
+ const struct v4l2_bt_timings *bt =
+ &v4l2_dv_timings_presets[i].bt;
+ if (mf->width == bt->width && mf->height == bt->width) {
+ __dw_mipi_csi_fill_timings(dev, bt);
+ return 0;
+ }
+ i++;
+ }
+
+ __dw_mipi_csi_fill_timings(dev, bt_r);
+ return 0;
+
+}
+
+static int
+dw_mipi_csi_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+ struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+ struct v4l2_mbus_framefmt *mf;
+
+ mf = __dw_mipi_csi_get_format(dev, cfg, fmt->which);
+ if (!mf)
+ return -EINVAL;
+
+ mutex_lock(&dev->lock);
+ fmt->format = *mf;
+ mutex_unlock(&dev->lock);
+ return 0;
+}
+
+static int
+dw_mipi_csi_s_power(struct v4l2_subdev *sd, int on)
+{
+ struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+
+ if (on) {
+ dw_mipi_csi_hw_stdby(dev);
+ dw_mipi_csi_start(dev);
+ } else {
+ dw_mipi_csi_mask_irq_power_off(dev);
+ }
+
+ return 0;
+}
+
+static int
+dw_mipi_csi_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+ struct v4l2_mbus_framefmt *format =
+ v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+ format->colorspace = V4L2_COLORSPACE_SRGB;
+ format->code = dw_mipi_csi_formats[0].code;
+ format->width = MIN_WIDTH;
+ format->height = MIN_HEIGHT;
+ format->field = V4L2_FIELD_NONE;
+
+ return 0;
+}
+
+static const struct v4l2_subdev_internal_ops dw_mipi_csi_sd_internal_ops = {
+ .open = dw_mipi_csi_open,
+};
+
+static struct v4l2_subdev_core_ops dw_mipi_csi_core_ops = {
+ .s_power = dw_mipi_csi_s_power,
+};
+
+static struct v4l2_subdev_pad_ops dw_mipi_csi_pad_ops = {
+ .enum_mbus_code = dw_mipi_csi_enum_mbus_code,
+ .get_fmt = dw_mipi_csi_get_fmt,
+ .set_fmt = dw_mipi_csi_set_fmt,
+};
+
+static struct v4l2_subdev_ops dw_mipi_csi_subdev_ops = {
+ .core = &dw_mipi_csi_core_ops,
+ .pad = &dw_mipi_csi_pad_ops,
+};
+
+static irqreturn_t
+dw_mipi_csi_irq1(int irq, void *dev_id)
+{
+
+ struct mipi_csi_dev *dev = dev_id;
+ u32 int_status, ind_status;
+ unsigned long flags;
+
+ int_status = dw_mipi_csi_read(dev, R_CSI2_INTERRUPT);
+ spin_lock_irqsave(&dev->slock, flags);
+
+ if (int_status & CSI2_INT_PHY_FATAL) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PHY_FATAL);
+ pr_info_ratelimited("%08X CSI INT PHY FATAL: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_PKT_FATAL) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PKT_FATAL);
+ pr_info_ratelimited("%08X CSI INT PKT FATAL: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_FRAME_FATAL) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_FRAME_FATAL);
+ pr_info_ratelimited("%08X CSI INT FRAME FATAL: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_PHY) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PHY);
+ pr_info_ratelimited("%08X CSI INT PHY: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_PKT) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PKT);
+ pr_info_ratelimited("%08X CSI INT PKT: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_LINE) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_LINE);
+ pr_info_ratelimited("%08X CSI INT LINE: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_IPI) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_IPI);
+ pr_info_ratelimited("%08X CSI INT IPI: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+ spin_unlock_irqrestore(&dev->slock, flags);
+ return IRQ_HANDLED;
+}
+
+static int
+dw_mipi_csi_parse_dt(struct platform_device *pdev, struct mipi_csi_dev *dev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ int reg;
+ int ret = 0;
+
+ /* Device tree information */
+ ret = of_property_read_u32(node, "data-lanes", &dev->hw.num_lanes);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read data-lanes\n");
+ return ret;
+ }
+
+ ret = of_property_read_u32(node, "output-type", &dev->hw.output_type);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read output-type\n");
+ return ret;
+ }
+
+ ret = of_property_read_u32(node, "ipi-mode", &dev->hw.ipi_mode);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read ipi-mode\n");
+ return ret;
+ }
+
+ ret =
+ of_property_read_u32(node, "ipi-auto-flush",
+ &dev->hw.ipi_auto_flush);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read ipi-auto-flush\n");
+ return ret;
+ }
+
+ ret =
+ of_property_read_u32(node, "ipi-color-mode",
+ &dev->hw.ipi_color_mode);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read ipi-color-mode\n");
+ return ret;
+ }
+
+ ret =
+ of_property_read_u32(node, "virtual-channel", &dev->hw.virtual_ch);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read virtual-channel\n");
+ return ret;
+ }
+
+ node = of_get_child_by_name(node, "port");
+ if (!node)
+ return -EINVAL;
+
+ ret = of_property_read_u32(node, "reg", ®);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read reg value\n");
+ return ret;
+ }
+ dev->index = reg - 1;
+
+ if (dev->index >= CSI_MAX_ENTITIES)
+ return -ENXIO;
+
+ return 0;
+}
+
+static const struct of_device_id dw_mipi_csi_of_match[];
+
+/**
+ * @short Initialization routine - Entry point of the driver
+ * @param[in] pdev pointer to the platform device structure
+ * @return 0 on success and a negative number on failure
+ * Refer to Linux errors.
+ */
+static int mipi_csi_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *of_id;
+ struct device *dev = &pdev->dev;
+ struct resource *res = NULL;
+ struct mipi_csi_dev *mipi_csi;
+ int ret = -ENOMEM;
+
+ dev_info(&pdev->dev, "Installing MIPI CSI-2 module\n");
+
+ dev_dbg(&pdev->dev, "Device registration\n");
+ mipi_csi = devm_kzalloc(dev, sizeof(*mipi_csi), GFP_KERNEL);
+ if (!dev)
+ return -ENOMEM;
+
+ mutex_init(&mipi_csi->lock);
+ spin_lock_init(&mipi_csi->slock);
+ mipi_csi->pdev = pdev;
+
+ of_id = of_match_node(dw_mipi_csi_of_match, dev->of_node);
+ if (WARN_ON(of_id == NULL))
+ return -EINVAL;
+
+ ret = dw_mipi_csi_parse_dt(pdev, mipi_csi);
+ if (ret < 0)
+ return ret;
+
+ dev_info(dev, "Request DPHY\n");
+ mipi_csi->phy = devm_phy_get(dev, "csi2-dphy");
+ if (IS_ERR(mipi_csi->phy))
+ return PTR_ERR(mipi_csi->phy);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mipi_csi->base_address = devm_ioremap_resource(dev, res);
+
+ if (IS_ERR(mipi_csi->base_address))
+ return PTR_ERR(mipi_csi->base_address);
+
+ mipi_csi->ctrl_irq_number = platform_get_irq(pdev, 0);
+ if (mipi_csi->ctrl_irq_number <= 0) {
+ dev_err(dev, "IRQ number not set.\n");
+ return mipi_csi->ctrl_irq_number;
+ }
+
+ ret = devm_request_irq(dev, mipi_csi->ctrl_irq_number,
+ dw_mipi_csi_irq1, IRQF_SHARED,
+ dev_name(dev), mipi_csi);
+ if (ret) {
+ dev_err(dev, "IRQ failed\n");
+ goto end;
+ }
+
+ v4l2_subdev_init(&mipi_csi->sd, &dw_mipi_csi_subdev_ops);
+ mipi_csi->sd.owner = THIS_MODULE;
+ snprintf(mipi_csi->sd.name, sizeof(mipi_csi->sd.name), "%s.%d",
+ CSI_DEVICE_NAME, mipi_csi->index);
+ mipi_csi->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ mipi_csi->fmt = &dw_mipi_csi_formats[0];
+
+ mipi_csi->format.code = dw_mipi_csi_formats[0].code;
+ mipi_csi->format.width = MIN_WIDTH;
+ mipi_csi->format.height = MIN_HEIGHT;
+
+ mipi_csi->pads[CSI_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
+ mipi_csi->pads[CSI_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
+ ret = media_entity_pads_init(&mipi_csi->sd.entity,
+ CSI_PADS_NUM, mipi_csi->pads);
+
+ if (ret < 0) {
+ dev_err(dev, "Media Entity init failed\n");
+ goto entity_cleanup;
+ }
+
+ /* This allows to retrieve the platform device id by the host driver */
+ v4l2_set_subdevdata(&mipi_csi->sd, pdev);
+
+ /* .. and a pointer to the subdev. */
+ platform_set_drvdata(pdev, &mipi_csi->sd);
+
+ dw_mipi_csi_mask_irq_power_off(mipi_csi);
+ dev_info(dev, "DW MIPI CSI-2 Host registered successfully\n");
+ return 0;
+
+entity_cleanup:
+ media_entity_cleanup(&mipi_csi->sd.entity);
+end:
+ return ret;
+}
+
+/**
+ * @short Exit routine - Exit point of the driver
+ * @param[in] pdev pointer to the platform device structure
+ * @return 0 on success and a negative number on failure
+ * Refer to Linux errors.
+ */
+static int mipi_csi_remove(struct platform_device *pdev)
+{
+ struct v4l2_subdev *sd = platform_get_drvdata(pdev);
+ struct mipi_csi_dev *mipi_csi = sd_to_mipi_csi_dev(sd);
+
+ dev_dbg(&pdev->dev, "Removing MIPI CSI-2 module\n");
+ media_entity_cleanup(&mipi_csi->sd.entity);
+
+ return 0;
+}
+
+/**
+ * @short of_device_id structure
+ */
+static const struct of_device_id dw_mipi_csi_of_match[] = {
+ {
+ .compatible = "snps,dw-mipi-csi"},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, dw_mipi_csi_of_match);
+
+/**
+ * @short Platform driver structure
+ */
+static struct platform_driver __refdata dw_mipi_csi_pdrv = {
+ .remove = mipi_csi_remove,
+ .probe = mipi_csi_probe,
+ .driver = {
+ .name = CSI_DEVICE_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = dw_mipi_csi_of_match,
+ },
+};
+
+module_platform_driver(dw_mipi_csi_pdrv);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Synopsys DW MIPI CSI-2 Host driver");
diff --git a/drivers/media/platform/dwc/dw_mipi_csi.h b/drivers/media/platform/dwc/dw_mipi_csi.h
new file mode 100644
index 0000000..5e4c48c
--- /dev/null
+++ b/drivers/media/platform/dwc/dw_mipi_csi.h
@@ -0,0 +1,179 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef DW_MIPI_CSI_H_
+#define DW_MIPI_CSI_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_graph.h>
+#include <linux/delay.h>
+#include <linux/wait.h>
+#include <linux/string.h>
+#include <linux/phy/phy.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-dv-timings.h>
+#include <linux/videodev2.h>
+#include <linux/io.h>
+
+#include "plat_ipk_video.h"
+
+#define CSI_DEVICE_NAME "dw-mipi-csi"
+
+/** @short DWC MIPI CSI-2 register addresses*/
+enum register_addresses {
+ R_CSI2_VERSION = 0x00,
+ R_CSI2_N_LANES = 0x04,
+ R_CSI2_CTRL_RESETN = 0x08,
+ R_CSI2_INTERRUPT = 0x0C,
+ R_CSI2_DATA_IDS_1 = 0x10,
+ R_CSI2_DATA_IDS_2 = 0x14,
+ R_CSI2_IPI_MODE = 0x80,
+ R_CSI2_IPI_VCID = 0x84,
+ R_CSI2_IPI_DATA_TYPE = 0x88,
+ R_CSI2_IPI_MEM_FLUSH = 0x8C,
+ R_CSI2_IPI_HSA_TIME = 0x90,
+ R_CSI2_IPI_HBP_TIME = 0x94,
+ R_CSI2_IPI_HSD_TIME = 0x98,
+ R_CSI2_IPI_HLINE_TIME = 0x9C,
+ R_CSI2_IPI_VSA_LINES = 0xB0,
+ R_CSI2_IPI_VBP_LINES = 0xB4,
+ R_CSI2_IPI_VFP_LINES = 0xB8,
+ R_CSI2_IPI_VACTIVE_LINES = 0xBC,
+ R_CSI2_INT_PHY_FATAL = 0xe0,
+ R_CSI2_MASK_INT_PHY_FATAL = 0xe4,
+ R_CSI2_FORCE_INT_PHY_FATAL = 0xe8,
+ R_CSI2_INT_PKT_FATAL = 0xf0,
+ R_CSI2_MASK_INT_PKT_FATAL = 0xf4,
+ R_CSI2_FORCE_INT_PKT_FATAL = 0xf8,
+ R_CSI2_INT_FRAME_FATAL = 0x100,
+ R_CSI2_MASK_INT_FRAME_FATAL = 0x104,
+ R_CSI2_FORCE_INT_FRAME_FATAL = 0x108,
+ R_CSI2_INT_PHY = 0x110,
+ R_CSI2_MASK_INT_PHY = 0x114,
+ R_CSI2_FORCE_INT_PHY = 0x118,
+ R_CSI2_INT_PKT = 0x120,
+ R_CSI2_MASK_INT_PKT = 0x124,
+ R_CSI2_FORCE_INT_PKT = 0x128,
+ R_CSI2_INT_LINE = 0x130,
+ R_CSI2_MASK_INT_LINE = 0x134,
+ R_CSI2_FORCE_INT_LINE = 0x138,
+ R_CSI2_INT_IPI = 0x140,
+ R_CSI2_MASK_INT_IPI = 0x144,
+ R_CSI2_FORCE_INT_IPI = 0x148
+};
+
+/** @short IPI Data Types */
+enum data_type {
+ CSI_2_YUV420_8 = 0x18,
+ CSI_2_YUV420_10 = 0x19,
+ CSI_2_YUV420_8_LEG = 0x1A,
+ CSI_2_YUV420_8_SHIFT = 0x1C,
+ CSI_2_YUV420_10_SHIFT = 0x1D,
+ CSI_2_YUV422_8 = 0x1E,
+ CSI_2_YUV422_10 = 0x1F,
+ CSI_2_RGB444 = 0x20,
+ CSI_2_RGB555 = 0x21,
+ CSI_2_RGB565 = 0x22,
+ CSI_2_RGB666 = 0x23,
+ CSI_2_RGB888 = 0x24,
+ CSI_2_RAW6 = 0x28,
+ CSI_2_RAW7 = 0x29,
+ CSI_2_RAW8 = 0x2A,
+ CSI_2_RAW10 = 0x2B,
+ CSI_2_RAW12 = 0x2C,
+ CSI_2_RAW14 = 0x2D,
+};
+
+/** @short Interrupt Masks */
+enum interrupt_type {
+ CSI2_INT_PHY_FATAL = 1 << 0,
+ CSI2_INT_PKT_FATAL = 1 << 1,
+ CSI2_INT_FRAME_FATAL = 1 << 2,
+ CSI2_INT_PHY = 1 << 16,
+ CSI2_INT_PKT = 1 << 17,
+ CSI2_INT_LINE = 1 << 18,
+ CSI2_INT_IPI = 1 << 19,
+
+};
+
+/** @short DWC MIPI CSI-2 output types*/
+enum output_type {
+ IPI_OUT = 0,
+ IDI_OUT = 1,
+ BOTH_OUT = 2
+};
+
+/** @short IPI output types*/
+enum ipi_output_type {
+ CAMERA_TIMING = 0,
+ AUTO_TIMING = 1
+};
+
+/**
+ * @short Format template
+ */
+struct mipi_fmt {
+ const char *name;
+ u32 code;
+ u8 depth;
+};
+
+struct csi_hw {
+
+ uint32_t num_lanes;
+ uint32_t output_type;
+
+ /*IPI Info */
+ uint32_t ipi_mode;
+ uint32_t ipi_color_mode;
+ uint32_t ipi_auto_flush;
+ uint32_t virtual_ch;
+
+ uint32_t hsa;
+ uint32_t hbp;
+ uint32_t hsd;
+ uint32_t htotal;
+
+ uint32_t vsa;
+ uint32_t vbp;
+ uint32_t vfp;
+ uint32_t vactive;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct mipi_csi_dev {
+ struct v4l2_subdev sd;
+ struct video_device vdev;
+
+ struct mutex lock;
+ spinlock_t slock;
+ struct media_pad pads[CSI_PADS_NUM];
+ struct platform_device *pdev;
+ u8 index;
+
+ /** Store current format */
+ const struct mipi_fmt *fmt;
+ struct v4l2_mbus_framefmt format;
+
+ /** Device Tree Information */
+ void __iomem *base_address;
+ uint32_t ctrl_irq_number;
+
+ struct csi_hw hw;
+
+ struct phy *phy;
+};
+
+#endif /* DW_MIPI_CSI */
diff --git a/drivers/media/platform/dwc/plat_ipk.c b/drivers/media/platform/dwc/plat_ipk.c
new file mode 100644
index 0000000..48b9e36
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk.c
@@ -0,0 +1,835 @@
+/**
+ * DWC MIPI CSI-2 Host IPK platform device driver
+ *
+ * Based on Omnivision OV7670 Camera Driver
+ * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
+ * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+#include "plat_ipk.h"
+#include "video_device.h"
+#include "dw_mipi_csi.h"
+#include <media/v4l2-of.h>
+#include <media/v4l2-subdev.h>
+
+static int
+__plat_ipk_pipeline_s_format(struct plat_ipk_media_pipeline *ep,
+ struct v4l2_subdev_format *fmt)
+{
+
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ static const u8 seq[IDX_MAX] = {IDX_SENSOR, IDX_CSI, IDX_VDEV};
+
+ fmt->which = V4L2_SUBDEV_FORMAT_ACTIVE;
+ v4l2_subdev_call(p->subdevs[seq[IDX_CSI]], pad, set_fmt, NULL, fmt);
+
+ return 0;
+}
+
+static void
+plat_ipk_pipeline_prepare(struct plat_ipk_pipeline *p, struct media_entity *me)
+{
+ struct v4l2_subdev *sd;
+ int i = 0;
+
+ for (i = 0; i < IDX_MAX; i++)
+ p->subdevs[i] = NULL;
+
+ while (1) {
+ struct media_pad *pad = NULL;
+
+ for (i = 0; i < me->num_pads; i++) {
+ struct media_pad *spad = &me->pads[i];
+
+ if (!(spad->flags & MEDIA_PAD_FL_SINK))
+ continue;
+
+ pad = media_entity_remote_pad(spad);
+ if (pad)
+ break;
+ }
+ if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
+ break;
+
+ sd = media_entity_to_v4l2_subdev(pad->entity);
+
+ switch (sd->grp_id) {
+ case GRP_ID_SENSOR:
+ p->subdevs[IDX_SENSOR] = sd;
+ break;
+ case GRP_ID_CSI:
+ p->subdevs[IDX_CSI] = sd;
+ break;
+ case GRP_ID_VIDEODEV:
+ p->subdevs[IDX_VDEV] = sd;
+ break;
+ default:
+ break;
+ }
+ me = &sd->entity;
+ if (me->num_pads == 1)
+ break;
+ }
+}
+
+static int __subdev_set_power(struct v4l2_subdev *sd, int on)
+{
+ int *use_count;
+ int ret;
+
+ if (sd == NULL) {
+ pr_info("null subdev\n");
+ return -ENXIO;
+ }
+ use_count = &sd->entity.use_count;
+ if (on && (*use_count)++ > 0)
+ return 0;
+ else if (!on && (*use_count == 0 || --(*use_count) > 0))
+ return 0;
+
+ pr_debug("%d %s !\n", on, sd->entity.name);
+ ret = v4l2_subdev_call(sd, core, s_power, on);
+
+ return ret != -ENOIOCTLCMD ? ret : 0;
+}
+
+static int plat_ipk_pipeline_s_power(struct plat_ipk_pipeline *p, bool on)
+{
+ static const u8 seq[IDX_MAX] = {IDX_CSI, IDX_SENSOR, IDX_VDEV};
+ int i, ret = 0;
+
+ for (i = 0; i < IDX_MAX; i++) {
+ unsigned int idx = seq[i];
+
+ if (p->subdevs[idx] == NULL)
+ pr_info("No device registered on %d\n", idx);
+ else {
+ ret = __subdev_set_power(p->subdevs[idx], on);
+ if (ret < 0 && ret != -ENXIO)
+ goto error;
+ }
+ }
+ return 0;
+error:
+ for (; i >= 0; i--) {
+ unsigned int idx = seq[i];
+
+ __subdev_set_power(p->subdevs[idx], !on);
+ }
+ return ret;
+}
+
+static int
+__plat_ipk_pipeline_open(struct plat_ipk_media_pipeline *ep,
+ struct media_entity *me, bool prepare)
+{
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ int ret;
+
+ if (WARN_ON(p == NULL || me == NULL))
+ return -EINVAL;
+
+ if (prepare)
+ plat_ipk_pipeline_prepare(p, me);
+
+ ret = plat_ipk_pipeline_s_power(p, 1);
+ if (!ret)
+ return 0;
+
+ return ret;
+}
+
+static int __plat_ipk_pipeline_close(struct plat_ipk_media_pipeline *ep)
+{
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ int ret;
+
+ ret = plat_ipk_pipeline_s_power(p, 0);
+
+ return ret == -ENXIO ? 0 : ret;
+}
+
+static int
+__plat_ipk_pipeline_s_stream(struct plat_ipk_media_pipeline *ep, bool on)
+{
+ static const u8 seq[IDX_MAX] = {IDX_SENSOR, IDX_CSI, IDX_VDEV};
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ int i, ret = 0;
+
+ for (i = 0; i < IDX_MAX; i++) {
+ unsigned int idx = seq[i];
+
+ if (p->subdevs[idx] == NULL)
+ pr_debug("No device registered on %d\n", idx);
+ else {
+ ret =
+ v4l2_subdev_call(p->subdevs[idx], video, s_stream,
+ on);
+
+ if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
+ goto error;
+ }
+ }
+ return 0;
+error:
+ for (; i >= 0; i--) {
+ unsigned int idx = seq[i];
+
+ v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
+ }
+ return ret;
+}
+
+static const struct plat_ipk_media_pipeline_ops plat_ipk_pipeline_ops = {
+ .open = __plat_ipk_pipeline_open,
+ .close = __plat_ipk_pipeline_close,
+ .set_format = __plat_ipk_pipeline_s_format,
+ .set_stream = __plat_ipk_pipeline_s_stream,
+};
+
+static struct plat_ipk_media_pipeline *
+plat_ipk_pipeline_create(struct plat_ipk_dev *plat_ipk)
+{
+ struct plat_ipk_pipeline *p;
+
+ p = kzalloc(sizeof(*p), GFP_KERNEL);
+ if (!p)
+ return NULL;
+
+ list_add_tail(&p->list, &plat_ipk->pipelines);
+
+ p->ep.ops = &plat_ipk_pipeline_ops;
+ return &p->ep;
+}
+
+static void
+plat_ipk_pipelines_free(struct plat_ipk_dev *plat_ipk)
+{
+ while (!list_empty(&plat_ipk->pipelines)) {
+ struct plat_ipk_pipeline *p;
+
+ p = list_entry(plat_ipk->pipelines.next, typeof(*p), list);
+ list_del(&p->list);
+ kfree(p);
+ }
+}
+
+static int
+plat_ipk_parse_port_node(struct plat_ipk_dev *plat_ipk,
+ struct device_node *port, unsigned int index)
+{
+ struct device_node *rem, *ep;
+ struct v4l2_of_endpoint endpoint;
+ struct plat_ipk_source_info *pd = &plat_ipk->sensor[index].pdata;
+
+ /* Assume here a port node can have only one endpoint node. */
+ ep = of_get_next_child(port, NULL);
+ if (!ep)
+ return 0;
+
+ v4l2_of_parse_endpoint(ep, &endpoint);
+ if (WARN_ON(endpoint.base.port == 0) || index >= PLAT_MAX_SENSORS)
+ return -EINVAL;
+
+ pd->mux_id = endpoint.base.port - 1;
+
+ rem = of_graph_get_remote_port_parent(ep);
+ of_node_put(ep);
+ if (rem == NULL) {
+ v4l2_info(&plat_ipk->v4l2_dev,
+ "Remote device at %s not found\n", ep->full_name);
+ return 0;
+ }
+
+ if (WARN_ON(index >= ARRAY_SIZE(plat_ipk->sensor)))
+ return -EINVAL;
+
+ plat_ipk->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF;
+ plat_ipk->sensor[index].asd.match.of.node = rem;
+ plat_ipk->async_subdevs[index] = &plat_ipk->sensor[index].asd;
+
+ plat_ipk->num_sensors++;
+
+ of_node_put(rem);
+ return 0;
+}
+
+
+static int plat_ipk_register_sensor_entities(struct plat_ipk_dev *plat_ipk)
+{
+ struct device_node *parent = plat_ipk->pdev->dev.of_node;
+ struct device_node *node;
+ int index = 0;
+ int ret;
+
+ plat_ipk->num_sensors = 0;
+
+ for_each_available_child_of_node(parent, node) {
+ struct device_node *port;
+
+ if (of_node_cmp(node->name, "csi2"))
+ continue;
+ port = of_get_next_child(node, NULL);
+ if (!port)
+ continue;
+
+ ret = plat_ipk_parse_port_node(plat_ipk, port, index);
+ if (ret < 0)
+ return ret;
+ index++;
+ }
+ return 0;
+}
+
+static int
+__of_get_port_id(struct device_node *np)
+{
+ u32 reg = 0;
+
+ np = of_get_child_by_name(np, "port");
+ if (!np)
+ return -EINVAL;
+ of_property_read_u32(np, "reg", ®);
+
+ return reg - 1;
+}
+
+static int register_videodev_entity(struct plat_ipk_dev *plat_ipk,
+ struct video_device_dev *vid_dev)
+{
+ struct v4l2_subdev *sd;
+ struct plat_ipk_media_pipeline *ep;
+ int ret;
+
+ sd = &vid_dev->subdev;
+ sd->grp_id = GRP_ID_VIDEODEV;
+
+ ep = plat_ipk_pipeline_create(plat_ipk);
+ if (!ep)
+ return -ENOMEM;
+
+ v4l2_set_subdev_hostdata(sd, ep);
+
+ ret = v4l2_device_register_subdev(&plat_ipk->v4l2_dev, sd);
+ if (!ret)
+ plat_ipk->vid_dev = vid_dev;
+ else
+ v4l2_err(&plat_ipk->v4l2_dev,
+ "Failed to register Video Device\n");
+ return ret;
+}
+
+static int register_mipi_csi_entity(struct plat_ipk_dev *plat_ipk,
+ struct platform_device *pdev, struct v4l2_subdev *sd)
+{
+ struct device_node *node = pdev->dev.of_node;
+ int id, ret;
+
+ id = node ? __of_get_port_id(node) : max(0, pdev->id);
+
+ if (WARN_ON(id < 0 || id >= CSI_MAX_ENTITIES))
+ return -ENOENT;
+
+ if (WARN_ON(plat_ipk->mipi_csi[id].sd))
+ return -EBUSY;
+
+ sd->grp_id = GRP_ID_CSI;
+ ret = v4l2_device_register_subdev(&plat_ipk->v4l2_dev, sd);
+
+ if (!ret)
+ plat_ipk->mipi_csi[id].sd = sd;
+ else
+ v4l2_err(&plat_ipk->v4l2_dev,
+ "Failed to register MIPI-CSI.%d (%d)\n", id, ret);
+ return ret;
+}
+
+static int plat_ipk_register_platform_entity(struct plat_ipk_dev *plat_ipk,
+ struct platform_device *pdev, int plat_entity)
+{
+ struct device *dev = &pdev->dev;
+ int ret = -EPROBE_DEFER;
+ void *drvdata;
+
+
+ device_lock(dev);
+ if (!dev->driver || !try_module_get(dev->driver->owner))
+ goto dev_unlock;
+
+ drvdata = dev_get_drvdata(dev);
+
+ if (drvdata) {
+ switch (plat_entity) {
+ case IDX_VDEV:
+ ret = register_videodev_entity(plat_ipk, drvdata);
+ break;
+ case IDX_CSI:
+ ret = register_mipi_csi_entity(plat_ipk, pdev, drvdata);
+ break;
+ default:
+ ret = -ENODEV;
+ }
+ } else
+ dev_err(&plat_ipk->pdev->dev, "%s no drvdata\n", dev_name(dev));
+ module_put(dev->driver->owner);
+dev_unlock:
+ device_unlock(dev);
+ if (ret == -EPROBE_DEFER)
+ dev_info(&plat_ipk->pdev->dev,
+ "deferring %s device registration\n", dev_name(dev));
+ else if (ret < 0)
+ dev_err(&plat_ipk->pdev->dev,
+ "%s device registration failed (%d)\n", dev_name(dev),
+ ret);
+ return ret;
+}
+
+static int
+plat_ipk_register_platform_entities(struct plat_ipk_dev *plat_ipk,
+ struct device_node *parent)
+{
+ struct device_node *node;
+ int ret = 0;
+
+ for_each_available_child_of_node(parent, node) {
+ struct platform_device *pdev;
+ int plat_entity = -1;
+
+ pdev = of_find_device_by_node(node);
+ if (!pdev)
+ continue;
+
+ if (!strcmp(node->name, VIDEODEV_OF_NODE_NAME))
+ plat_entity = IDX_VDEV;
+ else if (!strcmp(node->name, CSI_OF_NODE_NAME))
+ plat_entity = IDX_CSI;
+
+ if (plat_entity >= 0)
+ ret = plat_ipk_register_platform_entity(plat_ipk, pdev,
+ plat_entity);
+ put_device(&pdev->dev);
+ if (ret < 0)
+ break;
+ }
+
+ return ret;
+}
+
+static void
+plat_ipk_unregister_entities(struct plat_ipk_dev *plat_ipk)
+{
+ int i;
+ struct video_device_dev *dev = plat_ipk->vid_dev;
+
+ if (dev == NULL)
+ return;
+ v4l2_device_unregister_subdev(&dev->subdev);
+ dev->ve.pipe = NULL;
+ plat_ipk->vid_dev = NULL;
+
+ for (i = 0; i < CSI_MAX_ENTITIES; i++) {
+ if (plat_ipk->mipi_csi[i].sd == NULL)
+ continue;
+ v4l2_device_unregister_subdev(plat_ipk->mipi_csi[i].sd);
+ plat_ipk->mipi_csi[i].sd = NULL;
+ }
+
+ v4l2_info(&plat_ipk->v4l2_dev, "Unregistered all entities\n");
+}
+
+static int
+__plat_ipk_create_videodev_sink_links(struct plat_ipk_dev *plat_ipk,
+ struct media_entity *source,
+ int pad)
+{
+ struct media_entity *sink;
+ int ret = 0;
+
+ if (!plat_ipk->vid_dev)
+ return 0;
+
+ sink = &plat_ipk->vid_dev->subdev.entity;
+ ret = media_create_pad_link(source, pad, sink,
+ CSI_PAD_SOURCE, MEDIA_LNK_FL_ENABLED);
+ if (ret)
+ return ret;
+
+ ret = media_entity_call(sink, link_setup, &sink->pads[0],
+ &source->pads[pad], 0);
+ if (ret)
+ return 0;
+
+ v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+ source->name, sink->name);
+
+ return 0;
+}
+
+
+static int
+__plat_ipk_create_videodev_source_links(struct plat_ipk_dev *plat_ipk)
+{
+ struct media_entity *source, *sink;
+ int ret = 0;
+
+ struct video_device_dev *vid_dev = plat_ipk->vid_dev;
+
+ if (vid_dev == NULL)
+ return -ENODEV;
+
+ source = &vid_dev->subdev.entity;
+ sink = &vid_dev->ve.vdev.entity;
+
+ ret = media_create_pad_link(source, VIDEO_DEV_SD_PAD_SOURCE_DMA,
+ sink, 0, MEDIA_LNK_FL_ENABLED);
+
+ v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+ source->name, sink->name);
+ return ret;
+}
+
+static int
+plat_ipk_create_links(struct plat_ipk_dev *plat_ipk)
+{
+ struct v4l2_subdev *csi_sensor[CSI_MAX_ENTITIES] = { NULL };
+ struct v4l2_subdev *sensor, *csi;
+ struct media_entity *source;
+ struct plat_ipk_source_info *pdata;
+ int i, pad, ret = 0;
+
+ for (i = 0; i < plat_ipk->num_sensors; i++) {
+ if (plat_ipk->sensor[i].subdev == NULL)
+ continue;
+
+ sensor = plat_ipk->sensor[i].subdev;
+ pdata = v4l2_get_subdev_hostdata(sensor);
+ if (!pdata)
+ continue;
+
+ source = NULL;
+
+ csi = plat_ipk->mipi_csi[pdata->mux_id].sd;
+ if (WARN(csi == NULL, "MIPI-CSI interface specified but dw-mipi-csi module is not loaded!\n"))
+ return -EINVAL;
+
+ pad = sensor->entity.num_pads - 1;
+ ret = media_create_pad_link(&sensor->entity, pad,
+ &csi->entity, CSI_PAD_SINK,
+ MEDIA_LNK_FL_IMMUTABLE |
+ MEDIA_LNK_FL_ENABLED);
+
+ if (ret)
+ return ret;
+ v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+ sensor->entity.name, csi->entity.name);
+
+ csi_sensor[pdata->mux_id] = sensor;
+ }
+
+ for (i = 0; i < CSI_MAX_ENTITIES; i++) {
+ if (plat_ipk->mipi_csi[i].sd == NULL) {
+ pr_info("no link\n");
+ continue;
+ }
+
+ source = &plat_ipk->mipi_csi[i].sd->entity;
+ pad = VIDEO_DEV_SD_PAD_SINK_CSI;
+
+ ret = __plat_ipk_create_videodev_sink_links(plat_ipk, source,
+ pad);
+ }
+
+ ret = __plat_ipk_create_videodev_source_links(plat_ipk);
+ if (ret < 0)
+ return ret;
+
+ return ret;
+}
+
+static int __plat_ipk_modify_pipeline(struct media_entity *entity, bool enable)
+{
+ struct plat_ipk_video_entity *ve;
+ struct plat_ipk_pipeline *p;
+ struct video_device *vdev;
+ int ret;
+
+ vdev = media_entity_to_video_device(entity);
+
+ if (vdev->entity.use_count == 0)
+ return 0;
+
+ ve = vdev_to_plat_ipk_video_entity(vdev);
+ p = to_plat_ipk_pipeline(ve->pipe);
+
+ if (enable)
+ ret = __plat_ipk_pipeline_open(ve->pipe, entity, true);
+ else
+ ret = __plat_ipk_pipeline_close(ve->pipe);
+
+ if (ret == 0 && !enable)
+ memset(p->subdevs, 0, sizeof(p->subdevs));
+
+ return ret;
+}
+
+
+static int
+__plat_ipk_modify_pipelines(struct media_entity *entity, bool enable,
+ struct media_entity_graph *graph)
+{
+ struct media_entity *entity_err = entity;
+ int ret;
+
+ media_entity_graph_walk_start(graph, entity);
+
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (!is_media_entity_v4l2_video_device(entity))
+ continue;
+
+ ret = __plat_ipk_modify_pipeline(entity, enable);
+
+ if (ret < 0)
+ goto err;
+ }
+
+ return 0;
+
+err:
+ media_entity_graph_walk_start(graph, entity_err);
+
+ while ((entity_err = media_entity_graph_walk_next(graph))) {
+ if (!is_media_entity_v4l2_video_device(entity_err))
+ continue;
+
+ __plat_ipk_modify_pipeline(entity_err, !enable);
+
+ if (entity_err == entity)
+ break;
+ }
+
+ return ret;
+}
+
+static int
+plat_ipk_link_notify(struct media_link *link, unsigned int flags,
+ unsigned int notification)
+{
+ struct media_entity_graph *graph =
+ &container_of(link->graph_obj.mdev, struct plat_ipk_dev,
+ media_dev)->link_setup_graph;
+ struct media_entity *sink = link->sink->entity;
+ int ret = 0;
+
+ pr_debug("Link notify\n");
+
+ if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
+ ret = media_entity_graph_walk_init(graph, link->graph_obj.mdev);
+ if (ret)
+ return ret;
+ if (!(flags & MEDIA_LNK_FL_ENABLED))
+ ret = __plat_ipk_modify_pipelines(sink, false, graph);
+
+ } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) {
+ if (link->flags & MEDIA_LNK_FL_ENABLED)
+ ret = __plat_ipk_modify_pipelines(sink, true, graph);
+ media_entity_graph_walk_cleanup(graph);
+ }
+
+ return ret ? -EPIPE : 0;
+}
+static const struct media_device_ops plat_ipk_media_ops = {
+ .link_notify = plat_ipk_link_notify,
+};
+
+
+static int
+subdev_notifier_bound(struct v4l2_async_notifier *notifier,
+ struct v4l2_subdev *subdev, struct v4l2_async_subdev *asd)
+{
+ struct plat_ipk_dev *plat_ipk = notifier_to_plat_ipk(notifier);
+ struct plat_ipk_sensor_info *si = NULL;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(plat_ipk->sensor); i++)
+ if (plat_ipk->sensor[i].asd.match.of.node ==
+ subdev->dev->of_node)
+ si = &plat_ipk->sensor[i];
+
+ if (si == NULL)
+ return -EINVAL;
+
+ v4l2_set_subdev_hostdata(subdev, &si->pdata);
+
+ subdev->grp_id = GRP_ID_SENSOR;
+
+ si->subdev = subdev;
+
+ v4l2_info(&plat_ipk->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
+ subdev->name, plat_ipk->num_sensors);
+
+ plat_ipk->num_sensors++;
+
+ return 0;
+}
+
+static int
+subdev_notifier_complete(struct v4l2_async_notifier *notifier)
+{
+ struct plat_ipk_dev *plat_ipk = notifier_to_plat_ipk(notifier);
+ int ret;
+
+ mutex_lock(&plat_ipk->media_dev.graph_mutex);
+
+ ret = plat_ipk_create_links(plat_ipk);
+ if (ret < 0)
+ goto unlock;
+
+ ret = v4l2_device_register_subdev_nodes(&plat_ipk->v4l2_dev);
+unlock:
+ mutex_unlock(&plat_ipk->media_dev.graph_mutex);
+ if (ret < 0)
+ return ret;
+
+ return media_device_register(&plat_ipk->media_dev);
+}
+
+static const struct of_device_id plat_ipk_of_match[];
+
+static int plat_ipk_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct v4l2_device *v4l2_dev;
+ struct plat_ipk_dev *plat_ipk;
+ int ret;
+
+ dev_info(dev, "Installing DW MIPI CSI-2 IPK Platform module\n");
+
+ plat_ipk = devm_kzalloc(dev, sizeof(*plat_ipk), GFP_KERNEL);
+ if (!plat_ipk)
+ return -ENOMEM;
+
+ spin_lock_init(&plat_ipk->slock);
+ INIT_LIST_HEAD(&plat_ipk->pipelines);
+ plat_ipk->pdev = pdev;
+
+ strlcpy(plat_ipk->media_dev.model, "SNPS IPK Platform",
+ sizeof(plat_ipk->media_dev.model));
+ plat_ipk->media_dev.ops = &plat_ipk_media_ops;
+ plat_ipk->media_dev.dev = dev;
+
+ v4l2_dev = &plat_ipk->v4l2_dev;
+ v4l2_dev->mdev = &plat_ipk->media_dev;
+ strlcpy(v4l2_dev->name, "plat-ipk", sizeof(v4l2_dev->name));
+
+ media_device_init(&plat_ipk->media_dev);
+
+ ret = v4l2_device_register(dev, &plat_ipk->v4l2_dev);
+ if (ret < 0) {
+ v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, plat_ipk);
+
+ ret = plat_ipk_register_platform_entities(plat_ipk, dev->of_node);
+ if (ret)
+ goto err_m_ent;
+
+ ret = plat_ipk_register_sensor_entities(plat_ipk);
+ if (ret)
+ goto err_m_ent;
+
+ if (plat_ipk->num_sensors > 0) {
+ plat_ipk->subdev_notifier.subdevs = plat_ipk->async_subdevs;
+ plat_ipk->subdev_notifier.num_subdevs = plat_ipk->num_sensors;
+ plat_ipk->subdev_notifier.bound = subdev_notifier_bound;
+ plat_ipk->subdev_notifier.complete = subdev_notifier_complete;
+ plat_ipk->num_sensors = 0;
+
+ ret = v4l2_async_notifier_register(&plat_ipk->v4l2_dev,
+ &plat_ipk->subdev_notifier);
+ if (ret)
+ goto err_m_ent;
+ }
+
+ return 0;
+
+err_m_ent:
+ plat_ipk_unregister_entities(plat_ipk);
+ media_device_unregister(&plat_ipk->media_dev);
+ media_device_cleanup(&plat_ipk->media_dev);
+ v4l2_device_unregister(&plat_ipk->v4l2_dev);
+ return ret;
+}
+
+static int plat_ipk_remove(struct platform_device *pdev)
+{
+ struct plat_ipk_dev *dev = platform_get_drvdata(pdev);
+
+ if (!dev)
+ return 0;
+
+ v4l2_async_notifier_unregister(&dev->subdev_notifier);
+
+ v4l2_device_unregister(&dev->v4l2_dev);
+ plat_ipk_unregister_entities(dev);
+ plat_ipk_pipelines_free(dev);
+ media_device_unregister(&dev->media_dev);
+ media_device_cleanup(&dev->media_dev);
+
+ dev_info(&pdev->dev, "Driver removed\n");
+
+ return 0;
+}
+
+/**
+ * @short of_device_id structure
+ */
+static const struct of_device_id plat_ipk_of_match[] = {
+ {.compatible = "snps,plat-ipk"},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, plat_ipk_of_match);
+
+/**
+ * @short Platform driver structure
+ */
+static struct platform_driver plat_ipk_pdrv = {
+ .remove = plat_ipk_remove,
+ .probe = plat_ipk_probe,
+ .driver = {
+ .name = "snps,plat-ipk",
+ .owner = THIS_MODULE,
+ .of_match_table = plat_ipk_of_match,
+ },
+};
+
+static int __init
+plat_ipk_init(void)
+{
+ request_module("dw-mipi-csi");
+
+ return platform_driver_register(&plat_ipk_pdrv);
+}
+
+static void __exit
+plat_ipk_exit(void)
+{
+ platform_driver_unregister(&plat_ipk_pdrv);
+}
+
+module_init(plat_ipk_init);
+module_exit(plat_ipk_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Platform driver for MIPI CSI-2 Host IPK");
diff --git a/drivers/media/platform/dwc/plat_ipk.h b/drivers/media/platform/dwc/plat_ipk.h
new file mode 100644
index 0000000..ef569eb
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_IPK_H_
+#define PLAT_IPK_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/list.h>
+#include <linux/string.h>
+#include <media/v4l2-device.h>
+#include <linux/videodev2.h>
+#include <media/media-entity.h>
+
+#include "plat_ipk_video.h"
+
+#define VIDEODEV_OF_NODE_NAME "video-device"
+#define CSI_OF_NODE_NAME "csi2"
+
+enum plat_ipk_subdev_index {
+ IDX_SENSOR,
+ IDX_CSI,
+ IDX_VDEV,
+ IDX_MAX,
+};
+
+struct plat_ipk_sensor_info {
+ struct plat_ipk_source_info pdata;
+ struct v4l2_async_subdev asd;
+ struct v4l2_subdev *subdev;
+ struct mipi_csi_dev *host;
+};
+
+struct plat_ipk_pipeline {
+ struct plat_ipk_media_pipeline ep;
+ struct list_head list;
+ struct media_entity *vdev_entity;
+ struct v4l2_subdev *subdevs[IDX_MAX];
+};
+
+#define to_plat_ipk_pipeline(_ep)\
+ container_of(_ep, struct plat_ipk_pipeline, ep)
+
+struct mipi_csi_info {
+ struct v4l2_subdev *sd;
+ int id;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct plat_ipk_dev {
+ struct mipi_csi_info mipi_csi[CSI_MAX_ENTITIES];
+ struct video_device_dev *vid_dev;
+ struct device *dev;
+ struct media_device media_dev;
+ struct v4l2_device v4l2_dev;
+ struct platform_device *pdev;
+ struct plat_ipk_sensor_info sensor[PLAT_MAX_SENSORS];
+ struct v4l2_async_notifier subdev_notifier;
+ struct v4l2_async_subdev *async_subdevs[PLAT_MAX_SENSORS];
+ spinlock_t slock;
+ struct list_head pipelines;
+ int num_sensors;
+ struct media_entity_graph link_setup_graph;
+};
+
+static inline struct plat_ipk_dev *
+entity_to_plat_ipk_mdev(struct media_entity *me)
+{
+ return me->graph_obj.mdev == NULL ? NULL :
+ container_of(me->graph_obj.mdev, struct plat_ipk_dev, media_dev);
+}
+
+static inline struct plat_ipk_dev *
+notifier_to_plat_ipk(struct v4l2_async_notifier *n)
+{
+ return container_of(n, struct plat_ipk_dev, subdev_notifier);
+}
+
+static inline void
+plat_ipk_graph_unlock(struct plat_ipk_video_entity *ve)
+{
+ mutex_unlock(&ve->vdev.entity.graph_obj.mdev->graph_mutex);
+}
+
+#endif /* PLAT_IPK_H_ */
diff --git a/drivers/media/platform/dwc/plat_ipk_video.h b/drivers/media/platform/dwc/plat_ipk_video.h
new file mode 100644
index 0000000..6bfc9f8
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk_video.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_IPK_INCLUDES_H_
+#define PLAT_IPK_INCLUDES_H_
+
+#include <media/media-entity.h>
+#include <media/v4l2-dev.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-subdev.h>
+
+/*
+ * The subdevices' group IDs.
+ */
+
+#define MAX_WIDTH 3280
+#define MAX_HEIGHT 1852
+
+#define MIN_WIDTH 640
+#define MIN_HEIGHT 480
+
+#define GRP_ID_SENSOR (10)
+#define GRP_ID_CSI (20)
+#define GRP_ID_VIDEODEV (30)
+
+#define CSI_MAX_ENTITIES 1
+#define PLAT_MAX_SENSORS 1
+
+enum video_dev_pads {
+ VIDEO_DEV_SD_PAD_SINK_CSI = 0,
+ VIDEO_DEV_SD_PAD_SOURCE_DMA = 1,
+ VIDEO_DEV_SD_PADS_NUM = 2,
+};
+
+enum mipi_csi_pads {
+ CSI_PAD_SINK = 0,
+ CSI_PAD_SOURCE = 1,
+ CSI_PADS_NUM = 2,
+};
+
+struct plat_ipk_source_info {
+ u16 flags;
+ u16 mux_id;
+};
+
+struct plat_ipk_fmt {
+ u32 mbus_code;
+ char *name;
+ u32 fourcc;
+ u8 depth;
+};
+
+struct plat_ipk_media_pipeline;
+
+/*
+ * Media pipeline operations to be called from within a video node, i.e. the
+ * last entity within the pipeline. Implemented by related media device driver.
+ */
+struct plat_ipk_media_pipeline_ops {
+ int (*prepare)(struct plat_ipk_media_pipeline *p,
+ struct media_entity *me);
+ int (*unprepare)(struct plat_ipk_media_pipeline *p);
+ int (*open)(struct plat_ipk_media_pipeline *p,
+ struct media_entity *me, bool resume);
+ int (*close)(struct plat_ipk_media_pipeline *p);
+ int (*set_stream)(struct plat_ipk_media_pipeline *p, bool state);
+ int (*set_format)(struct plat_ipk_media_pipeline *p,
+ struct v4l2_subdev_format *fmt);
+};
+
+struct plat_ipk_video_entity {
+ struct video_device vdev;
+ struct plat_ipk_media_pipeline *pipe;
+};
+
+struct plat_ipk_media_pipeline {
+ struct media_pipeline mp;
+ const struct plat_ipk_media_pipeline_ops *ops;
+};
+
+static inline struct plat_ipk_video_entity *
+vdev_to_plat_ipk_video_entity(struct video_device *vdev)
+{
+ return container_of(vdev, struct plat_ipk_video_entity, vdev);
+}
+
+#define plat_ipk_pipeline_call(ent, op, args...)\
+ (!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
+ (ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
+
+
+#endif /* PLAT_IPK_INCLUDES_H_ */
diff --git a/drivers/media/platform/dwc/video_device.c b/drivers/media/platform/dwc/video_device.c
new file mode 100644
index 0000000..d827426
--- /dev/null
+++ b/drivers/media/platform/dwc/video_device.c
@@ -0,0 +1,741 @@
+/*
+ * DWC MIPI CSI-2 Host IPK video device device driver
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+#include "video_device.h"
+
+const struct plat_ipk_fmt vid_dev_formats[] = {
+ {
+ .name = "RGB888",
+ .fourcc = V4L2_PIX_FMT_BGR24,
+ .depth = 24,
+ .mbus_code = MEDIA_BUS_FMT_RGB888_2X12_LE,
+ }, {
+ .name = "RGB565",
+ .fourcc = V4L2_PIX_FMT_RGB565,
+ .depth = 16,
+ .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_BE,
+ },
+};
+
+const struct plat_ipk_fmt *
+vid_dev_find_format(struct v4l2_format *f, int index)
+{
+ const struct plat_ipk_fmt *fmt = NULL;
+ unsigned int i;
+
+ if (index >= (int) ARRAY_SIZE(vid_dev_formats))
+ return NULL;
+
+ for (i = 0; i < ARRAY_SIZE(vid_dev_formats); ++i) {
+ fmt = &vid_dev_formats[i];
+ if (fmt->fourcc == f->fmt.pix.pixelformat)
+ return fmt;
+ }
+ return NULL;
+}
+
+/*
+ * Video node ioctl operations
+ */
+static int
+vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+
+ strlcpy(cap->driver, VIDEO_DEVICE_NAME, sizeof(cap->driver));
+ strlcpy(cap->card, VIDEO_DEVICE_NAME, sizeof(cap->card));
+ snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
+ dev_name(&vid_dev->pdev->dev));
+
+ cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
+ cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
+ return 0;
+}
+
+int
+vidioc_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *f)
+{
+ const struct plat_ipk_fmt *p_fmt;
+
+ if (f->index >= ARRAY_SIZE(vid_dev_formats))
+ return -EINVAL;
+
+ p_fmt = &vid_dev_formats[f->index];
+
+ strlcpy(f->description, p_fmt->name, sizeof(f->description));
+ f->pixelformat = p_fmt->fourcc;
+
+ return 0;
+}
+
+int vidioc_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+ struct video_device_dev *dev = video_drvdata(file);
+
+ memcpy(&f->fmt.pix, &dev->format.fmt.pix,
+ sizeof(struct v4l2_pix_format));
+
+ return 0;
+}
+
+static int
+vidioc_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+ const struct plat_ipk_fmt *fmt;
+
+ fmt = vid_dev_find_format(f, -1);
+ if (!fmt) {
+ f->fmt.pix.pixelformat = V4L2_PIX_FMT_RGB565;
+ fmt = vid_dev_find_format(f, -1);
+ }
+
+ f->fmt.pix.field = V4L2_FIELD_NONE;
+ v4l_bound_align_image(&f->fmt.pix.width, 48, MAX_WIDTH, 2,
+ &f->fmt.pix.height, 32, MAX_HEIGHT, 0, 0);
+
+ f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3;
+ f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
+ f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
+ return 0;
+}
+
+int vidioc_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+ struct video_device_dev *dev = video_drvdata(file);
+ int ret;
+ struct v4l2_subdev_format fmt;
+
+ if (vb2_is_busy(&dev->vb_queue))
+ return -EBUSY;
+
+ ret = vidioc_try_fmt_vid_cap(file, dev, f);
+ if (ret)
+ return ret;
+
+ dev->fmt = vid_dev_find_format(f, -1);
+ pixel_format(dev) = f->fmt.pix.pixelformat;
+ width(dev) = f->fmt.pix.width;
+ height(dev) = f->fmt.pix.height;
+ bytes_per_line(dev) = width(dev) * dev->fmt->depth / 8;
+ size_image(dev) = height(dev) * bytes_per_line(dev);
+
+ fmt.format.colorspace = V4L2_COLORSPACE_SRGB;
+ fmt.format.code = dev->fmt->mbus_code;
+
+ fmt.format.width = width(dev);
+ fmt.format.height = height(dev);
+
+ ret = plat_ipk_pipeline_call(&dev->ve, set_format, &fmt);
+
+ return 0;
+}
+
+int vidioc_enum_framesizes(struct file *file, void *fh,
+ struct v4l2_frmsizeenum *fsize)
+{
+ static const struct v4l2_frmsize_stepwise sizes = {
+ 48, MAX_WIDTH, 4,
+ 32, MAX_HEIGHT, 1
+ };
+ int i;
+
+ if (fsize->index)
+ return -EINVAL;
+ for (i = 0; i < ARRAY_SIZE(vid_dev_formats); i++)
+ if (vid_dev_formats[i].fourcc == fsize->pixel_format)
+ break;
+ if (i == ARRAY_SIZE(vid_dev_formats))
+ return -EINVAL;
+ fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
+ fsize->stepwise = sizes;
+ return 0;
+}
+
+int vidioc_enum_input(struct file *file, void *priv, struct v4l2_input *input)
+{
+ if (input->index != 0)
+ return -EINVAL;
+
+ input->type = V4L2_INPUT_TYPE_CAMERA;
+ input->std = V4L2_STD_ALL; /* Not sure what should go here */
+ strcpy(input->name, "Camera");
+ return 0;
+}
+
+int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
+{
+ *i = 0;
+ return 0;
+}
+
+int vidioc_s_input(struct file *file, void *priv, unsigned int i)
+{
+ if (i != 0)
+ return -EINVAL;
+ return 0;
+}
+
+int vidioc_g_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ *norm = V4L2_STD_NTSC_M;
+ return 0;
+}
+
+int vidioc_s_std(struct file *file, void *fh, v4l2_std_id a)
+{
+ return 0;
+}
+
+static int
+vid_dev_pipeline_validate(struct video_device_dev *vid_dev)
+{
+ return 0;
+}
+
+static int
+vid_dev_streamon(struct file *file, void *priv, enum v4l2_buf_type type)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ struct media_entity *entity = &vid_dev->ve.vdev.entity;
+ int ret;
+
+ ret = media_entity_pipeline_start(entity, &vid_dev->ve.pipe->mp);
+ if (ret < 0)
+ return ret;
+
+ ret = vid_dev_pipeline_validate(vid_dev);
+ if (ret < 0)
+ goto err_p_stop;
+
+ vb2_ioctl_streamon(file, priv, type);
+ if (!ret)
+ return ret;
+
+err_p_stop:
+ media_entity_pipeline_stop(entity);
+ return 0;
+}
+
+static int
+vid_dev_streamoff(struct file *file, void *priv, enum v4l2_buf_type type)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ int ret;
+
+ ret = vb2_ioctl_streamoff(file, priv, type);
+ if (ret < 0)
+ return ret;
+
+ media_entity_pipeline_stop(&vid_dev->ve.vdev.entity);
+ return 0;
+}
+
+static const struct v4l2_ioctl_ops vid_dev_ioctl_ops = {
+ .vidioc_querycap = vidioc_querycap,
+ .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
+ .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
+ .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
+ .vidioc_enum_framesizes = vidioc_enum_framesizes,
+ .vidioc_enum_input = vidioc_enum_input,
+ .vidioc_g_input = vidioc_g_input,
+ .vidioc_s_input = vidioc_s_input,
+
+ .vidioc_reqbufs = vb2_ioctl_reqbufs,
+ .vidioc_create_bufs = vb2_ioctl_create_bufs,
+ .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
+ .vidioc_querybuf = vb2_ioctl_querybuf,
+ .vidioc_qbuf = vb2_ioctl_qbuf,
+ .vidioc_dqbuf = vb2_ioctl_dqbuf,
+ .vidioc_streamon = vid_dev_streamon,
+ .vidioc_streamoff = vid_dev_streamoff,
+};
+
+/* Capture subdev media entity operations */
+static int
+vid_dev_link_setup(struct media_entity *entity,
+ const struct media_pad *local,
+ const struct media_pad *remote, u32 flags)
+{
+ return 0;
+}
+
+static const struct media_entity_operations vid_dev_subdev_media_ops = {
+ .link_setup = vid_dev_link_setup,
+};
+
+static int
+vid_dev_open(struct file *file)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ struct media_entity *me = &vid_dev->ve.vdev.entity;
+ int ret;
+
+ mutex_lock(&vid_dev->lock);
+
+ ret = v4l2_fh_open(file);
+ if (ret < 0)
+ goto unlock;
+
+ if (!v4l2_fh_is_singular_file(file))
+ goto unlock;
+
+ mutex_lock(&me->graph_obj.mdev->graph_mutex);
+
+ ret = plat_ipk_pipeline_call(&vid_dev->ve, open, me, true);
+ if (ret == 0)
+ me->use_count++;
+
+ mutex_unlock(&me->graph_obj.mdev->graph_mutex);
+
+ if (!ret)
+ goto unlock;
+
+ v4l2_fh_release(file);
+unlock:
+ mutex_unlock(&vid_dev->lock);
+ return ret;
+}
+
+static int
+vid_dev_release(struct file *file)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ struct media_entity *entity = &vid_dev->ve.vdev.entity;
+
+ mutex_lock(&vid_dev->lock);
+
+ if (v4l2_fh_is_singular_file(file)) {
+ plat_ipk_pipeline_call(&vid_dev->ve, close);
+ mutex_lock(&entity->graph_obj.mdev->graph_mutex);
+ entity->use_count--;
+ mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
+ }
+
+ _vb2_fop_release(file, NULL);
+
+ mutex_unlock(&vid_dev->lock);
+ return 0;
+}
+
+static const struct v4l2_file_operations vid_dev_fops = {
+ .owner = THIS_MODULE,
+ .open = vid_dev_open,
+ .release = vid_dev_release,
+ .write = vb2_fop_write,
+ .read = vb2_fop_read,
+ .poll = vb2_fop_poll,
+ .unlocked_ioctl = video_ioctl2,
+ .mmap = vb2_fop_mmap,
+};
+
+/*
+ * VideoBuffer2 operations
+ */
+
+void fill_buffer(struct video_device_dev *dev, struct rx_buffer *buf,
+ int buf_num, unsigned long flags)
+{
+ int size = 0;
+ void *vbuf = NULL;
+
+ if (&buf->vb == NULL)
+ return;
+
+ size = vb2_plane_size(&buf->vb.vb2_buf, 0);
+ vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
+
+ if (vbuf) {
+ spin_unlock_irqrestore(&dev->slock, flags);
+
+ memcpy(vbuf, dev->dma_buf[buf_num].cpu_addr, size);
+
+ spin_lock_irqsave(&dev->slock, flags);
+
+ buf->vb.field = dev->format.fmt.pix.field;
+ buf->vb.sequence++;
+ buf->vb.vb2_buf.timestamp = ktime_get_ns();
+ }
+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
+}
+
+static void buffer_copy_process(void *param)
+{
+ struct video_device_dev *dev = (struct video_device_dev *) param;
+ unsigned long flags;
+ struct dmaqueue *dma_q = &dev->vidq;
+ struct rx_buffer *buf = NULL;
+
+ spin_lock_irqsave(&dev->slock, flags);
+
+ if (!list_empty(&dma_q->active)) {
+ buf = list_entry(dma_q->active.next, struct rx_buffer, list);
+ list_del(&buf->list);
+ fill_buffer(dev, buf, dev->last_idx, flags);
+ }
+
+ spin_unlock_irqrestore(&dev->slock, flags);
+}
+
+static inline struct rx_buffer *to_rx_buffer(struct vb2_v4l2_buffer *vb2)
+{
+ return container_of(vb2, struct rx_buffer, vb);
+}
+
+int queue_setup(struct vb2_queue *vq, unsigned int *nbuffers,
+ unsigned int *nplanes, unsigned int sizes[],
+ struct device *alloc_devs[])
+{
+ struct video_device_dev *dev = vb2_get_drv_priv(vq);
+ unsigned long size = 0;
+ int i;
+
+ size = size_image(dev);
+ if (size == 0)
+ return -EINVAL;
+
+ *nbuffers = N_BUFFERS;
+
+ for (i = 0; i < N_BUFFERS; i++) {
+ dev->dma_buf[i].cpu_addr = dma_alloc_coherent(&dev->pdev->dev,
+ size_image(dev),
+ &dev->
+ dma_buf
+ [i].dma_addr,
+ GFP_KERNEL);
+ }
+
+ *nplanes = 1;
+ sizes[0] = size;
+
+ return 0;
+}
+
+int buffer_prepare(struct vb2_buffer *vb)
+{
+ struct rx_buffer *buf = NULL;
+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+ int size = 0;
+
+ if (vb == NULL) {
+ pr_warn("%s:vb2_buffer is null\n", FUNC_NAME);
+ return 0;
+ }
+
+ buf = to_rx_buffer(vbuf);
+
+ size = vb2_plane_size(&buf->vb.vb2_buf, 0);
+ vb2_set_plane_payload(&buf->vb.vb2_buf, 0, size);
+
+ INIT_LIST_HEAD(&buf->list);
+ return 0;
+}
+
+void buffer_queue(struct vb2_buffer *vb)
+{
+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+ struct video_device_dev *dev = NULL;
+ struct rx_buffer *buf = NULL;
+ struct dmaqueue *vidq = NULL;
+ struct dma_async_tx_descriptor *desc;
+ u32 flags;
+
+ if (vb == NULL) {
+ pr_warn("%s:vb2_buffer is null\n", FUNC_NAME);
+ return;
+ }
+
+ dev = vb2_get_drv_priv(vb->vb2_queue);
+ buf = to_rx_buffer(vbuf);
+ vidq = &dev->vidq;
+
+ flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK;
+ dev->xt.dir = DMA_DEV_TO_MEM;
+ dev->xt.src_sgl = false;
+ dev->xt.dst_inc = false;
+ dev->xt.dst_sgl = true;
+ dev->xt.dst_start = dev->dma_buf[dev->idx].dma_addr;
+
+ dev->last_idx = dev->idx;
+ dev->idx++;
+ if (dev->idx >= N_BUFFERS)
+ dev->idx = 0;
+
+ dev->xt.frame_size = 1;
+ dev->sgl[0].size = bytes_per_line(dev);
+ dev->sgl[0].icg = 0;
+ dev->xt.numf = height(dev);
+
+ desc = dmaengine_prep_interleaved_dma(dev->dma, &dev->xt, flags);
+ if (!desc) {
+ pr_err("Failed to prepare DMA transfer\n");
+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
+ return;
+ }
+
+ desc->callback = buffer_copy_process;
+ desc->callback_param = dev;
+
+ spin_lock(&dev->slock);
+ list_add_tail(&buf->list, &vidq->active);
+ spin_unlock(&dev->slock);
+
+ dmaengine_submit(desc);
+
+ if (vb2_is_streaming(&dev->vb_queue))
+ dma_async_issue_pending(dev->dma);
+}
+
+int start_streaming(struct vb2_queue *vq, unsigned int count)
+{
+ struct video_device_dev *dev = vb2_get_drv_priv(vq);
+
+ dma_async_issue_pending(dev->dma);
+
+ return 0;
+}
+
+void stop_streaming(struct vb2_queue *vq)
+{
+ struct video_device_dev *dev = vb2_get_drv_priv(vq);
+ struct dmaqueue *dma_q = &dev->vidq;
+
+ /* Stop and reset the DMA engine. */
+ dmaengine_terminate_all(dev->dma);
+
+ while (!list_empty(&dma_q->active)) {
+ struct rx_buffer *buf;
+
+ buf = list_entry(dma_q->active.next, struct rx_buffer, list);
+ if (buf) {
+ list_del(&buf->list);
+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
+ }
+ }
+ list_del_init(&dev->vidq.active);
+}
+
+static const struct vb2_ops vb2_video_qops = {
+ .queue_setup = queue_setup,
+ .buf_prepare = buffer_prepare,
+ .buf_queue = buffer_queue,
+ .start_streaming = start_streaming,
+ .stop_streaming = stop_streaming,
+ .wait_prepare = vb2_ops_wait_prepare,
+ .wait_finish = vb2_ops_wait_finish,
+};
+
+static int vid_dev_subdev_s_power(struct v4l2_subdev *sd, int on)
+{
+ return 0;
+}
+
+static int vid_dev_subdev_registered(struct v4l2_subdev *sd)
+{
+ struct video_device_dev *vid_dev = v4l2_get_subdevdata(sd);
+ struct vb2_queue *q = &vid_dev->vb_queue;
+ struct video_device *vfd = &vid_dev->ve.vdev;
+ int ret;
+
+ memset(vfd, 0, sizeof(*vfd));
+
+ snprintf(vfd->name, sizeof(vfd->name), VIDEO_DEVICE_NAME);
+
+ vfd->fops = &vid_dev_fops;
+ vfd->ioctl_ops = &vid_dev_ioctl_ops;
+ vfd->v4l2_dev = sd->v4l2_dev;
+ vfd->minor = -1;
+ vfd->release = video_device_release_empty;
+ vfd->queue = q;
+
+ INIT_LIST_HEAD(&vid_dev->vidq.active);
+ init_waitqueue_head(&vid_dev->vidq.wq);
+ memset(q, 0, sizeof(*q));
+ q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ q->io_modes = VB2_MMAP | VB2_USERPTR;
+ q->ops = &vb2_video_qops;
+ q->mem_ops = &vb2_vmalloc_memops;
+ q->buf_struct_size = sizeof(struct rx_buffer);
+ q->drv_priv = vid_dev;
+ q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
+ q->lock = &vid_dev->lock;
+
+ ret = vb2_queue_init(q);
+ if (ret < 0)
+ return ret;
+
+ vid_dev->vd_pad.flags = MEDIA_PAD_FL_SINK;
+ ret = media_entity_pads_init(&vfd->entity, 1, &vid_dev->vd_pad);
+ if (ret < 0)
+ return ret;
+
+ video_set_drvdata(vfd, vid_dev);
+ vid_dev->ve.pipe = v4l2_get_subdev_hostdata(sd);
+
+ ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
+ if (ret < 0) {
+ media_entity_cleanup(&vfd->entity);
+ vid_dev->ve.pipe = NULL;
+ return ret;
+ }
+
+ v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
+ vfd->name, video_device_node_name(vfd));
+ return 0;
+}
+
+static void vid_dev_subdev_unregistered(struct v4l2_subdev *sd)
+{
+ struct video_device_dev *vid_dev = v4l2_get_subdevdata(sd);
+
+ if (vid_dev == NULL)
+ return;
+
+ mutex_lock(&vid_dev->lock);
+
+ if (video_is_registered(&vid_dev->ve.vdev)) {
+ video_unregister_device(&vid_dev->ve.vdev);
+ media_entity_cleanup(&vid_dev->ve.vdev.entity);
+ vid_dev->ve.pipe = NULL;
+ }
+
+ mutex_unlock(&vid_dev->lock);
+}
+
+static const struct v4l2_subdev_internal_ops vid_dev_subdev_internal_ops = {
+ .registered = vid_dev_subdev_registered,
+ .unregistered = vid_dev_subdev_unregistered,
+};
+
+static const struct v4l2_subdev_core_ops vid_dev_subdev_core_ops = {
+ .s_power = vid_dev_subdev_s_power,
+};
+
+static struct v4l2_subdev_ops vid_dev_subdev_ops = {
+ .core = &vid_dev_subdev_core_ops,
+};
+
+static int vid_dev_create_capture_subdev(struct video_device_dev *vid_dev)
+{
+ struct v4l2_subdev *sd = &vid_dev->subdev;
+ int ret;
+
+ v4l2_subdev_init(sd, &vid_dev_subdev_ops);
+ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ snprintf(sd->name, sizeof(sd->name), "Capture device");
+
+ vid_dev->subdev_pads[VIDEO_DEV_SD_PAD_SINK_CSI].flags =
+ MEDIA_PAD_FL_SOURCE;
+ vid_dev->subdev_pads[VIDEO_DEV_SD_PAD_SOURCE_DMA].flags =
+ MEDIA_PAD_FL_SINK;
+ ret =
+ media_entity_pads_init(&sd->entity, VIDEO_DEV_SD_PADS_NUM,
+ vid_dev->subdev_pads);
+ if (ret)
+ return ret;
+
+ sd->internal_ops = &vid_dev_subdev_internal_ops;
+ sd->entity.ops = &vid_dev_subdev_media_ops;
+ sd->owner = THIS_MODULE;
+ v4l2_set_subdevdata(sd, vid_dev);
+
+ return 0;
+}
+
+static void vid_dev_unregister_subdev(struct video_device_dev *vid_dev)
+{
+ struct v4l2_subdev *sd = &vid_dev->subdev;
+
+ v4l2_device_unregister_subdev(sd);
+ media_entity_cleanup(&sd->entity);
+ v4l2_set_subdevdata(sd, NULL);
+}
+
+static const struct of_device_id vid_dev_of_match[];
+
+static int vid_dev_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ const struct of_device_id *of_id;
+ int ret = 0;
+ struct video_device_dev *vid_dev;
+
+ dev_info(dev, "Installing IPK Video Device module\n");
+
+ if (!dev->of_node)
+ return -ENODEV;
+
+ vid_dev = devm_kzalloc(dev, sizeof(*vid_dev), GFP_KERNEL);
+ if (!vid_dev)
+ return -ENOMEM;
+
+ of_id = of_match_node(vid_dev_of_match, dev->of_node);
+ if (WARN_ON(of_id == NULL))
+ return -EINVAL;
+
+ vid_dev->pdev = pdev;
+
+ spin_lock_init(&vid_dev->slock);
+ mutex_init(&vid_dev->lock);
+
+ dev_info(&pdev->dev, "Requesting DMA\n");
+ vid_dev->dma = dma_request_slave_channel(&pdev->dev, "vdma0");
+ if (vid_dev->dma == NULL) {
+ dev_err(&pdev->dev, "no VDMA channel found\n");
+ ret = -ENODEV;
+ goto end;
+ }
+
+ ret = vid_dev_create_capture_subdev(vid_dev);
+ if (ret)
+ goto end;
+
+ platform_set_drvdata(pdev, vid_dev);
+
+ dev_info(dev, "Video Device registered successfully\n");
+ return 0;
+end:
+ dev_err(dev, "Video Device not registered!!\n");
+ return ret;
+}
+
+static int vid_dev_remove(struct platform_device *pdev)
+{
+ struct video_device_dev *dev = platform_get_drvdata(pdev);
+
+ vid_dev_unregister_subdev(dev);
+ dev_info(&pdev->dev, "Driver removed\n");
+
+ return 0;
+}
+
+static const struct of_device_id vid_dev_of_match[] = {
+ {.compatible = "snps,video-device"},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, vid_dev_of_match);
+
+static struct platform_driver __refdata vid_dev_pdrv = {
+ .remove = vid_dev_remove,
+ .probe = vid_dev_probe,
+ .driver = {
+ .name = VIDEO_DEVICE_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = vid_dev_of_match,
+ },
+};
+
+module_platform_driver(vid_dev_pdrv);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Driver for configuring DMA and Video Device");
diff --git a/drivers/media/platform/dwc/video_device.h b/drivers/media/platform/dwc/video_device.h
new file mode 100644
index 0000000..e828d4b
--- /dev/null
+++ b/drivers/media/platform/dwc/video_device.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef VIDEO_DEVICE_H_
+#define VIDEO_DEVICE_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/delay.h>
+#include <linux/list.h>
+#include <linux/wait.h>
+#include <linux/string.h>
+#include <linux/videodev2.h>
+#include <linux/dma/xilinx_dma.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-fh.h>
+#include <media/v4l2-common.h>
+#include <media/videobuf2-vmalloc.h>
+#include <media/media-entity.h>
+#include <linux/io.h>
+
+#include "plat_ipk_video.h"
+
+#define N_BUFFERS 3
+
+#define VIDEO_DEVICE_NAME "video-device"
+
+#define FUNC_NAME __func__
+
+struct rx_buffer {
+ /** @short Buffer for video frames */
+ struct vb2_v4l2_buffer vb;
+ struct list_head list;
+
+ dma_addr_t dma_addr;
+ void *cpu_addr;
+};
+
+struct dmaqueue {
+ struct list_head active;
+ wait_queue_head_t wq;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct video_device_dev {
+ struct platform_device *pdev;
+ struct v4l2_device *v4l2_dev;
+ struct v4l2_subdev subdev;
+ struct media_pad vd_pad;
+ struct media_pad subdev_pads[VIDEO_DEV_SD_PADS_NUM];
+ struct mutex lock;
+ spinlock_t slock;
+ struct plat_ipk_video_entity ve;
+ struct v4l2_format format;
+ struct v4l2_pix_format pix_format;
+ const struct plat_ipk_fmt *fmt;
+ unsigned long *alloc_ctx;
+
+ /* Buffer and DMA */
+ struct vb2_queue vb_queue;
+ int idx;
+ int last_idx;
+ struct dmaqueue vidq;
+ struct rx_buffer dma_buf[N_BUFFERS];
+ struct dma_chan *dma;
+ struct dma_interleaved_template xt;
+ struct data_chunk sgl[1];
+};
+
+/**
+ * @short Defines to simplify the code reading
+ */
+
+#define pixel_format(dev) \
+ dev->format.fmt.pix.pixelformat
+#define bytes_per_line(dev) \
+ dev->format.fmt.pix.bytesperline
+#define width(dev) \
+ dev->format.fmt.pix.width
+#define height(dev) \
+ dev->format.fmt.pix.height
+#define size_image(dev) \
+ dev->format.fmt.pix.sizeimage
+
+const struct plat_ipk_fmt *vid_dev_find_format(struct v4l2_format *f,
+ int index);
+
+#endif /* VIDEO_DEVICE_H_ */
--
2.10.2
^ permalink raw reply related
* Re: [PATCH v5 3/3] clocksource: Add clockevent support to NPS400 driver
From: Daniel Lezcano @ 2016-11-14 14:34 UTC (permalink / raw)
To: Noam Camus
Cc: robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <DB6PR0501MB25183C670A48F44DB916D7FEAABC0@DB6PR0501MB2518.eurprd05.prod.outlook.com>
On Mon, Nov 14, 2016 at 01:58:15PM +0000, Noam Camus wrote:
> > From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org]
> > Sent: Monday, November 14, 2016 1:23 PM
>
>
> >> + */
> >> +static void nps_clkevent_rm_thread(bool remove_thread) {
> >> + unsigned int cflags;
> >> + unsigned int enabled_threads = 0;
> >> + int thread;
> >> +
> >> + hw_schd_save(&cflags);
>
> >I'm not used with hardware scheduling. Can you explain why this is needed
> >here ? What >window race we want to close ?
> We are using HW scheduling off/on in order to keep consistency of auxiliary
> registers shared among HW threads within the same core. Example to such
> registers NPS_REG_TIMER0_TSI and NPS_REG_TIMER0_CTRL. Since update procedure
> of these registers is not atomic we use save/restore macros to turn off/on
> the HW scheduling. This way we insure that no HW scheduling occurs and
> another HW thread (represented as another CPU) will execute in this same
> critical code path. If we take for example nps_clkevent_add_thread() we can
> see that we are doing some read modify write to NPS_REG_TIMER0_TSI and
> optionally writing to NPS_REG_TIMER0_CTRL. This flow should be atomic and is
> protected by our save/restore macros. Do note that interrupts are disabled
> at this point so we are safe from all asynchronous events.
The function nps_clkevent_timer_event_setup() writes into the NPS_REG_TIMER0_CTRL
register but there is no critical section there. What prevents another HW thread
to write this register at the same time ?
I do believe we have a framework to access shared registers, otherwise a simple
spinlock would be simpler and perhaps faster than disabling the entire hardware
scheduling for the system, no ?
> >> +static void nps_clkevent_add_thread(bool set_event) {
> >> + int thread;
> >> + unsigned int cflags, enabled_threads;
> >> +
> >> + hw_schd_save(&cflags);
> >> +
> >> + /* add thread to TSI1 */
> >> + thread = read_aux_reg(CTOP_AUX_THREAD_ID);
> >> + enabled_threads = read_aux_reg(NPS_REG_TIMER0_TSI);
> >> + enabled_threads |= (1 << thread);
> >> + write_aux_reg(NPS_REG_TIMER0_TSI, enabled_threads);
> >> +
> >> + /* set next timer event */
> >> + if (set_event)
> >> + write_aux_reg(NPS_REG_TIMER0_CTRL,
> >> + TIMER0_CTRL_IE | TIMER0_CTRL_NH);
> >> +
> >> + hw_schd_restore(cflags);
> >> +}
>
> >Not sure the boolean parameters for *_rm_thread and *_add_thread helps to
> >clarify the code. Depending on the race window with hw_schd_save/restore We
> >should be able to simplify it.
> I am not sure I am following you here, how race window may simplify this
> code? If those routines will get no parameter I can't determine when to add
> or not (same as remove). ...
Regarding the comment I did above, it is possible the critical section is
reduced and moved into the shutdown function. Thus, the boolean wouldn't be
needed anymore, well that is conditional to the above comment. Discard the
comment for the moment, until the hw sched vs spinlock vs NPS_REG_TIMER0_CTRL
is sorted out.
> >> +static DEFINE_PER_CPU(struct clock_event_device, nps_clockevent_device) = {
> >> + .name = "NPS Timer0",
> >> + .features = CLOCK_EVT_FEAT_ONESHOT |
> >> + CLOCK_EVT_FEAT_PERIODIC,
> >> + .rating = 300,
> >> + .set_next_event = nps_clkevent_set_next_event,
> >> + .set_state_periodic = nps_clkevent_set_periodic,
> >> + .set_state_oneshot = nps_clkevent_set_oneshot,
> >> + .set_state_oneshot_stopped = nps_clkevent_timer_shutdown,
> >> + .set_state_shutdown = nps_clkevent_timer_shutdown,
>
> >Doesn't set_state_shutdown and set_state_oneshot_stopped need to remove the HW thread from the TSI ?
> You are correct, I will fix that.
And tick_resume. Perhaps, that is the reason why NO_HZ hangs.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* [PATCH v5 4/5] USB: ohci: da8xx: Add devicetree bindings
From: Axel Haslam @ 2016-11-14 14:41 UTC (permalink / raw)
To: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz,
khilman-DgEjT+Ai2ygdnm+yROfE0A, kishon-l0cyMroinI0
Cc: linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Axel Haslam,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20161114144103.12120-1-ahaslam-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
This patch documents the device tree bindings required for
the ohci controller found in TI da8xx family of SoC's
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Axel Haslam <ahaslam-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
.../devicetree/bindings/usb/ohci-da8xx.txt | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/ohci-da8xx.txt
diff --git a/Documentation/devicetree/bindings/usb/ohci-da8xx.txt b/Documentation/devicetree/bindings/usb/ohci-da8xx.txt
new file mode 100644
index 0000000..2dc8f67
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ohci-da8xx.txt
@@ -0,0 +1,23 @@
+DA8XX USB OHCI controller
+
+Required properties:
+
+ - compatible: Should be "ti,da830-ohci"
+ - reg: Should contain one register range i.e. start and length
+ - interrupts: Description of the interrupt line
+ - phys: Phandle for the PHY device
+ - phy-names: Should be "usb-phy"
+
+Optional properties:
+ - vbus-supply: phandle of regulator that controls vbus power / over-current
+
+Example:
+
+ohci: usb@0225000 {
+ compatible = "ti,da830-ohci";
+ reg = <0x225000 0x1000>;
+ interrupts = <59>;
+ phys = <&usb_phy 1>;
+ phy-names = "usb-phy";
+ vbus-supply = <®_usb_ohci>;
+};
--
2.10.1
--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH resend 0/1] input: touchscreen: silead: Add regulator support
From: Hans de Goede @ 2016-11-14 14:45 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring
Cc: linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree
Hi Dmitri,
This one seems to have fallen through the cracks, can you pick it up
please ?
Regards,
Hans
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH resend] input: touchscreen: silead: Add regulator support
From: Hans de Goede @ 2016-11-14 14:45 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring
Cc: linux-input, linux-arm-kernel, devicetree, Hans de Goede
In-Reply-To: <20161114144502.10595-1-hdegoede@redhat.com>
On some tablets the touchscreen controller is powered by seperate
regulators, add support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/input/touchscreen/silead_gsl1680.txt | 2 +
drivers/input/touchscreen/silead.c | 51 ++++++++++++++++++++--
2 files changed, 49 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
index e844c3f..b726823 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
@@ -22,6 +22,8 @@ Optional properties:
- touchscreen-inverted-y : See touchscreen.txt
- touchscreen-swapped-x-y : See touchscreen.txt
- silead,max-fingers : maximum number of fingers the touchscreen can detect
+- vddio-supply : regulator phandle for controller VDDIO
+- avdd-supply : regulator phandle for controller AVDD
Example:
diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c
index f502c84..c6a1ae9 100644
--- a/drivers/input/touchscreen/silead.c
+++ b/drivers/input/touchscreen/silead.c
@@ -29,6 +29,7 @@
#include <linux/input/touchscreen.h>
#include <linux/pm.h>
#include <linux/irq.h>
+#include <linux/regulator/consumer.h>
#include <asm/unaligned.h>
@@ -72,6 +73,8 @@ enum silead_ts_power {
struct silead_ts_data {
struct i2c_client *client;
struct gpio_desc *gpio_power;
+ struct regulator *vddio;
+ struct regulator *avdd;
struct input_dev *input;
char fw_name[64];
struct touchscreen_properties prop;
@@ -465,21 +468,52 @@ static int silead_ts_probe(struct i2c_client *client,
if (client->irq <= 0)
return -ENODEV;
+ data->vddio = devm_regulator_get_optional(dev, "vddio");
+ if (IS_ERR(data->vddio)) {
+ if (PTR_ERR(data->vddio) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ data->vddio = NULL;
+ }
+
+ data->avdd = devm_regulator_get_optional(dev, "avdd");
+ if (IS_ERR(data->avdd)) {
+ if (PTR_ERR(data->avdd) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ data->avdd = NULL;
+ }
+
+ /*
+ * Enable regulators at probe and disable them at remove, we need
+ * to keep the chip powered otherwise it forgets its firmware.
+ */
+ if (data->vddio) {
+ error = regulator_enable(data->vddio);
+ if (error)
+ return error;
+ }
+
+ if (data->avdd) {
+ error = regulator_enable(data->avdd);
+ if (error)
+ goto disable_vddio;
+ }
+
/* Power GPIO pin */
data->gpio_power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW);
if (IS_ERR(data->gpio_power)) {
if (PTR_ERR(data->gpio_power) != -EPROBE_DEFER)
dev_err(dev, "Shutdown GPIO request failed\n");
- return PTR_ERR(data->gpio_power);
+ error = PTR_ERR(data->gpio_power);
+ goto disable_avdd;
}
error = silead_ts_setup(client);
if (error)
- return error;
+ goto disable_avdd;
error = silead_ts_request_input_dev(data);
if (error)
- return error;
+ goto disable_avdd;
error = devm_request_threaded_irq(dev, client->irq,
NULL, silead_ts_threaded_irq_handler,
@@ -487,10 +521,19 @@ static int silead_ts_probe(struct i2c_client *client,
if (error) {
if (error != -EPROBE_DEFER)
dev_err(dev, "IRQ request failed %d\n", error);
- return error;
+ goto disable_avdd;
}
return 0;
+
+disable_avdd:
+ if (data->avdd)
+ regulator_disable(data->avdd);
+disable_vddio:
+ if (data->vddio)
+ regulator_disable(data->vddio);
+
+ return error;
}
static int __maybe_unused silead_ts_suspend(struct device *dev)
--
2.9.3
^ permalink raw reply related
* Re: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399
From: Heiko Stuebner @ 2016-11-14 14:45 UTC (permalink / raw)
To: Caesar Wang
Cc: eddie.cai-TNX95d0MmH7DzftRWevZcw, tfiga-F7+t8E8rja9g9hUCZPvPmw,
Ziyuan Xu, Elaine Zhang, Douglas Anderson, David Wu, Jianqun Xu,
Yakir Yang, Brian Norris, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Will Deacon,
Mark Rutland, Catalin Marinas,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1478697721-2323-2-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Mittwoch, 9. November 2016, 21:21:53 CET schrieb Caesar Wang:
> From: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> Control power domain for eMMC via genpd to reduce power consumption.
>
> Signed-off-by: Elaine Zhang <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Authorship / Signed-off mismatch. From above suggest Ziyuan is the author
while first Signed-off-by indicates Elaine as author. Please clarify.
Thanks
Heiko
> ---
>
> Changes in v2:
> - Reviewed-on: https://chromium-review.googlesource.com/376558
> - Verified on ChromeOS kernel4.4
>
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index cbb7f8b..b401176 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -269,6 +269,7 @@
> #clock-cells = <0>;
> phys = <&emmc_phy>;
> phy-names = "phy_arasan";
> + power-domains = <&power RK3399_PD_EMMC>;
> status = "disabled";
> };
>
> @@ -690,6 +691,11 @@
> status = "disabled";
> };
>
> + qos_emmc: qos@ffa58000 {
> + compatible = "syscon";
> + reg = <0x0 0xffa58000 0x0 0x20>;
> + };
> +
> qos_gmac: qos@ffa5c000 {
> compatible = "syscon";
> reg = <0x0 0xffa5c000 0x0 0x20>;
> @@ -823,6 +829,11 @@
> };
>
> /* These power domains are grouped by VD_LOGIC */
> + pd_emmc@RK3399_PD_EMMC {
> + reg = <RK3399_PD_EMMC>;
> + clocks = <&cru ACLK_EMMC>;
> + pm_qos = <&qos_emmc>;
> + };
> pd_gmac@RK3399_PD_GMAC {
> reg = <RK3399_PD_GMAC>;
> clocks = <&cru ACLK_GMAC>;
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH 1/2] Add Documentation for Media Device, Video Device, and Synopsys DW MIPI CSI-2 Host
From: Laurent Pinchart @ 2016-11-14 14:49 UTC (permalink / raw)
To: Ramiro Oliveira
Cc: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
linux-media, davem, gregkh, geert+renesas, akpm, linux, hverkuil,
laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA
In-Reply-To: <160acd0770e0685330ba8e7445423c1d6f34658e.1479132355.git.roliveir@synopsys.com>
Hi Ramiro,
Thank you for the patch.
On Monday 14 Nov 2016 14:20:22 Ramiro Oliveira wrote:
> Add documentation for Media and Video Device, as well as the DW MIPI CSI-2
> Host.
>
> Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
> ---
> .../devicetree/bindings/media/snps,dw-mipi-csi.txt | 27 +++++++++++++++++++
> .../devicetree/bindings/media/snps,plat-ipk.txt | 9 ++++++++
> .../bindings/media/snps,video-device.txt | 12 ++++++++++
> 3 files changed, 48 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt create mode
> 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt create
> mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
>
> diff --git a/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
> b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt new file
> mode 100644
> index 0000000..bec7441
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
> @@ -0,0 +1,27 @@
> +Synopsys DesignWare CSI-2 Host controller
> +
> +Description
> +-----------
> +
> +This HW block is used to receive image coming from an MIPI CSI-2 compatible
> +camera.
And what does it do after receiving the stream ? A more detailed description
would be useful. Is there any public documentation for this IP core ?
> +Required properties:
> +- compatible: shall be "snps,dw-mipi-csi"
> +- reg : physical base address and size of the device memory
mapped
> + registers;
> +- interrupts : CSI-2 Host interrupt
> +- data-lanes : Number of lanes to be used
Is that fixed at synthesis time or configurable at runtime ?
> +- output-type : Core output to be used (IPI-> 0 or IDI->1 or BOTH->2)
What are IPI and IDI ?
> +- phys, phy-names: List of one PHY specifier and identifier string (as
> defined
> + in Documentation/devicetree/bindings/phy/phy-bindings.txt).
A PHY for what ?
> +Optional properties(if in IPI mode):
> +- ipi-mode : Mode to be used when in IPI(Camera -> 0 or Automatic -> 1)
> +- ipi-color-mode: Color depth to be used in IPI (48 bits -> 0 or 16 bits ->
> 1)
> +- ipi-auto-flush: Data auto-flush (1 -> Yes or 0 -> No)
> +- virtual-channel: Virtual channel where data is present when in IPI
We need more details than that, this is impossible to review, sorry.
> +The per-board settings:
> + - port sub-node describing a single endpoint connected to the dw-mipi-csi
> + as described in video-interfaces.txt[1].
An example would be nice.
> diff --git a/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
> b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt new file mode
> 100644
> index 0000000..2d51541
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
> @@ -0,0 +1,9 @@
> +Synopsys DesignWare CSI-2 Host IPK Media Device
> +
> +This Media Device at the moment is not totally functional, however it is a
> base
> +for the future.
Then let's add it later :-) We don't want to design incomplete transient DT
bindings.
> +Required properties:
> +
> +- compatible: Must be "snps,plat-ipk".
> +
> diff --git a/Documentation/devicetree/bindings/media/snps,video-device.txt
> b/Documentation/devicetree/bindings/media/snps,video-device.txt new file
> mode 100644
> index 0000000..d467092
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/snps,video-device.txt
> @@ -0,0 +1,12 @@
> +Synopsys DesignWare CSI-2 Host video device
> +
> +This driver handles all the video handling part of this platform.
This is a DT binding documentation, drivers are irrelevant. You should
describe the hardware only.
More information is needed, based on this document I can't tell what the
"CSI-2 host video device" is.
> +Required properties:
> +
> +- compatible: Must be "snps,video-device".
> +
> +- dmas, dma-names: List of one DMA specifier and identifier string (as
> defined
> + in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
> + requires a DMA channel with the identifier string set to "port" followed
> by
> + the port index.
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH RFC] ARM: dts: add support for Turris Omnia
From: tomas.hlavacek @ 2016-11-14 14:51 UTC (permalink / raw)
To: Andrew Lunn
Cc: Uwe Kleine-König, Mark Rutland, Jason Cooper,
Martin Strba??ka, devicetree, Rob Herring, Gregory Clement,
linux-arm-kernel, Sebastian Hesselbarth
In-Reply-To: <20161114131010.GC26710@lunn.ch>
[-- Attachment #1: Type: text/plain, Size: 2115 bytes --]
Hi Andrew!
On Mon, Nov 14, 2016 at 2:10 PM, Andrew Lunn <andrew@lunn.ch> wrote:
>> Actually SFP is connected to SGMII interface of eth1, which is
>> routed through SERDES 5.
>
> You say eth1 here. Yet lower down you say got eth0 and eth1 are
> connected to the switch?
Oh sorry, this was a NIC name based on probing order derived from base
address of NIC registers:
eth1: ethernet@30000 - probes as eth0
eth2: ethernet@34000 - probes as eth1
eth0: ethernet@70000 - probes as eth2
It is a bit confusing. I meant eth2 in DTS. Sorry.
>
>
>> We have our proprietary support hacked onto mvneta driver for
>> disconnecting PHY on the fly. It is a bit nasty, so I suggest to
>> ignore SFP in this DTS altogether and let's wait till "phylink based
>> SFP module support" or something alike hits upstream, so we can base
>> the SFP support on solid code;
>
> It would be great if you could work on getting the phylink patches
> into mainline. It is something i have wanted to do for a long time,
> but it is too low down on my priority list to get to. The code is high
> quality, so i don't think there will be too many issues. It probably
> just needs splitting up into smaller batches, submitting, and working
> on any comments.
That is exactly what I thought when I saw the patches for the first
time. I will try to merge the patches to the current kernel and see
what happens. I still need to learn a lot about PHY subsystem.
>
>
>> Actually eth0 and eth1 (both are RGMII) are connected to the 88E6176
>> switch. The problem is that from what I have read so far the switch
>> can not operate in DSA mode with two CPU ports.
>
> Again, this is something i wanted to do, and i did have a prototype at
> one point. But again, not enough time. If you have resources to work
> on this, i can find my code, explain my ideas, and let you complete
> it.
I am definitely interested, though I didn't have time to read and
absorb DSA yet, but I definitely want to try to hack 88E6176 support. I
would be really grateful if you can provide some pointers and/or code
to start from.
Thanks,
Tomas
[-- Attachment #2: Type: text/html, Size: 2787 bytes --]
^ permalink raw reply
* Re: [PATCH v2 5/9] arm64: dts: rockchip: add backlight support for rk3399 evb board
From: Heiko Stuebner @ 2016-11-14 14:53 UTC (permalink / raw)
To: Caesar Wang
Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Arnd Bergmann,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Frank Wang,
Catalin Marinas, Shawn Lin, Will Deacon,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, tfiga-F7+t8E8rja9g9hUCZPvPmw,
Masahiro Yamada, Rob Herring, eddie.cai-TNX95d0MmH7DzftRWevZcw,
Roger Chen, Yakir Yang, Jianqun Xu,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1478697721-2323-6-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Mittwoch, 9. November 2016, 21:21:57 CET schrieb Caesar Wang:
> From: Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> Add backlight node for evb board, perpare for panel device node.
>
> Signed-off-by: Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
applied to my dts64 branch
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH RFC] ARM: dts: add support for Turris Omnia
From: tomas.hlavacek @ 2016-11-14 14:59 UTC (permalink / raw)
To: Andrew Lunn
Cc: Mark Rutland, Martin Strba??ka, Jason Cooper,
Uwe Kleine-König, devicetree, Rob Herring, Gregory Clement,
linux-arm-kernel, Sebastian Hesselbarth
In-Reply-To: <20161114131010.GC26710@lunn.ch>
Hi Andrew!
(Sorry for re-posting the previous e-mail, that most likely didn't get
through.)
On Mon, Nov 14, 2016 at 2:10 PM, Andrew Lunn <andrew@lunn.ch> wrote:
>> Actually SFP is connected to SGMII interface of eth1, which is
>> routed through SERDES 5.
>
> You say eth1 here. Yet lower down you say got eth0 and eth1 are
> connected to the switch?
Oh sorry, this was a NIC name based on probing order derived from base
address of NIC registers:
eth1: ethernet@30000 - probes as eth0
eth2: ethernet@34000 - probes as eth1
eth0: ethernet@70000 - probes as eth2
It is a bit confusing. I meant eth2 in DTS. Sorry.
>
>
>> We have our proprietary support hacked onto mvneta driver for
>> disconnecting PHY on the fly. It is a bit nasty, so I suggest to
>> ignore SFP in this DTS altogether and let's wait till "phylink based
>> SFP module support" or something alike hits upstream, so we can base
>> the SFP support on solid code;
>
> It would be great if you could work on getting the phylink patches
> into mainline. It is something i have wanted to do for a long time,
> but it is too low down on my priority list to get to. The code is high
> quality, so i don't think there will be too many issues. It probably
> just needs splitting up into smaller batches, submitting, and working
> on any comments.
That is exactly what I thought when I saw the patches for the first
time. I will try to merge the patches to the current kernel and see
what happens. I still need to learn a lot about PHY subsystem.
>
>
>> Actually eth0 and eth1 (both are RGMII) are connected to the 88E6176
>> switch. The problem is that from what I have read so far the switch
>> can not operate in DSA mode with two CPU ports.
>
> Again, this is something i wanted to do, and i did have a prototype at
> one point. But again, not enough time. If you have resources to work
> on this, i can find my code, explain my ideas, and let you complete
> it.
I am definitely interested, though I didn't have time to read and
absorb DSA yet, but I definitely want to try to hack 88E6176 support. I
would be really grateful if you can provide some pointers and/or code
to start from.
Thanks,
Tomas
^ permalink raw reply
* Re: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399
From: Caesar Wang @ 2016-11-14 15:01 UTC (permalink / raw)
To: Heiko Stuebner
Cc: Caesar Wang, Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA,
Elaine Zhang, Catalin Marinas, Brian Norris, Ziyuan Xu,
Will Deacon, Douglas Anderson, Rob Herring,
tfiga-F7+t8E8rja9g9hUCZPvPmw, open list:ARM/Rockchip SoC...,
eddie.cai-TNX95d0MmH7DzftRWevZcw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, David Wu,
Jianqun Xu, linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <2342292.tK2jqRKrXH@phil>
On 2016年11月14日 22:45, Heiko Stuebner wrote:
> Am Mittwoch, 9. November 2016, 21:21:53 CET schrieb Caesar Wang:
>> From: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>>
>> Control power domain for eMMC via genpd to reduce power consumption.
>>
>> Signed-off-by: Elaine Zhang <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Authorship / Signed-off mismatch. From above suggest Ziyuan is the author
> while first Signed-off-by indicates Elaine as author. Please clarify.
I believe the Elaine is the first author. Sorry for this kind of
question to brother you again. :(
-
Caesar
>
> Thanks
> Heiko
>
>> ---
>>
>> Changes in v2:
>> - Reviewed-on: https://chromium-review.googlesource.com/376558
>> - Verified on ChromeOS kernel4.4
>>
>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index cbb7f8b..b401176 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -269,6 +269,7 @@
>> #clock-cells = <0>;
>> phys = <&emmc_phy>;
>> phy-names = "phy_arasan";
>> + power-domains = <&power RK3399_PD_EMMC>;
>> status = "disabled";
>> };
>>
>> @@ -690,6 +691,11 @@
>> status = "disabled";
>> };
>>
>> + qos_emmc: qos@ffa58000 {
>> + compatible = "syscon";
>> + reg = <0x0 0xffa58000 0x0 0x20>;
>> + };
>> +
>> qos_gmac: qos@ffa5c000 {
>> compatible = "syscon";
>> reg = <0x0 0xffa5c000 0x0 0x20>;
>> @@ -823,6 +829,11 @@
>> };
>>
>> /* These power domains are grouped by VD_LOGIC */
>> + pd_emmc@RK3399_PD_EMMC {
>> + reg = <RK3399_PD_EMMC>;
>> + clocks = <&cru ACLK_EMMC>;
>> + pm_qos = <&qos_emmc>;
>> + };
>> pd_gmac@RK3399_PD_GMAC {
>> reg = <RK3399_PD_GMAC>;
>> clocks = <&cru ACLK_GMAC>;
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
--
caesar wang | software engineer | wxt-TNX95d0MmH73oGB3hsPCZA@public.gmane.org
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399
From: Caesar Wang @ 2016-11-14 15:05 UTC (permalink / raw)
To: Shawn Lin
Cc: Caesar Wang, Heiko Stuebner, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA, Brian Norris,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Catalin Marinas,
Elaine Zhang, Will Deacon, Douglas Anderson,
tfiga-F7+t8E8rja9g9hUCZPvPmw,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring,
eddie.cai-TNX95d0MmH7DzftRWevZcw, David Wu, Jianqun Xu,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Ziyuan Xu
In-Reply-To: <bce1a5eb-fbb3-9ed9-46b9-72a95eefed3e-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
On 2016年11月12日 12:22, Shawn Lin wrote:
> On 2016/11/9 21:21, Caesar Wang wrote:
>> From: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>>
>> Control power domain for eMMC via genpd to reduce power consumption.
>>
>> Signed-off-by: Elaine Zhang <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> It was verified on my rk3399 evb with kernel4.4, so
> free feel to add my tag,
>
> Tested-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
Thanks the tests.
> BTW, it seems my reply is bounced form Yakir's address, so please
> remove him from CC list if he changed his mail address.
Right, Yakir's (ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org) address had left this world.;-)
But the patman tool is auto sending with the Cc people.
-
Caesar
>
>> ---
>>
>> Changes in v2:
>> - Reviewed-on: https://chromium-review.googlesource.com/376558
>> - Verified on ChromeOS kernel4.4
>>
>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index cbb7f8b..b401176 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -269,6 +269,7 @@
>> #clock-cells = <0>;
>> phys = <&emmc_phy>;
>> phy-names = "phy_arasan";
>> + power-domains = <&power RK3399_PD_EMMC>;
>> status = "disabled";
>> };
>>
>> @@ -690,6 +691,11 @@
>> status = "disabled";
>> };
>>
>> + qos_emmc: qos@ffa58000 {
>> + compatible = "syscon";
>> + reg = <0x0 0xffa58000 0x0 0x20>;
>> + };
>> +
>> qos_gmac: qos@ffa5c000 {
>> compatible = "syscon";
>> reg = <0x0 0xffa5c000 0x0 0x20>;
>> @@ -823,6 +829,11 @@
>> };
>>
>> /* These power domains are grouped by VD_LOGIC */
>> + pd_emmc@RK3399_PD_EMMC {
>> + reg = <RK3399_PD_EMMC>;
>> + clocks = <&cru ACLK_EMMC>;
>> + pm_qos = <&qos_emmc>;
>> + };
>> pd_gmac@RK3399_PD_GMAC {
>> reg = <RK3399_PD_GMAC>;
>> clocks = <&cru ACLK_GMAC>;
>>
>
>
--
caesar wang | software engineer | wxt-TNX95d0MmH73oGB3hsPCZA@public.gmane.org
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* RE: [PATCH v5 3/3] clocksource: Add clockevent support to NPS400 driver
From: Noam Camus @ 2016-11-14 15:17 UTC (permalink / raw)
To: Daniel Lezcano
Cc: robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <20161114143454.GE2016@mai>
> From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org]
> Sent: Monday, November 14, 2016 4:35 PM
>The function nps_clkevent_timer_event_setup() writes into the NPS_REG_TIMER0_CTRL register but there is no critical section there. What prevents another HW thread to write this register at the same time ?
Correct, during my last email to you I noticed that fact and already started fixing it.
>I do believe we have a framework to access shared registers, otherwise a simple spinlock would be simpler and perhaps faster than disabling the entire hardware scheduling for the system, no ?
When you are saying "we have a framework" do you mean to some generic framework in the kernel?
Anyway to my understanding I cannot guarantee this atomics during my routines without preventing HW from changing the HW thread this core executes.
As SW I am not aware to such HW scheduling, It is much same as with interrupts that we disable them when we reach code that might be shared by the interrupt handler.
>Regarding the comment I did above, it is possible the critical section is reduced and moved into the shutdown function. Thus, the boolean wouldn't be needed anymore, well that is conditional to the above comment. Discard the comment for the moment, until the hw sched vs spinlock vs NPS_REG_TIMER0_CTRL is sorted out.
OK, I will discard that in the meantime.
...
>> >> + .set_state_shutdown = nps_clkevent_timer_shutdown,
>>
>> >Doesn't set_state_shutdown and set_state_oneshot_stopped need to remove the HW thread from the TSI ?
>> You are correct, I will fix that.
>And tick_resume. Perhaps, that is the reason why NO_HZ hangs.
What NO_HZ hang are you referring to in this case?
How calling nps_clkevent_rm_thread() explain such hang?
Anyway I agree, and will add nps_clkevent_rm_thread() to tick_resume.
Appreciating your effort and will gladly provide any more information needed about our SoC.
-Noam
^ permalink raw reply
* Re: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399
From: Heiko Stuebner @ 2016-11-14 15:26 UTC (permalink / raw)
To: Caesar Wang
Cc: Mark Rutland, devicetree, Elaine Zhang, Catalin Marinas,
Brian Norris, Ziyuan Xu, Will Deacon, Douglas Anderson,
Rob Herring, tfiga, open list:ARM/Rockchip SoC..., eddie.cai,
linux-arm-kernel, David Wu, Jianqun Xu, linux-kernel
In-Reply-To: <5829D1C7.9020105@rock-chips.com>
Am Montag, 14. November 2016, 23:01:27 CET schrieb Caesar Wang:
> On 2016年11月14日 22:45, Heiko Stuebner wrote:
> > Am Mittwoch, 9. November 2016, 21:21:53 CET schrieb Caesar Wang:
> >> From: Ziyuan Xu <xzy.xu@rock-chips.com>
> >>
> >> Control power domain for eMMC via genpd to reduce power consumption.
> >>
> >> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> >> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
> >> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> >
> > Authorship / Signed-off mismatch. From above suggest Ziyuan is the author
> > while first Signed-off-by indicates Elaine as author. Please clarify.
>
> I believe the Elaine is the first author. Sorry for this kind of
> question to brother you again. :(
no problem :-) and thanks for the very fast reply.
Applied to my dts64 branch.
Thanks
Heiko
^ permalink raw reply
* [PATCH] arm64: dts: juno: fix cluster sleep state entry latency on all SoC versions
From: Sudeep Holla @ 2016-11-14 15:26 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Jon Medhurst (Tixy), devicetree, Lorenzo Pieralisi, Liviu Dudau,
Sudeep Holla
The core and the cluster sleep state entry latencies can't be same as
cluster sleep involves more work compared to core level e.g. shared
cache maintenance.
Experiments have shown on an average about 100us more latency for the
cluster sleep state compared to the core level sleep. This patch fixes
the entry latency for the cluster sleep state.
Fixes: 28e10a8f3a03 ("arm64: dts: juno: Add idle-states to device tree")
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: "Jon Medhurst (Tixy)" <tixy@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
arch/arm64/boot/dts/arm/juno-r1.dts | 2 +-
arch/arm64/boot/dts/arm/juno-r2.dts | 2 +-
arch/arm64/boot/dts/arm/juno.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
Hi,
This was found recently when I found that core sleep was chosen when
entering suspend-to-idle state on Juno. Since the wakeup(entry+exit)
latency matched for the both states, cpu sleep state was chosen to enter
in suspend-to-idle.
Regards,
Sudeep
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
index 3be8a3ef671c..eec37feee8fc 100644
--- a/arch/arm64/boot/dts/arm/juno-r1.dts
+++ b/arch/arm64/boot/dts/arm/juno-r1.dts
@@ -76,7 +76,7 @@
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
- entry-latency-us = <300>;
+ entry-latency-us = <400>;
exit-latency-us = <1200>;
min-residency-us = <2500>;
};
diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts
index 614fc9227943..28f40ec44090 100644
--- a/arch/arm64/boot/dts/arm/juno-r2.dts
+++ b/arch/arm64/boot/dts/arm/juno-r2.dts
@@ -76,7 +76,7 @@
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
- entry-latency-us = <300>;
+ entry-latency-us = <400>;
exit-latency-us = <1200>;
min-residency-us = <2500>;
};
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index 6b4135e9cfe5..ac5ceb73f45f 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -76,7 +76,7 @@
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x1010000>;
local-timer-stop;
- entry-latency-us = <300>;
+ entry-latency-us = <400>;
exit-latency-us = <1200>;
min-residency-us = <2500>;
};
--
2.7.4
^ permalink raw reply related
* Re: [PATCH v2 2/9] arm64: dts: rockchip: add pd_sd power node for rk3399
From: Heiko Stuebner @ 2016-11-14 15:27 UTC (permalink / raw)
To: Caesar Wang
Cc: eddie.cai-TNX95d0MmH7DzftRWevZcw, tfiga-F7+t8E8rja9g9hUCZPvPmw,
zhangqing, Douglas Anderson, David Wu, Jianqun Xu, Yakir Yang,
Brian Norris, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Will Deacon,
Mark Rutland, Catalin Marinas,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1478697721-2323-3-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Mittwoch, 9. November 2016, 21:21:54 CET schrieb Caesar Wang:
> From: zhangqing <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> 1.add pd node for RK3399 Soc
> 2.create power domain tree
> 3.add qos node for domain
> 4.add the pd_sd consumers node
>
> Signed-off-by: Elaine Zhang <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Applied to my dts64 branch after some tweaks to patch subject and commit
message.
Thanks
Heiko
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH 1/2] Add Documentation for Media Device, Video Device, and Synopsys DW MIPI CSI-2 Host
From: Ramiro Oliveira @ 2016-11-14 15:31 UTC (permalink / raw)
To: Laurent Pinchart, Ramiro Oliveira
Cc: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
linux-media, davem, gregkh, geert+renesas, akpm, linux, hverkuil,
laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA
In-Reply-To: <9132828.vOiOHSy7z0@avalon>
Hi Laurent,
Thanks for the feedback.
On 11/14/2016 2:49 PM, Laurent Pinchart wrote:
> Hi Ramiro,
>
> Thank you for the patch.
>
> On Monday 14 Nov 2016 14:20:22 Ramiro Oliveira wrote:
>> Add documentation for Media and Video Device, as well as the DW MIPI CSI-2
>> Host.
>>
>> Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
>> ---
>> .../devicetree/bindings/media/snps,dw-mipi-csi.txt | 27 +++++++++++++++++++
>> .../devicetree/bindings/media/snps,plat-ipk.txt | 9 ++++++++
>> .../bindings/media/snps,video-device.txt | 12 ++++++++++
>> 3 files changed, 48 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt create mode
>> 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt create
>> mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
>>
>> diff --git a/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
>> b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt new file
>> mode 100644
>> index 0000000..bec7441
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
>> @@ -0,0 +1,27 @@
>> +Synopsys DesignWare CSI-2 Host controller
>> +
>> +Description
>> +-----------
>> +
>> +This HW block is used to receive image coming from an MIPI CSI-2 compatible
>> +camera.
>
> And what does it do after receiving the stream ? A more detailed description
> would be useful. Is there any public documentation for this IP core ?
>
I can add a more detailed description. Also, here is a link to the
documentation, but I'm afraid you might have to register yourself to access it.
CSI-2 Host
https://www.synopsys.com/dw/doc.php/ds/c/dwc_csi2_controller.pdf
CSI-2 Host IPK
https://www.synopsys.com/dw/doc.php/ds/o/ip_prototyping_kit_mipi_csi2_host_arc.pdf
>> +Required properties:
>> +- compatible: shall be "snps,dw-mipi-csi"
>> +- reg : physical base address and size of the device memory
> mapped
>> + registers;
>> +- interrupts : CSI-2 Host interrupt
>> +- data-lanes : Number of lanes to be used
>
> Is that fixed at synthesis time or configurable at runtime ?
>
The max number is fixed at synthesis time, but you can configure it for lower
values. I added this option here because, although configurable, it's usually a
fixed value.
>> +- output-type : Core output to be used (IPI-> 0 or IDI->1 or BOTH->2)
>
> What are IPI and IDI ?
>
IPI is Image Pixel Interface and IDI Image Data Interface, these are the two
types of data output support by our CSI-2 Host controller
>> +- phys, phy-names: List of one PHY specifier and identifier string (as
>> defined
>> + in Documentation/devicetree/bindings/phy/phy-bindings.txt).
>
> A PHY for what ?
>
Our controller needs a PHY, in this case a MIPI DPHY, to interact with a CSI-2
receiver (usually a sensor).
>> +Optional properties(if in IPI mode):
>> +- ipi-mode : Mode to be used when in IPI(Camera -> 0 or Automatic -> 1)
>> +- ipi-color-mode: Color depth to be used in IPI (48 bits -> 0 or 16 bits ->
>> 1)
>> +- ipi-auto-flush: Data auto-flush (1 -> Yes or 0 -> No)
>> +- virtual-channel: Virtual channel where data is present when in IPI
>
> We need more details than that, this is impossible to review, sorry.
>
Sure, I'll add more details to the descripton
>> +The per-board settings:
>> + - port sub-node describing a single endpoint connected to the dw-mipi-csi
>> + as described in video-interfaces.txt[1].
>
> An example would be nice.
>
I'll add an example of how we're using it.
>> diff --git a/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
>> b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt new file mode
>> 100644
>> index 0000000..2d51541
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
>> @@ -0,0 +1,9 @@
>> +Synopsys DesignWare CSI-2 Host IPK Media Device
>> +
>> +This Media Device at the moment is not totally functional, however it is a
>> base
>> +for the future.
>
> Then let's add it later :-) We don't want to design incomplete transient DT
> bindings.
>
I'm afraid I wasn't completely clear. This setup is fully functional. Actually
this sentence made sense in the past, but no longer does now.
>> +Required properties:
>> +
>> +- compatible: Must be "snps,plat-ipk".
>> +
>> diff --git a/Documentation/devicetree/bindings/media/snps,video-device.txt
>> b/Documentation/devicetree/bindings/media/snps,video-device.txt new file
>> mode 100644
>> index 0000000..d467092
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/snps,video-device.txt
>> @@ -0,0 +1,12 @@
>> +Synopsys DesignWare CSI-2 Host video device
>> +
>> +This driver handles all the video handling part of this platform.
>
> This is a DT binding documentation, drivers are irrelevant. You should
> describe the hardware only.
>
> More information is needed, based on this document I can't tell what the
> "CSI-2 host video device" is.
>
You're right, I'll add a more detailed description.
>> +Required properties:
>> +
>> +- compatible: Must be "snps,video-device".
>> +
>> +- dmas, dma-names: List of one DMA specifier and identifier string (as
>> defined
>> + in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
>> + requires a DMA channel with the identifier string set to "port" followed
>> by
>> + the port index.
>
Thanks once again,
Ramiro Oliveira
^ permalink raw reply
* Re: [PATCH v2] ARM: at91/dt: add dts file for sama5d36ek CMP board
From: Nicolas Ferre @ 2016-11-14 15:36 UTC (permalink / raw)
To: Wenyou Yang, Alexandre Belloni, Russell King, Rob Herring,
Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala
Cc: linux-kernel, Wenyou Yang, devicetree, linux-arm-kernel
In-Reply-To: <1478055958-8463-1-git-send-email-wenyou.yang@atmel.com>
Le 02/11/2016 à 04:05, Wenyou Yang a écrit :
> The sama5d36ek CMP board is the variant of sama5d3xek board.
> It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865 and
> some power rail. Its main purpose is used to measure the power
> consumption.
> The difference of the sama5d36ek CMP dts from sama5d36ek dts
> is listed as below.
> 1. The USB host nodes are removed, that is, the USB host is disabled.
> 2. The gpio_keys node is added to wake up from the sleep.
> 3. The LCD isn't supported due to the pins for LCD are conflicted
> with gpio_keys.
> 4. The adc0 node support the pinctrl sleep state to fix the over
> consumption on VDDANA.
>
> As said in errata, "When the USB host ports are used in high speed
> mode (EHCI), it is not possible to suspend the ports if no device is
> attached on each port. This leads to increased power consumption even
> if the system is in a low power mode." That is why the the USB host
> is disabled.
>
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> ---
>
> Changes in v2:
> - Add the pinctrl sleep state for adc0 node to fix the over
> consumption on VDDANA.
> - Improve the commit log.
>
> arch/arm/boot/dts/sama5d36ek_cmp.dts | 51 +++++++
> arch/arm/boot/dts/sama5d3xcm_cmp.dtsi | 166 +++++++++++++++++++++
> arch/arm/boot/dts/sama5d3xmb_cmp.dtsi | 265 ++++++++++++++++++++++++++++++++++
> 3 files changed, 482 insertions(+)
> create mode 100644 arch/arm/boot/dts/sama5d36ek_cmp.dts
> create mode 100644 arch/arm/boot/dts/sama5d3xcm_cmp.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
>
> diff --git a/arch/arm/boot/dts/sama5d36ek_cmp.dts b/arch/arm/boot/dts/sama5d36ek_cmp.dts
> new file mode 100644
> index 0000000..fd6bcd6
> --- /dev/null
> +++ b/arch/arm/boot/dts/sama5d36ek_cmp.dts
> @@ -0,0 +1,51 @@
> +/*
> + * sama5d36ek_cmp.dts - Device Tree file for SAMA5D36-EK CMP board
> + *
> + * Copyright (C) 2016 Atmel,
> + *
> + * Licensed under GPLv2 or later.
No, in fact we now use a dual license scheme for DT files. Please have a
look at the recent board that we posted to take the header from them.
> + */
> +/dts-v1/;
> +#include "sama5d36.dtsi"
> +#include "sama5d3xmb_cmp.dtsi"
> +
> +/ {
> + model = "Atmel SAMA5D36-EK";
> + compatible = "atmel,sama5d36ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
I don't think the model name nor the compatible string reflect the
nature of this new "CMP" board.
> +
> + ahb {
> + apb {
> + spi0: spi@f0004000 {
> + status = "okay";
> + };
> +
> + ssc0: ssc@f0008000 {
> + status = "okay";
> + };
> +
> + can0: can@f000c000 {
> + status = "okay";
> + };
> +
> + i2c0: i2c@f0014000 {
> + status = "okay";
> + };
> +
> + i2c1: i2c@f0018000 {
> + status = "okay";
> + };
> +
> + macb0: ethernet@f0028000 {
> + status = "okay";
> + };
> +
> + macb1: ethernet@f802c000 {
> + status = "okay";
> + };
> + };
> + };
> +
> + sound {
> + status = "okay";
> + };
> +};
> diff --git a/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi b/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi
> new file mode 100644
> index 0000000..77638c3
> --- /dev/null
> +++ b/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi
> @@ -0,0 +1,166 @@
> +/*
> + * sama5d3xcm_cmp.dtsi - Device Tree Include file for SAMA5D36 CMP CPU Module
> + *
> + * Copyright (C) 2016 Atmel,
> + *
> + * Licensed under GPLv2 or later.
Ditto.
> + */
> +
> +/ {
> + compatible = "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
Ditto.
> +
> + chosen {
> + bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs";
Remove bootargs.
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + reg = <0x20000000 0x20000000>;
> + };
> +
> + clocks {
> + slow_xtal {
> + clock-frequency = <32768>;
> + };
> +
> + main_xtal {
> + clock-frequency = <12000000>;
> + };
> + };
> +
> + ahb {
> + apb {
> + spi0: spi@f0004000 {
> + cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
> + };
> +
> + macb0: ethernet@f0028000 {
> + phy-mode = "rgmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethernet-phy@1 {
> + reg = <0x1>;
> + interrupt-parent = <&pioB>;
> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> + txen-skew-ps = <800>;
> + txc-skew-ps = <3000>;
> + rxdv-skew-ps = <400>;
> + rxc-skew-ps = <3000>;
> + rxd0-skew-ps = <400>;
> + rxd1-skew-ps = <400>;
> + rxd2-skew-ps = <400>;
> + rxd3-skew-ps = <400>;
> + };
> +
> + ethernet-phy@7 {
> + reg = <0x7>;
> + interrupt-parent = <&pioB>;
> + interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
> + txen-skew-ps = <800>;
> + txc-skew-ps = <3000>;
> + rxdv-skew-ps = <400>;
> + rxc-skew-ps = <3000>;
> + rxd0-skew-ps = <400>;
> + rxd1-skew-ps = <400>;
> + rxd2-skew-ps = <400>;
> + rxd3-skew-ps = <400>;
> + };
> + };
> +
> + i2c1: i2c@f0018000 {
> + pmic: act8865@5b {
> + compatible = "active-semi,act8865";
> + reg = <0x5b>;
> + status = "disabled";
> +
> + regulators {
> + vcc_1v8_reg: DCDC_REG1 {
> + regulator-name = "VCC_1V8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
> + vcc_1v2_reg: DCDC_REG2 {
> + regulator-name = "VCC_1V2";
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + };
> +
> + vcc_3v3_reg: DCDC_REG3 {
> + regulator-name = "VCC_3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vddana_reg: LDO_REG1 {
> + regulator-name = "VDDANA";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vddfuse_reg: LDO_REG2 {
> + regulator-name = "FUSE_2V5";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + };
> + };
> + };
> + };
> + };
> +
> + nand0: nand@60000000 {
> + nand-bus-width = <8>;
> + nand-ecc-mode = "hw";
> + atmel,has-pmecc;
> + atmel,pmecc-cap = <4>;
> + atmel,pmecc-sector-size = <512>;
> + nand-on-flash-bbt;
> + status = "okay";
> +
> + at91bootstrap@0 {
> + label = "at91bootstrap";
> + reg = <0x0 0x40000>;
> + };
> +
> + bootloader@40000 {
> + label = "bootloader";
> + reg = <0x40000 0x80000>;
> + };
> +
> + bootloaderenv@c0000 {
> + label = "bootloader env";
> + reg = <0xc0000 0xc0000>;
> + };
> +
> + dtb@180000 {
> + label = "device tree";
> + reg = <0x180000 0x80000>;
> + };
> +
> + kernel@200000 {
> + label = "kernel";
> + reg = <0x200000 0x600000>;
> + };
> +
> + rootfs@800000 {
> + label = "rootfs";
> + reg = <0x800000 0x0f800000>;
> + };
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + d2 {
> + label = "d2";
> + gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +};
> diff --git a/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
> new file mode 100644
> index 0000000..62c6230
> --- /dev/null
> +++ b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
> @@ -0,0 +1,265 @@
> +/*
> + * sama5d3xmb_cmp.dts - Device Tree file for SAMA5D3x CMP mother board
> + *
> + * Copyright (C) 2016 Atmel,
> + *
> + * Licensed under GPLv2 or later.
Ditto.
> + */
> +#include "sama5d3xcm_cmp.dtsi"
> +
> +/ {
> + compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
Ditto.
> +
> + ahb {
> + apb {
> + mmc0: mmc@f0000000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
> + status = "okay";
> + slot@0 {
> + reg = <0>;
> + bus-width = <4>;
> + cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + spi0: spi@f0004000 {
> + dmas = <0>, <0>; /* Do not use DMA for spi0 */
> +
> + m25p80@0 {
> + compatible = "atmel,at25df321a";
> + spi-max-frequency = <50000000>;
> + reg = <0>;
> + };
> + };
> +
> + ssc0: ssc@f0008000 {
> + atmel,clk-from-rk-pin;
> + };
> +
> + /*
> + * i2c0 conflicts with ISI:
> + * disable it to allow the use of ISI
> + * can not enable audio when i2c0 disabled
> + */
> + i2c0: i2c@f0014000 {
> + wm8904: wm8904@1a {
> + compatible = "wlf,wm8904";
> + reg = <0x1a>;
> + clocks = <&pck0>;
> + clock-names = "mclk";
> + };
> + };
> +
> + i2c1: i2c@f0018000 {
> + ov2640: camera@0x30 {
> + compatible = "ovti,ov2640";
> + reg = <0x30>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
> + resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
> + pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
> + /* use pck1 for the master clock of ov2640 */
> + clocks = <&pck1>;
> + clock-names = "xvclk";
> + assigned-clocks = <&pck1>;
> + assigned-clock-rates = <25000000>;
> +
> + port {
> + ov2640_0: endpoint {
> + remote-endpoint = <&isi_0>;
> + bus-width = <8>;
> + };
> + };
> + };
> + };
> +
> + usart1: serial@f0020000 {
> + dmas = <0>, <0>; /* Do not use DMA for usart1 */
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
> + status = "okay";
> + };
> +
> + isi: isi@f0034000 {
> + port {
> + isi_0: endpoint {
> + remote-endpoint = <&ov2640_0>;
> + bus-width = <8>;
> + vsync-active = <1>;
> + hsync-active = <1>;
> + };
> + };
> + };
> +
> + mmc1: mmc@f8000000 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
> + status = "okay";
> + slot@0 {
> + reg = <0>;
> + bus-width = <4>;
> + cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + adc0: adc@f8018000 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <
> + &pinctrl_adc0_adtrg
> + &pinctrl_adc0_ad0
> + &pinctrl_adc0_ad1
> + &pinctrl_adc0_ad2
> + &pinctrl_adc0_ad3
> + &pinctrl_adc0_ad4
> + >;
> + pinctrl-1 = <
> + &pinctrl_adc0_adtrg_sleep
> + &pinctrl_adc0_ad0_sleep
> + &pinctrl_adc0_ad1_sleep
> + &pinctrl_adc0_ad2_sleep
> + &pinctrl_adc0_ad3_sleep
> + &pinctrl_adc0_ad4_sleep
> + >;
> + status = "okay";
> + };
> +
> + macb1: ethernet@f802c000 {
> + phy-mode = "rmii";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + phy0: ethernet-phy@1 {
> + /*interrupt-parent = <&pioE>;*/
> + /*interrupts = <30 IRQ_TYPE_EDGE_FALLING>;*/
> + reg = <1>;
> + };
> + };
> +
> + pinctrl@fffff200 {
> + adc0 {
> + pinctrl_adc0_adtrg_sleep: adc0_adtrg_1 {
> + atmel,pins =
> + <AT91_PIOD 19 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; /* PD19 GPIO output 0 */
> + };
> + pinctrl_adc0_ad0_sleep: adc0_ad0_1 {
> + atmel,pins =
> + <AT91_PIOD 20 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; /* PD20 GPIO output 0 */
> + };
> + pinctrl_adc0_ad1_sleep: adc0_ad1_1 {
> + atmel,pins =
> + <AT91_PIOD 21 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; /* PD21 GPIO output 0 */
> + };
> + pinctrl_adc0_ad2_sleep: adc0_ad2_1 {
> + atmel,pins =
> + <AT91_PIOD 22 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; /* PD22 GPIO output 0 */
> + };
> + pinctrl_adc0_ad3_sleep: adc0_ad3_1 {
> + atmel,pins =
> + <AT91_PIOD 23 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; /* PD23 GPIO output 0 */
> + };
> + pinctrl_adc0_ad4_sleep: adc0_ad4_1 {
> + atmel,pins =
> + <AT91_PIOD 24 AT91_PERIPH_GPIO (AT91_PINCTRL_OUTPUT | AT91_PINCTRL_OUTPUT_VAL(0))>; /* PD24 GPIO output 0 */
Please remove all these comments. The binding is good enough to
understand easily.
> + };
> + };
> +
> + board {
> + pinctrl_gpio_keys: gpio_keys {
> + atmel,pins =
> + <AT91_PIOE 27 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
> + };
> +
> + pinctrl_mmc0_cd: mmc0_cd {
> + atmel,pins =
> + <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */
> + };
> +
> + pinctrl_mmc1_cd: mmc1_cd {
> + atmel,pins =
> + <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */
> + };
> +
> + pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
> + atmel,pins =
> + <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */
> + };
> +
> + pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
> + atmel,pins =
> + <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
> + };
> +
> + pinctrl_sensor_reset: sensor_reset-0 {
> + atmel,pins =
> + <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */
> + };
> +
> + pinctrl_sensor_power: sensor_power-0 {
> + atmel,pins =
> + <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
> + };
> +
> + pinctrl_usba_vbus: usba_vbus {
> + atmel,pins =
> + <AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */
Here again, all comments are not or great use: remove them.
> + };
> + };
> + };
> +
> + dbgu: serial@ffffee00 {
> + dmas = <0>, <0>; /* Do not use DMA for dbgu */
> + status = "okay";
> + };
> +
> + watchdog@fffffe40 {
> + status = "okay";
> + };
> + };
> +
> + usb0: gadget@00500000 {
> + atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usba_vbus>;
> + status = "okay";
> + };
> + };
> +
> + sound {
> + compatible = "atmel,asoc-wm8904";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
> +
> + atmel,model = "wm8904 @ SAMA5D3EK";
> + atmel,audio-routing =
> + "Headphone Jack", "HPOUTL",
> + "Headphone Jack", "HPOUTR",
> + "IN2L", "Line In Jack",
> + "IN2R", "Line In Jack",
> + "Mic", "MICBIAS",
> + "IN1L", "Mic";
> +
> + atmel,ssc-controller = <&ssc0>;
> + atmel,audio-codec = <&wm8904>;
> +
> + status = "disabled";
> + };
> +
> + /* Conflict with LCD pins */
> + gpio_keys {
> + compatible = "gpio-keys";
> + status = "okay";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_keys>;
> +
> + pb_user1 {
> + label = "pb_user1";
> + gpios = <&pioE 27 GPIO_ACTIVE_HIGH>;
> + linux,code = <0x100>;
> + gpio-key,wakeup;
> + };
> + };
> +};
>
--
Nicolas Ferre
^ permalink raw reply
* Re: [PATCH v5 3/3] clocksource: Add clockevent support to NPS400 driver
From: Daniel Lezcano @ 2016-11-14 15:41 UTC (permalink / raw)
To: Noam Camus
Cc: robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <DB6PR0501MB25183EEEC116B9E97CC01BCFAABC0@DB6PR0501MB2518.eurprd05.prod.outlook.com>
On Mon, Nov 14, 2016 at 03:17:48PM +0000, Noam Camus wrote:
> > From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org]
> > Sent: Monday, November 14, 2016 4:35 PM
>
>
> >The function nps_clkevent_timer_event_setup() writes into the
> >NPS_REG_TIMER0_CTRL register but there is no critical section there. What
> >prevents another HW thread to write this register at the same time ?
> Correct, during my last email to you I noticed that fact and already started
> fixing it.
>
> >I do believe we have a framework to access shared registers, otherwise a
> >simple spinlock would be simpler and perhaps faster than disabling the
> >entire hardware scheduling for the system, no ?
> When you are saying "we have a framework" do you mean to some generic
> framework in the kernel?
Yes, IIRC it is regmap but I'm not sure.
> Anyway to my understanding I cannot guarantee this
> atomics during my routines without preventing HW from changing the HW thread
> this core executes. As SW I am not aware to such HW scheduling, It is much
> same as with interrupts that we disable them when we reach code that might be
> shared by the interrupt handler.
I think there is something I am missing with this HW scheduling thing. Why are
these hw_schd_save/hw_schd_restore functions needed to be called from the
timer driver ? Regarding the explanation, the HW scheduling can happen everywhere
at any time, not only in the timer code but this one is the only one which need
the hw_schd_save/hw_schd_restore calls, why ?
Why,
spin_lock(&lock);
write_aux_reg(...)
spin_unlock(&lock);
can't work ?
IIUC, there can be more than 16 cpus/threads, so calling hw_schd_save /
hw_schd_restore will disable the HW scheduling for the entire system while one
cpu is processing something with these couple of registers, no ?
> >Regarding the comment I did above, it is possible the critical section is
> >reduced and moved into the shutdown function. Thus, the boolean wouldn't be
> >needed anymore, well that is conditional to the above comment. Discard the
> >comment for the moment, until the hw sched vs spinlock vs
> >NPS_REG_TIMER0_CTRL is sorted out.
> OK, I will discard that in the meantime.
>
> ...
> >> >> + .set_state_shutdown =
> >> >> nps_clkevent_timer_shutdown,
> >>
> >> >Doesn't set_state_shutdown and set_state_oneshot_stopped need to remove
> >> >the HW thread from the TSI ?
> >> You are correct, I will fix that.
>
> >And tick_resume. Perhaps, that is the reason why NO_HZ hangs.
> What NO_HZ hang are you referring to in this case? How calling
> nps_clkevent_rm_thread() explain such hang? Anyway I agree, and will add
> nps_clkevent_rm_thread() to tick_resume.
Actually I meant NOHZ_FULL.
> Appreciating your effort and will gladly provide any more information needed
> about our SoC. -Noam
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* Re: [PATCH v2] ARM: at91/dt: add dts file for sama5d36ek CMP board
From: Sudeep Holla @ 2016-11-14 15:41 UTC (permalink / raw)
To: Wenyou Yang
Cc: Mark Rutland, devicetree, Russell King, Wenyou Yang, Pawel Moll,
Ian Campbell, Sudeep Holla, Nicolas Ferre, linux-kernel,
Rob Herring, Alexandre Belloni, Kumar Gala, linux-arm-kernel
In-Reply-To: <1478055958-8463-1-git-send-email-wenyou.yang@atmel.com>
On 02/11/16 03:05, Wenyou Yang wrote:
> The sama5d36ek CMP board is the variant of sama5d3xek board.
> It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865 and
> some power rail. Its main purpose is used to measure the power
> consumption.
> The difference of the sama5d36ek CMP dts from sama5d36ek dts
> is listed as below.
> 1. The USB host nodes are removed, that is, the USB host is disabled.
> 2. The gpio_keys node is added to wake up from the sleep.
> 3. The LCD isn't supported due to the pins for LCD are conflicted
> with gpio_keys.
> 4. The adc0 node support the pinctrl sleep state to fix the over
> consumption on VDDANA.
>
> As said in errata, "When the USB host ports are used in high speed
> mode (EHCI), it is not possible to suspend the ports if no device is
> attached on each port. This leads to increased power consumption even
> if the system is in a low power mode." That is why the the USB host
> is disabled.
>
> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
> ---
>
> Changes in v2:
> - Add the pinctrl sleep state for adc0 node to fix the over
> consumption on VDDANA.
> - Improve the commit log.
>
> arch/arm/boot/dts/sama5d36ek_cmp.dts | 51 +++++++
> arch/arm/boot/dts/sama5d3xcm_cmp.dtsi | 166 +++++++++++++++++++++
> arch/arm/boot/dts/sama5d3xmb_cmp.dtsi | 265 ++++++++++++++++++++++++++++++++++
> 3 files changed, 482 insertions(+)
> create mode 100644 arch/arm/boot/dts/sama5d36ek_cmp.dts
> create mode 100644 arch/arm/boot/dts/sama5d3xcm_cmp.dtsi
> create mode 100644 arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
>
[...]
> + /* Conflict with LCD pins */
> + gpio_keys {
> + compatible = "gpio-keys";
> + status = "okay";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_gpio_keys>;
> +
> + pb_user1 {
> + label = "pb_user1";
> + gpios = <&pioE 27 GPIO_ACTIVE_HIGH>;
> + linux,code = <0x100>;
> + gpio-key,wakeup;
Please replace this with "wakeup-source", I will post patches to fix the
new comers in the mainline. It was cleaned last year.
--
Regards,
Sudeep
^ permalink raw reply
* [PATCH -next] ARM: dts: omap5: replace gpio-key,wakeup with wakeup-source property
From: Sudeep Holla @ 2016-11-14 15:44 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Sudeep Holla, devicetree-u79uwXL29TY76Z2rM5mHXA,
Benoît Cousson, Tony Lindgren
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: "Benoît Cousson" <bcousson-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Cc: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>
---
arch/arm/boot/dts/omap5-uevm.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Hi,
Inspite of getting rid of most of the legacy property almost a year ago,
addition of new platforms have brought this back and over time it's
now found again in few places. Just get rid of them *again*
Regards,
Sudeep
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 2fcdc516da45..a8c72611fbe3 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -41,7 +41,7 @@
label = "BTN1";
linux,code = <169>;
gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 */
- gpio-key,wakeup;
+ wakeup-source;
autorepeat;
debounce_interval = <50>;
};
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH] ARM: dts: at91: replace gpio-key,wakeup with wakeup-source for sam9260ek
From: Sudeep Holla @ 2016-11-14 15:44 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Sudeep Holla, devicetree-u79uwXL29TY76Z2rM5mHXA, Nicolas Ferre,
Alexandre Belloni, Jean-Christophe Plagniol-Villard
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
Cc: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Jean-Christophe Plagniol-Villard <plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org>
Signed-off-by: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>
---
arch/arm/boot/dts/at91sam9260ek.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Hi,
Inspite of getting rid of most of the legacy property almost a year ago,
addition of new platforms have brought this back and over time it's
now found again in few places. Just get rid of them *again*
Regards,
Sudeep
diff --git a/arch/arm/boot/dts/at91sam9260ek.dts b/arch/arm/boot/dts/at91sam9260ek.dts
index 2c87f58448e7..b2578feceb08 100644
--- a/arch/arm/boot/dts/at91sam9260ek.dts
+++ b/arch/arm/boot/dts/at91sam9260ek.dts
@@ -174,14 +174,14 @@
label = "Button 3";
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
- gpio-key,wakeup;
+ wakeup-source;
};
btn4 {
label = "Button 4";
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
- gpio-key,wakeup;
+ wakeup-source;
};
};
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH] ARM: dts: imx6q: replace gpio-key,wakeup with wakeup-source for Utilite Pro
From: Sudeep Holla @ 2016-11-14 15:44 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Sudeep Holla, devicetree-u79uwXL29TY76Z2rM5mHXA, Shawn Guo,
Sascha Hauer, Fabio Estevam
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.
This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Sascha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Cc: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>
Signed-off-by: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>
---
arch/arm/boot/dts/imx6q-utilite-pro.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Hi,
Inspite of getting rid of most of the legacy property almost a year ago,
addition of new platforms have brought this back and over time it's
now found again in few places. Just get rid of them *again*
Regards,
Sudeep
diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts
index 61990630a748..104bbe710927 100644
--- a/arch/arm/boot/dts/imx6q-utilite-pro.dts
+++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts
@@ -68,7 +68,7 @@
label = "Power Button";
gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
- gpio-key,wakeup;
+ wakeup-source;
};
};
};
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH] ARM: dts: sun8i: replace enable-sdio-wakeup with wakeup-source for BananaPi M1+
From: Sudeep Holla @ 2016-11-14 15:44 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Sudeep Holla, devicetree-u79uwXL29TY76Z2rM5mHXA, Chen-Yu Tsai,
Maxime Ripard
Though the mmc core driver will continue to support the legacy
"enable-sdio-wakeup" property to enable SDIO as the wakeup source,
"wakeup-source" is the new standard binding.
This patch replaces the legacy "enable-sdio-wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>
---
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Hi,
Inspite of getting rid of most of the legacy property almost a year ago,
addition of new platforms have brought this back and over time it's
now found again in few places. Just get rid of them *again*
Regards,
Sudeep
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
index ba5bca0fe997..1df47aa0a07b 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
@@ -167,7 +167,7 @@
mmc-pwrseq = <&mmc3_pwrseq>;
bus-width = <4>;
non-removable;
- enable-sdio-wakeup;
+ wakeup-source;
status = "okay";
brcmf: bcrmf@1 {
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox