* Re: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399
From: Caesar Wang @ 2016-11-14 15:05 UTC (permalink / raw)
To: Shawn Lin
Cc: Caesar Wang, Heiko Stuebner, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA, Brian Norris,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Catalin Marinas,
Elaine Zhang, Will Deacon, Douglas Anderson,
tfiga-F7+t8E8rja9g9hUCZPvPmw,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring,
eddie.cai-TNX95d0MmH7DzftRWevZcw, David Wu, Jianqun Xu,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Ziyuan Xu
In-Reply-To: <bce1a5eb-fbb3-9ed9-46b9-72a95eefed3e-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
On 2016年11月12日 12:22, Shawn Lin wrote:
> On 2016/11/9 21:21, Caesar Wang wrote:
>> From: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>>
>> Control power domain for eMMC via genpd to reduce power consumption.
>>
>> Signed-off-by: Elaine Zhang <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> It was verified on my rk3399 evb with kernel4.4, so
> free feel to add my tag,
>
> Tested-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
Thanks the tests.
> BTW, it seems my reply is bounced form Yakir's address, so please
> remove him from CC list if he changed his mail address.
Right, Yakir's (ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org) address had left this world.;-)
But the patman tool is auto sending with the Cc people.
-
Caesar
>
>> ---
>>
>> Changes in v2:
>> - Reviewed-on: https://chromium-review.googlesource.com/376558
>> - Verified on ChromeOS kernel4.4
>>
>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> index cbb7f8b..b401176 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -269,6 +269,7 @@
>> #clock-cells = <0>;
>> phys = <&emmc_phy>;
>> phy-names = "phy_arasan";
>> + power-domains = <&power RK3399_PD_EMMC>;
>> status = "disabled";
>> };
>>
>> @@ -690,6 +691,11 @@
>> status = "disabled";
>> };
>>
>> + qos_emmc: qos@ffa58000 {
>> + compatible = "syscon";
>> + reg = <0x0 0xffa58000 0x0 0x20>;
>> + };
>> +
>> qos_gmac: qos@ffa5c000 {
>> compatible = "syscon";
>> reg = <0x0 0xffa5c000 0x0 0x20>;
>> @@ -823,6 +829,11 @@
>> };
>>
>> /* These power domains are grouped by VD_LOGIC */
>> + pd_emmc@RK3399_PD_EMMC {
>> + reg = <RK3399_PD_EMMC>;
>> + clocks = <&cru ACLK_EMMC>;
>> + pm_qos = <&qos_emmc>;
>> + };
>> pd_gmac@RK3399_PD_GMAC {
>> reg = <RK3399_PD_GMAC>;
>> clocks = <&cru ACLK_GMAC>;
>>
>
>
--
caesar wang | software engineer | wxt-TNX95d0MmH73oGB3hsPCZA@public.gmane.org
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399
From: Caesar Wang @ 2016-11-14 15:01 UTC (permalink / raw)
To: Heiko Stuebner
Cc: Caesar Wang, Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA,
Elaine Zhang, Catalin Marinas, Brian Norris, Ziyuan Xu,
Will Deacon, Douglas Anderson, Rob Herring,
tfiga-F7+t8E8rja9g9hUCZPvPmw, open list:ARM/Rockchip SoC...,
eddie.cai-TNX95d0MmH7DzftRWevZcw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, David Wu,
Jianqun Xu, linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <2342292.tK2jqRKrXH@phil>
On 2016年11月14日 22:45, Heiko Stuebner wrote:
> Am Mittwoch, 9. November 2016, 21:21:53 CET schrieb Caesar Wang:
>> From: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>>
>> Control power domain for eMMC via genpd to reduce power consumption.
>>
>> Signed-off-by: Elaine Zhang <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Authorship / Signed-off mismatch. From above suggest Ziyuan is the author
> while first Signed-off-by indicates Elaine as author. Please clarify.
I believe the Elaine is the first author. Sorry for this kind of
question to brother you again. :(
-
Caesar
>
> Thanks
> Heiko
>
>> ---
>>
>> Changes in v2:
>> - Reviewed-on: https://chromium-review.googlesource.com/376558
>> - Verified on ChromeOS kernel4.4
>>
>> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index cbb7f8b..b401176 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
>> @@ -269,6 +269,7 @@
>> #clock-cells = <0>;
>> phys = <&emmc_phy>;
>> phy-names = "phy_arasan";
>> + power-domains = <&power RK3399_PD_EMMC>;
>> status = "disabled";
>> };
>>
>> @@ -690,6 +691,11 @@
>> status = "disabled";
>> };
>>
>> + qos_emmc: qos@ffa58000 {
>> + compatible = "syscon";
>> + reg = <0x0 0xffa58000 0x0 0x20>;
>> + };
>> +
>> qos_gmac: qos@ffa5c000 {
>> compatible = "syscon";
>> reg = <0x0 0xffa5c000 0x0 0x20>;
>> @@ -823,6 +829,11 @@
>> };
>>
>> /* These power domains are grouped by VD_LOGIC */
>> + pd_emmc@RK3399_PD_EMMC {
>> + reg = <RK3399_PD_EMMC>;
>> + clocks = <&cru ACLK_EMMC>;
>> + pm_qos = <&qos_emmc>;
>> + };
>> pd_gmac@RK3399_PD_GMAC {
>> reg = <RK3399_PD_GMAC>;
>> clocks = <&cru ACLK_GMAC>;
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
--
caesar wang | software engineer | wxt-TNX95d0MmH73oGB3hsPCZA@public.gmane.org
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH RFC] ARM: dts: add support for Turris Omnia
From: tomas.hlavacek @ 2016-11-14 14:59 UTC (permalink / raw)
To: Andrew Lunn
Cc: Mark Rutland, Martin Strba??ka, Jason Cooper,
Uwe Kleine-König, devicetree, Rob Herring, Gregory Clement,
linux-arm-kernel, Sebastian Hesselbarth
In-Reply-To: <20161114131010.GC26710@lunn.ch>
Hi Andrew!
(Sorry for re-posting the previous e-mail, that most likely didn't get
through.)
On Mon, Nov 14, 2016 at 2:10 PM, Andrew Lunn <andrew@lunn.ch> wrote:
>> Actually SFP is connected to SGMII interface of eth1, which is
>> routed through SERDES 5.
>
> You say eth1 here. Yet lower down you say got eth0 and eth1 are
> connected to the switch?
Oh sorry, this was a NIC name based on probing order derived from base
address of NIC registers:
eth1: ethernet@30000 - probes as eth0
eth2: ethernet@34000 - probes as eth1
eth0: ethernet@70000 - probes as eth2
It is a bit confusing. I meant eth2 in DTS. Sorry.
>
>
>> We have our proprietary support hacked onto mvneta driver for
>> disconnecting PHY on the fly. It is a bit nasty, so I suggest to
>> ignore SFP in this DTS altogether and let's wait till "phylink based
>> SFP module support" or something alike hits upstream, so we can base
>> the SFP support on solid code;
>
> It would be great if you could work on getting the phylink patches
> into mainline. It is something i have wanted to do for a long time,
> but it is too low down on my priority list to get to. The code is high
> quality, so i don't think there will be too many issues. It probably
> just needs splitting up into smaller batches, submitting, and working
> on any comments.
That is exactly what I thought when I saw the patches for the first
time. I will try to merge the patches to the current kernel and see
what happens. I still need to learn a lot about PHY subsystem.
>
>
>> Actually eth0 and eth1 (both are RGMII) are connected to the 88E6176
>> switch. The problem is that from what I have read so far the switch
>> can not operate in DSA mode with two CPU ports.
>
> Again, this is something i wanted to do, and i did have a prototype at
> one point. But again, not enough time. If you have resources to work
> on this, i can find my code, explain my ideas, and let you complete
> it.
I am definitely interested, though I didn't have time to read and
absorb DSA yet, but I definitely want to try to hack 88E6176 support. I
would be really grateful if you can provide some pointers and/or code
to start from.
Thanks,
Tomas
^ permalink raw reply
* Re: [PATCH v2 5/9] arm64: dts: rockchip: add backlight support for rk3399 evb board
From: Heiko Stuebner @ 2016-11-14 14:53 UTC (permalink / raw)
To: Caesar Wang
Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Arnd Bergmann,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Frank Wang,
Catalin Marinas, Shawn Lin, Will Deacon,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, tfiga-F7+t8E8rja9g9hUCZPvPmw,
Masahiro Yamada, Rob Herring, eddie.cai-TNX95d0MmH7DzftRWevZcw,
Roger Chen, Yakir Yang, Jianqun Xu,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1478697721-2323-6-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Mittwoch, 9. November 2016, 21:21:57 CET schrieb Caesar Wang:
> From: Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> Add backlight node for evb board, perpare for panel device node.
>
> Signed-off-by: Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
applied to my dts64 branch
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH RFC] ARM: dts: add support for Turris Omnia
From: tomas.hlavacek @ 2016-11-14 14:51 UTC (permalink / raw)
To: Andrew Lunn
Cc: Uwe Kleine-König, Mark Rutland, Jason Cooper,
Martin Strba??ka, devicetree, Rob Herring, Gregory Clement,
linux-arm-kernel, Sebastian Hesselbarth
In-Reply-To: <20161114131010.GC26710@lunn.ch>
[-- Attachment #1: Type: text/plain, Size: 2115 bytes --]
Hi Andrew!
On Mon, Nov 14, 2016 at 2:10 PM, Andrew Lunn <andrew@lunn.ch> wrote:
>> Actually SFP is connected to SGMII interface of eth1, which is
>> routed through SERDES 5.
>
> You say eth1 here. Yet lower down you say got eth0 and eth1 are
> connected to the switch?
Oh sorry, this was a NIC name based on probing order derived from base
address of NIC registers:
eth1: ethernet@30000 - probes as eth0
eth2: ethernet@34000 - probes as eth1
eth0: ethernet@70000 - probes as eth2
It is a bit confusing. I meant eth2 in DTS. Sorry.
>
>
>> We have our proprietary support hacked onto mvneta driver for
>> disconnecting PHY on the fly. It is a bit nasty, so I suggest to
>> ignore SFP in this DTS altogether and let's wait till "phylink based
>> SFP module support" or something alike hits upstream, so we can base
>> the SFP support on solid code;
>
> It would be great if you could work on getting the phylink patches
> into mainline. It is something i have wanted to do for a long time,
> but it is too low down on my priority list to get to. The code is high
> quality, so i don't think there will be too many issues. It probably
> just needs splitting up into smaller batches, submitting, and working
> on any comments.
That is exactly what I thought when I saw the patches for the first
time. I will try to merge the patches to the current kernel and see
what happens. I still need to learn a lot about PHY subsystem.
>
>
>> Actually eth0 and eth1 (both are RGMII) are connected to the 88E6176
>> switch. The problem is that from what I have read so far the switch
>> can not operate in DSA mode with two CPU ports.
>
> Again, this is something i wanted to do, and i did have a prototype at
> one point. But again, not enough time. If you have resources to work
> on this, i can find my code, explain my ideas, and let you complete
> it.
I am definitely interested, though I didn't have time to read and
absorb DSA yet, but I definitely want to try to hack 88E6176 support. I
would be really grateful if you can provide some pointers and/or code
to start from.
Thanks,
Tomas
[-- Attachment #2: Type: text/html, Size: 2787 bytes --]
^ permalink raw reply
* Re: [PATCH 1/2] Add Documentation for Media Device, Video Device, and Synopsys DW MIPI CSI-2 Host
From: Laurent Pinchart @ 2016-11-14 14:49 UTC (permalink / raw)
To: Ramiro Oliveira
Cc: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
linux-media, davem, gregkh, geert+renesas, akpm, linux, hverkuil,
laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA
In-Reply-To: <160acd0770e0685330ba8e7445423c1d6f34658e.1479132355.git.roliveir@synopsys.com>
Hi Ramiro,
Thank you for the patch.
On Monday 14 Nov 2016 14:20:22 Ramiro Oliveira wrote:
> Add documentation for Media and Video Device, as well as the DW MIPI CSI-2
> Host.
>
> Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
> ---
> .../devicetree/bindings/media/snps,dw-mipi-csi.txt | 27 +++++++++++++++++++
> .../devicetree/bindings/media/snps,plat-ipk.txt | 9 ++++++++
> .../bindings/media/snps,video-device.txt | 12 ++++++++++
> 3 files changed, 48 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt create mode
> 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt create
> mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
>
> diff --git a/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
> b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt new file
> mode 100644
> index 0000000..bec7441
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
> @@ -0,0 +1,27 @@
> +Synopsys DesignWare CSI-2 Host controller
> +
> +Description
> +-----------
> +
> +This HW block is used to receive image coming from an MIPI CSI-2 compatible
> +camera.
And what does it do after receiving the stream ? A more detailed description
would be useful. Is there any public documentation for this IP core ?
> +Required properties:
> +- compatible: shall be "snps,dw-mipi-csi"
> +- reg : physical base address and size of the device memory
mapped
> + registers;
> +- interrupts : CSI-2 Host interrupt
> +- data-lanes : Number of lanes to be used
Is that fixed at synthesis time or configurable at runtime ?
> +- output-type : Core output to be used (IPI-> 0 or IDI->1 or BOTH->2)
What are IPI and IDI ?
> +- phys, phy-names: List of one PHY specifier and identifier string (as
> defined
> + in Documentation/devicetree/bindings/phy/phy-bindings.txt).
A PHY for what ?
> +Optional properties(if in IPI mode):
> +- ipi-mode : Mode to be used when in IPI(Camera -> 0 or Automatic -> 1)
> +- ipi-color-mode: Color depth to be used in IPI (48 bits -> 0 or 16 bits ->
> 1)
> +- ipi-auto-flush: Data auto-flush (1 -> Yes or 0 -> No)
> +- virtual-channel: Virtual channel where data is present when in IPI
We need more details than that, this is impossible to review, sorry.
> +The per-board settings:
> + - port sub-node describing a single endpoint connected to the dw-mipi-csi
> + as described in video-interfaces.txt[1].
An example would be nice.
> diff --git a/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
> b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt new file mode
> 100644
> index 0000000..2d51541
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
> @@ -0,0 +1,9 @@
> +Synopsys DesignWare CSI-2 Host IPK Media Device
> +
> +This Media Device at the moment is not totally functional, however it is a
> base
> +for the future.
Then let's add it later :-) We don't want to design incomplete transient DT
bindings.
> +Required properties:
> +
> +- compatible: Must be "snps,plat-ipk".
> +
> diff --git a/Documentation/devicetree/bindings/media/snps,video-device.txt
> b/Documentation/devicetree/bindings/media/snps,video-device.txt new file
> mode 100644
> index 0000000..d467092
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/snps,video-device.txt
> @@ -0,0 +1,12 @@
> +Synopsys DesignWare CSI-2 Host video device
> +
> +This driver handles all the video handling part of this platform.
This is a DT binding documentation, drivers are irrelevant. You should
describe the hardware only.
More information is needed, based on this document I can't tell what the
"CSI-2 host video device" is.
> +Required properties:
> +
> +- compatible: Must be "snps,video-device".
> +
> +- dmas, dma-names: List of one DMA specifier and identifier string (as
> defined
> + in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
> + requires a DMA channel with the identifier string set to "port" followed
> by
> + the port index.
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH v2 1/9] arm64: dts: rockchip: add eMMC's power domain support for rk3399
From: Heiko Stuebner @ 2016-11-14 14:45 UTC (permalink / raw)
To: Caesar Wang
Cc: eddie.cai-TNX95d0MmH7DzftRWevZcw, tfiga-F7+t8E8rja9g9hUCZPvPmw,
Ziyuan Xu, Elaine Zhang, Douglas Anderson, David Wu, Jianqun Xu,
Yakir Yang, Brian Norris, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Will Deacon,
Mark Rutland, Catalin Marinas,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1478697721-2323-2-git-send-email-wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Am Mittwoch, 9. November 2016, 21:21:53 CET schrieb Caesar Wang:
> From: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> Control power domain for eMMC via genpd to reduce power consumption.
>
> Signed-off-by: Elaine Zhang <zhangqing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Ziyuan Xu <xzy.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Authorship / Signed-off mismatch. From above suggest Ziyuan is the author
while first Signed-off-by indicates Elaine as author. Please clarify.
Thanks
Heiko
> ---
>
> Changes in v2:
> - Reviewed-on: https://chromium-review.googlesource.com/376558
> - Verified on ChromeOS kernel4.4
>
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index cbb7f8b..b401176 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -269,6 +269,7 @@
> #clock-cells = <0>;
> phys = <&emmc_phy>;
> phy-names = "phy_arasan";
> + power-domains = <&power RK3399_PD_EMMC>;
> status = "disabled";
> };
>
> @@ -690,6 +691,11 @@
> status = "disabled";
> };
>
> + qos_emmc: qos@ffa58000 {
> + compatible = "syscon";
> + reg = <0x0 0xffa58000 0x0 0x20>;
> + };
> +
> qos_gmac: qos@ffa5c000 {
> compatible = "syscon";
> reg = <0x0 0xffa5c000 0x0 0x20>;
> @@ -823,6 +829,11 @@
> };
>
> /* These power domains are grouped by VD_LOGIC */
> + pd_emmc@RK3399_PD_EMMC {
> + reg = <RK3399_PD_EMMC>;
> + clocks = <&cru ACLK_EMMC>;
> + pm_qos = <&qos_emmc>;
> + };
> pd_gmac@RK3399_PD_GMAC {
> reg = <RK3399_PD_GMAC>;
> clocks = <&cru ACLK_GMAC>;
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH resend] input: touchscreen: silead: Add regulator support
From: Hans de Goede @ 2016-11-14 14:45 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring
Cc: linux-input, linux-arm-kernel, devicetree, Hans de Goede
In-Reply-To: <20161114144502.10595-1-hdegoede@redhat.com>
On some tablets the touchscreen controller is powered by seperate
regulators, add support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/input/touchscreen/silead_gsl1680.txt | 2 +
drivers/input/touchscreen/silead.c | 51 ++++++++++++++++++++--
2 files changed, 49 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
index e844c3f..b726823 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/silead_gsl1680.txt
@@ -22,6 +22,8 @@ Optional properties:
- touchscreen-inverted-y : See touchscreen.txt
- touchscreen-swapped-x-y : See touchscreen.txt
- silead,max-fingers : maximum number of fingers the touchscreen can detect
+- vddio-supply : regulator phandle for controller VDDIO
+- avdd-supply : regulator phandle for controller AVDD
Example:
diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c
index f502c84..c6a1ae9 100644
--- a/drivers/input/touchscreen/silead.c
+++ b/drivers/input/touchscreen/silead.c
@@ -29,6 +29,7 @@
#include <linux/input/touchscreen.h>
#include <linux/pm.h>
#include <linux/irq.h>
+#include <linux/regulator/consumer.h>
#include <asm/unaligned.h>
@@ -72,6 +73,8 @@ enum silead_ts_power {
struct silead_ts_data {
struct i2c_client *client;
struct gpio_desc *gpio_power;
+ struct regulator *vddio;
+ struct regulator *avdd;
struct input_dev *input;
char fw_name[64];
struct touchscreen_properties prop;
@@ -465,21 +468,52 @@ static int silead_ts_probe(struct i2c_client *client,
if (client->irq <= 0)
return -ENODEV;
+ data->vddio = devm_regulator_get_optional(dev, "vddio");
+ if (IS_ERR(data->vddio)) {
+ if (PTR_ERR(data->vddio) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ data->vddio = NULL;
+ }
+
+ data->avdd = devm_regulator_get_optional(dev, "avdd");
+ if (IS_ERR(data->avdd)) {
+ if (PTR_ERR(data->avdd) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ data->avdd = NULL;
+ }
+
+ /*
+ * Enable regulators at probe and disable them at remove, we need
+ * to keep the chip powered otherwise it forgets its firmware.
+ */
+ if (data->vddio) {
+ error = regulator_enable(data->vddio);
+ if (error)
+ return error;
+ }
+
+ if (data->avdd) {
+ error = regulator_enable(data->avdd);
+ if (error)
+ goto disable_vddio;
+ }
+
/* Power GPIO pin */
data->gpio_power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW);
if (IS_ERR(data->gpio_power)) {
if (PTR_ERR(data->gpio_power) != -EPROBE_DEFER)
dev_err(dev, "Shutdown GPIO request failed\n");
- return PTR_ERR(data->gpio_power);
+ error = PTR_ERR(data->gpio_power);
+ goto disable_avdd;
}
error = silead_ts_setup(client);
if (error)
- return error;
+ goto disable_avdd;
error = silead_ts_request_input_dev(data);
if (error)
- return error;
+ goto disable_avdd;
error = devm_request_threaded_irq(dev, client->irq,
NULL, silead_ts_threaded_irq_handler,
@@ -487,10 +521,19 @@ static int silead_ts_probe(struct i2c_client *client,
if (error) {
if (error != -EPROBE_DEFER)
dev_err(dev, "IRQ request failed %d\n", error);
- return error;
+ goto disable_avdd;
}
return 0;
+
+disable_avdd:
+ if (data->avdd)
+ regulator_disable(data->avdd);
+disable_vddio:
+ if (data->vddio)
+ regulator_disable(data->vddio);
+
+ return error;
}
static int __maybe_unused silead_ts_suspend(struct device *dev)
--
2.9.3
^ permalink raw reply related
* [PATCH resend 0/1] input: touchscreen: silead: Add regulator support
From: Hans de Goede @ 2016-11-14 14:45 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring
Cc: linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree
Hi Dmitri,
This one seems to have fallen through the cracks, can you pick it up
please ?
Regards,
Hans
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v5 4/5] USB: ohci: da8xx: Add devicetree bindings
From: Axel Haslam @ 2016-11-14 14:41 UTC (permalink / raw)
To: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz,
khilman-DgEjT+Ai2ygdnm+yROfE0A, kishon-l0cyMroinI0
Cc: linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Axel Haslam,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20161114144103.12120-1-ahaslam-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
This patch documents the device tree bindings required for
the ohci controller found in TI da8xx family of SoC's
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Axel Haslam <ahaslam-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
.../devicetree/bindings/usb/ohci-da8xx.txt | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/ohci-da8xx.txt
diff --git a/Documentation/devicetree/bindings/usb/ohci-da8xx.txt b/Documentation/devicetree/bindings/usb/ohci-da8xx.txt
new file mode 100644
index 0000000..2dc8f67
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ohci-da8xx.txt
@@ -0,0 +1,23 @@
+DA8XX USB OHCI controller
+
+Required properties:
+
+ - compatible: Should be "ti,da830-ohci"
+ - reg: Should contain one register range i.e. start and length
+ - interrupts: Description of the interrupt line
+ - phys: Phandle for the PHY device
+ - phy-names: Should be "usb-phy"
+
+Optional properties:
+ - vbus-supply: phandle of regulator that controls vbus power / over-current
+
+Example:
+
+ohci: usb@0225000 {
+ compatible = "ti,da830-ohci";
+ reg = <0x225000 0x1000>;
+ interrupts = <59>;
+ phys = <&usb_phy 1>;
+ phy-names = "usb-phy";
+ vbus-supply = <®_usb_ohci>;
+};
--
2.10.1
--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* Re: [PATCH v5 3/3] clocksource: Add clockevent support to NPS400 driver
From: Daniel Lezcano @ 2016-11-14 14:34 UTC (permalink / raw)
To: Noam Camus
Cc: robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <DB6PR0501MB25183C670A48F44DB916D7FEAABC0@DB6PR0501MB2518.eurprd05.prod.outlook.com>
On Mon, Nov 14, 2016 at 01:58:15PM +0000, Noam Camus wrote:
> > From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org]
> > Sent: Monday, November 14, 2016 1:23 PM
>
>
> >> + */
> >> +static void nps_clkevent_rm_thread(bool remove_thread) {
> >> + unsigned int cflags;
> >> + unsigned int enabled_threads = 0;
> >> + int thread;
> >> +
> >> + hw_schd_save(&cflags);
>
> >I'm not used with hardware scheduling. Can you explain why this is needed
> >here ? What >window race we want to close ?
> We are using HW scheduling off/on in order to keep consistency of auxiliary
> registers shared among HW threads within the same core. Example to such
> registers NPS_REG_TIMER0_TSI and NPS_REG_TIMER0_CTRL. Since update procedure
> of these registers is not atomic we use save/restore macros to turn off/on
> the HW scheduling. This way we insure that no HW scheduling occurs and
> another HW thread (represented as another CPU) will execute in this same
> critical code path. If we take for example nps_clkevent_add_thread() we can
> see that we are doing some read modify write to NPS_REG_TIMER0_TSI and
> optionally writing to NPS_REG_TIMER0_CTRL. This flow should be atomic and is
> protected by our save/restore macros. Do note that interrupts are disabled
> at this point so we are safe from all asynchronous events.
The function nps_clkevent_timer_event_setup() writes into the NPS_REG_TIMER0_CTRL
register but there is no critical section there. What prevents another HW thread
to write this register at the same time ?
I do believe we have a framework to access shared registers, otherwise a simple
spinlock would be simpler and perhaps faster than disabling the entire hardware
scheduling for the system, no ?
> >> +static void nps_clkevent_add_thread(bool set_event) {
> >> + int thread;
> >> + unsigned int cflags, enabled_threads;
> >> +
> >> + hw_schd_save(&cflags);
> >> +
> >> + /* add thread to TSI1 */
> >> + thread = read_aux_reg(CTOP_AUX_THREAD_ID);
> >> + enabled_threads = read_aux_reg(NPS_REG_TIMER0_TSI);
> >> + enabled_threads |= (1 << thread);
> >> + write_aux_reg(NPS_REG_TIMER0_TSI, enabled_threads);
> >> +
> >> + /* set next timer event */
> >> + if (set_event)
> >> + write_aux_reg(NPS_REG_TIMER0_CTRL,
> >> + TIMER0_CTRL_IE | TIMER0_CTRL_NH);
> >> +
> >> + hw_schd_restore(cflags);
> >> +}
>
> >Not sure the boolean parameters for *_rm_thread and *_add_thread helps to
> >clarify the code. Depending on the race window with hw_schd_save/restore We
> >should be able to simplify it.
> I am not sure I am following you here, how race window may simplify this
> code? If those routines will get no parameter I can't determine when to add
> or not (same as remove). ...
Regarding the comment I did above, it is possible the critical section is
reduced and moved into the shutdown function. Thus, the boolean wouldn't be
needed anymore, well that is conditional to the above comment. Discard the
comment for the moment, until the hw sched vs spinlock vs NPS_REG_TIMER0_CTRL
is sorted out.
> >> +static DEFINE_PER_CPU(struct clock_event_device, nps_clockevent_device) = {
> >> + .name = "NPS Timer0",
> >> + .features = CLOCK_EVT_FEAT_ONESHOT |
> >> + CLOCK_EVT_FEAT_PERIODIC,
> >> + .rating = 300,
> >> + .set_next_event = nps_clkevent_set_next_event,
> >> + .set_state_periodic = nps_clkevent_set_periodic,
> >> + .set_state_oneshot = nps_clkevent_set_oneshot,
> >> + .set_state_oneshot_stopped = nps_clkevent_timer_shutdown,
> >> + .set_state_shutdown = nps_clkevent_timer_shutdown,
>
> >Doesn't set_state_shutdown and set_state_oneshot_stopped need to remove the HW thread from the TSI ?
> You are correct, I will fix that.
And tick_resume. Perhaps, that is the reason why NO_HZ hangs.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* [PATCH 2/2] Add basic support for DW CSI-2 Host IPK
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
To: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
linux-media
Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil,
laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA,
Ramiro.Oliveira
In-Reply-To: <cover.1479132355.git.roliveir@synopsys.com>
Add support for basic configuration of the DW CSI-2 Host IPK
Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
MAINTAINERS | 7 +
drivers/media/platform/Kconfig | 1 +
drivers/media/platform/Makefile | 2 +
drivers/media/platform/dwc/Kconfig | 36 ++
drivers/media/platform/dwc/Makefile | 3 +
drivers/media/platform/dwc/dw_mipi_csi.c | 687 +++++++++++++++++++++++
drivers/media/platform/dwc/dw_mipi_csi.h | 179 ++++++
drivers/media/platform/dwc/plat_ipk.c | 835 ++++++++++++++++++++++++++++
drivers/media/platform/dwc/plat_ipk.h | 97 ++++
drivers/media/platform/dwc/plat_ipk_video.h | 97 ++++
drivers/media/platform/dwc/video_device.c | 741 ++++++++++++++++++++++++
drivers/media/platform/dwc/video_device.h | 101 ++++
12 files changed, 2786 insertions(+)
create mode 100644 drivers/media/platform/dwc/Kconfig
create mode 100644 drivers/media/platform/dwc/Makefile
create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.c
create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.h
create mode 100644 drivers/media/platform/dwc/plat_ipk.c
create mode 100644 drivers/media/platform/dwc/plat_ipk.h
create mode 100644 drivers/media/platform/dwc/plat_ipk_video.h
create mode 100644 drivers/media/platform/dwc/video_device.c
create mode 100644 drivers/media/platform/dwc/video_device.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 6a71422..f54dfd8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10618,6 +10618,13 @@ S: Maintained
F: drivers/staging/media/st-cec/
F: Documentation/devicetree/bindings/media/stih-cec.txt
+SYNOPSYS DESIGNWARE CSI-2 HOST IPK DRIVER
+M: Ramiro Oliveira <roliveir@synopsys.com>
+L: linux-media@vger.kernel.org
+T: git git://linuxtv.org/media_tree.git
+S: Maintained
+F: drivers/media/platform/dwc/
+
SYNOPSYS DESIGNWARE DMAC DRIVER
M: Viresh Kumar <vireshk@kernel.org>
M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 754edbf1..6fef760f 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -120,6 +120,7 @@ source "drivers/media/platform/am437x/Kconfig"
source "drivers/media/platform/xilinx/Kconfig"
source "drivers/media/platform/rcar-vin/Kconfig"
source "drivers/media/platform/atmel/Kconfig"
+source "drivers/media/platform/dwc/Kconfig"
config VIDEO_TI_CAL
tristate "TI CAL (Camera Adaptation Layer) driver"
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index f842933..623f5d2 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -61,6 +61,8 @@ obj-$(CONFIG_VIDEO_RCAR_VIN) += rcar-vin/
obj-$(CONFIG_VIDEO_ATMEL_ISC) += atmel/
+obj-$(CONFIG_VIDEO_DWC) += dwc/
+
ccflags-y += -I$(srctree)/drivers/media/i2c
obj-$(CONFIG_VIDEO_MEDIATEK_VPU) += mtk-vpu/
diff --git a/drivers/media/platform/dwc/Kconfig b/drivers/media/platform/dwc/Kconfig
new file mode 100644
index 0000000..fb8533b
--- /dev/null
+++ b/drivers/media/platform/dwc/Kconfig
@@ -0,0 +1,36 @@
+config VIDEO_DWC
+ bool "Designware Cores CSI-2 IPK (EXPERIMENTAL)"
+ depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF && HAS_DMA
+ help
+ Say Y here to enable support for the DesignWare Cores CSI-2 Host IP
+ Prototyping Kit.
+
+if VIDEO_DWC
+config DWC_PLATFORM
+ tristate "SNPS DWC MIPI CSI2 Host"
+ depends on VIDEO_DWC
+ help
+ This is the V4L2 plaftorm driver driver for the DWC CSI-2 HOST IPK
+
+ To compile this driver as a module, choose M here
+
+
+config DWC_MIPI_CSI2_HOST
+ tristate "SNPS DWC MIPI CSI2 Host"
+ select GENERIC_PHY
+ depends on VIDEO_DWC
+ help
+ This is a V4L2 driver for SNPS DWC MIPI-CSI2
+
+ To compile this driver as a module, choose M here
+
+config DWC_VIDEO_DEVICE
+ tristate "DWC VIDEO DEVICE"
+ select VIDEOBUF2_VMALLOC
+ select VIDEOBUF2_DMA_CONTIG
+ depends on VIDEO_DWC
+ help
+ This is a V4L2 driver for SNPS Video device
+ To compile this driver as a module, choose M here
+
+endif # VIDEO_DWC
diff --git a/drivers/media/platform/dwc/Makefile b/drivers/media/platform/dwc/Makefile
new file mode 100644
index 0000000..75c74b7
--- /dev/null
+++ b/drivers/media/platform/dwc/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_DWC_PLATFORM) += plat_ipk.o
+obj-$(CONFIG_DWC_MIPI_CSI2_HOST) += dw_mipi_csi.o
+obj-$(CONFIG_DWC_VIDEO_DEVICE) += video_device.o
diff --git a/drivers/media/platform/dwc/dw_mipi_csi.c b/drivers/media/platform/dwc/dw_mipi_csi.c
new file mode 100644
index 0000000..1337a5e
--- /dev/null
+++ b/drivers/media/platform/dwc/dw_mipi_csi.c
@@ -0,0 +1,687 @@
+/*
+ * DWC MIPI CSI-2 Host device driver
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+
+#include "dw_mipi_csi.h"
+
+/** @short Driver args: debug */
+static unsigned int debug;
+module_param(debug, uint, 0644);
+MODULE_PARM_DESC(debug, "Activates debug info");
+
+/*
+ * Basic IO read and write operations
+ */
+
+/**
+ * @short Video formats supported by the MIPI CSI-2
+ */
+static const struct mipi_fmt dw_mipi_csi_formats[] = {
+ {
+ .name = "RAW BGGR 8",
+ .code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .depth = 8,
+ },
+ {
+ .name = "RAW10",
+ .code = MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE,
+ .depth = 10,
+ },
+ {
+ .name = "RGB565",
+ .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
+ .depth = 16,
+ },
+ {
+ .name = "BGR565",
+ .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
+ .depth = 16,
+ },
+ {
+ .name = "RGB888",
+ .code = MEDIA_BUS_FMT_RGB888_2X12_LE,
+ .depth = 24,
+ },
+ {
+ .name = "BGR888",
+ .code = MEDIA_BUS_FMT_RGB888_2X12_BE,
+ .depth = 24,
+ },
+};
+
+static struct mipi_csi_dev *
+sd_to_mipi_csi_dev(struct v4l2_subdev *sdev)
+{
+ return container_of(sdev, struct mipi_csi_dev, sd);
+}
+
+void
+dw_mipi_csi_write(struct mipi_csi_dev *dev,
+ unsigned int address, unsigned int data)
+{
+ iowrite32(data, dev->base_address + address);
+}
+
+u32
+dw_mipi_csi_read(struct mipi_csi_dev *dev, unsigned long address)
+{
+ return ioread32(dev->base_address + address);
+}
+
+void
+dw_mipi_csi_write_part(struct mipi_csi_dev *dev,
+ unsigned long address, unsigned long data,
+ unsigned char shift, unsigned char width)
+{
+ u32 mask = (1 << width) - 1;
+ u32 temp = dw_mipi_csi_read(dev, address);
+
+ temp &= ~(mask << shift);
+ temp |= (data & mask) << shift;
+ dw_mipi_csi_write(dev, address, temp);
+}
+
+static const struct mipi_fmt *
+find_dw_mipi_csi_format(struct v4l2_mbus_framefmt *mf)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(dw_mipi_csi_formats); i++)
+ if (mf->code == dw_mipi_csi_formats[i].code)
+ return &dw_mipi_csi_formats[i];
+ return NULL;
+}
+
+int
+enable_video_output(struct mipi_csi_dev *dev)
+{
+ return 0;
+}
+
+int
+disable_video_output(struct mipi_csi_dev *dev)
+{
+ phy_power_off(dev->phy);
+ return 0;
+}
+
+static void
+dw_mipi_csi_reset(struct mipi_csi_dev *dev)
+{
+ dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 0);
+ /* mdelay(1); */
+ dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 1);
+}
+
+static int
+dw_mipi_csi_mask_irq_power_off(struct mipi_csi_dev *dev)
+{
+ /* set only one lane (lane 0) as active (ON) */
+ dw_mipi_csi_write(dev, R_CSI2_N_LANES, 0);
+
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY_FATAL, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT_FATAL, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_FRAME_FATAL, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_LINE, 0);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_IPI, 0);
+
+ dw_mipi_csi_write(dev, R_CSI2_CTRL_RESETN, 0);
+
+ return 0;
+
+}
+
+static int
+dw_mipi_csi_hw_stdby(struct mipi_csi_dev *dev)
+{
+ /* set only one lane (lane 0) as active (ON) */
+ dw_mipi_csi_reset(dev);
+
+ dw_mipi_csi_write(dev, R_CSI2_N_LANES, 0);
+
+ phy_init(dev->phy);
+
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY_FATAL, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT_FATAL, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_FRAME_FATAL, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PHY, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_PKT, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_LINE, 0xFFFFFFFF);
+ dw_mipi_csi_write(dev, R_CSI2_MASK_INT_IPI, 0xFFFFFFFF);
+
+ return 0;
+
+}
+
+void
+dw_mipi_csi_set_ipi_fmt(struct mipi_csi_dev *dev)
+{
+ switch (dev->fmt->code) {
+ case MEDIA_BUS_FMT_RGB565_2X8_BE:
+ case MEDIA_BUS_FMT_RGB565_2X8_LE:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB565);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RGB 565");
+ break;
+
+ case MEDIA_BUS_FMT_RGB888_2X12_LE:
+ case MEDIA_BUS_FMT_RGB888_2X12_BE:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB888);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RGB 888");
+ break;
+ case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RAW10);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RAW 10");
+ break;
+ case MEDIA_BUS_FMT_SBGGR8_1X8:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RAW8);
+ v4l2_dbg(1, debug, &dev->sd, "DT: RAW 8");
+ break;
+ default:
+ dw_mipi_csi_write(dev, R_CSI2_IPI_DATA_TYPE, CSI_2_RGB565);
+ v4l2_dbg(1, debug, &dev->sd, "Error");
+ break;
+ }
+}
+
+void
+__dw_mipi_csi_fill_timings(struct mipi_csi_dev *dev,
+ const struct v4l2_bt_timings *bt)
+{
+
+ if (bt == NULL)
+ return;
+
+ dev->hw.hsa = bt->hsync;
+ dev->hw.hbp = bt->hbackporch;
+ dev->hw.hsd = bt->hsync;
+ dev->hw.htotal = bt->height + bt->vfrontporch +
+ bt->vsync + bt->vbackporch;
+ dev->hw.vsa = bt->vsync;
+ dev->hw.vbp = bt->vbackporch;
+ dev->hw.vfp = bt->vfrontporch;
+ dev->hw.vactive = bt->height;
+}
+
+void
+dw_mipi_csi_start(struct mipi_csi_dev *dev)
+{
+ const struct v4l2_bt_timings *bt = &v4l2_dv_timings_presets[0].bt;
+
+ __dw_mipi_csi_fill_timings(dev, bt);
+
+ dw_mipi_csi_write(dev, R_CSI2_N_LANES, (dev->hw.num_lanes - 1));
+ v4l2_dbg(1, debug, &dev->sd, "N Lanes: %d\n", dev->hw.num_lanes);
+
+ /*IPI Related Configuration */
+ if ((dev->hw.output_type == IPI_OUT)
+ || (dev->hw.output_type == BOTH_OUT)) {
+
+ dw_mipi_csi_write_part(dev, R_CSI2_IPI_MODE, dev->hw.ipi_mode,
+ 0, 1);
+ v4l2_dbg(1, debug, &dev->sd, "IPI MODE: %d\n",
+ dev->hw.ipi_mode);
+
+ dw_mipi_csi_write_part(dev, R_CSI2_IPI_MODE,
+ dev->hw.ipi_color_mode, 8, 1);
+ v4l2_dbg(1, debug, &dev->sd, "Color Mode: %d\n",
+ dev->hw.ipi_color_mode);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VCID, dev->hw.virtual_ch);
+ v4l2_dbg(1, debug, &dev->sd, "Virtual Channel: %d\n",
+ dev->hw.virtual_ch);
+
+ dw_mipi_csi_write_part(dev, R_CSI2_IPI_MEM_FLUSH,
+ dev->hw.ipi_auto_flush, 8, 1);
+ v4l2_dbg(1, debug, &dev->sd, "Auto-flush: %d\n",
+ dev->hw.ipi_auto_flush);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HSA_TIME, dev->hw.hsa);
+ v4l2_dbg(1, debug, &dev->sd, "HSA: %d\n", dev->hw.hsa);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HBP_TIME, dev->hw.hbp);
+ v4l2_dbg(1, debug, &dev->sd, "HBP: %d\n", dev->hw.hbp);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HSD_TIME, dev->hw.hsd);
+ v4l2_dbg(1, debug, &dev->sd, "HSD: %d\n", dev->hw.hsd);
+
+ if (dev->hw.ipi_mode == AUTO_TIMING) {
+ dw_mipi_csi_write(dev, R_CSI2_IPI_HLINE_TIME,
+ dev->hw.htotal);
+ v4l2_dbg(1, debug, &dev->sd, "H total: %d\n",
+ dev->hw.htotal);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VSA_LINES,
+ dev->hw.vsa);
+ v4l2_dbg(1, debug, &dev->sd, "VSA: %d\n", dev->hw.vsa);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VBP_LINES,
+ dev->hw.vbp);
+ v4l2_dbg(1, debug, &dev->sd, "VBP: %d\n", dev->hw.vbp);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VFP_LINES,
+ dev->hw.vfp);
+ v4l2_dbg(1, debug, &dev->sd, "VFP: %d\n", dev->hw.vfp);
+
+ dw_mipi_csi_write(dev, R_CSI2_IPI_VACTIVE_LINES,
+ dev->hw.vactive);
+ v4l2_dbg(1, debug, &dev->sd, "V Active: %d\n",
+ dev->hw.vactive);
+ }
+ }
+
+ phy_power_on(dev->phy);
+}
+
+static int
+dw_mipi_csi_enum_mbus_code(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->index >= ARRAY_SIZE(dw_mipi_csi_formats))
+ return -EINVAL;
+
+ code->code = dw_mipi_csi_formats[code->index].code;
+ return 0;
+}
+
+static struct mipi_fmt const *
+dw_mipi_csi_try_format(struct v4l2_mbus_framefmt *mf)
+{
+ struct mipi_fmt const *fmt;
+
+ fmt = find_dw_mipi_csi_format(mf);
+ if (fmt == NULL)
+ fmt = &dw_mipi_csi_formats[0];
+
+ mf->code = fmt->code;
+ return fmt;
+}
+
+static struct v4l2_mbus_framefmt *
+__dw_mipi_csi_get_format(struct mipi_csi_dev *dev,
+ struct v4l2_subdev_pad_config *cfg,
+ enum v4l2_subdev_format_whence which)
+{
+ if (which == V4L2_SUBDEV_FORMAT_TRY)
+ return cfg ? v4l2_subdev_get_try_format(&dev->sd, cfg,
+ 0) : NULL;
+
+ return &dev->format;
+}
+
+static int
+dw_mipi_csi_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+ struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+ struct mipi_fmt const *dev_fmt;
+ struct v4l2_mbus_framefmt *mf;
+ int i = 0;
+ const struct v4l2_bt_timings *bt_r = &v4l2_dv_timings_presets[0].bt;
+
+ mf = __dw_mipi_csi_get_format(dev, cfg, fmt->which);
+
+ dev_fmt = dw_mipi_csi_try_format(&fmt->format);
+ if (dev_fmt) {
+ *mf = fmt->format;
+ if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
+ dev->fmt = dev_fmt;
+ dw_mipi_csi_set_ipi_fmt(dev);
+ }
+ while (v4l2_dv_timings_presets[i].bt.width) {
+ const struct v4l2_bt_timings *bt =
+ &v4l2_dv_timings_presets[i].bt;
+ if (mf->width == bt->width && mf->height == bt->width) {
+ __dw_mipi_csi_fill_timings(dev, bt);
+ return 0;
+ }
+ i++;
+ }
+
+ __dw_mipi_csi_fill_timings(dev, bt_r);
+ return 0;
+
+}
+
+static int
+dw_mipi_csi_get_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+ struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+ struct v4l2_mbus_framefmt *mf;
+
+ mf = __dw_mipi_csi_get_format(dev, cfg, fmt->which);
+ if (!mf)
+ return -EINVAL;
+
+ mutex_lock(&dev->lock);
+ fmt->format = *mf;
+ mutex_unlock(&dev->lock);
+ return 0;
+}
+
+static int
+dw_mipi_csi_s_power(struct v4l2_subdev *sd, int on)
+{
+ struct mipi_csi_dev *dev = sd_to_mipi_csi_dev(sd);
+
+ if (on) {
+ dw_mipi_csi_hw_stdby(dev);
+ dw_mipi_csi_start(dev);
+ } else {
+ dw_mipi_csi_mask_irq_power_off(dev);
+ }
+
+ return 0;
+}
+
+static int
+dw_mipi_csi_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+ struct v4l2_mbus_framefmt *format =
+ v4l2_subdev_get_try_format(sd, fh->pad, 0);
+
+ format->colorspace = V4L2_COLORSPACE_SRGB;
+ format->code = dw_mipi_csi_formats[0].code;
+ format->width = MIN_WIDTH;
+ format->height = MIN_HEIGHT;
+ format->field = V4L2_FIELD_NONE;
+
+ return 0;
+}
+
+static const struct v4l2_subdev_internal_ops dw_mipi_csi_sd_internal_ops = {
+ .open = dw_mipi_csi_open,
+};
+
+static struct v4l2_subdev_core_ops dw_mipi_csi_core_ops = {
+ .s_power = dw_mipi_csi_s_power,
+};
+
+static struct v4l2_subdev_pad_ops dw_mipi_csi_pad_ops = {
+ .enum_mbus_code = dw_mipi_csi_enum_mbus_code,
+ .get_fmt = dw_mipi_csi_get_fmt,
+ .set_fmt = dw_mipi_csi_set_fmt,
+};
+
+static struct v4l2_subdev_ops dw_mipi_csi_subdev_ops = {
+ .core = &dw_mipi_csi_core_ops,
+ .pad = &dw_mipi_csi_pad_ops,
+};
+
+static irqreturn_t
+dw_mipi_csi_irq1(int irq, void *dev_id)
+{
+
+ struct mipi_csi_dev *dev = dev_id;
+ u32 int_status, ind_status;
+ unsigned long flags;
+
+ int_status = dw_mipi_csi_read(dev, R_CSI2_INTERRUPT);
+ spin_lock_irqsave(&dev->slock, flags);
+
+ if (int_status & CSI2_INT_PHY_FATAL) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PHY_FATAL);
+ pr_info_ratelimited("%08X CSI INT PHY FATAL: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_PKT_FATAL) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PKT_FATAL);
+ pr_info_ratelimited("%08X CSI INT PKT FATAL: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_FRAME_FATAL) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_FRAME_FATAL);
+ pr_info_ratelimited("%08X CSI INT FRAME FATAL: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_PHY) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PHY);
+ pr_info_ratelimited("%08X CSI INT PHY: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_PKT) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_PKT);
+ pr_info_ratelimited("%08X CSI INT PKT: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_LINE) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_LINE);
+ pr_info_ratelimited("%08X CSI INT LINE: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+
+ if (int_status & CSI2_INT_IPI) {
+ ind_status = dw_mipi_csi_read(dev, R_CSI2_INT_IPI);
+ pr_info_ratelimited("%08X CSI INT IPI: %08X\n",
+ (uint32_t) dev->base_address, ind_status);
+ }
+ spin_unlock_irqrestore(&dev->slock, flags);
+ return IRQ_HANDLED;
+}
+
+static int
+dw_mipi_csi_parse_dt(struct platform_device *pdev, struct mipi_csi_dev *dev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ int reg;
+ int ret = 0;
+
+ /* Device tree information */
+ ret = of_property_read_u32(node, "data-lanes", &dev->hw.num_lanes);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read data-lanes\n");
+ return ret;
+ }
+
+ ret = of_property_read_u32(node, "output-type", &dev->hw.output_type);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read output-type\n");
+ return ret;
+ }
+
+ ret = of_property_read_u32(node, "ipi-mode", &dev->hw.ipi_mode);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read ipi-mode\n");
+ return ret;
+ }
+
+ ret =
+ of_property_read_u32(node, "ipi-auto-flush",
+ &dev->hw.ipi_auto_flush);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read ipi-auto-flush\n");
+ return ret;
+ }
+
+ ret =
+ of_property_read_u32(node, "ipi-color-mode",
+ &dev->hw.ipi_color_mode);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read ipi-color-mode\n");
+ return ret;
+ }
+
+ ret =
+ of_property_read_u32(node, "virtual-channel", &dev->hw.virtual_ch);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read virtual-channel\n");
+ return ret;
+ }
+
+ node = of_get_child_by_name(node, "port");
+ if (!node)
+ return -EINVAL;
+
+ ret = of_property_read_u32(node, "reg", ®);
+ if (ret) {
+ dev_err(&pdev->dev, "Couldn't read reg value\n");
+ return ret;
+ }
+ dev->index = reg - 1;
+
+ if (dev->index >= CSI_MAX_ENTITIES)
+ return -ENXIO;
+
+ return 0;
+}
+
+static const struct of_device_id dw_mipi_csi_of_match[];
+
+/**
+ * @short Initialization routine - Entry point of the driver
+ * @param[in] pdev pointer to the platform device structure
+ * @return 0 on success and a negative number on failure
+ * Refer to Linux errors.
+ */
+static int mipi_csi_probe(struct platform_device *pdev)
+{
+ const struct of_device_id *of_id;
+ struct device *dev = &pdev->dev;
+ struct resource *res = NULL;
+ struct mipi_csi_dev *mipi_csi;
+ int ret = -ENOMEM;
+
+ dev_info(&pdev->dev, "Installing MIPI CSI-2 module\n");
+
+ dev_dbg(&pdev->dev, "Device registration\n");
+ mipi_csi = devm_kzalloc(dev, sizeof(*mipi_csi), GFP_KERNEL);
+ if (!dev)
+ return -ENOMEM;
+
+ mutex_init(&mipi_csi->lock);
+ spin_lock_init(&mipi_csi->slock);
+ mipi_csi->pdev = pdev;
+
+ of_id = of_match_node(dw_mipi_csi_of_match, dev->of_node);
+ if (WARN_ON(of_id == NULL))
+ return -EINVAL;
+
+ ret = dw_mipi_csi_parse_dt(pdev, mipi_csi);
+ if (ret < 0)
+ return ret;
+
+ dev_info(dev, "Request DPHY\n");
+ mipi_csi->phy = devm_phy_get(dev, "csi2-dphy");
+ if (IS_ERR(mipi_csi->phy))
+ return PTR_ERR(mipi_csi->phy);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mipi_csi->base_address = devm_ioremap_resource(dev, res);
+
+ if (IS_ERR(mipi_csi->base_address))
+ return PTR_ERR(mipi_csi->base_address);
+
+ mipi_csi->ctrl_irq_number = platform_get_irq(pdev, 0);
+ if (mipi_csi->ctrl_irq_number <= 0) {
+ dev_err(dev, "IRQ number not set.\n");
+ return mipi_csi->ctrl_irq_number;
+ }
+
+ ret = devm_request_irq(dev, mipi_csi->ctrl_irq_number,
+ dw_mipi_csi_irq1, IRQF_SHARED,
+ dev_name(dev), mipi_csi);
+ if (ret) {
+ dev_err(dev, "IRQ failed\n");
+ goto end;
+ }
+
+ v4l2_subdev_init(&mipi_csi->sd, &dw_mipi_csi_subdev_ops);
+ mipi_csi->sd.owner = THIS_MODULE;
+ snprintf(mipi_csi->sd.name, sizeof(mipi_csi->sd.name), "%s.%d",
+ CSI_DEVICE_NAME, mipi_csi->index);
+ mipi_csi->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ mipi_csi->fmt = &dw_mipi_csi_formats[0];
+
+ mipi_csi->format.code = dw_mipi_csi_formats[0].code;
+ mipi_csi->format.width = MIN_WIDTH;
+ mipi_csi->format.height = MIN_HEIGHT;
+
+ mipi_csi->pads[CSI_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
+ mipi_csi->pads[CSI_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
+ ret = media_entity_pads_init(&mipi_csi->sd.entity,
+ CSI_PADS_NUM, mipi_csi->pads);
+
+ if (ret < 0) {
+ dev_err(dev, "Media Entity init failed\n");
+ goto entity_cleanup;
+ }
+
+ /* This allows to retrieve the platform device id by the host driver */
+ v4l2_set_subdevdata(&mipi_csi->sd, pdev);
+
+ /* .. and a pointer to the subdev. */
+ platform_set_drvdata(pdev, &mipi_csi->sd);
+
+ dw_mipi_csi_mask_irq_power_off(mipi_csi);
+ dev_info(dev, "DW MIPI CSI-2 Host registered successfully\n");
+ return 0;
+
+entity_cleanup:
+ media_entity_cleanup(&mipi_csi->sd.entity);
+end:
+ return ret;
+}
+
+/**
+ * @short Exit routine - Exit point of the driver
+ * @param[in] pdev pointer to the platform device structure
+ * @return 0 on success and a negative number on failure
+ * Refer to Linux errors.
+ */
+static int mipi_csi_remove(struct platform_device *pdev)
+{
+ struct v4l2_subdev *sd = platform_get_drvdata(pdev);
+ struct mipi_csi_dev *mipi_csi = sd_to_mipi_csi_dev(sd);
+
+ dev_dbg(&pdev->dev, "Removing MIPI CSI-2 module\n");
+ media_entity_cleanup(&mipi_csi->sd.entity);
+
+ return 0;
+}
+
+/**
+ * @short of_device_id structure
+ */
+static const struct of_device_id dw_mipi_csi_of_match[] = {
+ {
+ .compatible = "snps,dw-mipi-csi"},
+ { /* sentinel */ },
+};
+
+MODULE_DEVICE_TABLE(of, dw_mipi_csi_of_match);
+
+/**
+ * @short Platform driver structure
+ */
+static struct platform_driver __refdata dw_mipi_csi_pdrv = {
+ .remove = mipi_csi_remove,
+ .probe = mipi_csi_probe,
+ .driver = {
+ .name = CSI_DEVICE_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = dw_mipi_csi_of_match,
+ },
+};
+
+module_platform_driver(dw_mipi_csi_pdrv);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Synopsys DW MIPI CSI-2 Host driver");
diff --git a/drivers/media/platform/dwc/dw_mipi_csi.h b/drivers/media/platform/dwc/dw_mipi_csi.h
new file mode 100644
index 0000000..5e4c48c
--- /dev/null
+++ b/drivers/media/platform/dwc/dw_mipi_csi.h
@@ -0,0 +1,179 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef DW_MIPI_CSI_H_
+#define DW_MIPI_CSI_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_graph.h>
+#include <linux/delay.h>
+#include <linux/wait.h>
+#include <linux/string.h>
+#include <linux/phy/phy.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-dv-timings.h>
+#include <linux/videodev2.h>
+#include <linux/io.h>
+
+#include "plat_ipk_video.h"
+
+#define CSI_DEVICE_NAME "dw-mipi-csi"
+
+/** @short DWC MIPI CSI-2 register addresses*/
+enum register_addresses {
+ R_CSI2_VERSION = 0x00,
+ R_CSI2_N_LANES = 0x04,
+ R_CSI2_CTRL_RESETN = 0x08,
+ R_CSI2_INTERRUPT = 0x0C,
+ R_CSI2_DATA_IDS_1 = 0x10,
+ R_CSI2_DATA_IDS_2 = 0x14,
+ R_CSI2_IPI_MODE = 0x80,
+ R_CSI2_IPI_VCID = 0x84,
+ R_CSI2_IPI_DATA_TYPE = 0x88,
+ R_CSI2_IPI_MEM_FLUSH = 0x8C,
+ R_CSI2_IPI_HSA_TIME = 0x90,
+ R_CSI2_IPI_HBP_TIME = 0x94,
+ R_CSI2_IPI_HSD_TIME = 0x98,
+ R_CSI2_IPI_HLINE_TIME = 0x9C,
+ R_CSI2_IPI_VSA_LINES = 0xB0,
+ R_CSI2_IPI_VBP_LINES = 0xB4,
+ R_CSI2_IPI_VFP_LINES = 0xB8,
+ R_CSI2_IPI_VACTIVE_LINES = 0xBC,
+ R_CSI2_INT_PHY_FATAL = 0xe0,
+ R_CSI2_MASK_INT_PHY_FATAL = 0xe4,
+ R_CSI2_FORCE_INT_PHY_FATAL = 0xe8,
+ R_CSI2_INT_PKT_FATAL = 0xf0,
+ R_CSI2_MASK_INT_PKT_FATAL = 0xf4,
+ R_CSI2_FORCE_INT_PKT_FATAL = 0xf8,
+ R_CSI2_INT_FRAME_FATAL = 0x100,
+ R_CSI2_MASK_INT_FRAME_FATAL = 0x104,
+ R_CSI2_FORCE_INT_FRAME_FATAL = 0x108,
+ R_CSI2_INT_PHY = 0x110,
+ R_CSI2_MASK_INT_PHY = 0x114,
+ R_CSI2_FORCE_INT_PHY = 0x118,
+ R_CSI2_INT_PKT = 0x120,
+ R_CSI2_MASK_INT_PKT = 0x124,
+ R_CSI2_FORCE_INT_PKT = 0x128,
+ R_CSI2_INT_LINE = 0x130,
+ R_CSI2_MASK_INT_LINE = 0x134,
+ R_CSI2_FORCE_INT_LINE = 0x138,
+ R_CSI2_INT_IPI = 0x140,
+ R_CSI2_MASK_INT_IPI = 0x144,
+ R_CSI2_FORCE_INT_IPI = 0x148
+};
+
+/** @short IPI Data Types */
+enum data_type {
+ CSI_2_YUV420_8 = 0x18,
+ CSI_2_YUV420_10 = 0x19,
+ CSI_2_YUV420_8_LEG = 0x1A,
+ CSI_2_YUV420_8_SHIFT = 0x1C,
+ CSI_2_YUV420_10_SHIFT = 0x1D,
+ CSI_2_YUV422_8 = 0x1E,
+ CSI_2_YUV422_10 = 0x1F,
+ CSI_2_RGB444 = 0x20,
+ CSI_2_RGB555 = 0x21,
+ CSI_2_RGB565 = 0x22,
+ CSI_2_RGB666 = 0x23,
+ CSI_2_RGB888 = 0x24,
+ CSI_2_RAW6 = 0x28,
+ CSI_2_RAW7 = 0x29,
+ CSI_2_RAW8 = 0x2A,
+ CSI_2_RAW10 = 0x2B,
+ CSI_2_RAW12 = 0x2C,
+ CSI_2_RAW14 = 0x2D,
+};
+
+/** @short Interrupt Masks */
+enum interrupt_type {
+ CSI2_INT_PHY_FATAL = 1 << 0,
+ CSI2_INT_PKT_FATAL = 1 << 1,
+ CSI2_INT_FRAME_FATAL = 1 << 2,
+ CSI2_INT_PHY = 1 << 16,
+ CSI2_INT_PKT = 1 << 17,
+ CSI2_INT_LINE = 1 << 18,
+ CSI2_INT_IPI = 1 << 19,
+
+};
+
+/** @short DWC MIPI CSI-2 output types*/
+enum output_type {
+ IPI_OUT = 0,
+ IDI_OUT = 1,
+ BOTH_OUT = 2
+};
+
+/** @short IPI output types*/
+enum ipi_output_type {
+ CAMERA_TIMING = 0,
+ AUTO_TIMING = 1
+};
+
+/**
+ * @short Format template
+ */
+struct mipi_fmt {
+ const char *name;
+ u32 code;
+ u8 depth;
+};
+
+struct csi_hw {
+
+ uint32_t num_lanes;
+ uint32_t output_type;
+
+ /*IPI Info */
+ uint32_t ipi_mode;
+ uint32_t ipi_color_mode;
+ uint32_t ipi_auto_flush;
+ uint32_t virtual_ch;
+
+ uint32_t hsa;
+ uint32_t hbp;
+ uint32_t hsd;
+ uint32_t htotal;
+
+ uint32_t vsa;
+ uint32_t vbp;
+ uint32_t vfp;
+ uint32_t vactive;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct mipi_csi_dev {
+ struct v4l2_subdev sd;
+ struct video_device vdev;
+
+ struct mutex lock;
+ spinlock_t slock;
+ struct media_pad pads[CSI_PADS_NUM];
+ struct platform_device *pdev;
+ u8 index;
+
+ /** Store current format */
+ const struct mipi_fmt *fmt;
+ struct v4l2_mbus_framefmt format;
+
+ /** Device Tree Information */
+ void __iomem *base_address;
+ uint32_t ctrl_irq_number;
+
+ struct csi_hw hw;
+
+ struct phy *phy;
+};
+
+#endif /* DW_MIPI_CSI */
diff --git a/drivers/media/platform/dwc/plat_ipk.c b/drivers/media/platform/dwc/plat_ipk.c
new file mode 100644
index 0000000..48b9e36
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk.c
@@ -0,0 +1,835 @@
+/**
+ * DWC MIPI CSI-2 Host IPK platform device driver
+ *
+ * Based on Omnivision OV7670 Camera Driver
+ * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
+ * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+#include "plat_ipk.h"
+#include "video_device.h"
+#include "dw_mipi_csi.h"
+#include <media/v4l2-of.h>
+#include <media/v4l2-subdev.h>
+
+static int
+__plat_ipk_pipeline_s_format(struct plat_ipk_media_pipeline *ep,
+ struct v4l2_subdev_format *fmt)
+{
+
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ static const u8 seq[IDX_MAX] = {IDX_SENSOR, IDX_CSI, IDX_VDEV};
+
+ fmt->which = V4L2_SUBDEV_FORMAT_ACTIVE;
+ v4l2_subdev_call(p->subdevs[seq[IDX_CSI]], pad, set_fmt, NULL, fmt);
+
+ return 0;
+}
+
+static void
+plat_ipk_pipeline_prepare(struct plat_ipk_pipeline *p, struct media_entity *me)
+{
+ struct v4l2_subdev *sd;
+ int i = 0;
+
+ for (i = 0; i < IDX_MAX; i++)
+ p->subdevs[i] = NULL;
+
+ while (1) {
+ struct media_pad *pad = NULL;
+
+ for (i = 0; i < me->num_pads; i++) {
+ struct media_pad *spad = &me->pads[i];
+
+ if (!(spad->flags & MEDIA_PAD_FL_SINK))
+ continue;
+
+ pad = media_entity_remote_pad(spad);
+ if (pad)
+ break;
+ }
+ if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
+ break;
+
+ sd = media_entity_to_v4l2_subdev(pad->entity);
+
+ switch (sd->grp_id) {
+ case GRP_ID_SENSOR:
+ p->subdevs[IDX_SENSOR] = sd;
+ break;
+ case GRP_ID_CSI:
+ p->subdevs[IDX_CSI] = sd;
+ break;
+ case GRP_ID_VIDEODEV:
+ p->subdevs[IDX_VDEV] = sd;
+ break;
+ default:
+ break;
+ }
+ me = &sd->entity;
+ if (me->num_pads == 1)
+ break;
+ }
+}
+
+static int __subdev_set_power(struct v4l2_subdev *sd, int on)
+{
+ int *use_count;
+ int ret;
+
+ if (sd == NULL) {
+ pr_info("null subdev\n");
+ return -ENXIO;
+ }
+ use_count = &sd->entity.use_count;
+ if (on && (*use_count)++ > 0)
+ return 0;
+ else if (!on && (*use_count == 0 || --(*use_count) > 0))
+ return 0;
+
+ pr_debug("%d %s !\n", on, sd->entity.name);
+ ret = v4l2_subdev_call(sd, core, s_power, on);
+
+ return ret != -ENOIOCTLCMD ? ret : 0;
+}
+
+static int plat_ipk_pipeline_s_power(struct plat_ipk_pipeline *p, bool on)
+{
+ static const u8 seq[IDX_MAX] = {IDX_CSI, IDX_SENSOR, IDX_VDEV};
+ int i, ret = 0;
+
+ for (i = 0; i < IDX_MAX; i++) {
+ unsigned int idx = seq[i];
+
+ if (p->subdevs[idx] == NULL)
+ pr_info("No device registered on %d\n", idx);
+ else {
+ ret = __subdev_set_power(p->subdevs[idx], on);
+ if (ret < 0 && ret != -ENXIO)
+ goto error;
+ }
+ }
+ return 0;
+error:
+ for (; i >= 0; i--) {
+ unsigned int idx = seq[i];
+
+ __subdev_set_power(p->subdevs[idx], !on);
+ }
+ return ret;
+}
+
+static int
+__plat_ipk_pipeline_open(struct plat_ipk_media_pipeline *ep,
+ struct media_entity *me, bool prepare)
+{
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ int ret;
+
+ if (WARN_ON(p == NULL || me == NULL))
+ return -EINVAL;
+
+ if (prepare)
+ plat_ipk_pipeline_prepare(p, me);
+
+ ret = plat_ipk_pipeline_s_power(p, 1);
+ if (!ret)
+ return 0;
+
+ return ret;
+}
+
+static int __plat_ipk_pipeline_close(struct plat_ipk_media_pipeline *ep)
+{
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ int ret;
+
+ ret = plat_ipk_pipeline_s_power(p, 0);
+
+ return ret == -ENXIO ? 0 : ret;
+}
+
+static int
+__plat_ipk_pipeline_s_stream(struct plat_ipk_media_pipeline *ep, bool on)
+{
+ static const u8 seq[IDX_MAX] = {IDX_SENSOR, IDX_CSI, IDX_VDEV};
+ struct plat_ipk_pipeline *p = to_plat_ipk_pipeline(ep);
+ int i, ret = 0;
+
+ for (i = 0; i < IDX_MAX; i++) {
+ unsigned int idx = seq[i];
+
+ if (p->subdevs[idx] == NULL)
+ pr_debug("No device registered on %d\n", idx);
+ else {
+ ret =
+ v4l2_subdev_call(p->subdevs[idx], video, s_stream,
+ on);
+
+ if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
+ goto error;
+ }
+ }
+ return 0;
+error:
+ for (; i >= 0; i--) {
+ unsigned int idx = seq[i];
+
+ v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
+ }
+ return ret;
+}
+
+static const struct plat_ipk_media_pipeline_ops plat_ipk_pipeline_ops = {
+ .open = __plat_ipk_pipeline_open,
+ .close = __plat_ipk_pipeline_close,
+ .set_format = __plat_ipk_pipeline_s_format,
+ .set_stream = __plat_ipk_pipeline_s_stream,
+};
+
+static struct plat_ipk_media_pipeline *
+plat_ipk_pipeline_create(struct plat_ipk_dev *plat_ipk)
+{
+ struct plat_ipk_pipeline *p;
+
+ p = kzalloc(sizeof(*p), GFP_KERNEL);
+ if (!p)
+ return NULL;
+
+ list_add_tail(&p->list, &plat_ipk->pipelines);
+
+ p->ep.ops = &plat_ipk_pipeline_ops;
+ return &p->ep;
+}
+
+static void
+plat_ipk_pipelines_free(struct plat_ipk_dev *plat_ipk)
+{
+ while (!list_empty(&plat_ipk->pipelines)) {
+ struct plat_ipk_pipeline *p;
+
+ p = list_entry(plat_ipk->pipelines.next, typeof(*p), list);
+ list_del(&p->list);
+ kfree(p);
+ }
+}
+
+static int
+plat_ipk_parse_port_node(struct plat_ipk_dev *plat_ipk,
+ struct device_node *port, unsigned int index)
+{
+ struct device_node *rem, *ep;
+ struct v4l2_of_endpoint endpoint;
+ struct plat_ipk_source_info *pd = &plat_ipk->sensor[index].pdata;
+
+ /* Assume here a port node can have only one endpoint node. */
+ ep = of_get_next_child(port, NULL);
+ if (!ep)
+ return 0;
+
+ v4l2_of_parse_endpoint(ep, &endpoint);
+ if (WARN_ON(endpoint.base.port == 0) || index >= PLAT_MAX_SENSORS)
+ return -EINVAL;
+
+ pd->mux_id = endpoint.base.port - 1;
+
+ rem = of_graph_get_remote_port_parent(ep);
+ of_node_put(ep);
+ if (rem == NULL) {
+ v4l2_info(&plat_ipk->v4l2_dev,
+ "Remote device at %s not found\n", ep->full_name);
+ return 0;
+ }
+
+ if (WARN_ON(index >= ARRAY_SIZE(plat_ipk->sensor)))
+ return -EINVAL;
+
+ plat_ipk->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF;
+ plat_ipk->sensor[index].asd.match.of.node = rem;
+ plat_ipk->async_subdevs[index] = &plat_ipk->sensor[index].asd;
+
+ plat_ipk->num_sensors++;
+
+ of_node_put(rem);
+ return 0;
+}
+
+
+static int plat_ipk_register_sensor_entities(struct plat_ipk_dev *plat_ipk)
+{
+ struct device_node *parent = plat_ipk->pdev->dev.of_node;
+ struct device_node *node;
+ int index = 0;
+ int ret;
+
+ plat_ipk->num_sensors = 0;
+
+ for_each_available_child_of_node(parent, node) {
+ struct device_node *port;
+
+ if (of_node_cmp(node->name, "csi2"))
+ continue;
+ port = of_get_next_child(node, NULL);
+ if (!port)
+ continue;
+
+ ret = plat_ipk_parse_port_node(plat_ipk, port, index);
+ if (ret < 0)
+ return ret;
+ index++;
+ }
+ return 0;
+}
+
+static int
+__of_get_port_id(struct device_node *np)
+{
+ u32 reg = 0;
+
+ np = of_get_child_by_name(np, "port");
+ if (!np)
+ return -EINVAL;
+ of_property_read_u32(np, "reg", ®);
+
+ return reg - 1;
+}
+
+static int register_videodev_entity(struct plat_ipk_dev *plat_ipk,
+ struct video_device_dev *vid_dev)
+{
+ struct v4l2_subdev *sd;
+ struct plat_ipk_media_pipeline *ep;
+ int ret;
+
+ sd = &vid_dev->subdev;
+ sd->grp_id = GRP_ID_VIDEODEV;
+
+ ep = plat_ipk_pipeline_create(plat_ipk);
+ if (!ep)
+ return -ENOMEM;
+
+ v4l2_set_subdev_hostdata(sd, ep);
+
+ ret = v4l2_device_register_subdev(&plat_ipk->v4l2_dev, sd);
+ if (!ret)
+ plat_ipk->vid_dev = vid_dev;
+ else
+ v4l2_err(&plat_ipk->v4l2_dev,
+ "Failed to register Video Device\n");
+ return ret;
+}
+
+static int register_mipi_csi_entity(struct plat_ipk_dev *plat_ipk,
+ struct platform_device *pdev, struct v4l2_subdev *sd)
+{
+ struct device_node *node = pdev->dev.of_node;
+ int id, ret;
+
+ id = node ? __of_get_port_id(node) : max(0, pdev->id);
+
+ if (WARN_ON(id < 0 || id >= CSI_MAX_ENTITIES))
+ return -ENOENT;
+
+ if (WARN_ON(plat_ipk->mipi_csi[id].sd))
+ return -EBUSY;
+
+ sd->grp_id = GRP_ID_CSI;
+ ret = v4l2_device_register_subdev(&plat_ipk->v4l2_dev, sd);
+
+ if (!ret)
+ plat_ipk->mipi_csi[id].sd = sd;
+ else
+ v4l2_err(&plat_ipk->v4l2_dev,
+ "Failed to register MIPI-CSI.%d (%d)\n", id, ret);
+ return ret;
+}
+
+static int plat_ipk_register_platform_entity(struct plat_ipk_dev *plat_ipk,
+ struct platform_device *pdev, int plat_entity)
+{
+ struct device *dev = &pdev->dev;
+ int ret = -EPROBE_DEFER;
+ void *drvdata;
+
+
+ device_lock(dev);
+ if (!dev->driver || !try_module_get(dev->driver->owner))
+ goto dev_unlock;
+
+ drvdata = dev_get_drvdata(dev);
+
+ if (drvdata) {
+ switch (plat_entity) {
+ case IDX_VDEV:
+ ret = register_videodev_entity(plat_ipk, drvdata);
+ break;
+ case IDX_CSI:
+ ret = register_mipi_csi_entity(plat_ipk, pdev, drvdata);
+ break;
+ default:
+ ret = -ENODEV;
+ }
+ } else
+ dev_err(&plat_ipk->pdev->dev, "%s no drvdata\n", dev_name(dev));
+ module_put(dev->driver->owner);
+dev_unlock:
+ device_unlock(dev);
+ if (ret == -EPROBE_DEFER)
+ dev_info(&plat_ipk->pdev->dev,
+ "deferring %s device registration\n", dev_name(dev));
+ else if (ret < 0)
+ dev_err(&plat_ipk->pdev->dev,
+ "%s device registration failed (%d)\n", dev_name(dev),
+ ret);
+ return ret;
+}
+
+static int
+plat_ipk_register_platform_entities(struct plat_ipk_dev *plat_ipk,
+ struct device_node *parent)
+{
+ struct device_node *node;
+ int ret = 0;
+
+ for_each_available_child_of_node(parent, node) {
+ struct platform_device *pdev;
+ int plat_entity = -1;
+
+ pdev = of_find_device_by_node(node);
+ if (!pdev)
+ continue;
+
+ if (!strcmp(node->name, VIDEODEV_OF_NODE_NAME))
+ plat_entity = IDX_VDEV;
+ else if (!strcmp(node->name, CSI_OF_NODE_NAME))
+ plat_entity = IDX_CSI;
+
+ if (plat_entity >= 0)
+ ret = plat_ipk_register_platform_entity(plat_ipk, pdev,
+ plat_entity);
+ put_device(&pdev->dev);
+ if (ret < 0)
+ break;
+ }
+
+ return ret;
+}
+
+static void
+plat_ipk_unregister_entities(struct plat_ipk_dev *plat_ipk)
+{
+ int i;
+ struct video_device_dev *dev = plat_ipk->vid_dev;
+
+ if (dev == NULL)
+ return;
+ v4l2_device_unregister_subdev(&dev->subdev);
+ dev->ve.pipe = NULL;
+ plat_ipk->vid_dev = NULL;
+
+ for (i = 0; i < CSI_MAX_ENTITIES; i++) {
+ if (plat_ipk->mipi_csi[i].sd == NULL)
+ continue;
+ v4l2_device_unregister_subdev(plat_ipk->mipi_csi[i].sd);
+ plat_ipk->mipi_csi[i].sd = NULL;
+ }
+
+ v4l2_info(&plat_ipk->v4l2_dev, "Unregistered all entities\n");
+}
+
+static int
+__plat_ipk_create_videodev_sink_links(struct plat_ipk_dev *plat_ipk,
+ struct media_entity *source,
+ int pad)
+{
+ struct media_entity *sink;
+ int ret = 0;
+
+ if (!plat_ipk->vid_dev)
+ return 0;
+
+ sink = &plat_ipk->vid_dev->subdev.entity;
+ ret = media_create_pad_link(source, pad, sink,
+ CSI_PAD_SOURCE, MEDIA_LNK_FL_ENABLED);
+ if (ret)
+ return ret;
+
+ ret = media_entity_call(sink, link_setup, &sink->pads[0],
+ &source->pads[pad], 0);
+ if (ret)
+ return 0;
+
+ v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+ source->name, sink->name);
+
+ return 0;
+}
+
+
+static int
+__plat_ipk_create_videodev_source_links(struct plat_ipk_dev *plat_ipk)
+{
+ struct media_entity *source, *sink;
+ int ret = 0;
+
+ struct video_device_dev *vid_dev = plat_ipk->vid_dev;
+
+ if (vid_dev == NULL)
+ return -ENODEV;
+
+ source = &vid_dev->subdev.entity;
+ sink = &vid_dev->ve.vdev.entity;
+
+ ret = media_create_pad_link(source, VIDEO_DEV_SD_PAD_SOURCE_DMA,
+ sink, 0, MEDIA_LNK_FL_ENABLED);
+
+ v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+ source->name, sink->name);
+ return ret;
+}
+
+static int
+plat_ipk_create_links(struct plat_ipk_dev *plat_ipk)
+{
+ struct v4l2_subdev *csi_sensor[CSI_MAX_ENTITIES] = { NULL };
+ struct v4l2_subdev *sensor, *csi;
+ struct media_entity *source;
+ struct plat_ipk_source_info *pdata;
+ int i, pad, ret = 0;
+
+ for (i = 0; i < plat_ipk->num_sensors; i++) {
+ if (plat_ipk->sensor[i].subdev == NULL)
+ continue;
+
+ sensor = plat_ipk->sensor[i].subdev;
+ pdata = v4l2_get_subdev_hostdata(sensor);
+ if (!pdata)
+ continue;
+
+ source = NULL;
+
+ csi = plat_ipk->mipi_csi[pdata->mux_id].sd;
+ if (WARN(csi == NULL, "MIPI-CSI interface specified but dw-mipi-csi module is not loaded!\n"))
+ return -EINVAL;
+
+ pad = sensor->entity.num_pads - 1;
+ ret = media_create_pad_link(&sensor->entity, pad,
+ &csi->entity, CSI_PAD_SINK,
+ MEDIA_LNK_FL_IMMUTABLE |
+ MEDIA_LNK_FL_ENABLED);
+
+ if (ret)
+ return ret;
+ v4l2_info(&plat_ipk->v4l2_dev, "created link [%s] -> [%s]\n",
+ sensor->entity.name, csi->entity.name);
+
+ csi_sensor[pdata->mux_id] = sensor;
+ }
+
+ for (i = 0; i < CSI_MAX_ENTITIES; i++) {
+ if (plat_ipk->mipi_csi[i].sd == NULL) {
+ pr_info("no link\n");
+ continue;
+ }
+
+ source = &plat_ipk->mipi_csi[i].sd->entity;
+ pad = VIDEO_DEV_SD_PAD_SINK_CSI;
+
+ ret = __plat_ipk_create_videodev_sink_links(plat_ipk, source,
+ pad);
+ }
+
+ ret = __plat_ipk_create_videodev_source_links(plat_ipk);
+ if (ret < 0)
+ return ret;
+
+ return ret;
+}
+
+static int __plat_ipk_modify_pipeline(struct media_entity *entity, bool enable)
+{
+ struct plat_ipk_video_entity *ve;
+ struct plat_ipk_pipeline *p;
+ struct video_device *vdev;
+ int ret;
+
+ vdev = media_entity_to_video_device(entity);
+
+ if (vdev->entity.use_count == 0)
+ return 0;
+
+ ve = vdev_to_plat_ipk_video_entity(vdev);
+ p = to_plat_ipk_pipeline(ve->pipe);
+
+ if (enable)
+ ret = __plat_ipk_pipeline_open(ve->pipe, entity, true);
+ else
+ ret = __plat_ipk_pipeline_close(ve->pipe);
+
+ if (ret == 0 && !enable)
+ memset(p->subdevs, 0, sizeof(p->subdevs));
+
+ return ret;
+}
+
+
+static int
+__plat_ipk_modify_pipelines(struct media_entity *entity, bool enable,
+ struct media_entity_graph *graph)
+{
+ struct media_entity *entity_err = entity;
+ int ret;
+
+ media_entity_graph_walk_start(graph, entity);
+
+ while ((entity = media_entity_graph_walk_next(graph))) {
+ if (!is_media_entity_v4l2_video_device(entity))
+ continue;
+
+ ret = __plat_ipk_modify_pipeline(entity, enable);
+
+ if (ret < 0)
+ goto err;
+ }
+
+ return 0;
+
+err:
+ media_entity_graph_walk_start(graph, entity_err);
+
+ while ((entity_err = media_entity_graph_walk_next(graph))) {
+ if (!is_media_entity_v4l2_video_device(entity_err))
+ continue;
+
+ __plat_ipk_modify_pipeline(entity_err, !enable);
+
+ if (entity_err == entity)
+ break;
+ }
+
+ return ret;
+}
+
+static int
+plat_ipk_link_notify(struct media_link *link, unsigned int flags,
+ unsigned int notification)
+{
+ struct media_entity_graph *graph =
+ &container_of(link->graph_obj.mdev, struct plat_ipk_dev,
+ media_dev)->link_setup_graph;
+ struct media_entity *sink = link->sink->entity;
+ int ret = 0;
+
+ pr_debug("Link notify\n");
+
+ if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
+ ret = media_entity_graph_walk_init(graph, link->graph_obj.mdev);
+ if (ret)
+ return ret;
+ if (!(flags & MEDIA_LNK_FL_ENABLED))
+ ret = __plat_ipk_modify_pipelines(sink, false, graph);
+
+ } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) {
+ if (link->flags & MEDIA_LNK_FL_ENABLED)
+ ret = __plat_ipk_modify_pipelines(sink, true, graph);
+ media_entity_graph_walk_cleanup(graph);
+ }
+
+ return ret ? -EPIPE : 0;
+}
+static const struct media_device_ops plat_ipk_media_ops = {
+ .link_notify = plat_ipk_link_notify,
+};
+
+
+static int
+subdev_notifier_bound(struct v4l2_async_notifier *notifier,
+ struct v4l2_subdev *subdev, struct v4l2_async_subdev *asd)
+{
+ struct plat_ipk_dev *plat_ipk = notifier_to_plat_ipk(notifier);
+ struct plat_ipk_sensor_info *si = NULL;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(plat_ipk->sensor); i++)
+ if (plat_ipk->sensor[i].asd.match.of.node ==
+ subdev->dev->of_node)
+ si = &plat_ipk->sensor[i];
+
+ if (si == NULL)
+ return -EINVAL;
+
+ v4l2_set_subdev_hostdata(subdev, &si->pdata);
+
+ subdev->grp_id = GRP_ID_SENSOR;
+
+ si->subdev = subdev;
+
+ v4l2_info(&plat_ipk->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
+ subdev->name, plat_ipk->num_sensors);
+
+ plat_ipk->num_sensors++;
+
+ return 0;
+}
+
+static int
+subdev_notifier_complete(struct v4l2_async_notifier *notifier)
+{
+ struct plat_ipk_dev *plat_ipk = notifier_to_plat_ipk(notifier);
+ int ret;
+
+ mutex_lock(&plat_ipk->media_dev.graph_mutex);
+
+ ret = plat_ipk_create_links(plat_ipk);
+ if (ret < 0)
+ goto unlock;
+
+ ret = v4l2_device_register_subdev_nodes(&plat_ipk->v4l2_dev);
+unlock:
+ mutex_unlock(&plat_ipk->media_dev.graph_mutex);
+ if (ret < 0)
+ return ret;
+
+ return media_device_register(&plat_ipk->media_dev);
+}
+
+static const struct of_device_id plat_ipk_of_match[];
+
+static int plat_ipk_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct v4l2_device *v4l2_dev;
+ struct plat_ipk_dev *plat_ipk;
+ int ret;
+
+ dev_info(dev, "Installing DW MIPI CSI-2 IPK Platform module\n");
+
+ plat_ipk = devm_kzalloc(dev, sizeof(*plat_ipk), GFP_KERNEL);
+ if (!plat_ipk)
+ return -ENOMEM;
+
+ spin_lock_init(&plat_ipk->slock);
+ INIT_LIST_HEAD(&plat_ipk->pipelines);
+ plat_ipk->pdev = pdev;
+
+ strlcpy(plat_ipk->media_dev.model, "SNPS IPK Platform",
+ sizeof(plat_ipk->media_dev.model));
+ plat_ipk->media_dev.ops = &plat_ipk_media_ops;
+ plat_ipk->media_dev.dev = dev;
+
+ v4l2_dev = &plat_ipk->v4l2_dev;
+ v4l2_dev->mdev = &plat_ipk->media_dev;
+ strlcpy(v4l2_dev->name, "plat-ipk", sizeof(v4l2_dev->name));
+
+ media_device_init(&plat_ipk->media_dev);
+
+ ret = v4l2_device_register(dev, &plat_ipk->v4l2_dev);
+ if (ret < 0) {
+ v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, plat_ipk);
+
+ ret = plat_ipk_register_platform_entities(plat_ipk, dev->of_node);
+ if (ret)
+ goto err_m_ent;
+
+ ret = plat_ipk_register_sensor_entities(plat_ipk);
+ if (ret)
+ goto err_m_ent;
+
+ if (plat_ipk->num_sensors > 0) {
+ plat_ipk->subdev_notifier.subdevs = plat_ipk->async_subdevs;
+ plat_ipk->subdev_notifier.num_subdevs = plat_ipk->num_sensors;
+ plat_ipk->subdev_notifier.bound = subdev_notifier_bound;
+ plat_ipk->subdev_notifier.complete = subdev_notifier_complete;
+ plat_ipk->num_sensors = 0;
+
+ ret = v4l2_async_notifier_register(&plat_ipk->v4l2_dev,
+ &plat_ipk->subdev_notifier);
+ if (ret)
+ goto err_m_ent;
+ }
+
+ return 0;
+
+err_m_ent:
+ plat_ipk_unregister_entities(plat_ipk);
+ media_device_unregister(&plat_ipk->media_dev);
+ media_device_cleanup(&plat_ipk->media_dev);
+ v4l2_device_unregister(&plat_ipk->v4l2_dev);
+ return ret;
+}
+
+static int plat_ipk_remove(struct platform_device *pdev)
+{
+ struct plat_ipk_dev *dev = platform_get_drvdata(pdev);
+
+ if (!dev)
+ return 0;
+
+ v4l2_async_notifier_unregister(&dev->subdev_notifier);
+
+ v4l2_device_unregister(&dev->v4l2_dev);
+ plat_ipk_unregister_entities(dev);
+ plat_ipk_pipelines_free(dev);
+ media_device_unregister(&dev->media_dev);
+ media_device_cleanup(&dev->media_dev);
+
+ dev_info(&pdev->dev, "Driver removed\n");
+
+ return 0;
+}
+
+/**
+ * @short of_device_id structure
+ */
+static const struct of_device_id plat_ipk_of_match[] = {
+ {.compatible = "snps,plat-ipk"},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, plat_ipk_of_match);
+
+/**
+ * @short Platform driver structure
+ */
+static struct platform_driver plat_ipk_pdrv = {
+ .remove = plat_ipk_remove,
+ .probe = plat_ipk_probe,
+ .driver = {
+ .name = "snps,plat-ipk",
+ .owner = THIS_MODULE,
+ .of_match_table = plat_ipk_of_match,
+ },
+};
+
+static int __init
+plat_ipk_init(void)
+{
+ request_module("dw-mipi-csi");
+
+ return platform_driver_register(&plat_ipk_pdrv);
+}
+
+static void __exit
+plat_ipk_exit(void)
+{
+ platform_driver_unregister(&plat_ipk_pdrv);
+}
+
+module_init(plat_ipk_init);
+module_exit(plat_ipk_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Platform driver for MIPI CSI-2 Host IPK");
diff --git a/drivers/media/platform/dwc/plat_ipk.h b/drivers/media/platform/dwc/plat_ipk.h
new file mode 100644
index 0000000..ef569eb
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_IPK_H_
+#define PLAT_IPK_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/list.h>
+#include <linux/string.h>
+#include <media/v4l2-device.h>
+#include <linux/videodev2.h>
+#include <media/media-entity.h>
+
+#include "plat_ipk_video.h"
+
+#define VIDEODEV_OF_NODE_NAME "video-device"
+#define CSI_OF_NODE_NAME "csi2"
+
+enum plat_ipk_subdev_index {
+ IDX_SENSOR,
+ IDX_CSI,
+ IDX_VDEV,
+ IDX_MAX,
+};
+
+struct plat_ipk_sensor_info {
+ struct plat_ipk_source_info pdata;
+ struct v4l2_async_subdev asd;
+ struct v4l2_subdev *subdev;
+ struct mipi_csi_dev *host;
+};
+
+struct plat_ipk_pipeline {
+ struct plat_ipk_media_pipeline ep;
+ struct list_head list;
+ struct media_entity *vdev_entity;
+ struct v4l2_subdev *subdevs[IDX_MAX];
+};
+
+#define to_plat_ipk_pipeline(_ep)\
+ container_of(_ep, struct plat_ipk_pipeline, ep)
+
+struct mipi_csi_info {
+ struct v4l2_subdev *sd;
+ int id;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct plat_ipk_dev {
+ struct mipi_csi_info mipi_csi[CSI_MAX_ENTITIES];
+ struct video_device_dev *vid_dev;
+ struct device *dev;
+ struct media_device media_dev;
+ struct v4l2_device v4l2_dev;
+ struct platform_device *pdev;
+ struct plat_ipk_sensor_info sensor[PLAT_MAX_SENSORS];
+ struct v4l2_async_notifier subdev_notifier;
+ struct v4l2_async_subdev *async_subdevs[PLAT_MAX_SENSORS];
+ spinlock_t slock;
+ struct list_head pipelines;
+ int num_sensors;
+ struct media_entity_graph link_setup_graph;
+};
+
+static inline struct plat_ipk_dev *
+entity_to_plat_ipk_mdev(struct media_entity *me)
+{
+ return me->graph_obj.mdev == NULL ? NULL :
+ container_of(me->graph_obj.mdev, struct plat_ipk_dev, media_dev);
+}
+
+static inline struct plat_ipk_dev *
+notifier_to_plat_ipk(struct v4l2_async_notifier *n)
+{
+ return container_of(n, struct plat_ipk_dev, subdev_notifier);
+}
+
+static inline void
+plat_ipk_graph_unlock(struct plat_ipk_video_entity *ve)
+{
+ mutex_unlock(&ve->vdev.entity.graph_obj.mdev->graph_mutex);
+}
+
+#endif /* PLAT_IPK_H_ */
diff --git a/drivers/media/platform/dwc/plat_ipk_video.h b/drivers/media/platform/dwc/plat_ipk_video.h
new file mode 100644
index 0000000..6bfc9f8
--- /dev/null
+++ b/drivers/media/platform/dwc/plat_ipk_video.h
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef PLAT_IPK_INCLUDES_H_
+#define PLAT_IPK_INCLUDES_H_
+
+#include <media/media-entity.h>
+#include <media/v4l2-dev.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-subdev.h>
+
+/*
+ * The subdevices' group IDs.
+ */
+
+#define MAX_WIDTH 3280
+#define MAX_HEIGHT 1852
+
+#define MIN_WIDTH 640
+#define MIN_HEIGHT 480
+
+#define GRP_ID_SENSOR (10)
+#define GRP_ID_CSI (20)
+#define GRP_ID_VIDEODEV (30)
+
+#define CSI_MAX_ENTITIES 1
+#define PLAT_MAX_SENSORS 1
+
+enum video_dev_pads {
+ VIDEO_DEV_SD_PAD_SINK_CSI = 0,
+ VIDEO_DEV_SD_PAD_SOURCE_DMA = 1,
+ VIDEO_DEV_SD_PADS_NUM = 2,
+};
+
+enum mipi_csi_pads {
+ CSI_PAD_SINK = 0,
+ CSI_PAD_SOURCE = 1,
+ CSI_PADS_NUM = 2,
+};
+
+struct plat_ipk_source_info {
+ u16 flags;
+ u16 mux_id;
+};
+
+struct plat_ipk_fmt {
+ u32 mbus_code;
+ char *name;
+ u32 fourcc;
+ u8 depth;
+};
+
+struct plat_ipk_media_pipeline;
+
+/*
+ * Media pipeline operations to be called from within a video node, i.e. the
+ * last entity within the pipeline. Implemented by related media device driver.
+ */
+struct plat_ipk_media_pipeline_ops {
+ int (*prepare)(struct plat_ipk_media_pipeline *p,
+ struct media_entity *me);
+ int (*unprepare)(struct plat_ipk_media_pipeline *p);
+ int (*open)(struct plat_ipk_media_pipeline *p,
+ struct media_entity *me, bool resume);
+ int (*close)(struct plat_ipk_media_pipeline *p);
+ int (*set_stream)(struct plat_ipk_media_pipeline *p, bool state);
+ int (*set_format)(struct plat_ipk_media_pipeline *p,
+ struct v4l2_subdev_format *fmt);
+};
+
+struct plat_ipk_video_entity {
+ struct video_device vdev;
+ struct plat_ipk_media_pipeline *pipe;
+};
+
+struct plat_ipk_media_pipeline {
+ struct media_pipeline mp;
+ const struct plat_ipk_media_pipeline_ops *ops;
+};
+
+static inline struct plat_ipk_video_entity *
+vdev_to_plat_ipk_video_entity(struct video_device *vdev)
+{
+ return container_of(vdev, struct plat_ipk_video_entity, vdev);
+}
+
+#define plat_ipk_pipeline_call(ent, op, args...)\
+ (!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
+ (ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
+
+
+#endif /* PLAT_IPK_INCLUDES_H_ */
diff --git a/drivers/media/platform/dwc/video_device.c b/drivers/media/platform/dwc/video_device.c
new file mode 100644
index 0000000..d827426
--- /dev/null
+++ b/drivers/media/platform/dwc/video_device.c
@@ -0,0 +1,741 @@
+/*
+ * DWC MIPI CSI-2 Host IPK video device device driver
+ *
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ * Author: Ramiro Oliveira <ramiro.oliveira@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published
+ * by the Free Software Foundation, either version 2 of the License,
+ * or (at your option) any later version.
+ */
+
+#include "video_device.h"
+
+const struct plat_ipk_fmt vid_dev_formats[] = {
+ {
+ .name = "RGB888",
+ .fourcc = V4L2_PIX_FMT_BGR24,
+ .depth = 24,
+ .mbus_code = MEDIA_BUS_FMT_RGB888_2X12_LE,
+ }, {
+ .name = "RGB565",
+ .fourcc = V4L2_PIX_FMT_RGB565,
+ .depth = 16,
+ .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_BE,
+ },
+};
+
+const struct plat_ipk_fmt *
+vid_dev_find_format(struct v4l2_format *f, int index)
+{
+ const struct plat_ipk_fmt *fmt = NULL;
+ unsigned int i;
+
+ if (index >= (int) ARRAY_SIZE(vid_dev_formats))
+ return NULL;
+
+ for (i = 0; i < ARRAY_SIZE(vid_dev_formats); ++i) {
+ fmt = &vid_dev_formats[i];
+ if (fmt->fourcc == f->fmt.pix.pixelformat)
+ return fmt;
+ }
+ return NULL;
+}
+
+/*
+ * Video node ioctl operations
+ */
+static int
+vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+
+ strlcpy(cap->driver, VIDEO_DEVICE_NAME, sizeof(cap->driver));
+ strlcpy(cap->card, VIDEO_DEVICE_NAME, sizeof(cap->card));
+ snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
+ dev_name(&vid_dev->pdev->dev));
+
+ cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
+ cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
+ return 0;
+}
+
+int
+vidioc_enum_fmt_vid_cap(struct file *file, void *priv, struct v4l2_fmtdesc *f)
+{
+ const struct plat_ipk_fmt *p_fmt;
+
+ if (f->index >= ARRAY_SIZE(vid_dev_formats))
+ return -EINVAL;
+
+ p_fmt = &vid_dev_formats[f->index];
+
+ strlcpy(f->description, p_fmt->name, sizeof(f->description));
+ f->pixelformat = p_fmt->fourcc;
+
+ return 0;
+}
+
+int vidioc_g_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+ struct video_device_dev *dev = video_drvdata(file);
+
+ memcpy(&f->fmt.pix, &dev->format.fmt.pix,
+ sizeof(struct v4l2_pix_format));
+
+ return 0;
+}
+
+static int
+vidioc_try_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+ const struct plat_ipk_fmt *fmt;
+
+ fmt = vid_dev_find_format(f, -1);
+ if (!fmt) {
+ f->fmt.pix.pixelformat = V4L2_PIX_FMT_RGB565;
+ fmt = vid_dev_find_format(f, -1);
+ }
+
+ f->fmt.pix.field = V4L2_FIELD_NONE;
+ v4l_bound_align_image(&f->fmt.pix.width, 48, MAX_WIDTH, 2,
+ &f->fmt.pix.height, 32, MAX_HEIGHT, 0, 0);
+
+ f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3;
+ f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
+ f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
+ return 0;
+}
+
+int vidioc_s_fmt_vid_cap(struct file *file, void *priv, struct v4l2_format *f)
+{
+ struct video_device_dev *dev = video_drvdata(file);
+ int ret;
+ struct v4l2_subdev_format fmt;
+
+ if (vb2_is_busy(&dev->vb_queue))
+ return -EBUSY;
+
+ ret = vidioc_try_fmt_vid_cap(file, dev, f);
+ if (ret)
+ return ret;
+
+ dev->fmt = vid_dev_find_format(f, -1);
+ pixel_format(dev) = f->fmt.pix.pixelformat;
+ width(dev) = f->fmt.pix.width;
+ height(dev) = f->fmt.pix.height;
+ bytes_per_line(dev) = width(dev) * dev->fmt->depth / 8;
+ size_image(dev) = height(dev) * bytes_per_line(dev);
+
+ fmt.format.colorspace = V4L2_COLORSPACE_SRGB;
+ fmt.format.code = dev->fmt->mbus_code;
+
+ fmt.format.width = width(dev);
+ fmt.format.height = height(dev);
+
+ ret = plat_ipk_pipeline_call(&dev->ve, set_format, &fmt);
+
+ return 0;
+}
+
+int vidioc_enum_framesizes(struct file *file, void *fh,
+ struct v4l2_frmsizeenum *fsize)
+{
+ static const struct v4l2_frmsize_stepwise sizes = {
+ 48, MAX_WIDTH, 4,
+ 32, MAX_HEIGHT, 1
+ };
+ int i;
+
+ if (fsize->index)
+ return -EINVAL;
+ for (i = 0; i < ARRAY_SIZE(vid_dev_formats); i++)
+ if (vid_dev_formats[i].fourcc == fsize->pixel_format)
+ break;
+ if (i == ARRAY_SIZE(vid_dev_formats))
+ return -EINVAL;
+ fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
+ fsize->stepwise = sizes;
+ return 0;
+}
+
+int vidioc_enum_input(struct file *file, void *priv, struct v4l2_input *input)
+{
+ if (input->index != 0)
+ return -EINVAL;
+
+ input->type = V4L2_INPUT_TYPE_CAMERA;
+ input->std = V4L2_STD_ALL; /* Not sure what should go here */
+ strcpy(input->name, "Camera");
+ return 0;
+}
+
+int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
+{
+ *i = 0;
+ return 0;
+}
+
+int vidioc_s_input(struct file *file, void *priv, unsigned int i)
+{
+ if (i != 0)
+ return -EINVAL;
+ return 0;
+}
+
+int vidioc_g_std(struct file *file, void *fh, v4l2_std_id *norm)
+{
+ *norm = V4L2_STD_NTSC_M;
+ return 0;
+}
+
+int vidioc_s_std(struct file *file, void *fh, v4l2_std_id a)
+{
+ return 0;
+}
+
+static int
+vid_dev_pipeline_validate(struct video_device_dev *vid_dev)
+{
+ return 0;
+}
+
+static int
+vid_dev_streamon(struct file *file, void *priv, enum v4l2_buf_type type)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ struct media_entity *entity = &vid_dev->ve.vdev.entity;
+ int ret;
+
+ ret = media_entity_pipeline_start(entity, &vid_dev->ve.pipe->mp);
+ if (ret < 0)
+ return ret;
+
+ ret = vid_dev_pipeline_validate(vid_dev);
+ if (ret < 0)
+ goto err_p_stop;
+
+ vb2_ioctl_streamon(file, priv, type);
+ if (!ret)
+ return ret;
+
+err_p_stop:
+ media_entity_pipeline_stop(entity);
+ return 0;
+}
+
+static int
+vid_dev_streamoff(struct file *file, void *priv, enum v4l2_buf_type type)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ int ret;
+
+ ret = vb2_ioctl_streamoff(file, priv, type);
+ if (ret < 0)
+ return ret;
+
+ media_entity_pipeline_stop(&vid_dev->ve.vdev.entity);
+ return 0;
+}
+
+static const struct v4l2_ioctl_ops vid_dev_ioctl_ops = {
+ .vidioc_querycap = vidioc_querycap,
+ .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
+ .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
+ .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
+ .vidioc_enum_framesizes = vidioc_enum_framesizes,
+ .vidioc_enum_input = vidioc_enum_input,
+ .vidioc_g_input = vidioc_g_input,
+ .vidioc_s_input = vidioc_s_input,
+
+ .vidioc_reqbufs = vb2_ioctl_reqbufs,
+ .vidioc_create_bufs = vb2_ioctl_create_bufs,
+ .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
+ .vidioc_querybuf = vb2_ioctl_querybuf,
+ .vidioc_qbuf = vb2_ioctl_qbuf,
+ .vidioc_dqbuf = vb2_ioctl_dqbuf,
+ .vidioc_streamon = vid_dev_streamon,
+ .vidioc_streamoff = vid_dev_streamoff,
+};
+
+/* Capture subdev media entity operations */
+static int
+vid_dev_link_setup(struct media_entity *entity,
+ const struct media_pad *local,
+ const struct media_pad *remote, u32 flags)
+{
+ return 0;
+}
+
+static const struct media_entity_operations vid_dev_subdev_media_ops = {
+ .link_setup = vid_dev_link_setup,
+};
+
+static int
+vid_dev_open(struct file *file)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ struct media_entity *me = &vid_dev->ve.vdev.entity;
+ int ret;
+
+ mutex_lock(&vid_dev->lock);
+
+ ret = v4l2_fh_open(file);
+ if (ret < 0)
+ goto unlock;
+
+ if (!v4l2_fh_is_singular_file(file))
+ goto unlock;
+
+ mutex_lock(&me->graph_obj.mdev->graph_mutex);
+
+ ret = plat_ipk_pipeline_call(&vid_dev->ve, open, me, true);
+ if (ret == 0)
+ me->use_count++;
+
+ mutex_unlock(&me->graph_obj.mdev->graph_mutex);
+
+ if (!ret)
+ goto unlock;
+
+ v4l2_fh_release(file);
+unlock:
+ mutex_unlock(&vid_dev->lock);
+ return ret;
+}
+
+static int
+vid_dev_release(struct file *file)
+{
+ struct video_device_dev *vid_dev = video_drvdata(file);
+ struct media_entity *entity = &vid_dev->ve.vdev.entity;
+
+ mutex_lock(&vid_dev->lock);
+
+ if (v4l2_fh_is_singular_file(file)) {
+ plat_ipk_pipeline_call(&vid_dev->ve, close);
+ mutex_lock(&entity->graph_obj.mdev->graph_mutex);
+ entity->use_count--;
+ mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
+ }
+
+ _vb2_fop_release(file, NULL);
+
+ mutex_unlock(&vid_dev->lock);
+ return 0;
+}
+
+static const struct v4l2_file_operations vid_dev_fops = {
+ .owner = THIS_MODULE,
+ .open = vid_dev_open,
+ .release = vid_dev_release,
+ .write = vb2_fop_write,
+ .read = vb2_fop_read,
+ .poll = vb2_fop_poll,
+ .unlocked_ioctl = video_ioctl2,
+ .mmap = vb2_fop_mmap,
+};
+
+/*
+ * VideoBuffer2 operations
+ */
+
+void fill_buffer(struct video_device_dev *dev, struct rx_buffer *buf,
+ int buf_num, unsigned long flags)
+{
+ int size = 0;
+ void *vbuf = NULL;
+
+ if (&buf->vb == NULL)
+ return;
+
+ size = vb2_plane_size(&buf->vb.vb2_buf, 0);
+ vbuf = vb2_plane_vaddr(&buf->vb.vb2_buf, 0);
+
+ if (vbuf) {
+ spin_unlock_irqrestore(&dev->slock, flags);
+
+ memcpy(vbuf, dev->dma_buf[buf_num].cpu_addr, size);
+
+ spin_lock_irqsave(&dev->slock, flags);
+
+ buf->vb.field = dev->format.fmt.pix.field;
+ buf->vb.sequence++;
+ buf->vb.vb2_buf.timestamp = ktime_get_ns();
+ }
+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
+}
+
+static void buffer_copy_process(void *param)
+{
+ struct video_device_dev *dev = (struct video_device_dev *) param;
+ unsigned long flags;
+ struct dmaqueue *dma_q = &dev->vidq;
+ struct rx_buffer *buf = NULL;
+
+ spin_lock_irqsave(&dev->slock, flags);
+
+ if (!list_empty(&dma_q->active)) {
+ buf = list_entry(dma_q->active.next, struct rx_buffer, list);
+ list_del(&buf->list);
+ fill_buffer(dev, buf, dev->last_idx, flags);
+ }
+
+ spin_unlock_irqrestore(&dev->slock, flags);
+}
+
+static inline struct rx_buffer *to_rx_buffer(struct vb2_v4l2_buffer *vb2)
+{
+ return container_of(vb2, struct rx_buffer, vb);
+}
+
+int queue_setup(struct vb2_queue *vq, unsigned int *nbuffers,
+ unsigned int *nplanes, unsigned int sizes[],
+ struct device *alloc_devs[])
+{
+ struct video_device_dev *dev = vb2_get_drv_priv(vq);
+ unsigned long size = 0;
+ int i;
+
+ size = size_image(dev);
+ if (size == 0)
+ return -EINVAL;
+
+ *nbuffers = N_BUFFERS;
+
+ for (i = 0; i < N_BUFFERS; i++) {
+ dev->dma_buf[i].cpu_addr = dma_alloc_coherent(&dev->pdev->dev,
+ size_image(dev),
+ &dev->
+ dma_buf
+ [i].dma_addr,
+ GFP_KERNEL);
+ }
+
+ *nplanes = 1;
+ sizes[0] = size;
+
+ return 0;
+}
+
+int buffer_prepare(struct vb2_buffer *vb)
+{
+ struct rx_buffer *buf = NULL;
+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+ int size = 0;
+
+ if (vb == NULL) {
+ pr_warn("%s:vb2_buffer is null\n", FUNC_NAME);
+ return 0;
+ }
+
+ buf = to_rx_buffer(vbuf);
+
+ size = vb2_plane_size(&buf->vb.vb2_buf, 0);
+ vb2_set_plane_payload(&buf->vb.vb2_buf, 0, size);
+
+ INIT_LIST_HEAD(&buf->list);
+ return 0;
+}
+
+void buffer_queue(struct vb2_buffer *vb)
+{
+ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
+ struct video_device_dev *dev = NULL;
+ struct rx_buffer *buf = NULL;
+ struct dmaqueue *vidq = NULL;
+ struct dma_async_tx_descriptor *desc;
+ u32 flags;
+
+ if (vb == NULL) {
+ pr_warn("%s:vb2_buffer is null\n", FUNC_NAME);
+ return;
+ }
+
+ dev = vb2_get_drv_priv(vb->vb2_queue);
+ buf = to_rx_buffer(vbuf);
+ vidq = &dev->vidq;
+
+ flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK;
+ dev->xt.dir = DMA_DEV_TO_MEM;
+ dev->xt.src_sgl = false;
+ dev->xt.dst_inc = false;
+ dev->xt.dst_sgl = true;
+ dev->xt.dst_start = dev->dma_buf[dev->idx].dma_addr;
+
+ dev->last_idx = dev->idx;
+ dev->idx++;
+ if (dev->idx >= N_BUFFERS)
+ dev->idx = 0;
+
+ dev->xt.frame_size = 1;
+ dev->sgl[0].size = bytes_per_line(dev);
+ dev->sgl[0].icg = 0;
+ dev->xt.numf = height(dev);
+
+ desc = dmaengine_prep_interleaved_dma(dev->dma, &dev->xt, flags);
+ if (!desc) {
+ pr_err("Failed to prepare DMA transfer\n");
+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
+ return;
+ }
+
+ desc->callback = buffer_copy_process;
+ desc->callback_param = dev;
+
+ spin_lock(&dev->slock);
+ list_add_tail(&buf->list, &vidq->active);
+ spin_unlock(&dev->slock);
+
+ dmaengine_submit(desc);
+
+ if (vb2_is_streaming(&dev->vb_queue))
+ dma_async_issue_pending(dev->dma);
+}
+
+int start_streaming(struct vb2_queue *vq, unsigned int count)
+{
+ struct video_device_dev *dev = vb2_get_drv_priv(vq);
+
+ dma_async_issue_pending(dev->dma);
+
+ return 0;
+}
+
+void stop_streaming(struct vb2_queue *vq)
+{
+ struct video_device_dev *dev = vb2_get_drv_priv(vq);
+ struct dmaqueue *dma_q = &dev->vidq;
+
+ /* Stop and reset the DMA engine. */
+ dmaengine_terminate_all(dev->dma);
+
+ while (!list_empty(&dma_q->active)) {
+ struct rx_buffer *buf;
+
+ buf = list_entry(dma_q->active.next, struct rx_buffer, list);
+ if (buf) {
+ list_del(&buf->list);
+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
+ }
+ }
+ list_del_init(&dev->vidq.active);
+}
+
+static const struct vb2_ops vb2_video_qops = {
+ .queue_setup = queue_setup,
+ .buf_prepare = buffer_prepare,
+ .buf_queue = buffer_queue,
+ .start_streaming = start_streaming,
+ .stop_streaming = stop_streaming,
+ .wait_prepare = vb2_ops_wait_prepare,
+ .wait_finish = vb2_ops_wait_finish,
+};
+
+static int vid_dev_subdev_s_power(struct v4l2_subdev *sd, int on)
+{
+ return 0;
+}
+
+static int vid_dev_subdev_registered(struct v4l2_subdev *sd)
+{
+ struct video_device_dev *vid_dev = v4l2_get_subdevdata(sd);
+ struct vb2_queue *q = &vid_dev->vb_queue;
+ struct video_device *vfd = &vid_dev->ve.vdev;
+ int ret;
+
+ memset(vfd, 0, sizeof(*vfd));
+
+ snprintf(vfd->name, sizeof(vfd->name), VIDEO_DEVICE_NAME);
+
+ vfd->fops = &vid_dev_fops;
+ vfd->ioctl_ops = &vid_dev_ioctl_ops;
+ vfd->v4l2_dev = sd->v4l2_dev;
+ vfd->minor = -1;
+ vfd->release = video_device_release_empty;
+ vfd->queue = q;
+
+ INIT_LIST_HEAD(&vid_dev->vidq.active);
+ init_waitqueue_head(&vid_dev->vidq.wq);
+ memset(q, 0, sizeof(*q));
+ q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
+ q->io_modes = VB2_MMAP | VB2_USERPTR;
+ q->ops = &vb2_video_qops;
+ q->mem_ops = &vb2_vmalloc_memops;
+ q->buf_struct_size = sizeof(struct rx_buffer);
+ q->drv_priv = vid_dev;
+ q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
+ q->lock = &vid_dev->lock;
+
+ ret = vb2_queue_init(q);
+ if (ret < 0)
+ return ret;
+
+ vid_dev->vd_pad.flags = MEDIA_PAD_FL_SINK;
+ ret = media_entity_pads_init(&vfd->entity, 1, &vid_dev->vd_pad);
+ if (ret < 0)
+ return ret;
+
+ video_set_drvdata(vfd, vid_dev);
+ vid_dev->ve.pipe = v4l2_get_subdev_hostdata(sd);
+
+ ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
+ if (ret < 0) {
+ media_entity_cleanup(&vfd->entity);
+ vid_dev->ve.pipe = NULL;
+ return ret;
+ }
+
+ v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
+ vfd->name, video_device_node_name(vfd));
+ return 0;
+}
+
+static void vid_dev_subdev_unregistered(struct v4l2_subdev *sd)
+{
+ struct video_device_dev *vid_dev = v4l2_get_subdevdata(sd);
+
+ if (vid_dev == NULL)
+ return;
+
+ mutex_lock(&vid_dev->lock);
+
+ if (video_is_registered(&vid_dev->ve.vdev)) {
+ video_unregister_device(&vid_dev->ve.vdev);
+ media_entity_cleanup(&vid_dev->ve.vdev.entity);
+ vid_dev->ve.pipe = NULL;
+ }
+
+ mutex_unlock(&vid_dev->lock);
+}
+
+static const struct v4l2_subdev_internal_ops vid_dev_subdev_internal_ops = {
+ .registered = vid_dev_subdev_registered,
+ .unregistered = vid_dev_subdev_unregistered,
+};
+
+static const struct v4l2_subdev_core_ops vid_dev_subdev_core_ops = {
+ .s_power = vid_dev_subdev_s_power,
+};
+
+static struct v4l2_subdev_ops vid_dev_subdev_ops = {
+ .core = &vid_dev_subdev_core_ops,
+};
+
+static int vid_dev_create_capture_subdev(struct video_device_dev *vid_dev)
+{
+ struct v4l2_subdev *sd = &vid_dev->subdev;
+ int ret;
+
+ v4l2_subdev_init(sd, &vid_dev_subdev_ops);
+ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ snprintf(sd->name, sizeof(sd->name), "Capture device");
+
+ vid_dev->subdev_pads[VIDEO_DEV_SD_PAD_SINK_CSI].flags =
+ MEDIA_PAD_FL_SOURCE;
+ vid_dev->subdev_pads[VIDEO_DEV_SD_PAD_SOURCE_DMA].flags =
+ MEDIA_PAD_FL_SINK;
+ ret =
+ media_entity_pads_init(&sd->entity, VIDEO_DEV_SD_PADS_NUM,
+ vid_dev->subdev_pads);
+ if (ret)
+ return ret;
+
+ sd->internal_ops = &vid_dev_subdev_internal_ops;
+ sd->entity.ops = &vid_dev_subdev_media_ops;
+ sd->owner = THIS_MODULE;
+ v4l2_set_subdevdata(sd, vid_dev);
+
+ return 0;
+}
+
+static void vid_dev_unregister_subdev(struct video_device_dev *vid_dev)
+{
+ struct v4l2_subdev *sd = &vid_dev->subdev;
+
+ v4l2_device_unregister_subdev(sd);
+ media_entity_cleanup(&sd->entity);
+ v4l2_set_subdevdata(sd, NULL);
+}
+
+static const struct of_device_id vid_dev_of_match[];
+
+static int vid_dev_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ const struct of_device_id *of_id;
+ int ret = 0;
+ struct video_device_dev *vid_dev;
+
+ dev_info(dev, "Installing IPK Video Device module\n");
+
+ if (!dev->of_node)
+ return -ENODEV;
+
+ vid_dev = devm_kzalloc(dev, sizeof(*vid_dev), GFP_KERNEL);
+ if (!vid_dev)
+ return -ENOMEM;
+
+ of_id = of_match_node(vid_dev_of_match, dev->of_node);
+ if (WARN_ON(of_id == NULL))
+ return -EINVAL;
+
+ vid_dev->pdev = pdev;
+
+ spin_lock_init(&vid_dev->slock);
+ mutex_init(&vid_dev->lock);
+
+ dev_info(&pdev->dev, "Requesting DMA\n");
+ vid_dev->dma = dma_request_slave_channel(&pdev->dev, "vdma0");
+ if (vid_dev->dma == NULL) {
+ dev_err(&pdev->dev, "no VDMA channel found\n");
+ ret = -ENODEV;
+ goto end;
+ }
+
+ ret = vid_dev_create_capture_subdev(vid_dev);
+ if (ret)
+ goto end;
+
+ platform_set_drvdata(pdev, vid_dev);
+
+ dev_info(dev, "Video Device registered successfully\n");
+ return 0;
+end:
+ dev_err(dev, "Video Device not registered!!\n");
+ return ret;
+}
+
+static int vid_dev_remove(struct platform_device *pdev)
+{
+ struct video_device_dev *dev = platform_get_drvdata(pdev);
+
+ vid_dev_unregister_subdev(dev);
+ dev_info(&pdev->dev, "Driver removed\n");
+
+ return 0;
+}
+
+static const struct of_device_id vid_dev_of_match[] = {
+ {.compatible = "snps,video-device"},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, vid_dev_of_match);
+
+static struct platform_driver __refdata vid_dev_pdrv = {
+ .remove = vid_dev_remove,
+ .probe = vid_dev_probe,
+ .driver = {
+ .name = VIDEO_DEVICE_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = vid_dev_of_match,
+ },
+};
+
+module_platform_driver(vid_dev_pdrv);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("Driver for configuring DMA and Video Device");
diff --git a/drivers/media/platform/dwc/video_device.h b/drivers/media/platform/dwc/video_device.h
new file mode 100644
index 0000000..e828d4b
--- /dev/null
+++ b/drivers/media/platform/dwc/video_device.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright (C) 2016 Synopsys, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef VIDEO_DEVICE_H_
+#define VIDEO_DEVICE_H_
+
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/delay.h>
+#include <linux/list.h>
+#include <linux/wait.h>
+#include <linux/string.h>
+#include <linux/videodev2.h>
+#include <linux/dma/xilinx_dma.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ioctl.h>
+#include <media/v4l2-fh.h>
+#include <media/v4l2-common.h>
+#include <media/videobuf2-vmalloc.h>
+#include <media/media-entity.h>
+#include <linux/io.h>
+
+#include "plat_ipk_video.h"
+
+#define N_BUFFERS 3
+
+#define VIDEO_DEVICE_NAME "video-device"
+
+#define FUNC_NAME __func__
+
+struct rx_buffer {
+ /** @short Buffer for video frames */
+ struct vb2_v4l2_buffer vb;
+ struct list_head list;
+
+ dma_addr_t dma_addr;
+ void *cpu_addr;
+};
+
+struct dmaqueue {
+ struct list_head active;
+ wait_queue_head_t wq;
+};
+
+/**
+ * @short Structure to embed device driver information
+ */
+struct video_device_dev {
+ struct platform_device *pdev;
+ struct v4l2_device *v4l2_dev;
+ struct v4l2_subdev subdev;
+ struct media_pad vd_pad;
+ struct media_pad subdev_pads[VIDEO_DEV_SD_PADS_NUM];
+ struct mutex lock;
+ spinlock_t slock;
+ struct plat_ipk_video_entity ve;
+ struct v4l2_format format;
+ struct v4l2_pix_format pix_format;
+ const struct plat_ipk_fmt *fmt;
+ unsigned long *alloc_ctx;
+
+ /* Buffer and DMA */
+ struct vb2_queue vb_queue;
+ int idx;
+ int last_idx;
+ struct dmaqueue vidq;
+ struct rx_buffer dma_buf[N_BUFFERS];
+ struct dma_chan *dma;
+ struct dma_interleaved_template xt;
+ struct data_chunk sgl[1];
+};
+
+/**
+ * @short Defines to simplify the code reading
+ */
+
+#define pixel_format(dev) \
+ dev->format.fmt.pix.pixelformat
+#define bytes_per_line(dev) \
+ dev->format.fmt.pix.bytesperline
+#define width(dev) \
+ dev->format.fmt.pix.width
+#define height(dev) \
+ dev->format.fmt.pix.height
+#define size_image(dev) \
+ dev->format.fmt.pix.sizeimage
+
+const struct plat_ipk_fmt *vid_dev_find_format(struct v4l2_format *f,
+ int index);
+
+#endif /* VIDEO_DEVICE_H_ */
--
2.10.2
^ permalink raw reply related
* [PATCH 1/2] Add Documentation for Media Device, Video Device, and Synopsys DW MIPI CSI-2 Host
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
To: robh+dt, mark.rutland, mchehab, devicetree, linux-kernel,
linux-media
Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil,
laurent.pinchart+renesas, arnd, sudipm.mukherjee, tiffany.lin,
minghsiu.tsai, jean-christophe.trotin, andrew-ct.chen,
simon.horman, songjun.wu, bparrot, CARLOS.PALMINHA,
Ramiro.Oliveira
In-Reply-To: <cover.1479132355.git.roliveir@synopsys.com>
Add documentation for Media and Video Device, as well as the DW MIPI CSI-2
Host.
Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
.../devicetree/bindings/media/snps,dw-mipi-csi.txt | 27 ++++++++++++++++++++++
.../devicetree/bindings/media/snps,plat-ipk.txt | 9 ++++++++
.../bindings/media/snps,video-device.txt | 12 ++++++++++
3 files changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
create mode 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt
create mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
diff --git a/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
new file mode 100644
index 0000000..bec7441
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
@@ -0,0 +1,27 @@
+Synopsys DesignWare CSI-2 Host controller
+
+Description
+-----------
+
+This HW block is used to receive image coming from an MIPI CSI-2 compatible
+camera.
+
+Required properties:
+- compatible: shall be "snps,dw-mipi-csi"
+- reg : physical base address and size of the device memory mapped
+ registers;
+- interrupts : CSI-2 Host interrupt
+- data-lanes : Number of lanes to be used
+- output-type : Core output to be used (IPI-> 0 or IDI->1 or BOTH->2)
+- phys, phy-names: List of one PHY specifier and identifier string (as defined
+ in Documentation/devicetree/bindings/phy/phy-bindings.txt).
+
+Optional properties(if in IPI mode):
+- ipi-mode : Mode to be used when in IPI(Camera -> 0 or Automatic -> 1)
+- ipi-color-mode: Color depth to be used in IPI (48 bits -> 0 or 16 bits -> 1)
+- ipi-auto-flush: Data auto-flush (1 -> Yes or 0 -> No)
+- virtual-channel: Virtual channel where data is present when in IPI
+
+The per-board settings:
+ - port sub-node describing a single endpoint connected to the dw-mipi-csi
+ as described in video-interfaces.txt[1].
diff --git a/Documentation/devicetree/bindings/media/snps,plat-ipk.txt b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
new file mode 100644
index 0000000..2d51541
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,plat-ipk.txt
@@ -0,0 +1,9 @@
+Synopsys DesignWare CSI-2 Host IPK Media Device
+
+This Media Device at the moment is not totally functional, however it is a base
+for the future.
+
+Required properties:
+
+- compatible: Must be "snps,plat-ipk".
+
diff --git a/Documentation/devicetree/bindings/media/snps,video-device.txt b/Documentation/devicetree/bindings/media/snps,video-device.txt
new file mode 100644
index 0000000..d467092
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/snps,video-device.txt
@@ -0,0 +1,12 @@
+Synopsys DesignWare CSI-2 Host video device
+
+This driver handles all the video handling part of this platform.
+
+Required properties:
+
+- compatible: Must be "snps,video-device".
+
+- dmas, dma-names: List of one DMA specifier and identifier string (as defined
+ in Documentation/devicetree/bindings/dma/dma.txt) per port. Each port
+ requires a DMA channel with the identifier string set to "port" followed by
+ the port index.
--
2.10.2
^ permalink raw reply related
* [PATCH 0/2] Add support for the DW IP Prototyping Kits for MIPI CSI-2 Host
From: Ramiro Oliveira @ 2016-11-14 14:20 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
mchehab-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-media-u79uwXL29TY76Z2rM5mHXA
Cc: davem-fT/PcQaiUtIeIZ0/mPfg9Q,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ,
akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b,
linux-0h96xk9xTtrk1uMJSBkQmQ, hverkuil-qWit8jRvyhVmR6Xm/wNWPw,
laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw, arnd-r2nGTMty4D4,
sudipm.mukherjee-Re5JQEeQqe8AvxtiuMwx3w,
tiffany.lin-NuS5LvNUpcJWk0Htik3J/w,
minghsiu.tsai-NuS5LvNUpcJWk0Htik3J/w,
jean-christophe.trotin-qxv4g6HH51o,
andrew-ct.chen-NuS5LvNUpcJWk0Htik3J/w,
simon.horman-wFxRvT7yatFl57MIdRCFDg,
songjun.wu-UWL1GkI3JZL3oGB3hsPCZA, bparrot-l0cyMroinI0,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w,
Ramiro.Oliveira-HKixBCOQz3hWk0Htik3J/w
This patchset adds basic support for the DW CSI-2 Host IPK. There are
some parts of the kit that aren't currently supported by this media
platform driver but will be in the future.
Ramiro Oliveira (2):
Add Documentation for Media Device, Video Device, and Synopsys DW MIPI
CSI-2 Host
Add basic support for DW CSI-2 Host IPK
.../devicetree/bindings/media/snps,dw-mipi-csi.txt | 27 +
.../devicetree/bindings/media/snps,plat-ipk.txt | 9 +
.../bindings/media/snps,video-device.txt | 12 +
MAINTAINERS | 7 +
drivers/media/platform/Kconfig | 1 +
drivers/media/platform/Makefile | 2 +
drivers/media/platform/dwc/Kconfig | 36 +
drivers/media/platform/dwc/Makefile | 3 +
drivers/media/platform/dwc/dw_mipi_csi.c | 687 +++++++++++++++++
drivers/media/platform/dwc/dw_mipi_csi.h | 179 +++++
drivers/media/platform/dwc/plat_ipk.c | 835 +++++++++++++++++++++
drivers/media/platform/dwc/plat_ipk.h | 97 +++
drivers/media/platform/dwc/plat_ipk_video.h | 97 +++
drivers/media/platform/dwc/video_device.c | 741 ++++++++++++++++++
drivers/media/platform/dwc/video_device.h | 101 +++
15 files changed, 2834 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/snps,dw-mipi-csi.txt
create mode 100644 Documentation/devicetree/bindings/media/snps,plat-ipk.txt
create mode 100644 Documentation/devicetree/bindings/media/snps,video-device.txt
create mode 100644 drivers/media/platform/dwc/Kconfig
create mode 100644 drivers/media/platform/dwc/Makefile
create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.c
create mode 100644 drivers/media/platform/dwc/dw_mipi_csi.h
create mode 100644 drivers/media/platform/dwc/plat_ipk.c
create mode 100644 drivers/media/platform/dwc/plat_ipk.h
create mode 100644 drivers/media/platform/dwc/plat_ipk_video.h
create mode 100644 drivers/media/platform/dwc/video_device.c
create mode 100644 drivers/media/platform/dwc/video_device.h
--
2.10.2
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v4 2/3] PCI: qcom: add support to msm8996 PCIE controller
From: Vivek Gautam @ 2016-11-14 14:04 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: svarbanov, linux-pci, Bjorn Helgaas, robh+dt, linux-arm-msm,
devicetree@vger.kernel.org
In-Reply-To: <1479122155-13393-3-git-send-email-srinivas.kandagatla@linaro.org>
On Mon, Nov 14, 2016 at 4:45 PM, Srinivas Kandagatla
<srinivas.kandagatla@linaro.org> wrote:
> This patch adds support to msm8996/apq8096 pcie, MSM8996 supports
> Gen 1/2, One lane, 3 pcie root-complex with support to MSI and
> legacy interrupts and it conforms to PCI Express Base 2.1 specification.
>
> This patch adds post_init callback to qcom_pcie_ops, as this is pcie
> pipe clocks are only setup after the phy is powered on.
> It also adds ltssm_enable callback as it is very much different to other
> supported SOCs in the driver.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Thanks
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* Re: [PATCH v2] ARM: dts: vfxxx: Enable DMA for DSPI2 and DSPI3
From: Shawn Guo @ 2016-11-14 14:02 UTC (permalink / raw)
To: Sanchayan Maity; +Cc: devicetree, linux-arm-kernel, stefan, linux-kernel
In-Reply-To: <20161114123701.4355-1-maitysanchayan@gmail.com>
On Mon, Nov 14, 2016 at 06:07:01PM +0530, Sanchayan Maity wrote:
> Enable DMA for DSPI2 and DSPI3 on Vybrid.
>
> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Applied, thanks.
^ permalink raw reply
* RE: [PATCH v5 3/3] clocksource: Add clockevent support to NPS400 driver
From: Noam Camus @ 2016-11-14 13:58 UTC (permalink / raw)
To: Daniel Lezcano
Cc: robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <20161114112326.GC2016@mai>
> From: Daniel Lezcano [mailto:daniel.lezcano@linaro.org]
> Sent: Monday, November 14, 2016 1:23 PM
>> + */
>> +static void nps_clkevent_rm_thread(bool remove_thread) {
>> + unsigned int cflags;
>> + unsigned int enabled_threads = 0;
>> + int thread;
>> +
>> + hw_schd_save(&cflags);
>I'm not used with hardware scheduling. Can you explain why this is needed here ? What >window race we want to close ?
We are using HW scheduling off/on in order to keep consistency of auxiliary registers shared among HW threads within the same core.
Example to such registers NPS_REG_TIMER0_TSI and NPS_REG_TIMER0_CTRL.
Since update procedure of these registers is not atomic we use save/restore macros to turn off/on the HW scheduling. This way we insure that no HW scheduling occurs and another HW thread (represented as another CPU) will execute in this same critical code path.
If we take for example nps_clkevent_add_thread() we can see that we are doing some read modify write to NPS_REG_TIMER0_TSI and optionally writing to NPS_REG_TIMER0_CTRL. This flow should be atomic and is protected by our save/restore macros.
Do note that interrupts are disabled at this point so we are safe from all asynchronous events.
...
>> +static void nps_clkevent_add_thread(bool set_event) {
>> + int thread;
>> + unsigned int cflags, enabled_threads;
>> +
>> + hw_schd_save(&cflags);
>> +
>> + /* add thread to TSI1 */
>> + thread = read_aux_reg(CTOP_AUX_THREAD_ID);
>> + enabled_threads = read_aux_reg(NPS_REG_TIMER0_TSI);
>> + enabled_threads |= (1 << thread);
>> + write_aux_reg(NPS_REG_TIMER0_TSI, enabled_threads);
>> +
>> + /* set next timer event */
>> + if (set_event)
>> + write_aux_reg(NPS_REG_TIMER0_CTRL,
>> + TIMER0_CTRL_IE | TIMER0_CTRL_NH);
>> +
>> + hw_schd_restore(cflags);
>> +}
>Not sure the boolean parameters for *_rm_thread and *_add_thread helps to clarify the code. Depending on the race window with hw_schd_save/restore We should be able to simplify it.
I am not sure I am following you here, how race window may simplify this code?
If those routines will get no parameter I can't determine when to add or not (same as remove).
...
>> +
>> +static DEFINE_PER_CPU(struct clock_event_device, nps_clockevent_device) = {
>> + .name = "NPS Timer0",
>> + .features = CLOCK_EVT_FEAT_ONESHOT |
>> + CLOCK_EVT_FEAT_PERIODIC,
>> + .rating = 300,
>> + .set_next_event = nps_clkevent_set_next_event,
>> + .set_state_periodic = nps_clkevent_set_periodic,
>> + .set_state_oneshot = nps_clkevent_set_oneshot,
>> + .set_state_oneshot_stopped = nps_clkevent_timer_shutdown,
>> + .set_state_shutdown = nps_clkevent_timer_shutdown,
>Doesn't set_state_shutdown and set_state_oneshot_stopped need to remove the HW thread from the TSI ?
You are correct, I will fix that.
Thanks
--Noam
^ permalink raw reply
* Re: [PATCH v7 11/14] mmc: sdhci-msm: Add HS400 platform support
From: kbuild test robot @ 2016-11-14 13:53 UTC (permalink / raw)
Cc: kbuild-all-JC7UmRfGjtg, ulf.hansson-QSEj5FYQhm4dnm+yROfE0A,
linux-mmc-u79uwXL29TY76Z2rM5mHXA,
adrian.hunter-ral2JQCrhuEAvxtiuMwx3w,
shawn.lin-TNX95d0MmH7DzftRWevZcw, sboyd-sgV2jX0FEOL9JmXXK+q4OQ,
andy.gross-QSEj5FYQhm4dnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-clk-u79uwXL29TY76Z2rM5mHXA,
david.brown-QSEj5FYQhm4dnm+yROfE0A,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
georgi.djakov-QSEj5FYQhm4dnm+yROfE0A,
alex.lemberg-XdAiOPVOjttBDgjK7y7TUQ,
mateusz.nowak-ral2JQCrhuEAvxtiuMwx3w,
Yuliy.Izrailov-XdAiOPVOjttBDgjK7y7TUQ,
asutoshd-sgV2jX0FEOL9JmXXK+q4OQ, kdorfman-sgV2jX0FEOL9JmXXK+q4OQ,
david.griego-QSEj5FYQhm4dnm+yROfE0A,
stummala-sgV2jX0FEOL9JmXXK+q4OQ, venkatg-sgV2jX0FEOL9JmXXK+q4OQ,
rnayak-sgV2jX0FEOL9JmXXK+q4OQ,
pramod.gurav-QSEj5FYQhm4dnm+yROfE0A, Ritesh Harjani
In-Reply-To: <1479103248-9491-12-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 1791 bytes --]
Hi Venkat,
[auto build test ERROR on ulf.hansson-mmc/next]
[also build test ERROR on v4.9-rc5]
[cannot apply to next-20161114]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Ritesh-Harjani/mmc-sdhci-msm-Add-clk-rates-DDR-HS400-support/20161114-142815
base: https://git.linaro.org/people/ulf.hansson/mmc next
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=arm
Note: the linux-review/Ritesh-Harjani/mmc-sdhci-msm-Add-clk-rates-DDR-HS400-support/20161114-142815 HEAD baef00575b049e246cebd910c417f34cada20ee0 builds fine.
It only hurts bisectibility.
All errors (new ones prefixed by >>):
drivers/mmc/host/sdhci-msm.c: In function 'sdhci_msm_execute_tuning':
>> drivers/mmc/host/sdhci-msm.c:498:3: error: 'msm_host' undeclared (first use in this function)
msm_host->tuning_done = true;
^~~~~~~~
drivers/mmc/host/sdhci-msm.c:498:3: note: each undeclared identifier is reported only once for each function it appears in
vim +/msm_host +498 drivers/mmc/host/sdhci-msm.c
492 dev_dbg(mmc_dev(mmc), "%s: No tuning point found\n",
493 mmc_hostname(mmc));
494 rc = -EIO;
495 }
496
497 if (!rc)
> 498 msm_host->tuning_done = true;
499 return rc;
500 }
501
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 39300 bytes --]
^ permalink raw reply
* Re: [v17 2/2] drm/bridge: Add I2C based driver for ps8640 bridge
From: Jitao Shi @ 2016-11-14 13:50 UTC (permalink / raw)
To: Archit Taneja
Cc: Enric Balletbo Serra, djkurtz, David Airlie, Thierry Reding,
Matthias Brugger, Mark Rutland, stonea168, dri-devel, Andy Yan,
Ajay Kumar, Vincent Palatin, cawa cheng, bibby.hsieh, CK HU,
Russell King, devicetree@vger.kernel.org, Sascha Hauer,
Pawel Moll, Ian Campbell, Inki Dae, Rob
In-Reply-To: <30b2f209-d957-b0ed-2805-7038e4be6cf1@codeaurora.org>
Dear Archit,
Thanks a lot for your reviewing.
I have sent a new patchset for those review items.
On Fri, 2016-11-11 at 11:32 +0530, Archit Taneja wrote:
> Hi Jitao,
>
> I couldn't locate the original mail, so posting on this thread instead.
> Some comments below.
>
> On 11/10/2016 10:09 PM, Enric Balletbo Serra wrote:
> > Hi Jitao,
> >
> > 2016-08-27 8:44 GMT+02:00 Jitao Shi <jitao.shi@mediatek.com>:
> >> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
> >>
> >> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> >> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
> >> ---
> >> Changes since v16:
> >> - Disable ps8640 DSI MCS Function.
> >> - Rename gpios name more clearly.
> >> - Tune the ps8640 power on sequence.
> >>
> >> Changes since v15:
> >> - Drop drm_connector_(un)register calls from parade ps8640.
> >> The main DRM driver mtk_drm_drv now calls
> >> drm_connector_register_all() after drm_dev_register() in the
> >> mtk_drm_bind() function. That function should iterate over all
> >> connectors and call drm_connector_register() for each of them.
> >> So, remove drm_connector_(un)register calls from parade ps8640.
> >>
> >> Changes since v14:
> >> - update copyright info.
> >> - change bridge_to_ps8640 and connector_to_ps8640 to inline function.
> >> - fix some coding style.
> >> - use sizeof as array counter.
> >> - use drm_get_edid when read edid.
> >> - add mutex when firmware updating.
> >>
> >> Changes since v13:
> >> - add const on data, ps8640_write_bytes(struct i2c_client *client, const u8 *data, u16 data_len)
> >> - fix PAGE2_SW_REST tyro.
> >> - move the buf[3] init to entrance of the function.
> >>
> >> Changes since v12:
> >> - fix hw_chip_id build warning
> >>
> >> Changes since v11:
> >> - Remove depends on I2C, add DRM depends
> >> - Reuse ps8640_write_bytes() in ps8640_write_byte()
> >> - Use timer check for polling like the routines in <linux/iopoll.h>
> >> - Fix no drm_connector_unregister/drm_connector_cleanup when ps8640_bridge_attach fail
> >> - Check the ps8640 hardware id in ps8640_validate_firmware
> >> - Remove fw_version check
> >> - Move ps8640_validate_firmware before ps8640_enter_bl
> >> - Add ddc_i2c unregister when probe fail and ps8640_remove
> >> ---
> >> drivers/gpu/drm/bridge/Kconfig | 12 +
> >> drivers/gpu/drm/bridge/Makefile | 1 +
> >> drivers/gpu/drm/bridge/parade-ps8640.c | 1077 ++++++++++++++++++++++++++++++++
> >> 3 files changed, 1090 insertions(+)
> >> create mode 100644 drivers/gpu/drm/bridge/parade-ps8640.c
> >>
> >> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> >> index b590e67..c59d043 100644
> >> --- a/drivers/gpu/drm/bridge/Kconfig
> >> +++ b/drivers/gpu/drm/bridge/Kconfig
> >> @@ -50,6 +50,18 @@ config DRM_PARADE_PS8622
> >> ---help---
> >> Parade eDP-LVDS bridge chip driver.
> >>
> >> +config DRM_PARADE_PS8640
> >> + tristate "Parade PS8640 MIPI DSI to eDP Converter"
> >> + depends on DRM
> >> + depends on OF
> >> + select DRM_KMS_HELPER
> >> + select DRM_MIPI_DSI
> >> + select DRM_PANEL
> >> + ---help---
> >> + Choose this option if you have PS8640 for display
> >> + The PS8640 is a high-performance and low-power
> >> + MIPI DSI to eDP converter
> >> +
> >> config DRM_SII902X
> >> tristate "Silicon Image sii902x RGB/HDMI bridge"
> >> depends on OF
> >> diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> >> index efdb07e..3360537 100644
> >> --- a/drivers/gpu/drm/bridge/Makefile
> >> +++ b/drivers/gpu/drm/bridge/Makefile
> >> @@ -5,6 +5,7 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
> >> obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
> >> obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> >> obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> >> +obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> >> obj-$(CONFIG_DRM_SII902X) += sii902x.o
> >> obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o
> >> obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
> >> diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c b/drivers/gpu/drm/bridge/parade-ps8640.c
> >> new file mode 100644
> >> index 0000000..7d67431
> >> --- /dev/null
> >> +++ b/drivers/gpu/drm/bridge/parade-ps8640.c
> >> @@ -0,0 +1,1077 @@
> >> +/*
> >> + * Copyright (c) 2016 MediaTek Inc.
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License version 2 as
> >> + * published by the Free Software Foundation.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> >> + * GNU General Public License for more details.
> >> + */
> >> +
> >> +#include <linux/delay.h>
> >> +#include <linux/err.h>
> >> +#include <linux/firmware.h>
> >> +#include <linux/gpio.h>
>
> Not needed.
>
> >> +#include <linux/gpio/consumer.h>
> >> +#include <linux/i2c.h>
> >> +#include <linux/module.h>
> >> +#include <linux/of.h>
> >> +#include <linux/of_gpio.h>
>
> The above 2 aren't needed.
>
> >> +#include <linux/of_graph.h>
> >> +#include <linux/regulator/consumer.h>
> >> +#include <asm/unaligned.h>
> >> +#include <drm/drm_panel.h>
> >> +
> >> +#include <drmP.h>
> >> +#include <drm_atomic_helper.h>
> >> +#include <drm_crtc_helper.h>
> >> +#include <drm_crtc.h>
>
> Not needed.
>
> >> +#include <drm_edid.h>
> >> +#include <drm_mipi_dsi.h>
> >> +
> >> +#define PAGE1_VSTART 0x6b
> >> +#define PAGE2_SPI_CFG3 0x82
> >> +#define I2C_TO_SPI_RESET 0x20
> >> +#define PAGE2_ROMADD_BYTE1 0x8e
> >> +#define PAGE2_ROMADD_BYTE2 0x8f
> >> +#define PAGE2_SWSPI_WDATA 0x90
> >> +#define PAGE2_SWSPI_RDATA 0x91
> >> +#define PAGE2_SWSPI_LEN 0x92
> >> +#define PAGE2_SWSPI_CTL 0x93
> >> +#define TRIGGER_NO_READBACK 0x05
> >> +#define TRIGGER_READBACK 0x01
> >> +#define PAGE2_SPI_STATUS 0x9e
> >> +#define SPI_READY 0x0c
> >> +#define PAGE2_GPIO_L 0xa6
> >> +#define PAGE2_GPIO_H 0xa7
> >> +#define PS_GPIO9 BIT(1)
> >> +#define PAGE2_IROM_CTRL 0xb0
> >> +#define IROM_ENABLE 0xc0
> >> +#define IROM_DISABLE 0x80
> >> +#define PAGE2_SW_RESET 0xbc
> >> +#define SPI_SW_RESET BIT(7)
> >> +#define MPU_SW_RESET BIT(6)
> >> +#define PAGE2_ENCTLSPI_WR 0xda
> >> +#define PAGE2_I2C_BYPASS 0xea
> >> +#define I2C_BYPASS_EN 0xd0
> >> +#define PAGE2_MCS_EN 0xf3
> >> +#define MCS_EN BIT(0)
> >> +#define PAGE3_SET_ADD 0xfe
> >> +#define PAGE3_SET_VAL 0xff
> >> +#define VDO_CTL_ADD 0x13
> >> +#define VDO_DIS 0x18
> >> +#define VDO_EN 0x1c
> >> +#define PAGE4_REV_L 0xf0
> >> +#define PAGE4_REV_H 0xf1
> >> +#define PAGE4_CHIP_L 0xf2
> >> +#define PAGE4_CHIP_H 0xf3
> >> +
> >> +/* Firmware */
> >> +#define PS_FW_NAME "ps864x_fw.bin"
> >> +
> >
> > About the firmware discussion I think that if you want to maintain the
> > upgrade firmware thing you should also include this patch in the
> > series.
> >
> > https://chromium-review.googlesource.com/#/c/317221/
> >
> > Otherwise, if this is not really needed I think that remove this from
> > the driver is the best. Just an opinion, this is something the
> > maintainer should decide.
>
> Was there a conclusion on this? As Daniel Kurtz suggested, can we drop
> the update firmware stuff for now and try to get the functional part
> for 4.10?
>
> >
> >> +#define FW_CHIP_ID_OFFSET 0
> >> +#define FW_VERSION_OFFSET 2
> >> +#define EDID_I2C_ADDR 0x50
> >> +
> >> +#define WRITE_STATUS_REG_CMD 0x01
> >> +#define READ_STATUS_REG_CMD 0x05
> >> +#define BUSY BIT(0)
> >> +#define CLEAR_ALL_PROTECT 0x00
> >> +#define BLK_PROTECT_BITS 0x0c
> >> +#define STATUS_REG_PROTECT BIT(7)
> >> +#define WRITE_ENABLE_CMD 0x06
> >> +#define CHIP_ERASE_CMD 0xc7
> >> +#define MAX_DEVS 0x8
> >> +
> >> +struct ps8640_info {
> >> + u8 family_id;
> >> + u8 variant_id;
> >> + u16 version;
> >> +};
> >> +
> >> +struct ps8640 {
> >> + struct drm_connector connector;
> >> + struct drm_bridge bridge;
> >> + struct edid *edid;
> >> + struct mipi_dsi_device dsi;
> >> + struct i2c_client *page[MAX_DEVS];
> >> + struct i2c_client *ddc_i2c;
> >> + struct regulator_bulk_data supplies[2];
> >> + struct drm_panel *panel;
> >> + struct gpio_desc *gpio_reset;
> >> + struct gpio_desc *gpio_power_down;
> >> + struct gpio_desc *gpio_mode_sel;
> >> + bool enabled;
> >> +
> >> + /* firmware file info */
> >> + struct ps8640_info info;
> >> + bool in_fw_update;
> >> + /* for firmware update protect */
> >> + struct mutex fw_mutex;
> >> +};
> >> +
> >> +static const u8 enc_ctrl_code[6] = { 0xaa, 0x55, 0x50, 0x41, 0x52, 0x44 };
> >> +static const u8 hw_chip_id[4] = { 0x00, 0x0a, 0x00, 0x30 };
> >> +
> >> +static inline struct ps8640 *bridge_to_ps8640(struct drm_bridge *e)
> >> +{
> >> + return container_of(e, struct ps8640, bridge);
> >> +}
> >> +
> >> +static inline struct ps8640 *connector_to_ps8640(struct drm_connector *e)
> >> +{
> >> + return container_of(e, struct ps8640, connector);
> >> +}
> >> +
> >> +static int ps8640_read(struct i2c_client *client, u8 reg, u8 *data,
> >> + u16 data_len)
> >> +{
> >> + int ret;
> >> + struct i2c_msg msgs[] = {
> >> + {
> >> + .addr = client->addr,
> >> + .flags = 0,
> >> + .len = 1,
> >> + .buf = ®,
> >> + },
> >> + {
> >> + .addr = client->addr,
> >> + .flags = I2C_M_RD,
> >> + .len = data_len,
> >> + .buf = data,
> >> + }
> >> + };
> >> +
> >> + ret = i2c_transfer(client->adapter, msgs, 2);
> >> +
> >> + if (ret == 2)
> >> + return 0;
> >> + if (ret < 0)
> >> + return ret;
> >> + else
> >> + return -EIO;
> >> +}
> >> +
> >> +static int ps8640_write_bytes(struct i2c_client *client, const u8 *data,
> >> + u16 data_len)
> >> +{
> >> + int ret;
> >> + struct i2c_msg msg;
> >> +
> >> + msg.addr = client->addr;
> >> + msg.flags = 0;
> >> + msg.len = data_len;
> >> + msg.buf = (u8 *)data;
> >> +
> >> + ret = i2c_transfer(client->adapter, &msg, 1);
> >> + if (ret == 1)
> >> + return 0;
> >> + if (ret < 0)
> >> + return ret;
> >> + else
> >> + return -EIO;
> >> +}
> >> +
> >> +static int ps8640_write_byte(struct i2c_client *client, u8 reg, u8 data)
> >> +{
> >> + u8 buf[] = { reg, data };
> >> +
> >> + return ps8640_write_bytes(client, buf, sizeof(buf));
> >> +}
> >> +
> >> +static void ps8640_get_mcu_fw_version(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[5];
> >> + u8 fw_ver[2];
> >> +
> >> + ps8640_read(client, 0x4, fw_ver, sizeof(fw_ver));
> >> + ps_bridge->info.version = (fw_ver[0] << 8) | fw_ver[1];
> >> +
> >> + DRM_INFO_ONCE("ps8640 rom fw version %d.%d\n", fw_ver[0], fw_ver[1]);
> >> +}
> >> +
> >> +static int ps8640_bridge_unmute(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[3];
> >> + u8 vdo_ctrl_buf[3] = { PAGE3_SET_ADD, VDO_CTL_ADD, VDO_EN };
> >> +
> >> + return ps8640_write_bytes(client, vdo_ctrl_buf, sizeof(vdo_ctrl_buf));
> >> +}
> >> +
> >> +static int ps8640_bridge_mute(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[3];
> >> + u8 vdo_ctrl_buf[3] = { PAGE3_SET_ADD, VDO_CTL_ADD, VDO_DIS };
> >> +
> >> + return ps8640_write_bytes(client, vdo_ctrl_buf, sizeof(vdo_ctrl_buf));
> >> +}
> >> +
> >> +static void ps8640_pre_enable(struct drm_bridge *bridge)
> >> +{
> >> + struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
> >> + struct i2c_client *client = ps_bridge->page[2];
> >> + struct i2c_client *page1 = ps_bridge->page[1];
>
> It's a bit hard to follow what page[3] or page[5] means without going to the
> bottom and reading the dummy devices comment. It would be nice to have some
> macros here.
>
> >> + int err;
> >> + u8 set_vdo_done, mcs_en, vstart;
> >> + ktime_t timeout;
> >> +
> >> + if (ps_bridge->in_fw_update)
> >> + return;
> >> +
> >> + if (ps_bridge->enabled)
> >> + return;
> >> +
> >> + err = drm_panel_prepare(ps_bridge->panel);
> >> + if (err < 0) {
> >> + DRM_ERROR("failed to prepare panel: %d\n", err);
> >> + return;
> >> + }
> >> +
> >> + err = regulator_bulk_enable(ARRAY_SIZE(ps_bridge->supplies),
> >> + ps_bridge->supplies);
> >> + if (err < 0) {
> >> + DRM_ERROR("cannot enable regulators %d\n", err);
> >> + goto err_panel_unprepare;
> >> + }
> >> +
> >> + gpiod_set_value(ps_bridge->gpio_power_down, 1);
> >> + gpiod_set_value(ps_bridge->gpio_reset, 0);
> >> + usleep_range(2000, 2500);
> >> + gpiod_set_value(ps_bridge->gpio_reset, 1);
> >> +
> >> + /*
> >> + * Wait for the ps8640 embed mcu ready
> >> + * First wait 200ms and then check the mcu ready flag every 20ms
> >> + */
> >> + msleep(200);
> >> +
> >> + timeout = ktime_add_ms(ktime_get(), 200);
> >> + for (;;) {
> >> + err = ps8640_read(client, PAGE2_GPIO_H, &set_vdo_done, 1);
> >> + if (err < 0) {
> >> + DRM_ERROR("failed read PAGE2_GPIO_H: %d\n", err);
> >> + goto err_regulators_disable;
> >> + }
> >> + if ((set_vdo_done & PS_GPIO9) == PS_GPIO9)
> >> + break;
> >> + if (ktime_compare(ktime_get(), timeout) > 0)
> >> + break;
> >> + msleep(20);
> >> + }
> >> +
> >> + msleep(50);
> >> +
> >> + ps8640_read(page1, PAGE1_VSTART, &vstart, 1);
> >> + DRM_INFO("PS8640 PAGE1.0x6B = 0x%x\n", vstart);
> >> +
> >> + /**
> >> + * The Manufacturer Command Set (MCS) is a device dependent interface
> >> + * intended for factory programming of the display module default
> >> + * parameters. Once the display module is configured, the MCS shall be
> >> + * disabled by the manufacturer. Once disabled, all MCS commands are
> >> + * ignored by the display interface.
> >> + */
> >> + ps8640_read(client, PAGE2_MCS_EN, &mcs_en, 1);
> >> + ps8640_write_byte(client, PAGE2_MCS_EN, mcs_en & ~MCS_EN);
> >> +
> >> + if (ps_bridge->info.version == 0)
> >> + ps8640_get_mcu_fw_version(ps_bridge);
> >> +
> >> + err = ps8640_bridge_unmute(ps_bridge);
> >> + if (err)
> >> + DRM_ERROR("failed to enable unmutevideo: %d\n", err);
> >> + /* Switch access edp panel's edid through i2c */
> >> + ps8640_write_byte(client, PAGE2_I2C_BYPASS, I2C_BYPASS_EN);
> >> + ps_bridge->enabled = true;
> >> +
> >> + return;
> >> +
> >> +err_regulators_disable:
> >> + regulator_bulk_disable(ARRAY_SIZE(ps_bridge->supplies),
> >> + ps_bridge->supplies);
> >> +err_panel_unprepare:
> >> + drm_panel_unprepare(ps_bridge->panel);
> >> +}
> >> +
> >> +static void ps8640_enable(struct drm_bridge *bridge)
> >> +{
> >> + struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
> >> + int err;
> >> +
> >> + err = drm_panel_enable(ps_bridge->panel);
> >> + if (err < 0)
> >> + DRM_ERROR("failed to enable panel: %d\n", err);
> >> +}
> >> +
> >> +static void ps8640_disable(struct drm_bridge *bridge)
> >> +{
> >> + struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
> >> + int err;
> >> +
> >> + err = drm_panel_disable(ps_bridge->panel);
> >> + if (err < 0)
> >> + DRM_ERROR("failed to disable panel: %d\n", err);
> >> +}
> >> +
> >> +static void ps8640_post_disable(struct drm_bridge *bridge)
> >> +{
> >> + struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
> >> + int err;
> >> +
> >> + if (ps_bridge->in_fw_update)
> >> + return;
> >> +
> >> + if (!ps_bridge->enabled)
> >> + return;
> >> +
> >> + ps_bridge->enabled = false;
> >> +
> >> + err = ps8640_bridge_mute(ps_bridge);
> >> + if (err < 0)
> >> + DRM_ERROR("failed to unmutevideo: %d\n", err);
> >> +
> >> + gpiod_set_value(ps_bridge->gpio_reset, 0);
> >> + gpiod_set_value(ps_bridge->gpio_power_down, 0);
> >> + err = regulator_bulk_disable(ARRAY_SIZE(ps_bridge->supplies),
> >> + ps_bridge->supplies);
> >> + if (err < 0)
> >> + DRM_ERROR("cannot disable regulators %d\n", err);
> >> +
> >> + err = drm_panel_unprepare(ps_bridge->panel);
> >> + if (err)
> >> + DRM_ERROR("failed to unprepare panel: %d\n", err);
> >> +}
> >> +
> >> +static int ps8640_get_modes(struct drm_connector *connector)
> >> +{
> >> + struct ps8640 *ps_bridge = connector_to_ps8640(connector);
> >> + struct edid *edid;
> >> + int num_modes = 0;
> >> + bool power_off;
> >> +
> >> + if (ps_bridge->edid)
> >> + return drm_add_edid_modes(connector, ps_bridge->edid);
> >> +
> >> + power_off = !ps_bridge->enabled;
> >> + ps8640_pre_enable(&ps_bridge->bridge);
> >> +
> >> + edid = drm_get_edid(connector, ps_bridge->ddc_i2c->adapter);
>
> See comments related to this in ps8640_probe.
>
> >> + if (!edid)
> >> + goto out;
> >> +
> >> + ps_bridge->edid = edid;
> >> + drm_mode_connector_update_edid_property(connector, ps_bridge->edid);
> >> + num_modes = drm_add_edid_modes(connector, ps_bridge->edid);
> >> +
> >> +out:
> >> + if (power_off)
> >> + ps8640_post_disable(&ps_bridge->bridge);
> >> +
> >> + return num_modes;
> >> +}
> >> +
> >> +static struct drm_encoder *ps8640_best_encoder(struct drm_connector *connector)
> >> +{
> >> + struct ps8640 *ps_bridge = connector_to_ps8640(connector);
> >> +
> >> + return ps_bridge->bridge.encoder;
> >> +}
>
> We can drop the above func.
>
> >> +
> >> +static const struct drm_connector_helper_funcs ps8640_connector_helper_funcs = {
> >> + .get_modes = ps8640_get_modes,
> >> + .best_encoder = ps8640_best_encoder,
> >> +};
> >> +
> >> +static enum drm_connector_status ps8640_detect(struct drm_connector *connector,
> >> + bool force)
> >> +{
> >> + return connector_status_connected;
> >> +}
> >> +
> >> +static const struct drm_connector_funcs ps8640_connector_funcs = {
> >> + .dpms = drm_atomic_helper_connector_dpms,
> >> + .fill_modes = drm_helper_probe_single_connector_modes,
> >> + .detect = ps8640_detect,
> >> + .reset = drm_atomic_helper_connector_reset,
> >> + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> >> + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> >> +};
> >> +
> >> +int ps8640_bridge_attach(struct drm_bridge *bridge)
> >> +{
> >> + struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
> >> + struct device *dev = &ps_bridge->page[0]->dev;
> >> + struct device_node *port, *in_ep;
> >> + struct device_node *dsi_node = NULL;
> >> + struct mipi_dsi_host *host = NULL;
> >> + int ret;
> >> +
> >> + ret = drm_connector_init(bridge->dev, &ps_bridge->connector,
> >> + &ps8640_connector_funcs,
> >> + DRM_MODE_CONNECTOR_eDP);
> >> +
> >> + if (ret) {
> >> + DRM_ERROR("Failed to initialize connector with drm: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + drm_connector_helper_add(&ps_bridge->connector,
> >> + &ps8640_connector_helper_funcs);
> >> +
> >> + ps_bridge->connector.dpms = DRM_MODE_DPMS_ON;
> >> + drm_mode_connector_attach_encoder(&ps_bridge->connector,
> >> + bridge->encoder);
> >> +
> >> + if (ps_bridge->panel)
> >> + drm_panel_attach(ps_bridge->panel, &ps_bridge->connector);
> >> +
> >> + /* port@0 is ps8640 dsi input port */
> >> + port = of_graph_get_port_by_id(dev->of_node, 0);
> >> + if (port) {
> >> + in_ep = of_get_child_by_name(port, "endpoint");
> >> + of_node_put(port);
>
> The above 2 funcs can be done by a single func: of_graph_get_endpoint_by_regs().
>
> >> + if (in_ep) {
> >> + dsi_node = of_graph_get_remote_port_parent(in_ep);
> >> + of_node_put(in_ep);
> >> + }
> >> + }
> >> + if (dsi_node) {
> >> + host = of_find_mipi_dsi_host_by_node(dsi_node);
> >> + of_node_put(dsi_node);
> >> + if (!host) {
> >> + ret = -ENODEV;
> >> + goto err;
> >> + }
> >> + }
> >> +
>
> We haven't created a DSI device for this yet. Don't we need to call
> mipi_dsi_device_register_full() here?
>
> >> + ps_bridge->dsi.host = host;
>
> The code above proceeds even if we don't find a dsi host. In that
> case, the host would be a NULL pointer. We shouldn't call
> mipi_dsi_attach() with a NULL host. We should have returned earlier with
> an error.
>
> >> + ps_bridge->dsi.mode_flags = MIPI_DSI_MODE_VIDEO |
> >> + MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
> >> + ps_bridge->dsi.format = MIPI_DSI_FMT_RGB888;
> >> + ps_bridge->dsi.lanes = 4;
> >> + ret = mipi_dsi_attach(&ps_bridge->dsi);
> >> + if (ret)
> >> + goto err;
> >> +
> >> + return 0;
> >> +err:
> >> + if (ps_bridge->panel)
> >> + drm_panel_detach(ps_bridge->panel);
> >> + drm_connector_cleanup(&ps_bridge->connector);
> >> + return ret;
> >> +}
> >> +
> >> +static const struct drm_bridge_funcs ps8640_bridge_funcs = {
> >> + .attach = ps8640_bridge_attach,
> >> + .disable = ps8640_disable,
> >> + .post_disable = ps8640_post_disable,
> >> + .pre_enable = ps8640_pre_enable,
> >> + .enable = ps8640_enable,
> >> +};
> >> +
> >> +/* Firmware Version is returned as Major.Minor */
> >> +static ssize_t ps8640_fw_version_show(struct device *dev,
> >> + struct device_attribute *attr, char *buf)
> >> +{
> >> + struct ps8640 *ps_bridge = dev_get_drvdata(dev);
> >> + struct ps8640_info *info = &ps_bridge->info;
> >> +
> >> + return scnprintf(buf, PAGE_SIZE, "%u.%u\n", info->version >> 8,
> >> + info->version & 0xff);
> >> +}
> >> +
> >> +/* Hardware Version is returned as FamilyID.VariantID */
> >> +static ssize_t ps8640_hw_version_show(struct device *dev,
> >> + struct device_attribute *attr, char *buf)
> >> +{
> >> + struct ps8640 *ps_bridge = dev_get_drvdata(dev);
> >> + struct ps8640_info *info = &ps_bridge->info;
> >> +
> >> + return scnprintf(buf, PAGE_SIZE, "ps%u.%u\n", info->family_id,
> >> + info->variant_id);
> >> +}
> >> +
> >> +static int ps8640_spi_send_cmd(struct ps8640 *ps_bridge, u8 *cmd, u8 cmd_len)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[2];
> >> + u8 i, buf[3] = { PAGE2_SWSPI_LEN, cmd_len - 1, TRIGGER_NO_READBACK };
> >> + int ret;
> >> +
> >> + ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_ENABLE);
> >> + if (ret)
> >> + goto err;
> >> +
> >> + /* write command in write port */
> >> + for (i = 0; i < cmd_len; i++) {
> >> + ret = ps8640_write_byte(client, PAGE2_SWSPI_WDATA, cmd[i]);
> >> + if (ret)
> >> + goto err_irom_disable;
> >> + }
> >> +
> >> + ret = ps8640_write_bytes(client, buf, sizeof(buf));
> >> + if (ret)
> >> + goto err_irom_disable;
> >> +
> >> + ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
> >> + if (ret)
> >> + goto err;
> >> +
> >> + return 0;
> >> +err_irom_disable:
> >> + ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
> >> +err:
> >> + dev_err(&client->dev, "send command err: %d\n", ret);
> >> + return ret;
> >> +}
> >> +
> >> +static int ps8640_wait_spi_ready(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[2];
> >> + u8 spi_rdy_st;
> >> + ktime_t timeout;
> >> +
> >> + timeout = ktime_add_ms(ktime_get(), 200);
> >> + for (;;) {
> >> + ps8640_read(client, PAGE2_SPI_STATUS, &spi_rdy_st, 1);
> >> + if ((spi_rdy_st & SPI_READY) != SPI_READY)
> >> + break;
> >> +
> >> + if (ktime_compare(ktime_get(), timeout) > 0) {
> >> + dev_err(&client->dev, "wait spi ready timeout\n");
> >> + return -EBUSY;
> >> + }
> >> +
> >> + msleep(20);
> >> + }
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static int ps8640_wait_spi_nobusy(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[2];
> >> + u8 spi_status, buf[3] = { PAGE2_SWSPI_LEN, 0, TRIGGER_READBACK };
> >> + int ret;
> >> + ktime_t timeout;
> >> +
> >> + timeout = ktime_add_ms(ktime_get(), 500);
> >> + for (;;) {
> >> + /* 0x05 RDSR; Read-Status-Register */
> >> + ret = ps8640_write_byte(client, PAGE2_SWSPI_WDATA,
> >> + READ_STATUS_REG_CMD);
> >> + if (ret)
> >> + goto err_send_cmd_exit;
> >> +
> >> + ret = ps8640_write_bytes(client, buf, 3);
> >> + if (ret)
> >> + goto err_send_cmd_exit;
> >> +
> >> + /* delay for cmd send */
> >> + usleep_range(300, 500);
> >> + /* wait for SPI ROM until not busy */
> >> + ret = ps8640_read(client, PAGE2_SWSPI_RDATA, &spi_status, 1);
> >> + if (ret)
> >> + goto err_send_cmd_exit;
> >> +
> >> + if (!(spi_status & BUSY))
> >> + break;
> >> +
> >> + if (ktime_compare(ktime_get(), timeout) > 0) {
> >> + dev_err(&client->dev, "wait spi no busy timeout: %d\n",
> >> + ret);
> >> + return -EBUSY;
> >> + }
> >> + }
> >> +
> >> + return 0;
> >> +
> >> +err_send_cmd_exit:
> >> + dev_err(&client->dev, "send command err: %d\n", ret);
> >> + return ret;
> >> +}
> >> +
> >> +static int ps8640_wait_rom_idle(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[0];
> >> + int ret;
> >> +
> >> + ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_ENABLE);
> >> + if (ret)
> >> + goto exit;
> >> +
> >> + ret = ps8640_wait_spi_ready(ps_bridge);
> >> + if (ret)
> >> + goto err_spi;
> >> +
> >> + ret = ps8640_wait_spi_nobusy(ps_bridge);
> >> + if (ret)
> >> + goto err_spi;
> >> +
> >> + ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
> >> + if (ret)
> >> + goto exit;
> >> +
> >> + return 0;
> >> +
> >> +err_spi:
> >> + ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
> >> +exit:
> >> + dev_err(&client->dev, "wait ps8640 rom idle fail: %d\n", ret);
> >> +
> >> + return ret;
> >> +}
> >> +
> >> +static int ps8640_spi_dl_mode(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[2];
> >> + int ret;
> >> +
> >> + /* switch ps8640 mode to spi dl mode */
> >> + if (ps_bridge->gpio_mode_sel)
> >> + gpiod_set_value(ps_bridge->gpio_mode_sel, 0);
> >> +
> >> + /* reset spi interface */
> >> + ret = ps8640_write_byte(client, PAGE2_SW_RESET,
> >> + SPI_SW_RESET | MPU_SW_RESET);
> >> + if (ret)
> >> + goto exit;
> >> +
> >> + ret = ps8640_write_byte(client, PAGE2_SW_RESET, MPU_SW_RESET);
> >> + if (ret)
> >> + goto exit;
> >> +
> >> + return 0;
> >> +
> >> +exit:
> >> + dev_err(&client->dev, "fail reset spi interface: %d\n", ret);
> >> +
> >> + return ret;
> >> +}
> >> +
> >> +static int ps8640_rom_prepare(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[2];
> >> + struct device *dev = &client->dev;
> >> + u8 i, cmd[2];
> >> + int ret;
> >> +
> >> + cmd[0] = WRITE_ENABLE_CMD;
> >> + ret = ps8640_spi_send_cmd(ps_bridge, cmd, 1);
> >> + if (ret) {
> >> + dev_err(dev, "failed enable-write-status-register: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + cmd[0] = WRITE_STATUS_REG_CMD;
> >> + cmd[1] = CLEAR_ALL_PROTECT;
> >> + ret = ps8640_spi_send_cmd(ps_bridge, cmd, 2);
> >> + if (ret) {
> >> + dev_err(dev, "fail disable all protection: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + /* wait for SPI module ready */
> >> + ret = ps8640_wait_rom_idle(ps_bridge);
> >> + if (ret) {
> >> + dev_err(dev, "fail wait rom idle: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_ENABLE);
> >> + for (i = 0; i < ARRAY_SIZE(enc_ctrl_code); i++)
> >> + ps8640_write_byte(client, PAGE2_ENCTLSPI_WR, enc_ctrl_code[i]);
> >> + ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
> >> +
> >> + /* Enable-Write-Status-Register */
> >> + cmd[0] = WRITE_ENABLE_CMD;
> >> + ret = ps8640_spi_send_cmd(ps_bridge, cmd, 1);
> >> + if (ret) {
> >> + dev_err(dev, "fail enable-write-status-register: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + /* chip erase command */
> >> + cmd[0] = CHIP_ERASE_CMD;
> >> + ret = ps8640_spi_send_cmd(ps_bridge, cmd, 1);
> >> + if (ret) {
> >> + dev_err(dev, "fail disable all protection: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + ret = ps8640_wait_rom_idle(ps_bridge);
> >> + if (ret) {
> >> + dev_err(dev, "fail wait rom idle: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static int ps8640_check_chip_id(struct ps8640 *ps_bridge)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[4];
> >> + u8 buf[4];
> >> +
> >> + ps8640_read(client, PAGE4_REV_L, buf, 4);
> >> + return memcmp(buf, hw_chip_id, sizeof(buf));
> >> +}
> >> +
> >> +static int ps8640_validate_firmware(struct ps8640 *ps_bridge,
> >> + const struct firmware *fw)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[0];
> >> + u16 fw_chip_id;
> >> +
> >> + /*
> >> + * Get the chip_id from the firmware. Make sure that it is the
> >> + * right controller to do the firmware and config update.
> >> + */
> >> + fw_chip_id = get_unaligned_le16(fw->data + FW_CHIP_ID_OFFSET);
> >> +
> >> + if (fw_chip_id != 0x8640 && ps8640_check_chip_id(ps_bridge) == 0) {
> >> + dev_err(&client->dev,
> >> + "chip id mismatch: fw 0x%x vs. chip 0x8640\n",
> >> + fw_chip_id);
> >> + return -EINVAL;
> >> + }
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static int ps8640_write_rom(struct ps8640 *ps_bridge, const struct firmware *fw)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[0];
> >> + struct device *dev = &client->dev;
> >> + struct i2c_client *client2 = ps_bridge->page[2];
> >> + struct i2c_client *client7 = ps_bridge->page[7];
> >> + size_t pos, cpy_len;
> >> + u8 buf[257];
> >> + int ret;
> >> +
> >> + ps8640_write_byte(client2, PAGE2_SPI_CFG3, I2C_TO_SPI_RESET);
> >> + msleep(100);
> >> + ps8640_write_byte(client2, PAGE2_SPI_CFG3, 0x00);
> >> +
> >> + for (pos = 0; pos < fw->size; pos += cpy_len) {
> >> + buf[0] = PAGE2_ROMADD_BYTE1;
> >> + buf[1] = pos >> 8;
> >> + buf[2] = pos >> 16;
> >> + ret = ps8640_write_bytes(client2, buf, 3);
> >> + if (ret)
> >> + goto error;
> >> + cpy_len = fw->size >= 256 + pos ? 256 : fw->size - pos;
> >> + buf[0] = 0;
> >> + memcpy(buf + 1, fw->data + pos, cpy_len);
> >> + ret = ps8640_write_bytes(client7, buf, cpy_len + 1);
> >> + if (ret)
> >> + goto error;
> >> +
> >> + dev_dbg(dev, "fw update completed %zu / %zu bytes\n", pos,
> >> + fw->size);
> >> + }
> >> + return 0;
> >> +
> >> +error:
> >> + dev_err(dev, "failed write external flash, %d\n", ret);
> >> + return ret;
> >> +}
> >> +
> >> +static int ps8640_spi_normal_mode(struct ps8640 *ps_bridge)
> >> +{
> >> + u8 cmd[2];
> >> + struct i2c_client *client = ps_bridge->page[2];
> >> +
> >> + /* Enable-Write-Status-Register */
> >> + cmd[0] = WRITE_ENABLE_CMD;
> >> + ps8640_spi_send_cmd(ps_bridge, cmd, 1);
> >> +
> >> + /* protect BPL/BP0/BP1 */
> >> + cmd[0] = WRITE_STATUS_REG_CMD;
> >> + cmd[1] = BLK_PROTECT_BITS | STATUS_REG_PROTECT;
> >> + ps8640_spi_send_cmd(ps_bridge, cmd, 2);
> >> +
> >> + /* wait for SPI rom ready */
> >> + ps8640_wait_rom_idle(ps_bridge);
> >> +
> >> + /* disable PS8640 mapping function */
> >> + ps8640_write_byte(client, PAGE2_ENCTLSPI_WR, 0x00);
> >> +
> >> + if (ps_bridge->gpio_mode_sel)
> >> + gpiod_set_value(ps_bridge->gpio_mode_sel, 1);
> >> + return 0;
> >> +}
> >> +
> >> +static int ps8640_enter_bl(struct ps8640 *ps_bridge)
> >> +{
> >> + ps_bridge->in_fw_update = true;
> >> + return ps8640_spi_dl_mode(ps_bridge);
> >> +}
> >> +
> >> +static void ps8640_exit_bl(struct ps8640 *ps_bridge, const struct firmware *fw)
> >> +{
> >> + ps8640_spi_normal_mode(ps_bridge);
> >> + ps_bridge->in_fw_update = false;
> >> +}
> >> +
> >> +static int ps8640_load_fw(struct ps8640 *ps_bridge, const struct firmware *fw)
> >> +{
> >> + struct i2c_client *client = ps_bridge->page[0];
> >> + struct device *dev = &client->dev;
> >> + int ret;
> >> + bool ps8640_status_backup = ps_bridge->enabled;
> >> +
> >> + ret = ps8640_validate_firmware(ps_bridge, fw);
> >> + if (ret)
> >> + return ret;
> >> +
> >> + mutex_lock(&ps_bridge->fw_mutex);
> >> + if (!ps_bridge->in_fw_update) {
> >> + if (!ps8640_status_backup)
> >> + ps8640_pre_enable(&ps_bridge->bridge);
> >> +
> >> + ret = ps8640_enter_bl(ps_bridge);
> >> + if (ret)
> >> + goto exit;
> >> + }
> >> +
> >> + ret = ps8640_rom_prepare(ps_bridge);
> >> + if (ret)
> >> + goto exit;
> >> +
> >> + ret = ps8640_write_rom(ps_bridge, fw);
> >> +
> >> +exit:
> >> + if (ret)
> >> + dev_err(dev, "Failed to load firmware, %d\n", ret);
> >> +
> >> + ps8640_exit_bl(ps_bridge, fw);
> >> + if (!ps8640_status_backup)
> >> + ps8640_post_disable(&ps_bridge->bridge);
> >> + mutex_unlock(&ps_bridge->fw_mutex);
> >> + return ret;
> >> +}
> >> +
> >> +static ssize_t ps8640_update_fw_store(struct device *dev,
> >> + struct device_attribute *attr,
> >> + const char *buf, size_t count)
> >> +{
> >> + struct i2c_client *client = to_i2c_client(dev);
> >> + struct ps8640 *ps_bridge = i2c_get_clientdata(client);
> >> + const struct firmware *fw;
> >> + int error;
> >> +
> >> + error = request_firmware(&fw, PS_FW_NAME, dev);
> >> + if (error) {
> >> + dev_err(dev, "Unable to open firmware %s: %d\n",
> >> + PS_FW_NAME, error);
> >> + return error;
> >> + }
> >> +
> >> + error = ps8640_load_fw(ps_bridge, fw);
> >> + if (error)
> >> + dev_err(dev, "The firmware update failed(%d)\n", error);
> >> + else
> >> + dev_info(dev, "The firmware update succeeded\n");
> >> +
> >> + release_firmware(fw);
> >> + return error ? error : count;
> >> +}
> >> +
> >> +static DEVICE_ATTR(fw_version, S_IRUGO, ps8640_fw_version_show, NULL);
> >> +static DEVICE_ATTR(hw_version, S_IRUGO, ps8640_hw_version_show, NULL);
> >> +static DEVICE_ATTR(update_fw, S_IWUSR, NULL, ps8640_update_fw_store);
> >> +
> >> +static struct attribute *ps8640_attrs[] = {
> >> + &dev_attr_fw_version.attr,
> >> + &dev_attr_hw_version.attr,
> >> + &dev_attr_update_fw.attr,
> >> + NULL
> >> +};
> >> +
> >> +static const struct attribute_group ps8640_attr_group = {
> >> + .attrs = ps8640_attrs,
> >> +};
> >> +
> >> +static void ps8640_remove_sysfs_group(void *data)
> >> +{
> >> + struct ps8640 *ps_bridge = data;
> >> +
> >> + sysfs_remove_group(&ps_bridge->page[0]->dev.kobj, &ps8640_attr_group);
> >> +}
> >> +
> >> +static int ps8640_probe(struct i2c_client *client,
> >> + const struct i2c_device_id *id)
> >> +{
> >> + struct device *dev = &client->dev;
> >> + struct ps8640 *ps_bridge;
> >> + struct device_node *np = dev->of_node;
> >> + struct device_node *port, *out_ep;
> >> + struct device_node *panel_node = NULL;
> >> + int ret;
> >> + u32 i;
> >> +
> >> + ps_bridge = devm_kzalloc(dev, sizeof(*ps_bridge), GFP_KERNEL);
> >> + if (!ps_bridge)
> >> + return -ENOMEM;
> >> +
> >> + /* port@1 is ps8640 output port */
> >> + port = of_graph_get_port_by_id(np, 1);
> >> + if (port) {
> >> + out_ep = of_get_child_by_name(port, "endpoint");
> >> + of_node_put(port);
> >> + if (out_ep) {
> >> + panel_node = of_graph_get_remote_port_parent(out_ep);
> >> + of_node_put(out_ep);
> >> + }
> >> + }
> >> + if (panel_node) {
> >> + ps_bridge->panel = of_drm_find_panel(panel_node);
> >> + of_node_put(panel_node);
> >> + if (!ps_bridge->panel)
> >> + return -EPROBE_DEFER;
> >> + }
> >> +
> >> + mutex_init(&ps_bridge->fw_mutex);
> >> + ps_bridge->supplies[0].supply = "vdd33";
> >> + ps_bridge->supplies[1].supply = "vdd12";
> >> + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ps_bridge->supplies),
> >> + ps_bridge->supplies);
> >> + if (ret) {
> >> + dev_info(dev, "failed to get regulators: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + ps_bridge->gpio_mode_sel = devm_gpiod_get_optional(&client->dev,
> >> + "mode-sel",
> >> + GPIOD_OUT_HIGH);
> >> + if (IS_ERR(ps_bridge->gpio_mode_sel)) {
> >> + ret = PTR_ERR(ps_bridge->gpio_mode_sel);
> >> + dev_err(dev, "cannot get mode-sel %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + ps_bridge->gpio_power_down = devm_gpiod_get(&client->dev, "sleep",
> >> + GPIOD_OUT_LOW);
> >> + if (IS_ERR(ps_bridge->gpio_power_down)) {
> >> + ret = PTR_ERR(ps_bridge->gpio_power_down);
> >> + dev_err(dev, "cannot get sleep: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + /*
> >> + * Request the reset pin low to avoid the bridge being
> >> + * initialized prematurely
> >> + */
> >> + ps_bridge->gpio_reset = devm_gpiod_get(&client->dev, "reset",
> >> + GPIOD_OUT_LOW);
> >> + if (IS_ERR(ps_bridge->gpio_reset)) {
> >> + ret = PTR_ERR(ps_bridge->gpio_reset);
> >> + dev_err(dev, "cannot get reset: %d\n", ret);
> >> + return ret;
> >> + }
> >> +
> >> + ps_bridge->bridge.funcs = &ps8640_bridge_funcs;
> >> + ps_bridge->bridge.of_node = dev->of_node;
> >> +
> >> + ps_bridge->page[0] = client;
> >> + ps_bridge->ddc_i2c = i2c_new_dummy(client->adapter, EDID_I2C_ADDR);
>
> I don't see why we need to create this dummy client. The drm edid helper
> drm_get_edid() just needs the i2c adapter to which the client is connected.
> It will internally initiate a read form the address EDID_I2C_ADDR.
>
> I guess "drm_get_edid(connector, ps_bridge->page[0]->adapter)" should work.
>
> >> + if (!ps_bridge->ddc_i2c) {
> >> + dev_err(dev, "failed ddc_i2c dummy device, address%02x\n",
> >> + EDID_I2C_ADDR);
> >> + return -EBUSY;
> >> + }
> >> + /*
> >> + * ps8640 uses multiple addresses, use dummy devices for them
> >> + * page[0]: for DP control
> >> + * page[1]: for VIDEO Bridge
> >> + * page[2]: for control top
> >> + * page[3]: for DSI Link Control1
> >> + * page[4]: for MIPI Phy
> >> + * page[5]: for VPLL
> >> + * page[6]: for DSI Link Control2
>
> Does this chip support 2 DSI inputs, and we're just exposing one for now?
> If so, we should probably revisit the DT bindings, so that port@2 doesn't
> need to represent the 2nd DSI link.
>
PS8640 has only one dsi input.
DSI Link Control1 and DSI Link Control2 just two parts of the DSI
controller.
> Thanks,
> Archit
>
^ permalink raw reply
* [PATCH v4 2/2] Add support for OV5647 sensor
From: Ramiro Oliveira @ 2016-11-14 13:46 UTC (permalink / raw)
To: mchehab, linux-kernel, linux-media, robh+dt, devicetree
Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil, dheitmueller,
slongerbeam, lars, robert.jarzmik, pavel, pali.rohar,
sakari.ailus, mark.rutland, Ramiro.Oliveira, CARLOS.PALMINHA
In-Reply-To: <cover.1479129004.git.roliveir@synopsys.com>
Add support for OV5647 sensor.
Modes supported:
- 640x480 RAW 8
Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
MAINTAINERS | 7 +
drivers/media/i2c/Kconfig | 12 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/ov5647.c | 861 +++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 881 insertions(+)
create mode 100644 drivers/media/i2c/ov5647.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 93e9f42..6a71422 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8895,6 +8895,13 @@ M: Harald Welte <laforge@gnumonks.org>
S: Maintained
F: drivers/char/pcmcia/cm4040_cs.*
+OMNIVISION OV5647 SENSOR DRIVER
+M: Ramiro Oliveira <roliveir@synopsys.com>
+L: linux-media@vger.kernel.org
+T: git git://linuxtv.org/media_tree.git
+S: Maintained
+F: drivers/media/i2c/ov5647.c
+
OMNIVISION OV7670 SENSOR DRIVER
M: Jonathan Corbet <corbet@lwn.net>
L: linux-media@vger.kernel.org
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 2669b4b..4237165 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -531,6 +531,18 @@ config VIDEO_OV2659
To compile this driver as a module, choose M here: the
module will be called ov2659.
+config VIDEO_OV5647
+ tristate "OmniVision OV5647 sensor support"
+ depends on OF
+ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
+ depends on MEDIA_CAMERA_SUPPORT
+ ---help---
+ This is a Video4Linux2 sensor-level driver for the OmniVision
+ OV5647 camera.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ov5647.
+
config VIDEO_OV7640
tristate "OmniVision OV7640 sensor support"
depends on I2C && VIDEO_V4L2
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 92773b2..0d9014c 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -82,3 +82,4 @@ obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o
obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o
obj-$(CONFIG_VIDEO_OV2659) += ov2659.o
obj-$(CONFIG_VIDEO_TC358743) += tc358743.o
+obj-$(CONFIG_VIDEO_OV5647) += ov5647.o
diff --git a/drivers/media/i2c/ov5647.c b/drivers/media/i2c/ov5647.c
new file mode 100644
index 0000000..0b3b4f2
--- /dev/null
+++ b/drivers/media/i2c/ov5647.c
@@ -0,0 +1,861 @@
+/*
+ * A V4L2 driver for OmniVision OV5647 cameras.
+ *
+ * Based on Samsung S5K6AAFX SXGA 1/6" 1.3M CMOS Image Sensor driver
+ * Copyright (C) 2011 Sylwester Nawrocki <s.nawrocki@samsung.com>
+ *
+ * Based on Omnivision OV7670 Camera Driver
+ * Copyright (C) 2006-7 Jonathan Corbet <corbet@lwn.net>
+ *
+ * Copyright (C) 2016, Synopsys, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed .as is. WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/videodev2.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-mediabus.h>
+#include <media/v4l2-image-sizes.h>
+#include <media/v4l2-of.h>
+#include <linux/io.h>
+
+#define SENSOR_NAME "ov5647"
+
+#define OV5647_SW_RESET 0x1003
+#define OV5647_REG_CHIPID_H 0x300A
+#define OV5647_REG_CHIPID_L 0x300B
+
+#define REG_TERM 0xfffe
+#define VAL_TERM 0xfe
+#define REG_DLY 0xffff
+
+#define OV5647_ROW_START 0x01
+#define OV5647_ROW_START_MIN 0
+#define OV5647_ROW_START_MAX 2004
+#define OV5647_ROW_START_DEF 54
+
+#define OV5647_COLUMN_START 0x02
+#define OV5647_COLUMN_START_MIN 0
+#define OV5647_COLUMN_START_MAX 2750
+#define OV5647_COLUMN_START_DEF 16
+
+#define OV5647_WINDOW_HEIGHT 0x03
+#define OV5647_WINDOW_HEIGHT_MIN 2
+#define OV5647_WINDOW_HEIGHT_MAX 2006
+#define OV5647_WINDOW_HEIGHT_DEF 1944
+
+#define OV5647_WINDOW_WIDTH 0x04
+#define OV5647_WINDOW_WIDTH_MIN 2
+#define OV5647_WINDOW_WIDTH_MAX 2752
+#define OV5647_WINDOW_WIDTH_DEF 2592
+
+struct regval_list {
+ u16 addr;
+ u8 data;
+};
+
+struct cfg_array {
+ struct regval_list *regs;
+ int size;
+};
+
+struct sensor_win_size {
+ int width;
+ int height;
+ unsigned int hoffset;
+ unsigned int voffset;
+ unsigned int hts;
+ unsigned int vts;
+ unsigned int pclk;
+ unsigned int mipi_bps;
+ unsigned int fps_fixed;
+ unsigned int bin_factor;
+ unsigned int intg_min;
+ unsigned int intg_max;
+ void *regs;
+ int regs_size;
+ int (*set_size)(struct v4l2_subdev *sd);
+};
+
+
+struct ov5647 {
+ struct device *dev;
+ struct v4l2_subdev sd;
+ struct media_pad pad;
+ struct mutex lock;
+ struct v4l2_mbus_framefmt format;
+ struct sensor_format_struct *fmt;
+ unsigned int width;
+ unsigned int height;
+ unsigned int capture_mode;
+ int hue;
+ struct v4l2_fract tpf;
+ struct sensor_win_size *current_wins;
+};
+
+static inline struct ov5647 *to_state(struct v4l2_subdev *sd)
+{
+ return container_of(sd, struct ov5647, sd);
+}
+
+static struct regval_list sensor_oe_disable_regs[] = {
+ {0x3000, 0x00},
+ {0x3001, 0x00},
+ {0x3002, 0x00},
+};
+
+static struct regval_list sensor_oe_enable_regs[] = {
+ {0x3000, 0x0f},
+ {0x3001, 0xff},
+ {0x3002, 0xe4},
+};
+
+static struct regval_list ov5647_640x480[] = {
+ {0x0100, 0x00},
+ {0x0103, 0x01},
+ {0x3034, 0x08},
+ {0x3035, 0x21},
+ {0x3036, 0x46},
+ {0x303c, 0x11},
+ {0x3106, 0xf5},
+ {0x3821, 0x07},
+ {0x3820, 0x41},
+ {0x3827, 0xec},
+ {0x370c, 0x0f},
+ {0x3612, 0x59},
+ {0x3618, 0x00},
+ {0x5000, 0x06},
+ {0x5001, 0x01},
+ {0x5002, 0x41},
+ {0x5003, 0x08},
+ {0x5a00, 0x08},
+ {0x3000, 0x00},
+ {0x3001, 0x00},
+ {0x3002, 0x00},
+ {0x3016, 0x08},
+ {0x3017, 0xe0},
+ {0x3018, 0x44},
+ {0x301c, 0xf8},
+ {0x301d, 0xf0},
+ {0x3a18, 0x00},
+ {0x3a19, 0xf8},
+ {0x3c01, 0x80},
+ {0x3b07, 0x0c},
+ {0x380c, 0x07},
+ {0x380d, 0x68},
+ {0x380e, 0x03},
+ {0x380f, 0xd8},
+ {0x3814, 0x31},
+ {0x3815, 0x31},
+ {0x3708, 0x64},
+ {0x3709, 0x52},
+ {0x3808, 0x02},
+ {0x3809, 0x80},
+ {0x380a, 0x01},
+ {0x380b, 0xE0},
+ {0x3801, 0x00},
+ {0x3802, 0x00},
+ {0x3803, 0x00},
+ {0x3804, 0x0a},
+ {0x3805, 0x3f},
+ {0x3806, 0x07},
+ {0x3807, 0xa1},
+ {0x3811, 0x08},
+ {0x3813, 0x02},
+ {0x3630, 0x2e},
+ {0x3632, 0xe2},
+ {0x3633, 0x23},
+ {0x3634, 0x44},
+ {0x3636, 0x06},
+ {0x3620, 0x64},
+ {0x3621, 0xe0},
+ {0x3600, 0x37},
+ {0x3704, 0xa0},
+ {0x3703, 0x5a},
+ {0x3715, 0x78},
+ {0x3717, 0x01},
+ {0x3731, 0x02},
+ {0x370b, 0x60},
+ {0x3705, 0x1a},
+ {0x3f05, 0x02},
+ {0x3f06, 0x10},
+ {0x3f01, 0x0a},
+ {0x3a08, 0x01},
+ {0x3a09, 0x27},
+ {0x3a0a, 0x00},
+ {0x3a0b, 0xf6},
+ {0x3a0d, 0x04},
+ {0x3a0e, 0x03},
+ {0x3a0f, 0x58},
+ {0x3a10, 0x50},
+ {0x3a1b, 0x58},
+ {0x3a1e, 0x50},
+ {0x3a11, 0x60},
+ {0x3a1f, 0x28},
+ {0x4001, 0x02},
+ {0x4004, 0x02},
+ {0x4000, 0x09},
+ {0x4837, 0x24},
+ {0x4050, 0x6e},
+ {0x4051, 0x8f},
+ {0x0100, 0x01},
+};
+
+struct sensor_format_struct;
+
+/**
+ * @short I2C Write operation
+ * @param[in] i2c_client I2C client
+ * @param[in] reg register address
+ * @param[in] val value to write
+ * @return Error code
+ */
+static int ov5647_write(struct v4l2_subdev *sd, u16 reg, u8 val)
+{
+ int ret;
+ unsigned char data[3] = { reg >> 8, reg & 0xff, val};
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ ret = i2c_master_send(client, data, 3);
+ if (ret != 3) {
+ dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
+ __func__, reg);
+ return ret < 0 ? ret : -EIO;
+ }
+ return 0;
+}
+
+/**
+ * @short I2C Read operation
+ * @param[in] i2c_client I2C client
+ * @param[in] reg register address
+ * @param[out] val value read
+ * @return Error code
+ */
+static int ov5647_read(struct v4l2_subdev *sd, u16 reg, u8 *val)
+{
+ int ret;
+ unsigned char data_w[2] = { reg >> 8, reg & 0xff };
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+
+ ret = i2c_master_send(client, data_w, 2);
+
+ if (ret < 2) {
+ dev_dbg(&client->dev, "%s: i2c read error, reg: %x\n",
+ __func__, reg);
+ return ret < 0 ? ret : -EIO;
+ }
+
+
+ ret = i2c_master_recv(client, val, 1);
+
+ if (ret < 1) {
+ dev_dbg(&client->dev, "%s: i2c read error, reg: %x\n",
+ __func__, reg);
+ return ret < 0 ? ret : -EIO;
+ }
+ return 0;
+}
+
+static int ov5647_write_array(struct v4l2_subdev *sd,
+ struct regval_list *regs, int array_size)
+{
+ int i = 0;
+ int ret = 0;
+
+ if (!regs)
+ return -EINVAL;
+
+ while (i < array_size) {
+ ret = ov5647_write(sd, regs->addr, regs->data);
+ if (ret < 0)
+ return ret;
+ i++;
+ regs++;
+ }
+ return 0;
+}
+
+static void ov5647_set_virtual_channel(struct v4l2_subdev *sd, int channel)
+{
+ u8 channel_id;
+
+ ov5647_read(sd, 0x4814, &channel_id);
+ channel_id &= ~(3 << 6);
+ ov5647_write(sd, 0x4814, channel_id | (channel << 6));
+}
+
+void ov5647_stream_on(struct v4l2_subdev *sd)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ ov5647_write(sd, 0x4202, 0x00);
+ dev_dbg(&client->dev, "Stream on");
+ ov5647_write(sd, 0x300D, 0x00);
+}
+
+void ov5647_stream_off(struct v4l2_subdev *sd)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ ov5647_write(sd, 0x4202, 0x0f);
+ dev_dbg(&client->dev, "Stream off");
+ ov5647_write(sd, 0x300D, 0x01);
+}
+
+/****************************************************************************/
+
+/**
+ * @short Set SW standby
+ * @param[in] sd v4l2 sd
+ * @param[in] stanby standby mode status (on or off)
+ * @return Error code
+ */
+static int set_sw_standby(struct v4l2_subdev *sd, bool standby)
+{
+ int ret;
+ unsigned char rdval;
+
+ ret = ov5647_read(sd, 0x0100, &rdval);
+ if (ret != 0)
+ return ret;
+
+ if (standby)
+ ret = ov5647_write(sd, 0x0100, rdval&0xfe);
+ else
+ ret = ov5647_write(sd, 0x0100, rdval|0x01);
+
+ return ret;
+}
+
+/**
+ * @short Store information about the video data format.
+ */
+static struct sensor_format_struct {
+ __u8 *desc;
+ u32 mbus_code;
+ struct regval_list *regs;
+ int regs_size;
+ int bpp;
+} sensor_formats[] = {
+ {
+ .desc = "Raw RGB Bayer",
+ .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .regs = ov5647_640x480,
+ .regs_size = ARRAY_SIZE(ov5647_640x480),
+ .bpp = 1
+ },
+};
+#define N_FMTS ARRAY_SIZE(sensor_formats)
+
+/* ----------------------------------------------------------------------- */
+
+/**
+ * @short Initialize sensor
+ * @param[in] sd v4l2 subdev
+ * @param[in] val not used
+ * @return Error code
+ */
+static int __sensor_init(struct v4l2_subdev *sd)
+{
+ int ret;
+ u8 resetval;
+ u8 rdval;
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ dev_dbg(&client->dev, "sensor init\n");
+
+ ret = ov5647_read(sd, 0x0100, &rdval);
+ if (ret != 0)
+ return ret;
+
+ ov5647_write(sd, 0x4800, 0x25);
+ ov5647_stream_off(sd);
+
+ ret = ov5647_write_array(sd, ov5647_640x480,
+ ARRAY_SIZE(ov5647_640x480));
+ if (ret < 0) {
+ dev_err(&client->dev, "write sensor_default_regs error\n");
+ return ret;
+ }
+
+ ov5647_set_virtual_channel(sd, 0);
+
+ ov5647_read(sd, 0x0100, &resetval);
+ if (!resetval&0x01) {
+ dev_err(&client->dev, "Device was in SW standby");
+ ov5647_write(sd, 0x0100, 0x01);
+ }
+
+ ov5647_write(sd, 0x4800, 0x04);
+ ov5647_stream_on(sd);
+
+ return 0;
+}
+
+/**
+ * @short Control sensor power state
+ * @param[in] sd v4l2 subdev
+ * @param[in] on Sensor power
+ * @return Error code
+ */
+static int sensor_power(struct v4l2_subdev *sd, int on)
+{
+ int ret;
+ struct ov5647 *ov5647 = to_state(sd);
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ ret = 0;
+ mutex_lock(&ov5647->lock);
+
+ if (on) {
+ dev_dbg(&client->dev, "OV5647 power on!\n");
+
+ ret = ov5647_write_array(sd, sensor_oe_enable_regs,
+ ARRAY_SIZE(sensor_oe_enable_regs));
+
+ ret = __sensor_init(sd);
+
+ if (ret < 0)
+ dev_err(&client->dev,
+ "Camera not available! Check Power!\n");
+ } else {
+ dev_dbg(&client->dev, "OV5647 power off!\n");
+
+ dev_dbg(&client->dev, "disable oe\n");
+ ret = ov5647_write_array(sd, sensor_oe_disable_regs,
+ ARRAY_SIZE(sensor_oe_disable_regs));
+
+ if (ret < 0)
+ dev_dbg(&client->dev, "disable oe failed!\n");
+
+ ret = set_sw_standby(sd, true);
+
+ if (ret < 0)
+ dev_dbg(&client->dev, "soft stby failed!\n");
+
+ }
+
+ mutex_unlock(&ov5647->lock);
+
+ return ret;
+}
+
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+/**
+ * @short Get register value
+ * @param[in] sd v4l2 subdev
+ * @param[in] reg register struct
+ * @return Error code
+ */
+static int sensor_get_register(struct v4l2_subdev *sd,
+ struct v4l2_dbg_register *reg)
+{
+ unsigned char val = 0;
+ int ret;
+
+ ret = ov5647_read(sd, reg->reg & 0xff, &val);
+ reg->val = val;
+ reg->size = 1;
+ return ret;
+}
+
+/**
+ * @short Set register value
+ * @param[in] sd v4l2 subdev
+ * @param[in] reg register struct
+ * @return Error code
+ */
+static int sensor_set_register(struct v4l2_subdev *sd,
+ const struct v4l2_dbg_register *reg)
+{
+ ov5647_write(sd, reg->reg & 0xff, reg->val & 0xff);
+ return 0;
+}
+#endif
+
+/* ----------------------------------------------------------------------- */
+
+/**
+ * @short Subdev core operations registration
+ */
+static const struct v4l2_subdev_core_ops sensor_core_ops = {
+ .s_power = sensor_power,
+#ifdef CONFIG_VIDEO_ADV_DEBUG
+ .g_register = sensor_get_register,
+ .s_register = sensor_set_register,
+#endif
+};
+
+/* ----------------------------------------------------------------------- */
+
+
+
+/**
+ * @short Enumerate available image formats
+ * @param[in] sd v4l2 subdev
+ * @param[in] index index
+ * @param[in] code MBUS Pixel code
+ * @return Error code
+ */
+static int sensor_enum_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->pad || code->index >= N_FMTS)
+ return -EINVAL;
+
+ code->code = sensor_formats[code->index].mbus_code;
+ return 0;
+}
+
+/**
+ * @short Try frame format internal function
+ * @param[in] sd v4l2 subdev
+ * @param[in] fmt frame format
+ * @return Error code
+ */
+static int sensor_try_fmt_internal(struct v4l2_subdev *sd,
+ struct v4l2_mbus_framefmt *fmt, struct sensor_format_struct **ret_fmt,
+ struct sensor_win_size **ret_wsize)
+{
+ int index;
+
+ for (index = 0; index < N_FMTS; index++)
+ if (sensor_formats[index].mbus_code == fmt->code)
+ break;
+
+ if (index >= N_FMTS)
+ return -EINVAL;
+
+ if (ret_fmt != NULL)
+ *ret_fmt = sensor_formats + index;
+
+ fmt->field = V4L2_FIELD_NONE;
+
+ return 0;
+}
+
+/**
+ * @short Set frame format
+ * @param[in] sd v4l2 subdev
+ * @param[in] fmt frame format
+ * @return Error code
+ */
+static int sensor_s_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+ int ret;
+ struct sensor_format_struct *sensor_fmt;
+ struct sensor_win_size *wsize;
+ struct ov5647 *info = to_state(sd);
+
+ ov5647_write_array(sd, sensor_oe_disable_regs,
+ ARRAY_SIZE(sensor_oe_disable_regs));
+
+ ret = sensor_try_fmt_internal(sd, &fmt->format,
+ &sensor_fmt, &wsize);
+ if (ret)
+ return ret;
+
+ ov5647_write_array(sd, sensor_fmt->regs, sensor_fmt->regs_size);
+
+ ret = 0;
+
+ if (wsize->regs)
+ ov5647_write_array(sd, wsize->regs, wsize->regs_size);
+
+ if (wsize->set_size)
+ wsize->set_size(sd);
+
+ info->fmt = sensor_fmt;
+ info->width = wsize->width;
+ info->height = wsize->height;
+
+ ov5647_write_array(sd, sensor_oe_enable_regs,
+ ARRAY_SIZE(sensor_oe_enable_regs));
+
+ return 0;
+}
+
+/**
+ * @short Set stream parameters
+ * @param[in] sd v4l2 subdev
+ * @param[in] parms stream parameters
+ * @return Error code
+ */
+static int sensor_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
+{
+ struct v4l2_captureparm *cp = &parms->parm.capture;
+ struct ov5647 *info = to_state(sd);
+
+ if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+ return -EINVAL;
+
+ if (info->tpf.numerator == 0)
+ return -EINVAL;
+
+ info->capture_mode = cp->capturemode;
+
+ return 0;
+}
+
+/**
+ * @short Get stream parameters
+ * @param[in] sd v4l2 subdev
+ * @param[in] parms stream parameters
+ * @return Error code
+ */
+static int sensor_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
+{
+ struct v4l2_captureparm *cp = &parms->parm.capture;
+ struct ov5647 *info = to_state(sd);
+
+ if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
+ return -EINVAL;
+
+ memset(cp, 0, sizeof(struct v4l2_captureparm));
+ cp->capability = V4L2_CAP_TIMEPERFRAME;
+ cp->capturemode = info->capture_mode;
+
+ return 0;
+}
+
+/**
+ * @short Subdev video operations registration
+ *
+ */
+static const struct v4l2_subdev_video_ops sensor_video_ops = {
+ .s_parm = sensor_s_parm,
+ .g_parm = sensor_g_parm,
+};
+
+/* ----------------------------------------------------------------------- */
+
+/**
+ * @short Subdev operations registration
+ *
+ */
+static const struct v4l2_subdev_ops subdev_ops = {
+ .core = &sensor_core_ops,
+ .video = &sensor_video_ops,
+};
+
+/* -----------------------------------------------------------------------------
+ * V4L2 subdev internal operations
+ */
+
+/**
+ * @short Detect camera version and model
+ * @param[in] sd v4l2 subdev
+ * @return Error code
+ */
+int ov5647_detect(struct v4l2_subdev *sd)
+{
+ unsigned char v;
+ int ret;
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ ret = ov5647_write(sd, OV5647_SW_RESET, 0x01);
+ if (ret < 0)
+ return ret;
+ ret = ov5647_read(sd, OV5647_REG_CHIPID_H, &v);
+ if (ret < 0)
+ return ret;
+ if (v != 0x56) {
+ dev_err(&client->dev, "Wrong model version detected");
+ return -ENODEV;
+ }
+ ret = ov5647_read(sd, OV5647_REG_CHIPID_L, &v);
+ if (ret < 0)
+ return ret;
+ if (v != 0x47) {
+ dev_err(&client->dev, "Wrong model version detected");
+ return -ENODEV;
+ }
+
+ ret = ov5647_write(sd, OV5647_SW_RESET, 0x00);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+/**
+ * @short Detect if camera is registered
+ * @param[in] sd v4l2 subdev
+ * @return Error code
+ */
+static int ov5647_registered(struct v4l2_subdev *sd)
+{
+ struct i2c_client *client = v4l2_get_subdevdata(sd);
+
+ dev_info(&client->dev, "OV5647 detected at address 0x%02x\n",
+ client->addr);
+
+ return 0;
+}
+
+/**
+ * @short Open device
+ * @param[in] sd v4l2 subdev
+ * @param[in] fh v4l2 file handler
+ * @return Error code
+ */
+static int ov5647_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+ struct v4l2_mbus_framefmt *format =
+ v4l2_subdev_get_try_format(sd, fh->pad, 0);
+ struct v4l2_rect *crop =
+ v4l2_subdev_get_try_crop(sd, fh->pad, 0);
+
+ crop->left = OV5647_COLUMN_START_DEF;
+ crop->top = OV5647_ROW_START_DEF;
+ crop->width = OV5647_WINDOW_WIDTH_DEF;
+ crop->height = OV5647_WINDOW_HEIGHT_DEF;
+
+ format->code = MEDIA_BUS_FMT_SBGGR8_1X8;
+
+ format->width = OV5647_WINDOW_WIDTH_DEF;
+ format->height = OV5647_WINDOW_HEIGHT_DEF;
+ format->field = V4L2_FIELD_NONE;
+ format->colorspace = V4L2_COLORSPACE_SRGB;
+
+ return sensor_power(sd, true);
+}
+
+/**
+ * @short Open device
+ * @param[in] sd v4l2 subdev
+ * @param[in] fh v4l2 file handler
+ * @return Error code
+ */
+static int ov5647_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+ return sensor_power(sd, false);
+}
+
+/**
+ * @short Subdev internal operations registration
+ *
+ */
+static const struct v4l2_subdev_internal_ops ov5647_subdev_internal_ops = {
+ .registered = ov5647_registered,
+ .open = ov5647_open,
+ .close = ov5647_close,
+};
+
+/**
+ * @short Initialization routine - Entry point of the driver
+ * @param[in] client pointer to the i2c client structure
+ * @param[in] id pointer to the i2c device id structure
+ * @return 0 on success and a negative number on failure
+ */
+static int ov5647_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ struct ov5647 *sensor;
+ int ret = 0;
+ struct v4l2_subdev *sd;
+
+ dev_info(&client->dev, "Installing OmniVision OV5647 camera driver\n");
+
+ sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
+ if (sensor == NULL)
+ return -ENOMEM;
+
+ mutex_init(&sensor->lock);
+ sensor->dev = dev;
+
+ sd = &sensor->sd;
+ v4l2_i2c_subdev_init(sd, client, &subdev_ops);
+ sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+
+ sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
+ sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
+ ret = media_entity_pads_init(&sd->entity, 1, &sensor->pad);
+ if (ret < 0)
+ goto mutex_remove;
+
+ ret = ov5647_detect(sd);
+ if (ret < 0)
+ goto error;
+
+ ret = v4l2_async_register_subdev(sd);
+ if (ret < 0)
+ goto error;
+
+ return 0;
+error:
+ media_entity_cleanup(&sd->entity);
+mutex_remove:
+ mutex_destroy(&sensor->lock);
+ return ret;
+}
+
+/**
+ * @short Exit routine - Exit point of the driver
+ * @param[in] client pointer to the i2c client structure
+ * @return 0 on success and a negative number on failure
+ */
+static int ov5647_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov5647 *ov5647 = to_state(sd);
+
+ v4l2_async_unregister_subdev(&ov5647->sd);
+ media_entity_cleanup(&ov5647->sd.entity);
+ v4l2_device_unregister_subdev(sd);
+ mutex_destroy(&ov5647->lock);
+
+ return 0;
+}
+
+static const struct i2c_device_id ov5647_id[] = {
+ { "ov5647", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ov5647_id);
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id ov5647_of_match[] = {
+ { .compatible = "ovti,ov5647" },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ov5647_of_match);
+#endif
+
+/**
+ * @short i2c driver structure
+ */
+static struct i2c_driver ov5647_driver = {
+ .driver = {
+ .of_match_table = of_match_ptr(ov5647_of_match),
+ .owner = THIS_MODULE,
+ .name = "ov5647",
+ },
+ .probe = ov5647_probe,
+ .remove = ov5647_remove,
+ .id_table = ov5647_id,
+};
+
+module_i2c_driver(ov5647_driver);
+
+MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
+MODULE_DESCRIPTION("A low-level driver for OmniVision ov5647 sensors");
+MODULE_LICENSE("GPL v2");
--
2.10.2
^ permalink raw reply related
* [PATCH v4 1/2] Add OV5647 device tree documentation
From: Ramiro Oliveira @ 2016-11-14 13:46 UTC (permalink / raw)
To: mchehab, linux-kernel, linux-media, robh+dt, devicetree
Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil, dheitmueller,
slongerbeam, lars, robert.jarzmik, pavel, pali.rohar,
sakari.ailus, mark.rutland, Ramiro.Oliveira, CARLOS.PALMINHA
In-Reply-To: <cover.1479129004.git.roliveir@synopsys.com>
Add device tree documentation.
Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
---
.../devicetree/bindings/media/i2c/ov5647.txt | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/ov5647.txt
diff --git a/Documentation/devicetree/bindings/media/i2c/ov5647.txt b/Documentation/devicetree/bindings/media/i2c/ov5647.txt
new file mode 100644
index 0000000..4c91b3b
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/ov5647.txt
@@ -0,0 +1,19 @@
+Omnivision OV5647 raw image sensor
+---------------------------------
+
+OV5647 is a raw image sensor with MIPI CSI-2 and CCP2 image data interfaces
+and CCI (I2C compatible) control bus.
+
+Required properties:
+
+- compatible : "ovti,ov5647";
+- reg : I2C slave address of the sensor;
+
+The common video interfaces bindings (see video-interfaces.txt) should be
+used to specify link to the image data receiver. The OV5647 device
+node should contain one 'port' child node with an 'endpoint' subnode.
+
+Following properties are valid for the endpoint node:
+
+- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in
+ video-interfaces.txt. The sensor supports only two data lanes.
--
2.10.2
^ permalink raw reply related
* [PATCH v4 0/2] Add support for Omnivision OV5647
From: Ramiro Oliveira @ 2016-11-14 13:46 UTC (permalink / raw)
To: mchehab, linux-kernel, linux-media, robh+dt, devicetree
Cc: davem, gregkh, geert+renesas, akpm, linux, hverkuil, dheitmueller,
slongerbeam, lars, robert.jarzmik, pavel, pali.rohar,
sakari.ailus, mark.rutland, Ramiro.Oliveira, CARLOS.PALMINHA
Hello,
This patch adds support for the Omnivision OV5647 sensor.
At the moment it only supports 640x480 in Raw 8.
This is the fourth version of the OV5647 camera driver patchset.
v4:
- Add correct license
- Revert debugging info to generic infrastructure
- Turn defines into enums
- Correct code style issues
- Remove unused defines
- Make sure all errors where being handled
- Rename some functions to make code more readable
- Add some debugging info
v3:
- No changes. Re-submitted due to lack of responses
v2:
- Corrections in DT documentation
Ramiro Oliveira (2):
Add OV5647 device tree documentation
Add support for OV5647 sensor
.../devicetree/bindings/media/i2c/ov5647.txt | 19 +
MAINTAINERS | 7 +
drivers/media/i2c/Kconfig | 12 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/ov5647.c | 861 +++++++++++++++++++++
5 files changed, 900 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/ov5647.txt
create mode 100644 drivers/media/i2c/ov5647.c
--
2.10.2
^ permalink raw reply
* [PATCH v18 2/2] drm/bridge: Add I2C based driver for ps8640 bridge
From: Jitao Shi @ 2016-11-14 13:41 UTC (permalink / raw)
To: David Airlie, Thierry Reding, Matthias Brugger
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Jitao Shi, Ajay Kumar, Inki Dae, Rahul Sharma, Sean Paul,
Vincent Palatin, Andy Yan, Philipp Zabel, Russell King,
devicetree, linux-kernel, dri-devel, linux-arm-kernel,
linux-mediatek, srv_heupstream
In-Reply-To: <1479130908-17593-1-git-send-email-jitao.shi@mediatek.com>
This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v17:
- remove some unused head files.
- add macros for ps8640 pages.
- remove ddc_i2c client
- add mipi_dsi_device_register_full
- remove the manufacturer from the name and i2c_device_id
Changes since v16:
- Disable ps8640 DSI MCS Function.
- Rename gpios name more clearly.
- Tune the ps8640 power on sequence.
Changes since v15:
- Drop drm_connector_(un)register calls from parade ps8640.
The main DRM driver mtk_drm_drv now calls
drm_connector_register_all() after drm_dev_register() in the
mtk_drm_bind() function. That function should iterate over all
connectors and call drm_connector_register() for each of them.
So, remove drm_connector_(un)register calls from parade ps8640.
Changes since v14:
- update copyright info.
- change bridge_to_ps8640 and connector_to_ps8640 to inline function.
- fix some coding style.
- use sizeof as array counter.
- use drm_get_edid when read edid.
- add mutex when firmware updating.
Changes since v13:
- add const on data, ps8640_write_bytes(struct i2c_client *client, const u8 *data, u16 data_len)
- fix PAGE2_SW_REST tyro.
- move the buf[3] init to entrance of the function.
Changes since v12:
- fix hw_chip_id build warning
Changes since v11:
- Remove depends on I2C, add DRM depends
- Reuse ps8640_write_bytes() in ps8640_write_byte()
- Use timer check for polling like the routines in <linux/iopoll.h>
- Fix no drm_connector_unregister/drm_connector_cleanup when ps8640_bridge_attach fail
- Check the ps8640 hardware id in ps8640_validate_firmware
- Remove fw_version check
- Move ps8640_validate_firmware before ps8640_enter_bl
- Add ddc_i2c unregister when probe fail and ps8640_remove
---
drivers/gpu/drm/bridge/Kconfig | 12 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/parade-ps8640.c | 1079 ++++++++++++++++++++++++++++++++
3 files changed, 1092 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/parade-ps8640.c
diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
index 10e12e7..7f41bbc 100644
--- a/drivers/gpu/drm/bridge/Kconfig
+++ b/drivers/gpu/drm/bridge/Kconfig
@@ -57,6 +57,18 @@ config DRM_PARADE_PS8622
---help---
Parade eDP-LVDS bridge chip driver.
+config DRM_PARADE_PS8640
+ tristate "Parade PS8640 MIPI DSI to eDP Converter"
+ depends on DRM
+ depends on OF
+ select DRM_KMS_HELPER
+ select DRM_MIPI_DSI
+ select DRM_PANEL
+ ---help---
+ Choose this option if you have PS8640 for display
+ The PS8640 is a high-performance and low-power
+ MIPI DSI to eDP converter
+
config DRM_SII902X
tristate "Silicon Image sii902x RGB/HDMI bridge"
depends on OF
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index cdf3a3c..7d93d40 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
+obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
obj-$(CONFIG_DRM_SII902X) += sii902x.o
obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o
obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c b/drivers/gpu/drm/bridge/parade-ps8640.c
new file mode 100644
index 0000000..2d9c337
--- /dev/null
+++ b/drivers/gpu/drm/bridge/parade-ps8640.c
@@ -0,0 +1,1079 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/firmware.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+#include <asm/unaligned.h>
+#include <drm/drm_panel.h>
+
+#include <drmP.h>
+#include <drm_atomic_helper.h>
+#include <drm_crtc_helper.h>
+#include <drm_edid.h>
+#include <drm_mipi_dsi.h>
+
+#define PAGE1_VSTART 0x6b
+#define PAGE2_SPI_CFG3 0x82
+#define I2C_TO_SPI_RESET 0x20
+#define PAGE2_ROMADD_BYTE1 0x8e
+#define PAGE2_ROMADD_BYTE2 0x8f
+#define PAGE2_SWSPI_WDATA 0x90
+#define PAGE2_SWSPI_RDATA 0x91
+#define PAGE2_SWSPI_LEN 0x92
+#define PAGE2_SWSPI_CTL 0x93
+#define TRIGGER_NO_READBACK 0x05
+#define TRIGGER_READBACK 0x01
+#define PAGE2_SPI_STATUS 0x9e
+#define SPI_READY 0x0c
+#define PAGE2_GPIO_L 0xa6
+#define PAGE2_GPIO_H 0xa7
+#define PS_GPIO9 BIT(1)
+#define PAGE2_IROM_CTRL 0xb0
+#define IROM_ENABLE 0xc0
+#define IROM_DISABLE 0x80
+#define PAGE2_SW_RESET 0xbc
+#define SPI_SW_RESET BIT(7)
+#define MPU_SW_RESET BIT(6)
+#define PAGE2_ENCTLSPI_WR 0xda
+#define PAGE2_I2C_BYPASS 0xea
+#define I2C_BYPASS_EN 0xd0
+#define PAGE2_MCS_EN 0xf3
+#define MCS_EN BIT(0)
+#define PAGE3_SET_ADD 0xfe
+#define PAGE3_SET_VAL 0xff
+#define VDO_CTL_ADD 0x13
+#define VDO_DIS 0x18
+#define VDO_EN 0x1c
+#define PAGE4_REV_L 0xf0
+#define PAGE4_REV_H 0xf1
+#define PAGE4_CHIP_L 0xf2
+#define PAGE4_CHIP_H 0xf3
+
+#define PAGE0_DP_CNTL 0
+#define PAGE1_VDO_BDG 1
+#define PAGE2_TOP_CNTL 2
+#define PAGE3_DSI_CNTL1 3
+#define PAGE4_MIPI_PHY 4
+#define PAGE5_VPLL 5
+#define PAGE6_DSI_CNTL2 6
+#define PAGE7_SPI_CNTL 7
+#define MAX_DEVS 0x8
+
+/* Firmware */
+#define PS_FW_NAME "ps864x_fw.bin"
+
+#define FW_CHIP_ID_OFFSET 0
+#define FW_VERSION_OFFSET 2
+#define EDID_I2C_ADDR 0x50
+
+#define WRITE_STATUS_REG_CMD 0x01
+#define READ_STATUS_REG_CMD 0x05
+#define BUSY BIT(0)
+#define CLEAR_ALL_PROTECT 0x00
+#define BLK_PROTECT_BITS 0x0c
+#define STATUS_REG_PROTECT BIT(7)
+#define WRITE_ENABLE_CMD 0x06
+#define CHIP_ERASE_CMD 0xc7
+
+struct ps8640_info {
+ u8 family_id;
+ u8 variant_id;
+ u16 version;
+};
+
+struct ps8640 {
+ struct drm_connector connector;
+ struct drm_bridge bridge;
+ struct edid *edid;
+ struct mipi_dsi_device *dsi;
+ struct i2c_client *page[MAX_DEVS];
+ struct regulator_bulk_data supplies[2];
+ struct drm_panel *panel;
+ struct gpio_desc *gpio_reset;
+ struct gpio_desc *gpio_power_down;
+ struct gpio_desc *gpio_mode_sel;
+ bool enabled;
+
+ /* firmware file info */
+ struct ps8640_info info;
+ bool in_fw_update;
+ /* for firmware update protect */
+ struct mutex fw_mutex;
+};
+
+static const u8 enc_ctrl_code[6] = { 0xaa, 0x55, 0x50, 0x41, 0x52, 0x44 };
+static const u8 hw_chip_id[4] = { 0x00, 0x0a, 0x00, 0x30 };
+
+static inline struct ps8640 *bridge_to_ps8640(struct drm_bridge *e)
+{
+ return container_of(e, struct ps8640, bridge);
+}
+
+static inline struct ps8640 *connector_to_ps8640(struct drm_connector *e)
+{
+ return container_of(e, struct ps8640, connector);
+}
+
+static int ps8640_read(struct i2c_client *client, u8 reg, u8 *data,
+ u16 data_len)
+{
+ int ret;
+ struct i2c_msg msgs[] = {
+ {
+ .addr = client->addr,
+ .flags = 0,
+ .len = 1,
+ .buf = ®,
+ },
+ {
+ .addr = client->addr,
+ .flags = I2C_M_RD,
+ .len = data_len,
+ .buf = data,
+ }
+ };
+
+ ret = i2c_transfer(client->adapter, msgs, 2);
+
+ if (ret == 2)
+ return 0;
+ if (ret < 0)
+ return ret;
+ else
+ return -EIO;
+}
+
+static int ps8640_write_bytes(struct i2c_client *client, const u8 *data,
+ u16 data_len)
+{
+ int ret;
+ struct i2c_msg msg;
+
+ msg.addr = client->addr;
+ msg.flags = 0;
+ msg.len = data_len;
+ msg.buf = (u8 *)data;
+
+ ret = i2c_transfer(client->adapter, &msg, 1);
+ if (ret == 1)
+ return 0;
+ if (ret < 0)
+ return ret;
+ else
+ return -EIO;
+}
+
+static int ps8640_write_byte(struct i2c_client *client, u8 reg, u8 data)
+{
+ u8 buf[] = { reg, data };
+
+ return ps8640_write_bytes(client, buf, sizeof(buf));
+}
+
+static void ps8640_get_mcu_fw_version(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE5_VPLL];
+ u8 fw_ver[2];
+
+ ps8640_read(client, 0x4, fw_ver, sizeof(fw_ver));
+ ps_bridge->info.version = (fw_ver[0] << 8) | fw_ver[1];
+
+ DRM_INFO_ONCE("ps8640 rom fw version %d.%d\n", fw_ver[0], fw_ver[1]);
+}
+
+static int ps8640_bridge_unmute(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE3_DSI_CNTL1];
+ u8 vdo_ctrl_buf[3] = { PAGE3_SET_ADD, VDO_CTL_ADD, VDO_EN };
+
+ return ps8640_write_bytes(client, vdo_ctrl_buf, sizeof(vdo_ctrl_buf));
+}
+
+static int ps8640_bridge_mute(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE3_DSI_CNTL1];
+ u8 vdo_ctrl_buf[3] = { PAGE3_SET_ADD, VDO_CTL_ADD, VDO_DIS };
+
+ return ps8640_write_bytes(client, vdo_ctrl_buf, sizeof(vdo_ctrl_buf));
+}
+
+static void ps8640_pre_enable(struct drm_bridge *bridge)
+{
+ struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+ struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL];
+ struct i2c_client *page1 = ps_bridge->page[PAGE1_VDO_BDG];
+ int err;
+ u8 set_vdo_done, mcs_en, vstart;
+ ktime_t timeout;
+
+ if (ps_bridge->in_fw_update)
+ return;
+
+ if (ps_bridge->enabled)
+ return;
+
+ err = drm_panel_prepare(ps_bridge->panel);
+ if (err < 0) {
+ DRM_ERROR("failed to prepare panel: %d\n", err);
+ return;
+ }
+
+ err = regulator_bulk_enable(ARRAY_SIZE(ps_bridge->supplies),
+ ps_bridge->supplies);
+ if (err < 0) {
+ DRM_ERROR("cannot enable regulators %d\n", err);
+ goto err_panel_unprepare;
+ }
+
+ gpiod_set_value(ps_bridge->gpio_power_down, 1);
+ gpiod_set_value(ps_bridge->gpio_reset, 0);
+ usleep_range(2000, 2500);
+ gpiod_set_value(ps_bridge->gpio_reset, 1);
+
+ /*
+ * Wait for the ps8640 embed mcu ready
+ * First wait 200ms and then check the mcu ready flag every 20ms
+ */
+ msleep(200);
+
+ timeout = ktime_add_ms(ktime_get(), 200);
+ for (;;) {
+ err = ps8640_read(client, PAGE2_GPIO_H, &set_vdo_done, 1);
+ if (err < 0) {
+ DRM_ERROR("failed read PAGE2_GPIO_H: %d\n", err);
+ goto err_regulators_disable;
+ }
+ if ((set_vdo_done & PS_GPIO9) == PS_GPIO9)
+ break;
+ if (ktime_compare(ktime_get(), timeout) > 0)
+ break;
+ msleep(20);
+ }
+
+ msleep(50);
+
+ ps8640_read(page1, PAGE1_VSTART, &vstart, 1);
+ DRM_INFO("PS8640 PAGE1.0x6B = 0x%x\n", vstart);
+
+ /**
+ * The Manufacturer Command Set (MCS) is a device dependent interface
+ * intended for factory programming of the display module default
+ * parameters. Once the display module is configured, the MCS shall be
+ * disabled by the manufacturer. Once disabled, all MCS commands are
+ * ignored by the display interface.
+ */
+ ps8640_read(client, PAGE2_MCS_EN, &mcs_en, 1);
+ ps8640_write_byte(client, PAGE2_MCS_EN, mcs_en & ~MCS_EN);
+
+ if (ps_bridge->info.version == 0)
+ ps8640_get_mcu_fw_version(ps_bridge);
+
+ err = ps8640_bridge_unmute(ps_bridge);
+ if (err)
+ DRM_ERROR("failed to enable unmutevideo: %d\n", err);
+ /* Switch access edp panel's edid through i2c */
+ ps8640_write_byte(client, PAGE2_I2C_BYPASS, I2C_BYPASS_EN);
+ ps_bridge->enabled = true;
+
+ return;
+
+err_regulators_disable:
+ regulator_bulk_disable(ARRAY_SIZE(ps_bridge->supplies),
+ ps_bridge->supplies);
+err_panel_unprepare:
+ drm_panel_unprepare(ps_bridge->panel);
+}
+
+static void ps8640_enable(struct drm_bridge *bridge)
+{
+ struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+ int err;
+
+ err = drm_panel_enable(ps_bridge->panel);
+ if (err < 0)
+ DRM_ERROR("failed to enable panel: %d\n", err);
+}
+
+static void ps8640_disable(struct drm_bridge *bridge)
+{
+ struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+ int err;
+
+ err = drm_panel_disable(ps_bridge->panel);
+ if (err < 0)
+ DRM_ERROR("failed to disable panel: %d\n", err);
+}
+
+static void ps8640_post_disable(struct drm_bridge *bridge)
+{
+ struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+ int err;
+
+ if (ps_bridge->in_fw_update)
+ return;
+
+ if (!ps_bridge->enabled)
+ return;
+
+ ps_bridge->enabled = false;
+
+ err = ps8640_bridge_mute(ps_bridge);
+ if (err < 0)
+ DRM_ERROR("failed to unmutevideo: %d\n", err);
+
+ gpiod_set_value(ps_bridge->gpio_reset, 0);
+ gpiod_set_value(ps_bridge->gpio_power_down, 0);
+ err = regulator_bulk_disable(ARRAY_SIZE(ps_bridge->supplies),
+ ps_bridge->supplies);
+ if (err < 0)
+ DRM_ERROR("cannot disable regulators %d\n", err);
+
+ err = drm_panel_unprepare(ps_bridge->panel);
+ if (err)
+ DRM_ERROR("failed to unprepare panel: %d\n", err);
+}
+
+static int ps8640_get_modes(struct drm_connector *connector)
+{
+ struct ps8640 *ps_bridge = connector_to_ps8640(connector);
+ struct edid *edid;
+ int num_modes = 0;
+ bool power_off;
+
+ if (ps_bridge->edid)
+ return drm_add_edid_modes(connector, ps_bridge->edid);
+
+ power_off = !ps_bridge->enabled;
+ ps8640_pre_enable(&ps_bridge->bridge);
+
+ edid = drm_get_edid(connector, ps_bridge->page[0]->adapter);
+ if (!edid)
+ goto out;
+
+ ps_bridge->edid = edid;
+ drm_mode_connector_update_edid_property(connector, ps_bridge->edid);
+ num_modes = drm_add_edid_modes(connector, ps_bridge->edid);
+
+out:
+ if (power_off)
+ ps8640_post_disable(&ps_bridge->bridge);
+
+ return num_modes;
+}
+
+static const struct drm_connector_helper_funcs ps8640_connector_helper_funcs = {
+ .get_modes = ps8640_get_modes,
+};
+
+static enum drm_connector_status ps8640_detect(struct drm_connector *connector,
+ bool force)
+{
+ return connector_status_connected;
+}
+
+static const struct drm_connector_funcs ps8640_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .detect = ps8640_detect,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+int ps8640_bridge_attach(struct drm_bridge *bridge)
+{
+ struct ps8640 *ps_bridge = bridge_to_ps8640(bridge);
+ struct device *dev = &ps_bridge->page[0]->dev;
+ struct device_node *in_ep, *dsi_node = NULL;
+ struct mipi_dsi_device *dsi;
+ struct mipi_dsi_host *host = NULL;
+ int ret;
+ const struct mipi_dsi_device_info info = { .type = "ps8640",
+ .channel = 0,
+ .node = NULL,
+ };
+
+ ret = drm_connector_init(bridge->dev, &ps_bridge->connector,
+ &ps8640_connector_funcs,
+ DRM_MODE_CONNECTOR_eDP);
+
+ if (ret) {
+ DRM_ERROR("Failed to initialize connector with drm: %d\n", ret);
+ return ret;
+ }
+
+ drm_connector_helper_add(&ps_bridge->connector,
+ &ps8640_connector_helper_funcs);
+
+ ps_bridge->connector.dpms = DRM_MODE_DPMS_ON;
+ drm_mode_connector_attach_encoder(&ps_bridge->connector,
+ bridge->encoder);
+
+ if (ps_bridge->panel)
+ drm_panel_attach(ps_bridge->panel, &ps_bridge->connector);
+
+ /* port@0 is ps8640 dsi input port */
+ in_ep = of_graph_get_endpoint_by_regs(dev->of_node, 0, -1);
+ if (in_ep) {
+ dsi_node = of_graph_get_remote_port_parent(in_ep);
+ of_node_put(in_ep);
+ }
+
+ if (dsi_node) {
+ host = of_find_mipi_dsi_host_by_node(dsi_node);
+ of_node_put(dsi_node);
+ if (!host) {
+ ret = -ENODEV;
+ goto err;
+ }
+ }
+
+ dsi = mipi_dsi_device_register_full(host, &info);
+ if (IS_ERR(dsi)) {
+ dev_err(dev, "failed to create dsi device\n");
+ ret = PTR_ERR(dsi);
+ goto err;
+ }
+
+ ps_bridge->dsi = dsi;
+
+ dsi->host = host;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->lanes = 4;
+ ret = mipi_dsi_attach(dsi);
+ if (ret)
+ goto err_dsi_attach;
+
+ return 0;
+
+err_dsi_attach:
+ mipi_dsi_device_unregister(dsi);
+err:
+ if (ps_bridge->panel)
+ drm_panel_detach(ps_bridge->panel);
+ drm_connector_cleanup(&ps_bridge->connector);
+ return ret;
+}
+
+static const struct drm_bridge_funcs ps8640_bridge_funcs = {
+ .attach = ps8640_bridge_attach,
+ .disable = ps8640_disable,
+ .post_disable = ps8640_post_disable,
+ .pre_enable = ps8640_pre_enable,
+ .enable = ps8640_enable,
+};
+
+/* Firmware Version is returned as Major.Minor */
+static ssize_t ps8640_fw_version_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct ps8640 *ps_bridge = dev_get_drvdata(dev);
+ struct ps8640_info *info = &ps_bridge->info;
+
+ return scnprintf(buf, PAGE_SIZE, "%u.%u\n", info->version >> 8,
+ info->version & 0xff);
+}
+
+/* Hardware Version is returned as FamilyID.VariantID */
+static ssize_t ps8640_hw_version_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct ps8640 *ps_bridge = dev_get_drvdata(dev);
+ struct ps8640_info *info = &ps_bridge->info;
+
+ return scnprintf(buf, PAGE_SIZE, "ps%u.%u\n", info->family_id,
+ info->variant_id);
+}
+
+static int ps8640_spi_send_cmd(struct ps8640 *ps_bridge, u8 *cmd, u8 cmd_len)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL];
+ u8 i, buf[3] = { PAGE2_SWSPI_LEN, cmd_len - 1, TRIGGER_NO_READBACK };
+ int ret;
+
+ ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_ENABLE);
+ if (ret)
+ goto err;
+
+ /* write command in write port */
+ for (i = 0; i < cmd_len; i++) {
+ ret = ps8640_write_byte(client, PAGE2_SWSPI_WDATA, cmd[i]);
+ if (ret)
+ goto err_irom_disable;
+ }
+
+ ret = ps8640_write_bytes(client, buf, sizeof(buf));
+ if (ret)
+ goto err_irom_disable;
+
+ ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
+ if (ret)
+ goto err;
+
+ return 0;
+err_irom_disable:
+ ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
+err:
+ dev_err(&client->dev, "send command err: %d\n", ret);
+ return ret;
+}
+
+static int ps8640_wait_spi_ready(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL];
+ u8 spi_rdy_st;
+ ktime_t timeout;
+
+ timeout = ktime_add_ms(ktime_get(), 200);
+ for (;;) {
+ ps8640_read(client, PAGE2_SPI_STATUS, &spi_rdy_st, 1);
+ if ((spi_rdy_st & SPI_READY) != SPI_READY)
+ break;
+
+ if (ktime_compare(ktime_get(), timeout) > 0) {
+ dev_err(&client->dev, "wait spi ready timeout\n");
+ return -EBUSY;
+ }
+
+ msleep(20);
+ }
+
+ return 0;
+}
+
+static int ps8640_wait_spi_nobusy(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL];
+ u8 spi_status, buf[3] = { PAGE2_SWSPI_LEN, 0, TRIGGER_READBACK };
+ int ret;
+ ktime_t timeout;
+
+ timeout = ktime_add_ms(ktime_get(), 500);
+ for (;;) {
+ /* 0x05 RDSR; Read-Status-Register */
+ ret = ps8640_write_byte(client, PAGE2_SWSPI_WDATA,
+ READ_STATUS_REG_CMD);
+ if (ret)
+ goto err_send_cmd_exit;
+
+ ret = ps8640_write_bytes(client, buf, 3);
+ if (ret)
+ goto err_send_cmd_exit;
+
+ /* delay for cmd send */
+ usleep_range(300, 500);
+ /* wait for SPI ROM until not busy */
+ ret = ps8640_read(client, PAGE2_SWSPI_RDATA, &spi_status, 1);
+ if (ret)
+ goto err_send_cmd_exit;
+
+ if (!(spi_status & BUSY))
+ break;
+
+ if (ktime_compare(ktime_get(), timeout) > 0) {
+ dev_err(&client->dev, "wait spi no busy timeout: %d\n",
+ ret);
+ return -EBUSY;
+ }
+ }
+
+ return 0;
+
+err_send_cmd_exit:
+ dev_err(&client->dev, "send command err: %d\n", ret);
+ return ret;
+}
+
+static int ps8640_wait_rom_idle(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE0_DP_CNTL];
+ int ret;
+
+ ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_ENABLE);
+ if (ret)
+ goto exit;
+
+ ret = ps8640_wait_spi_ready(ps_bridge);
+ if (ret)
+ goto err_spi;
+
+ ret = ps8640_wait_spi_nobusy(ps_bridge);
+ if (ret)
+ goto err_spi;
+
+ ret = ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
+ if (ret)
+ goto exit;
+
+ return 0;
+
+err_spi:
+ ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
+exit:
+ dev_err(&client->dev, "wait ps8640 rom idle fail: %d\n", ret);
+
+ return ret;
+}
+
+static int ps8640_spi_dl_mode(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL];
+ int ret;
+
+ /* switch ps8640 mode to spi dl mode */
+ if (ps_bridge->gpio_mode_sel)
+ gpiod_set_value(ps_bridge->gpio_mode_sel, 0);
+
+ /* reset spi interface */
+ ret = ps8640_write_byte(client, PAGE2_SW_RESET,
+ SPI_SW_RESET | MPU_SW_RESET);
+ if (ret)
+ goto exit;
+
+ ret = ps8640_write_byte(client, PAGE2_SW_RESET, MPU_SW_RESET);
+ if (ret)
+ goto exit;
+
+ return 0;
+
+exit:
+ dev_err(&client->dev, "fail reset spi interface: %d\n", ret);
+
+ return ret;
+}
+
+static int ps8640_rom_prepare(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL];
+ struct device *dev = &client->dev;
+ u8 i, cmd[2];
+ int ret;
+
+ cmd[0] = WRITE_ENABLE_CMD;
+ ret = ps8640_spi_send_cmd(ps_bridge, cmd, 1);
+ if (ret) {
+ dev_err(dev, "failed enable-write-status-register: %d\n", ret);
+ return ret;
+ }
+
+ cmd[0] = WRITE_STATUS_REG_CMD;
+ cmd[1] = CLEAR_ALL_PROTECT;
+ ret = ps8640_spi_send_cmd(ps_bridge, cmd, 2);
+ if (ret) {
+ dev_err(dev, "fail disable all protection: %d\n", ret);
+ return ret;
+ }
+
+ /* wait for SPI module ready */
+ ret = ps8640_wait_rom_idle(ps_bridge);
+ if (ret) {
+ dev_err(dev, "fail wait rom idle: %d\n", ret);
+ return ret;
+ }
+
+ ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_ENABLE);
+ for (i = 0; i < ARRAY_SIZE(enc_ctrl_code); i++)
+ ps8640_write_byte(client, PAGE2_ENCTLSPI_WR, enc_ctrl_code[i]);
+ ps8640_write_byte(client, PAGE2_IROM_CTRL, IROM_DISABLE);
+
+ /* Enable-Write-Status-Register */
+ cmd[0] = WRITE_ENABLE_CMD;
+ ret = ps8640_spi_send_cmd(ps_bridge, cmd, 1);
+ if (ret) {
+ dev_err(dev, "fail enable-write-status-register: %d\n", ret);
+ return ret;
+ }
+
+ /* chip erase command */
+ cmd[0] = CHIP_ERASE_CMD;
+ ret = ps8640_spi_send_cmd(ps_bridge, cmd, 1);
+ if (ret) {
+ dev_err(dev, "fail disable all protection: %d\n", ret);
+ return ret;
+ }
+
+ ret = ps8640_wait_rom_idle(ps_bridge);
+ if (ret) {
+ dev_err(dev, "fail wait rom idle: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ps8640_check_chip_id(struct ps8640 *ps_bridge)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE4_MIPI_PHY];
+ u8 buf[4];
+
+ ps8640_read(client, PAGE4_REV_L, buf, 4);
+ return memcmp(buf, hw_chip_id, sizeof(buf));
+}
+
+static int ps8640_validate_firmware(struct ps8640 *ps_bridge,
+ const struct firmware *fw)
+{
+ struct i2c_client *client = ps_bridge->page[0];
+ u16 fw_chip_id;
+
+ /*
+ * Get the chip_id from the firmware. Make sure that it is the
+ * right controller to do the firmware and config update.
+ */
+ fw_chip_id = get_unaligned_le16(fw->data + FW_CHIP_ID_OFFSET);
+
+ if (fw_chip_id != 0x8640 && ps8640_check_chip_id(ps_bridge) == 0) {
+ dev_err(&client->dev,
+ "chip id mismatch: fw 0x%x vs. chip 0x8640\n",
+ fw_chip_id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int ps8640_write_rom(struct ps8640 *ps_bridge, const struct firmware *fw)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE0_DP_CNTL];
+ struct device *dev = &client->dev;
+ struct i2c_client *client2 = ps_bridge->page[PAGE2_TOP_CNTL];
+ struct i2c_client *client7 = ps_bridge->page[PAGE7_SPI_CNTL];
+ size_t pos, cpy_len;
+ u8 buf[257];
+ int ret;
+
+ ps8640_write_byte(client2, PAGE2_SPI_CFG3, I2C_TO_SPI_RESET);
+ msleep(100);
+ ps8640_write_byte(client2, PAGE2_SPI_CFG3, 0x00);
+
+ for (pos = 0; pos < fw->size; pos += cpy_len) {
+ buf[0] = PAGE2_ROMADD_BYTE1;
+ buf[1] = pos >> 8;
+ buf[2] = pos >> 16;
+ ret = ps8640_write_bytes(client2, buf, 3);
+ if (ret)
+ goto error;
+ cpy_len = fw->size >= 256 + pos ? 256 : fw->size - pos;
+ buf[0] = 0;
+ memcpy(buf + 1, fw->data + pos, cpy_len);
+ ret = ps8640_write_bytes(client7, buf, cpy_len + 1);
+ if (ret)
+ goto error;
+
+ dev_dbg(dev, "fw update completed %zu / %zu bytes\n", pos,
+ fw->size);
+ }
+ return 0;
+
+error:
+ dev_err(dev, "failed write external flash, %d\n", ret);
+ return ret;
+}
+
+static int ps8640_spi_normal_mode(struct ps8640 *ps_bridge)
+{
+ u8 cmd[2];
+ struct i2c_client *client = ps_bridge->page[PAGE2_TOP_CNTL];
+
+ /* Enable-Write-Status-Register */
+ cmd[0] = WRITE_ENABLE_CMD;
+ ps8640_spi_send_cmd(ps_bridge, cmd, 1);
+
+ /* protect BPL/BP0/BP1 */
+ cmd[0] = WRITE_STATUS_REG_CMD;
+ cmd[1] = BLK_PROTECT_BITS | STATUS_REG_PROTECT;
+ ps8640_spi_send_cmd(ps_bridge, cmd, 2);
+
+ /* wait for SPI rom ready */
+ ps8640_wait_rom_idle(ps_bridge);
+
+ /* disable PS8640 mapping function */
+ ps8640_write_byte(client, PAGE2_ENCTLSPI_WR, 0x00);
+
+ if (ps_bridge->gpio_mode_sel)
+ gpiod_set_value(ps_bridge->gpio_mode_sel, 1);
+ return 0;
+}
+
+static int ps8640_enter_bl(struct ps8640 *ps_bridge)
+{
+ ps_bridge->in_fw_update = true;
+ return ps8640_spi_dl_mode(ps_bridge);
+}
+
+static void ps8640_exit_bl(struct ps8640 *ps_bridge, const struct firmware *fw)
+{
+ ps8640_spi_normal_mode(ps_bridge);
+ ps_bridge->in_fw_update = false;
+}
+
+static int ps8640_load_fw(struct ps8640 *ps_bridge, const struct firmware *fw)
+{
+ struct i2c_client *client = ps_bridge->page[PAGE0_DP_CNTL];
+ struct device *dev = &client->dev;
+ int ret;
+ bool ps8640_status_backup = ps_bridge->enabled;
+
+ ret = ps8640_validate_firmware(ps_bridge, fw);
+ if (ret)
+ return ret;
+
+ mutex_lock(&ps_bridge->fw_mutex);
+ if (!ps_bridge->in_fw_update) {
+ if (!ps8640_status_backup)
+ ps8640_pre_enable(&ps_bridge->bridge);
+
+ ret = ps8640_enter_bl(ps_bridge);
+ if (ret)
+ goto exit;
+ }
+
+ ret = ps8640_rom_prepare(ps_bridge);
+ if (ret)
+ goto exit;
+
+ ret = ps8640_write_rom(ps_bridge, fw);
+
+exit:
+ if (ret)
+ dev_err(dev, "Failed to load firmware, %d\n", ret);
+
+ ps8640_exit_bl(ps_bridge, fw);
+ if (!ps8640_status_backup)
+ ps8640_post_disable(&ps_bridge->bridge);
+ mutex_unlock(&ps_bridge->fw_mutex);
+ return ret;
+}
+
+static ssize_t ps8640_update_fw_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct ps8640 *ps_bridge = i2c_get_clientdata(client);
+ const struct firmware *fw;
+ int error;
+
+ error = request_firmware(&fw, PS_FW_NAME, dev);
+ if (error) {
+ dev_err(dev, "Unable to open firmware %s: %d\n",
+ PS_FW_NAME, error);
+ return error;
+ }
+
+ error = ps8640_load_fw(ps_bridge, fw);
+ if (error)
+ dev_err(dev, "The firmware update failed(%d)\n", error);
+ else
+ dev_info(dev, "The firmware update succeeded\n");
+
+ release_firmware(fw);
+ return error ? error : count;
+}
+
+static DEVICE_ATTR(fw_version, S_IRUGO, ps8640_fw_version_show, NULL);
+static DEVICE_ATTR(hw_version, S_IRUGO, ps8640_hw_version_show, NULL);
+static DEVICE_ATTR(update_fw, S_IWUSR, NULL, ps8640_update_fw_store);
+
+static struct attribute *ps8640_attrs[] = {
+ &dev_attr_fw_version.attr,
+ &dev_attr_hw_version.attr,
+ &dev_attr_update_fw.attr,
+ NULL
+};
+
+static const struct attribute_group ps8640_attr_group = {
+ .attrs = ps8640_attrs,
+};
+
+static void ps8640_remove_sysfs_group(void *data)
+{
+ struct ps8640 *ps_bridge = data;
+
+ sysfs_remove_group(&ps_bridge->page[0]->dev.kobj, &ps8640_attr_group);
+}
+
+static int ps8640_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ struct ps8640 *ps_bridge;
+ struct device_node *np = dev->of_node;
+ struct device_node *port, *out_ep;
+ struct device_node *panel_node = NULL;
+ int ret;
+ u32 i;
+
+ ps_bridge = devm_kzalloc(dev, sizeof(*ps_bridge), GFP_KERNEL);
+ if (!ps_bridge)
+ return -ENOMEM;
+
+ /* port@1 is ps8640 output port */
+ port = of_graph_get_port_by_id(np, 1);
+ if (port) {
+ out_ep = of_get_child_by_name(port, "endpoint");
+ of_node_put(port);
+ if (out_ep) {
+ panel_node = of_graph_get_remote_port_parent(out_ep);
+ of_node_put(out_ep);
+ }
+ }
+ if (panel_node) {
+ ps_bridge->panel = of_drm_find_panel(panel_node);
+ of_node_put(panel_node);
+ if (!ps_bridge->panel)
+ return -EPROBE_DEFER;
+ }
+
+ mutex_init(&ps_bridge->fw_mutex);
+ ps_bridge->supplies[0].supply = "vdd33";
+ ps_bridge->supplies[1].supply = "vdd12";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ps_bridge->supplies),
+ ps_bridge->supplies);
+ if (ret) {
+ dev_info(dev, "failed to get regulators: %d\n", ret);
+ return ret;
+ }
+
+ ps_bridge->gpio_mode_sel = devm_gpiod_get_optional(&client->dev,
+ "mode-sel",
+ GPIOD_OUT_HIGH);
+ if (IS_ERR(ps_bridge->gpio_mode_sel)) {
+ ret = PTR_ERR(ps_bridge->gpio_mode_sel);
+ dev_err(dev, "cannot get mode-sel %d\n", ret);
+ return ret;
+ }
+
+ ps_bridge->gpio_power_down = devm_gpiod_get(&client->dev, "sleep",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(ps_bridge->gpio_power_down)) {
+ ret = PTR_ERR(ps_bridge->gpio_power_down);
+ dev_err(dev, "cannot get sleep: %d\n", ret);
+ return ret;
+ }
+
+ /*
+ * Request the reset pin low to avoid the bridge being
+ * initialized prematurely
+ */
+ ps_bridge->gpio_reset = devm_gpiod_get(&client->dev, "reset",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(ps_bridge->gpio_reset)) {
+ ret = PTR_ERR(ps_bridge->gpio_reset);
+ dev_err(dev, "cannot get reset: %d\n", ret);
+ return ret;
+ }
+
+ ps_bridge->bridge.funcs = &ps8640_bridge_funcs;
+ ps_bridge->bridge.of_node = dev->of_node;
+
+ ps_bridge->page[0] = client;
+
+ /*
+ * ps8640 uses multiple addresses, use dummy devices for them
+ * page[0]: for DP control
+ * page[1]: for VIDEO Bridge
+ * page[2]: for control top
+ * page[3]: for DSI Link Control1
+ * page[4]: for MIPI Phy
+ * page[5]: for VPLL
+ * page[6]: for DSI Link Control2
+ * page[7]: for spi rom mapping
+ */
+ for (i = 1; i < MAX_DEVS; i++) {
+ ps_bridge->page[i] = i2c_new_dummy(client->adapter,
+ client->addr + i);
+ if (!ps_bridge->page[i]) {
+ dev_err(dev, "failed i2c dummy device, address%02x\n",
+ client->addr + i);
+ ret = -EBUSY;
+ goto exit_dummy;
+ }
+ }
+ i2c_set_clientdata(client, ps_bridge);
+
+ ret = sysfs_create_group(&client->dev.kobj, &ps8640_attr_group);
+ if (ret) {
+ dev_err(dev, "failed to create sysfs entries: %d\n", ret);
+ goto exit_dummy;
+ }
+
+ ret = devm_add_action(dev, ps8640_remove_sysfs_group, ps_bridge);
+ if (ret) {
+ dev_err(dev, "failed to add sysfs cleanup action: %d\n", ret);
+ goto exit_remove_sysfs;
+ }
+
+ ret = drm_bridge_add(&ps_bridge->bridge);
+ if (ret) {
+ dev_err(dev, "Failed to add bridge: %d\n", ret);
+ goto exit_remove_sysfs;
+ }
+ return 0;
+
+exit_remove_sysfs:
+ sysfs_remove_group(&ps_bridge->page[0]->dev.kobj, &ps8640_attr_group);
+exit_dummy:
+ while (--i)
+ i2c_unregister_device(ps_bridge->page[i]);
+ return ret;
+}
+
+static int ps8640_remove(struct i2c_client *client)
+{
+ struct ps8640 *ps_bridge = i2c_get_clientdata(client);
+ int i = MAX_DEVS;
+
+ drm_bridge_remove(&ps_bridge->bridge);
+ sysfs_remove_group(&ps_bridge->page[0]->dev.kobj, &ps8640_attr_group);
+ while (--i)
+ i2c_unregister_device(ps_bridge->page[i]);
+
+ return 0;
+}
+
+static const struct i2c_device_id ps8640_i2c_table[] = {
+ { "ps8640", 0 },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(i2c, ps8640_i2c_table);
+
+static const struct of_device_id ps8640_match[] = {
+ { .compatible = "parade,ps8640" },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ps8640_match);
+
+static struct i2c_driver ps8640_driver = {
+ .id_table = ps8640_i2c_table,
+ .probe = ps8640_probe,
+ .remove = ps8640_remove,
+ .driver = {
+ .name = "ps8640",
+ .of_match_table = ps8640_match,
+ },
+};
+module_i2c_driver(ps8640_driver);
+
+MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>");
+MODULE_AUTHOR("CK Hu <ck.hu@mediatek.com>");
+MODULE_DESCRIPTION("PARADE ps8640 DSI-eDP converter driver");
+MODULE_LICENSE("GPL v2");
--
1.7.9.5
^ permalink raw reply related
* [PATCH v18 1/2] Documentation: bridge: Add documentation for ps8640 DT properties
From: Jitao Shi @ 2016-11-14 13:41 UTC (permalink / raw)
To: David Airlie, Thierry Reding, Matthias Brugger
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Jitao Shi, Ajay Kumar, Inki Dae, Rahul Sharma, Sean Paul,
Vincent Palatin, Andy Yan, Philipp Zabel, Russell King,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
srv_heupstream-NuS5LvNUpcJWk0Htik3J/w
Add documentation for DT properties supported by
ps8640 DSI-eDP converter.
Signed-off-by: Jitao Shi <jitao.shi-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Reviewed-by: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
Changes since v17:
- No change.
Changes since v16:
- No change.
Changes since v15:
- No change.
Changes since v14:
- change mode-sel-gpios as optional.
---
.../devicetree/bindings/display/bridge/ps8640.txt | 44 ++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/ps8640.txt
diff --git a/Documentation/devicetree/bindings/display/bridge/ps8640.txt b/Documentation/devicetree/bindings/display/bridge/ps8640.txt
new file mode 100644
index 0000000..7b13f92
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/ps8640.txt
@@ -0,0 +1,44 @@
+ps8640-bridge bindings
+
+Required properties:
+ - compatible: "parade,ps8640"
+ - reg: first page address of the bridge.
+ - sleep-gpios: OF device-tree gpio specification for PD pin.
+ - reset-gpios: OF device-tree gpio specification for reset pin.
+ - vdd12-supply: OF device-tree regulator specification for 1.2V power.
+ - vdd33-supply: OF device-tree regulator specification for 3.3V power.
+ - ports: The device node can contain video interface port nodes per
+ the video-interfaces bind[1]. For port@0,set the reg = <0> as
+ ps8640 dsi in and port@1,set the reg = <1> as ps8640 eDP out.
+
+Optional properties:
+ - mode-sel-gpios: OF device-tree gpio specification for mode-sel pin.
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+ edp-bridge@18 {
+ compatible = "parade,ps8640";
+ reg = <0x18>;
+ sleep-gpios = <&pio 116 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
+ mode-sel-gpios = <&pio 92 GPIO_ACTIVE_HIGH>;
+ vdd12-supply = <&ps8640_fixed_1v2>;
+ vdd33-supply = <&mt6397_vgp2_reg>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ ps8640_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+ port@1 {
+ reg = <1>;
+ ps8640_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+ };
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH 1/1] ARM: dts: enable GPIO-b for Broadcom NSP
From: Yendapally Reddy Dhananjaya Reddy @ 2016-11-14 13:30 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Russell King, Ray Jui, Scott Branden,
Jon Mason
Cc: bcm-kernel-feedback-list, devicetree, linux-arm-kernel,
linux-kernel, Yendapally Reddy Dhananjaya Reddy
This enables the GPIO-b support for Broadcom NSP SoC
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 7c9e0fa..2f699a0 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -241,6 +241,16 @@
brcm,nand-has-wp;
};
+ gpiob: gpio@30000 {
+ compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
+ reg = <0x30000 0x50>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ ngpios = <4>;
+ interrupt-controller;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
pwm: pwm@31000 {
compatible = "brcm,iproc-pwm";
reg = <0x31000 0x28>;
--
2.1.0
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox