* [PATCH v5 2/2] ARM: dts: da850-lcdk: Enable the usb otg device node
From: Alexandre Bailon @ 2016-11-16 11:07 UTC (permalink / raw)
To: khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel, nsekhar,
Alexandre Bailon
In-Reply-To: <1479294456-7942-1-git-send-email-abailon@baylibre.com>
This enables the usb otg controller for the lcdk board.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
---
arch/arm/boot/dts/da850-lcdk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index 7b8ab21..03f9bfd 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -158,6 +158,14 @@
rx-num-evt = <32>;
};
+&usb_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
&aemif {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
--
2.7.3
^ permalink raw reply related
* [PATCH v5 1/2] ARM: dts: da850: Add the usb otg device node
From: Alexandre Bailon @ 2016-11-16 11:07 UTC (permalink / raw)
To: khilman-rdvid1DuHRBWk0Htik3J/w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
b-liu-l0cyMroinI0
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
nsekhar-l0cyMroinI0, Alexandre Bailon
In-Reply-To: <1479294456-7942-1-git-send-email-abailon-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
This adds the device tree node for the usb otg
controller present in the da850 family of SoC's.
Signed-off-by: Alexandre Bailon <abailon-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
---
arch/arm/boot/dts/da850.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 2534aab..ddf4c6e 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -383,6 +383,16 @@
dma-names = "rx", "tx";
status = "disabled";
};
+ usb0: usb@200000 {
+ compatible = "ti,da830-musb";
+ reg = <0x200000 0x10000>;
+ interrupts = <58>;
+ interrupt-names = "mc";
+ dr_mode = "otg";
+ phys = <&usb_phy 0>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
mdio: mdio@224000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
--
2.7.3
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^ permalink raw reply related
* [PATCH v5 0/2] platform: Add DT support for DA8xx
From: Alexandre Bailon @ 2016-11-16 11:07 UTC (permalink / raw)
To: khilman-rdvid1DuHRBWk0Htik3J/w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
b-liu-l0cyMroinI0
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
nsekhar-l0cyMroinI0, Alexandre Bailon
This add and enable the usb otg for da850 and da850-lcdk.
This series depends on "driver: dd DT support for DA8xx" patch set.
If this series is applied before the "usb: musb: da8xx: Fix few issues" patch
set then the usb driver will always retrun -ENODEV.
Changes in v2:
* Remove unrelated changes in patch 3
* Rename the device node in patch 4
Changes in v3:
* Fix few mistakes in DT binding sample
* Only build the device table if DT is enabled
Change in v4:
* Fix a nit
Changes in v5:
* Remove usb_phy node from d850.dtsi because it has already been merged.
* Separated the patch in two: one for the board and one for the SoC.
Alexandre Bailon (2):
ARM: dts: da850: Add the usb otg device node
ARM: dts: da850-lcdk: Enable the usb otg device node
arch/arm/boot/dts/da850-lcdk.dts | 8 ++++++++
arch/arm/boot/dts/da850.dtsi | 10 ++++++++++
2 files changed, 18 insertions(+)
--
2.7.3
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^ permalink raw reply
* [PATCH v5 3/3] usb: musb: da8xx: Add DT support for the DA8xx driver
From: Alexandre Bailon @ 2016-11-16 10:52 UTC (permalink / raw)
To: khilman-rdvid1DuHRBWk0Htik3J/w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
b-liu-l0cyMroinI0
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
nsekhar-l0cyMroinI0, Petr Kulhavy, Alexandre Bailon
In-Reply-To: <1479293545-7516-1-git-send-email-abailon-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
From: Petr Kulhavy <petr-Qh/3xLP0EvwAvxtiuMwx3w@public.gmane.org>
This adds DT support for TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver
Signed-off-by: Petr Kulhavy <petr-Qh/3xLP0EvwAvxtiuMwx3w@public.gmane.org>
Signed-off-by: Alexandre Bailon <abailon-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Tested-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
---
drivers/usb/musb/da8xx.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c
index 2440f88..f205a03 100644
--- a/drivers/usb/musb/da8xx.c
+++ b/drivers/usb/musb/da8xx.c
@@ -6,6 +6,9 @@
* Based on the DaVinci "glue layer" code.
* Copyright (C) 2005-2006 by Texas Instruments
*
+ * DT support
+ * Copyright (c) 2016 Petr Kulhavy <petr-Qh/3xLP0EvwAvxtiuMwx3w@public.gmane.org>
+ *
* This file is part of the Inventra Controller Driver for Linux.
*
* The Inventra Controller Driver for Linux is free software; you
@@ -433,6 +436,21 @@ static int da8xx_musb_exit(struct musb *musb)
return 0;
}
+static inline u8 get_vbus_power(struct device *dev)
+{
+ struct regulator *vbus_supply;
+ int current_uA;
+
+ vbus_supply = regulator_get_optional(dev, "vbus");
+ if (IS_ERR(vbus_supply))
+ return 255;
+ current_uA = regulator_get_current_limit(vbus_supply);
+ regulator_put(vbus_supply);
+ if (current_uA <= 0 || current_uA > 510000)
+ return 255;
+ return current_uA / 1000 / 2;
+}
+
static const struct musb_platform_ops da8xx_ops = {
.quirks = MUSB_DMA_CPPI | MUSB_INDEXED_EP,
.init = da8xx_musb_init,
@@ -458,6 +476,12 @@ static const struct platform_device_info da8xx_dev_info = {
.dma_mask = DMA_BIT_MASK(32),
};
+static const struct musb_hdrc_config da8xx_config = {
+ .ram_bits = 10,
+ .num_eps = 5,
+ .multipoint = 1,
+};
+
static int da8xx_probe(struct platform_device *pdev)
{
struct resource musb_resources[2];
@@ -465,6 +489,7 @@ static int da8xx_probe(struct platform_device *pdev)
struct da8xx_glue *glue;
struct platform_device_info pinfo;
struct clk *clk;
+ struct device_node *np = pdev->dev.of_node;
int ret;
glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
@@ -487,6 +512,16 @@ static int da8xx_probe(struct platform_device *pdev)
glue->dev = &pdev->dev;
glue->clk = clk;
+ if (IS_ENABLED(CONFIG_OF) && np) {
+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ pdata->config = &da8xx_config;
+ pdata->mode = musb_get_mode(&pdev->dev);
+ pdata->power = get_vbus_power(&pdev->dev);
+ }
+
pdata->platform_ops = &da8xx_ops;
glue->usb_phy = usb_phy_generic_register();
@@ -537,11 +572,22 @@ static int da8xx_remove(struct platform_device *pdev)
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id da8xx_id_table[] = {
+ {
+ .compatible = "ti,da830-musb",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, da8xx_id_table);
+#endif
+
static struct platform_driver da8xx_driver = {
.probe = da8xx_probe,
.remove = da8xx_remove,
.driver = {
.name = "musb-da8xx",
+ .of_match_table = of_match_ptr(da8xx_id_table),
},
};
--
2.7.3
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^ permalink raw reply related
* [PATCH v5 2/3] usb: musb: core: added helper function for parsing DT
From: Alexandre Bailon @ 2016-11-16 10:52 UTC (permalink / raw)
To: khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel, nsekhar,
Petr Kulhavy, Alexandre Bailon
In-Reply-To: <1479293545-7516-1-git-send-email-abailon@baylibre.com>
From: Petr Kulhavy <petr@barix.com>
This adds the function musb_get_mode() to get the DT property "dr_mode"
Signed-off-by: Petr Kulhavy <petr@barix.com>
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Tested-by: David Lechner <david@lechnology.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
---
drivers/usb/musb/musb_core.c | 19 +++++++++++++++++++
drivers/usb/musb/musb_core.h | 6 ++++++
2 files changed, 25 insertions(+)
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index e01116e..9b44566 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -100,6 +100,7 @@
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/usb.h>
+#include <linux/usb/of.h>
#include "musb_core.h"
#include "musb_trace.h"
@@ -130,6 +131,24 @@ static inline struct musb *dev_to_musb(struct device *dev)
return dev_get_drvdata(dev);
}
+enum musb_mode musb_get_mode(struct device *dev)
+{
+ enum usb_dr_mode mode;
+
+ mode = usb_get_dr_mode(dev);
+ switch (mode) {
+ case USB_DR_MODE_HOST:
+ return MUSB_HOST;
+ case USB_DR_MODE_PERIPHERAL:
+ return MUSB_PERIPHERAL;
+ case USB_DR_MODE_OTG:
+ case USB_DR_MODE_UNKNOWN:
+ default:
+ return MUSB_OTG;
+ }
+}
+EXPORT_SYMBOL_GPL(musb_get_mode);
+
/*-------------------------------------------------------------------------*/
#ifndef CONFIG_BLACKFIN
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 2cb88a49..76f00f6 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -617,4 +617,10 @@ static inline void musb_platform_post_root_reset_end(struct musb *musb)
musb->ops->post_root_reset_end(musb);
}
+/*
+ * gets the "dr_mode" property from DT and converts it into musb_mode
+ * if the property is not found or not recognized returns MUSB_OTG
+ */
+extern enum musb_mode musb_get_mode(struct device *dev);
+
#endif /* __MUSB_CORE_H__ */
--
2.7.3
^ permalink raw reply related
* [PATCH v5 1/3] dt/bindings: Add binding for the DA8xx MUSB driver
From: Alexandre Bailon @ 2016-11-16 10:52 UTC (permalink / raw)
To: khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel, nsekhar,
Petr Kulhavy, Alexandre Bailon
In-Reply-To: <1479293545-7516-1-git-send-email-abailon@baylibre.com>
From: Petr Kulhavy <petr@barix.com>
DT binding for the TI DA8xx/OMAP-L1x/AM17xx/AM18xx MUSB driver.
Signed-off-by: Petr Kulhavy <petr@barix.com>
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/usb/da8xx-usb.txt | 43 ++++++++++++++++++++++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/da8xx-usb.txt
diff --git a/Documentation/devicetree/bindings/usb/da8xx-usb.txt b/Documentation/devicetree/bindings/usb/da8xx-usb.txt
new file mode 100644
index 0000000..ccb844a
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/da8xx-usb.txt
@@ -0,0 +1,43 @@
+TI DA8xx MUSB
+~~~~~~~~~~~~~
+For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
+
+Required properties:
+~~~~~~~~~~~~~~~~~~~~
+ - compatible : Should be set to "ti,da830-musb".
+
+ - reg: Offset and length of the USB controller register set.
+
+ - interrupts: The USB interrupt number.
+
+ - interrupt-names: Should be set to "mc".
+
+ - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg".
+
+ - phys: Phandle for the PHY device
+
+ - phy-names: Should be "usb-phy"
+
+Optional properties:
+~~~~~~~~~~~~~~~~~~~~
+ - vbus-supply: Phandle to a regulator providing the USB bus power.
+
+Example:
+ usb_phy: usb-phy {
+ compatible = "ti,da830-usb-phy";
+ #phy-cells = <0>;
+ status = "okay";
+ };
+ usb0: usb@200000 {
+ compatible = "ti,da830-musb";
+ reg = <0x00200000 0x10000>;
+ interrupts = <58>;
+ interrupt-names = "mc";
+
+ dr_mode = "host";
+ vbus-supply = <&usb_vbus>;
+ phys = <&usb_phy 0>;
+ phy-names = "usb-phy";
+
+ status = "okay";
+ };
--
2.7.3
^ permalink raw reply related
* [PATCH v5 0/3] driver: Add DT support for DA8xx
From: Alexandre Bailon @ 2016-11-16 10:52 UTC (permalink / raw)
To: khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel, nsekhar,
Alexandre Bailon
Changes in v2:
* Remove unrelated changes in patch 3
* Rename the device node in patch 4
Changes in v3:
* Fix few mistakes in DT binding sample
* Only build the device table if DT is enabled
Change in v4:
* Fix a nit
Changes in v5:
* Nothing. Resent the v4 in two seppaated series: one for platform and one for
driver.
Petr Kulhavy (3):
dt/bindings: Add binding for the DA8xx MUSB driver
usb: musb: core: added helper function for parsing DT
usb: musb: da8xx: Add DT support for the DA8xx driver
.../devicetree/bindings/usb/da8xx-usb.txt | 43 ++++++++++++++++++++
drivers/usb/musb/da8xx.c | 46 ++++++++++++++++++++++
drivers/usb/musb/musb_core.c | 19 +++++++++
drivers/usb/musb/musb_core.h | 6 +++
4 files changed, 114 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/da8xx-usb.txt
--
2.7.3
^ permalink raw reply
* Re: [PATCH v4 4/4] ARM: dts: da850: Add the usb otg device node
From: Alexandre Bailon @ 2016-11-16 10:47 UTC (permalink / raw)
To: Sekhar Nori, khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel
In-Reply-To: <d4c8da0e-d66d-1268-78e5-d994399c9166@ti.com>
On 11/16/2016 11:41 AM, Sekhar Nori wrote:
> On Wednesday 16 November 2016 04:05 PM, Alexandre Bailon wrote:
>> On 11/15/2016 11:46 AM, Sekhar Nori wrote:
>>> On Thursday 03 November 2016 09:29 PM, Alexandre Bailon wrote:
>>>> This adds the device tree node for the usb otg
>>>> controller present in the da850 family of SoC's.
>>>> This also enables the otg usb controller for the lcdk board.
>>>>
>>>> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
>>>> ---
>>>> arch/arm/boot/dts/da850-lcdk.dts | 8 ++++++++
>>>> arch/arm/boot/dts/da850.dtsi | 15 +++++++++++++++
>>>> 2 files changed, 23 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
>>>> index 7b8ab21..9f5040c 100644
>>>> --- a/arch/arm/boot/dts/da850-lcdk.dts
>>>> +++ b/arch/arm/boot/dts/da850-lcdk.dts
>>>> @@ -158,6 +158,14 @@
>>>> rx-num-evt = <32>;
>>>> };
>>>>
>>>> +&usb_phy {
>>>> + status = "okay";
>>>> + };
>>>
>>> As mentioned by David already, this node needs to be removed. Please
>
>> I have missed it. But why should I remove it?
>> Without it, usb otg won't work.
>
> Grr, I replied to the wrong hunk. The part in da850-lcdk.dts needs to be
> preserved (but please fix the indentation on the closing brace).
OK. Thanks for the confirmation.
>
> The part in da850.dtsi needs to be removed as it is already merged.
>
> Thanks,
> Sekhar
>
^ permalink raw reply
* Re: [PATCH v4 4/4] ARM: dts: da850: Add the usb otg device node
From: Sekhar Nori @ 2016-11-16 10:41 UTC (permalink / raw)
To: Alexandre Bailon, khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel
In-Reply-To: <d2050c80-255e-25d6-99ba-7634f2c7e39a@baylibre.com>
On Wednesday 16 November 2016 04:05 PM, Alexandre Bailon wrote:
> On 11/15/2016 11:46 AM, Sekhar Nori wrote:
>> On Thursday 03 November 2016 09:29 PM, Alexandre Bailon wrote:
>>> This adds the device tree node for the usb otg
>>> controller present in the da850 family of SoC's.
>>> This also enables the otg usb controller for the lcdk board.
>>>
>>> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
>>> ---
>>> arch/arm/boot/dts/da850-lcdk.dts | 8 ++++++++
>>> arch/arm/boot/dts/da850.dtsi | 15 +++++++++++++++
>>> 2 files changed, 23 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
>>> index 7b8ab21..9f5040c 100644
>>> --- a/arch/arm/boot/dts/da850-lcdk.dts
>>> +++ b/arch/arm/boot/dts/da850-lcdk.dts
>>> @@ -158,6 +158,14 @@
>>> rx-num-evt = <32>;
>>> };
>>>
>>> +&usb_phy {
>>> + status = "okay";
>>> + };
>>
>> As mentioned by David already, this node needs to be removed. Please
> I have missed it. But why should I remove it?
> Without it, usb otg won't work.
Grr, I replied to the wrong hunk. The part in da850-lcdk.dts needs to be
preserved (but please fix the indentation on the closing brace).
The part in da850.dtsi needs to be removed as it is already merged.
Thanks,
Sekhar
^ permalink raw reply
* Re: [PATCH v4 4/4] ARM: dts: da850: Add the usb otg device node
From: Alexandre Bailon @ 2016-11-16 10:35 UTC (permalink / raw)
To: Sekhar Nori, khilman, robh+dt, b-liu
Cc: linux-kernel, linux-usb, devicetree, linux-arm-kernel
In-Reply-To: <0c94c5e0-9d2c-fff5-1213-2fb2adb20ab0@ti.com>
On 11/15/2016 11:46 AM, Sekhar Nori wrote:
> On Thursday 03 November 2016 09:29 PM, Alexandre Bailon wrote:
>> This adds the device tree node for the usb otg
>> controller present in the da850 family of SoC's.
>> This also enables the otg usb controller for the lcdk board.
>>
>> Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
>> ---
>> arch/arm/boot/dts/da850-lcdk.dts | 8 ++++++++
>> arch/arm/boot/dts/da850.dtsi | 15 +++++++++++++++
>> 2 files changed, 23 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
>> index 7b8ab21..9f5040c 100644
>> --- a/arch/arm/boot/dts/da850-lcdk.dts
>> +++ b/arch/arm/boot/dts/da850-lcdk.dts
>> @@ -158,6 +158,14 @@
>> rx-num-evt = <32>;
>> };
>>
>> +&usb_phy {
>> + status = "okay";
>> + };
>
> As mentioned by David already, this node needs to be removed. Please
I have missed it. But why should I remove it?
Without it, usb otg won't work.
> rebase this on top of latest linux-davinci/master when ready for merging
> (driver changes accepted).
>
>> +
>> +&usb0 {
>> + status = "okay";
>> +};
>> +
>> &aemif {
>> pinctrl-names = "default";
>> pinctrl-0 = <&nand_pins>;
>> diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
>> index f79e1b9..322a31a 100644
>> --- a/arch/arm/boot/dts/da850.dtsi
>> +++ b/arch/arm/boot/dts/da850.dtsi
>> @@ -372,6 +372,21 @@
>> >;
>> status = "disabled";
>> };
>> + usb_phy: usb-phy {
>> + compatible = "ti,da830-usb-phy";
>> + #phy-cells = <1>;
>> + status = "disabled";
>> + };
>> + usb0: usb@200000 {
>> + compatible = "ti,da830-musb";
>> + reg = <0x200000 0x10000>;
>> + interrupts = <58>;
>> + interrupt-names = "mc";
>> + dr_mode = "otg";
>> + phys = <&usb_phy 0>;
>> + phy-names = "usb-phy";
>> + status = "disabled";
>> + };
>
> Can you separate out the soc specific changes from board changes? Please
> place the usb0 node above the mdio node. I am trying to get to a rough
> ordering based on reg property.
I will do.
>
> Thanks,
> Sekhar
>
Thanks,
Alexandre
^ permalink raw reply
* Re: [PATCH net 1/3] net: phy: realtek: add eee advertisement disable options
From: Jerome Brunet @ 2016-11-16 9:56 UTC (permalink / raw)
To: Florian Fainelli, Andrew Lunn
Cc: netdev, devicetree, Carlo Caione, Kevin Hilman,
Giuseppe Cavallaro, Alexandre TORGUE, Martin Blumenstingl,
Andre Roth, Neil Armstrong, linux-amlogic, linux-arm-kernel,
linux-kernel
In-Reply-To: <476b72f3-5efe-3551-6c24-0e378d655a0f@gmail.com>
On Tue, 2016-11-15 at 09:03 -0800, Florian Fainelli wrote:
> On 11/15/2016 08:30 AM, Andrew Lunn wrote:
> >
> > On Tue, Nov 15, 2016 at 03:29:12PM +0100, Jerome Brunet wrote:
> > >
> > > On some platforms, energy efficient ethernet with rtl8211 devices
> > > is
> > > causing issue, like throughput drop or broken link.
> > >
> > > This was reported on the OdroidC2 (DWMAC + RTL8211F). While the
> > > issue root
> > > cause is not fully understood yet, disabling EEE advertisement
> > > prevent auto
> > > negotiation from enabling EEE.
> > >
> > > This patch provides options to disable 1000T and 100TX EEE
> > > advertisement
> > > individually for the realtek phys supporting this feature.
> >
> > Looking at the code, i don't see anything specific to RealTek
> > here. This all seems generic. So should it be in phy.c and made a
> > generic OF property which can be applied to any PHY which supports
> > EEE.
>
> Agreed.
Good point, Thanks for pointing this out.
> Just to be sure, Jerome, you did verify that with EEE no longer
> advertised, ethtool --set-eee fails, right? The point is that you may
> be
> able to disable EEE on boot, but if there is a way to re-enable it
> later
> on, we would want to disable that too.
I was focused on getting the issue out of way I did not think that
someone could try something like this :)
I just tried and it is possible to re-enable eee, though it is not
simplest thing to do: using ethtool enable eee advertisement, enable
eee, restart the autonegotiation without bringing the interface down
(otherwise the phy config kicks and disable eee again). I reckon this
is not good and I need to address this.
There two kind of PHYs supporting eee, the one advertising eee by
default (like realtek) and the one not advertising it (like micrel).
If the property is going to be generic, I see two options and I'd like
your view on this:
1) The DT provided value could be seen as "preferred" (or boot
setting), which can be cleanly changed with ethtool later on. In this
case, I guess I need to provide a way to force eee advertisement as
well to be consistent.
2) The DT provided value could forbid the advertisement of eee. In this
case I need to return an error if ethtool tries to re-enable it. Phy
with eee advertisement off by default (and not forbidden) would still
need to activate it manually with ethtool after boot. I don't see why
someone would absolutely want eee activated at boot time so I guess
this is OK.
Do you have a preference ?
Thanks for this quick feedback !
Cheers
Jerome
^ permalink raw reply
* [PATCH v5] pwm: add pwm driver for HiSilicon BVT SOCs
From: Jian Yuan @ 2016-11-16 9:50 UTC (permalink / raw)
To: thierry.reding, robh+dt, mark.rutland
Cc: linux-pwm, devicetree, linux-kernel, xuejiancheng, kevin.lixu,
jalen.hsu, yuanjian
From: yuanjian <yuanjian12@hisilicon.com>
Add PWM driver for the PWM controller found on HiSilicon BVT SOCs, like Hi3519V100, Hi3516CV300, etc.
The PWM controller is primarily in charge of controlling P-Iris lens.
Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Jian Yuan <yuanjian12@hisilicon.com>
---
Change Log:
v5:
remove the generic compatible string "hisilicon, hibvt-pwm".
v4:
Add #pwm-cells in the bindings document.
v3:
fixed issues pointed by thierry.
Add PWM compatible string for Hi3519V100.
Implement .apply() function which support atomic, instead of .enable()/.disable()/.config().
v2:
The number of PWMs is change to be probeable based on the compatible string.
.../devicetree/bindings/pwm/pwm-hibvt.txt | 22 ++
drivers/pwm/Kconfig | 9 +
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-hibvt.c | 269 +++++++++++++++++++++
4 files changed, 301 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
create mode 100644 drivers/pwm/pwm-hibvt.c
diff --git a/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
new file mode 100644
index 0000000..fe63950
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
@@ -0,0 +1,22 @@
+Hisilicon PWM controller
+
+Required properties:
+-compatible: should contain one SoC specific compatible string
+ The SoC specific strings supported including:
+ "hisilicon,hi3516cv300-pwm"
+ "hisilicon,hi3519v100-pwm"
+- reg: physical base address and length of the controller's registers.
+- clocks: phandle and clock specifier of the PWM reference clock.
+- resets: phandle and reset specifier for the PWM controller reset.
+- #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
+ the cells format.
+
+Example:
+ pwm: pwm@12130000 {
+
+ compatible = "hisilicon,hi3516cv300-pwm";
+ reg = <0x12130000 0x10000>;
+ clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
+ resets = <&crg_ctrl 0x38 0>;
+ #pwm-cells = <2>;
+ };
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index c182efc..b2d7408 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -158,6 +158,15 @@ config PWM_FSL_FTM
To compile this driver as a module, choose M here: the module
will be called pwm-fsl-ftm.
+config PWM_HIBVT
+ tristate "HiSilicon BVT PWM support"
+ depends on ARCH_HISI || COMPILE_TEST
+ help
+ Generic PWM framework driver for HiSilicon BVT SoCs.
+
+ To compile this driver as a module, choose M here: the module
+ will be called pwm-hibvt.
+
config PWM_IMG
tristate "Imagination Technologies PWM driver"
depends on HAS_IOMEM
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index dd35bc1..37ec39e 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_PWM_CLPS711X) += pwm-clps711x.o
obj-$(CONFIG_PWM_CRC) += pwm-crc.o
obj-$(CONFIG_PWM_EP93XX) += pwm-ep93xx.o
obj-$(CONFIG_PWM_FSL_FTM) += pwm-fsl-ftm.o
+obj-$(CONFIG_PWM_HIBVT) += pwm-hibvt.o
obj-$(CONFIG_PWM_IMG) += pwm-img.o
obj-$(CONFIG_PWM_IMX) += pwm-imx.o
obj-$(CONFIG_PWM_JZ4740) += pwm-jz4740.o
diff --git a/drivers/pwm/pwm-hibvt.c b/drivers/pwm/pwm-hibvt.c
new file mode 100644
index 0000000..feadb3d
--- /dev/null
+++ b/drivers/pwm/pwm-hibvt.c
@@ -0,0 +1,269 @@
+/*
+ * PWM Controller Driver for HiSilicon BVT SoCs
+ *
+ * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pwm.h>
+#include <linux/reset.h>
+
+#define PWM_CFG0_ADDR(x) (((x) * 0x20) + 0x0)
+#define PWM_CFG1_ADDR(x) (((x) * 0x20) + 0x4)
+#define PWM_CFG2_ADDR(x) (((x) * 0x20) + 0x8)
+#define PWM_CTRL_ADDR(x) (((x) * 0x20) + 0xC)
+
+#define PWM_ENABLE_SHIFT 0
+#define PWM_ENABLE_MASK BIT(0)
+
+#define PWM_POLARITY_SHIFT 1
+#define PWM_POLARITY_MASK BIT(1)
+
+#define PWM_KEEP_SHIFT 2
+#define PWM_KEEP_MASK BIT(2)
+
+#define PWM_PERIOD_MASK GENMASK(31, 0)
+#define PWM_DUTY_MASK GENMASK(31, 0)
+
+struct hibvt_pwm_chip {
+ struct pwm_chip chip;
+ struct clk *clk;
+ void __iomem *base;
+ struct reset_control *rstc;
+};
+
+struct hibvt_pwm_soc {
+ u32 num_pwms;
+};
+
+static const struct hibvt_pwm_soc pwm_soc[2] = {
+ { .num_pwms = 4 },
+ { .num_pwms = 8 },
+};
+
+static inline struct hibvt_pwm_chip *to_hibvt_pwm_chip(struct pwm_chip *chip)
+{
+ return container_of(chip, struct hibvt_pwm_chip, chip);
+}
+
+static void hibvt_pwm_set_bits(void __iomem *base, u32 offset,
+ u32 mask, u32 data)
+{
+ void __iomem *address = base + offset;
+ u32 value;
+
+ value = readl(address);
+ value &= ~mask;
+ value |= (data & mask);
+ writel(value, address);
+}
+
+static void hibvt_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
+
+ hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
+ PWM_ENABLE_MASK, 0x1);
+}
+
+static void hibvt_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
+{
+ struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
+
+ hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
+ PWM_ENABLE_MASK, 0x0);
+}
+
+static void hibvt_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
+ int duty_cycle_ns, int period_ns)
+{
+ struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
+ u32 freq, period, duty;
+
+ freq = div_u64(clk_get_rate(hi_pwm_chip->clk), 1000000);
+
+ period = div_u64(freq * period_ns, 1000);
+ duty = div_u64(period * duty_cycle_ns, period_ns);
+
+ hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CFG0_ADDR(pwm->hwpwm),
+ PWM_PERIOD_MASK, period);
+
+ hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CFG1_ADDR(pwm->hwpwm),
+ PWM_DUTY_MASK, duty);
+}
+
+static void hibvt_pwm_set_polarity(struct pwm_chip *chip,
+ struct pwm_device *pwm,
+ enum pwm_polarity polarity)
+{
+ struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
+
+ if (polarity == PWM_POLARITY_INVERSED)
+ hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
+ PWM_POLARITY_MASK, (0x1 << PWM_POLARITY_SHIFT));
+ else
+ hibvt_pwm_set_bits(hi_pwm_chip->base, PWM_CTRL_ADDR(pwm->hwpwm),
+ PWM_POLARITY_MASK, (0x0 << PWM_POLARITY_SHIFT));
+}
+
+static void hibvt_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
+ struct pwm_state *state)
+{
+ struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
+ void __iomem *base;
+ u32 freq, value;
+
+ freq = div_u64(clk_get_rate(hi_pwm_chip->clk), 1000000);
+ base = hi_pwm_chip->base;
+
+ value = readl(base + PWM_CFG0_ADDR(pwm->hwpwm));
+ state->period = div_u64(value * 1000, freq);
+
+ value = readl(base + PWM_CFG1_ADDR(pwm->hwpwm));
+ state->duty_cycle = div_u64(value * 1000, freq);
+
+ value = readl(base + PWM_CTRL_ADDR(pwm->hwpwm));
+ state->enabled = (PWM_ENABLE_MASK & value);
+}
+
+static int hibvt_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+ struct pwm_state *state)
+{
+ if (state->polarity != pwm->state.polarity)
+ hibvt_pwm_set_polarity(chip, pwm, state->polarity);
+
+ if (state->period != pwm->state.period ||
+ state->duty_cycle != pwm->state.duty_cycle)
+ hibvt_pwm_config(chip, pwm, state->duty_cycle, state->period);
+
+ if (state->enabled != pwm->state.enabled) {
+ if (state->enabled)
+ hibvt_pwm_enable(chip, pwm);
+ else
+ hibvt_pwm_disable(chip, pwm);
+ }
+
+ return 0;
+}
+
+static struct pwm_ops hibvt_pwm_ops = {
+ .get_state = hibvt_pwm_get_state,
+ .apply = hibvt_pwm_apply,
+
+ .owner = THIS_MODULE,
+};
+
+static int hibvt_pwm_probe(struct platform_device *pdev)
+{
+ const struct hibvt_pwm_soc *soc =
+ of_device_get_match_data(&pdev->dev);
+ struct hibvt_pwm_chip *pwm_chip;
+ struct resource *res;
+ int ret;
+ int i;
+
+ pwm_chip = devm_kzalloc(&pdev->dev, sizeof(*pwm_chip), GFP_KERNEL);
+ if (pwm_chip == NULL)
+ return -ENOMEM;
+
+ pwm_chip->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(pwm_chip->clk)) {
+ dev_err(&pdev->dev, "getting clock failed with %ld\n",
+ PTR_ERR(pwm_chip->clk));
+ return PTR_ERR(pwm_chip->clk);
+ }
+
+ pwm_chip->chip.ops = &hibvt_pwm_ops;
+ pwm_chip->chip.dev = &pdev->dev;
+ pwm_chip->chip.base = -1;
+ pwm_chip->chip.npwm = soc->num_pwms;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pwm_chip->base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pwm_chip->base))
+ return PTR_ERR(pwm_chip->base);
+
+ ret = clk_prepare_enable(pwm_chip->clk);
+ if (ret < 0)
+ return ret;
+
+ pwm_chip->rstc = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(pwm_chip->rstc)) {
+ clk_disable_unprepare(pwm_chip->clk);
+ return PTR_ERR(pwm_chip->rstc);
+ }
+
+ reset_control_assert(pwm_chip->rstc);
+ msleep(30);
+ reset_control_deassert(pwm_chip->rstc);
+
+ ret = pwmchip_add(&pwm_chip->chip);
+ if (ret < 0) {
+ clk_disable_unprepare(pwm_chip->clk);
+ return ret;
+ }
+
+ for (i = 0; i < pwm_chip->chip.npwm; i++) {
+ hibvt_pwm_set_bits(pwm_chip->base, PWM_CTRL_ADDR(i),
+ PWM_KEEP_MASK, (0x1 << PWM_KEEP_SHIFT));
+ }
+
+ platform_set_drvdata(pdev, pwm_chip);
+
+ return 0;
+}
+
+static int hibvt_pwm_remove(struct platform_device *pdev)
+{
+ struct hibvt_pwm_chip *pwm_chip;
+
+ pwm_chip = platform_get_drvdata(pdev);
+
+ reset_control_assert(pwm_chip->rstc);
+ msleep(30);
+ reset_control_deassert(pwm_chip->rstc);
+
+ clk_disable_unprepare(pwm_chip->clk);
+
+ return pwmchip_remove(&pwm_chip->chip);
+}
+
+static const struct of_device_id hibvt_pwm_of_match[] = {
+ { .compatible = "hisilicon,hi3516cv300-pwm", .data = &pwm_soc[0] },
+ { .compatible = "hisilicon,hi3519v100-pwm", .data = &pwm_soc[1] },
+ { }
+};
+MODULE_DEVICE_TABLE(of, hibvt_pwm_of_match);
+
+static struct platform_driver hibvt_pwm_driver = {
+ .driver = {
+ .name = "hibvt-pwm",
+ .of_match_table = hibvt_pwm_of_match,
+ },
+ .probe = hibvt_pwm_probe,
+ .remove = hibvt_pwm_remove,
+};
+module_platform_driver(hibvt_pwm_driver);
+
+MODULE_AUTHOR("Jian Yuan");
+MODULE_DESCRIPTION("HiSilicon BVT SoCs PWM driver");
+MODULE_LICENSE("GPL");
--
2.1.4
^ permalink raw reply related
* Re: [PATCH 1/3] arm: hisi: add ARCH_MULTI_V5 support
From: Wei Xu @ 2016-11-16 9:31 UTC (permalink / raw)
To: wenpan, Arnd Bergmann, Marty Plummer
Cc: mturquette, sboyd, robh+dt, mark.rutland, linux, linux-clk,
devicetree, linux-kernel, linux-arm-kernel, howell.yang,
xuejiancheng, jalen.hsu, lvkuanliang, suwenping, raojun,
kevin.lixu, qinxiaojun
In-Reply-To: <e78a288b-8bab-9441-2edb-6ec08e5103d7@hisilicon.com>
Hi Pan,
On 2016/11/16 8:56, wenpan wrote:
> Hi Marty，
> Does this confict with your patch？ If not，I hope this could be merged first. Besides could you tell me the link to your related patch?
This is the link: https://patchwork.kernel.org/patch/9334743/
BR,
Wei
>
> Thanks,
> Pan
>
> On 2016/10/17 21:48, Arnd Bergmann wrote:
>> On Monday, October 17, 2016 8:07:03 PM CEST Pan Wen wrote:
>>> Add support for some HiSilicon SoCs which depend on ARCH_MULTI_V5.
>>>
>>> Signed-off-by: Pan Wen <wenpan@hisilicon.com>
>>>
>>
>> Looks ok. I've added Marty Plummer to Cc, he was recently proposing
>> patches for Hi3520, which I think is closely related to this one.
>> Please try to work together so the patches don't conflict. It should
>> be fairly straightforward since you are basically doing the same
>> change here.
>>
>> Arnd
>>
>> .
>>
>
>
> .
>
^ permalink raw reply
* Re: [PATCH v2 3/3] drm/tilcdc: Add drm bridge support for attaching drm bridge drivers
From: Bartosz Golaszewski @ 2016-11-16 9:27 UTC (permalink / raw)
To: Jyri Sarha
Cc: linux-drm, linux-devicetree, David Airlie, Daniel Vetter,
Tomi Valkeinen, Laurent Pinchart, Rob Clark, Kevin Hilman,
Benoit Cousson
In-Reply-To: <36c37a00-0684-a758-219b-6dc71b3131ef-l0cyMroinI0@public.gmane.org>
2016-11-15 21:46 GMT+01:00 Jyri Sarha <jsarha-l0cyMroinI0@public.gmane.org>:
> On 11/15/16 19:36, Bartosz Golaszewski wrote:
>> 2016-11-14 17:54 GMT+01:00 Jyri Sarha <jsarha-l0cyMroinI0@public.gmane.org>:
>>> Adds drm bride support for attaching drm bridge drivers to tilcdc. The
>>> decision whether a video port leads to an external encoder or bridge
>>> is made simply based on remote device's compatible string. The code
>>> has been tested with BeagleBone-Black with and without BeagleBone
>>> DVI-D Cape Rev A3 using ti-tfp410 driver.
>>>
>>> Signed-off-by: Jyri Sarha <jsarha-l0cyMroinI0@public.gmane.org>
>>> ---
>>
>> Hi Jyri,
>>
>> thanks a lot for doing this.
>>
>> One issue I see with this patch is that tilcdc doesn't seem to support
>> deferred probe correctly (if modules are built-in). The following
>> happens on my setup:
>>
>> The dump-vga-dac module is loaded first, but the i2c0 is not ready yet
>> - probe returns EPROBE_DEFER and it's propagated to tilcdc probe.
>>
>> [drm] Initialized
>> dumb-vga-dac vga_bridge: Couldn't retrieve i2c bus
>>
>> Then the i2c bus is initialized and dump-vga-dac probe succeeds, but
>> the second probe of tilcdc gives me:
>>
>> [drm:drm_debugfs_init] *ERROR* Cannot create /sys/kernel/debug/dri/64
>> [drm:drm_minor_register] *ERROR* DRM: Failed to initialize
>> /sys/kernel/debug/dri.
>> tilcdc: probe of da8xx_lcdc.0 failed with error -1
>>
>> I was able to work around this issue by loading modules in correct order.
>>
>
> Did you have any conflicts when applying my patch? I have done quite a
> few changes lately and especially the initialization sequence and back
> off from deferred probe may get broken easily broken if the source base
> is not correct. I try to come up with a pull-request candidate branch
> soon (hopefully tomorrow) for you to test.
>
I only had some trivial conflicts, but you're right, maybe I'm missing
some parts. It would be great to have a branch for testing - I could
then rebase my follow-up work on tilcdc against it.
>> I then tried testing the patch with a da850-lcdk, but I don't get
>> anything on the display (no signal), even though the LCDC seems to
>> work fine (modetest and dmesg messages work just like when using the
>> tilcdc panel). Also: I see the EDID info is correctly retrieved from
>> the display.
>>
>> Could you take a look at my DT[1] and see if you find it correct?
>>
>
> It is hard to follow the dts diff, but if it probes and tilcdc is able
> to read EDID modes, there should not be anything more to it.
>
Yes, this is what I thought too.
Let me know when you'll have the testing branch ready.
Best regards,
Bartosz Golaszewski
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^ permalink raw reply
* Re: [PATCH 1/2] usb: dwc2: add amcc,dwc-otg support
From: Felipe Balbi @ 2016-11-16 9:24 UTC (permalink / raw)
To: John Youn, Christian Lamparter
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-usb@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Mark Rutland, Rob Herring, Greg Kroah-Hartman
In-Reply-To: <8235c9d5-891b-6f75-49a0-c8820c3b139f-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 8417 bytes --]
Hi,
John Youn <John.Youn-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> writes:
> On 11/14/2016 3:00 PM, John Youn wrote:
>> On 11/11/2016 3:12 PM, Christian Lamparter wrote:
>>> On Friday, November 11, 2016 2:20:42 PM CET John Youn wrote:
>>>> On 11/11/2016 2:05 PM, Christian Lamparter wrote:
>>>>> On Friday, November 11, 2016 1:22:16 PM CET John Youn wrote:
>>>>>> On 11/11/2016 12:59 PM, Christian Lamparter wrote:
>>>>>>> This patch adds support for the "amcc,usb-otg" device
>>>>>>> which is found in the PowerPC Canyonlands' dts.
>>>>>>>
>>>>>>> The device definition was added by:
>>>>>>> commit c89b3458d8cc ("powerpc/44x: Add USB DWC DTS entry to Canyonlands board")'
>>>>>>> but without any driver support as the dwc2 driver wasn't
>>>>>>> available at that time.
>>>>>>>
>>>>>>> Note: The system can't use the generic "snps,dwc2" compatible
>>>>>>> because of the special ahbcfg configuration. The default
>>>>>>> GAHBCFG_HBSTLEN_INCR4 of snps,dwc2 can cause a system hang
>>>>>>> when the USB and SATA is used concurrently.
>>>>>>
>>>>>> I don't want to add any more of these param structures to the driver
>>>>>> unless really necessary. We're trying to remove usage of them in favor
>>>>>> of using auto-detected defaults and device properties to override
>>>>>> them.
>>>>> Ok, thanks. I think that would work. I've attached an updated patch.
>>>>> Can it be applied/queued now? Or do you want me to resent it later?
>>>>>
>>>>>> The AHB Burst is actually one of the ones we were going to do next
>>>>>> because our platform also doesn't work well with INCR4. In fact I'm
>>>>>> thinking of making the default INCR.
>>>>> Is that actually possible to change the default still? This would
>>>>> require to re-evaluate all existing archs/platforms that use
>>>>> "snps,dwc2" for INCR16 compatibility.
>>>>
>>>> INCR, not INCR16, but you're right, so we may not change it even
>>>> though though INCR is usually the right choice over INCR4.
>>> What about making a device-tree property?
>>
>> Yes, that's what I meant. I'll send a change for this shortly.
>>
>>>
>>> Recommended properties:
>>> - g-ahb-bursts : specifies the ahb bursts length, should be one of
>>> "single", "INCRx", "INCR4", "INCR8", or "INCR16". If not specified
>>> the safer but inefficient "INCR4" is used. The optimal setting is
>>> "INCRx".
>>>
>>> Would this work? If so, I can make a patch over the weekend.
>>>> Anyways, with the binding, can't you just set the compatible string to
>>>> snps,dwc2?
>>>
>>> Ah, let me explain. I had a discussion with Mark Rutland and Rob Herring
>>> a while back about device-tree bindings.
>>>
>>> They made it very clear to me, that they don't want any generic "catch all
>>> compatible" strings:
>>>
>>> "Bindings should be for hardware (either specific device models, or for
>>> classes), and not for Linux drivers. The latter is subject to arbitrary
>>> changes while the former is not, as old hardware continues to exist and
>>> does not change while drivers get completely reworked." [0]
>>>
>>> Furthermore, this is an existing binding in kernel's canyonlands.dts [1]
>>> and this binding can't be easily changed. Rob Herring explained this in
>>> the context of the "basic-mmio-gpio" patch [2] when I was editing the dts
>>> to make them work with the changes I made:
>>>
>>> "You can't remove the old drivers as they are needed to work with
>>> old dtbs, so there is no gain.
>>>
>>> You would need to match on existing compatibles such as
>>> moxa,moxart-gpio and provide a match data struct that has all the info
>>> you are adding here (e.g. data register offset). Then additionally you
>>> could add "basic-mmio-gpio" (I would drop "basic" part) and the
>>> additional data associated with it. But it has to be new properties,
>>> not changing properties. Changing the reg values doesn't work."
>>>
>>> So, for this to work with the existing canyonlands.dts, I need to have
>>> the "amcc,dwc-otg" compatible string.
>>
>> Ok, if that's the case. But still a bit confused as to what driver was
>> working with it before since the binding was not defined for dwc2.
>>
>>>
>>> Of course, it would be great to hear from Rob Herring and/or Mark Rutland
>>> about this case.
>>>
>>> Regards,
>>> Christian
>>>
>>> [0] <https://patchwork.kernel.org/patch/8976221/>
>>> [1] <http://lxr.free-electrons.com/source/arch/powerpc/boot/dts/canyonlands.dts#L181>
>>> [2] <http://www.spinics.net/lists/devicetree/msg124538.html>
>>>
>>>
>>>>>
>>>>> From what I can tell based would be:
>>>>> bcm11351, bcm21664, bcm23550, exynos3250, stm32f429, rk3xxx,
>>>>> stratix10, meson-gxbb, rt3050 and some Altera FPGAs.
>>>>>
>>>>>> If that's all you need then a devicetree binding should be enough
>>>>>> right?
>>>>> Yes. The device is working fine so far.
>>>>>
>>>>> Regards,
>>>>> Christian
>>>>>
>>>>> ---
>>>>> From 70dd4be016b89655a56bc8260f04683b50f07644 Mon Sep 17 00:00:00 2001
>>>>> From: Christian Lamparter <chunkeey-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>>>> Date: Sun, 6 Nov 2016 00:39:24 +0100
>>>>> Subject: [PATCH] usb: dwc2: add amcc,dwc-otg support
>>>>>
>>>>> This patch adds support for the "amcc,usb-otg" device
>>>>> which is found in the PowerPC Canyonlands' dts.
>>>>>
>>>>> The device definition was added by:
>>>>> commit c89b3458d8cc ("powerpc/44x: Add USB DWC DTS entry to Canyonlands board")'
>>>>> but without any driver support as the dwc2 driver wasn't
>>>>> available at that time.
>>>>>
>>>>> Note: The system can't use the generic "snps,dwc2" compatible
>>>>> because of the special ahbcfg configuration. The default
>>>>> GAHBCFG_HBSTLEN_INCR4 of snps,dwc2 can cause a system hang
>>>>> when the USB and SATA is used concurrently.
>>>>>
>>>>> Cc: Felipe Balbi <felipe.balbi-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>>>>> Cc: John Youn <johnyoun-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
>>>>> Signed-off-by: Christian Lamparter <chunkeey-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>>>> ---
>>>>> v1->v2:
>>>>> - moved definitons to params.c
>>>>> - removed dma_enable / host_dma parameter
>>>>> - added dma_desc_fs_enable parameter
>>>>> v2->v3:
>>>>> - removed parameters
>>>>>
>>>>> Please queue this patch until GAHBCFG_HBSTLEN_INCR16 is the default
>>>>> for ahbcfg.
>>>>> ---
>>>>> Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
>>>>> drivers/usb/dwc2/params.c | 1 +
>>>>> 2 files changed, 2 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
>>>>> index 10a2a4b..6ccfe85 100644
>>>>> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
>>>>> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
>>>>> @@ -12,6 +12,7 @@ Required properties:
>>>>> - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
>>>>> - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
>>>>> - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
>>>>> + - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
>>>>> - snps,dwc2: A generic DWC2 USB controller with default parameters.
>>>>> - reg : Should contain 1 register range (address and length)
>>>>> - interrupts : Should contain 1 interrupt
>>>>> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
>>>>> index 64d5c66..9506ab0 100644
>>>>> --- a/drivers/usb/dwc2/params.c
>>>>> +++ b/drivers/usb/dwc2/params.c
>>>>> @@ -239,6 +239,7 @@ const struct of_device_id dwc2_of_match_table[] = {
>>>>> { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
>>>>> { .compatible = "amlogic,meson8b-usb", .data = ¶ms_amlogic },
>>>>> { .compatible = "amlogic,meson-gxbb-usb", .data = ¶ms_amlogic },
>>>>> + { .compatible = "amcc,dwc-otg", .data = NULL },
>>>>> {},
>>>>> };
>>>>> MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
>>>>>
>>
>> For dwc2 part:
>>
>> Acked-by: John Youn <johnyoun-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
>>
>
> Hi Felipe,
>
> Can you drop this from your testing/next?
>
> I meant for the 2nd version to be applied, without the params
> structure.
>
> I can send you a clean version to apply later today.
done
--
balbi
[-- Attachment #2: signature.asc --]
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^ permalink raw reply
* Re: [PATCHv2 06/10] mmc: core: move the cookie's enum values from sdhci.h to mmc.h
From: Jaehoon Chung @ 2016-11-16 9:23 UTC (permalink / raw)
To: Adrian Hunter, linux-mmc-u79uwXL29TY76Z2rM5mHXA
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, Ulf Hansson,
heiko-4mtYJXux2i+zQB+pC5nmwQ, shawn.lin-TNX95d0MmH7DzftRWevZcw,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <3e05ec88-af1d-9996-bbdb-c453f7e4bb07-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
On 11/16/2016 06:04 PM, Adrian Hunter wrote:
> On 16/11/16 10:58, Jaehoon Chung wrote:
>> On 11/16/2016 05:28 PM, Adrian Hunter wrote:
>>> On 16/11/16 10:25, Jaehoon Chung wrote:
>>>> On 11/16/2016 05:09 PM, Adrian Hunter wrote:
>>>>> On 16/11/16 09:53, Jaehoon Chung wrote:
>>>>>> Added Adrian for sdhci.h
>>>>>>
>>>>>> On 11/15/2016 07:12 PM, Jaehoon Chung wrote:
>>>>>>> It's not for only sdhci controller.
>>>>>>> So it can be moved from sdhci.h to mmc.h. And renamed from sdhci_cookie
>>>>>>> to mmc_cookie.
>>>>>
>>>>> The cookie is currently host private data, so I don't understand the
>>>>> motivation behind this.
>>>>
>>>> dwmmc controller can also use the data->host_cookie. because it's working with post/pre_req().
>>>>
>>>> So i think it can be used about both sdhci and dwmmc.
>>>> Is there no reason that add the private dwmmc data?
>>>>
>>>> With these cookie value, update the dwmmc controller for post/pre_req().
>>>>
>>>> https://patchwork.kernel.org/patch/9429287/
>>>
>>> So why not define dwmmc cookies in dw_mmc.c ?
>>
>> Because I understood that it's not sdhci specific cookies. It can be used generally, doesn't?
>>
>> Role of post/pre_req() in host controller is the doing dma_map/unmap().
>> And data's cookies only needs to notice whether dma is mapped or unmapped, etc.
>>
>> Well, If it's really private value and should be added other cookies values in future, i will put cookies in dw_mmc.h.
>> (it should be duplicated in sdhci and dwmmc.)
>
> Probably all host controllers should do cookies the same way, but they don't
> at the moment, so there is no reason to share definitions.
Ok. Then I will put dwmmc_cookie in dw_mmc.h on next version.
Thanks for comments.
Best Regards,
Jaehoon Chung
>
> --
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> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
>
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^ permalink raw reply
* Re: [PATCHv2 10/10] Documentation: synopsys-dw-mshc: remove the unused properties
From: Shawn Lin @ 2016-11-16 9:21 UTC (permalink / raw)
To: Jaehoon Chung
Cc: linux-mmc, shawn.lin, devicetree, ulf.hansson, heiko, robh+dt
In-Reply-To: <20161115101232.3854-11-jh80.chung@samsung.com>
在 2016/11/15 18:12, Jaehoon Chung 写道:
> "support-highspeed" was the obsoleted property.
> And "broken-cd" is not synopsys specific property.
> It can be referred to mmc.txt binding Documentation.
>
Ahh, I forgot to remove broken-cd from doc of dwmmc
when removing it from code.
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
> index 1279a22..7fd17c3 100644
> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
> @@ -75,11 +75,6 @@ Optional properties:
> * card-detect-delay: Delay in milli-seconds before detecting card after card
> insert event. The default value is 0.
>
> -* supports-highspeed (DEPRECATED): Enables support for high speed cards (up to 50MHz)
> - (use "cap-mmc-highspeed" or "cap-sd-highspeed" instead)
> -
> -* broken-cd: as documented in mmc core bindings.
> -
> * vmmc-supply: The phandle to the regulator to use for vmmc. If this is
> specified we'll defer probe until we can find this regulator.
>
>
--
Best Regards
Shawn Lin
^ permalink raw reply
* Re: [PATCHv2 09/10] mmc: dw_mmc: The "clock-freq-min-max" property was deprecated
From: Shawn Lin @ 2016-11-16 9:19 UTC (permalink / raw)
To: Jaehoon Chung
Cc: linux-mmc-u79uwXL29TY76Z2rM5mHXA,
shawn.lin-TNX95d0MmH7DzftRWevZcw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, heiko-4mtYJXux2i+zQB+pC5nmwQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <20161115101232.3854-10-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
在 2016/11/15 18:12, Jaehoon Chung 写道:
> The "clock-freq-min-max" property was deprecated.
> There is "max-frequency" property in drivers/mmc/core/host.c
> "max-frequency" can be replaced with "clock-freq-min-max".
> Minimum clock value might be set to 100K by default.
> Then MMC core should try to find the correct value from 400K to 100K.
> So it just needs to set Maximum clock value.
>
This is what we talked about to do :-)
Reviewed-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
> Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 3 ++-
> drivers/mmc/host/dw_mmc.c | 2 ++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
> index bfa461a..1279a22 100644
> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
> @@ -59,8 +59,9 @@ Optional properties:
> is specified and the ciu clock is specified then we'll try to set the ciu
> clock to this at probe time.
>
> -* clock-freq-min-max: Minimum and Maximum clock frequency for card output
> +* clock-freq-min-max (DEPRECATED): Minimum and Maximum clock frequency for card output
> clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by default.
> + (Use the "max-frequency" instead of "clock-freq-min-max".)
>
> * num-slots: specifies the number of slots supported by the controller.
> The number of physical slots actually used could be equal or less than the
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index ec0ba79..48e968a 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -2608,6 +2608,8 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
> mmc->f_min = DW_MCI_FREQ_MIN;
> mmc->f_max = DW_MCI_FREQ_MAX;
> } else {
> + dev_info(host->dev,
> + "'clock-freq-min-max' property was deprecated.\n");
> mmc->f_min = freq[0];
> mmc->f_max = freq[1];
> }
>
--
Best Regards
Shawn Lin
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^ permalink raw reply
* Re: [PATCHv2 08/10] mmc: dw_mmc: remove the unnecessary mmc_data structure
From: Shawn Lin @ 2016-11-16 9:18 UTC (permalink / raw)
To: Jaehoon Chung
Cc: linux-mmc-u79uwXL29TY76Z2rM5mHXA,
shawn.lin-TNX95d0MmH7DzftRWevZcw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, heiko-4mtYJXux2i+zQB+pC5nmwQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <20161115101232.3854-9-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
在 2016/11/15 18:12, Jaehoon Chung 写道:
> Remove the unnecessary mmc_data structure.
> Instead, cmd->data can be used.
>
Looks good to me,
Reviewed-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Tested-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
> ---
> drivers/mmc/host/dw_mmc.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index e912de6..ec0ba79 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -236,7 +236,6 @@ static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg);
>
> static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd)
> {
> - struct mmc_data *data;
> struct dw_mci_slot *slot = mmc_priv(mmc);
> struct dw_mci *host = slot->host;
> u32 cmdr;
> @@ -291,10 +290,9 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd)
> if (cmd->flags & MMC_RSP_CRC)
> cmdr |= SDMMC_CMD_RESP_CRC;
>
> - data = cmd->data;
> - if (data) {
> + if (cmd->data) {
> cmdr |= SDMMC_CMD_DAT_EXP;
> - if (data->flags & MMC_DATA_WRITE)
> + if (cmd->data->flags & MMC_DATA_WRITE)
> cmdr |= SDMMC_CMD_DAT_WR;
> }
>
>
--
Best Regards
Shawn Lin
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^ permalink raw reply
* Re: [PATCH v2] ARM: dts: da850: add the mstpri and ddrctl nodes
From: Sekhar Nori @ 2016-11-16 9:17 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Michael Turquette, Rob Herring,
Frank Rowand, Mark Rutland, Peter Ujfalusi, Russell King
Cc: LKML, arm-soc, linux-drm, linux-devicetree, Jyri Sarha,
Tomi Valkeinen, David Airlie, Laurent Pinchart
In-Reply-To: <1479207611-18028-1-git-send-email-bgolaszewski@baylibre.com>
On Tuesday 15 November 2016 04:30 PM, Bartosz Golaszewski wrote:
> Add the nodes for the MSTPRI configuration and DDR2/mDDR memory
> controller drivers to da850.dtsi.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Applied to v4.10/dt
Thanks,
Sekhar
^ permalink raw reply
* Re: [PATCHv2 05/10] mmc: dw_mmc: call the dw_mci_prep_stop_abort() by default
From: Shawn Lin @ 2016-11-16 9:16 UTC (permalink / raw)
To: Jaehoon Chung, linux-mmc-u79uwXL29TY76Z2rM5mHXA
Cc: shawn.lin-TNX95d0MmH7DzftRWevZcw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, heiko-4mtYJXux2i+zQB+pC5nmwQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <20161115101232.3854-6-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
在 2016/11/15 18:12, Jaehoon Chung 写道:
> stop_cmdr should be set to values relevant to stop command.
> It migth be assigned to values whatever there is mrq->stop or not.
> Then it doesn't need to use dw_mci_prepare_command().
> It's enough to use the prep_stop_abort for preparing stop command.
>
Have you considered to clean up the logic of preparing abort cmd
within dw_mci_prepare_command?
if (cmd->opcode == MMC_STOP_TRANSMISSION ||
cmd->opcode == MMC_GO_IDLE_STATE ||
cmd->opcode == MMC_GO_INACTIVE_STATE ||
(cmd->opcode == SD_IO_RW_DIRECT &&
((cmd->arg >> 9) & 0x1FFFF) == SDIO_CCCR_ABORT))
cmdr |= SDMMC_CMD_STOP;
> Signed-off-by: Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Tested-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
> ---
> drivers/mmc/host/dw_mmc.c | 15 +++++----------
> 1 file changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 3cda68c..12e1107 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -385,7 +385,7 @@ static void dw_mci_start_command(struct dw_mci *host,
>
> static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data)
> {
> - struct mmc_command *stop = data->stop ? data->stop : &host->stop_abort;
> + struct mmc_command *stop = &host->stop_abort;
>
> dw_mci_start_command(host, stop, host->stop_cmdr);
> }
> @@ -1277,10 +1277,7 @@ static void __dw_mci_start_request(struct dw_mci *host,
> spin_unlock_irqrestore(&host->irq_lock, irqflags);
> }
>
> - if (mrq->stop)
> - host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop);
> - else
> - host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd);
> + host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd);
> }
>
> static void dw_mci_start_request(struct dw_mci *host,
> @@ -1890,8 +1887,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
> if (test_and_clear_bit(EVENT_DATA_ERROR,
> &host->pending_events)) {
> dw_mci_stop_dma(host);
> - if (data->stop ||
> - !(host->data_status & (SDMMC_INT_DRTO |
> + if (!(host->data_status & (SDMMC_INT_DRTO |
> SDMMC_INT_EBE)))
> send_stop_abort(host, data);
> state = STATE_DATA_ERROR;
> @@ -1927,8 +1923,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
> if (test_and_clear_bit(EVENT_DATA_ERROR,
> &host->pending_events)) {
> dw_mci_stop_dma(host);
> - if (data->stop ||
> - !(host->data_status & (SDMMC_INT_DRTO |
> + if (!(host->data_status & (SDMMC_INT_DRTO |
> SDMMC_INT_EBE)))
> send_stop_abort(host, data);
> state = STATE_DATA_ERROR;
> @@ -2004,7 +1999,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
> host->cmd = NULL;
> host->data = NULL;
>
> - if (mrq->stop)
> + if (!mrq->sbc && mrq->stop)
> dw_mci_command_complete(host, mrq->stop);
> else
> host->cmd_status = 0;
>
--
Best Regards
Shawn Lin
--
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^ permalink raw reply
* Re: [PATCHv2 04/10] mmc: dw_mmc: use the hold register when send stop command
From: Shawn Lin @ 2016-11-16 9:09 UTC (permalink / raw)
To: Jaehoon Chung, linux-mmc-u79uwXL29TY76Z2rM5mHXA
Cc: shawn.lin-TNX95d0MmH7DzftRWevZcw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, heiko-4mtYJXux2i+zQB+pC5nmwQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <20161115101232.3854-5-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
在 2016/11/15 18:12, Jaehoon Chung 写道:
> If DW_MMC_CARD_NO_USE_HOLD isn't set, it's usesd by default.
> Enve if SDMMC_CMD_USB_HOLD_REG is set in prepare_command(), but it
> doesn't set in pre_stop_abort().
>
> To maintain the consistency, add the checking condition for this.
Actually I hacked the driver w/ or w/o this patch to see how the
controller would do when looking at your V1.
Interesting, I didn't see failure when missing to set this...But
definitely it should be fixed.
Reviewed-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>
> Signed-off-by: Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Tested-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
> ---
> drivers/mmc/host/dw_mmc.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index be36f48..3cda68c 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -337,6 +337,9 @@ static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd)
> cmdr = stop->opcode | SDMMC_CMD_STOP |
> SDMMC_CMD_RESP_CRC | SDMMC_CMD_RESP_EXP;
>
> + if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->cur_slot->flags))
> + cmdr |= SDMMC_CMD_USE_HOLD_REG;
> +
> return cmdr;
> }
>
>
--
Best Regards
Shawn Lin
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^ permalink raw reply
* [PATCHv0 1/1] fbdev: add Intel FPGA FRAME BUFFER driver
From: Ong, Hean Loong @ 2016-11-16 9:07 UTC (permalink / raw)
To: Tomi Valkeinen; +Cc: devicetree, linux-kernel, linux-fbdev, Ong Hean Loong
From: Ong Hean Loong <hean.loong.ong@intel.com>
This patch enables the display port IP driver for
Intel Arria 10 SOCFPGA Golden Hardware
Reference Design (GHRD).
The driver requires enabling the options such as
Coheherent Memory Allocation,
Intel FPGA Frame Buffer, Frame Buffer Conasole
Signed-off-by: Ong Hean Loong <hean.loong.ong@intel.com>
---
.../devicetree/bindings/video/intelfpgavipfb.txt | 22 ++
MAINTAINERS | 6 +
drivers/video/fbdev/Kconfig | 15 +
drivers/video/fbdev/Makefile | 1 +
drivers/video/fbdev/intelfpgavipfb.c | 302 ++++++++++++++++++++
5 files changed, 346 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/video/intelfpgavipfb.txt
create mode 100644 drivers/video/fbdev/intelfpgavipfb.c
diff --git a/Documentation/devicetree/bindings/video/intelfpgavipfb.txt b/Documentation/devicetree/bindings/video/intelfpgavipfb.txt
new file mode 100644
index 0000000..8928c99
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/intelfpgavipfb.txt
@@ -0,0 +1,22 @@
+Intel FPGA Video and Image Processing(VIP) Frame Buffer bindings
+
+Required properties:
+- compatible: "intel,vip-frame-buffer2"
+- reg: Physical base address and length of the framebuffer controller's
+ registers.
+- max-width: The width of the framebuffer in pixels.
+- max-height: The height of the framebuffer in pixels.
+- bits-per-color: only "8" is currently supported
+- mem-word-width = the bus width of the avalon master port on the frame reader
+
+Example:
+
+alt_vip_vfr_0: vip@0xff260000 {
+ compatible = "intel,vip-frame-buffer2";
+ reg = <0xff260000 0x00000080>;
+ max-width = <1024>;
+ max-height = <768>;
+ bits-per-color = <8>;
+ mem-word-width = <128>;
+};
+
diff --git a/MAINTAINERS b/MAINTAINERS
index 4012c2f..bfc2687 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6314,6 +6314,12 @@ L: linux-fbdev@vger.kernel.org
S: Maintained
F: drivers/video/fbdev/i810/
+INTEL FPGA FRAMEBUFFER DRIVER
+M: Ong, Hean Loong <hean.loong.ong@intel.com>
+L: linux-fbdev@vger.kernel.org
+S: Maintained
+F: drivers/video/fbdev/intvipfb.c
+
INTEL MENLOW THERMAL DRIVER
M: Sujith Thomas <sujith.thomas@intel.com>
L: platform-driver-x86@vger.kernel.org
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index 5d3b0db..5c9d674 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -228,6 +228,21 @@ config FB_TILEBLITTING
comment "Frame buffer hardware drivers"
depends on FB
+config FB_INTEL_FPGA_VIP
+ tristate "Intel FPGA VIP framebuffer support"
+ depends on FB
+ select CMA
+ select FB_CFB_FILLRECT
+ select FB_CFB_COPYAREA
+ select FB_CFB_IMAGEBLIT
+ select FRAMEBUFFER_CONSOLE
+ select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
+ ---help---
+ The FB_INTEL_FPGA_VIP driver supports the formerly Altera Video and Image Processing(VIP)
+ Frame Buffer II. Requires CONFIG_CMA and Frame Buffer Console to
+ be enabled as well. The driver currently only supports ARRIA 10 board from the Intel
+ FPGA Reference Design board family.
+
config FB_GRVGA
tristate "Aeroflex Gaisler framebuffer support"
depends on FB && SPARC
diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile
index ee8c814..6c30549 100644
--- a/drivers/video/fbdev/Makefile
+++ b/drivers/video/fbdev/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FB_MACMODES) += macmodes.o
obj-$(CONFIG_FB_WMT_GE_ROPS) += wmt_ge_rops.o
# Hardware specific drivers go first
+obj-$(CONFIG_FB_INTEL_FPGA_VIP) += intelfpgavipfb.o
obj-$(CONFIG_FB_AMIGA) += amifb.o c2p_planar.o
obj-$(CONFIG_FB_ARC) += arcfb.o
obj-$(CONFIG_FB_CLPS711X) += clps711x-fb.o
diff --git a/drivers/video/fbdev/intelfpgavipfb.c b/drivers/video/fbdev/intelfpgavipfb.c
new file mode 100644
index 0000000..9f5ca26
--- /dev/null
+++ b/drivers/video/fbdev/intelfpgavipfb.c
@@ -0,0 +1,302 @@
+/*
+ * Copyright (C) 2016 Intel Corporation. All rights reserved
+ *
+ * intelfpgavipfb.c -- Intel Video and Image Processing(VIP)
+ * Frame Buffer II driver
+ *
+ * This is based on a driver made by Thomas Chou <thomas@wytron.com.tw> and
+ * Winteler Goossens <wintelergoossens@home.nl> This driver supports the
+ * Intel VIP Frame Buffer II component. More info on the hardware can be
+ * found in the Intel Video and Image Processing Suite User Guide at
+ * http://www.intelera.com/literature/ug/ug_vip.pdf.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/fb.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+
+#define PALETTE_SIZE 256
+#define DRIVER_NAME "intelvipfb"
+
+/* control registers */
+#define INTVIPFB2_CONTROL 0
+#define INTVIPFB2_STATUS 0x4
+#define INTVIPFB2_INTERRUPT 0x8
+#define INTVIPFB2_FRAME_COUNTER 0xC
+#define INTVIPFB2_FRAME_DROP 0x10
+#define INTVIPFB2_FRAME_INFO 0x14
+#define INTVIPFB2_FRAME_START 0x18
+#define INTVIPFB2_FRAME_READER 0x1C
+
+#define BITS_PER_PIXEL 32
+
+struct intelvipfb_dev {
+ struct platform_device *pdev;
+ struct fb_info info;
+ struct resource *reg_res;
+ void __iomem *base;
+ int mem_word_width;
+ u32 pseudo_palette[PALETTE_SIZE];
+};
+
+static int intelvipfb_setcolreg(unsigned int regno, unsigned int red,
+ unsigned int green, unsigned int blue,
+ unsigned int transp, struct fb_info *info)
+{
+ /*
+ * Set a single color register. The values supplied have a 32 bit
+ * magnitude.
+ * Return != 0 for invalid regno.
+ */
+
+ if (regno > 255)
+ return 1;
+
+ red >>= 8;
+ green >>= 8;
+ blue >>= 8;
+ if (regno < 255) {
+ ((u32 *)info->pseudo_palette)[regno] =
+ ((red & 255) << 16) | ((green & 255) << 8) | (blue & 255);
+ }
+
+ return 0;
+}
+
+static struct fb_ops intelvipfb_ops = {
+ .owner = THIS_MODULE,
+ .fb_fillrect = cfb_fillrect,
+ .fb_copyarea = cfb_copyarea,
+ .fb_imageblit = cfb_imageblit,
+ .fb_setcolreg = intelvipfb_setcolreg,
+};
+
+static int intelvipfb_of_setup(struct intelvipfb_dev *fbdev)
+{
+ struct device_node *np = fbdev->pdev->dev.of_node;
+ int ret;
+ u32 bits_per_color;
+
+ ret = of_property_read_u32(np, "max-width", &fbdev->info.var.xres);
+ if (ret) {
+ dev_err(&fbdev->pdev->dev,
+ "Missing required parameter 'max-width'");
+ return ret;
+ }
+ fbdev->info.var.xres_virtual = fbdev->info.var.xres,
+
+ ret = of_property_read_u32(np, "max-height", &fbdev->info.var.yres);
+ if (ret) {
+ dev_err(&fbdev->pdev->dev,
+ "Missing required parameter 'max-height'");
+ return ret;
+ }
+ fbdev->info.var.yres_virtual = fbdev->info.var.yres;
+
+ ret = of_property_read_u32(np, "bits-per-color", &bits_per_color);
+ if (ret) {
+ dev_err(&fbdev->pdev->dev,
+ "Missing required parameter 'bits-per-color'");
+ return ret;
+ }
+ if (bits_per_color != 8) {
+ dev_err(&fbdev->pdev->dev,
+ "bits-per-color is set to %i. Currently only 8 is supported.",
+ bits_per_color);
+ return -ENODEV;
+ }
+ fbdev->info.var.bits_per_pixel = BITS_PER_PIXEL;
+
+ ret = of_property_read_u32(np, "mem-word-width",
+ &fbdev->mem_word_width);
+ if (ret) {
+ dev_err(&fbdev->pdev->dev,
+ "Missing required parameter 'mem-word-width'");
+ return ret;
+ }
+ if (!(fbdev->mem_word_width >= BITS_PER_PIXEL &&
+ fbdev->mem_word_width % BITS_PER_PIXEL == 0)) {
+ dev_err(&fbdev->pdev->dev,
+ "mem-word-width is set to %i. must be >= 32 and multiple of 32.",
+ fbdev->mem_word_width);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static void intelvipfb_start_hw(struct intelvipfb_dev *fbdev)
+{
+ /*
+ * The frameinfo variable has to correspond to the size of the VIP Suite
+ * Frame Reader register 7 which will determine the maximum size used
+ * in this frameinfo
+ */
+ u32 frameinfo = readl(fbdev->base +
+ INTVIPFB2_FRAME_READER) & 0x00ffffff;
+
+ writel(frameinfo, fbdev->base + INTVIPFB2_FRAME_INFO);
+ writel(fbdev->info.fix.smem_start, fbdev->base + INTVIPFB2_FRAME_START);
+ /* Finally set the control register to 1 to start streaming */
+ writel(1, fbdev->base + INTVIPFB2_CONTROL);
+}
+
+static void intelvipfb_disable_hw(struct intelvipfb_dev *fbdev)
+{
+ /* set the control register to 0 to stop streaming */
+ writel(0, fbdev->base + INTVIPFB2_CONTROL);
+}
+
+static int intelvipfb_setup_fb_info(struct intelvipfb_dev *fbdev)
+{
+ struct fb_info *info = &fbdev->info;
+ int ret;
+
+ strcpy(info->fix.id, DRIVER_NAME);
+ info->fix.type = FB_TYPE_PACKED_PIXELS;
+ info->fix.visual = FB_VISUAL_TRUECOLOR;
+ info->fix.accel = FB_ACCEL_NONE;
+
+ info->fbops = &intelvipfb_ops;
+ info->var.activate = FB_ACTIVATE_NOW;
+ info->var.height = -1;
+ info->var.width = -1;
+ info->var.vmode = FB_VMODE_NONINTERLACED;
+
+ ret = intelvipfb_of_setup(fbdev);
+ if (ret)
+ return ret;
+
+ /* settings for 32bit pixels */
+ info->var.red.offset = 16;
+ info->var.red.length = 8;
+ info->var.red.msb_right = 0;
+ info->var.green.offset = 8;
+ info->var.green.length = 8;
+ info->var.green.msb_right = 0;
+ info->var.blue.offset = 0;
+ info->var.blue.length = 8;
+ info->var.blue.msb_right = 0;
+
+ info->fix.line_length = (info->var.xres *
+ (info->var.bits_per_pixel >> 3));
+ info->fix.smem_len = info->fix.line_length * info->var.yres;
+
+ info->pseudo_palette = fbdev->pseudo_palette;
+ info->flags = FBINFO_FLAG_DEFAULT;
+
+ return 0;
+}
+
+static int intelvipfb_probe(struct platform_device *pdev)
+{
+ int retval;
+ void *fbmem_virt;
+ struct intelvipfb_dev *fbdev;
+
+ fbdev = devm_kzalloc(&pdev->dev, sizeof(*fbdev), GFP_KERNEL);
+ if (!fbdev)
+ return -ENOMEM;
+
+ fbdev->pdev = pdev;
+ fbdev->reg_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!fbdev->reg_res)
+ return -ENODEV;
+
+ fbdev->base = devm_ioremap_resource(&pdev->dev, fbdev->reg_res);
+ if (IS_ERR(fbdev->base)) {
+ dev_err(&pdev->dev, "devm_ioremap_resource failed\n");
+ retval = PTR_ERR(fbdev->base);
+ return -ENODEV;
+ }
+
+ retval = intelvipfb_setup_fb_info(fbdev);
+
+ fbmem_virt = dma_alloc_coherent(NULL,
+ fbdev->info.fix.smem_len,
+ (void *)&fbdev->info.fix.smem_start,
+ GFP_KERNEL);
+ if (!fbmem_virt) {
+ dev_err(&pdev->dev,
+ "intelvipfb: unable to allocate %d Bytes fb memory\n",
+ fbdev->info.fix.smem_len);
+ return retval;
+ }
+
+ fbdev->info.screen_base = fbmem_virt;
+
+ retval = fb_alloc_cmap(&fbdev->info.cmap, PALETTE_SIZE, 0);
+ if (retval < 0)
+ goto err_dma_free;
+
+ platform_set_drvdata(pdev, fbdev);
+
+ intelvipfb_start_hw(fbdev);
+
+ retval = register_framebuffer(&fbdev->info);
+ if (retval < 0)
+ goto err_dealloc_cmap;
+
+ dev_info(&pdev->dev, "fb%d: %s frame buffer device at 0x%x+0x%x\n",
+ fbdev->info.node, fbdev->info.fix.id,
+ (unsigned int)fbdev->info.fix.smem_start,
+ fbdev->info.fix.smem_len);
+
+ return 0;
+
+err_dealloc_cmap:
+ fb_dealloc_cmap(&fbdev->info.cmap);
+err_dma_free:
+ dma_free_coherent(NULL, fbdev->info.fix.smem_len, fbmem_virt,
+ fbdev->info.fix.smem_start);
+ return retval;
+}
+
+static int intelvipfb_remove(struct platform_device *dev)
+{
+ struct intelvipfb_dev *fbdev = platform_get_drvdata(dev);
+
+ if (fbdev) {
+ unregister_framebuffer(&fbdev->info);
+ fb_dealloc_cmap(&fbdev->info.cmap);
+ dma_free_coherent(NULL, fbdev->info.fix.smem_len,
+ fbdev->info.screen_base,
+ fbdev->info.fix.smem_start);
+ intelvipfb_disable_hw(fbdev);
+ }
+ return 0;
+}
+
+static const struct of_device_id intelvipfb_match[] = {
+ { .compatible = "intel,vip-frame-buffer2" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, intelvipfb_match);
+
+static struct platform_driver intelvipfb_driver = {
+ .probe = intelvipfb_probe,
+ .remove = intelvipfb_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .of_match_table = intelvipfb_match,
+ },
+};
+module_platform_driver(intelvipfb_driver);
+
+MODULE_DESCRIPTION("Intel VIP Frame Buffer II driver");
+MODULE_AUTHOR("Chris Rauer <christopher.rauer@intel.com>");
+MODULE_LICENSE("GPL v2");
+
--
1.7.1
^ permalink raw reply related
* Re: [PATCHv2 03/10] mmc: dw_mmc: change the DW_MCI_FREQ_MIN from 400K to 100K
From: Shawn Lin @ 2016-11-16 9:06 UTC (permalink / raw)
To: Jaehoon Chung, linux-mmc-u79uwXL29TY76Z2rM5mHXA
Cc: shawn.lin-TNX95d0MmH7DzftRWevZcw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, heiko-4mtYJXux2i+zQB+pC5nmwQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <20161115101232.3854-4-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
在 2016/11/15 18:12, Jaehoon Chung 写道:
> If there is no property "clock-freq-min-max", mmc->f_min should be set
> to 400K by default. But Some SoC can be used 100K.
> When 100K is used, MMC core will try to check from 400K to 100K.
>
> Reported-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Tested-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
It makes more sense that the original 400KHz, thanks for improving
that.
Reviewed-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---
> drivers/mmc/host/dw_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index 6c0c4c5..be36f48 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -54,7 +54,7 @@
> #define DW_MCI_DMA_THRESHOLD 16
>
> #define DW_MCI_FREQ_MAX 200000000 /* unit: HZ */
> -#define DW_MCI_FREQ_MIN 400000 /* unit: HZ */
> +#define DW_MCI_FREQ_MIN 100000 /* unit: HZ */
>
> #define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
> SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \
>
--
Best Regards
Shawn Lin
--
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^ permalink raw reply
* Re: [PATCHv2 01/10] mmc: dw_mmc: display the real register value on debugfs
From: Shawn Lin @ 2016-11-16 9:04 UTC (permalink / raw)
To: Jaehoon Chung
Cc: linux-mmc-u79uwXL29TY76Z2rM5mHXA,
shawn.lin-TNX95d0MmH7DzftRWevZcw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
ulf.hansson-QSEj5FYQhm4dnm+yROfE0A, heiko-4mtYJXux2i+zQB+pC5nmwQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <20161115101232.3854-2-jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
在 2016/11/15 18:12, Jaehoon Chung 写道:
> Developer wants to see the real register value, not register offset.
> This patch fixed to display the real value of register.
>
IIRC, you had submited some similar patch but I don't remember
why it wasn't merged?
Anyway,
Reviewed-by: Shawn Lin <shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Jaehoon Chung <jh80.chung-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Tested-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
> ---
> drivers/mmc/host/dw_mmc.c | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
> index a16c537..e53899e 100644
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -165,12 +165,14 @@ static const struct file_operations dw_mci_req_fops = {
>
> static int dw_mci_regs_show(struct seq_file *s, void *v)
> {
> - seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS);
> - seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS);
> - seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD);
> - seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL);
> - seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK);
> - seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA);
> + struct dw_mci *host = s->private;
> +
> + seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS));
> + seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS));
> + seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD));
> + seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL));
> + seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK));
> + seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA));
>
> return 0;
> }
>
--
Best Regards
Shawn Lin
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