* Re: [PATCH V8 2/6] thermal: bcm2835: add thermal driver for bcm2835 soc
From: Eduardo Valentin @ 2016-11-19 4:22 UTC (permalink / raw)
To: kernel-TqfNSX0MhmxHKSADF0wUEw
Cc: Zhang Rui, Rob Herring, Pawel Moll, Mark Rutland, Stephen Warren,
Lee Jones, Eric Anholt, Russell King, Florian Fainelli,
Catalin Marinas, Will Deacon, linux-pm-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <7957B3CC-0E18-4B27-82EB-EF88B7695E28-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
Hello Martin,
Thanks for your patience to take the time to explain to me how the
firmware/linux split is done in your platform. Still, one thing is not
clear to me.
On Fri, Nov 18, 2016 at 09:32:47AM +0100, kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org wrote:
>
> The way that firmware works on the RPI is quite different from most others I guess.
> in principle you got 2 different CPUs on the bcm2835:
> * ARM, which runs the linux instance
> * VideoCore 4, which runs the firmware (loading from SD initially) and
> then booting the ARM.
>
> So this Firmware on VC4 is the one that I am talking about.
> Without the working firmware linux can not boot on arm.
Given that "without the working firmware linux can not boot on arm",
(...)
> As far as I understand the conversion is continuous (as soon as the HW is
> configured). This case is there primarily to handle the situation where
> we initialize the HW ourselves (see line 226 and below), and we immediately
and around line 226 we have the comment:
+ /*
+ * right now the FW does set up the HW-block, so we are not
+ * touching the configuration registers.
+ * But if the HW is not enabled, then set it up
+ * using "sane" values used by the firmware right now.
+ */
> want to read the ADC value before the first conversion is finished.
>
then, does the firmware initializes the device or not?
What are the cases you would load this driver but still get an
uninitialized device? That looks like some bug workaround hidden
somewhere. Do system integrators/engineers need to be aware of this w/a?
Would the driver work right aways when the subsystem is loaded during
boot? How about module insertion?
Who has the ownership of this device?
> The above mentioned “configuration if not running” reflect the values that
> the FW is currently setting. We should not change those values as long as the
> Firmware is also reading the temperature on its own.
hmm.. that looks like racy to me. Again, How do you synchronize accesses to
this device? What if you configure the device and right after the
firmware updates the configs? How do you make sure the configs you are
writing here are the same used by the firmware? What if the firmware
version changes? What versions of the firmware does this driver support?
Would it make sense to simply always initialize the device? Do you have
a way to tell the firmware that it should not use the device?
Or, if you want to keep the device driver simply being a dummy reader,
would it make sense to simply avoid writing configurations to the
device, and simply retry to check if the firmware gets the device
initialized?
>
> >
> >> So do you need another version of the patchset that uses that new API?
> >
> > I think the API usage is change that can be done together with
> > clarification for the above questions too: on hardware state,
> > firmware loading, maybe a master driver dependency, and the ADC
> > conversion sequence, which are not well clear to me on this driver. As long as
> > this is clarified and documented in the code (can be simple comments so
> > it is clear to whoever reads in the future), then I would be OK with
> > this driver.
>
> So how do you want this to get “documented” in the driver?
> The setup and Firmware is a generic feature of the SOC, so if we would put
> some clarifications in this driver, then we would need to put it in every
> bcm283X driver (which seems unreasonable).
>
I think a simple comment explaining the firmware dependency and the
expected pre-conditions to get this driver working in a sane state would
do it.
A better device initialization would also be appreciated. Based on my
limited understanding of this platform, and your explanations, this
device seams to have a serious race condition with firmware while
accessing this device.
> Thanks,
> Martin
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^ permalink raw reply
* Re: [PATCH] mtd/spi-nor: Add SPI memory controllers for Aspeed SoCs
From: Cédric Le Goater @ 2016-11-19 6:36 UTC (permalink / raw)
To: Rob Herring
Cc: Milton Miller, devicetree, linux-mtd, Joel Stanley, Brian Norris,
David Woodhouse
In-Reply-To: <20161018163913.7z337iyc53atp4yd@rob-hp-laptop>
Hello Rob,
>> +Example:
>> +
>> +fmc: fmc@1e620000 {
>> + compatible = "aspeed,ast2400-fmc";
>> + reg = < 0x1e620000 0x94
>> + 0x20000000 0x02000000
>> + 0x22000000 0x02000000 >;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + flash@0 {
>> + reg = < 0 >;
>> + compatible = "jedec,spi-nor" ;
>> + label = "bmc";
>
> label isn't really a defined property here. Belongs in jedec,spi-nor
> binding if you want to add it.
>
I am not sure I understand the suggestion.
Do you mean that we should rename the device node to something
like "bmc@0" to identify a flash module on the system ?
This is a bit problematic for user space today as we need to sort
out which flash modules are for the BMC or for the host, each having
a primary and alternate. So the "label" was a practical way for
identification.
Thanks,
C.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply
* [PATCH] ARM: dts: msm8916: Add and enable wcnss node
From: Bjorn Andersson @ 2016-11-19 6:42 UTC (permalink / raw)
To: Andy Gross, David Brown
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
linux-soc-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Add the wcnss remoteproc node the SMD edge and the wcnss ctrl, bluetooth
and wifi nodes specified and enable this on db410c.
Signed-off-by: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
This still require the last wcn36xx and scm-interrupted patches to land, but as
those won't affect the dts I'm posting this anyway.
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 4 ++
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 13 ++++++
arch/arm64/boot/dts/qcom/msm8916.dtsi | 73 +++++++++++++++++++++++++++++-
3 files changed, 89 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 08bd5ebafb4e..716d3ccbc309 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -306,6 +306,10 @@
};
};
};
+
+ wcnss@a21b000 {
+ status = "okay";
+ };
};
usb2513 {
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 10c83e11c272..4cb0b5834143 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -720,4 +720,17 @@
};
};
};
+
+ wcnss_pin_a: wcnss-active {
+ pinmux {
+ pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "wcss_wlan";
+ };
+
+ pinconf {
+ pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <6>;
+ bias-pull-up;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 4221b7d2c0ce..2c692650ae43 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -14,6 +14,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8916.h>
#include <dt-bindings/reset/qcom,gcc-msm8916.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
/ {
model = "Qualcomm Technologies, Inc. MSM8916";
@@ -82,7 +83,7 @@
no-map;
};
- wcnss@89300000 {
+ wcnss_mem: wcnss@89300000 {
reg = <0x0 0x89300000 0x0 0x600000>;
no-map;
};
@@ -853,6 +854,76 @@
memory-region = <&mpss_mem>;
};
};
+
+ pronto: wcnss@a21b000 {
+ compatible = "qcom,pronto-v2-pil", "qcom,pronto";
+ reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
+ reg-names = "ccu", "dxe", "pmu";
+
+ memory-region = <&wcnss_mem>;
+
+ interrupts-extended = <&intc 0 149 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
+
+ vddmx-supply = <&pm8916_l3>;
+ vddpx-supply = <&pm8916_l7>;
+
+ qcom,state = <&wcnss_smp2p_out 0>;
+ qcom,state-names = "stop";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wcnss_pin_a>;
+
+ status = "disabled";
+
+ iris {
+ compatible = "qcom,wcn3620";
+
+ clocks = <&rpmcc RPM_SMD_RF_CLK2>;
+ clock-names = "xo";
+
+ vddxo-supply = <&pm8916_l7>;
+ vddrfa-supply = <&pm8916_s3>;
+ vddpa-supply = <&pm8916_l9>;
+ vdddig-supply = <&pm8916_l5>;
+ };
+
+ smd-edge {
+ interrupts = <0 142 1>;
+
+ qcom,ipc = <&apcs 8 17>;
+ qcom,smd-edge = <6>;
+ qcom,remote-pid = <4>;
+
+ label = "pronto";
+
+ wcnss {
+ compatible = "qcom,wcnss";
+ qcom,smd-channels = "WCNSS_CTRL";
+
+ qcom,mmio = <&pronto>;
+
+ bt {
+ compatible = "qcom,wcnss-bt";
+ };
+
+ wifi {
+ compatible = "qcom,wcnss-wlan";
+
+ interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>,
+ <0 146 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+
+ qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
+ qcom,smem-state-names = "tx-enable", "tx-rings-empty";
+ };
+ };
+ };
+ };
};
smd {
--
2.5.0
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^ permalink raw reply related
* Re: [PATCH v8] mwifiex: parse device tree node for PCIe
From: Kalle Valo @ 2016-11-19 6:56 UTC (permalink / raw)
To: Rajat Jain
Cc: Amitkumar Karwar, linux-wireless-u79uwXL29TY76Z2rM5mHXA,
Cathy Luo, Nishant Sarmukadam, Brian Norris, Dmitry Torokhov,
devicetree-u79uwXL29TY76Z2rM5mHXA, Xinming Hu
In-Reply-To: <CACK8Z6EAXTd07ZK3Y6Hy=7iGEY0fN91gO9Tz0NMh+shDAJoc+A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Rajat Jain <rajatja-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> writes:
> On Fri, Nov 18, 2016 at 8:21 AM, Kalle Valo <kvalo-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> wrote:
>
> > @@ -10,6 +10,8 @@ Required properties:
> > - compatible : should be one of the following:
> > * "marvell,sd8897"
> > * "marvell,sd8997"
> > + * "pci11ab,2b42"
> > + * "pci1b4b,2b42"
>
> Are these correct? In v6 Rob said:
>
> "I think I already said this, but you have the vendor and product IDs
> reversed."
>
> https://patchwork.kernel.org/patch/9390225/
>
>
>
> I had responded to it:
>
>
> Hi Rob,
>
>> I think I already said this, but you have the vendor and product IDs
>> reversed.
>
> Actually Marvell has 2 vendor IDs assigned to it. In include/linux/pci_ids.h:
>
> #define PCI_VENDOR_ID_MARVELL 0x11ab
> #define PCI_VENDOR_ID_MARVELL_EXT 0x1b4b
>
> So in this case the compatible property describes a single product ID,
> with both possible vendor IDs.
Ok, I missed that.
BTW, please avoid using HTML. text/plain is very much preferred.
--
Kalle Valo
^ permalink raw reply
* Re: [v8] mwifiex: parse device tree node for PCIe
From: Kalle Valo @ 2016-11-19 7:11 UTC (permalink / raw)
Cc: linux-wireless-u79uwXL29TY76Z2rM5mHXA, Cathy Luo,
Nishant Sarmukadam, rajatja-hpIqsD4AKlfQT0dZR+AlfA,
briannorris-hpIqsD4AKlfQT0dZR+AlfA,
dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
devicetree-u79uwXL29TY76Z2rM5mHXA, Xinming Hu, Amitkumar Karwar
In-Reply-To: <1479472624-22340-1-git-send-email-akarwar-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
Amitkumar Karwar <akarwar-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org> wrote:
> From: Xinming Hu <huxm-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
>
> This patch derives device tree node from pcie bus layer framework.
> Device tree bindings file has been renamed(marvell-sd8xxx.txt ->
> marvell-8xxx.txt) to accommodate PCIe changes.
>
> Signed-off-by: Xinming Hu <huxm-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> Signed-off-by: Rajat Jain <rajatja-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
> Reviewed-by: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> Signed-off-by: Amitkumar Karwar <akarwar-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Patch applied to wireless-drivers-next.git, thanks.
6b4480d109b0 mwifiex: parse device tree node for PCIe
--
https://patchwork.kernel.org/patch/9436393/
Documentation about submitting wireless patches and checking status
from patchwork:
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
^ permalink raw reply
* Re: [PATCH v3 1/6] Documentation: dt-bindings: Document STM32 ADC DT bindings
From: Jonathan Cameron @ 2016-11-19 11:42 UTC (permalink / raw)
To: Rob Herring, Fabrice Gasnier
Cc: linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
mark.rutland-5wv7dgnIgG8, mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w,
alexandre.torgue-qxv4g6HH51o, lars-Qo5EllUWu/uELgA04lAiVw,
knaack.h-Mmb7MZpHnFY, pmeerw-jW+XmwGofnusTnJN9+BGXg
In-Reply-To: <20161116151549.m6phclc6cqy4lj2y@rob-hp-laptop>
On 16/11/16 15:15, Rob Herring wrote:
> On Tue, Nov 15, 2016 at 04:30:56PM +0100, Fabrice Gasnier wrote:
>> This patch adds documentation of device tree bindings for the STM32 ADC.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
>> ---
>> .../devicetree/bindings/iio/adc/st,stm32-adc.txt | 83 ++++++++++++++++++++++
>> 1 file changed, 83 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Applied to the togreg branch of iio.git.
Thanks,
Jonathan
> --
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>
^ permalink raw reply
* Re: [RFC 2/6] drm/etnaviv: allow building etnaviv on omap devices
From: Joshua Clayton @ 2016-11-19 11:58 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Rob Herring, Robert Nelson, devicetree-u79uwXL29TY76Z2rM5mHXA,
tony-4v6yS6AI5VpBDgjK7y7TUQ, Christian Gmeiner, Russell King,
linux-omap-u79uwXL29TY76Z2rM5mHXA, Lucas Stach
In-Reply-To: <20161118163342.5t2tbsw54k2gmqe3@rob-hp-laptop>
On Friday, November 18, 2016 10:33:42 AM Rob Herring wrote:
> On Thu, Nov 17, 2016 at 08:44:32PM -0600, Robert Nelson wrote:
> > Signed-off-by: Robert Nelson <robertcnelson-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > CC: Christian Gmeiner <christian.gmeiner-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > CC: Russell King <rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
> > CC: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> > ---
> > drivers/gpu/drm/etnaviv/Kconfig | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/etnaviv/Kconfig b/drivers/gpu/drm/etnaviv/Kconfig
> > index 2cde7a5..b776f41 100644
> > --- a/drivers/gpu/drm/etnaviv/Kconfig
> > +++ b/drivers/gpu/drm/etnaviv/Kconfig
> > @@ -2,7 +2,7 @@
> > config DRM_ETNAVIV
> > tristate "ETNAVIV (DRM support for Vivante GPU IP cores)"
> > depends on DRM
> > - depends on ARCH_MXC || ARCH_DOVE
> > + depends on ARCH_MXC || ARCH_DOVE || ARCH_OMAP2PLUS
>
> Why not just drop this line. Then it will get better build testing, too.
>
> > select SHMEM
> > select TMPFS
> > select IOMMU_API
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
...building with ARCH=x86_64
^
drivers/gpu/drm/etnaviv/etnaviv_gpu.c: In function ‘etnaviv_gpu_init’:
drivers/gpu/drm/etnaviv/etnaviv_gpu.c:633:18: error: ‘PHYS_OFFSET’ undeclared (first use in this function)
if (dma_mask < PHYS_OFFSET + SZ_2G)
^
drivers/gpu/drm/etnaviv/etnaviv_gpu.c:633:18: note: each undeclared identifier is reported only once for each function it appears in
make[4]: *** [scripts/Makefile.build:290: drivers/gpu/drm/etnaviv/etnaviv_gpu.o] Error 1
make[3]: *** [scripts/Makefile.build:440: drivers/gpu/drm/etnaviv] Error 2
make[2]: *** [scripts/Makefile.build:440: drivers/gpu/drm] Error 2
make[1]: *** [scripts/Makefile.build:440: drivers/gpu] Error 2
make: *** [Makefile:968: drivers] Error 2
...looks like this snippit is the only (compile time) problem:
622 /*
623 * Set the GPU linear window to be at the end of the DMA window, where
624 * the CMA area is likely to reside. This ensures that we are able to
625 * map the command buffers while having the linear window overlap as
626 * much RAM as possible, so we can optimize mappings for other buffers.
627 *
628 * For 3D cores only do this if MC2.0 is present, as with MC1.0 it leads
629 * to different views of the memory on the individual engines.
630 */
631 if (!(gpu->identity.features & chipFeatures_PIPE_3D) ||
632 (gpu->identity.minor_features0 & chipMinorFeatures0_MC20)) {
633 u32 dma_mask = (u32)dma_get_required_mask(gpu->dev);
634 if (dma_mask < PHYS_OFFSET + SZ_2G)
635 gpu->memory_base = PHYS_OFFSET;
636 else
637 gpu->memory_base = dma_mask - SZ_2G + 1;
638 }
Joshua
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^ permalink raw reply
* Re: [PATCH v3 2/6] iio: adc: Add support for STM32 ADC core
From: Jonathan Cameron @ 2016-11-19 12:17 UTC (permalink / raw)
To: Fabrice Gasnier, linux-iio, linux-arm-kernel, devicetree,
linux-kernel
Cc: linux, robh+dt, mark.rutland, mcoquelin.stm32, alexandre.torgue,
lars, knaack.h, pmeerw
In-Reply-To: <1479223861-21747-3-git-send-email-fabrice.gasnier@st.com>
On 15/11/16 15:30, Fabrice Gasnier wrote:
> Add core driver for STMicroelectronics STM32 ADC (Analog to Digital
> Converter). STM32 ADC can be composed of up to 3 ADCs with shared
> resources like clock prescaler, common interrupt line and analog
> reference voltage.
> This core driver basically manages shared resources.
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
There is nothing in here that demands selecting a fixed regulator.
I've also switched the select regulator over to depends on inline with
other drivers in IIO that have a hard dependency on regulators.
Other than that which showed up during build tests, looks good to me.
Shout if I've broken anything with this change.
Applied to the togreg branch of iio.git and pushed out as testing for
the autobuilders to play with it.
Thanks,
Jonathan
> ---
> drivers/iio/adc/Kconfig | 13 ++
> drivers/iio/adc/Makefile | 1 +
> drivers/iio/adc/stm32-adc-core.c | 303 +++++++++++++++++++++++++++++++++++++++
> drivers/iio/adc/stm32-adc-core.h | 52 +++++++
> 4 files changed, 369 insertions(+)
> create mode 100644 drivers/iio/adc/stm32-adc-core.c
> create mode 100644 drivers/iio/adc/stm32-adc-core.h
>
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 7edcf32..ff30239 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -419,6 +419,19 @@ config ROCKCHIP_SARADC
> To compile this driver as a module, choose M here: the
> module will be called rockchip_saradc.
>
> +config STM32_ADC_CORE
> + tristate "STMicroelectronics STM32 adc core"
> + depends on ARCH_STM32 || COMPILE_TEST
> + depends on OF
> + select REGULATOR
> + select REGULATOR_FIXED_VOLTAGE
> + help
> + Select this option to enable the core driver for STMicroelectronics
> + STM32 analog-to-digital converter (ADC).
> +
> + This driver can also be built as a module. If so, the module
> + will be called stm32-adc-core.
> +
> config STX104
> tristate "Apex Embedded Systems STX104 driver"
> depends on X86 && ISA_BUS_API
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 7a40c04..a1e8f44 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -41,6 +41,7 @@ obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
> obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
> obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
> obj-$(CONFIG_STX104) += stx104.o
> +obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
> obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
> obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
> obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
> diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c
> new file mode 100644
> index 0000000..4214b0c
> --- /dev/null
> +++ b/drivers/iio/adc/stm32-adc-core.c
> @@ -0,0 +1,303 @@
> +/*
> + * This file is part of STM32 ADC driver
> + *
> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
> + * Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
> + *
> + * Inspired from: fsl-imx25-tsadc
> + *
> + * License type: GPLv2
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> + * or FITNESS FOR A PARTICULAR PURPOSE.
> + * See the GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License along with
> + * this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/interrupt.h>
> +#include <linux/irqchip/chained_irq.h>
> +#include <linux/irqdesc.h>
> +#include <linux/irqdomain.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/slab.h>
> +
> +#include "stm32-adc-core.h"
> +
> +/* STM32F4 - common registers for all ADC instances: 1, 2 & 3 */
> +#define STM32F4_ADC_CSR (STM32_ADCX_COMN_OFFSET + 0x00)
> +#define STM32F4_ADC_CCR (STM32_ADCX_COMN_OFFSET + 0x04)
> +
> +/* STM32F4_ADC_CSR - bit fields */
> +#define STM32F4_EOC3 BIT(17)
> +#define STM32F4_EOC2 BIT(9)
> +#define STM32F4_EOC1 BIT(1)
> +
> +/* STM32F4_ADC_CCR - bit fields */
> +#define STM32F4_ADC_ADCPRE_SHIFT 16
> +#define STM32F4_ADC_ADCPRE_MASK GENMASK(17, 16)
> +
> +/* STM32 F4 maximum analog clock rate (from datasheet) */
> +#define STM32F4_ADC_MAX_CLK_RATE 36000000
> +
> +/**
> + * struct stm32_adc_priv - stm32 ADC core private data
> + * @irq: irq for ADC block
> + * @domain: irq domain reference
> + * @aclk: clock reference for the analog circuitry
> + * @vref: regulator reference
> + * @common: common data for all ADC instances
> + */
> +struct stm32_adc_priv {
> + int irq;
> + struct irq_domain *domain;
> + struct clk *aclk;
> + struct regulator *vref;
> + struct stm32_adc_common common;
> +};
> +
> +static struct stm32_adc_priv *to_stm32_adc_priv(struct stm32_adc_common *com)
> +{
> + return container_of(com, struct stm32_adc_priv, common);
> +}
> +
> +/* STM32F4 ADC internal common clock prescaler division ratios */
> +static int stm32f4_pclk_div[] = {2, 4, 6, 8};
> +
> +/**
> + * stm32f4_adc_clk_sel() - Select stm32f4 ADC common clock prescaler
> + * @priv: stm32 ADC core private data
> + * Select clock prescaler used for analog conversions, before using ADC.
> + */
> +static int stm32f4_adc_clk_sel(struct platform_device *pdev,
> + struct stm32_adc_priv *priv)
> +{
> + unsigned long rate;
> + u32 val;
> + int i;
> +
> + rate = clk_get_rate(priv->aclk);
> + for (i = 0; i < ARRAY_SIZE(stm32f4_pclk_div); i++) {
> + if ((rate / stm32f4_pclk_div[i]) <= STM32F4_ADC_MAX_CLK_RATE)
> + break;
> + }
> + if (i >= ARRAY_SIZE(stm32f4_pclk_div))
> + return -EINVAL;
> +
> + val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR);
> + val &= ~STM32F4_ADC_ADCPRE_MASK;
> + val |= i << STM32F4_ADC_ADCPRE_SHIFT;
> + writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR);
> +
> + dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n",
> + rate / (stm32f4_pclk_div[i] * 1000));
> +
> + return 0;
> +}
> +
> +/* ADC common interrupt for all instances */
> +static void stm32_adc_irq_handler(struct irq_desc *desc)
> +{
> + struct stm32_adc_priv *priv = irq_desc_get_handler_data(desc);
> + struct irq_chip *chip = irq_desc_get_chip(desc);
> + u32 status;
> +
> + chained_irq_enter(chip, desc);
> + status = readl_relaxed(priv->common.base + STM32F4_ADC_CSR);
> +
> + if (status & STM32F4_EOC1)
> + generic_handle_irq(irq_find_mapping(priv->domain, 0));
> +
> + if (status & STM32F4_EOC2)
> + generic_handle_irq(irq_find_mapping(priv->domain, 1));
> +
> + if (status & STM32F4_EOC3)
> + generic_handle_irq(irq_find_mapping(priv->domain, 2));
> +
> + chained_irq_exit(chip, desc);
> +};
> +
> +static int stm32_adc_domain_map(struct irq_domain *d, unsigned int irq,
> + irq_hw_number_t hwirq)
> +{
> + irq_set_chip_data(irq, d->host_data);
> + irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_level_irq);
> +
> + return 0;
> +}
> +
> +static void stm32_adc_domain_unmap(struct irq_domain *d, unsigned int irq)
> +{
> + irq_set_chip_and_handler(irq, NULL, NULL);
> + irq_set_chip_data(irq, NULL);
> +}
> +
> +static const struct irq_domain_ops stm32_adc_domain_ops = {
> + .map = stm32_adc_domain_map,
> + .unmap = stm32_adc_domain_unmap,
> + .xlate = irq_domain_xlate_onecell,
> +};
> +
> +static int stm32_adc_irq_probe(struct platform_device *pdev,
> + struct stm32_adc_priv *priv)
> +{
> + struct device_node *np = pdev->dev.of_node;
> +
> + priv->irq = platform_get_irq(pdev, 0);
> + if (priv->irq < 0) {
> + dev_err(&pdev->dev, "failed to get irq\n");
> + return priv->irq;
> + }
> +
> + priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0,
> + &stm32_adc_domain_ops,
> + priv);
> + if (!priv->domain) {
> + dev_err(&pdev->dev, "Failed to add irq domain\n");
> + return -ENOMEM;
> + }
> +
> + irq_set_chained_handler(priv->irq, stm32_adc_irq_handler);
> + irq_set_handler_data(priv->irq, priv);
> +
> + return 0;
> +}
> +
> +static void stm32_adc_irq_remove(struct platform_device *pdev,
> + struct stm32_adc_priv *priv)
> +{
> + int hwirq;
> +
> + for (hwirq = 0; hwirq < STM32_ADC_MAX_ADCS; hwirq++)
> + irq_dispose_mapping(irq_find_mapping(priv->domain, hwirq));
> + irq_domain_remove(priv->domain);
> + irq_set_chained_handler(priv->irq, NULL);
> +}
> +
> +static int stm32_adc_probe(struct platform_device *pdev)
> +{
> + struct stm32_adc_priv *priv;
> + struct device_node *np = pdev->dev.of_node;
> + struct resource *res;
> + int ret;
> +
> + if (!pdev->dev.of_node)
> + return -ENODEV;
> +
> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + priv->common.base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(priv->common.base))
> + return PTR_ERR(priv->common.base);
> +
> + priv->vref = devm_regulator_get(&pdev->dev, "vref");
> + if (IS_ERR(priv->vref)) {
> + ret = PTR_ERR(priv->vref);
> + dev_err(&pdev->dev, "vref get failed, %d\n", ret);
> + return ret;
> + }
> +
> + ret = regulator_enable(priv->vref);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "vref enable failed\n");
> + return ret;
> + }
> +
> + ret = regulator_get_voltage(priv->vref);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "vref get voltage failed, %d\n", ret);
> + goto err_regulator_disable;
> + }
> + priv->common.vref_mv = ret / 1000;
> + dev_dbg(&pdev->dev, "vref+=%dmV\n", priv->common.vref_mv);
> +
> + priv->aclk = devm_clk_get(&pdev->dev, "adc");
> + if (IS_ERR(priv->aclk)) {
> + ret = PTR_ERR(priv->aclk);
> + dev_err(&pdev->dev, "Can't get 'adc' clock\n");
> + goto err_regulator_disable;
> + }
> +
> + ret = clk_prepare_enable(priv->aclk);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "adc clk enable failed\n");
> + goto err_regulator_disable;
> + }
> +
> + ret = stm32f4_adc_clk_sel(pdev, priv);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "adc clk selection failed\n");
> + goto err_clk_disable;
> + }
> +
> + ret = stm32_adc_irq_probe(pdev, priv);
> + if (ret < 0)
> + goto err_clk_disable;
> +
> + platform_set_drvdata(pdev, &priv->common);
> +
> + ret = of_platform_populate(np, NULL, NULL, &pdev->dev);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "failed to populate DT children\n");
> + goto err_irq_remove;
> + }
> +
> + return 0;
> +
> +err_irq_remove:
> + stm32_adc_irq_remove(pdev, priv);
> +
> +err_clk_disable:
> + clk_disable_unprepare(priv->aclk);
> +
> +err_regulator_disable:
> + regulator_disable(priv->vref);
> +
> + return ret;
> +}
> +
> +static int stm32_adc_remove(struct platform_device *pdev)
> +{
> + struct stm32_adc_common *common = platform_get_drvdata(pdev);
> + struct stm32_adc_priv *priv = to_stm32_adc_priv(common);
> +
> + of_platform_depopulate(&pdev->dev);
> + stm32_adc_irq_remove(pdev, priv);
> + clk_disable_unprepare(priv->aclk);
> + regulator_disable(priv->vref);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id stm32_adc_of_match[] = {
> + { .compatible = "st,stm32f4-adc-core" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, stm32_adc_of_match);
> +
> +static struct platform_driver stm32_adc_driver = {
> + .probe = stm32_adc_probe,
> + .remove = stm32_adc_remove,
> + .driver = {
> + .name = "stm32-adc-core",
> + .of_match_table = stm32_adc_of_match,
> + },
> +};
> +module_platform_driver(stm32_adc_driver);
> +
> +MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
> +MODULE_DESCRIPTION("STMicroelectronics STM32 ADC core driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:stm32-adc-core");
> diff --git a/drivers/iio/adc/stm32-adc-core.h b/drivers/iio/adc/stm32-adc-core.h
> new file mode 100644
> index 0000000..081fa5f
> --- /dev/null
> +++ b/drivers/iio/adc/stm32-adc-core.h
> @@ -0,0 +1,52 @@
> +/*
> + * This file is part of STM32 ADC driver
> + *
> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
> + * Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
> + *
> + * License type: GPLv2
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> + * or FITNESS FOR A PARTICULAR PURPOSE.
> + * See the GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License along with
> + * this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef __STM32_ADC_H
> +#define __STM32_ADC_H
> +
> +/*
> + * STM32 - ADC global register map
> + * ________________________________________________________
> + * | Offset | Register |
> + * --------------------------------------------------------
> + * | 0x000 | Master ADC1 |
> + * --------------------------------------------------------
> + * | 0x100 | Slave ADC2 |
> + * --------------------------------------------------------
> + * | 0x200 | Slave ADC3 |
> + * --------------------------------------------------------
> + * | 0x300 | Master & Slave common regs |
> + * --------------------------------------------------------
> + */
> +#define STM32_ADC_MAX_ADCS 3
> +#define STM32_ADCX_COMN_OFFSET 0x300
> +
> +/**
> + * struct stm32_adc_common - stm32 ADC driver common data (for all instances)
> + * @base: control registers base cpu addr
> + * @vref_mv: vref voltage (mv)
> + */
> +struct stm32_adc_common {
> + void __iomem *base;
> + int vref_mv;
> +};
> +
> +#endif
>
^ permalink raw reply
* Re: [PATCH v3 3/6] iio: adc: Add support for STM32 ADC
From: Jonathan Cameron @ 2016-11-19 12:19 UTC (permalink / raw)
To: Fabrice Gasnier, linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: linux-I+IVW8TIWO2tmTQ+vhA3Yw, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w,
alexandre.torgue-qxv4g6HH51o, lars-Qo5EllUWu/uELgA04lAiVw,
knaack.h-Mmb7MZpHnFY, pmeerw-jW+XmwGofnusTnJN9+BGXg
In-Reply-To: <1479223861-21747-4-git-send-email-fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
On 15/11/16 15:30, Fabrice Gasnier wrote:
> This patch adds support for STMicroelectronics STM32 MCU's analog to
> digital converter.
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.
Very nice driver!
Thanks,
Jonathan
> ---
> drivers/iio/adc/Kconfig | 10 +
> drivers/iio/adc/Makefile | 1 +
> drivers/iio/adc/stm32-adc.c | 518 ++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 529 insertions(+)
> create mode 100644 drivers/iio/adc/stm32-adc.c
>
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index ff30239..f93b990 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -432,6 +432,16 @@ config STM32_ADC_CORE
> This driver can also be built as a module. If so, the module
> will be called stm32-adc-core.
>
> +config STM32_ADC
> + tristate "STMicroelectronics STM32 adc"
> + depends on STM32_ADC_CORE
> + help
> + Say yes here to build support for STMicroelectronics stm32 Analog
> + to Digital Converter (ADC).
> +
> + This driver can also be built as a module. If so, the module
> + will be called stm32-adc.
> +
> config STX104
> tristate "Apex Embedded Systems STX104 driver"
> depends on X86 && ISA_BUS_API
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index a1e8f44..8e02a94 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -42,6 +42,7 @@ obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
> obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
> obj-$(CONFIG_STX104) += stx104.o
> obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
> +obj-$(CONFIG_STM32_ADC) += stm32-adc.o
> obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
> obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
> obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
> diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
> new file mode 100644
> index 0000000..5715e79
> --- /dev/null
> +++ b/drivers/iio/adc/stm32-adc.c
> @@ -0,0 +1,518 @@
> +/*
> + * This file is part of STM32 ADC driver
> + *
> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
> + * Author: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>.
> + *
> + * License type: GPLv2
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published by
> + * the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> + * or FITNESS FOR A PARTICULAR PURPOSE.
> + * See the GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License along with
> + * this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/iio/iio.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/of.h>
> +
> +#include "stm32-adc-core.h"
> +
> +/* STM32F4 - Registers for each ADC instance */
> +#define STM32F4_ADC_SR 0x00
> +#define STM32F4_ADC_CR1 0x04
> +#define STM32F4_ADC_CR2 0x08
> +#define STM32F4_ADC_SMPR1 0x0C
> +#define STM32F4_ADC_SMPR2 0x10
> +#define STM32F4_ADC_HTR 0x24
> +#define STM32F4_ADC_LTR 0x28
> +#define STM32F4_ADC_SQR1 0x2C
> +#define STM32F4_ADC_SQR2 0x30
> +#define STM32F4_ADC_SQR3 0x34
> +#define STM32F4_ADC_JSQR 0x38
> +#define STM32F4_ADC_JDR1 0x3C
> +#define STM32F4_ADC_JDR2 0x40
> +#define STM32F4_ADC_JDR3 0x44
> +#define STM32F4_ADC_JDR4 0x48
> +#define STM32F4_ADC_DR 0x4C
> +
> +/* STM32F4_ADC_SR - bit fields */
> +#define STM32F4_STRT BIT(4)
> +#define STM32F4_EOC BIT(1)
> +
> +/* STM32F4_ADC_CR1 - bit fields */
> +#define STM32F4_SCAN BIT(8)
> +#define STM32F4_EOCIE BIT(5)
> +
> +/* STM32F4_ADC_CR2 - bit fields */
> +#define STM32F4_SWSTART BIT(30)
> +#define STM32F4_EXTEN_MASK GENMASK(29, 28)
> +#define STM32F4_EOCS BIT(10)
> +#define STM32F4_ADON BIT(0)
> +
> +/* STM32F4_ADC_SQR1 - bit fields */
> +#define STM32F4_L_SHIFT 20
> +#define STM32F4_L_MASK GENMASK(23, 20)
> +
> +/* STM32F4_ADC_SQR3 - bit fields */
> +#define STM32F4_SQ1_SHIFT 0
> +#define STM32F4_SQ1_MASK GENMASK(4, 0)
> +
> +#define STM32_ADC_TIMEOUT_US 100000
> +#define STM32_ADC_TIMEOUT (msecs_to_jiffies(STM32_ADC_TIMEOUT_US / 1000))
> +
> +/**
> + * struct stm32_adc - private data of each ADC IIO instance
> + * @common: reference to ADC block common data
> + * @offset: ADC instance register offset in ADC block
> + * @completion: end of single conversion completion
> + * @buffer: data buffer
> + * @clk: clock for this adc instance
> + * @irq: interrupt for this adc instance
> + * @lock: spinlock
> + */
> +struct stm32_adc {
> + struct stm32_adc_common *common;
> + u32 offset;
> + struct completion completion;
> + u16 *buffer;
> + struct clk *clk;
> + int irq;
> + spinlock_t lock; /* interrupt lock */
> +};
> +
> +/**
> + * struct stm32_adc_chan_spec - specification of stm32 adc channel
> + * @type: IIO channel type
> + * @channel: channel number (single ended)
> + * @name: channel name (single ended)
> + */
> +struct stm32_adc_chan_spec {
> + enum iio_chan_type type;
> + int channel;
> + const char *name;
> +};
> +
> +/* Input definitions common for all STM32F4 instances */
> +static const struct stm32_adc_chan_spec stm32f4_adc123_channels[] = {
> + { IIO_VOLTAGE, 0, "in0" },
> + { IIO_VOLTAGE, 1, "in1" },
> + { IIO_VOLTAGE, 2, "in2" },
> + { IIO_VOLTAGE, 3, "in3" },
> + { IIO_VOLTAGE, 4, "in4" },
> + { IIO_VOLTAGE, 5, "in5" },
> + { IIO_VOLTAGE, 6, "in6" },
> + { IIO_VOLTAGE, 7, "in7" },
> + { IIO_VOLTAGE, 8, "in8" },
> + { IIO_VOLTAGE, 9, "in9" },
> + { IIO_VOLTAGE, 10, "in10" },
> + { IIO_VOLTAGE, 11, "in11" },
> + { IIO_VOLTAGE, 12, "in12" },
> + { IIO_VOLTAGE, 13, "in13" },
> + { IIO_VOLTAGE, 14, "in14" },
> + { IIO_VOLTAGE, 15, "in15" },
> +};
> +
> +/**
> + * STM32 ADC registers access routines
> + * @adc: stm32 adc instance
> + * @reg: reg offset in adc instance
> + *
> + * Note: All instances share same base, with 0x0, 0x100 or 0x200 offset resp.
> + * for adc1, adc2 and adc3.
> + */
> +static u32 stm32_adc_readl(struct stm32_adc *adc, u32 reg)
> +{
> + return readl_relaxed(adc->common->base + adc->offset + reg);
> +}
> +
> +static u16 stm32_adc_readw(struct stm32_adc *adc, u32 reg)
> +{
> + return readw_relaxed(adc->common->base + adc->offset + reg);
> +}
> +
> +static void stm32_adc_writel(struct stm32_adc *adc, u32 reg, u32 val)
> +{
> + writel_relaxed(val, adc->common->base + adc->offset + reg);
> +}
> +
> +static void stm32_adc_set_bits(struct stm32_adc *adc, u32 reg, u32 bits)
> +{
> + unsigned long flags;
> +
> + spin_lock_irqsave(&adc->lock, flags);
> + stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) | bits);
> + spin_unlock_irqrestore(&adc->lock, flags);
> +}
> +
> +static void stm32_adc_clr_bits(struct stm32_adc *adc, u32 reg, u32 bits)
> +{
> + unsigned long flags;
> +
> + spin_lock_irqsave(&adc->lock, flags);
> + stm32_adc_writel(adc, reg, stm32_adc_readl(adc, reg) & ~bits);
> + spin_unlock_irqrestore(&adc->lock, flags);
> +}
> +
> +/**
> + * stm32_adc_conv_irq_enable() - Enable end of conversion interrupt
> + * @adc: stm32 adc instance
> + */
> +static void stm32_adc_conv_irq_enable(struct stm32_adc *adc)
> +{
> + stm32_adc_set_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
> +};
> +
> +/**
> + * stm32_adc_conv_irq_disable() - Disable end of conversion interrupt
> + * @adc: stm32 adc instance
> + */
> +static void stm32_adc_conv_irq_disable(struct stm32_adc *adc)
> +{
> + stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_EOCIE);
> +}
> +
> +/**
> + * stm32_adc_start_conv() - Start conversions for regular channels.
> + * @adc: stm32 adc instance
> + */
> +static void stm32_adc_start_conv(struct stm32_adc *adc)
> +{
> + stm32_adc_set_bits(adc, STM32F4_ADC_CR1, STM32F4_SCAN);
> + stm32_adc_set_bits(adc, STM32F4_ADC_CR2, STM32F4_EOCS | STM32F4_ADON);
> +
> + /* Wait for Power-up time (tSTAB from datasheet) */
> + usleep_range(2, 3);
> +
> + /* Software start ? (e.g. trigger detection disabled ?) */
> + if (!(stm32_adc_readl(adc, STM32F4_ADC_CR2) & STM32F4_EXTEN_MASK))
> + stm32_adc_set_bits(adc, STM32F4_ADC_CR2, STM32F4_SWSTART);
> +}
> +
> +static void stm32_adc_stop_conv(struct stm32_adc *adc)
> +{
> + stm32_adc_clr_bits(adc, STM32F4_ADC_CR2, STM32F4_EXTEN_MASK);
> + stm32_adc_clr_bits(adc, STM32F4_ADC_SR, STM32F4_STRT);
> +
> + stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_SCAN);
> + stm32_adc_clr_bits(adc, STM32F4_ADC_CR2, STM32F4_ADON);
> +}
> +
> +/**
> + * stm32_adc_single_conv() - Performs a single conversion
> + * @indio_dev: IIO device
> + * @chan: IIO channel
> + * @res: conversion result
> + *
> + * The function performs a single conversion on a given channel:
> + * - Program sequencer with one channel (e.g. in SQ1 with len = 1)
> + * - Use SW trigger
> + * - Start conversion, then wait for interrupt completion.
> + */
> +static int stm32_adc_single_conv(struct iio_dev *indio_dev,
> + const struct iio_chan_spec *chan,
> + int *res)
> +{
> + struct stm32_adc *adc = iio_priv(indio_dev);
> + long timeout;
> + u32 val;
> + u16 result;
> + int ret;
> +
> + reinit_completion(&adc->completion);
> +
> + adc->buffer = &result;
> +
> + /* Program chan number in regular sequence */
> + val = stm32_adc_readl(adc, STM32F4_ADC_SQR3);
> + val &= ~STM32F4_SQ1_MASK;
> + val |= chan->channel << STM32F4_SQ1_SHIFT;
> + stm32_adc_writel(adc, STM32F4_ADC_SQR3, val);
> +
> + /* Set regular sequence len (0 for 1 conversion) */
> + stm32_adc_clr_bits(adc, STM32F4_ADC_SQR1, STM32F4_L_MASK);
> +
> + /* Trigger detection disabled (conversion can be launched in SW) */
> + stm32_adc_clr_bits(adc, STM32F4_ADC_CR2, STM32F4_EXTEN_MASK);
> +
> + stm32_adc_conv_irq_enable(adc);
> +
> + stm32_adc_start_conv(adc);
> +
> + timeout = wait_for_completion_interruptible_timeout(
> + &adc->completion, STM32_ADC_TIMEOUT);
> + if (timeout == 0) {
> + ret = -ETIMEDOUT;
> + } else if (timeout < 0) {
> + ret = timeout;
> + } else {
> + *res = result;
> + ret = IIO_VAL_INT;
> + }
> +
> + stm32_adc_stop_conv(adc);
> +
> + stm32_adc_conv_irq_disable(adc);
> +
> + return ret;
> +}
> +
> +static int stm32_adc_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int *val, int *val2, long mask)
> +{
> + struct stm32_adc *adc = iio_priv(indio_dev);
> + int ret;
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + ret = iio_device_claim_direct_mode(indio_dev);
> + if (ret)
> + return ret;
> + if (chan->type == IIO_VOLTAGE)
> + ret = stm32_adc_single_conv(indio_dev, chan, val);
> + else
> + ret = -EINVAL;
> + iio_device_release_direct_mode(indio_dev);
> + return ret;
> +
> + case IIO_CHAN_INFO_SCALE:
> + *val = adc->common->vref_mv;
> + *val2 = chan->scan_type.realbits;
> + return IIO_VAL_FRACTIONAL_LOG2;
> +
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static irqreturn_t stm32_adc_isr(int irq, void *data)
> +{
> + struct stm32_adc *adc = data;
> + u32 status = stm32_adc_readl(adc, STM32F4_ADC_SR);
> +
> + if (status & STM32F4_EOC) {
> + *adc->buffer = stm32_adc_readw(adc, STM32F4_ADC_DR);
> + complete(&adc->completion);
> + return IRQ_HANDLED;
> + }
> +
> + return IRQ_NONE;
> +}
> +
> +static int stm32_adc_of_xlate(struct iio_dev *indio_dev,
> + const struct of_phandle_args *iiospec)
> +{
> + int i;
> +
> + for (i = 0; i < indio_dev->num_channels; i++)
> + if (indio_dev->channels[i].channel == iiospec->args[0])
> + return i;
> +
> + return -EINVAL;
> +}
> +
> +/**
> + * stm32_adc_debugfs_reg_access - read or write register value
> + *
> + * To read a value from an ADC register:
> + * echo [ADC reg offset] > direct_reg_access
> + * cat direct_reg_access
> + *
> + * To write a value in a ADC register:
> + * echo [ADC_reg_offset] [value] > direct_reg_access
> + */
> +static int stm32_adc_debugfs_reg_access(struct iio_dev *indio_dev,
> + unsigned reg, unsigned writeval,
> + unsigned *readval)
> +{
> + struct stm32_adc *adc = iio_priv(indio_dev);
> +
> + if (!readval)
> + stm32_adc_writel(adc, reg, writeval);
> + else
> + *readval = stm32_adc_readl(adc, reg);
> +
> + return 0;
> +}
> +
> +static const struct iio_info stm32_adc_iio_info = {
> + .read_raw = stm32_adc_read_raw,
> + .debugfs_reg_access = stm32_adc_debugfs_reg_access,
> + .of_xlate = stm32_adc_of_xlate,
> + .driver_module = THIS_MODULE,
> +};
> +
> +static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
> + struct iio_chan_spec *chan,
> + const struct stm32_adc_chan_spec *channel,
> + int scan_index)
> +{
> + chan->type = channel->type;
> + chan->channel = channel->channel;
> + chan->datasheet_name = channel->name;
> + chan->scan_index = scan_index;
> + chan->indexed = 1;
> + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
> + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
> + chan->scan_type.sign = 'u';
> + chan->scan_type.realbits = 12;
> + chan->scan_type.storagebits = 16;
> +}
> +
> +static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
> +{
> + struct device_node *node = indio_dev->dev.of_node;
> + struct property *prop;
> + const __be32 *cur;
> + struct iio_chan_spec *channels;
> + int scan_index = 0, num_channels;
> + u32 val;
> +
> + num_channels = of_property_count_u32_elems(node, "st,adc-channels");
> + if (num_channels < 0 ||
> + num_channels >= ARRAY_SIZE(stm32f4_adc123_channels)) {
> + dev_err(&indio_dev->dev, "Bad st,adc-channels?\n");
> + return num_channels < 0 ? num_channels : -EINVAL;
> + }
> +
> + channels = devm_kcalloc(&indio_dev->dev, num_channels,
> + sizeof(struct iio_chan_spec), GFP_KERNEL);
> + if (!channels)
> + return -ENOMEM;
> +
> + of_property_for_each_u32(node, "st,adc-channels", prop, cur, val) {
> + if (val >= ARRAY_SIZE(stm32f4_adc123_channels)) {
> + dev_err(&indio_dev->dev, "Invalid channel %d\n", val);
> + return -EINVAL;
> + }
> + stm32_adc_chan_init_one(indio_dev, &channels[scan_index],
> + &stm32f4_adc123_channels[val],
> + scan_index);
> + scan_index++;
> + }
> +
> + indio_dev->num_channels = scan_index;
> + indio_dev->channels = channels;
> +
> + return 0;
> +}
> +
> +static int stm32_adc_probe(struct platform_device *pdev)
> +{
> + struct iio_dev *indio_dev;
> + struct stm32_adc *adc;
> + int ret;
> +
> + if (!pdev->dev.of_node)
> + return -ENODEV;
> +
> + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + adc = iio_priv(indio_dev);
> + adc->common = dev_get_drvdata(pdev->dev.parent);
> + spin_lock_init(&adc->lock);
> + init_completion(&adc->completion);
> +
> + indio_dev->name = dev_name(&pdev->dev);
> + indio_dev->dev.parent = &pdev->dev;
> + indio_dev->dev.of_node = pdev->dev.of_node;
> + indio_dev->info = &stm32_adc_iio_info;
> + indio_dev->modes = INDIO_DIRECT_MODE;
> +
> + platform_set_drvdata(pdev, adc);
> +
> + ret = of_property_read_u32(pdev->dev.of_node, "reg", &adc->offset);
> + if (ret != 0) {
> + dev_err(&pdev->dev, "missing reg property\n");
> + return -EINVAL;
> + }
> +
> + adc->irq = platform_get_irq(pdev, 0);
> + if (adc->irq < 0) {
> + dev_err(&pdev->dev, "failed to get irq\n");
> + return adc->irq;
> + }
> +
> + ret = devm_request_irq(&pdev->dev, adc->irq, stm32_adc_isr,
> + 0, pdev->name, adc);
> + if (ret) {
> + dev_err(&pdev->dev, "failed to request IRQ\n");
> + return ret;
> + }
> +
> + adc->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(adc->clk)) {
> + dev_err(&pdev->dev, "Can't get clock\n");
> + return PTR_ERR(adc->clk);
> + }
> +
> + ret = clk_prepare_enable(adc->clk);
> + if (ret < 0) {
> + dev_err(&pdev->dev, "clk enable failed\n");
> + return ret;
> + }
> +
> + ret = stm32_adc_chan_of_init(indio_dev);
> + if (ret < 0)
> + goto err_clk_disable;
> +
> + ret = iio_device_register(indio_dev);
> + if (ret) {
> + dev_err(&pdev->dev, "iio dev register failed\n");
> + goto err_clk_disable;
> + }
> +
> + return 0;
> +
> +err_clk_disable:
> + clk_disable_unprepare(adc->clk);
> +
> + return ret;
> +}
> +
> +static int stm32_adc_remove(struct platform_device *pdev)
> +{
> + struct stm32_adc *adc = platform_get_drvdata(pdev);
> + struct iio_dev *indio_dev = iio_priv_to_dev(adc);
> +
> + iio_device_unregister(indio_dev);
> + clk_disable_unprepare(adc->clk);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id stm32_adc_of_match[] = {
> + { .compatible = "st,stm32f4-adc" },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, stm32_adc_of_match);
> +
> +static struct platform_driver stm32_adc_driver = {
> + .probe = stm32_adc_probe,
> + .remove = stm32_adc_remove,
> + .driver = {
> + .name = "stm32-adc",
> + .of_match_table = stm32_adc_of_match,
> + },
> +};
> +module_platform_driver(stm32_adc_driver);
> +
> +MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>");
> +MODULE_DESCRIPTION("STMicroelectronics STM32 ADC IIO driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:stm32-adc");
>
^ permalink raw reply
* Re: [PATCH v3 4/6] ARM: configs: stm32: enable ADC driver
From: Jonathan Cameron @ 2016-11-19 12:21 UTC (permalink / raw)
To: Fabrice Gasnier, linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: linux-I+IVW8TIWO2tmTQ+vhA3Yw, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w,
alexandre.torgue-qxv4g6HH51o, lars-Qo5EllUWu/uELgA04lAiVw,
knaack.h-Mmb7MZpHnFY, pmeerw-jW+XmwGofnusTnJN9+BGXg
In-Reply-To: <1479223861-21747-5-git-send-email-fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
On 15/11/16 15:30, Fabrice Gasnier wrote:
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
The driver is now on it's way in. I'm assuming this and the two device tree patches
will go via the relevant route to arm-soc.
Thanks,
Jonathan
> ---
> arch/arm/configs/stm32_defconfig | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
> index 1e5ec2a..5d241e0 100644
> --- a/arch/arm/configs/stm32_defconfig
> +++ b/arch/arm/configs/stm32_defconfig
> @@ -57,6 +57,9 @@ CONFIG_LEDS_TRIGGERS=y
> CONFIG_LEDS_TRIGGER_HEARTBEAT=y
> CONFIG_DMADEVICES=y
> CONFIG_STM32_DMA=y
> +CONFIG_IIO=y
> +CONFIG_STM32_ADC_CORE=y
> +CONFIG_STM32_ADC=y
> # CONFIG_FILE_LOCKING is not set
> # CONFIG_DNOTIFY is not set
> # CONFIG_INOTIFY_USER is not set
>
^ permalink raw reply
* Re: [PATCH 1/2] staging: iio: ad7606: replace range/range_available with corresponding scale
From: Jonathan Cameron @ 2016-11-19 12:32 UTC (permalink / raw)
To: Linus Walleij, Lars-Peter Clausen
Cc: Eva Rachel Retuya,
linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Michael Hennerich, Hartmut Knaack, Peter Meerwald, Greg KH,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring,
Mark Rutland
In-Reply-To: <CACRpkdbWqxUWc+40AYSY7XX2ZFYSZEBcU3FusOrunG+-GCZGwQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On 14/11/16 23:12, Linus Walleij wrote:
> On Mon, Nov 14, 2016 at 7:53 PM, Lars-Peter Clausen <lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org> wrote:
>
>> It's about figuring out the setting of a "GPIO" that can't be changed from
>> software.
>>
>> Devices sometimes, instead of a configuration bus like I2C or SPI, use
>> simple input pins, that can either be set to high or low, to allow software
>> the state of the device. The GPIO API is typically used to configure these pins.
>>
>> This works fine as long as the pin is connected to a GPIO. But sometimes the
>> system designer decides that a settings does not need to be configurable, in
>> this case the pin will be tied to logic low or high directly on the PCB
>> without any GPIO controller being involved.
>>
>> Sometimes a driver wants to know how the pin is wired up so it can report to
>> userspace this part runs in the following mode and the mode can't be
>> changed. In a sense it is like a reverse GPIO hog.
>>
>> Considering that this is a common usecase the question was how this can be
>> implemented in a driver independent way to avoid code duplication and
>> slightly different variations of what is effectively the same DT/ACPI binding.
>>
>> E.g. lets say for a configurable pin you use
>>
>> range-gpio = <&gpio ...>;
>>
>> and for a static pin
>>
>> range-gpio-fixed = <1>;
>>
>> Or something similar.
>
> Aha I understand.
>
> Usually I feel we need not shoehorn stuff into GPIO because it is convenient,
> it might be best to leave the GPIO optional and if it is not there, look for
> a custom attribute that represents the "hogging" to 0/1. I think trying
> to extend GPIO bindings to cover it is overgeneralization, instead go
> for a local binding for this kind of devices.
>
> But mainly it is a question to the DT bindings maintainers.
That's a reasonable approach, but I'd certainly like to see a generic binding
to describe it. It's a pretty common situation.
Seems more likely we'll get a device tree maintainer response if we cc them ;)
So Mark, Rob and thoughts on this?
Thanks,
Jonathan
>
> Yours,
> Linus Walleij
>
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^ permalink raw reply
* Re: [RFC PATCH v2 1/7] dt-bindings: document devicetree bindings for mux-gpio
From: Jonathan Cameron @ 2016-11-19 15:21 UTC (permalink / raw)
To: Peter Rosin, Rob Herring
Cc: linux-kernel, Wolfram Sang, Mark Rutland, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, Arnd Bergmann,
Greg Kroah-Hartman, linux-i2c, devicetree, linux-iio
In-Reply-To: <a6a6610e-6827-a069-36e6-ca30a7110836@axentia.se>
On 18/11/16 16:59, Peter Rosin wrote:
> On 2016-11-18 16:35, Rob Herring wrote:
>> On Thu, Nov 17, 2016 at 10:48:03PM +0100, Peter Rosin wrote:
>>> ---
>>> .../devicetree/bindings/misc/mux-gpio.txt | 79 ++++++++++++++++++++++
>>> 1 file changed, 79 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/misc/mux-gpio.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/misc/mux-gpio.txt b/Documentation/devicetree/bindings/misc/mux-gpio.txt
>>> new file mode 100644
>>> index 000000000000..73699a37824f
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/misc/mux-gpio.txt
>>> @@ -0,0 +1,79 @@
>>> +GPIO-based multiplexer controller bindings
>>> +
>>> +Define what GPIO pins are used to control a multiplexer. Or several
>>> +multiplexers, if the same pins control more than one multiplexer.
>>
>> I think this makes sense in your case, but I think it is too complicated
>> for a non-shared case. Perhaps mux-gpios should be used directly (i.e.
>> in the adc-mux node) and control-muxes only used for the shared case.
>>
>> Part of me feels like you are working around in DT the GPIO subsystem
>> limitation that it can't share GPIO lines. Either this could be fixed
>> in some way in the GPIO subsystem, or the mux subsys could deal with it.
>> You just have to look up if you already have a mux registered for the
>> same GPIOs. Of course, that may make the mux subsys pretty much GPIO
>> only, but I'm having a hard time thinking how you would have shared
>> muxes that are not GPIO controlled. Any other control would be
>> integrated into the mux itself.
>
> But if someone wants to mux an adc line with a mux that is some kind of
> integrated i2c device, you'd have to add extra code to the iio muxer
> driver to handle that case. Or fork it. Or build something like the
> i2c muxer infrastructure and separate out the mux control in small
> drivers and handle the generic iio muxing centrally. But then someone
> else uses that i2c device to instead mux an i2c bus, and you'd end up
> with code duplication when that same muxer control code is added under
> drivers/i2c/muxes.
>
> With the proposed solution, this is unified.
>
> I'd just hate to see drivers for muxers added under drivers/i2c/muxes
> that do little more that control a mux that happens to be used to mux
> an i2c bus, but are generic muxers that could equally well mux something
> else. Even if the control is integrated into the mux, what the mux is
> actually used for should perhaps not determine where its driver should
> live.
>
> Anyway, I don't know what to make with your suggestion, I just don't
> see the path forward (not enough experience with the kernel and/or gpio
> code). And it would be a limited solution (GPIO only,a s you say) so it
> doesn't feel right.
Also worth pointing out here the possibility of multi pole muxes...
Relays are ultimately muxes as well (be it slow ones ;)
A quick google fed me:
TI SN74LS153 for example. This one is digital only though...
Analog option (in both senses) is:
http://www.analog.com/media/en/technical-documentation/data-sheets/ADG888.pdf
So these 'look' the same as two single muxes wired to the same GPIOs.
>
> Is there perhaps some way to keep the complicated shared case work as
> is (or equivalently, the exact details are not important), and also
> provide a simpler in-node thingy to glue a mux control to a consumer
> w/o pointing to it with a phandle, but still have the same mux driver
> handle both cases? No, I'm not a devicetree guru, so I don't see a
> solution for that either, but maybe someone else does?
>
> Perhaps the consumer could look for the mux control in first the
> phandle, as in my proposal. If not found, it could also look for
> a mux provider bound to child node.
>
> adc-mux {
> compatible = "iio-mux";
> io-channels = <&adc 0>;
> io-channel-names = "parent";
>
> mux-control {
> compatible = "mux-gpio";
> mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
> <&pioA 1 GPIO_ACTIVE_HIGH>;
> };
>
> #address-cells = <1>;
> #size-cells = <0>;
>
> sync-1@0 {
> reg = <0>;
> };
> /* ... */
> };
>
> Or perhaps look in a parent node:
>
> mux-control {
> compatible = "mux-gpio";
> mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
> <&pioA 1 GPIO_ACTIVE_HIGH>;
>
> adc-mux {
> compatible = "iio-mux";
> io-channels = <&adc 0>;
> io-channel-names = "parent";
>
> #address-cells = <1>;
> #size-cells = <0>;
>
> sync-1@0 {
> reg = <0>;
> };
> /* ... */
> };
> };
>
> With the last suggestion, you could have multiple children of the
> mux-control node for the complicated case where it controls more
> than one mux. Not too bad? Hmm, what does the driver for the
> mux-control node have to do to have drivers tied to its children?
>
> Maybe this last layout should be the only thing supported? Good
> enough for me anyway...
>
> Cheers,
> Peter
>
> PS. I will take care of the other comments for the next round.
>
^ permalink raw reply
* Re: [RFC PATCH v2 2/7] misc: minimal mux subsystem and gpio-based mux controller
From: Jonathan Cameron @ 2016-11-19 15:34 UTC (permalink / raw)
To: Peter Rosin, linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Wolfram Sang, Rob Herring, Mark Rutland, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, Arnd Bergmann,
Greg Kroah-Hartman, linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1479419289-17553-3-git-send-email-peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
On 17/11/16 21:48, Peter Rosin wrote:
> When both the iio subsystem and the i2c subsystem wants to update
> the same mux, there needs to be some coordination. Invent a new
> minimal "mux" subsystem that handles this.
I'd probably put something more general in the description. Lots of things
may need the same infrastructure. This is just an example.
Few bits inline.
Also, I suspect you will fairly rapidly have a need for a strobe signal
as well. A lot of mux chips that are more than 2 way seem to have them to
allow multiple chips to be synchronized.
>
> Add a single backend driver for this new subsystem that can
> control gpio based multiplexers.
> ---
> drivers/misc/Kconfig | 6 +
> drivers/misc/Makefile | 2 +
> drivers/misc/mux-core.c | 299 ++++++++++++++++++++++++++++++++++++++++++++++++
> drivers/misc/mux-gpio.c | 115 +++++++++++++++++++
> include/linux/mux.h | 53 +++++++++
> 5 files changed, 475 insertions(+)
> create mode 100644 drivers/misc/mux-core.c
> create mode 100644 drivers/misc/mux-gpio.c
> create mode 100644 include/linux/mux.h
>
> diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
> index 64971baf11fa..9e119bb78d82 100644
> --- a/drivers/misc/Kconfig
> +++ b/drivers/misc/Kconfig
> @@ -766,6 +766,12 @@ config PANEL_BOOT_MESSAGE
> An empty message will only clear the display at driver init time. Any other
> printf()-formatted message is valid with newline and escape codes.
>
> +config MUX_GPIO
> + tristate "GPIO-controlled MUX controller"
> + depends on OF
> + help
> + GPIO-controlled MUX controller
> +
> source "drivers/misc/c2port/Kconfig"
> source "drivers/misc/eeprom/Kconfig"
> source "drivers/misc/cb710/Kconfig"
> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
> index 31983366090a..92b547bcbac1 100644
> --- a/drivers/misc/Makefile
> +++ b/drivers/misc/Makefile
> @@ -53,6 +53,8 @@ obj-$(CONFIG_ECHO) += echo/
> obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
> obj-$(CONFIG_CXL_BASE) += cxl/
> obj-$(CONFIG_PANEL) += panel.o
> +obj-$(CONFIG_MUX_GPIO) += mux-core.o
> +obj-$(CONFIG_MUX_GPIO) += mux-gpio.o
>
> lkdtm-$(CONFIG_LKDTM) += lkdtm_core.o
> lkdtm-$(CONFIG_LKDTM) += lkdtm_bugs.o
> diff --git a/drivers/misc/mux-core.c b/drivers/misc/mux-core.c
> new file mode 100644
> index 000000000000..7a8bf003a92c
> --- /dev/null
> +++ b/drivers/misc/mux-core.c
> @@ -0,0 +1,299 @@
> +/*
> + * Multiplexer subsystem
> + *
> + * Copyright (C) 2016 Axentia Technologies AB
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#define pr_fmt(fmt) "mux-core: " fmt
> +
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/idr.h>
> +#include <linux/module.h>
> +#include <linux/mux.h>
> +#include <linux/of.h>
> +#include <linux/slab.h>
> +
> +static struct bus_type mux_bus_type = {
> + .name = "mux",
> +};
> +
> +static int __init mux_init(void)
> +{
> + return bus_register(&mux_bus_type);
> +}
> +
> +static void __exit mux_exit(void)
> +{
> + bus_unregister(&mux_bus_type);
> +}
> +
> +static DEFINE_IDA(mux_ida);
> +
> +static void mux_control_release(struct device *dev)
> +{
> + struct mux_control *mux = to_mux_control(dev);
> +
> + ida_simple_remove(&mux_ida, mux->id);
> + kfree(mux);
> +}
> +
> +static struct device_type mux_control_type = {
> + .name = "mux-control",
> + .release = mux_control_release,
> +};
> +
> +/*
> + * Allocate a mux-control, plus an extra memory area for private use
> + * by the caller.
> + */
> +struct mux_control *mux_control_alloc(size_t sizeof_priv)
> +{
> + struct mux_control *mux;
> +
Worth planning ahead for spi controlled muxes and others that need their
structures to be carefully aligned to avoid dma cacheline fun?
Easy enough to add later I guess.
> + mux = kzalloc(sizeof(*mux) + sizeof_priv, GFP_KERNEL);
> + if (!mux)
> + return NULL;
> +
> + mux->dev.bus = &mux_bus_type;
> + mux->dev.type = &mux_control_type;
> + device_initialize(&mux->dev);
> + dev_set_drvdata(&mux->dev, mux);
> +
> + init_rwsem(&mux->lock);
> + mux->priv = mux + 1;
Needed? Or just do it with a bit of pointer math where the access is needed?
> +
> + mux->id = ida_simple_get(&mux_ida, 0, 0, GFP_KERNEL);
> + if (mux->id < 0) {
> + pr_err("mux-controlX failed to get device id\n");
> + kfree(mux);
> + return NULL;
> + }
> + dev_set_name(&mux->dev, "mux:control%d", mux->id);
> +
> + mux->cached_state = -1;
> + mux->idle_state = -1;
> +
> + return mux;
> +}
> +EXPORT_SYMBOL_GPL(mux_control_alloc);
> +
> +/*
> + * Register the mux-control, thus readying it for use.
Either single line comment style - or perhaps kernel doc the lot...
> + */
> +int mux_control_register(struct mux_control *mux)
> +{
> + /* If the calling driver did not initialize of_node, do it here */
> + if (!mux->dev.of_node && mux->dev.parent)
> + mux->dev.of_node = mux->dev.parent->of_node;
> +
> + return device_add(&mux->dev);
> +}
> +EXPORT_SYMBOL_GPL(mux_control_register);
> +
> +/*
> + * Take the mux-control off-line.
> + */
> +void mux_control_unregister(struct mux_control *mux)
> +{
> + device_del(&mux->dev);
> +}
> +EXPORT_SYMBOL_GPL(mux_control_unregister);
> +
> +/*
> + * Put away the mux-control for good.
> + */
> +void mux_control_put(struct mux_control *mux)
> +{
> + if (!mux)
> + return;
> + put_device(&mux->dev);
> +}
> +EXPORT_SYMBOL_GPL(mux_control_put);
> +
> +static int mux_control_set(struct mux_control *mux, int state)
> +{
> + int ret = mux->ops->set(mux, state);
> +
> + mux->cached_state = ret < 0 ? -1 : state;
> +
> + return ret;
> +}
> +
> +/*
> + * Select the given multiplexer channel. Call mux_control_deselect()
> + * when the operation is complete on the multiplexer channel, and the
> + * multiplexer is free for others to use.
> + */
> +int mux_control_select(struct mux_control *mux, int state)
> +{
> + int ret;
> +
> + if (down_read_trylock(&mux->lock)) {
> + if (mux->cached_state == state)
> + return 0;
> +
> + /* Sigh, the mux needs updating... */
> + up_read(&mux->lock);
> + }
> +
> + /* ...or it's just contended. */
> + down_write(&mux->lock);
> +
> + if (mux->cached_state == state) {
> + /*
> + * Hmmm, someone else changed the mux to my liking.
> + * That makes me wonder how long I waited for nothing...
> + */
> + downgrade_write(&mux->lock);
> + return 0;
> + }
> +
> + ret = mux_control_set(mux, state);
> + if (ret < 0) {
> + if (mux->idle_state != -1)
> + mux_control_set(mux, mux->idle_state);
> +
> + up_write(&mux->lock);
> + return ret;
> + }
> +
> + downgrade_write(&mux->lock);
> +
> + return 1;
> +}
> +EXPORT_SYMBOL_GPL(mux_control_select);
> +
> +/*
> + * Deselect the previously selected multiplexer channel.
> + */
> +int mux_control_deselect(struct mux_control *mux)
> +{
> + int ret = 0;
> +
> + if (mux->idle_state != -1 && mux->cached_state != mux->idle_state)
> + ret = mux_control_set(mux, mux->idle_state);
> +
> + up_read(&mux->lock);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(mux_control_deselect);
> +
> +static int of_dev_node_match(struct device *dev, void *data)
> +{
> + return dev->of_node == data;
> +}
> +
> +static struct mux_control *of_find_mux_by_node(struct device_node *np)
> +{
> + struct device *dev;
> +
> + dev = bus_find_device(&mux_bus_type, NULL, np, of_dev_node_match);
> +
> + return dev ? to_mux_control(dev) : NULL;
> +}
> +
> +static struct mux_control *of_mux_control_get(struct device_node *np, int index)
> +{
> + struct device_node *mux_np;
> + struct mux_control *mux;
> +
> + mux_np = of_parse_phandle(np, "control-muxes", index);
> + if (!mux_np)
> + return NULL;
> +
> + mux = of_find_mux_by_node(mux_np);
> + of_node_put(mux_np);
> +
> + return mux;
> +}
> +
> +/*
> + * Get a named mux.
> + */
> +struct mux_control *mux_control_get(struct device *dev, const char *mux_name)
> +{
> + struct device_node *np = dev->of_node;
> + struct mux_control *mux;
> + int index;
> +
> + index = of_property_match_string(np, "control-mux-names", mux_name);
> + if (index < 0) {
> + dev_err(dev, "failed to get control-mux %s:%s(%i)\n",
> + np->full_name, mux_name ?: "", index);
> + return ERR_PTR(index);
> + }
> +
> + mux = of_mux_control_get(np, index);
> + if (!mux)
> + return ERR_PTR(-EPROBE_DEFER);
> +
> + return mux;
> +}
> +EXPORT_SYMBOL_GPL(mux_control_get);
> +
> +static void devm_mux_control_free(struct device *dev, void *res)
> +{
> + struct mux_control *mux = *(struct mux_control **)res;
> +
> + mux_control_put(mux);
> +}
> +
> +/*
> + * Get a named mux, with resource management.
> + */
Guess it might be elsewhere in patch set but remember to add this to
the global list of devm interfaces (in Documentation somewhere.. IIRC)
> +struct mux_control *devm_mux_control_get(struct device *dev,
> + const char *mux_name)
> +{
> + struct mux_control **ptr, *mux;
> +
> + ptr = devres_alloc(devm_mux_control_free, sizeof(*ptr), GFP_KERNEL);
> + if (!ptr)
> + return ERR_PTR(-ENOMEM);
> +
> + mux = mux_control_get(dev, mux_name);
> + if (IS_ERR(mux)) {
> + devres_free(ptr);
> + return mux;
> + }
> +
> + *ptr = mux;
> + devres_add(dev, ptr);
> +
> + return mux;
> +}
> +EXPORT_SYMBOL_GPL(devm_mux_control_get);
> +
> +static int devm_mux_control_match(struct device *dev, void *res, void *data)
> +{
> + struct mux_control **r = res;
> +
> + if (!r || !*r) {
> + WARN_ON(!r || !*r);
> + return 0;
> + }
> +
> + return *r == data;
> +}
> +
> +/*
> + * Resource-managed version mux_control_put.
> + */
> +void devm_mux_control_put(struct device *dev, struct mux_control *mux)
> +{
> + WARN_ON(devres_release(dev, devm_mux_control_free,
> + devm_mux_control_match, mux));
> +}
> +EXPORT_SYMBOL_GPL(devm_mux_control_put);
> +
> +subsys_initcall(mux_init);
> +module_exit(mux_exit);
> +
> +MODULE_AUTHOR("Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org");
> +MODULE_DESCRIPTION("MUX subsystem");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/misc/mux-gpio.c b/drivers/misc/mux-gpio.c
> new file mode 100644
> index 000000000000..2ddd7fb24078
> --- /dev/null
> +++ b/drivers/misc/mux-gpio.c
> @@ -0,0 +1,115 @@
> +/*
> + * GPIO-controlled multiplexer driver
> + *
> + * Copyright (C) 2016 Axentia Technologies AB
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/module.h>
> +#include <linux/mux.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +
> +struct mux_gpio {
> + struct gpio_descs *gpios;
> +};
> +
> +static int mux_gpio_set(struct mux_control *mux, int val)
> +{
> + struct mux_gpio *mux_gpio = mux->priv;
> + int i;
> +
> + for (i = 0; i < mux_gpio->gpios->ndescs; i++)
> + gpiod_set_value_cansleep(mux_gpio->gpios->desc[i],
> + val & (1 << i));
> +
> + return 0;
> +}
> +
> +static const struct mux_control_ops mux_gpio_ops = {
> + .set = mux_gpio_set,
> +};
> +
> +static const struct of_device_id mux_gpio_dt_ids[] = {
> + { .compatible = "mux-gpio", },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, mux_gpio_dt_ids);
> +
> +static int mux_gpio_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *np = pdev->dev.of_node;
> + struct mux_control *mux;
> + struct mux_gpio *mux_gpio;
> + u32 idle_state;
> + int ret;
> +
> + if (!np)
> + return -ENODEV;
> +
> + mux = mux_control_alloc(sizeof(*mux_gpio));
> + if (!mux)
> + return -ENOMEM;
> + mux_gpio = mux->priv;
> + mux->dev.parent = dev;
> + mux->ops = &mux_gpio_ops;
> +
> + platform_set_drvdata(pdev, mux);
> +
> + mux_gpio->gpios = devm_gpiod_get_array(dev, "mux", GPIOD_OUT_LOW);
> + if (IS_ERR(mux_gpio->gpios)) {
> + if (PTR_ERR(mux_gpio->gpios) != -EPROBE_DEFER)
> + dev_err(dev, "failed to get gpios\n");
> + mux_control_put(mux);
> + return PTR_ERR(mux_gpio->gpios);
> + }
> +
> + ret = of_property_read_u32(np, "idle-state", &idle_state);
> + if (ret >= 0) {
> + if (idle_state >= (1 << mux_gpio->gpios->ndescs)) {
> + dev_err(dev, "invalid idle-state %u\n", idle_state);
> + return -EINVAL;
> + }
> + mux->idle_state = idle_state;
> + }
> +
> + ret = mux_control_register(mux);
> + if (ret < 0) {
> + dev_err(dev, "failed to register mux_control\n");
> + mux_control_put(mux);
> + return ret;
> + }
> +
> + return ret;
> +}
> +
> +static int mux_gpio_remove(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct mux_control *mux = to_mux_control(dev);
> +
> + mux_control_unregister(mux);
> + mux_control_put(mux);
> + return 0;
> +}
> +
> +static struct platform_driver mux_gpio_driver = {
> + .driver = {
> + .name = "mux-gpio",
> + .of_match_table = of_match_ptr(mux_gpio_dt_ids),
> + },
> + .probe = mux_gpio_probe,
> + .remove = mux_gpio_remove,
> +};
> +module_platform_driver(mux_gpio_driver);
> +
> +MODULE_AUTHOR("Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org");
> +MODULE_DESCRIPTION("GPIO-controlled multiplexer driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/mux.h b/include/linux/mux.h
> new file mode 100644
> index 000000000000..5b21b8184056
> --- /dev/null
> +++ b/include/linux/mux.h
> @@ -0,0 +1,53 @@
> +/*
> + * mux.h - definitions for the multiplexer interface
> + *
> + * Copyright (C) 2016 Axentia Technologies AB
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef _LINUX_MUX_H
> +#define _LINUX_MUX_H
> +
> +#include <linux/device.h>
> +#include <linux/rwsem.h>
> +
> +struct mux_control;
> +
> +struct mux_control_ops {
> + int (*set)(struct mux_control *mux, int reg);
> +};
> +
> +struct mux_control {
> + struct rw_semaphore lock; /* protects the state of the mux */
> +
> + struct device dev;
> + int id;
> +
> + int cached_state;
> + int idle_state;
> +
> + const struct mux_control_ops *ops;
> +
> + void *priv;
> +};
> +
> +#define to_mux_control(x) container_of((x), struct mux_control, dev)
> +
> +struct mux_control *mux_control_alloc(size_t sizeof_priv);
> +int mux_control_register(struct mux_control *mux);
> +void mux_control_unregister(struct mux_control *mux);
> +void mux_control_put(struct mux_control *mux);
> +
> +int mux_control_select(struct mux_control *mux, int state);
> +int mux_control_deselect(struct mux_control *mux);
> +
> +struct mux_control *mux_control_get(struct device *dev,
> + const char *mux_name);
> +struct mux_control *devm_mux_control_get(struct device *dev,
> + const char *mux_name);
> +void devm_mux_control_put(struct device *dev, struct mux_control *mux);
> +
> +#endif /* _LINUX_MUX_H */
>
^ permalink raw reply
* Re: [RFC PATCH v2 3/7] iio: inkern: api for manipulating ext_info of iio channels
From: Jonathan Cameron @ 2016-11-19 15:38 UTC (permalink / raw)
To: Peter Rosin, linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Wolfram Sang, Rob Herring, Mark Rutland, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, Arnd Bergmann,
Greg Kroah-Hartman, linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1479419289-17553-4-git-send-email-peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
On 17/11/16 21:48, Peter Rosin wrote:
> Extend the inkern api with functions for reading and writing ext_info
> of iio channels.
I'd like Lars' feedback on this one.
Superficially looks fine to me but I am not as familiar with this interface
as Lars is ;) (he wrote it IIRC:)
> ---
> drivers/iio/inkern.c | 55 ++++++++++++++++++++++++++++++++++++++++++++
> include/linux/iio/consumer.h | 6 +++++
> 2 files changed, 61 insertions(+)
>
> diff --git a/drivers/iio/inkern.c b/drivers/iio/inkern.c
> index cfca17ba2535..a8099b164222 100644
> --- a/drivers/iio/inkern.c
> +++ b/drivers/iio/inkern.c
> @@ -850,3 +850,58 @@ int iio_write_channel_raw(struct iio_channel *chan, int val)
> return ret;
> }
> EXPORT_SYMBOL_GPL(iio_write_channel_raw);
> +
> +int iio_get_channel_ext_info_count(struct iio_channel *chan)
> +{
> + const struct iio_chan_spec_ext_info *ext_info;
> + unsigned int i = 0;
> +
> + if (!chan->channel->ext_info)
> + return i;
> +
> + for (ext_info = chan->channel->ext_info; ext_info->name; ext_info++)
> + ++i;
> +
> + return i;
> +}
> +EXPORT_SYMBOL_GPL(iio_get_channel_ext_info_count);
> +
> +ssize_t iio_read_channel_ext_info(struct iio_channel *chan,
> + const char *attr, char *buf)
> +{
> + const struct iio_chan_spec_ext_info *ext_info;
> +
> + if (!chan->channel->ext_info)
> + return -EINVAL;
> +
> + for (ext_info = chan->channel->ext_info; ext_info->name; ++ext_info) {
> + if (strcmp(attr, ext_info->name))
> + continue;
> +
> + return ext_info->read(chan->indio_dev, ext_info->private,
> + chan->channel, buf);
> + }
> +
> + return -EINVAL;
> +}
> +EXPORT_SYMBOL_GPL(iio_read_channel_ext_info);
> +
> +ssize_t iio_write_channel_ext_info(struct iio_channel *chan, const char *attr,
> + const char *buf, size_t len)
> +{
> + const struct iio_chan_spec_ext_info *ext_info;
> +
> + if (!chan->channel->ext_info)
> + return -EINVAL;
> +
> + for (ext_info = chan->channel->ext_info; ext_info->name; ++ext_info) {
> + if (strcmp(attr, ext_info->name))
> + continue;
> +
> + return ext_info->write(chan->indio_dev, ext_info->private,
> + chan->channel, buf, len);
> + }
> +
> + return -EINVAL;
> +}
> +EXPORT_SYMBOL_GPL(iio_write_channel_ext_info);
> diff --git a/include/linux/iio/consumer.h b/include/linux/iio/consumer.h
> index 9a4f336d8b4a..471dece8729a 100644
> --- a/include/linux/iio/consumer.h
> +++ b/include/linux/iio/consumer.h
> @@ -299,4 +299,10 @@ int iio_read_channel_scale(struct iio_channel *chan, int *val,
> int iio_convert_raw_to_processed(struct iio_channel *chan, int raw,
> int *processed, unsigned int scale);
>
> +int iio_get_channel_ext_info_count(struct iio_channel *chan);
> +ssize_t iio_read_channel_ext_info(struct iio_channel *chan,
> + const char *attr, char *buf);
> +ssize_t iio_write_channel_ext_info(struct iio_channel *chan, const char *attr,
> + const char *buf, size_t len);
> +
> #endif
>
^ permalink raw reply
* Re: [RFC PATCH v2 5/7] iio: multiplexer: new iio category and iio-mux driver
From: Jonathan Cameron @ 2016-11-19 15:49 UTC (permalink / raw)
To: Peter Rosin, linux-kernel
Cc: Wolfram Sang, Rob Herring, Mark Rutland, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, Arnd Bergmann,
Greg Kroah-Hartman, linux-i2c, devicetree, linux-iio
In-Reply-To: <1479419289-17553-6-git-send-email-peda@axentia.se>
On 17/11/16 21:48, Peter Rosin wrote:
> When a multiplexer changes how an iio device behaves (for example
> by feeding different signals to an ADC), this driver can be used
> create one virtual iio channel for each multiplexer state.
>
> Depends on the generic multiplexer driver.
I'm not really following what all the ext info stuff in here is about.
Could you add a little more description of that?
Perhaps an example of how it is used and what the resulting interface
looks like?
Thanks,
Jonathan
> ---
> drivers/iio/Kconfig | 1 +
> drivers/iio/Makefile | 1 +
> drivers/iio/multiplexer/Kconfig | 17 ++
> drivers/iio/multiplexer/Makefile | 6 +
> drivers/iio/multiplexer/iio-mux.c | 444 ++++++++++++++++++++++++++++++++++++++
> 5 files changed, 469 insertions(+)
> create mode 100644 drivers/iio/multiplexer/Kconfig
> create mode 100644 drivers/iio/multiplexer/Makefile
> create mode 100644 drivers/iio/multiplexer/iio-mux.c
>
> diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig
> index 6743b18194fb..dcb541d0d70e 100644
> --- a/drivers/iio/Kconfig
> +++ b/drivers/iio/Kconfig
> @@ -82,6 +82,7 @@ source "drivers/iio/humidity/Kconfig"
> source "drivers/iio/imu/Kconfig"
> source "drivers/iio/light/Kconfig"
> source "drivers/iio/magnetometer/Kconfig"
> +source "drivers/iio/multiplexer/Kconfig"
> source "drivers/iio/orientation/Kconfig"
> if IIO_TRIGGER
> source "drivers/iio/trigger/Kconfig"
> diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile
> index 87e4c4369e2f..f9879c29cf6f 100644
> --- a/drivers/iio/Makefile
> +++ b/drivers/iio/Makefile
> @@ -27,6 +27,7 @@ obj-y += humidity/
> obj-y += imu/
> obj-y += light/
> obj-y += magnetometer/
> +obj-y += multiplexer/
> obj-y += orientation/
> obj-y += potentiometer/
> obj-y += pressure/
> diff --git a/drivers/iio/multiplexer/Kconfig b/drivers/iio/multiplexer/Kconfig
> new file mode 100644
> index 000000000000..31cbe4509366
> --- /dev/null
> +++ b/drivers/iio/multiplexer/Kconfig
> @@ -0,0 +1,17 @@
> +#
> +# Multiplexer drivers
> +#
> +# When adding new entries keep the list in alphabetical order
> +
> +menu "Multiplexers"
> +
> +config IIO_MUX
> + tristate "IIO multiplexer driver"
> + depends on OF && MUX_GPIO
> + help
> + Say yes here to build support for the IIO multiplexer.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called iio-mux.
> +
> +endmenu
> diff --git a/drivers/iio/multiplexer/Makefile b/drivers/iio/multiplexer/Makefile
> new file mode 100644
> index 000000000000..68be3c4abd07
> --- /dev/null
> +++ b/drivers/iio/multiplexer/Makefile
> @@ -0,0 +1,6 @@
> +#
> +# Makefile for industrial I/O multiplexer drivers
> +#
> +
> +# When adding new entries keep the list in alphabetical order
> +obj-$(CONFIG_IIO_MUX) += iio-mux.o
> diff --git a/drivers/iio/multiplexer/iio-mux.c b/drivers/iio/multiplexer/iio-mux.c
> new file mode 100644
> index 000000000000..2a8d00da990b
> --- /dev/null
> +++ b/drivers/iio/multiplexer/iio-mux.c
> @@ -0,0 +1,444 @@
> +/*
> + * IIO multiplexer driver
> + *
> + * Copyright (C) 2016 Axentia Technologies AB
> + *
> + * Author: Peter Rosin <peda@axentia.se>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/iio/consumer.h>
> +#include <linux/iio/iio.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/mux.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +
> +struct mux_ext_info_cache {
> + char *data;
> + size_t size;
> +};
> +
> +struct mux_child {
> + u32 state;
> +
> + struct mux_ext_info_cache *ext_info_cache;
> +};
> +
> +struct mux {
> + u32 cached_state;
> + struct mux_control *control;
> + struct iio_channel *parent;
> + struct iio_dev *indio_dev;
> + struct iio_chan_spec *c;
> + struct iio_chan_spec_ext_info *ext_info;
> + struct mux_child *child;
> +};
> +
> +static int iio_mux_select(struct mux *mux, int idx)
> +{
> + struct mux_child *child = &mux->child[idx];
> + int ret;
> + int i;
> +
> + ret = mux_control_select(mux->control, child->state);
> + if (ret < 0) {
> + mux->cached_state = -1;
> + return ret;
> + }
> +
> + if (mux->cached_state == child->state)
> + return 0;
> +
I don't follow what is going on here.. Perhaps you could explain
futher?
> + if (mux->c[idx].ext_info) {
> + for (i = 0; mux->c[idx].ext_info[i].name; ++i) {
> + const char *attr = mux->c[idx].ext_info[i].name;
> + struct mux_ext_info_cache *cache;
> +
> + cache = &child->ext_info_cache[i];
> +
> + if (cache->size < 0)
> + continue;
> +
> + ret = iio_write_channel_ext_info(mux->parent, attr,
> + cache->data,
> + cache->size);
> +
> + if (ret < 0) {
> + mux_control_deselect(mux->control);
> + mux->cached_state = -1;
> + return ret;
> + }
> + }
> + }
> + mux->cached_state = child->state;
> +
> + return 0;
> +}
> +
> +static void iio_mux_deselect(struct mux *mux)
> +{
> + mux_control_deselect(mux->control);
> +}
> +
> +static int mux_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int *val, int *val2, long mask)
> +{
> + struct mux *mux = iio_priv(indio_dev);
> + int idx = chan - mux->c;
> + int ret;
> +
> + ret = iio_mux_select(mux, idx);
> + if (ret < 0)
> + return ret;
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + ret = iio_read_channel_raw(mux->parent, val);
> + break;
> +
> + case IIO_CHAN_INFO_SCALE:
> + ret = iio_read_channel_scale(mux->parent, val, val2);
> + break;
> +
> + default:
> + ret = -EINVAL;
> + }
> +
> + iio_mux_deselect(mux);
> +
> + return ret;
> +}
> +
> +static int mux_read_avail(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + const int **vals, int *type, int *length,
> + long mask)
> +{
> + struct mux *mux = iio_priv(indio_dev);
> + int idx = chan - mux->c;
> + int ret;
> +
> + ret = iio_mux_select(mux, idx);
> + if (ret < 0)
> + return ret;
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + *type = IIO_VAL_INT;
> + ret = iio_read_avail_channel_raw(mux->parent, vals, length);
> + break;
> +
> + default:
> + ret = -EINVAL;
> + }
> +
> + iio_mux_deselect(mux);
> +
> + return ret;
> +}
> +
> +static int mux_write_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int val, int val2, long mask)
> +{
> + struct mux *mux = iio_priv(indio_dev);
> + int idx = chan - mux->c;
> + int ret;
> +
> + ret = iio_mux_select(mux, idx);
> + if (ret < 0)
> + return ret;
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + ret = iio_write_channel_raw(mux->parent, val);
> + break;
> +
> + default:
> + ret = -EINVAL;
> + }
> +
> + iio_mux_deselect(mux);
> +
> + return ret;
> +}
> +
> +static const struct iio_info mux_info = {
> + .read_raw = mux_read_raw,
> + .read_avail = mux_read_avail,
> + .write_raw = mux_write_raw,
> + .driver_module = THIS_MODULE,
> +};
> +
> +static ssize_t mux_read_ext_info(struct iio_dev *indio_dev, uintptr_t private,
> + struct iio_chan_spec const *chan, char *buf)
> +{
> + struct mux *mux = iio_priv(indio_dev);
> + int idx = chan - mux->c;
> + ssize_t ret;
> +
> + ret = iio_mux_select(mux, idx);
> + if (ret < 0)
> + return ret;
> +
> + ret = iio_read_channel_ext_info(mux->parent,
> + mux->ext_info[private].name,
> + buf);
> +
> + iio_mux_deselect(mux);
> +
> + return ret;
> +}
> +
> +static ssize_t mux_write_ext_info(struct iio_dev *indio_dev, uintptr_t private,
> + struct iio_chan_spec const *chan,
> + const char *buf, size_t len)
> +{
> + struct device *dev = indio_dev->dev.parent;
> + struct mux *mux = iio_priv(indio_dev);
> + int idx = chan - mux->c;
> + char *new;
> + ssize_t ret;
> +
> + ret = iio_mux_select(mux, idx);
> + if (ret < 0)
> + return ret;
> +
> + new = devm_kmemdup(dev, buf, len + 1, GFP_KERNEL);
> + if (!new) {
> + iio_mux_deselect(mux);
> + return -ENOMEM;
> + }
> +
> + new[len] = 0;
> +
> + ret = iio_write_channel_ext_info(mux->parent,
> + mux->ext_info[private].name,
> + buf, len);
> + if (ret < 0) {
> + iio_mux_deselect(mux);
> + devm_kfree(dev, new);
> + return ret;
> + }
> +
> + devm_kfree(dev, mux->child[idx].ext_info_cache[private].data);
> + mux->child[idx].ext_info_cache[private].data = new;
> + mux->child[idx].ext_info_cache[private].size = len;
> +
> + iio_mux_deselect(mux);
> +
> + return ret;
> +}
> +
> +static int mux_configure_channel(struct device *dev, struct mux *mux,
> + struct device_node *child_np, int idx)
> +{
> + struct mux_child *child = &mux->child[idx];
> + struct iio_chan_spec *c = &mux->c[idx];
> + const struct iio_chan_spec *pc = mux->parent->channel;
> + char *page;
> + int num_ext_info;
> + int i;
> + int ret;
> +
> + c->indexed = 1;
> + c->channel = idx;
> + c->output = pc->output;
> + c->datasheet_name = child_np->name;
> + c->ext_info = mux->ext_info;
> +
> + ret = iio_get_channel_type(mux->parent, &c->type);
> + if (ret < 0) {
> + dev_err(dev, "failed to get parent channel type\n");
> + return ret;
> + }
> +
> + if (iio_channel_has_info(pc, IIO_CHAN_INFO_RAW))
> + c->info_mask_separate |= BIT(IIO_CHAN_INFO_RAW);
> + if (iio_channel_has_info(pc, IIO_CHAN_INFO_SCALE))
> + c->info_mask_separate |= BIT(IIO_CHAN_INFO_SCALE);
> +
> + if (iio_channel_has_available(pc, IIO_CHAN_INFO_RAW))
> + c->info_mask_separate_available |= BIT(IIO_CHAN_INFO_RAW);
> +
> + ret = of_property_read_u32(child_np, "reg", &child->state);
> + if (ret < 0) {
> + dev_err(dev, "no reg property for node '%s'\n", child_np->name);
> + return ret;
> + }
> +
> + for (i = 0; i < idx; ++i) {
> + if (mux->child[i].state == child->state) {
> + dev_err(dev, "double use of reg %d\n", child->state);
> + return -EINVAL;
> + }
> + }
> +
> + num_ext_info = iio_get_channel_ext_info_count(mux->parent);
> + if (num_ext_info) {
> + page = devm_kzalloc(dev, PAGE_SIZE, GFP_KERNEL);
> + if (!page)
> + return -ENOMEM;
> + }
> + child->ext_info_cache = devm_kzalloc(dev,
> + sizeof(*child->ext_info_cache) *
> + num_ext_info, GFP_KERNEL);
> + for (i = 0; i < num_ext_info; ++i) {
> + child->ext_info_cache[i].size = -1;
> +
> + if (!pc->ext_info[i].write)
> + continue;
> + if (!pc->ext_info[i].read)
> + continue;
> +
> + ret = iio_read_channel_ext_info(mux->parent,
> + mux->ext_info[i].name,
> + page);
> + if (ret < 0) {
> + dev_err(dev, "failed to get ext_info '%s'\n",
> + pc->ext_info[i].name);
> + return ret;
> + }
> + if (ret >= PAGE_SIZE) {
> + dev_err(dev, "too large ext_info '%s'\n",
> + pc->ext_info[i].name);
> + return -EINVAL;
> + }
> +
> + child->ext_info_cache[i].data = devm_kmemdup(dev, page, ret + 1,
> + GFP_KERNEL);
> + child->ext_info_cache[i].data[ret] = 0;
> + child->ext_info_cache[i].size = ret;
> + }
> +
> + if (num_ext_info)
> + devm_kfree(dev, page);
> +
> + return 0;
> +}
> +
> +static int mux_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *np = pdev->dev.of_node;
> + struct device_node *child_np;
> + struct iio_dev *indio_dev;
> + struct iio_channel *parent;
> + struct mux *mux;
> + int sizeof_ext_info;
> + int children;
> + int sizeof_priv;
> + int i;
> + int ret;
> +
> + if (!np)
> + return -ENODEV;
> +
> + parent = devm_iio_channel_get(dev, "parent");
> + if (IS_ERR(parent)) {
> + if (PTR_ERR(parent) != -EPROBE_DEFER)
> + dev_err(dev, "failed to get parent channel\n");
> + return PTR_ERR(parent);
> + }
> +
> + sizeof_ext_info = iio_get_channel_ext_info_count(parent);
> + if (sizeof_ext_info) {
> + sizeof_ext_info += 1; /* one extra entry for the sentinel */
> + sizeof_ext_info *= sizeof(*mux->ext_info);
> + }
> +
> + children = of_get_child_count(np);
> + if (children <= 0) {
> + dev_err(dev, "not even a single child\n");
> + return -EINVAL;
> + }
> +
> + sizeof_priv = sizeof(*mux);
> + sizeof_priv += sizeof(*mux->child) * children;
> + sizeof_priv += sizeof(*mux->c) * children;
> + sizeof_priv += sizeof_ext_info;
> +
> + indio_dev = devm_iio_device_alloc(dev, sizeof_priv);
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + mux = iio_priv(indio_dev);
> + mux->child = (struct mux_child *)(mux + 1);
> + mux->c = (struct iio_chan_spec *)(mux->child + children);
> +
> + platform_set_drvdata(pdev, indio_dev);
> +
> + mux->parent = parent;
> + mux->cached_state = -1;
> +
> + indio_dev->name = dev_name(dev);
> + indio_dev->dev.parent = dev;
> + indio_dev->info = &mux_info;
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->channels = mux->c;
> + indio_dev->num_channels = children;
> + if (sizeof_ext_info) {
> + mux->ext_info = devm_kmemdup(dev,
> + parent->channel->ext_info,
> + sizeof_ext_info, GFP_KERNEL);
> + if (!mux->ext_info)
> + return -ENOMEM;
> +
> + for (i = 0; mux->ext_info[i].name; ++i) {
> + if (parent->channel->ext_info[i].read)
> + mux->ext_info[i].read = mux_read_ext_info;
> + if (parent->channel->ext_info[i].write)
> + mux->ext_info[i].write = mux_write_ext_info;
> + mux->ext_info[i].private = i;
> + }
> + }
> +
> + i = 0;
> + for_each_child_of_node(np, child_np) {
> + ret = mux_configure_channel(dev, mux, child_np, i);
> + if (ret < 0)
> + return ret;
> + i++;
> + }
> +
> + mux->control = devm_mux_control_get(dev, "mux");
> + if (IS_ERR(mux->control)) {
> + if (PTR_ERR(mux->control) != -EPROBE_DEFER)
> + dev_err(dev, "failed to get control-mux\n");
> + return PTR_ERR(mux->control);
> + }
> +
> + ret = devm_iio_device_register(dev, indio_dev);
> + if (ret) {
> + dev_err(dev, "failed to register iio device\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static const struct of_device_id mux_match[] = {
> + { .compatible = "iio-mux" },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, mux_match);
> +
> +static struct platform_driver mux_driver = {
> + .probe = mux_probe,
> + .driver = {
> + .name = "iio-mux",
> + .of_match_table = mux_match,
> + },
> +};
> +module_platform_driver(mux_driver);
> +
> +MODULE_DESCRIPTION("IIO multiplexer driver");
> +MODULE_AUTHOR("Peter Rosin <peda@axentia.se>");
> +MODULE_LICENSE("GPL v2");
>
^ permalink raw reply
* Re: [v2,2/3] hwmon: (mcp3021) add devicetree bindings documentation
From: Guenter Roeck @ 2016-11-19 16:28 UTC (permalink / raw)
To: Clemens Gruber
Cc: linux-hwmon-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Jean Delvare,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20161027223345.16733-2-clemens.gruber-lZxf/j91sTNWk0Htik3J/w@public.gmane.org>
On Fri, Oct 28, 2016 at 12:33:44AM +0200, Clemens Gruber wrote:
> Document the devicetree bindings for the Microchip MCP3021/3221.
>
> Signed-off-by: Clemens Gruber <clemens.gruber-lZxf/j91sTNWk0Htik3J/w@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Applied to -next.
Guenter
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^ permalink raw reply
* Re: [PATCH v6 2/8] drivers:input:tsc2007: send pendown and penup only once like ads7846(+tsc2046) driver does
From: Dmitry Torokhov @ 2016-11-19 18:12 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Rob Herring, Mark Rutland, Benoît Cousson, Tony Lindgren,
Russell King, Arnd Bergmann, Michael Welling, Mika Penttilä,
Javier Martinez Canillas, Igor Grinberg, Sebastian Reichel,
Andrew F. Davis, Mark Brown, Jonathan Cameron, Hans de Goede,
Sangwon Jee, linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA, letux-kernel
In-Reply-To: <5e961a92f11b1509bd0effb96ef560f19839aa9d.1477557860.git.hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
On Thu, Oct 27, 2016 at 10:44:15AM +0200, H. Nikolaus Schaller wrote:
> this should reduce unnecessary input events.
The duplicates will be filtered out by the input core anyway. I like to
keep the drivers simple.
Thanks.
>
> Signed-off-by: H. Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
> ---
> drivers/input/touchscreen/tsc2007.c | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/input/touchscreen/tsc2007.c b/drivers/input/touchscreen/tsc2007.c
> index c1d9593..e9d5086 100644
> --- a/drivers/input/touchscreen/tsc2007.c
> +++ b/drivers/input/touchscreen/tsc2007.c
> @@ -94,6 +94,7 @@ struct tsc2007 {
>
> wait_queue_head_t wait;
> bool stopped;
> + bool pendown;
>
> int (*get_pendown_state)(struct device *);
> void (*clear_penirq)(void);
> @@ -227,7 +228,11 @@ static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
> sx, sy, rt);
>
> /* report event */
> - input_report_key(input, BTN_TOUCH, 1);
> + if (!ts->pendown) {
> + input_report_key(input, BTN_TOUCH, 1);
> + ts->pendown = true;
> + }
> +
> touchscreen_report_pos(ts->input, &ts->prop,
> (unsigned int) sx,
> (unsigned int) sy,
> @@ -250,9 +255,13 @@ static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
>
> dev_dbg(&ts->client->dev, "UP\n");
>
> - input_report_key(input, BTN_TOUCH, 0);
> - input_report_abs(input, ABS_PRESSURE, 0);
> - input_sync(input);
> + if (ts->pendown) {
> + input_report_key(input, BTN_TOUCH, 0);
> + input_report_abs(input, ABS_PRESSURE, 0);
> + input_sync(input);
> +
> + ts->pendown = false;
> + }
>
> if (ts->clear_penirq)
> ts->clear_penirq();
> --
> 2.7.3
>
--
Dmitry
^ permalink raw reply
* Re: [PATCH v6 7/8] drivers:input:ads7846(+tsc2046): fix spi module table
From: Dmitry Torokhov @ 2016-11-19 18:18 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Rob Herring, Mark Rutland, Benoît Cousson, Tony Lindgren,
Russell King, Arnd Bergmann, Michael Welling, Mika Penttilä,
Javier Martinez Canillas, Igor Grinberg, Sebastian Reichel,
Andrew F. Davis, Mark Brown, Jonathan Cameron, Hans de Goede,
Sangwon Jee, linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA, letux-kernel
In-Reply-To: <54f282e1adebeeb133687b6c430ecbb6f2fe6d5b.1477557860.git.hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
On Thu, Oct 27, 2016 at 10:44:20AM +0200, H. Nikolaus Schaller wrote:
> Fix module table so that the driver is loaded if compiled
> as module and requested by DT.
We really need to fix it between spi/i23c core and module utils instead
of keeping adding duplicate IDs all over drivers. We already have OF
module device table containing the same data, we should be able to use
it.
Thanks.
>
> Signed-off-by: H. Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
> ---
> drivers/input/touchscreen/ads7846.c | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c
> index 400e421..50c85d2 100644
> --- a/drivers/input/touchscreen/ads7846.c
> +++ b/drivers/input/touchscreen/ads7846.c
> @@ -1532,6 +1532,16 @@ static int ads7846_remove(struct spi_device *spi)
> return 0;
> }
>
> +static const struct spi_device_id ads7846_idtable[] = {
> + { "tsc2046", 0 },
> + { "ads7843", 0 },
> + { "ads7845", 0 },
> + { "ads7846", 0 },
> + { "ads7873", 0 },
> + { }
> +};
> +MODULE_DEVICE_TABLE(spi, ads7846_idtable);
> +
> static struct spi_driver ads7846_driver = {
> .driver = {
> .name = "ads7846",
> @@ -1546,4 +1556,3 @@ module_spi_driver(ads7846_driver);
>
> MODULE_DESCRIPTION("ADS7846 TouchScreen Driver");
> MODULE_LICENSE("GPL");
> -MODULE_ALIAS("spi:ads7846");
> --
> 2.7.3
>
--
Dmitry
^ permalink raw reply
* Re: [PATCH v6 4/8] drivers:input:tsc2007: add iio interface to read external ADC input and temperature
From: Dmitry Torokhov @ 2016-11-19 18:36 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Rob Herring, Mark Rutland, Benoît Cousson, Tony Lindgren,
Russell King, Arnd Bergmann, Michael Welling, Mika Penttilä,
Javier Martinez Canillas, Igor Grinberg, Sebastian Reichel,
Andrew F. Davis, Mark Brown, Jonathan Cameron, Hans de Goede,
Sangwon Jee, linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA, letux-kernel
In-Reply-To: <810571cc83159c674116f6f55624ca6227510f96.1477557860.git.hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
Hi Nikolaus,
On Thu, Oct 27, 2016 at 10:44:17AM +0200, H. Nikolaus Schaller wrote:
> The tsc2007 chip not only has a resistive touch screen controller but
> also an external AUX adc imput which can be used for an ambient
> light sensor, battery voltage monitoring or any general purpose.
>
> Additionally it can measure the chip temperature.
>
> This extension provides an iio interface for these adc channels.
>
> Since it is not wasting much resources and is very straightforward,
> we simply provide all other adc channels as optional iio interfaces
> as weel. This can be used for debugging or special applications.
>
> This patch also splits the tsc2007 driver in several source files:
> tsc2007.h -- constants, structs and stubs
> tsc2007_core.c -- functional parts of the original driver
> tsc2007_iio.c -- the optional iio stuff
>
> Makefile magic allows to conditionally link the iio
> stuff if CONFIG_IIO=y in a way that it works with
> CONFIG_TOUCHSCREEN_TSC2007=m.
What about CONFIG_TOUCHSCREEN_TSC2007=y and CONFIG_IIO=m?
>
> Signed-off-by: H. Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
> ---
> drivers/input/touchscreen/Makefile | 2 +
> drivers/input/touchscreen/tsc2007.h | 129 ++++++++++++++++++
> .../touchscreen/{tsc2007.c => tsc2007_core.c} | 127 ++++++-----------
> drivers/input/touchscreen/tsc2007_iio.c | 151 +++++++++++++++++++++
> 4 files changed, 320 insertions(+), 89 deletions(-)
> create mode 100644 drivers/input/touchscreen/tsc2007.h
> rename drivers/input/touchscreen/{tsc2007.c => tsc2007_core.c} (84%)
> create mode 100644 drivers/input/touchscreen/tsc2007_iio.c
>
> diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
> index 81b8645..d932e2d 100644
> --- a/drivers/input/touchscreen/Makefile
> +++ b/drivers/input/touchscreen/Makefile
> @@ -80,6 +80,8 @@ obj-$(CONFIG_TOUCHSCREEN_TSC_SERIO) += tsc40.o
> obj-$(CONFIG_TOUCHSCREEN_TSC200X_CORE) += tsc200x-core.o
> obj-$(CONFIG_TOUCHSCREEN_TSC2004) += tsc2004.o
> obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o
> +tsc2007-y := tsc2007_core.o
> +tsc2007-$(CONFIG_IIO) += tsc2007_iio.o
> obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o
> obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
> obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o
> diff --git a/drivers/input/touchscreen/tsc2007.h b/drivers/input/touchscreen/tsc2007.h
> new file mode 100644
> index 0000000..87d5ce5
> --- /dev/null
> +++ b/drivers/input/touchscreen/tsc2007.h
> @@ -0,0 +1,129 @@
> +/*
> + * drivers/input/touchscreen/tsc2007.h
No file names in comments please.
> + *
> + * Copyright (c) 2008 MtekVision Co., Ltd.
> + * Kwangwoo Lee <kwlee-ec7hoAtq5SbSUeElwK9/Pw@public.gmane.org>
> + *
> + * Using code from:
> + * - ads7846.c
> + * Copyright (c) 2005 David Brownell
> + * Copyright (c) 2006 Nokia Corporation
> + * - corgi_ts.c
> + * Copyright (C) 2004-2005 Richard Purdie
> + * - omap_ts.[hc], ads7846.h, ts_osk.c
> + * Copyright (C) 2002 MontaVista Software
> + * Copyright (C) 2004 Texas Instruments
> + * Copyright (C) 2005 Dirk Behme
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/slab.h>
> +#include <linux/input.h>
> +#include <linux/interrupt.h>
> +#include <linux/i2c.h>
> +#include <linux/i2c/tsc2007.h>
> +#include <linux/of_device.h>
> +#include <linux/of.h>
> +#include <linux/of_gpio.h>
> +#include <linux/input/touchscreen.h>
> +
> +#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
> +#define TSC2007_MEASURE_AUX (0x2 << 4)
> +#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
> +#define TSC2007_ACTIVATE_XN (0x8 << 4)
> +#define TSC2007_ACTIVATE_YN (0x9 << 4)
> +#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
> +#define TSC2007_SETUP (0xb << 4)
> +#define TSC2007_MEASURE_X (0xc << 4)
> +#define TSC2007_MEASURE_Y (0xd << 4)
> +#define TSC2007_MEASURE_Z1 (0xe << 4)
> +#define TSC2007_MEASURE_Z2 (0xf << 4)
> +
> +#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
> +#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
> +#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
> +#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
> +
> +#define TSC2007_12BIT (0x0 << 1)
> +#define TSC2007_8BIT (0x1 << 1)
> +
> +#define MAX_12BIT ((1 << 12) - 1)
> +
> +#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
> +
> +#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
> +#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
> +#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
> +#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
> +#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
> +
> +struct ts_event {
> + u16 x;
> + u16 y;
> + u16 z1, z2;
> +};
> +
> +struct tsc2007 {
> + struct input_dev *input;
> + char phys[32];
> +
> + struct i2c_client *client;
> +
> + u16 model;
> + u16 x_plate_ohms;
> +
> + struct touchscreen_properties prop;
> +
> + bool report_resistance;
> + u16 min_x;
> + u16 min_y;
> + u16 max_x;
> + u16 max_y;
> + u16 max_rt;
> + unsigned long poll_period; /* in jiffies */
> + int fuzzx;
> + int fuzzy;
> + int fuzzz;
> +
> + unsigned int gpio;
> + int irq;
> +
> + wait_queue_head_t wait;
> + bool stopped;
> + bool pendown;
> +
> + int (*get_pendown_state)(struct device *);
> + void (*clear_penirq)(void);
> +
> + struct mutex mlock;
> +#ifdef CONFIG_IIO
> + void *private;
> +#endif
> +};
> +
> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> + struct ts_event *tc);
> +bool tsc2007_is_pen_down(struct tsc2007 *ts);
> +
> +#ifdef CONFIG_IIO
> +
> +/* defined in tsc2007_iio.c */
> +int tsc2007_iio_configure(struct tsc2007 *ts);
> +void tsc2007_iio_unconfigure(struct tsc2007 *ts);
> +
> +#else /* CONFIG_IIO */
> +
> +static inline int tsc2007_iio_configure(struct tsc2007 *ts)
> +{
> + return 0;
> +}
> +static inline void tsc2007_iio_unconfigure(struct tsc2007 *ts)
> +{
> +}
> +
> +#endif /* CONFIG_IIO */
> diff --git a/drivers/input/touchscreen/tsc2007.c b/drivers/input/touchscreen/tsc2007_core.c
> similarity index 84%
> rename from drivers/input/touchscreen/tsc2007.c
> rename to drivers/input/touchscreen/tsc2007_core.c
> index 5e3c4bf..56c9a52 100644
> --- a/drivers/input/touchscreen/tsc2007.c
> +++ b/drivers/input/touchscreen/tsc2007_core.c
> @@ -20,87 +20,9 @@
> * published by the Free Software Foundation.
> */
>
> -#include <linux/module.h>
> -#include <linux/slab.h>
> -#include <linux/input.h>
> -#include <linux/interrupt.h>
> -#include <linux/i2c.h>
> -#include <linux/i2c/tsc2007.h>
> -#include <linux/of_device.h>
> -#include <linux/of.h>
> -#include <linux/of_gpio.h>
> -#include <linux/input/touchscreen.h>
> -
> -#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
> -#define TSC2007_MEASURE_AUX (0x2 << 4)
> -#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
> -#define TSC2007_ACTIVATE_XN (0x8 << 4)
> -#define TSC2007_ACTIVATE_YN (0x9 << 4)
> -#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
> -#define TSC2007_SETUP (0xb << 4)
> -#define TSC2007_MEASURE_X (0xc << 4)
> -#define TSC2007_MEASURE_Y (0xd << 4)
> -#define TSC2007_MEASURE_Z1 (0xe << 4)
> -#define TSC2007_MEASURE_Z2 (0xf << 4)
> -
> -#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
> -#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
> -#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
> -#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
> -
> -#define TSC2007_12BIT (0x0 << 1)
> -#define TSC2007_8BIT (0x1 << 1)
> -
> -#define MAX_12BIT ((1 << 12) - 1)
> -
> -#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
> -
> -#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
> -#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
> -#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
> -#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
> -#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
> -
> -struct ts_event {
> - u16 x;
> - u16 y;
> - u16 z1, z2;
> -};
> -
> -struct tsc2007 {
> - struct input_dev *input;
> - char phys[32];
> -
> - struct i2c_client *client;
> -
> - u16 model;
> - u16 x_plate_ohms;
> -
> - struct touchscreen_properties prop;
> -
> - bool report_resistance;
> - u16 min_x;
> - u16 min_y;
> - u16 max_x;
> - u16 max_y;
> - u16 max_rt;
> - unsigned long poll_period; /* in jiffies */
> - int fuzzx;
> - int fuzzy;
> - int fuzzz;
> +#include "tsc2007.h"
>
> - unsigned gpio;
> - int irq;
> -
> - wait_queue_head_t wait;
> - bool stopped;
> - bool pendown;
> -
> - int (*get_pendown_state)(struct device *);
> - void (*clear_penirq)(void);
> -};
> -
> -static inline int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
> {
> s32 data;
> u16 val;
> @@ -121,6 +43,7 @@ static inline int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
>
> return val;
> }
> +EXPORT_SYMBOL(tsc2007_xfer);
Why do you export all these symbols? As far as I can tell it is still
the same module, but now comprising of maybe 2 object files liked
together. You do not need to export symbols in this case, liker will
resolve them when building the module.
>
> static void tsc2007_read_values(struct tsc2007 *tsc, struct ts_event *tc)
> {
> @@ -138,7 +61,7 @@ static void tsc2007_read_values(struct tsc2007 *tsc, struct ts_event *tc)
> tsc2007_xfer(tsc, PWRDOWN);
> }
>
> -static u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> struct ts_event *tc)
> {
> u32 rt = 0;
> @@ -158,8 +81,9 @@ static u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>
> return rt;
> }
> +EXPORT_SYMBOL(tsc2007_calculate_resistance);
>
> -static bool tsc2007_is_pen_down(struct tsc2007 *ts)
> +bool tsc2007_is_pen_down(struct tsc2007 *ts)
> {
> /*
> * NOTE: We can't rely on the pressure to determine the pen down
> @@ -180,6 +104,7 @@ static bool tsc2007_is_pen_down(struct tsc2007 *ts)
>
> return ts->get_pendown_state(&ts->client->dev);
> }
> +EXPORT_SYMBOL(tsc2007_is_pen_down);
>
> static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
> {
> @@ -192,7 +117,10 @@ static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
> while (!ts->stopped && tsc2007_is_pen_down(ts)) {
>
> /* pen is down, continue with the measurement */
> +
> + mutex_lock(&ts->mlock);
> tsc2007_read_values(ts, &tc);
> + mutex_unlock(&ts->mlock);
>
> rt = tsc2007_calculate_resistance(ts, &tc);
>
> @@ -450,7 +378,8 @@ static void tsc2007_call_exit_platform_hw(void *data)
> static int tsc2007_probe(struct i2c_client *client,
> const struct i2c_device_id *id)
> {
> - const struct tsc2007_platform_data *pdata = dev_get_platdata(&client->dev);
> + const struct tsc2007_platform_data *pdata =
> + dev_get_platdata(&client->dev);
> struct tsc2007 *ts;
> struct input_dev *input_dev;
> int err;
> @@ -472,7 +401,13 @@ static int tsc2007_probe(struct i2c_client *client,
> ts->client = client;
> ts->irq = client->irq;
> ts->input = input_dev;
> +
> + err = tsc2007_iio_configure(ts);
No, this is not going to work. From teh cursory glance at the new iio
code it uses resources that you set up later in tsc2007_probe(). I'd say
this needs to go last.
> + if (err < 0)
> + return err;
> +
> init_waitqueue_head(&ts->wait);
> + mutex_init(&ts->mlock);
>
> snprintf(ts->phys, sizeof(ts->phys),
> "%s/input0", dev_name(&client->dev));
> @@ -494,7 +429,7 @@ static int tsc2007_probe(struct i2c_client *client,
> if (pdata) {
> err = tsc2007_probe_pdev(client, ts, pdata, id);
> if (err)
> - return err;
> + goto probe_err;
> input_set_abs_params(input_dev, ABS_X, 0, ts->max_x-ts->min_x,
> ts->fuzzx, 0);
> input_set_abs_params(input_dev, ABS_Y, 0, ts->max_y-ts->min_y,
> @@ -504,7 +439,7 @@ static int tsc2007_probe(struct i2c_client *client,
> } else {
> err = tsc2007_probe_dt(client, ts);
> if (err)
> - return err;
> + goto probe_err;
> }
>
> if (pdata) {
> @@ -516,7 +451,7 @@ static int tsc2007_probe(struct i2c_client *client,
> dev_err(&client->dev,
> "Failed to register exit_platform_hw action, %d\n",
> err);
> - return err;
> + goto probe_err;
> }
> }
>
> @@ -533,7 +468,7 @@ static int tsc2007_probe(struct i2c_client *client,
> if (err) {
> dev_err(&client->dev, "Failed to request irq %d: %d\n",
> ts->irq, err);
> - return err;
> + goto probe_err;
> }
>
> tsc2007_stop(ts);
> @@ -543,17 +478,30 @@ static int tsc2007_probe(struct i2c_client *client,
> if (err < 0) {
> dev_err(&client->dev,
> "Failed to setup chip: %d\n", err);
> - return err; /* usually, chip does not respond */
> + goto probe_err; /* chip does not respond */
> }
>
> err = input_register_device(input_dev);
> if (err) {
> dev_err(&client->dev,
> "Failed to register input device: %d\n", err);
> - return err;
> + goto probe_err;
> }
>
> return 0;
> +
> +probe_err:
> + tsc2007_iio_unconfigure(ts);
> + return err;
> +}
> +
> +static int tsc2007_remove(struct i2c_client *client)
> +{
> + struct tsc2007 *ts = i2c_get_clientdata(client);
> +
> + tsc2007_iio_unconfigure(ts);
> + input_unregister_device(ts->input);
Why did you add input_unregister_device() for devm-managed device?
> + return 0;
> }
>
> static const struct i2c_device_id tsc2007_idtable[] = {
> @@ -578,6 +526,7 @@ static struct i2c_driver tsc2007_driver = {
> },
> .id_table = tsc2007_idtable,
> .probe = tsc2007_probe,
> + .remove = tsc2007_remove,
> };
>
> module_i2c_driver(tsc2007_driver);
> diff --git a/drivers/input/touchscreen/tsc2007_iio.c b/drivers/input/touchscreen/tsc2007_iio.c
> new file mode 100644
> index 0000000..0375d8b
> --- /dev/null
> +++ b/drivers/input/touchscreen/tsc2007_iio.c
> @@ -0,0 +1,151 @@
> +/*
> + * drivers/input/touchscreen/tsc2007_iio.c
> + *
> + * Copyright (c) 2016 Golden Delicious Comp. GmbH&Co. KG
> + * Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include "tsc2007.h"
> +#include <linux/iio/iio.h>
> +
> +struct tsc2007_iio {
> + struct tsc2007 *ts;
> +};
> +
> +#define TSC2007_CHAN_IIO(_chan, _name, _type, _chan_info) \
> +{ \
> + .datasheet_name = _name, \
> + .type = _type, \
> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
> + BIT(_chan_info), \
> + .indexed = 1, \
> + .channel = _chan, \
> +}
> +
> +static const struct iio_chan_spec tsc2007_iio_channel[] = {
> + TSC2007_CHAN_IIO(0, "x", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> + TSC2007_CHAN_IIO(1, "y", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> + TSC2007_CHAN_IIO(2, "z1", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> + TSC2007_CHAN_IIO(3, "z2", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> + TSC2007_CHAN_IIO(4, "adc", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> + TSC2007_CHAN_IIO(5, "rt", IIO_VOLTAGE, IIO_CHAN_INFO_RAW), /* Ohms? */
> + TSC2007_CHAN_IIO(6, "pen", IIO_PRESSURE, IIO_CHAN_INFO_RAW),
> + TSC2007_CHAN_IIO(7, "temp0", IIO_TEMP, IIO_CHAN_INFO_RAW),
> + TSC2007_CHAN_IIO(8, "temp1", IIO_TEMP, IIO_CHAN_INFO_RAW),
> +};
> +
> +static int tsc2007_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan, int *val, int *val2, long mask)
> +{
> + struct tsc2007_iio *iio = iio_priv(indio_dev);
> + struct tsc2007 *tsc = iio->ts;
> + int adc_chan = chan->channel;
> + int ret = 0;
> +
> + if (adc_chan >= ARRAY_SIZE(tsc2007_iio_channel))
> + return -EINVAL;
> +
> + if (mask != IIO_CHAN_INFO_RAW)
> + return -EINVAL;
> +
> + mutex_lock(&tsc->mlock);
> +
> + switch (chan->channel) {
> + case 0:
> + *val = tsc2007_xfer(tsc, READ_X);
> + break;
> + case 1:
> + *val = tsc2007_xfer(tsc, READ_Y);
> + break;
> + case 2:
> + *val = tsc2007_xfer(tsc, READ_Z1);
> + break;
> + case 3:
> + *val = tsc2007_xfer(tsc, READ_Z2);
> + break;
> + case 4:
> + *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX));
> + break;
> + case 5: {
> + struct ts_event tc;
> +
> + tc.x = tsc2007_xfer(tsc, READ_X);
> + tc.z1 = tsc2007_xfer(tsc, READ_Z1);
> + tc.z2 = tsc2007_xfer(tsc, READ_Z2);
> + *val = tsc2007_calculate_resistance(tsc, &tc);
> + break;
> + }
> + case 6:
> + *val = tsc2007_is_pen_down(tsc);
> + break;
> + case 7:
> + *val = tsc2007_xfer(tsc,
> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP0));
> + break;
> + case 8:
> + *val = tsc2007_xfer(tsc,
> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP1));
> + break;
> + }
> +
> + /* Prepare for next touch reading - power down ADC, enable PENIRQ */
> + tsc2007_xfer(tsc, PWRDOWN);
> +
> + mutex_unlock(&tsc->mlock);
> +
> + ret = IIO_VAL_INT;
> +
> + return ret;
> +}
> +
> +static const struct iio_info tsc2007_iio_info = {
> + .read_raw = tsc2007_read_raw,
> + .driver_module = THIS_MODULE,
> +};
> +
> +int tsc2007_iio_configure(struct tsc2007 *ts)
> +{
> + int err;
> + struct iio_dev *indio_dev;
> + struct tsc2007_iio *iio;
> +
> + indio_dev = devm_iio_device_alloc(&ts->client->dev,
> + sizeof(struct tsc2007_iio));
> + if (!indio_dev) {
> + dev_err(&ts->client->dev, "iio_device_alloc failed\n");
> + return -ENOMEM;
> + }
> +
> + iio = iio_priv(indio_dev);
> + iio->ts = ts;
> + ts->private = (void *) indio_dev;
> +
> + indio_dev->name = "tsc2007";
> + indio_dev->dev.parent = &ts->client->dev;
> + indio_dev->info = &tsc2007_iio_info;
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->channels = tsc2007_iio_channel;
> + indio_dev->num_channels = ARRAY_SIZE(tsc2007_iio_channel);
> +
> + err = iio_device_register(indio_dev);
> + if (err < 0) {
> + dev_err(&ts->client->dev, "iio_device_register() failed: %d\n",
> + err);
> + return err;
> + }
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(tsc2007_iio_configure);
> +
> +void tsc2007_iio_unconfigure(struct tsc2007 *ts)
> +{
> + struct iio_dev *indio_dev = ts->private;
> +
> + iio_device_unregister(indio_dev);
> +}
> +EXPORT_SYMBOL(tsc2007_iio_unconfigure);
> --
> 2.7.3
>
Thanks.
--
Dmitry
^ permalink raw reply
* Re: [PATCH v7 4/9] drivers:input:tsc2007: add iio interface to read external ADC input and temperature
From: Dmitry Torokhov @ 2016-11-19 18:38 UTC (permalink / raw)
To: Jonathan Cameron
Cc: H. Nikolaus Schaller, Sebastian Reichel, Mark Rutland,
Benoît Cousson, Tony Lindgren, Russell King, Arnd Bergmann,
Michael Welling, Mika Penttilä, Javier Martinez Canillas,
Igor Grinberg, Andrew F. Davis, Mark Brown, linux-input,
devicetree, linux-kernel, linux-omap, letux-kernel, linux-iio,
kernel
In-Reply-To: <b4d79a26-4353-9860-a884-49c751bbe617@kernel.org>
On Sat, Nov 12, 2016 at 02:19:30PM +0000, Jonathan Cameron wrote:
> On 12/11/16 14:04, Jonathan Cameron wrote:
> > On 11/11/16 19:02, H. Nikolaus Schaller wrote:
> >> The tsc2007 chip not only has a resistive touch screen controller but
> >> also an external AUX adc imput which can be used for an ambient
> >> light sensor, battery voltage monitoring or any general purpose.
> >>
> >> Additionally it can measure the chip temperature.
> >>
> >> This extension provides an iio interface for these adc channels.
> >>
> >> Since it is not wasting much resources and is very straightforward,
> >> we simply provide all other adc channels as optional iio interfaces
> >> as weel. This can be used for debugging or special applications.
> >>
> >> This patch also splits the tsc2007 driver in several source files:
> >> tsc2007.h -- constants, structs and stubs
> >> tsc2007_core.c -- functional parts of the original driver
> >> tsc2007_iio.c -- the optional iio stuff
> >>
> >> Makefile magic allows to conditionally link the iio
> >> stuff if CONFIG_IIO=y in a way that it works with
> >> CONFIG_TOUCHSCREEN_TSC2007=m.
> >>
> >
> > I ran a quick build test and it blows up in a number of ways related to
> > the #ifdef CONFIG_IIO.
> >
> > I'm not entirely sure why but
> > #if IS_ENABLED(CONFIG_IIO) works fine.
> Ah, I'm being sleepy today. It's because I'm building IIO as a module
> and the symbol defined would therefore be CONFIG_IIO_MODULE.
>
> The IS_ENABLED macro takes care of both cases.
No it doesn't. Have you tried building the driver into the kernel with
IIO as a module?
> >
> > Otherwise looks good to me
> >> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> > Reviewed-by: Jonathan Cameron <jic23@kernel.org>
> >> ---
> >> drivers/input/touchscreen/Makefile | 2 +
> >> drivers/input/touchscreen/tsc2007.h | 118 ++++++++++++++++
> >> .../touchscreen/{tsc2007.c => tsc2007_core.c} | 119 ++++++----------
> >> drivers/input/touchscreen/tsc2007_iio.c | 152 +++++++++++++++++++++
> >> 4 files changed, 310 insertions(+), 81 deletions(-)
> >> create mode 100644 drivers/input/touchscreen/tsc2007.h
> >> rename drivers/input/touchscreen/{tsc2007.c => tsc2007_core.c} (85%)
> >> create mode 100644 drivers/input/touchscreen/tsc2007_iio.c
> >>
> >> diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
> >> index 81b8645..d932e2d 100644
> >> --- a/drivers/input/touchscreen/Makefile
> >> +++ b/drivers/input/touchscreen/Makefile
> >> @@ -80,6 +80,8 @@ obj-$(CONFIG_TOUCHSCREEN_TSC_SERIO) += tsc40.o
> >> obj-$(CONFIG_TOUCHSCREEN_TSC200X_CORE) += tsc200x-core.o
> >> obj-$(CONFIG_TOUCHSCREEN_TSC2004) += tsc2004.o
> >> obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o
> >> +tsc2007-y := tsc2007_core.o
> >> +tsc2007-$(CONFIG_IIO) += tsc2007_iio.o
> >> obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o
> >> obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
> >> obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o
> >> diff --git a/drivers/input/touchscreen/tsc2007.h b/drivers/input/touchscreen/tsc2007.h
> >> new file mode 100644
> >> index 0000000..5049bf8
> >> --- /dev/null
> >> +++ b/drivers/input/touchscreen/tsc2007.h
> >> @@ -0,0 +1,118 @@
> >> +/*
> >> + * drivers/input/touchscreen/tsc2007.h
> >> + *
> >> + * Copyright (c) 2008 MtekVision Co., Ltd.
> >> + * Kwangwoo Lee <kwlee@mtekvision.com>
> >> + *
> >> + * Using code from:
> >> + * - ads7846.c
> >> + * Copyright (c) 2005 David Brownell
> >> + * Copyright (c) 2006 Nokia Corporation
> >> + * - corgi_ts.c
> >> + * Copyright (C) 2004-2005 Richard Purdie
> >> + * - omap_ts.[hc], ads7846.h, ts_osk.c
> >> + * Copyright (C) 2002 MontaVista Software
> >> + * Copyright (C) 2004 Texas Instruments
> >> + * Copyright (C) 2005 Dirk Behme
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License version 2 as
> >> + * published by the Free Software Foundation.
> >> + */
> >> +
> >> +#include <linux/input/touchscreen.h>
> >> +
> >> +#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
> >> +#define TSC2007_MEASURE_AUX (0x2 << 4)
> >> +#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
> >> +#define TSC2007_ACTIVATE_XN (0x8 << 4)
> >> +#define TSC2007_ACTIVATE_YN (0x9 << 4)
> >> +#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
> >> +#define TSC2007_SETUP (0xb << 4)
> >> +#define TSC2007_MEASURE_X (0xc << 4)
> >> +#define TSC2007_MEASURE_Y (0xd << 4)
> >> +#define TSC2007_MEASURE_Z1 (0xe << 4)
> >> +#define TSC2007_MEASURE_Z2 (0xf << 4)
> >> +
> >> +#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
> >> +#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
> >> +#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
> >> +#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
> >> +
> >> +#define TSC2007_12BIT (0x0 << 1)
> >> +#define TSC2007_8BIT (0x1 << 1)
> >> +
> >> +#define MAX_12BIT ((1 << 12) - 1)
> >> +
> >> +#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
> >> +
> >> +#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
> >> +#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
> >> +#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
> >> +#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
> >> +#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
> >> +
> >> +struct ts_event {
> >> + u16 x;
> >> + u16 y;
> >> + u16 z1, z2;
> >> +};
> >> +
> >> +struct tsc2007 {
> >> + struct input_dev *input;
> >> + char phys[32];
> >> +
> >> + struct i2c_client *client;
> >> +
> >> + u16 model;
> >> + u16 x_plate_ohms;
> >> +
> >> + struct touchscreen_properties prop;
> >> +
> >> + bool report_resistance;
> >> + u16 min_x;
> >> + u16 min_y;
> >> + u16 max_x;
> >> + u16 max_y;
> >> + u16 max_rt;
> >> + unsigned long poll_period; /* in jiffies */
> >> + int fuzzx;
> >> + int fuzzy;
> >> + int fuzzz;
> >> +
> >> + unsigned int gpio;
> >> + int irq;
> >> +
> >> + wait_queue_head_t wait;
> >> + bool stopped;
> >> + bool pendown;
> >> +
> >> + int (*get_pendown_state)(struct device *);
> >> + void (*clear_penirq)(void);
> >> +
> >> + struct mutex mlock;
> >> + struct iio_dev *iio_dev; /* optional */
> >> +};
> >> +
> >> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
> >> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> >> + struct ts_event *tc);
> >> +bool tsc2007_is_pen_down(struct tsc2007 *ts);
> >> +
> >> +#ifdef CONFIG_IIO
> >> +
> >> +/* defined in tsc2007_iio.c */
> >> +int tsc2007_iio_configure(struct tsc2007 *ts);
> >> +void tsc2007_iio_unconfigure(struct tsc2007 *ts);
> >> +
> >> +#else /* CONFIG_IIO */
> >> +
> >> +static inline int tsc2007_iio_configure(struct tsc2007 *ts)
> >> +{
> >> + return 0;
> >> +}
> >> +static inline void tsc2007_iio_unconfigure(struct tsc2007 *ts)
> >> +{
> >> +}
> >> +
> >> +#endif /* CONFIG_IIO */
> >> diff --git a/drivers/input/touchscreen/tsc2007.c b/drivers/input/touchscreen/tsc2007_core.c
> >> similarity index 85%
> >> rename from drivers/input/touchscreen/tsc2007.c
> >> rename to drivers/input/touchscreen/tsc2007_core.c
> >> index 5e3c4bf..72775ae 100644
> >> --- a/drivers/input/touchscreen/tsc2007.c
> >> +++ b/drivers/input/touchscreen/tsc2007_core.c
> >> @@ -27,80 +27,10 @@
> >> #include <linux/i2c.h>
> >> #include <linux/i2c/tsc2007.h>
> >> #include <linux/of_device.h>
> >> -#include <linux/of.h>
> >> #include <linux/of_gpio.h>
> >> -#include <linux/input/touchscreen.h>
> >> -
> >> -#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
> >> -#define TSC2007_MEASURE_AUX (0x2 << 4)
> >> -#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
> >> -#define TSC2007_ACTIVATE_XN (0x8 << 4)
> >> -#define TSC2007_ACTIVATE_YN (0x9 << 4)
> >> -#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
> >> -#define TSC2007_SETUP (0xb << 4)
> >> -#define TSC2007_MEASURE_X (0xc << 4)
> >> -#define TSC2007_MEASURE_Y (0xd << 4)
> >> -#define TSC2007_MEASURE_Z1 (0xe << 4)
> >> -#define TSC2007_MEASURE_Z2 (0xf << 4)
> >> -
> >> -#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
> >> -#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
> >> -#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
> >> -#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
> >> -
> >> -#define TSC2007_12BIT (0x0 << 1)
> >> -#define TSC2007_8BIT (0x1 << 1)
> >> -
> >> -#define MAX_12BIT ((1 << 12) - 1)
> >> -
> >> -#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
> >> -
> >> -#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
> >> -#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
> >> -#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
> >> -#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
> >> -#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
> >> -
> >> -struct ts_event {
> >> - u16 x;
> >> - u16 y;
> >> - u16 z1, z2;
> >> -};
> >> -
> >> -struct tsc2007 {
> >> - struct input_dev *input;
> >> - char phys[32];
> >> -
> >> - struct i2c_client *client;
> >> -
> >> - u16 model;
> >> - u16 x_plate_ohms;
> >> -
> >> - struct touchscreen_properties prop;
> >> -
> >> - bool report_resistance;
> >> - u16 min_x;
> >> - u16 min_y;
> >> - u16 max_x;
> >> - u16 max_y;
> >> - u16 max_rt;
> >> - unsigned long poll_period; /* in jiffies */
> >> - int fuzzx;
> >> - int fuzzy;
> >> - int fuzzz;
> >> +#include "tsc2007.h"
> >>
> >> - unsigned gpio;
> >> - int irq;
> >> -
> >> - wait_queue_head_t wait;
> >> - bool stopped;
> >> - bool pendown;
> >> -
> >> - int (*get_pendown_state)(struct device *);
> >> - void (*clear_penirq)(void);
> >> -};
> >> -
> >> -static inline int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
> >> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
> >> {
> >> s32 data;
> >> u16 val;
> >> @@ -121,6 +51,7 @@ static inline int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
> >>
> >> return val;
> >> }
> >> +EXPORT_SYMBOL(tsc2007_xfer);
> >>
> >> static void tsc2007_read_values(struct tsc2007 *tsc, struct ts_event *tc)
> >> {
> >> @@ -138,7 +69,7 @@ static void tsc2007_read_values(struct tsc2007 *tsc, struct ts_event *tc)
> >> tsc2007_xfer(tsc, PWRDOWN);
> >> }
> >>
> >> -static u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> >> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> >> struct ts_event *tc)
> >> {
> >> u32 rt = 0;
> >> @@ -158,8 +89,9 @@ static u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> >>
> >> return rt;
> >> }
> >> +EXPORT_SYMBOL(tsc2007_calculate_resistance);
> >>
> >> -static bool tsc2007_is_pen_down(struct tsc2007 *ts)
> >> +bool tsc2007_is_pen_down(struct tsc2007 *ts)
> >> {
> >> /*
> >> * NOTE: We can't rely on the pressure to determine the pen down
> >> @@ -180,6 +112,7 @@ static bool tsc2007_is_pen_down(struct tsc2007 *ts)
> >>
> >> return ts->get_pendown_state(&ts->client->dev);
> >> }
> >> +EXPORT_SYMBOL(tsc2007_is_pen_down);
> >>
> >> static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
> >> {
> >> @@ -192,7 +125,10 @@ static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
> >> while (!ts->stopped && tsc2007_is_pen_down(ts)) {
> >>
> >> /* pen is down, continue with the measurement */
> >> +
> >> + mutex_lock(&ts->mlock);
> >> tsc2007_read_values(ts, &tc);
> >> + mutex_unlock(&ts->mlock);
> >>
> >> rt = tsc2007_calculate_resistance(ts, &tc);
> >>
> >> @@ -450,7 +386,8 @@ static void tsc2007_call_exit_platform_hw(void *data)
> >> static int tsc2007_probe(struct i2c_client *client,
> >> const struct i2c_device_id *id)
> >> {
> >> - const struct tsc2007_platform_data *pdata = dev_get_platdata(&client->dev);
> >> + const struct tsc2007_platform_data *pdata =
> >> + dev_get_platdata(&client->dev);
> >> struct tsc2007 *ts;
> >> struct input_dev *input_dev;
> >> int err;
> >> @@ -472,7 +409,13 @@ static int tsc2007_probe(struct i2c_client *client,
> >> ts->client = client;
> >> ts->irq = client->irq;
> >> ts->input = input_dev;
> >> +
> >> + err = tsc2007_iio_configure(ts);
> >> + if (err < 0)
> >> + return err;
> >> +
> >> init_waitqueue_head(&ts->wait);
> >> + mutex_init(&ts->mlock);
> >>
> >> snprintf(ts->phys, sizeof(ts->phys),
> >> "%s/input0", dev_name(&client->dev));
> >> @@ -494,7 +437,7 @@ static int tsc2007_probe(struct i2c_client *client,
> >> if (pdata) {
> >> err = tsc2007_probe_pdev(client, ts, pdata, id);
> >> if (err)
> >> - return err;
> >> + goto probe_err;
> >> input_set_abs_params(input_dev, ABS_X, 0, ts->max_x-ts->min_x,
> >> ts->fuzzx, 0);
> >> input_set_abs_params(input_dev, ABS_Y, 0, ts->max_y-ts->min_y,
> >> @@ -504,7 +447,7 @@ static int tsc2007_probe(struct i2c_client *client,
> >> } else {
> >> err = tsc2007_probe_dt(client, ts);
> >> if (err)
> >> - return err;
> >> + goto probe_err;
> >> }
> >>
> >> if (pdata) {
> >> @@ -516,7 +459,7 @@ static int tsc2007_probe(struct i2c_client *client,
> >> dev_err(&client->dev,
> >> "Failed to register exit_platform_hw action, %d\n",
> >> err);
> >> - return err;
> >> + goto probe_err;
> >> }
> >> }
> >>
> >> @@ -533,7 +476,7 @@ static int tsc2007_probe(struct i2c_client *client,
> >> if (err) {
> >> dev_err(&client->dev, "Failed to request irq %d: %d\n",
> >> ts->irq, err);
> >> - return err;
> >> + goto probe_err;
> >> }
> >>
> >> tsc2007_stop(ts);
> >> @@ -543,17 +486,30 @@ static int tsc2007_probe(struct i2c_client *client,
> >> if (err < 0) {
> >> dev_err(&client->dev,
> >> "Failed to setup chip: %d\n", err);
> >> - return err; /* usually, chip does not respond */
> >> + goto probe_err; /* chip does not respond */
> >> }
> >>
> >> err = input_register_device(input_dev);
> >> if (err) {
> >> dev_err(&client->dev,
> >> "Failed to register input device: %d\n", err);
> >> - return err;
> >> + goto probe_err;
> >> }
> >>
> >> return 0;
> >> +
> >> +probe_err:
> >> + tsc2007_iio_unconfigure(ts);
> >> + return err;
> >> +}
> >> +
> >> +static int tsc2007_remove(struct i2c_client *client)
> >> +{
> >> + struct tsc2007 *ts = i2c_get_clientdata(client);
> >> +
> >> + tsc2007_iio_unconfigure(ts);
> >> + input_unregister_device(ts->input);
> >> + return 0;
> >> }
> >>
> >> static const struct i2c_device_id tsc2007_idtable[] = {
> >> @@ -578,6 +534,7 @@ static struct i2c_driver tsc2007_driver = {
> >> },
> >> .id_table = tsc2007_idtable,
> >> .probe = tsc2007_probe,
> >> + .remove = tsc2007_remove,
> >> };
> >>
> >> module_i2c_driver(tsc2007_driver);
> >> diff --git a/drivers/input/touchscreen/tsc2007_iio.c b/drivers/input/touchscreen/tsc2007_iio.c
> >> new file mode 100644
> >> index 0000000..e492bba
> >> --- /dev/null
> >> +++ b/drivers/input/touchscreen/tsc2007_iio.c
> >> @@ -0,0 +1,152 @@
> >> +/*
> >> + * drivers/input/touchscreen/tsc2007_iio.c
> >> + *
> >> + * Copyright (c) 2016 Golden Delicious Comp. GmbH&Co. KG
> >> + * Nikolaus Schaller <hns@goldelico.com>
> >> + *
> >> + * This program is free software; you can redistribute it and/or modify
> >> + * it under the terms of the GNU General Public License version 2 as
> >> + * published by the Free Software Foundation.
> >> + */
> >> +
> >> +#include <linux/i2c.h>
> >> +#include <linux/iio/iio.h>
> >> +#include "tsc2007.h"
> >> +
> >> +struct tsc2007_iio {
> >> + struct tsc2007 *ts;
> >> +};
> >> +
> >> +#define TSC2007_CHAN_IIO(_chan, _name, _type, _chan_info) \
> >> +{ \
> >> + .datasheet_name = _name, \
> >> + .type = _type, \
> >> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
> >> + BIT(_chan_info), \
> >> + .indexed = 1, \
> >> + .channel = _chan, \
> >> +}
> >> +
> >> +static const struct iio_chan_spec tsc2007_iio_channel[] = {
> >> + TSC2007_CHAN_IIO(0, "x", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> >> + TSC2007_CHAN_IIO(1, "y", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> >> + TSC2007_CHAN_IIO(2, "z1", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> >> + TSC2007_CHAN_IIO(3, "z2", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> >> + TSC2007_CHAN_IIO(4, "adc", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
> >> + TSC2007_CHAN_IIO(5, "rt", IIO_VOLTAGE, IIO_CHAN_INFO_RAW), /* Ohms? */
> >> + TSC2007_CHAN_IIO(6, "pen", IIO_PRESSURE, IIO_CHAN_INFO_RAW),
> >> + TSC2007_CHAN_IIO(7, "temp0", IIO_TEMP, IIO_CHAN_INFO_RAW),
> >> + TSC2007_CHAN_IIO(8, "temp1", IIO_TEMP, IIO_CHAN_INFO_RAW),
> >> +};
> >> +
> >> +static int tsc2007_read_raw(struct iio_dev *indio_dev,
> >> + struct iio_chan_spec const *chan, int *val, int *val2, long mask)
> >> +{
> >> + struct tsc2007_iio *iio = iio_priv(indio_dev);
> >> + struct tsc2007 *tsc = iio->ts;
> >> + int adc_chan = chan->channel;
> >> + int ret = 0;
> >> +
> >> + if (adc_chan >= ARRAY_SIZE(tsc2007_iio_channel))
> >> + return -EINVAL;
> >> +
> >> + if (mask != IIO_CHAN_INFO_RAW)
> >> + return -EINVAL;
> >> +
> >> + mutex_lock(&tsc->mlock);
> >> +
> >> + switch (chan->channel) {
> >> + case 0:
> >> + *val = tsc2007_xfer(tsc, READ_X);
> >> + break;
> >> + case 1:
> >> + *val = tsc2007_xfer(tsc, READ_Y);
> >> + break;
> >> + case 2:
> >> + *val = tsc2007_xfer(tsc, READ_Z1);
> >> + break;
> >> + case 3:
> >> + *val = tsc2007_xfer(tsc, READ_Z2);
> >> + break;
> >> + case 4:
> >> + *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX));
> >> + break;
> >> + case 5: {
> >> + struct ts_event tc;
> >> +
> >> + tc.x = tsc2007_xfer(tsc, READ_X);
> >> + tc.z1 = tsc2007_xfer(tsc, READ_Z1);
> >> + tc.z2 = tsc2007_xfer(tsc, READ_Z2);
> >> + *val = tsc2007_calculate_resistance(tsc, &tc);
> >> + break;
> >> + }
> >> + case 6:
> >> + *val = tsc2007_is_pen_down(tsc);
> >> + break;
> >> + case 7:
> >> + *val = tsc2007_xfer(tsc,
> >> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP0));
> >> + break;
> >> + case 8:
> >> + *val = tsc2007_xfer(tsc,
> >> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP1));
> >> + break;
> >> + }
> >> +
> >> + /* Prepare for next touch reading - power down ADC, enable PENIRQ */
> >> + tsc2007_xfer(tsc, PWRDOWN);
> >> +
> >> + mutex_unlock(&tsc->mlock);
> >> +
> >> + ret = IIO_VAL_INT;
> >> +
> >> + return ret;
> >> +}
> >> +
> >> +static const struct iio_info tsc2007_iio_info = {
> >> + .read_raw = tsc2007_read_raw,
> >> + .driver_module = THIS_MODULE,
> >> +};
> >> +
> >> +int tsc2007_iio_configure(struct tsc2007 *ts)
> >> +{
> >> + int err;
> >> + struct iio_dev *indio_dev;
> >> + struct tsc2007_iio *iio;
> >> +
> >> + indio_dev = devm_iio_device_alloc(&ts->client->dev,
> >> + sizeof(struct tsc2007_iio));
> >> + if (!indio_dev) {
> >> + dev_err(&ts->client->dev, "iio_device_alloc failed\n");
> >> + return -ENOMEM;
> >> + }
> >> +
> >> + iio = iio_priv(indio_dev);
> >> + iio->ts = ts;
> >> + ts->iio_dev = (void *) indio_dev;
> >> +
> >> + indio_dev->name = "tsc2007";
> >> + indio_dev->dev.parent = &ts->client->dev;
> >> + indio_dev->info = &tsc2007_iio_info;
> >> + indio_dev->modes = INDIO_DIRECT_MODE;
> >> + indio_dev->channels = tsc2007_iio_channel;
> >> + indio_dev->num_channels = ARRAY_SIZE(tsc2007_iio_channel);
> >> +
> >> + err = iio_device_register(indio_dev);
> >> + if (err < 0) {
> >> + dev_err(&ts->client->dev, "iio_device_register() failed: %d\n",
> >> + err);
> >> + return err;
> >> + }
> >> +
> >> + return 0;
> >> +}
> >> +EXPORT_SYMBOL(tsc2007_iio_configure);
> >> +
> >> +void tsc2007_iio_unconfigure(struct tsc2007 *ts)
> >> +{
> >> + struct iio_dev *indio_dev = ts->iio_dev;
> >> +
> >> + iio_device_unregister(indio_dev);
> >> +}
> >> +EXPORT_SYMBOL(tsc2007_iio_unconfigure);
> >>
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> >
>
--
Dmitry
^ permalink raw reply
* Re: [PATCH RFC] ARM: dts: add support for Turris Omnia
From: tomas.hlavacek-x+rMaJPWets @ 2016-11-19 20:09 UTC (permalink / raw)
To: Andrew Lunn
Cc: Uwe Kleine-König, Mark Rutland, marex-ynQEQJNshbs,
Jason Cooper, Martin Strba??ka, devicetree-u79uwXL29TY76Z2rM5mHXA,
Rob Herring, Gregory Clement,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Sebastian Hesselbarth
In-Reply-To: <20161114202832.GG24546-g2DYL2Zd6BY@public.gmane.org>
Hello Uwe!
On Mon, Nov 14, 2016 at 9:28 PM, Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> wrote:
>>
>> + i2c@7 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <7>;
>> +
>> + pcawan: gpio@71 {
>> + compatible = "nxp,pca9538";
>> + reg = <0x71>;
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pcawan_pins>;
>> +
>> + interrupt-parent = <&gpio1>;
>> + interrupts = <14
>> IRQ_TYPE_LEVEL_LOW>;
>> +
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> + };
>>
>> The interrupt-controller part doesn't seem to work though, at least
>>
>> + interrupt-parent = <&pcawan>;
>> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
>>
>> in the phy node gives an error.
>
> Interrupts don't seem to work very well with the nxp,pca9538. Which
> is probably why it is disabled by default.
I was thinking about this issue and I can remember that there was an
earlier prototype that had a shared interrupt line from PHY (88E1514)
and from the PCA9538. In this case we needed to specifically disable
the interrupt of the PHY to release the interrupt line (which needed a
hack into PHY driver code). The IRQ from PHY is connected as an
ordinary input to PCA9538 in later board prototype. And the same holds
for the production version.
Do you have CZ11NIC13 or older board revision?
Tomas
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v7 4/9] drivers:input:tsc2007: add iio interface to read external ADC input and temperature
From: Jonathan Cameron @ 2016-11-19 20:09 UTC (permalink / raw)
To: Dmitry Torokhov, Jonathan Cameron
Cc: H. Nikolaus Schaller, Sebastian Reichel, Mark Rutland,
Benoît Cousson, Tony Lindgren, Russell King, Arnd Bergmann,
Michael Welling, Mika Penttilä, Javier Martinez Canillas,
Igor Grinberg, Andrew F. Davis, Mark Brown,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
letux-kernel-S0jZdbWzriLCfDggNXIi3w,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
kernel-Jl6IXVxNIMRxAtABVqVhTwC/G2K4zDHf
In-Reply-To: <20161119183849.GD20446@dtor-ws>
On 19 November 2016 18:38:49 GMT+00:00, Dmitry Torokhov <dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>On Sat, Nov 12, 2016 at 02:19:30PM +0000, Jonathan Cameron wrote:
>> On 12/11/16 14:04, Jonathan Cameron wrote:
>> > On 11/11/16 19:02, H. Nikolaus Schaller wrote:
>> >> The tsc2007 chip not only has a resistive touch screen controller
>but
>> >> also an external AUX adc imput which can be used for an ambient
>> >> light sensor, battery voltage monitoring or any general purpose.
>> >>
>> >> Additionally it can measure the chip temperature.
>> >>
>> >> This extension provides an iio interface for these adc channels.
>> >>
>> >> Since it is not wasting much resources and is very
>straightforward,
>> >> we simply provide all other adc channels as optional iio
>interfaces
>> >> as weel. This can be used for debugging or special applications.
>> >>
>> >> This patch also splits the tsc2007 driver in several source files:
>> >> tsc2007.h -- constants, structs and stubs
>> >> tsc2007_core.c -- functional parts of the original driver
>> >> tsc2007_iio.c -- the optional iio stuff
>> >>
>> >> Makefile magic allows to conditionally link the iio
>> >> stuff if CONFIG_IIO=y in a way that it works with
>> >> CONFIG_TOUCHSCREEN_TSC2007=m.
>> >>
>> >
>> > I ran a quick build test and it blows up in a number of ways
>related to
>> > the #ifdef CONFIG_IIO.
>> >
>> > I'm not entirely sure why but
>> > #if IS_ENABLED(CONFIG_IIO) works fine.
>> Ah, I'm being sleepy today. It's because I'm building IIO as a
>module
>> and the symbol defined would therefore be CONFIG_IIO_MODULE.
>>
>> The IS_ENABLED macro takes care of both cases.
>
>No it doesn't. Have you tried building the driver into the kernel with
>IIO as a module?
Fair point. Is there a clean way of handling this?
>
>> >
>> > Otherwise looks good to me
>> >> Signed-off-by: H. Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
>> > Reviewed-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>> >> ---
>> >> drivers/input/touchscreen/Makefile | 2 +
>> >> drivers/input/touchscreen/tsc2007.h | 118
>++++++++++++++++
>> >> .../touchscreen/{tsc2007.c => tsc2007_core.c} | 119
>++++++----------
>> >> drivers/input/touchscreen/tsc2007_iio.c | 152
>+++++++++++++++++++++
>> >> 4 files changed, 310 insertions(+), 81 deletions(-)
>> >> create mode 100644 drivers/input/touchscreen/tsc2007.h
>> >> rename drivers/input/touchscreen/{tsc2007.c => tsc2007_core.c}
>(85%)
>> >> create mode 100644 drivers/input/touchscreen/tsc2007_iio.c
>> >>
>> >> diff --git a/drivers/input/touchscreen/Makefile
>b/drivers/input/touchscreen/Makefile
>> >> index 81b8645..d932e2d 100644
>> >> --- a/drivers/input/touchscreen/Makefile
>> >> +++ b/drivers/input/touchscreen/Makefile
>> >> @@ -80,6 +80,8 @@ obj-$(CONFIG_TOUCHSCREEN_TSC_SERIO) += tsc40.o
>> >> obj-$(CONFIG_TOUCHSCREEN_TSC200X_CORE) += tsc200x-core.o
>> >> obj-$(CONFIG_TOUCHSCREEN_TSC2004) += tsc2004.o
>> >> obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o
>> >> +tsc2007-y := tsc2007_core.o
>> >> +tsc2007-$(CONFIG_IIO) += tsc2007_iio.o
>> >> obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o
>> >> obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
>> >> obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o
>> >> diff --git a/drivers/input/touchscreen/tsc2007.h
>b/drivers/input/touchscreen/tsc2007.h
>> >> new file mode 100644
>> >> index 0000000..5049bf8
>> >> --- /dev/null
>> >> +++ b/drivers/input/touchscreen/tsc2007.h
>> >> @@ -0,0 +1,118 @@
>> >> +/*
>> >> + * drivers/input/touchscreen/tsc2007.h
>> >> + *
>> >> + * Copyright (c) 2008 MtekVision Co., Ltd.
>> >> + * Kwangwoo Lee <kwlee-ec7hoAtq5SbSUeElwK9/Pw@public.gmane.org>
>> >> + *
>> >> + * Using code from:
>> >> + * - ads7846.c
>> >> + * Copyright (c) 2005 David Brownell
>> >> + * Copyright (c) 2006 Nokia Corporation
>> >> + * - corgi_ts.c
>> >> + * Copyright (C) 2004-2005 Richard Purdie
>> >> + * - omap_ts.[hc], ads7846.h, ts_osk.c
>> >> + * Copyright (C) 2002 MontaVista Software
>> >> + * Copyright (C) 2004 Texas Instruments
>> >> + * Copyright (C) 2005 Dirk Behme
>> >> + *
>> >> + * This program is free software; you can redistribute it and/or
>modify
>> >> + * it under the terms of the GNU General Public License version
>2 as
>> >> + * published by the Free Software Foundation.
>> >> + */
>> >> +
>> >> +#include <linux/input/touchscreen.h>
>> >> +
>> >> +#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
>> >> +#define TSC2007_MEASURE_AUX (0x2 << 4)
>> >> +#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
>> >> +#define TSC2007_ACTIVATE_XN (0x8 << 4)
>> >> +#define TSC2007_ACTIVATE_YN (0x9 << 4)
>> >> +#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
>> >> +#define TSC2007_SETUP (0xb << 4)
>> >> +#define TSC2007_MEASURE_X (0xc << 4)
>> >> +#define TSC2007_MEASURE_Y (0xd << 4)
>> >> +#define TSC2007_MEASURE_Z1 (0xe << 4)
>> >> +#define TSC2007_MEASURE_Z2 (0xf << 4)
>> >> +
>> >> +#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
>> >> +#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
>> >> +#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
>> >> +#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
>> >> +
>> >> +#define TSC2007_12BIT (0x0 << 1)
>> >> +#define TSC2007_8BIT (0x1 << 1)
>> >> +
>> >> +#define MAX_12BIT ((1 << 12) - 1)
>> >> +
>> >> +#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
>> >> +
>> >> +#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
>> >> +#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
>> >> +#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
>> >> +#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
>> >> +#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
>> >> +
>> >> +struct ts_event {
>> >> + u16 x;
>> >> + u16 y;
>> >> + u16 z1, z2;
>> >> +};
>> >> +
>> >> +struct tsc2007 {
>> >> + struct input_dev *input;
>> >> + char phys[32];
>> >> +
>> >> + struct i2c_client *client;
>> >> +
>> >> + u16 model;
>> >> + u16 x_plate_ohms;
>> >> +
>> >> + struct touchscreen_properties prop;
>> >> +
>> >> + bool report_resistance;
>> >> + u16 min_x;
>> >> + u16 min_y;
>> >> + u16 max_x;
>> >> + u16 max_y;
>> >> + u16 max_rt;
>> >> + unsigned long poll_period; /* in jiffies */
>> >> + int fuzzx;
>> >> + int fuzzy;
>> >> + int fuzzz;
>> >> +
>> >> + unsigned int gpio;
>> >> + int irq;
>> >> +
>> >> + wait_queue_head_t wait;
>> >> + bool stopped;
>> >> + bool pendown;
>> >> +
>> >> + int (*get_pendown_state)(struct device *);
>> >> + void (*clear_penirq)(void);
>> >> +
>> >> + struct mutex mlock;
>> >> + struct iio_dev *iio_dev; /* optional */
>> >> +};
>> >> +
>> >> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
>> >> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>> >> + struct ts_event *tc);
>> >> +bool tsc2007_is_pen_down(struct tsc2007 *ts);
>> >> +
>> >> +#ifdef CONFIG_IIO
>> >> +
>> >> +/* defined in tsc2007_iio.c */
>> >> +int tsc2007_iio_configure(struct tsc2007 *ts);
>> >> +void tsc2007_iio_unconfigure(struct tsc2007 *ts);
>> >> +
>> >> +#else /* CONFIG_IIO */
>> >> +
>> >> +static inline int tsc2007_iio_configure(struct tsc2007 *ts)
>> >> +{
>> >> + return 0;
>> >> +}
>> >> +static inline void tsc2007_iio_unconfigure(struct tsc2007 *ts)
>> >> +{
>> >> +}
>> >> +
>> >> +#endif /* CONFIG_IIO */
>> >> diff --git a/drivers/input/touchscreen/tsc2007.c
>b/drivers/input/touchscreen/tsc2007_core.c
>> >> similarity index 85%
>> >> rename from drivers/input/touchscreen/tsc2007.c
>> >> rename to drivers/input/touchscreen/tsc2007_core.c
>> >> index 5e3c4bf..72775ae 100644
>> >> --- a/drivers/input/touchscreen/tsc2007.c
>> >> +++ b/drivers/input/touchscreen/tsc2007_core.c
>> >> @@ -27,80 +27,10 @@
>> >> #include <linux/i2c.h>
>> >> #include <linux/i2c/tsc2007.h>
>> >> #include <linux/of_device.h>
>> >> -#include <linux/of.h>
>> >> #include <linux/of_gpio.h>
>> >> -#include <linux/input/touchscreen.h>
>> >> -
>> >> -#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
>> >> -#define TSC2007_MEASURE_AUX (0x2 << 4)
>> >> -#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
>> >> -#define TSC2007_ACTIVATE_XN (0x8 << 4)
>> >> -#define TSC2007_ACTIVATE_YN (0x9 << 4)
>> >> -#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
>> >> -#define TSC2007_SETUP (0xb << 4)
>> >> -#define TSC2007_MEASURE_X (0xc << 4)
>> >> -#define TSC2007_MEASURE_Y (0xd << 4)
>> >> -#define TSC2007_MEASURE_Z1 (0xe << 4)
>> >> -#define TSC2007_MEASURE_Z2 (0xf << 4)
>> >> -
>> >> -#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
>> >> -#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
>> >> -#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
>> >> -#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
>> >> -
>> >> -#define TSC2007_12BIT (0x0 << 1)
>> >> -#define TSC2007_8BIT (0x1 << 1)
>> >> -
>> >> -#define MAX_12BIT ((1 << 12) - 1)
>> >> -
>> >> -#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
>> >> -
>> >> -#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
>> >> -#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
>> >> -#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
>> >> -#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
>> >> -#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
>> >> -
>> >> -struct ts_event {
>> >> - u16 x;
>> >> - u16 y;
>> >> - u16 z1, z2;
>> >> -};
>> >> -
>> >> -struct tsc2007 {
>> >> - struct input_dev *input;
>> >> - char phys[32];
>> >> -
>> >> - struct i2c_client *client;
>> >> -
>> >> - u16 model;
>> >> - u16 x_plate_ohms;
>> >> -
>> >> - struct touchscreen_properties prop;
>> >> -
>> >> - bool report_resistance;
>> >> - u16 min_x;
>> >> - u16 min_y;
>> >> - u16 max_x;
>> >> - u16 max_y;
>> >> - u16 max_rt;
>> >> - unsigned long poll_period; /* in jiffies */
>> >> - int fuzzx;
>> >> - int fuzzy;
>> >> - int fuzzz;
>> >> +#include "tsc2007.h"
>> >>
>> >> - unsigned gpio;
>> >> - int irq;
>> >> -
>> >> - wait_queue_head_t wait;
>> >> - bool stopped;
>> >> - bool pendown;
>> >> -
>> >> - int (*get_pendown_state)(struct device *);
>> >> - void (*clear_penirq)(void);
>> >> -};
>> >> -
>> >> -static inline int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
>> >> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
>> >> {
>> >> s32 data;
>> >> u16 val;
>> >> @@ -121,6 +51,7 @@ static inline int tsc2007_xfer(struct tsc2007
>*tsc, u8 cmd)
>> >>
>> >> return val;
>> >> }
>> >> +EXPORT_SYMBOL(tsc2007_xfer);
>> >>
>> >> static void tsc2007_read_values(struct tsc2007 *tsc, struct
>ts_event *tc)
>> >> {
>> >> @@ -138,7 +69,7 @@ static void tsc2007_read_values(struct tsc2007
>*tsc, struct ts_event *tc)
>> >> tsc2007_xfer(tsc, PWRDOWN);
>> >> }
>> >>
>> >> -static u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>> >> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>> >> struct ts_event *tc)
>> >> {
>> >> u32 rt = 0;
>> >> @@ -158,8 +89,9 @@ static u32 tsc2007_calculate_resistance(struct
>tsc2007 *tsc,
>> >>
>> >> return rt;
>> >> }
>> >> +EXPORT_SYMBOL(tsc2007_calculate_resistance);
>> >>
>> >> -static bool tsc2007_is_pen_down(struct tsc2007 *ts)
>> >> +bool tsc2007_is_pen_down(struct tsc2007 *ts)
>> >> {
>> >> /*
>> >> * NOTE: We can't rely on the pressure to determine the pen down
>> >> @@ -180,6 +112,7 @@ static bool tsc2007_is_pen_down(struct tsc2007
>*ts)
>> >>
>> >> return ts->get_pendown_state(&ts->client->dev);
>> >> }
>> >> +EXPORT_SYMBOL(tsc2007_is_pen_down);
>> >>
>> >> static irqreturn_t tsc2007_soft_irq(int irq, void *handle)
>> >> {
>> >> @@ -192,7 +125,10 @@ static irqreturn_t tsc2007_soft_irq(int irq,
>void *handle)
>> >> while (!ts->stopped && tsc2007_is_pen_down(ts)) {
>> >>
>> >> /* pen is down, continue with the measurement */
>> >> +
>> >> + mutex_lock(&ts->mlock);
>> >> tsc2007_read_values(ts, &tc);
>> >> + mutex_unlock(&ts->mlock);
>> >>
>> >> rt = tsc2007_calculate_resistance(ts, &tc);
>> >>
>> >> @@ -450,7 +386,8 @@ static void tsc2007_call_exit_platform_hw(void
>*data)
>> >> static int tsc2007_probe(struct i2c_client *client,
>> >> const struct i2c_device_id *id)
>> >> {
>> >> - const struct tsc2007_platform_data *pdata =
>dev_get_platdata(&client->dev);
>> >> + const struct tsc2007_platform_data *pdata =
>> >> + dev_get_platdata(&client->dev);
>> >> struct tsc2007 *ts;
>> >> struct input_dev *input_dev;
>> >> int err;
>> >> @@ -472,7 +409,13 @@ static int tsc2007_probe(struct i2c_client
>*client,
>> >> ts->client = client;
>> >> ts->irq = client->irq;
>> >> ts->input = input_dev;
>> >> +
>> >> + err = tsc2007_iio_configure(ts);
>> >> + if (err < 0)
>> >> + return err;
>> >> +
>> >> init_waitqueue_head(&ts->wait);
>> >> + mutex_init(&ts->mlock);
>> >>
>> >> snprintf(ts->phys, sizeof(ts->phys),
>> >> "%s/input0", dev_name(&client->dev));
>> >> @@ -494,7 +437,7 @@ static int tsc2007_probe(struct i2c_client
>*client,
>> >> if (pdata) {
>> >> err = tsc2007_probe_pdev(client, ts, pdata, id);
>> >> if (err)
>> >> - return err;
>> >> + goto probe_err;
>> >> input_set_abs_params(input_dev, ABS_X, 0, ts->max_x-ts->min_x,
>> >> ts->fuzzx, 0);
>> >> input_set_abs_params(input_dev, ABS_Y, 0, ts->max_y-ts->min_y,
>> >> @@ -504,7 +447,7 @@ static int tsc2007_probe(struct i2c_client
>*client,
>> >> } else {
>> >> err = tsc2007_probe_dt(client, ts);
>> >> if (err)
>> >> - return err;
>> >> + goto probe_err;
>> >> }
>> >>
>> >> if (pdata) {
>> >> @@ -516,7 +459,7 @@ static int tsc2007_probe(struct i2c_client
>*client,
>> >> dev_err(&client->dev,
>> >> "Failed to register exit_platform_hw action, %d\n",
>> >> err);
>> >> - return err;
>> >> + goto probe_err;
>> >> }
>> >> }
>> >>
>> >> @@ -533,7 +476,7 @@ static int tsc2007_probe(struct i2c_client
>*client,
>> >> if (err) {
>> >> dev_err(&client->dev, "Failed to request irq %d: %d\n",
>> >> ts->irq, err);
>> >> - return err;
>> >> + goto probe_err;
>> >> }
>> >>
>> >> tsc2007_stop(ts);
>> >> @@ -543,17 +486,30 @@ static int tsc2007_probe(struct i2c_client
>*client,
>> >> if (err < 0) {
>> >> dev_err(&client->dev,
>> >> "Failed to setup chip: %d\n", err);
>> >> - return err; /* usually, chip does not respond */
>> >> + goto probe_err; /* chip does not respond */
>> >> }
>> >>
>> >> err = input_register_device(input_dev);
>> >> if (err) {
>> >> dev_err(&client->dev,
>> >> "Failed to register input device: %d\n", err);
>> >> - return err;
>> >> + goto probe_err;
>> >> }
>> >>
>> >> return 0;
>> >> +
>> >> +probe_err:
>> >> + tsc2007_iio_unconfigure(ts);
>> >> + return err;
>> >> +}
>> >> +
>> >> +static int tsc2007_remove(struct i2c_client *client)
>> >> +{
>> >> + struct tsc2007 *ts = i2c_get_clientdata(client);
>> >> +
>> >> + tsc2007_iio_unconfigure(ts);
>> >> + input_unregister_device(ts->input);
>> >> + return 0;
>> >> }
>> >>
>> >> static const struct i2c_device_id tsc2007_idtable[] = {
>> >> @@ -578,6 +534,7 @@ static struct i2c_driver tsc2007_driver = {
>> >> },
>> >> .id_table = tsc2007_idtable,
>> >> .probe = tsc2007_probe,
>> >> + .remove = tsc2007_remove,
>> >> };
>> >>
>> >> module_i2c_driver(tsc2007_driver);
>> >> diff --git a/drivers/input/touchscreen/tsc2007_iio.c
>b/drivers/input/touchscreen/tsc2007_iio.c
>> >> new file mode 100644
>> >> index 0000000..e492bba
>> >> --- /dev/null
>> >> +++ b/drivers/input/touchscreen/tsc2007_iio.c
>> >> @@ -0,0 +1,152 @@
>> >> +/*
>> >> + * drivers/input/touchscreen/tsc2007_iio.c
>> >> + *
>> >> + * Copyright (c) 2016 Golden Delicious Comp. GmbH&Co. KG
>> >> + * Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
>> >> + *
>> >> + * This program is free software; you can redistribute it and/or
>modify
>> >> + * it under the terms of the GNU General Public License version
>2 as
>> >> + * published by the Free Software Foundation.
>> >> + */
>> >> +
>> >> +#include <linux/i2c.h>
>> >> +#include <linux/iio/iio.h>
>> >> +#include "tsc2007.h"
>> >> +
>> >> +struct tsc2007_iio {
>> >> + struct tsc2007 *ts;
>> >> +};
>> >> +
>> >> +#define TSC2007_CHAN_IIO(_chan, _name, _type, _chan_info) \
>> >> +{ \
>> >> + .datasheet_name = _name, \
>> >> + .type = _type, \
>> >> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
>> >> + BIT(_chan_info), \
>> >> + .indexed = 1, \
>> >> + .channel = _chan, \
>> >> +}
>> >> +
>> >> +static const struct iio_chan_spec tsc2007_iio_channel[] = {
>> >> + TSC2007_CHAN_IIO(0, "x", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> >> + TSC2007_CHAN_IIO(1, "y", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> >> + TSC2007_CHAN_IIO(2, "z1", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> >> + TSC2007_CHAN_IIO(3, "z2", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> >> + TSC2007_CHAN_IIO(4, "adc", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> >> + TSC2007_CHAN_IIO(5, "rt", IIO_VOLTAGE, IIO_CHAN_INFO_RAW), /*
>Ohms? */
>> >> + TSC2007_CHAN_IIO(6, "pen", IIO_PRESSURE, IIO_CHAN_INFO_RAW),
>> >> + TSC2007_CHAN_IIO(7, "temp0", IIO_TEMP, IIO_CHAN_INFO_RAW),
>> >> + TSC2007_CHAN_IIO(8, "temp1", IIO_TEMP, IIO_CHAN_INFO_RAW),
>> >> +};
>> >> +
>> >> +static int tsc2007_read_raw(struct iio_dev *indio_dev,
>> >> + struct iio_chan_spec const *chan, int *val, int *val2, long
>mask)
>> >> +{
>> >> + struct tsc2007_iio *iio = iio_priv(indio_dev);
>> >> + struct tsc2007 *tsc = iio->ts;
>> >> + int adc_chan = chan->channel;
>> >> + int ret = 0;
>> >> +
>> >> + if (adc_chan >= ARRAY_SIZE(tsc2007_iio_channel))
>> >> + return -EINVAL;
>> >> +
>> >> + if (mask != IIO_CHAN_INFO_RAW)
>> >> + return -EINVAL;
>> >> +
>> >> + mutex_lock(&tsc->mlock);
>> >> +
>> >> + switch (chan->channel) {
>> >> + case 0:
>> >> + *val = tsc2007_xfer(tsc, READ_X);
>> >> + break;
>> >> + case 1:
>> >> + *val = tsc2007_xfer(tsc, READ_Y);
>> >> + break;
>> >> + case 2:
>> >> + *val = tsc2007_xfer(tsc, READ_Z1);
>> >> + break;
>> >> + case 3:
>> >> + *val = tsc2007_xfer(tsc, READ_Z2);
>> >> + break;
>> >> + case 4:
>> >> + *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX));
>> >> + break;
>> >> + case 5: {
>> >> + struct ts_event tc;
>> >> +
>> >> + tc.x = tsc2007_xfer(tsc, READ_X);
>> >> + tc.z1 = tsc2007_xfer(tsc, READ_Z1);
>> >> + tc.z2 = tsc2007_xfer(tsc, READ_Z2);
>> >> + *val = tsc2007_calculate_resistance(tsc, &tc);
>> >> + break;
>> >> + }
>> >> + case 6:
>> >> + *val = tsc2007_is_pen_down(tsc);
>> >> + break;
>> >> + case 7:
>> >> + *val = tsc2007_xfer(tsc,
>> >> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP0));
>> >> + break;
>> >> + case 8:
>> >> + *val = tsc2007_xfer(tsc,
>> >> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP1));
>> >> + break;
>> >> + }
>> >> +
>> >> + /* Prepare for next touch reading - power down ADC, enable
>PENIRQ */
>> >> + tsc2007_xfer(tsc, PWRDOWN);
>> >> +
>> >> + mutex_unlock(&tsc->mlock);
>> >> +
>> >> + ret = IIO_VAL_INT;
>> >> +
>> >> + return ret;
>> >> +}
>> >> +
>> >> +static const struct iio_info tsc2007_iio_info = {
>> >> + .read_raw = tsc2007_read_raw,
>> >> + .driver_module = THIS_MODULE,
>> >> +};
>> >> +
>> >> +int tsc2007_iio_configure(struct tsc2007 *ts)
>> >> +{
>> >> + int err;
>> >> + struct iio_dev *indio_dev;
>> >> + struct tsc2007_iio *iio;
>> >> +
>> >> + indio_dev = devm_iio_device_alloc(&ts->client->dev,
>> >> + sizeof(struct tsc2007_iio));
>> >> + if (!indio_dev) {
>> >> + dev_err(&ts->client->dev, "iio_device_alloc failed\n");
>> >> + return -ENOMEM;
>> >> + }
>> >> +
>> >> + iio = iio_priv(indio_dev);
>> >> + iio->ts = ts;
>> >> + ts->iio_dev = (void *) indio_dev;
>> >> +
>> >> + indio_dev->name = "tsc2007";
>> >> + indio_dev->dev.parent = &ts->client->dev;
>> >> + indio_dev->info = &tsc2007_iio_info;
>> >> + indio_dev->modes = INDIO_DIRECT_MODE;
>> >> + indio_dev->channels = tsc2007_iio_channel;
>> >> + indio_dev->num_channels = ARRAY_SIZE(tsc2007_iio_channel);
>> >> +
>> >> + err = iio_device_register(indio_dev);
>> >> + if (err < 0) {
>> >> + dev_err(&ts->client->dev, "iio_device_register() failed: %d\n",
>> >> + err);
>> >> + return err;
>> >> + }
>> >> +
>> >> + return 0;
>> >> +}
>> >> +EXPORT_SYMBOL(tsc2007_iio_configure);
>> >> +
>> >> +void tsc2007_iio_unconfigure(struct tsc2007 *ts)
>> >> +{
>> >> + struct iio_dev *indio_dev = ts->iio_dev;
>> >> +
>> >> + iio_device_unregister(indio_dev);
>> >> +}
>> >> +EXPORT_SYMBOL(tsc2007_iio_unconfigure);
>> >>
>> >
>> > --
>> > To unsubscribe from this list: send the line "unsubscribe
>linux-iio" in
>> > the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> > More majordomo info at http://vger.kernel.org/majordomo-info.html
>> >
>>
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [RFC PATCH v2 5/7] iio: multiplexer: new iio category and iio-mux driver
From: Peter Rosin @ 2016-11-19 22:08 UTC (permalink / raw)
To: Jonathan Cameron, linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Wolfram Sang, Rob Herring, Mark Rutland, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, Arnd Bergmann,
Greg Kroah-Hartman, linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <e462780e-305b-2cb9-1acd-c66dee312fac-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On 2016-11-19 16:49, Jonathan Cameron wrote:
> On 17/11/16 21:48, Peter Rosin wrote:
>> When a multiplexer changes how an iio device behaves (for example
>> by feeding different signals to an ADC), this driver can be used
>> create one virtual iio channel for each multiplexer state.
>>
>> Depends on the generic multiplexer driver.
> I'm not really following what all the ext info stuff in here is about.
> Could you add a little more description of that?
Certainly. I have two needs for this series. The first one is simple
when it comes to the iio part and complex because the mux is shared
between three 8-way muxes on three of the inputs to an ADS-1015 ADC.
The forth ADC line to the ADS-1015 is not muxed. Those three muxes
are of course GPIO-controlled and share GPIO pins. And the GPIO
pins also control an i2c bus that is muxed 8-ways as well. There are
eight (possible) batteries, and we monitor voltage/current/temp with
the 3 muxed ADC lines, and 8 chargers sit on i2c behind the i2c mux.
I guess it felt natural for the HW designer to select battery with
the GPIO lines, but that do not fit too well with the code as it
is without this series...
For this first need, the iio mux does not need ext_info.
The second need is simple in the mux part but worse in the iio
department. It's another 8-way mux that simply muxes an ADC line,
so that is simple. However, the ADC line is the envelope detector
that just got added to linux-next, and it has two ext_info
attributes that needs to be set differently for different mux
states. Two of the states need "invert" to be false, the rest need
"invert" to be true. And it is also preferable to have different
values for "compare_interval" for different mux states since the
signals on the diffrent mux states have the different frequency
characteristics.
True, I could have the ext-info attributes go straight through
the mux, and just start by writing values to "invert"
and "compare_interval", and only then read a sample. But then I
would need to lock out other users during the duration of this
transaction. I believe that the best place to put that lock is
in the iio mux (when it locks its control-mux) and not leave it
to userspace to solve this in some brittle cooperative manner.
> Perhaps an example of how it is used and what the resulting interface
> looks like?
The resulting interface is just a copy of the (ext_info) interface
exposed by the parent channel (with a cache that is rewritten to
the parent on every iio mux state change). I have plans to add code
to not rewrite ext_info attributes that have never been changed in
any mux state.
Below I have an example file listing.
device0 is a dpot (mcp4561).
device1 is a dac (dpot-dac, wrapping the above dpot).
device2 is an adc (envelope-detector, wrapping the above dac)
device3 is a mux (iio-mux, wrapping the above adc)
The 8-way iio-mux have no signals attached on mux states 0 and 1, which
is why the first channel for device 3 is in_altvoltage2.
Ultimately, I would like some knob to hide devices 0, 1 and 2 from
userspace. They need/should only be visible to in-kernel users. Or
is there such a knob already?
Cheers,
Peter
$ ls /sys/bus/iio/devices/iio\:device*
/sys/bus/iio/devices/iio:device0:
dev out_resistance_raw_available
name out_resistance_scale
of_node power
out_resistance0_raw subsystem
out_resistance1_raw uevent
/sys/bus/iio/devices/iio:device1:
dev out_voltage0_scale
name power
of_node subsystem
out_voltage0_raw uevent
out_voltage0_raw_available
/sys/bus/iio/devices/iio:device2:
dev name
in_altvoltage0_compare_interval of_node
in_altvoltage0_invert power
in_altvoltage0_raw subsystem
in_altvoltage0_scale uevent
/sys/bus/iio/devices/iio:device3:
dev in_altvoltage5_raw
in_altvoltage2_compare_interval in_altvoltage5_scale
in_altvoltage2_invert in_altvoltage6_compare_interval
in_altvoltage2_raw in_altvoltage6_invert
in_altvoltage2_scale in_altvoltage6_raw
in_altvoltage3_compare_interval in_altvoltage6_scale
in_altvoltage3_invert in_altvoltage7_compare_interval
in_altvoltage3_raw in_altvoltage7_invert
in_altvoltage3_scale in_altvoltage7_raw
in_altvoltage4_compare_interval in_altvoltage7_scale
in_altvoltage4_invert name
in_altvoltage4_raw of_node
in_altvoltage4_scale power
in_altvoltage5_compare_interval subsystem
in_altvoltage5_invert uevent
^ permalink raw reply
* [PATCH v6 1/5] drm: sun8i: Add a basic DRM driver for Allwinner DE2
From: Jean-Francois Moine @ 2016-11-20 9:53 UTC (permalink / raw)
To: Dave Airlie, Maxime Ripard, Rob Herring
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <cover.1479641523.git.moinejf-GANU6spQydw@public.gmane.org>
Allwinner's recent SoCs, as A64, A83T and H3, contain a new display
engine, DE2.
This patch adds a DRM video driver for this device.
Signed-off-by: Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
---
.../bindings/display/sunxi/sun8i-de2.txt | 83 +++
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/sun8i/Kconfig | 19 +
drivers/gpu/drm/sun8i/Makefile | 7 +
drivers/gpu/drm/sun8i/de2_crtc.c | 440 +++++++++++++
drivers/gpu/drm/sun8i/de2_crtc.h | 50 ++
drivers/gpu/drm/sun8i/de2_drm.h | 48 ++
drivers/gpu/drm/sun8i/de2_drv.c | 379 +++++++++++
drivers/gpu/drm/sun8i/de2_plane.c | 712 +++++++++++++++++++++
10 files changed, 1741 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
create mode 100644 drivers/gpu/drm/sun8i/Kconfig
create mode 100644 drivers/gpu/drm/sun8i/Makefile
create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.c
create mode 100644 drivers/gpu/drm/sun8i/de2_crtc.h
create mode 100644 drivers/gpu/drm/sun8i/de2_drm.h
create mode 100644 drivers/gpu/drm/sun8i/de2_drv.c
create mode 100644 drivers/gpu/drm/sun8i/de2_plane.c
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt b/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
new file mode 100644
index 0000000..b9edd4b
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/sun8i-de2.txt
@@ -0,0 +1,83 @@
+Allwinner sun8i Display Engine 2 subsystem
+==========================================
+
+The Allwinner DE2 subsystem contains a display controller (DE2),
+one or two LCD controllers (TCON) and their external interfaces.
+
+Display controller
+==================
+
+Required properties:
+
+- compatible: value should be one of the following
+ "allwinner,sun8i-a83t-display-engine"
+ "allwinner,sun8i-h3-display-engine"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "gate": DE bus gate
+ "clock": DE clock
+
+- resets: phandle to the reset of the device
+
+- ports: phandle's to the LCD ports
+
+LCD controller
+==============
+
+Required properties:
+
+- compatible: should be
+ "allwinner,sun8i-a83t-tcon"
+
+- clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+
+- clock-names: must contain
+ "gate": TCON bus gate
+ "clock": TCON pixel clock
+
+- resets: phandle to the reset of the device
+
+- port: port node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+
+ de: de-controller@01000000 {
+ compatible = "allwinner,sun8i-h3-display-engine";
+ ...
+ clocks = <&&ccu CLK_BUS_DE>, <&ccu CLK_DE>;
+ clock-names = "gate", "clock";
+ resets = <&ccu RST_BUS_DE>;
+ ports = <&lcd0_p>;
+ };
+
+ lcd0: lcd-controller@01c0c000 {
+ compatible = "allwinner,sun8i-a83t-tcon";
+ ...
+ clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
+ clock-names = "gate", "clock";
+ resets = <&ccu RST_BUS_TCON0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ lcd0_p: port {
+ lcd0_ep: endpoint {
+ remote-endpoint = <&hdmi_ep>;
+ };
+ };
+ };
+
+ hdmi: hdmi@01ee0000 {
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ hdmi_ep: endpoint {
+ remote-endpoint = <&lcd0_ep>;
+ };
+ };
+ };
+
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 95fc041..bb1bfbc 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -202,6 +202,8 @@ source "drivers/gpu/drm/shmobile/Kconfig"
source "drivers/gpu/drm/sun4i/Kconfig"
+source "drivers/gpu/drm/sun8i/Kconfig"
+
source "drivers/gpu/drm/omapdrm/Kconfig"
source "drivers/gpu/drm/tilcdc/Kconfig"
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 883f3e7..3e1eaa0 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/
obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
obj-y += omapdrm/
obj-$(CONFIG_DRM_SUN4I) += sun4i/
+obj-$(CONFIG_DRM_SUN8I) += sun8i/
obj-y += tilcdc/
obj-$(CONFIG_DRM_QXL) += qxl/
obj-$(CONFIG_DRM_BOCHS) += bochs/
diff --git a/drivers/gpu/drm/sun8i/Kconfig b/drivers/gpu/drm/sun8i/Kconfig
new file mode 100644
index 0000000..6940895
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/Kconfig
@@ -0,0 +1,19 @@
+#
+# Allwinner DE2 Video configuration
+#
+
+config DRM_SUN8I
+ bool
+
+config DRM_SUN8I_DE2
+ tristate "Support for Allwinner Video with DE2 interface"
+ depends on DRM && OF
+ depends on ARCH_SUNXI || COMPILE_TEST
+ select DRM_GEM_CMA_HELPER
+ select DRM_KMS_CMA_HELPER
+ select DRM_KMS_HELPER
+ select DRM_SUN8I
+ help
+ Choose this option if your Allwinner chipset has the DE2 interface
+ as the A64, A83T and H3. If M is selected the module will be called
+ sun8i-de2-drm.
diff --git a/drivers/gpu/drm/sun8i/Makefile b/drivers/gpu/drm/sun8i/Makefile
new file mode 100644
index 0000000..f107919
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for Allwinner's sun8i DRM device driver
+#
+
+sun8i-de2-drm-objs := de2_drv.o de2_crtc.o de2_plane.o
+
+obj-$(CONFIG_DRM_SUN8I_DE2) += sun8i-de2-drm.o
diff --git a/drivers/gpu/drm/sun8i/de2_crtc.c b/drivers/gpu/drm/sun8i/de2_crtc.c
new file mode 100644
index 0000000..65c9b93
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_crtc.c
@@ -0,0 +1,440 @@
+/*
+ * Allwinner DRM driver - DE2 CRTC
+ *
+ * Copyright (C) 2016 Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <linux/component.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_atomic_helper.h>
+#include <linux/io.h>
+#include <linux/of_irq.h>
+
+#include "de2_drm.h"
+#include "de2_crtc.h"
+
+/* I/O map */
+
+#define TCON_GCTL_REG 0x00
+#define TCON_GCTL_TCON_ENABLE BIT(31)
+#define TCON_GINT0_REG 0x04
+#define TCON_GINT0_TCON1_Vb_Int_En BIT(30)
+#define TCON_GINT0_TCON1_Vb_Int_Flag BIT(14)
+#define TCON0_CTL_REG 0x40
+#define TCON0_CTL_TCON_ENABLE BIT(31)
+#define TCON1_CTL_REG 0x90
+#define TCON1_CTL_TCON_ENABLE BIT(31)
+#define TCON1_CTL_INTERLACE_ENABLE BIT(20)
+#define TCON1_CTL_Start_Delay_SHIFT 4
+#define TCON1_CTL_Start_Delay_MASK GENMASK(8, 4)
+#define TCON1_BASIC0_REG 0x94 /* XI/YI */
+#define TCON1_BASIC1_REG 0x98 /* LS_XO/LS_YO */
+#define TCON1_BASIC2_REG 0x9c /* XO/YO */
+#define TCON1_BASIC3_REG 0xa0 /* HT/HBP */
+#define TCON1_BASIC4_REG 0xa4 /* VT/VBP */
+#define TCON1_BASIC5_REG 0xa8 /* HSPW/VSPW */
+#define TCON1_PS_SYNC_REG 0xb0
+#define TCON1_IO_POL_REG 0xf0
+#define TCON1_IO_POL_IO0_inv BIT(24)
+#define TCON1_IO_POL_IO1_inv BIT(25)
+#define TCON1_IO_POL_IO2_inv BIT(26)
+#define TCON1_IO_TRI_REG 0xf4
+#define TCON_CEU_CTL_REG 0x100
+#define TCON_CEU_CTL_ceu_en BIT(31)
+#define TCON1_FILL_CTL_REG 0x300
+#define TCON1_FILL_START0_REG 0x304
+#define TCON1_FILL_END0_REG 0x308
+#define TCON1_FILL_DATA0_REG 0x30c
+
+#define XY(x, y) (((x) << 16) | (y))
+
+#define andl_relaxed(addr, val) \
+ writel_relaxed(readl_relaxed(addr) & val, addr)
+#define orl_relaxed(addr, val) \
+ writel_relaxed(readl_relaxed(addr) | val, addr)
+
+/* vertical blank functions */
+
+static void de2_atomic_flush(struct drm_crtc *crtc,
+ struct drm_crtc_state *old_state)
+{
+ struct drm_pending_vblank_event *event = crtc->state->event;
+
+ if (event) {
+ crtc->state->event = NULL;
+ spin_lock_irq(&crtc->dev->event_lock);
+ if (drm_crtc_vblank_get(crtc) == 0)
+ drm_crtc_arm_vblank_event(crtc, event);
+ else
+ drm_crtc_send_vblank_event(crtc, event);
+ spin_unlock_irq(&crtc->dev->event_lock);
+ }
+}
+
+static irqreturn_t de2_lcd_irq(int irq, void *dev_id)
+{
+ struct lcd *lcd = (struct lcd *) dev_id;
+ u32 isr;
+
+ isr = readl_relaxed(lcd->mmio + TCON_GINT0_REG);
+
+ drm_crtc_handle_vblank(&lcd->crtc);
+
+ writel_relaxed(isr & ~TCON_GINT0_TCON1_Vb_Int_Flag,
+ lcd->mmio + TCON_GINT0_REG);
+
+ return IRQ_HANDLED;
+}
+
+int de2_enable_vblank(struct drm_device *drm, unsigned int crtc_ix)
+{
+ struct priv *priv = drm_to_priv(drm);
+ struct lcd *lcd = priv->lcds[crtc_ix];
+
+ orl_relaxed(lcd->mmio + TCON_GINT0_REG, TCON_GINT0_TCON1_Vb_Int_En);
+
+ return 0;
+}
+
+void de2_disable_vblank(struct drm_device *drm, unsigned int crtc_ix)
+{
+ struct priv *priv = drm_to_priv(drm);
+ struct lcd *lcd = priv->lcds[crtc_ix];
+
+ andl_relaxed(lcd->mmio + TCON_GINT0_REG, ~TCON_GINT0_TCON1_Vb_Int_En);
+}
+
+void de2_vblank_reset(struct lcd *lcd)
+{
+ drm_crtc_vblank_reset(&lcd->crtc);
+}
+
+/* frame functions */
+static void de2_tcon_init(struct lcd *lcd)
+{
+ andl_relaxed(lcd->mmio + TCON0_CTL_REG, ~TCON0_CTL_TCON_ENABLE);
+ andl_relaxed(lcd->mmio + TCON1_CTL_REG, ~TCON1_CTL_TCON_ENABLE);
+ andl_relaxed(lcd->mmio + TCON_GCTL_REG, ~TCON_GCTL_TCON_ENABLE);
+
+ /* disable/ack interrupts */
+ writel_relaxed(0, lcd->mmio + TCON_GINT0_REG);
+}
+
+static void de2_tcon_enable(struct lcd *lcd)
+{
+ struct drm_crtc *crtc = &lcd->crtc;
+ const struct drm_display_mode *mode = &crtc->mode;
+ int interlace = mode->flags & DRM_MODE_FLAG_INTERLACE ? 2 : 1;
+ int start_delay;
+ u32 data;
+
+ orl_relaxed(lcd->mmio + TCON_GCTL_REG, TCON_GCTL_TCON_ENABLE);
+
+ data = XY(mode->hdisplay - 1, mode->vdisplay / interlace - 1);
+ writel_relaxed(data, lcd->mmio + TCON1_BASIC0_REG);
+ writel_relaxed(data, lcd->mmio + TCON1_BASIC1_REG);
+ writel_relaxed(data, lcd->mmio + TCON1_BASIC2_REG);
+ writel_relaxed(XY(mode->htotal - 1,
+ mode->htotal - mode->hsync_start - 1),
+ lcd->mmio + TCON1_BASIC3_REG);
+ writel_relaxed(XY(mode->vtotal * (3 - interlace),
+ mode->vtotal - mode->vsync_start - 1),
+ lcd->mmio + TCON1_BASIC4_REG);
+ writel_relaxed(XY(mode->hsync_end - mode->hsync_start - 1,
+ mode->vsync_end - mode->vsync_start - 1),
+ lcd->mmio + TCON1_BASIC5_REG);
+
+ writel_relaxed(XY(1, 1), lcd->mmio + TCON1_PS_SYNC_REG);
+
+ data = TCON1_IO_POL_IO2_inv;
+ if (mode->flags & DRM_MODE_FLAG_PVSYNC)
+ data |= TCON1_IO_POL_IO0_inv;
+ if (mode->flags & DRM_MODE_FLAG_PHSYNC)
+ data |= TCON1_IO_POL_IO1_inv;
+ writel_relaxed(data, lcd->mmio + TCON1_IO_POL_REG);
+
+ andl_relaxed(lcd->mmio + TCON_CEU_CTL_REG, ~TCON_CEU_CTL_ceu_en);
+
+ if (interlace == 2)
+ orl_relaxed(lcd->mmio + TCON1_CTL_REG,
+ TCON1_CTL_INTERLACE_ENABLE);
+ else
+ andl_relaxed(lcd->mmio + TCON1_CTL_REG,
+ ~TCON1_CTL_INTERLACE_ENABLE);
+
+ writel_relaxed(0, lcd->mmio + TCON1_FILL_CTL_REG);
+ writel_relaxed(mode->vtotal + 1, lcd->mmio + TCON1_FILL_START0_REG);
+ writel_relaxed(mode->vtotal, lcd->mmio + TCON1_FILL_END0_REG);
+ writel_relaxed(0, lcd->mmio + TCON1_FILL_DATA0_REG);
+
+ start_delay = (mode->vtotal - mode->vdisplay) / interlace - 5;
+ if (start_delay > 31)
+ start_delay = 31;
+ data = readl_relaxed(lcd->mmio + TCON1_CTL_REG);
+ data &= ~TCON1_CTL_Start_Delay_MASK;
+ data |= start_delay << TCON1_CTL_Start_Delay_SHIFT;
+ writel_relaxed(data, lcd->mmio + TCON1_CTL_REG);
+
+ writel_relaxed(0x0fffffff, /* TRI disabled */
+ lcd->mmio + TCON1_IO_TRI_REG);
+
+ orl_relaxed(lcd->mmio + TCON1_CTL_REG, TCON1_CTL_TCON_ENABLE);
+}
+
+static void de2_tcon_disable(struct lcd *lcd)
+{
+ andl_relaxed(lcd->mmio + TCON1_CTL_REG, ~TCON1_CTL_TCON_ENABLE);
+ andl_relaxed(lcd->mmio + TCON_GCTL_REG, ~TCON_GCTL_TCON_ENABLE);
+}
+
+static void de2_crtc_enable(struct drm_crtc *crtc)
+{
+ struct lcd *lcd = crtc_to_lcd(crtc);
+ struct drm_display_mode *mode = &crtc->mode;
+ struct clk *parent_clk;
+ u32 parent_rate;
+ int ret;
+
+ /* determine and set the best rate for the parent clock (pll-video) */
+ if (297000 % mode->clock == 0)
+ parent_rate = 297000000;
+ else if ((270000 * 2) % mode->clock == 0)
+ parent_rate = 270000000;
+ else
+ return; /* "640x480" rejected */
+ parent_clk = clk_get_parent(lcd->clk);
+
+ ret = clk_set_rate(parent_clk, parent_rate);
+ if (ret) {
+ dev_err(lcd->dev, "set parent rate failed %d\n", ret);
+ return;
+ }
+
+ /* then, set the TCON clock rate */
+ ret = clk_set_rate(lcd->clk, mode->clock * 1000);
+ if (ret) {
+ dev_err(lcd->dev, "set rate %dKHz failed %d\n",
+ mode->clock, ret);
+ return;
+ }
+
+ /* start the TCON */
+ reset_control_deassert(lcd->reset);
+ clk_prepare_enable(lcd->bus);
+ clk_prepare_enable(lcd->clk);
+ lcd->clk_enabled = true;
+
+ de2_tcon_enable(lcd);
+
+ de2_de_enable(lcd);
+
+ /* turn on blanking interrupt */
+ drm_crtc_vblank_on(crtc);
+}
+
+static void de2_crtc_disable(struct drm_crtc *crtc,
+ struct drm_crtc_state *old_crtc_state)
+{
+ struct lcd *lcd = crtc_to_lcd(crtc);
+
+ if (!lcd->clk_enabled)
+ return; /* already disabled */
+ lcd->clk_enabled = false;
+
+ de2_de_disable(lcd);
+
+ drm_crtc_vblank_off(crtc);
+
+ de2_tcon_disable(lcd);
+
+ clk_disable_unprepare(lcd->clk);
+ clk_disable_unprepare(lcd->bus);
+ reset_control_assert(lcd->reset);
+}
+
+static const struct drm_crtc_funcs de2_crtc_funcs = {
+ .destroy = drm_crtc_cleanup,
+ .set_config = drm_atomic_helper_set_config,
+ .page_flip = drm_atomic_helper_page_flip,
+ .reset = drm_atomic_helper_crtc_reset,
+ .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
+};
+
+static const struct drm_crtc_helper_funcs de2_crtc_helper_funcs = {
+ .atomic_flush = de2_atomic_flush,
+ .enable = de2_crtc_enable,
+ .atomic_disable = de2_crtc_disable,
+};
+
+/* device init */
+static int de2_lcd_bind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct drm_device *drm = data;
+ struct priv *priv = drm_to_priv(drm);
+ struct lcd *lcd = dev_get_drvdata(dev);
+ struct drm_crtc *crtc = &lcd->crtc;
+ int ret, index;
+
+ lcd->priv = priv;
+
+ ret = de2_plane_init(drm, lcd);
+ if (ret < 0)
+ return ret;
+
+ drm_crtc_helper_add(crtc, &de2_crtc_helper_funcs);
+
+ ret = drm_crtc_init_with_planes(drm, crtc,
+ &lcd->planes[DE2_PRIMARY_PLANE],
+ &lcd->planes[DE2_CURSOR_PLANE],
+ &de2_crtc_funcs, NULL);
+ if (ret)
+ return ret;
+
+ /* set the lcd/crtc reference */
+ index = drm_crtc_index(crtc);
+ if (index >= ARRAY_SIZE(priv->lcds)) {
+ dev_err(drm->dev, "Bad crtc index");
+ return -ENOENT;
+ }
+ priv->lcds[index] = lcd;
+
+ return ret;
+}
+
+static void de2_lcd_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct lcd *lcd = platform_get_drvdata(pdev);
+
+ if (lcd->priv)
+ lcd->priv->lcds[drm_crtc_index(&lcd->crtc)] = NULL;
+}
+
+static const struct component_ops de2_lcd_ops = {
+ .bind = de2_lcd_bind,
+ .unbind = de2_lcd_unbind,
+};
+
+static int de2_lcd_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node, *tmp, *parent, *port;
+ struct lcd *lcd;
+ struct resource *res;
+ int id, irq, ret;
+
+ lcd = devm_kzalloc(dev, sizeof(*lcd), GFP_KERNEL);
+ if (!lcd)
+ return -ENOMEM;
+
+ /* get the LCD (mixer) number */
+ id = of_alias_get_id(np, "lcd");
+ if (id < 0 || id >= 2) {
+ dev_err(dev, "no or bad alias for lcd\n");
+ id = 0;
+ }
+ dev_set_drvdata(dev, lcd);
+ lcd->dev = dev;
+ lcd->mixer = id;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev, "failed to get memory resource\n");
+ return -EINVAL;
+ }
+
+ lcd->mmio = devm_ioremap_resource(dev, res);
+ if (IS_ERR(lcd->mmio)) {
+ dev_err(dev, "failed to map registers\n");
+ return PTR_ERR(lcd->mmio);
+ }
+
+ /* possible CRTCs */
+ parent = np;
+ tmp = of_get_child_by_name(np, "ports");
+ if (tmp)
+ parent = tmp;
+ port = of_get_child_by_name(parent, "port");
+ of_node_put(tmp);
+ if (!port) {
+ dev_err(dev, "no port node\n");
+ return -ENXIO;
+ }
+ lcd->crtc.port = port;
+
+ lcd->bus = devm_clk_get(dev, "bus");
+ if (IS_ERR(lcd->bus)) {
+ dev_err(dev, "get bus clock err %d\n", (int) PTR_ERR(lcd->bus));
+ ret = PTR_ERR(lcd->bus);
+ goto err;
+ }
+
+ lcd->clk = devm_clk_get(dev, "clock");
+ if (IS_ERR(lcd->clk)) {
+ ret = PTR_ERR(lcd->clk);
+ dev_err(dev, "get video clock err %d\n", ret);
+ goto err;
+ }
+
+ lcd->reset = devm_reset_control_get(dev, NULL);
+ if (IS_ERR(lcd->reset)) {
+ ret = PTR_ERR(lcd->reset);
+ dev_err(dev, "get reset err %d\n", ret);
+ goto err;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq <= 0) {
+ dev_err(dev, "unable to get irq\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ de2_tcon_init(lcd); /* stop TCON and avoid interrupts */
+
+ ret = devm_request_irq(dev, irq, de2_lcd_irq, 0,
+ dev_name(dev), lcd);
+ if (ret < 0) {
+ dev_err(dev, "unable to request irq %d\n", irq);
+ goto err;
+ }
+
+ return component_add(dev, &de2_lcd_ops);
+
+err:
+ of_node_put(lcd->crtc.port);
+ return ret;
+}
+
+static int de2_lcd_remove(struct platform_device *pdev)
+{
+ struct lcd *lcd = platform_get_drvdata(pdev);
+
+ component_del(&pdev->dev, &de2_lcd_ops);
+
+ of_node_put(lcd->crtc.port);
+
+ return 0;
+}
+
+static const struct of_device_id de2_lcd_ids[] = {
+ { .compatible = "allwinner,sun8i-a83t-tcon", },
+ { }
+};
+
+struct platform_driver de2_lcd_platform_driver = {
+ .probe = de2_lcd_probe,
+ .remove = de2_lcd_remove,
+ .driver = {
+ .name = "sun8i-de2-tcon",
+ .of_match_table = of_match_ptr(de2_lcd_ids),
+ },
+};
diff --git a/drivers/gpu/drm/sun8i/de2_crtc.h b/drivers/gpu/drm/sun8i/de2_crtc.h
new file mode 100644
index 0000000..f663ba4
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_crtc.h
@@ -0,0 +1,50 @@
+#ifndef __DE2_CRTC_H__
+#define __DE2_CRTC_H__
+/*
+ * Copyright (C) 2016 Jean-François Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <drm/drm_plane_helper.h>
+
+struct clk;
+struct reset_control;
+struct priv;
+
+/* planes */
+#define DE2_PRIMARY_PLANE 0
+#define DE2_CURSOR_PLANE 1
+#define DE2_N_PLANES 5 /* number of planes - see plane_tb[] in de2_plane.c */
+
+struct lcd {
+ void __iomem *mmio;
+
+ struct device *dev;
+ struct drm_crtc crtc;
+
+ struct priv *priv; /* DRM/DE private data */
+
+ u8 mixer; /* LCD (mixer) number */
+ u8 delayed; /* bitmap of planes with delayed update */
+
+ u8 clk_enabled; /* used for error in crtc_enable */
+
+ struct clk *clk;
+ struct clk *bus;
+ struct reset_control *reset;
+
+ struct drm_plane planes[DE2_N_PLANES];
+};
+
+#define crtc_to_lcd(x) container_of(x, struct lcd, crtc)
+
+/* in de2_plane.c */
+void de2_de_enable(struct lcd *lcd);
+void de2_de_disable(struct lcd *lcd);
+int de2_plane_init(struct drm_device *drm, struct lcd *lcd);
+
+#endif /* __DE2_CRTC_H__ */
diff --git a/drivers/gpu/drm/sun8i/de2_drm.h b/drivers/gpu/drm/sun8i/de2_drm.h
new file mode 100644
index 0000000..c42c30a
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_drm.h
@@ -0,0 +1,48 @@
+#ifndef __DE2_DRM_H__
+#define __DE2_DRM_H__
+/*
+ * Copyright (C) 2016 Jean-François Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <drm/drmP.h>
+#include <linux/clk.h>
+#include <linux/reset.h>
+
+struct drm_fbdev_cma;
+struct lcd;
+
+#define N_LCDS 2
+
+struct priv {
+ struct drm_device drm;
+ void __iomem *mmio;
+ struct clk *clk;
+ struct clk *gate;
+ struct reset_control *reset;
+
+ struct mutex mutex; /* protect DE I/O access */
+ u8 soc_type;
+#define SOC_A83T 0
+#define SOC_H3 1
+ u8 started; /* bitmap of started mixers */
+ u8 clean; /* bitmap of clean mixers */
+
+ struct drm_fbdev_cma *fbdev;
+
+ struct lcd *lcds[N_LCDS]; /* CRTCs */
+};
+
+#define drm_to_priv(x) container_of(x, struct priv, drm)
+
+/* in de2_crtc.c */
+int de2_enable_vblank(struct drm_device *drm, unsigned int crtc);
+void de2_disable_vblank(struct drm_device *drm, unsigned int crtc);
+void de2_vblank_reset(struct lcd *lcd);
+extern struct platform_driver de2_lcd_platform_driver;
+
+#endif /* __DE2_DRM_H__ */
diff --git a/drivers/gpu/drm/sun8i/de2_drv.c b/drivers/gpu/drm/sun8i/de2_drv.c
new file mode 100644
index 0000000..67368f5
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_drv.c
@@ -0,0 +1,379 @@
+/*
+ * Allwinner DRM driver - DE2 DRM driver
+ *
+ * Copyright (C) 2016 Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_graph.h>
+#include <linux/component.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_fb_cma_helper.h>
+#include <drm/drm_gem_cma_helper.h>
+
+#include "de2_drm.h"
+
+#define DRIVER_NAME "sun8i-de2"
+#define DRIVER_DESC "Allwinner DRM DE2"
+#define DRIVER_DATE "20161101"
+#define DRIVER_MAJOR 1
+#define DRIVER_MINOR 0
+
+static const struct of_device_id de2_drm_of_match[] = {
+ { .compatible = "allwinner,sun8i-a83t-display-engine",
+ .data = (void *) SOC_A83T },
+ { .compatible = "allwinner,sun8i-h3-display-engine",
+ .data = (void *) SOC_H3 },
+ { },
+};
+MODULE_DEVICE_TABLE(of, de2_drm_of_match);
+
+static void de2_fb_output_poll_changed(struct drm_device *drm)
+{
+ struct priv *priv = drm_to_priv(drm);
+
+ if (priv->fbdev)
+ drm_fbdev_cma_hotplug_event(priv->fbdev);
+}
+
+static const struct drm_mode_config_funcs de2_mode_config_funcs = {
+ .fb_create = drm_fb_cma_create,
+ .output_poll_changed = de2_fb_output_poll_changed,
+ .atomic_check = drm_atomic_helper_check,
+ .atomic_commit = drm_atomic_helper_commit,
+};
+
+/* -- DRM operations -- */
+
+static void de2_lastclose(struct drm_device *drm)
+{
+ struct priv *priv = drm_to_priv(drm);
+
+ if (priv->fbdev)
+ drm_fbdev_cma_restore_mode(priv->fbdev);
+}
+
+static const struct file_operations de2_fops = {
+ .owner = THIS_MODULE,
+ .open = drm_open,
+ .release = drm_release,
+ .unlocked_ioctl = drm_ioctl,
+ .poll = drm_poll,
+ .read = drm_read,
+ .llseek = no_llseek,
+ .mmap = drm_gem_cma_mmap,
+};
+
+static struct drm_driver de2_drm_driver = {
+ .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME |
+ DRIVER_ATOMIC,
+ .lastclose = de2_lastclose,
+ .get_vblank_counter = drm_vblank_no_hw_counter,
+ .enable_vblank = de2_enable_vblank,
+ .disable_vblank = de2_disable_vblank,
+ .gem_free_object = drm_gem_cma_free_object,
+ .gem_vm_ops = &drm_gem_cma_vm_ops,
+ .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
+ .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
+ .gem_prime_import = drm_gem_prime_import,
+ .gem_prime_export = drm_gem_prime_export,
+ .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
+ .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
+ .gem_prime_vmap = drm_gem_cma_prime_vmap,
+ .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
+ .gem_prime_mmap = drm_gem_cma_prime_mmap,
+ .dumb_create = drm_gem_cma_dumb_create,
+ .dumb_map_offset = drm_gem_cma_dumb_map_offset,
+ .dumb_destroy = drm_gem_dumb_destroy,
+ .fops = &de2_fops,
+ .name = DRIVER_NAME,
+ .desc = DRIVER_DESC,
+ .date = DRIVER_DATE,
+ .major = DRIVER_MAJOR,
+ .minor = DRIVER_MINOR,
+};
+
+/*
+ * Platform driver
+ */
+
+static int de2_drm_bind(struct device *dev)
+{
+ struct drm_device *drm;
+ struct priv *priv;
+ struct resource *res;
+ int ret;
+
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ drm = &priv->drm;
+ dev_set_drvdata(dev, drm);
+
+ /* get the resources */
+ priv->soc_type = (int) of_match_device(de2_drm_of_match, dev)->data;
+
+ res = platform_get_resource(to_platform_device(dev),
+ IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev, "failed to get memory resource\n");
+ ret = -EINVAL;
+ goto out1;
+ }
+
+ priv->mmio = devm_ioremap_resource(dev, res);
+ if (IS_ERR(priv->mmio)) {
+ ret = PTR_ERR(priv->mmio);
+ dev_err(dev, "failed to map registers %d\n", ret);
+ goto out1;
+ }
+
+ priv->gate = devm_clk_get(dev, "bus");
+ if (IS_ERR(priv->gate)) {
+ ret = PTR_ERR(priv->gate);
+ dev_err(dev, "bus gate err %d\n", ret);
+ goto out1;
+ }
+
+ priv->clk = devm_clk_get(dev, "clock");
+ if (IS_ERR(priv->clk)) {
+ ret = PTR_ERR(priv->clk);
+ dev_err(dev, "clock err %d\n", ret);
+ goto out1;
+ }
+
+ priv->reset = devm_reset_control_get(dev, NULL);
+ if (IS_ERR(priv->reset)) {
+ ret = PTR_ERR(priv->reset);
+ dev_err(dev, "reset err %d\n", ret);
+ goto out1;
+ }
+
+ mutex_init(&priv->mutex); /* protect DE I/O accesses */
+
+ ret = drm_dev_init(drm, &de2_drm_driver, dev);
+ if (ret != 0) {
+ dev_err(dev, "out of memory\n");
+ goto out1;
+ }
+
+ drm_mode_config_init(drm);
+ drm->mode_config.min_width = 32; /* needed for cursor */
+ drm->mode_config.min_height = 32;
+ drm->mode_config.max_width = 1920;
+ drm->mode_config.max_height = 1080;
+ drm->mode_config.funcs = &de2_mode_config_funcs;
+
+ drm->irq_enabled = true;
+
+ /* start the subdevices */
+ ret = component_bind_all(dev, drm);
+ if (ret < 0)
+ goto out2;
+
+ /* initialize and disable vertical blanking on all CRTCs */
+ ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
+ if (ret < 0)
+ dev_warn(dev, "failed to initialize vblank\n");
+
+ {
+ struct lcd *lcd;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(priv->lcds); i++) {
+ lcd = priv->lcds[i];
+ if (lcd)
+ de2_vblank_reset(lcd);
+ }
+ }
+
+ drm_mode_config_reset(drm);
+
+ priv->fbdev = drm_fbdev_cma_init(drm,
+ 32, /* bpp */
+ drm->mode_config.num_crtc,
+ drm->mode_config.num_connector);
+ if (IS_ERR(priv->fbdev)) {
+ ret = PTR_ERR(priv->fbdev);
+ priv->fbdev = NULL;
+ goto out3;
+ }
+
+ drm_kms_helper_poll_init(drm);
+
+ ret = drm_dev_register(drm, 0);
+ if (ret < 0)
+ goto out4;
+
+ return 0;
+
+out4:
+ drm_fbdev_cma_fini(priv->fbdev);
+out3:
+ component_unbind_all(dev, drm);
+out2:
+ drm_dev_unref(drm);
+out1:
+ kfree(priv);
+ return ret;
+}
+
+static void de2_drm_unbind(struct device *dev)
+{
+ struct drm_device *drm = dev_get_drvdata(dev);
+ struct priv *priv = drm_to_priv(drm);
+
+ drm_dev_unregister(drm);
+
+ drm_fbdev_cma_fini(priv->fbdev);
+ drm_kms_helper_poll_fini(drm);
+ drm_vblank_cleanup(drm);
+ drm_mode_config_cleanup(drm);
+
+ component_unbind_all(dev, drm);
+
+ kfree(priv);
+}
+
+static const struct component_master_ops de2_drm_comp_ops = {
+ .bind = de2_drm_bind,
+ .unbind = de2_drm_unbind,
+};
+
+static int compare_of(struct device *dev, void *data)
+{
+ return dev->of_node == data;
+}
+
+static int de2_drm_add_components(struct device *dev,
+ int (*compare_of)(struct device *, void *),
+ const struct component_master_ops *m_ops)
+{
+ struct device_node *ep, *port, *remote;
+ struct component_match *match = NULL;
+ int i;
+
+ if (!dev->of_node)
+ return -EINVAL;
+
+ /* bind the CRTCs */
+ for (i = 0; ; i++) {
+ port = of_parse_phandle(dev->of_node, "ports", i);
+ if (!port)
+ break;
+
+ if (!of_device_is_available(port->parent)) {
+ of_node_put(port);
+ continue;
+ }
+
+ component_match_add(dev, &match, compare_of, port->parent);
+ of_node_put(port);
+ }
+
+ if (i == 0) {
+ dev_err(dev, "missing 'ports' property\n");
+ return -ENODEV;
+ }
+ if (!match) {
+ dev_err(dev, "no available port\n");
+ return -ENODEV;
+ }
+
+ /* bind the encoders/connectors */
+ for (i = 0; ; i++) {
+ port = of_parse_phandle(dev->of_node, "ports", i);
+ if (!port)
+ break;
+
+ if (!of_device_is_available(port->parent)) {
+ of_node_put(port);
+ continue;
+ }
+
+ for_each_child_of_node(port, ep) {
+ remote = of_graph_get_remote_port_parent(ep);
+ if (!remote || !of_device_is_available(remote)) {
+ of_node_put(remote);
+ continue;
+ }
+ if (!of_device_is_available(remote->parent)) {
+ dev_warn(dev,
+ "parent device of %s is not available\n",
+ remote->full_name);
+ of_node_put(remote);
+ continue;
+ }
+
+ component_match_add(dev, &match, compare_of, remote);
+ of_node_put(remote);
+ }
+ of_node_put(port);
+ }
+
+ return component_master_add_with_match(dev, m_ops, match);
+}
+
+static int de2_drm_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ ret = de2_drm_add_components(&pdev->dev,
+ compare_of,
+ &de2_drm_comp_ops);
+ if (ret == -EINVAL)
+ ret = -ENXIO;
+ return ret;
+}
+
+static int de2_drm_remove(struct platform_device *pdev)
+{
+ component_master_del(&pdev->dev, &de2_drm_comp_ops);
+
+ return 0;
+}
+
+static struct platform_driver de2_drm_platform_driver = {
+ .probe = de2_drm_probe,
+ .remove = de2_drm_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .of_match_table = de2_drm_of_match,
+ },
+};
+
+static int __init de2_drm_init(void)
+{
+ int ret;
+
+ ret = platform_driver_register(&de2_lcd_platform_driver);
+ if (ret < 0)
+ return ret;
+
+ ret = platform_driver_register(&de2_drm_platform_driver);
+ if (ret < 0)
+ platform_driver_unregister(&de2_lcd_platform_driver);
+
+ return ret;
+}
+
+static void __exit de2_drm_fini(void)
+{
+ platform_driver_unregister(&de2_lcd_platform_driver);
+ platform_driver_unregister(&de2_drm_platform_driver);
+}
+
+module_init(de2_drm_init);
+module_exit(de2_drm_fini);
+
+MODULE_AUTHOR("Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>");
+MODULE_DESCRIPTION("Allwinner DE2 DRM Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpu/drm/sun8i/de2_plane.c b/drivers/gpu/drm/sun8i/de2_plane.c
new file mode 100644
index 0000000..47c94dd
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_plane.c
@@ -0,0 +1,712 @@
+/*
+ * Allwinner DRM driver - Display Engine 2
+ *
+ * Copyright (C) 2016 Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
+ * Adapted from the sun8iw6 and sun8iw7 disp2 drivers
+ * Copyright (c) 2016 Allwinnertech Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <linux/io.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_fb_cma_helper.h>
+#include <drm/drm_gem_cma_helper.h>
+#include <drm/drm_plane_helper.h>
+
+#include "de2_drm.h"
+#include "de2_crtc.h"
+
+/* DE2 I/O map */
+
+#define DE2_MOD_REG 0x0000 /* 1 bit per LCD */
+#define DE2_GATE_REG 0x0004
+#define DE2_RESET_REG 0x0008
+#define DE2_DIV_REG 0x000c /* 4 bits per LCD */
+#define DE2_SEL_REG 0x0010
+
+#define DE2_MIXER0_BASE 0x00100000 /* LCD 0 */
+#define DE2_MIXER1_BASE 0x00200000 /* LCD 1 */
+
+/* mixer registers (addr / mixer base) */
+#define MIXER_GLB_REGS 0x00000 /* global control */
+#define MIXER_BLD_REGS 0x01000 /* alpha blending */
+#define MIXER_CHAN_REGS 0x02000 /* VI/UI overlay channels */
+#define MIXER_CHAN_SZ 0x1000 /* size of a channel */
+#define MIXER_VSU_REGS 0x20000 /* VSU */
+#define MIXER_GSU1_REGS 0x30000 /* GSUs */
+#define MIXER_GSU2_REGS 0x40000
+#define MIXER_GSU3_REGS 0x50000
+#define MIXER_FCE_REGS 0xa0000 /* FCE */
+#define MIXER_BWS_REGS 0xa2000 /* BWS */
+#define MIXER_LTI_REGS 0xa4000 /* LTI */
+#define MIXER_PEAK_REGS 0xa6000 /* PEAK */
+#define MIXER_ASE_REGS 0xa8000 /* ASE */
+#define MIXER_FCC_REGS 0xaa000 /* FCC */
+#define MIXER_DCSC_REGS 0xb0000 /* DCSC/SMBL */
+
+/* global control */
+#define MIXER_GLB_CTL_REG 0x00
+#define MIXER_GLB_CTL_rt_en BIT(0)
+#define MIXER_GLB_CTL_finish_irq_en BIT(4)
+#define MIXER_GLB_CTL_rtwb_port BIT(12)
+#define MIXER_GLB_STATUS_REG 0x04
+#define MIXER_GLB_DBUFF_REG 0x08
+#define MIXER_GLB_SIZE_REG 0x0c
+
+/* alpha blending */
+#define MIXER_BLD_FCOLOR_CTL_REG 0x00
+#define MIXER_BLD_FCOLOR_CTL_PEN(pipe) (0x0100 << (pipe))
+#define MIXER_BLD_ATTR_N 4 /* number of attribute blocks */
+#define MIXER_BLD_ATTR_SIZE (4 * 4) /* size of an attribute block */
+#define MIXER_BLD_ATTRx_FCOLOR(x) (0x04 + MIXER_BLD_ATTR_SIZE * (x))
+#define MIXER_BLD_ATTRx_INSIZE(x) (0x08 + MIXER_BLD_ATTR_SIZE * (x))
+#define MIXER_BLD_ATTRx_OFFSET(x) (0x0c + MIXER_BLD_ATTR_SIZE * (x))
+#define MIXER_BLD_ROUTE_REG 0x80
+#define MIXER_BLD_ROUTE(chan, pipe) ((chan) << ((pipe) * 4))
+#define MIXER_BLD_PREMULTIPLY_REG 0x84
+#define MIXER_BLD_BKCOLOR_REG 0x88
+#define MIXER_BLD_OUTPUT_SIZE_REG 0x8c
+#define MIXER_BLD_MODEx_REG(x) (0x90 + 4 * (x)) /* x = 0..3 */
+#define MIXER_BLD_MODE_SRCOVER 0x03010301
+#define MIXER_BLD_OUT_CTL_REG 0xfc
+
+/* VI channel (channel 0) */
+#define VI_CFG_N 4 /* number of layers */
+#define VI_CFG_SIZE 0x30 /* size of a layer */
+#define VI_CFGx_ATTR(l) (0x00 + VI_CFG_SIZE * (l))
+#define VI_CFG_ATTR_en BIT(0)
+#define VI_CFG_ATTR_fcolor_en BIT(4)
+#define VI_CFG_ATTR_fmt_SHIFT 8
+#define VI_CFG_ATTR_fmt_MASK GENMASK(12, 8)
+#define VI_CFG_ATTR_ui_sel BIT(15)
+#define VI_CFG_ATTR_top_down BIT(23)
+#define VI_CFGx_SIZE(l) (0x04 + VI_CFG_SIZE * (l))
+#define VI_CFGx_COORD(l) (0x08 + VI_CFG_SIZE * (l))
+#define VI_N_PLANES 3
+#define VI_CFGx_PITCHy(l, p) (0x0c + VI_CFG_SIZE * (l) + 4 * (p))
+#define VI_CFGx_TOP_LADDRy(l, p) (0x18 + VI_CFG_SIZE * (l) + 4 * (p))
+#define VI_CFGx_BOT_LADDRy(l, p) (0x24 + VI_CFG_SIZE * (l) + 4 * (p))
+#define VI_FCOLORx(l) (0xc0 + 4 * (l))
+#define VI_TOP_HADDRx(p) (0xd0 + 4 * (p))
+#define VI_BOT_HADDRx(p) (0xdc + 4 * (p))
+#define VI_OVL_SIZEx(n) (0xe8 + 4 * (n))
+#define VI_HORI_DSx(n) (0xf0 + 4 * (n))
+#define VI_VERT_DSx(n) (0xf8 + 4 * (n))
+#define VI_SIZE 0x100
+
+/* UI channel (channels 1..3) */
+#define UI_CFG_N 4 /* number of layers */
+#define UI_CFG_SIZE (8 * 4) /* size of a layer */
+#define UI_CFGx_ATTR(l) (0x00 + UI_CFG_SIZE * (l))
+#define UI_CFG_ATTR_en BIT(0)
+#define UI_CFG_ATTR_alpmod_SHIFT 1
+#define UI_CFG_ATTR_alpmod_MASK GENMASK(2, 1)
+#define UI_CFG_ATTR_fcolor_en BIT(4)
+#define UI_CFG_ATTR_fmt_SHIFT 8
+#define UI_CFG_ATTR_fmt_MASK GENMASK(12, 8)
+#define UI_CFG_ATTR_top_down BIT(23)
+#define UI_CFG_ATTR_alpha_SHIFT 24
+#define UI_CFG_ATTR_alpha_MASK GENMASK(31, 24)
+#define UI_CFGx_SIZE(l) (0x04 + UI_CFG_SIZE * (l))
+#define UI_CFGx_COORD(l) (0x08 + UI_CFG_SIZE * (l))
+#define UI_CFGx_PITCH(l) (0x0c + UI_CFG_SIZE * (l))
+#define UI_CFGx_TOP_LADDR(l) (0x10 + UI_CFG_SIZE * (l))
+#define UI_CFGx_BOT_LADDR(l) (0x14 + UI_CFG_SIZE * (l))
+#define UI_CFGx_FCOLOR(l) (0x18 + UI_CFG_SIZE * (l))
+#define UI_TOP_HADDR 0x80
+#define UI_BOT_HADDR 0x84
+#define UI_OVL_SIZE 0x88
+#define UI_SIZE 0x8c
+
+/* coordinates and sizes */
+#define XY(x, y) (((y) << 16) | (x))
+#define WH(w, h) ((((h) - 1) << 16) | ((w) - 1))
+
+/* UI video formats */
+#define DE2_FORMAT_ARGB_8888 0
+#define DE2_FORMAT_BGRA_8888 3
+#define DE2_FORMAT_XRGB_8888 4
+#define DE2_FORMAT_RGB_888 8
+#define DE2_FORMAT_BGR_888 9
+
+/* VI video formats */
+#define DE2_FORMAT_YUV422_I_YVYU 1 /* YVYU */
+#define DE2_FORMAT_YUV422_I_UYVY 2 /* UYVY */
+#define DE2_FORMAT_YUV422_I_YUYV 3 /* YUYV */
+#define DE2_FORMAT_YUV422_P 6 /* YYYY UU VV planar */
+#define DE2_FORMAT_YUV420_P 10 /* YYYY U V planar */
+
+/* plane formats */
+static const uint32_t ui_formats[] = {
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_BGRA8888,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888,
+};
+
+static const uint32_t vi_formats[] = {
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_YUV422,
+ DRM_FORMAT_YUV420,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_BGRA8888,
+ DRM_FORMAT_RGB888,
+ DRM_FORMAT_BGR888,
+};
+
+/*
+ * plane table
+ *
+ * The chosen channel/layer assignment of the planes respects
+ * the following constraints:
+ * - the cursor must be in a channel higher than the primary channel
+ * - there are 4 channels in the LCD 0 and only 2 channels in the LCD 1
+ */
+static const struct {
+ u8 chan;
+ u8 layer;
+ u8 pipe;
+ u8 type; /* plane type */
+ const uint32_t *formats;
+ u8 n_formats;
+} plane_tb[] = {
+ [DE2_PRIMARY_PLANE] = { /* primary plane: channel 0 (VI) */
+ 0, 0, 0,
+ DRM_PLANE_TYPE_PRIMARY,
+ ui_formats, ARRAY_SIZE(ui_formats),
+ },
+ [DE2_CURSOR_PLANE] = { /* cursor: channel 1 (UI) */
+ 1, 0, 1,
+ DRM_PLANE_TYPE_CURSOR,
+ ui_formats, ARRAY_SIZE(ui_formats),
+ },
+ {
+ 0, 1, 0, /* 1st overlay: channel 0, layer 1 */
+ DRM_PLANE_TYPE_OVERLAY,
+ vi_formats, ARRAY_SIZE(vi_formats),
+ },
+ {
+ 0, 2, 0, /* 2nd overlay: channel 0, layer 2 */
+ DRM_PLANE_TYPE_OVERLAY,
+ vi_formats, ARRAY_SIZE(vi_formats),
+ },
+ {
+ 0, 3, 0, /* 3rd overlay: channel 0, layer 3 */
+ DRM_PLANE_TYPE_OVERLAY,
+ vi_formats, ARRAY_SIZE(vi_formats),
+ },
+};
+
+static inline void andl_relaxed(void __iomem *addr, u32 val)
+{
+ writel_relaxed(readl_relaxed(addr) & val, addr);
+}
+
+static inline void orl_relaxed(void __iomem *addr, u32 val)
+{
+ writel_relaxed(readl_relaxed(addr) | val, addr);
+}
+
+/* alert the DE processor about changes in a mixer configuration */
+static void de2_mixer_select(struct priv *priv,
+ int mixer,
+ void __iomem *mixer_io)
+{
+ /* select the mixer ? */
+ andl_relaxed(priv->mmio + DE2_SEL_REG, ~1);
+
+ /* double register switch */
+ writel_relaxed(1, mixer_io + MIXER_GLB_REGS + MIXER_GLB_DBUFF_REG);
+}
+
+/*
+ * cleanup a mixer
+ *
+ * This is needed only once after power on.
+ */
+static void de2_mixer_cleanup(struct priv *priv, int mixer)
+{
+ void __iomem *mixer_io = priv->mmio;
+ void __iomem *chan_io;
+ u32 size = WH(1920, 1080); /* (any size) */
+ unsigned int i;
+ u32 data;
+
+ mixer_io += (mixer == 0) ? DE2_MIXER0_BASE : DE2_MIXER1_BASE;
+ chan_io = mixer_io + MIXER_CHAN_REGS;
+
+ /* set the A83T clock divider (500 / 2) = 250MHz */
+ if (priv->soc_type == SOC_A83T)
+ writel_relaxed(0x00000011, /* div = 2 for both LCDs */
+ priv->mmio + DE2_DIV_REG);
+
+ de2_mixer_select(priv, mixer, mixer_io);
+ writel_relaxed(size, mixer_io + MIXER_GLB_REGS + MIXER_GLB_SIZE_REG);
+
+ /*
+ * clear the VI/UI channels
+ * LCD0: 1 VI and 3 UIs
+ * LCD1: 1 VI and 1 UI
+ */
+ memset_io(chan_io, 0, VI_SIZE);
+ memset_io(chan_io + MIXER_CHAN_SZ, 0, UI_SIZE);
+ if (mixer == 0) {
+ memset_io(chan_io + MIXER_CHAN_SZ * 2, 0, UI_SIZE);
+ memset_io(chan_io + MIXER_CHAN_SZ * 3, 0, UI_SIZE);
+ }
+
+ /* clear and set default values alpha blending */
+ memset_io(mixer_io + MIXER_BLD_REGS, 0,
+ MIXER_BLD_ATTR_SIZE * MIXER_BLD_ATTR_N);
+ writel_relaxed(0x00000001 | /* fcolor for primary */
+ MIXER_BLD_FCOLOR_CTL_PEN(0),
+ mixer_io + MIXER_BLD_REGS + MIXER_BLD_FCOLOR_CTL_REG);
+ for (i = 0; i < MIXER_BLD_ATTR_N; i++) {
+ writel_relaxed(0xff000000,
+ mixer_io + MIXER_BLD_REGS + MIXER_BLD_ATTRx_FCOLOR(i));
+ writel_relaxed(size,
+ mixer_io + MIXER_BLD_REGS + MIXER_BLD_ATTRx_INSIZE(i));
+ writel_relaxed(0,
+ mixer_io + MIXER_BLD_REGS + MIXER_BLD_ATTRx_OFFSET(i));
+ }
+ writel_relaxed(0, mixer_io + MIXER_BLD_REGS + MIXER_BLD_OUT_CTL_REG);
+
+ /* prepare the pipe route for the planes */
+ data = 0;
+ for (i = 0; i < DE2_N_PLANES; i++)
+ data |= MIXER_BLD_ROUTE(plane_tb[i].chan, plane_tb[i].pipe);
+ writel_relaxed(data, mixer_io + MIXER_BLD_REGS + MIXER_BLD_ROUTE_REG);
+
+ writel_relaxed(0, mixer_io + MIXER_BLD_REGS +
+ MIXER_BLD_PREMULTIPLY_REG);
+ writel_relaxed(0xff000000, mixer_io + MIXER_BLD_REGS +
+ MIXER_BLD_BKCOLOR_REG);
+ writel_relaxed(size, mixer_io + MIXER_BLD_REGS +
+ MIXER_BLD_OUTPUT_SIZE_REG);
+ writel_relaxed(MIXER_BLD_MODE_SRCOVER,
+ mixer_io + MIXER_BLD_REGS + MIXER_BLD_MODEx_REG(0));
+ writel_relaxed(MIXER_BLD_MODE_SRCOVER,
+ mixer_io + MIXER_BLD_REGS + MIXER_BLD_MODEx_REG(1));
+ writel_relaxed(0, mixer_io + MIXER_BLD_REGS + MIXER_BLD_OUT_CTL_REG);
+
+ /* disable the enhancements */
+ writel_relaxed(0, mixer_io + MIXER_VSU_REGS);
+ writel_relaxed(0, mixer_io + MIXER_GSU1_REGS);
+ writel_relaxed(0, mixer_io + MIXER_GSU2_REGS);
+ writel_relaxed(0, mixer_io + MIXER_GSU3_REGS);
+ writel_relaxed(0, mixer_io + MIXER_FCE_REGS);
+ writel_relaxed(0, mixer_io + MIXER_BWS_REGS);
+ writel_relaxed(0, mixer_io + MIXER_LTI_REGS);
+ writel_relaxed(0, mixer_io + MIXER_PEAK_REGS);
+ writel_relaxed(0, mixer_io + MIXER_ASE_REGS);
+ writel_relaxed(0, mixer_io + MIXER_FCC_REGS);
+ writel_relaxed(0, mixer_io + MIXER_DCSC_REGS);
+}
+
+/* enable a mixer */
+static void de2_mixer_enable(struct lcd *lcd)
+{
+ struct priv *priv = lcd->priv;
+ void __iomem *mixer_io = priv->mmio;
+ int mixer = lcd->mixer;
+ u32 data;
+
+ mixer_io += (mixer == 0) ? DE2_MIXER0_BASE : DE2_MIXER1_BASE;
+
+ if (priv->started & (1 << mixer))
+ return; /* mixer already enabled */
+
+ /* if not done yet, start the DE processor */
+ if (!priv->started) {
+ reset_control_deassert(priv->reset);
+ clk_prepare_enable(priv->gate);
+ clk_prepare_enable(priv->clk);
+ }
+ priv->started |= 1 << mixer;
+
+ /* deassert the mixer and enable the clock */
+ orl_relaxed(priv->mmio + DE2_RESET_REG, mixer == 0 ? 1 : 4);
+ data = 1 << mixer; /* 1 bit / lcd */
+ orl_relaxed(priv->mmio + DE2_GATE_REG, data);
+ orl_relaxed(priv->mmio + DE2_MOD_REG, data);
+
+ /* enable */
+ andl_relaxed(priv->mmio + DE2_SEL_REG, ~1); /* mixer select */
+ writel_relaxed(MIXER_GLB_CTL_rt_en | MIXER_GLB_CTL_rtwb_port,
+ mixer_io + MIXER_GLB_REGS + MIXER_GLB_CTL_REG);
+ writel_relaxed(0, mixer_io + MIXER_GLB_REGS + MIXER_GLB_STATUS_REG);
+
+ /* restore the frame buffer size */
+ writel_relaxed(WH(lcd->crtc.mode.hdisplay,
+ lcd->crtc.mode.vdisplay),
+ mixer_io + MIXER_GLB_REGS + MIXER_GLB_SIZE_REG);
+
+ /* if not yet done, cleanup */
+ if (!(priv->clean & (1 << mixer))) {
+ priv->clean |= 1 << mixer;
+ de2_mixer_cleanup(priv, mixer);
+ }
+}
+
+/* enable a LCD (DE mixer) */
+void de2_de_enable(struct lcd *lcd)
+{
+ mutex_lock(&lcd->priv->mutex);
+
+ de2_mixer_enable(lcd);
+
+ mutex_unlock(&lcd->priv->mutex);
+}
+
+/* disable a LCD (DE mixer) */
+void de2_de_disable(struct lcd *lcd)
+{
+ struct priv *priv = lcd->priv;
+ void __iomem *mixer_io = priv->mmio;
+ int mixer = lcd->mixer;
+ u32 data;
+
+ if (!(priv->started & (1 << mixer)))
+ return; /* mixer already disabled */
+
+ mixer_io += (mixer == 0) ? DE2_MIXER0_BASE : DE2_MIXER1_BASE;
+
+ mutex_lock(&priv->mutex);
+
+ de2_mixer_select(priv, mixer, mixer_io);
+
+ writel_relaxed(0, mixer_io + MIXER_GLB_REGS + MIXER_GLB_CTL_REG);
+
+ data = ~(1 << mixer);
+ andl_relaxed(priv->mmio + DE2_MOD_REG, data);
+ andl_relaxed(priv->mmio + DE2_GATE_REG, data);
+ andl_relaxed(priv->mmio + DE2_RESET_REG, data);
+
+ mutex_unlock(&priv->mutex);
+
+ /* if all mixers are disabled, stop the DE */
+ priv->started &= ~(1 << mixer);
+ if (!priv->started) {
+ clk_disable_unprepare(priv->clk);
+ clk_disable_unprepare(priv->gate);
+ reset_control_assert(priv->reset);
+ }
+}
+
+static void de2_vi_update(void __iomem *chan_io,
+ struct drm_gem_cma_object *gem,
+ int layer,
+ unsigned int fmt,
+ u32 ui_sel,
+ u32 size,
+ u32 coord,
+ struct drm_framebuffer *fb,
+ u32 screen_size)
+{
+ int i;
+
+ writel_relaxed(VI_CFG_ATTR_en |
+ (fmt << VI_CFG_ATTR_fmt_SHIFT) |
+ ui_sel,
+ chan_io + VI_CFGx_ATTR(layer));
+ writel_relaxed(size, chan_io + VI_CFGx_SIZE(layer));
+ writel_relaxed(coord, chan_io + VI_CFGx_COORD(layer));
+ for (i = 0; i < VI_N_PLANES; i++) {
+ writel_relaxed(fb->pitches[i] ? fb->pitches[i] :
+ fb->pitches[0],
+ chan_io + VI_CFGx_PITCHy(layer, i));
+ writel_relaxed(gem->paddr + fb->offsets[i],
+ chan_io + VI_CFGx_TOP_LADDRy(layer, i));
+ }
+ writel_relaxed(0xff000000, chan_io + VI_FCOLORx(layer));
+ if (layer == 0) {
+ writel_relaxed(screen_size,
+ chan_io + VI_OVL_SIZEx(0));
+ }
+}
+
+static void de2_ui_update(void __iomem *chan_io,
+ struct drm_gem_cma_object *gem,
+ int layer,
+ unsigned int fmt,
+ u32 alpha_glob,
+ u32 size,
+ u32 coord,
+ struct drm_framebuffer *fb,
+ u32 screen_size)
+{
+ writel_relaxed(UI_CFG_ATTR_en |
+ (fmt << UI_CFG_ATTR_fmt_SHIFT) |
+ alpha_glob,
+ chan_io + UI_CFGx_ATTR(layer));
+ writel_relaxed(size, chan_io + UI_CFGx_SIZE(layer));
+ writel_relaxed(coord, chan_io + UI_CFGx_COORD(layer));
+ writel_relaxed(fb->pitches[0], chan_io + UI_CFGx_PITCH(layer));
+ writel_relaxed(gem->paddr + fb->offsets[0],
+ chan_io + UI_CFGx_TOP_LADDR(layer));
+ if (layer == 0)
+ writel_relaxed(screen_size, chan_io + UI_OVL_SIZE);
+}
+
+static void de2_plane_update(struct priv *priv, struct lcd *lcd,
+ int plane_num,
+ struct drm_plane_state *state,
+ struct drm_plane_state *old_state)
+{
+ void __iomem *mixer_io = priv->mmio;
+ void __iomem *chan_io;
+ struct drm_framebuffer *fb = state->fb;
+ struct drm_gem_cma_object *gem;
+ u32 size = WH(state->crtc_w, state->crtc_h);
+ u32 coord, screen_size;
+ u32 fcolor;
+ u32 ui_sel, alpha_glob;
+ int mixer = lcd->mixer;
+ int chan, layer, x, y;
+ unsigned int fmt;
+
+ mixer_io += (mixer == 0) ? DE2_MIXER0_BASE : DE2_MIXER1_BASE;
+
+ chan = plane_tb[plane_num].chan;
+ layer = plane_tb[plane_num].layer;
+
+ chan_io = mixer_io + MIXER_CHAN_REGS + MIXER_CHAN_SZ * chan;
+
+ x = state->crtc_x >= 0 ? state->crtc_x : 0;
+ y = state->crtc_y >= 0 ? state->crtc_y : 0;
+ coord = XY(x, y);
+
+ /* if plane update was delayed, force a full update */
+ if (priv->lcds[drm_crtc_index(&lcd->crtc)]->delayed &
+ (1 << plane_num)) {
+ priv->lcds[drm_crtc_index(&lcd->crtc)]->delayed &=
+ ~(1 << plane_num);
+
+ /* handle plane move */
+ } else if (fb == old_state->fb) {
+ de2_mixer_select(priv, mixer, mixer_io);
+ if (chan == 0)
+ writel_relaxed(coord, chan_io + VI_CFGx_COORD(layer));
+ else
+ writel_relaxed(coord, chan_io + UI_CFGx_COORD(layer));
+ return;
+ }
+
+ gem = drm_fb_cma_get_gem_obj(fb, 0);
+
+ ui_sel = alpha_glob = 0;
+
+ switch (fb->pixel_format) {
+ case DRM_FORMAT_ARGB8888:
+ fmt = DE2_FORMAT_ARGB_8888;
+ ui_sel = VI_CFG_ATTR_ui_sel;
+ break;
+ case DRM_FORMAT_BGRA8888:
+ fmt = DE2_FORMAT_BGRA_8888;
+ ui_sel = VI_CFG_ATTR_ui_sel;
+ break;
+ case DRM_FORMAT_XRGB8888:
+ fmt = DE2_FORMAT_XRGB_8888;
+ ui_sel = VI_CFG_ATTR_ui_sel;
+ alpha_glob = (1 << UI_CFG_ATTR_alpmod_SHIFT) |
+ (0xff << UI_CFG_ATTR_alpha_SHIFT);
+ break;
+ case DRM_FORMAT_RGB888:
+ fmt = DE2_FORMAT_RGB_888;
+ ui_sel = VI_CFG_ATTR_ui_sel;
+ break;
+ case DRM_FORMAT_BGR888:
+ fmt = DE2_FORMAT_BGR_888;
+ ui_sel = VI_CFG_ATTR_ui_sel;
+ break;
+ case DRM_FORMAT_YUYV:
+ fmt = DE2_FORMAT_YUV422_I_YUYV;
+ break;
+ case DRM_FORMAT_YVYU:
+ fmt = DE2_FORMAT_YUV422_I_YVYU;
+ break;
+ case DRM_FORMAT_YUV422:
+ fmt = DE2_FORMAT_YUV422_P;
+ break;
+ case DRM_FORMAT_YUV420:
+ fmt = DE2_FORMAT_YUV420_P;
+ break;
+ case DRM_FORMAT_UYVY:
+ fmt = DE2_FORMAT_YUV422_I_UYVY;
+ break;
+ default:
+ pr_err("de2_plane_update: format %.4s not yet treated\n",
+ (char *) &fb->pixel_format);
+ return;
+ }
+
+ /* the overlay size is the one of the primary plane */
+ screen_size = plane_num == DE2_PRIMARY_PLANE ?
+ size :
+ readl_relaxed(mixer_io + MIXER_GLB_REGS + MIXER_GLB_SIZE_REG);
+
+ /* prepare pipe enable */
+ fcolor = readl_relaxed(mixer_io + MIXER_BLD_REGS +
+ MIXER_BLD_FCOLOR_CTL_REG);
+ fcolor |= MIXER_BLD_FCOLOR_CTL_PEN(plane_tb[plane_num].pipe);
+
+ de2_mixer_select(priv, mixer, mixer_io);
+
+ if (chan == 0) /* VI channel */
+ de2_vi_update(chan_io, gem, layer, fmt, ui_sel, size, coord,
+ fb, screen_size);
+ else /* UI channel */
+ de2_ui_update(chan_io, gem, layer, fmt, alpha_glob, size, coord,
+ fb, screen_size);
+ writel_relaxed(fcolor, mixer_io + MIXER_BLD_REGS +
+ MIXER_BLD_FCOLOR_CTL_REG);
+}
+
+static void de2_plane_disable(struct priv *priv,
+ int mixer, int plane_num)
+{
+ void __iomem *mixer_io = priv->mmio;
+ void __iomem *chan_io;
+ u32 fcolor;
+ int chan, layer, chan_disable = 0;
+
+ mixer_io += (mixer == 0) ? DE2_MIXER0_BASE : DE2_MIXER1_BASE;
+
+ chan = plane_tb[plane_num].chan;
+ layer = plane_tb[plane_num].layer;
+
+ chan_io = mixer_io + MIXER_CHAN_REGS + MIXER_CHAN_SZ * chan;
+
+ /*
+ * check if the pipe should be disabled
+ * (this code works with only 2 layers)
+ */
+ if (chan == 0) {
+ if (readl_relaxed(chan_io + VI_CFGx_ATTR(1 - layer)) == 0)
+ chan_disable = 1;
+ } else {
+ if (readl_relaxed(chan_io + UI_CFGx_ATTR(1 - layer)) == 0)
+ chan_disable = 1;
+ }
+
+ fcolor = readl_relaxed(mixer_io + MIXER_BLD_REGS +
+ MIXER_BLD_FCOLOR_CTL_REG);
+
+ de2_mixer_select(priv, mixer, mixer_io);
+
+ if (chan == 0)
+ writel_relaxed(0, chan_io + VI_CFGx_ATTR(layer));
+ else
+ writel_relaxed(0, chan_io + UI_CFGx_ATTR(layer));
+
+ /* if no more layer in this channel, disable the pipe */
+ if (chan_disable) {
+ writel_relaxed(fcolor &
+ ~MIXER_BLD_FCOLOR_CTL_PEN(plane_tb[plane_num].pipe),
+ mixer_io + MIXER_BLD_REGS + MIXER_BLD_FCOLOR_CTL_REG);
+ }
+}
+
+static void de2_drm_plane_update(struct drm_plane *plane,
+ struct drm_plane_state *old_state)
+{
+ struct drm_plane_state *state = plane->state;
+ struct drm_crtc *crtc = state->crtc;
+ struct lcd *lcd = crtc_to_lcd(crtc);
+ struct priv *priv = lcd->priv;
+ int plane_num = plane - lcd->planes;
+
+ /* if the crtc is disabled, mark update delayed */
+ if (!(priv->started & (1 << lcd->mixer))) {
+ lcd->delayed |= 1 << plane_num;
+ return; /* mixer disabled */
+ }
+
+ mutex_lock(&priv->mutex);
+
+ de2_plane_update(priv, lcd, plane_num, state, old_state);
+
+ mutex_unlock(&priv->mutex);
+}
+
+static void de2_drm_plane_disable(struct drm_plane *plane,
+ struct drm_plane_state *old_state)
+{
+ struct drm_crtc *crtc = old_state->crtc;
+ struct lcd *lcd = crtc_to_lcd(crtc);
+ struct priv *priv = lcd->priv;
+ int plane_num = plane - lcd->planes;
+
+ if (!(priv->started & (1 << lcd->mixer)))
+ return; /* mixer disabled */
+
+ mutex_lock(&priv->mutex);
+
+ de2_plane_disable(lcd->priv, lcd->mixer, plane_num);
+
+ mutex_unlock(&priv->mutex);
+}
+
+static const struct drm_plane_helper_funcs plane_helper_funcs = {
+ .atomic_update = de2_drm_plane_update,
+ .atomic_disable = de2_drm_plane_disable,
+};
+
+static const struct drm_plane_funcs plane_funcs = {
+ .update_plane = drm_atomic_helper_update_plane,
+ .disable_plane = drm_atomic_helper_disable_plane,
+ .destroy = drm_plane_cleanup,
+ .reset = drm_atomic_helper_plane_reset,
+ .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
+};
+
+static int de2_one_plane_init(struct drm_device *drm,
+ struct drm_plane *plane,
+ int possible_crtcs,
+ int plane_num)
+{
+ int ret;
+
+ ret = drm_universal_plane_init(drm, plane, possible_crtcs,
+ &plane_funcs,
+ plane_tb[plane_num].formats,
+ plane_tb[plane_num].n_formats,
+ plane_tb[plane_num].type, NULL);
+ if (ret >= 0)
+ drm_plane_helper_add(plane, &plane_helper_funcs);
+
+ return ret;
+}
+
+/* initialize the planes */
+int de2_plane_init(struct drm_device *drm, struct lcd *lcd)
+{
+ int i, n, ret, possible_crtcs = 1 << drm_crtc_index(&lcd->crtc);
+
+ n = ARRAY_SIZE(plane_tb);
+ if (n != DE2_N_PLANES) {
+ dev_err(lcd->dev, "Bug: incorrect number of planes %d != "
+ __stringify(DE2_N_PLANES) "\n", n);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < n; i++) {
+ ret = de2_one_plane_init(drm, &lcd->planes[i],
+ possible_crtcs, i);
+ if (ret < 0) {
+ dev_err(lcd->dev, "plane init failed %d\n", ret);
+ break;
+ }
+ }
+
+ return ret;
+}
--
2.10.2
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^ permalink raw reply related
* [PATCH v6 2/5] drm: sun8i: add HDMI video support to A83T and H3
From: Jean-Francois Moine @ 2016-11-20 9:56 UTC (permalink / raw)
To: Dave Airlie, Maxime Ripard, Rob Herring
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <cover.1479641523.git.moinejf-GANU6spQydw@public.gmane.org>
This patch adds a HDMI video driver to the Allwinner's SoCs A83T and H3.
Signed-off-by: Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
---
.../devicetree/bindings/display/sunxi/hdmi.txt | 53 ++
drivers/gpu/drm/sun8i/Kconfig | 7 +
drivers/gpu/drm/sun8i/Makefile | 2 +
drivers/gpu/drm/sun8i/de2_hdmi.c | 394 ++++++++++
drivers/gpu/drm/sun8i/de2_hdmi.h | 51 ++
drivers/gpu/drm/sun8i/de2_hdmi_io.c | 839 +++++++++++++++++++++
6 files changed, 1346 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sunxi/hdmi.txt
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.c
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi.h
create mode 100644 drivers/gpu/drm/sun8i/de2_hdmi_io.c
diff --git a/Documentation/devicetree/bindings/display/sunxi/hdmi.txt b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
new file mode 100644
index 0000000..85709ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sunxi/hdmi.txt
@@ -0,0 +1,53 @@
+Allwinner HDMI Transmitter
+==========================
+
+The Allwinner HDMI transmitters are included in the SoCs.
+They support audio and video.
+
+Required properties:
+ - #address-cells : should be <1>
+ - #size-cells : should be <0>
+ - compatible : should be one of
+ "allwinner,sun8i-a83t-hdmi"
+ "allwinner,sun8i-h3-hdmi"
+ - clocks : phandles to the HDMI clocks as described in
+ Documentation/devicetree/bindings/clock/clock-bindings.txt
+ - clock-names : must be
+ "gate" : bus gate
+ "clock" : streaming clock
+ "ddc-clock" : DDC clock
+ - resets : One or two phandles to the HDMI resets
+ - reset-names : when 2 phandles, must be
+ "hdmi0" and "hdmi1"
+
+Required nodes:
+ - port: Audio and video input port nodes with endpoint definitions
+ as defined in Documentation/devicetree/bindings/graph.txt.
+ port@0 is video and port@1 is audio.
+
+Example:
+
+ hdmi: hdmi@01ee0000 {
+ compatible = "allwinner,sun8i-a83t-hdmi";
+ reg = <0x01ee0000 0x20000>;
+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>,
+ <&ccu CLK_HDMI_DDC>;
+ clock-names = "gate", "clock", "ddc-clock";
+ resets = <&ccu RST_HDMI0>, <&ccu RST_HDMI1>;
+ reset-names = "hdmi0", "hdmi1";
+ ...
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 { /* video */
+ reg = <0>;
+ hdmi_lcd1: endpoint {
+ remote-endpoint = <&lcd1_hdmi>;
+ };
+ };
+ port@1 { /* audio */
+ reg = <1>;
+ hdmi_i2s2: endpoint {
+ remote-endpoint = <&i2s2_hdmi>;
+ };
+ };
+ };
diff --git a/drivers/gpu/drm/sun8i/Kconfig b/drivers/gpu/drm/sun8i/Kconfig
index 6940895..5c4607b 100644
--- a/drivers/gpu/drm/sun8i/Kconfig
+++ b/drivers/gpu/drm/sun8i/Kconfig
@@ -17,3 +17,10 @@ config DRM_SUN8I_DE2
Choose this option if your Allwinner chipset has the DE2 interface
as the A64, A83T and H3. If M is selected the module will be called
sun8i-de2-drm.
+
+config DRM_SUN8I_DE2_HDMI
+ tristate "Support for DE2 HDMI"
+ depends on DRM_SUN8I_DE2
+ help
+ Choose this option if you use want HDMI on DE2.
+ If M is selected the module will be called sun8i-de2-hdmi.
diff --git a/drivers/gpu/drm/sun8i/Makefile b/drivers/gpu/drm/sun8i/Makefile
index f107919..6ba97c2 100644
--- a/drivers/gpu/drm/sun8i/Makefile
+++ b/drivers/gpu/drm/sun8i/Makefile
@@ -3,5 +3,7 @@
#
sun8i-de2-drm-objs := de2_drv.o de2_crtc.o de2_plane.o
+sun8i-de2-hdmi-objs := de2_hdmi.o de2_hdmi_io.o
obj-$(CONFIG_DRM_SUN8I_DE2) += sun8i-de2-drm.o
+obj-$(CONFIG_DRM_SUN8I_DE2_HDMI) += sun8i-de2-hdmi.o
diff --git a/drivers/gpu/drm/sun8i/de2_hdmi.c b/drivers/gpu/drm/sun8i/de2_hdmi.c
new file mode 100644
index 0000000..9898a12
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_hdmi.c
@@ -0,0 +1,394 @@
+/*
+ * Allwinner DRM driver - HDMI
+ *
+ * Copyright (C) 2016 Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/component.h>
+#include <linux/clk.h>
+#include <linux/hdmi.h>
+#include <linux/of_device.h>
+#include <linux/of_graph.h>
+
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_edid.h>
+#include <drm/drm_of.h>
+
+#include "de2_hdmi.h"
+
+static const struct of_device_id de2_hdmi_dt_ids[] = {
+ { .compatible = "allwinner,sun8i-a83t-hdmi",
+ .data = (void *) SOC_A83T },
+ { .compatible = "allwinner,sun8i-h3-hdmi",
+ .data = (void *) SOC_H3 },
+ { }
+};
+MODULE_DEVICE_TABLE(of, de2_hdmi_dt_ids);
+
+#define conn_to_priv(x) \
+ container_of(x, struct de2_hdmi_priv, connector)
+
+#define enc_to_priv(x) \
+ container_of(x, struct de2_hdmi_priv, encoder)
+
+/* --- encoder functions --- */
+
+static void de2_hdmi_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ struct de2_hdmi_priv *priv = enc_to_priv(encoder);
+ struct clk *parent_clk;
+ u32 parent_rate;
+ int ret;
+
+ priv->cea_mode = drm_match_cea_mode(mode);
+
+ DRM_DEBUG_DRIVER("cea_mode %d\n", priv->cea_mode);
+
+ /* determine and set the best rate for the parent clock (pll-video) */
+ if ((270000 * 2) % mode->clock == 0)
+ parent_rate = 270000000;
+ else if (297000 % mode->clock == 0)
+ parent_rate = 297000000;
+ else
+ return; /* "640x480" rejected */
+ parent_clk = clk_get_parent(priv->clk);
+
+ ret = clk_set_rate(parent_clk, parent_rate);
+ if (ret) {
+ dev_err(priv->dev, "set parent rate failed %d\n", ret);
+ return;
+ }
+ ret = clk_set_rate(priv->clk, mode->clock * 1000);
+ if (ret)
+ dev_err(priv->dev, "set rate failed %d\n", ret);
+
+ mutex_lock(&priv->mutex);
+ hdmi_io_video_mode(priv, mode);
+ mutex_unlock(&priv->mutex);
+}
+
+static void de2_hdmi_encoder_enable(struct drm_encoder *encoder)
+{
+ struct de2_hdmi_priv *priv = enc_to_priv(encoder);
+
+ mutex_lock(&priv->mutex);
+ hdmi_io_video_on(priv);
+ mutex_unlock(&priv->mutex);
+}
+
+static void de2_hdmi_encoder_disable(struct drm_encoder *encoder)
+{
+ struct de2_hdmi_priv *priv = enc_to_priv(encoder);
+
+ mutex_lock(&priv->mutex);
+ hdmi_io_video_off(priv);
+ mutex_unlock(&priv->mutex);
+}
+
+static const struct drm_encoder_helper_funcs de2_hdmi_encoder_helper_funcs = {
+ .mode_set = de2_hdmi_encoder_mode_set,
+ .enable = de2_hdmi_encoder_enable,
+ .disable = de2_hdmi_encoder_disable,
+};
+
+static const struct drm_encoder_funcs de2_hdmi_encoder_funcs = {
+ .destroy = drm_encoder_cleanup,
+};
+
+/* --- connector functions --- */
+
+static int de2_hdmi_connector_mode_valid(struct drm_connector *connector,
+ struct drm_display_mode *mode)
+{
+ int cea_mode = drm_match_cea_mode(mode);
+
+ if (hdmi_io_mode_valid(cea_mode) < 0)
+ return MODE_NOMODE;
+
+ return MODE_OK;
+}
+
+static enum drm_connector_status de2_hdmi_connector_detect(
+ struct drm_connector *connector, bool force)
+{
+ struct de2_hdmi_priv *priv = conn_to_priv(connector);
+ int ret;
+
+ mutex_lock(&priv->mutex);
+ ret = hdmi_io_get_hpd(priv);
+ mutex_unlock(&priv->mutex);
+
+ return ret ? connector_status_connected :
+ connector_status_disconnected;
+}
+
+static int read_edid_block(void *data, u8 *buf,
+ unsigned int blk, size_t length)
+{
+ struct de2_hdmi_priv *priv = data;
+ int ret;
+
+ mutex_lock(&priv->mutex);
+ ret = hdmi_io_ddc_read(priv,
+ blk / 2, (blk & 1) ? 128 : 0,
+ length, buf);
+ mutex_unlock(&priv->mutex);
+
+ return ret;
+}
+
+static int de2_hdmi_connector_get_modes(struct drm_connector *connector)
+{
+ struct de2_hdmi_priv *priv = conn_to_priv(connector);
+ struct edid *edid;
+ int n;
+
+ edid = drm_do_get_edid(connector, read_edid_block, priv);
+
+ if (!edid) {
+ dev_warn(priv->dev, "failed to read EDID\n");
+ if (!connector->cmdline_mode.specified)
+ return 0;
+
+ return drm_add_modes_noedid(connector,
+ connector->cmdline_mode.xres,
+ connector->cmdline_mode.yres);
+ }
+
+ drm_mode_connector_update_edid_property(connector, edid);
+ n = drm_add_edid_modes(connector, edid);
+
+ drm_edid_to_eld(connector, edid);
+
+ kfree(edid);
+
+ DRM_DEBUG_DRIVER("%s EDID ok %d modes\n",
+ connector->eld[0] ? "HDMI" : "DVI", n);
+
+ return n;
+}
+
+static const
+struct drm_connector_helper_funcs de2_hdmi_connector_helper_funcs = {
+ .get_modes = de2_hdmi_connector_get_modes,
+ .mode_valid = de2_hdmi_connector_mode_valid,
+};
+
+static const struct drm_connector_funcs de2_hdmi_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .reset = drm_atomic_helper_connector_reset,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .detect = de2_hdmi_connector_detect,
+ .destroy = drm_connector_cleanup,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static void de2_hdmi_cleanup(struct de2_hdmi_priv *priv)
+{
+ clk_disable_unprepare(priv->clk_ddc);
+ clk_disable_unprepare(priv->clk);
+ clk_disable_unprepare(priv->gate);
+ reset_control_assert(priv->reset1);
+ reset_control_assert(priv->reset0);
+}
+
+static int de2_hdmi_bind(struct device *dev, struct device *master, void *data)
+{
+ struct drm_device *drm = data;
+ struct de2_hdmi_priv *priv = dev_get_drvdata(dev);
+ struct drm_encoder *encoder = &priv->encoder;
+ struct drm_connector *connector = &priv->connector;
+ int ret;
+
+ encoder->possible_crtcs =
+ drm_of_find_possible_crtcs(drm, dev->of_node);
+
+ /* if no CRTC, delay */
+ if (encoder->possible_crtcs == 0)
+ return -EPROBE_DEFER;
+
+ /* HDMI init */
+ ret = reset_control_deassert(priv->reset0);
+ if (ret)
+ goto err;
+ ret = reset_control_deassert(priv->reset1);
+ if (ret)
+ goto err;
+ ret = clk_prepare_enable(priv->gate);
+ if (ret)
+ goto err;
+ ret = clk_prepare_enable(priv->clk);
+ if (ret)
+ goto err;
+ ret = clk_prepare_enable(priv->clk_ddc);
+ if (ret)
+ goto err;
+
+ mutex_lock(&priv->mutex);
+ hdmi_io_init(priv);
+ mutex_unlock(&priv->mutex);
+
+ /* encoder init */
+ ret = drm_encoder_init(drm, encoder, &de2_hdmi_encoder_funcs,
+ DRM_MODE_ENCODER_TMDS, NULL);
+ if (ret)
+ goto err;
+
+ drm_encoder_helper_add(encoder, &de2_hdmi_encoder_helper_funcs);
+
+ /* connector init */
+ ret = drm_connector_init(drm, connector,
+ &de2_hdmi_connector_funcs,
+ DRM_MODE_CONNECTOR_HDMIA);
+ if (ret)
+ goto err_connector;
+
+ connector->interlace_allowed = 1;
+ connector->polled = DRM_CONNECTOR_POLL_CONNECT |
+ DRM_CONNECTOR_POLL_DISCONNECT;
+ drm_connector_helper_add(connector,
+ &de2_hdmi_connector_helper_funcs);
+
+ drm_mode_connector_attach_encoder(connector, encoder);
+
+ return 0;
+
+err_connector:
+ drm_encoder_cleanup(encoder);
+err:
+ dev_err(dev, "err %d\n", ret);
+ return ret;
+}
+
+static void de2_hdmi_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct de2_hdmi_priv *priv = dev_get_drvdata(dev);
+
+ if (priv->connector.dev)
+ drm_connector_cleanup(&priv->connector);
+ drm_encoder_cleanup(&priv->encoder);
+ de2_hdmi_cleanup(priv);
+}
+
+static const struct component_ops de2_hdmi_ops = {
+ .bind = de2_hdmi_bind,
+ .unbind = de2_hdmi_unbind,
+};
+
+static int de2_hdmi_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct de2_hdmi_priv *priv;
+ struct resource *res;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ dev_set_drvdata(dev, priv);
+ priv->dev = dev;
+
+ mutex_init(&priv->mutex);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(dev, "failed to get memory resource\n");
+ return -ENXIO;
+ }
+ priv->mmio = devm_ioremap_resource(dev, res);
+ if (IS_ERR(priv->mmio)) {
+ ret = PTR_ERR(priv->mmio);
+ dev_err(dev, "failed to map registers err %d\n", ret);
+ return ret;
+ }
+
+ priv->gate = devm_clk_get(dev, "bus");
+ if (IS_ERR(priv->gate)) {
+ ret = PTR_ERR(priv->gate);
+ dev_err(dev, "gate clock err %d\n", ret);
+ return ret;
+ }
+
+ priv->clk = devm_clk_get(dev, "clock");
+ if (IS_ERR(priv->clk)) {
+ ret = PTR_ERR(priv->clk);
+ dev_err(dev, "hdmi clock err %d\n", ret);
+ return ret;
+ }
+
+ priv->clk_ddc = devm_clk_get(dev, "ddc-clock");
+ if (IS_ERR(priv->clk_ddc)) {
+ ret = PTR_ERR(priv->clk_ddc);
+ dev_err(dev, "hdmi-ddc clock err %d\n", ret);
+ return ret;
+ }
+
+ priv->reset0 = devm_reset_control_get(dev, "hdmi0");
+ if (IS_ERR(priv->reset0)) {
+ ret = PTR_ERR(priv->reset0);
+ dev_err(dev, "reset controller err %d\n", ret);
+ return ret;
+ }
+
+ priv->reset1 = devm_reset_control_get(dev, "hdmi1");
+ if (IS_ERR(priv->reset1)) {
+ ret = PTR_ERR(priv->reset1);
+ dev_err(dev, "reset controller err %d\n", ret);
+ return ret;
+ }
+
+ priv->soc_type = (int) of_match_device(de2_hdmi_dt_ids,
+ &pdev->dev)->data;
+
+ return component_add(dev, &de2_hdmi_ops);
+}
+
+static int de2_hdmi_remove(struct platform_device *pdev)
+{
+ component_del(&pdev->dev, &de2_hdmi_ops);
+
+ return 0;
+}
+
+static struct platform_driver de2_hdmi_driver = {
+ .probe = de2_hdmi_probe,
+ .remove = de2_hdmi_remove,
+ .driver = {
+ .name = "sun8i-de2-hdmi",
+ .of_match_table = of_match_ptr(de2_hdmi_dt_ids),
+ },
+};
+
+/* create the video HDMI driver */
+static int __init de2_hdmi_init(void)
+{
+ int ret;
+
+ ret = platform_driver_register(&de2_hdmi_driver);
+
+ return ret;
+}
+
+static void __exit de2_hdmi_fini(void)
+{
+ platform_driver_unregister(&de2_hdmi_driver);
+}
+
+module_init(de2_hdmi_init);
+module_exit(de2_hdmi_fini);
+
+MODULE_AUTHOR("Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>");
+MODULE_DESCRIPTION("Allwinner DE2 HDMI encoder/connector");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/gpu/drm/sun8i/de2_hdmi.h b/drivers/gpu/drm/sun8i/de2_hdmi.h
new file mode 100644
index 0000000..1f0b1d9
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_hdmi.h
@@ -0,0 +1,51 @@
+#ifndef __DE2_HDMI_H__
+#define __DE2_HDMI_H__
+/*
+ * Copyright (C) 2016 Jean-François Moine
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/reset.h>
+#include <drm/drmP.h>
+
+/* SoC types */
+#define SOC_A83T 0
+#define SOC_H3 1
+
+struct de2_hdmi_priv {
+ struct device *dev;
+ void __iomem *mmio;
+
+ struct drm_encoder encoder;
+ struct drm_connector connector;
+
+ struct clk *clk;
+ struct clk *clk_ddc;
+ struct clk *gate;
+ struct reset_control *reset0;
+ struct reset_control *reset1;
+
+ struct mutex mutex;
+ u8 soc_type;
+ u8 cea_mode;
+};
+
+/* in de2_hdmi_io.c */
+void hdmi_io_init(struct de2_hdmi_priv *priv);
+void hdmi_io_video_on(struct de2_hdmi_priv *priv);
+void hdmi_io_video_off(struct de2_hdmi_priv *priv);
+int hdmi_io_video_mode(struct de2_hdmi_priv *priv,
+ struct drm_display_mode *mode);
+int hdmi_io_ddc_read(struct de2_hdmi_priv *priv,
+ char pointer, char offset,
+ int nbyte, char *pbuf);
+int hdmi_io_get_hpd(struct de2_hdmi_priv *priv);
+int hdmi_io_mode_valid(int cea_mode);
+
+#endif /* __DE2_HDMI_H__ */
diff --git a/drivers/gpu/drm/sun8i/de2_hdmi_io.c b/drivers/gpu/drm/sun8i/de2_hdmi_io.c
new file mode 100644
index 0000000..8c690bf
--- /dev/null
+++ b/drivers/gpu/drm/sun8i/de2_hdmi_io.c
@@ -0,0 +1,839 @@
+/*
+ * Allwinner A83T and H3 HDMI lowlevel functions
+ *
+ * Copyright (C) 2016 Jean-Francois Moine <moinejf-GANU6spQydw@public.gmane.org>
+ * Adapted from the sun8iw6 and sun8iw7 disp2 drivers
+ * Copyright (c) 2016 Allwinnertech Co., Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/*
+ * The HDMI controller in the A83T and H3 seems to be a
+ * Synopsys DesignWare HDMI controller.
+ * The PHYs are unknown.
+ * Documentation:
+ * https://linux-sunxi.org/DWC_HDMI_Controller
+ * https://www.synopsys.com/dw/doc.php/ds/c/dwc_hdmi_tx_csds.pdf
+ */
+
+#include <linux/hdmi.h>
+
+#include "de2_hdmi.h"
+
+/* guessed PHY registers */
+#define HDMI_PHY_LOCK_READ_REG 0x10010
+#define HDMI_PHY_CTRL_REG 0x10020
+#define HDMI_PHY_24_REG 0x10024
+#define HDMI_PHY_28_REG 0x10028
+#define HDMI_PHY_PLL_REG 0x1002c
+#define HDMI_PHY_CLK_REG 0x10030
+#define HDMI_PHY_34_REG 0x10034
+#define HDMI_PHY_STATUS_REG 0x10038
+
+/* DW registers (obfuscated addresses) */
+
+/* Interrupt Registers */
+#define R_0100_HDMI_IH_FC_STAT0 0x0010
+#define R_0101_HDMI_IH_FC_STAT1 0x0011
+#define R_0102_HDMI_IH_FC_STAT2 0x8010
+#define R_0103_HDMI_IH_AS_STAT0 0x8011
+#define R_0104_HDMI_IH_PHY_STAT0 0x0012
+#define R_0105_HDMI_IH_I2CM_STAT0 0x0013
+#define R_0106_HDMI_IH_CEC_STAT0 0x8012
+#define R_0107_HDMI_IH_VP_STAT0 0x8013
+#define R_0108_HDMI_IH_I2CMPHY_STAT0 0x4010
+#define R_01ff_HDMI_IH_MUTE 0xf01f
+
+/* Video Sample Registers */
+#define R_0200_HDMI_TX_INVID0 0x0800
+#define R_0201_HDMI_TX_INSTUFFING 0x0801
+#define R_0202_HDMI_TX_GYDATA0 0x8800
+#define R_0203_HDMI_TX_GYDATA1 0x8801
+#define R_0204_HDMI_TX_RCRDATA0 0x0802
+#define R_0205_HDMI_TX_RCRDATA1 0x0803
+#define R_0206_HDMI_TX_BCBDATA0 0x8802
+#define R_0207_HDMI_TX_BCBDATA1 0x8803
+
+/* Video Packetizer Registers */
+#define R_0801_HDMI_VP_PR_CD 0x0401
+#define R_0802_HDMI_VP_STUFF 0x8400
+#define R_0803_HDMI_VP_REMAP 0x8401
+#define R_0804_HDMI_VP_CONF 0x0402
+#define R_0807_HDMI_VP_MASK 0x8403
+
+/* Frame Composer Registers */
+#define R_1000_HDMI_FC_INVIDCONF 0x0040
+#define HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH 0x10
+#define R_1001_HDMI_FC_INHACTV0 0x0041
+#define R_1002_HDMI_FC_INHACTV1 0x8040
+#define R_1003_HDMI_FC_INHBLANK0 0x8041
+#define R_1004_HDMI_FC_INHBLANK1 0x0042
+#define R_1005_HDMI_FC_INVACTV0 0x0043
+#define R_1006_HDMI_FC_INVACTV1 0x8042
+#define R_1007_HDMI_FC_INVBLANK 0x8043
+#define R_1008_HDMI_FC_HSYNCINDELAY0 0x4040
+#define R_1009_HDMI_FC_HSYNCINDELAY1 0x4041
+#define R_100a_HDMI_FC_HSYNCINWIDTH0 0xc040
+#define R_100b_HDMI_FC_HSYNCINWIDTH1 0xc041
+#define R_100c_HDMI_FC_VSYNCINDELAY 0x4042
+#define R_100d_HDMI_FC_VSYNCINWIDTH 0x4043
+#define R_1011_HDMI_FC_CTRLDUR 0x0045
+#define R_1012_HDMI_FC_EXCTRLDUR 0x8044
+#define R_1013_HDMI_FC_EXCTRLSPAC 0x8045
+#define R_1014_HDMI_FC_CH0PREAM 0x0046
+#define R_1015_HDMI_FC_CH1PREAM 0x0047
+#define R_1016_HDMI_FC_CH2PREAM 0x8046
+#define R_1018_HDMI_FC_GCP 0x4044
+#define R_1019_HDMI_FC_AVICONF0 0x4045
+#define HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN 0x20
+#define R_101a_HDMI_FC_AVICONF1 0xc044
+#define R_101b_HDMI_FC_AVICONF2 0xc045
+#define R_101c_HDMI_FC_AVIVID 0x4046
+#define R_1025_HDMI_FC_AUDICONF0 0x2043
+#define R_1026_HDMI_FC_AUDICONF1 0xa042
+#define R_1027_HDMI_FC_AUDICONF2 0xa043
+#define R_1028_HDMI_FC_AUDICONF3 0x6040
+#define R_1029_HDMI_FC_VSDIEEEID0 0x6041
+#define R_1030_HDMI_FC_VSDIEEEID1 0x2044
+#define R_1031_HDMI_FC_VSDIEEEID2 0x2045
+#define R_1032_HDMI_FC_VSDPAYLOAD0 0xa044
+#define R_1033_HDMI_FC_VSDPAYLOAD1 0xa045
+#define R_1034_HDMI_FC_VSDPAYLOAD2 0x2046
+#define R_1063_HDMI_FC_AUDSCONF 0xa049
+#define R_1065_HDMI_FC_AUDSV 0x204b
+#define R_1066_HDMI_FC_AUDSU 0xa04a
+#define R_1067_HDMI_FC_AUDSCHNLS0 0xa04b
+#define HDMI_FC_AUDSCHNLS0_CGMSA 0x30
+#define R_1068_HDMI_FC_AUDSCHNLS1 0x6048
+#define R_1069_HDMI_FC_AUDSCHNLS2 0x6049
+#define R_106a_HDMI_FC_AUDSCHNLS3 0xe048
+#define HDMI_FC_AUDSCHNLS3_OIEC_CH0(v) (v)
+#define HDMI_FC_AUDSCHNLS3_OIEC_CH1(v) (v << 4)
+#define R_106b_HDMI_FC_AUDSCHNLS4 0xe049
+#define HDMI_FC_AUDSCHNLS4_OIEC_CH2(v) (v)
+#define HDMI_FC_AUDSCHNLS4_OIEC_CH3(v) (v << 4)
+#define R_106c_HDMI_FC_AUDSCHNLS5 0x604a
+#define HDMI_FC_AUDSCHNLS5_OIEC_CH0(v) (v)
+#define HDMI_FC_AUDSCHNLS5_OIEC_CH1(v) (v << 4)
+#define R_106d_HDMI_FC_AUDSCHNLS6 0x604b
+#define HDMI_FC_AUDSCHNLS6_OIEC_CH2(v) (v)
+#define HDMI_FC_AUDSCHNLS6_OIEC_CH3(v) (v << 4)
+#define R_106e_HDMI_FC_AUDSCHNLS7 0xe04a
+#define R_106f_HDMI_FC_AUDSCHNLS8 0xe04b
+#define HDMI_FC_AUDSCHNLS8_WORDLENGTH(v) (v)
+#define R_10b3_HDMI_FC_DATAUTO0 0xb045
+#define R_10b4_HDMI_FC_DATAUTO1 0x3046
+#define R_10b5_HDMI_FC_DATAUTO2 0x3047
+#define R_10d2_HDMI_FC_MASK0 0x904c
+#define R_10d6_HDMI_FC_MASK1 0x904e
+#define R_10da_HDMI_FC_MASK2 0xd04c
+#define R_10e0_HDMI_FC_PRCONF 0x3048
+#define R_1103_HDMI_FC_GMD_CONF 0x8051
+#define R_1104_HDMI_FC_GMD_HB 0x0052
+#define R_1200_HDMI_FC_DBGFORCE 0x0840
+#define HDMI_FC_DBGFORCE_FORCEAUDIO BIT(4)
+#define HDMI_FC_DBGFORCE_FORCEVIDEO BIT(0)
+#define R_1219_HDMI_FC_DBGTMDS0 0x4845
+
+/* HDMI Source PHY Registers */
+#define R_3000_HDMI_PHY_CONF0 0x0240
+#define HDMI_PHY_CONF0_PDZ BIT(7)
+#define HDMI_PHY_CONF0_ENTMDS BIT(6)
+#define HDMI_PHY_CONF0_SPARECTRL BIT(5)
+#define HDMI_PHY_CONF0_GEN2_PDDQ BIT(4)
+#define HDMI_PHY_CONF0_GEN2_TXPWRON BIT(3)
+#define HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE BIT(2)
+#define HDMI_PHY_CONF0_SELDATAENPOL BIT(1)
+#define HDMI_PHY_CONF0_SELDIPIF BIT(0)
+#define R_3001_HDMI_PHY_TST0 0x0241
+#define HDMI_PHY_TST0_TSTCLR BIT(5)
+#define R_3005_HDMI_PHY_INT0 0x0243
+#define R_3006_HDMI_PHY_MASK0 0x8242
+
+/* HDMI Master PHY Registers */
+#define R_3020_HDMI_PHY_I2CM_SLAVE_ADDR 0x2240
+#define HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 0x69
+#define R_3021_HDMI_PHY_I2CM_ADDRESS_ADDR 0x2241
+#define R_3022_HDMI_PHY_I2CM_DATAO_1_ADDR 0xa240
+#define R_3023_HDMI_PHY_I2CM_DATAO_0_ADDR 0xa241
+#define R_3026_HDMI_PHY_I2CM_OPERATION_ADDR 0xa242
+#define HDMI_PHY_I2CM_OPERATION_ADDR_WRITE 0x10
+#define R_3027_HDMI_PHY_I2CM_INT_ADDR 0xa243
+#define R_3028_HDMI_PHY_I2CM_CTLINT_ADDR 0x6240
+
+/* Audio Sampler Registers */
+#define R_3100_HDMI_AUD_CONF0 0x0250
+#define HDMI_AUD_CONF0_SW_RESET 0x80
+#define HDMI_AUD_CONF0_I2S_ALL_ENABLE 0x2f
+#define R_3101_HDMI_AUD_CONF1 0x0251
+#define R_3102_HDMI_AUD_INT 0x8250
+#define R_3103_HDMI_AUD_CONF2 0x8251
+#define R_3200_HDMI_AUD_N1 0x0a40
+#define R_3201_HDMI_AUD_N2 0x0a41
+#define R_3202_HDMI_AUD_N3 0x8a40
+#define R_3205_HDMI_AUD_CTS3 0x0a43
+#define R_3206_HDMI_AUD_INPUTCLKFS 0x8a42
+#define HDMI_AUD_INPUTCLKFS_64FS 0x04
+#define R_3302_HDMI_AUD_SPDIFINT 0x8a50
+
+/* Generic Parallel Audio Interface Registers */
+#define R_3506_HDMI_GP_POL 0x8272
+
+/* Main Controller Registers */
+#define R_4001_HDMI_MC_CLKDIS 0x0081
+#define HDMI_MC_CLKDIS_HDCPCLK_DISABLE BIT(6)
+#define HDMI_MC_CLKDIS_AUDCLK_DISABLE BIT(3)
+#define HDMI_MC_CLKDIS_TMDSCLK_DISABLE BIT(1)
+#define R_4002_HDMI_MC_SWRSTZ 0x8080
+#define R_4004_HDMI_MC_FLOWCTRL 0x0082
+#define R_4005_HDMI_MC_PHYRSTZ 0x0083
+#define HDMI_MC_PHYRSTZ_DEASSERT BIT(0)
+
+/* HDCP Encryption Engine Registers */
+#define R_5000_HDMI_A_HDCPCFG0 0x00c0
+#define R_5001_HDMI_A_HDCPCFG1 0x00c1
+#define HDMI_A_HDCPCFG1_PH2UPSHFTENC BIT(2)
+#define HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE BIT(1)
+#define HDMI_A_HDCPCFG1_SWRESET BIT(0)
+#define R_5008_HDMI_A_APIINTMSK 0x40c0
+#define R_5009_HDMI_A_VIDPOLCFG 0x40c1
+#define HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH BIT(4)
+
+/* CEC Engine Registers */
+#define R_7d02_HDMI_CEC_MASK 0x86f0
+
+/* I2C Master Registers (E-DDC) */
+#define R_7e00_HDMI_I2CM_SLAVE 0x0ee0
+#define R_7e01_HDMI_I2CM_ADDRESS 0x0ee1
+#define R_7e03_HDMI_I2CM_DATAI 0x8ee1
+#define R_7e04_HDMI_I2CM_OPERATION 0x0ee2
+#define HDMI_I2CM_OPERATION_DDC_READ 0x02
+#define R_7e05_HDMI_I2CM_INT 0x0ee3
+#define R_7e06_HDMI_I2CM_CTLINT 0x8ee2
+#define R_7e07_HDMI_I2CM_DIV 0x8ee3
+#define R_7e08_HDMI_I2CM_SEGADDR 0x4ee0
+#define R_7e09_HDMI_I2CM_SOFTRSTZ 0x4ee1
+#define R_7e0a_HDMI_I2CM_SEGPTR 0xcee0
+#define R_7e0b_HDMI_I2CM_SS_SCL_HCNT_1_ADDR 0xcee1
+#define R_7e0c_HDMI_I2CM_SS_SCL_HCNT_0_ADDR 0x4ee2
+#define R_7e0d_HDMI_I2CM_SS_SCL_LCNT_1_ADDR 0x4ee3
+#define R_7e0e_HDMI_I2CM_SS_SCL_LCNT_0_ADDR 0xcee2
+#define R_7e0f_HDMI_I2CM_FS_SCL_HCNT_1_ADDR 0xcee3
+#define R_7e10_HDMI_I2CM_FS_SCL_HCNT_0_ADDR 0x0ee4
+#define R_7e11_HDMI_I2CM_FS_SCL_LCNT_1_ADDR 0x0ee5
+
+#define VIC_720x480_60 2
+#define VIC_1280x720_60 4
+#define VIC_1920x1080i_60 5
+#define VIC_720x480i_60 6
+#define VIC_1920x1080_60 16
+#define VIC_720x576_50 17
+#define VIC_1280x720_50 19
+#define VIC_1920x1080i_50 20
+#define VIC_720x576i_50 21
+#define VIC_1920x1080_50 31
+#define VIC_1920x1080_24 32
+#define VIC_1920x1080_25 33
+#define VIC_1920x1080_30 34
+
+static inline u8 hdmi_readb(struct de2_hdmi_priv *priv, u32 addr)
+{
+ return readb_relaxed(priv->mmio + addr);
+}
+
+static inline u32 hdmi_readl(struct de2_hdmi_priv *priv, u32 addr)
+{
+ return readl_relaxed(priv->mmio + addr);
+}
+
+static inline void hdmi_writeb(struct de2_hdmi_priv *priv, u32 addr, u8 data)
+{
+ writeb_relaxed(data, priv->mmio + addr);
+}
+
+static inline void hdmi_writel(struct de2_hdmi_priv *priv, u32 addr, u32 data)
+{
+ writel_relaxed(data, priv->mmio + addr);
+}
+
+static inline void hdmi_orb(struct de2_hdmi_priv *priv, u32 addr, u8 data)
+{
+ writeb_relaxed(readb_relaxed(priv->mmio + addr) | data,
+ priv->mmio + addr);
+}
+
+static inline void hdmi_orl(struct de2_hdmi_priv *priv, u32 addr, u32 data)
+{
+ writel_relaxed(readl_relaxed(priv->mmio + addr) | data,
+ priv->mmio + addr);
+}
+
+static inline void hdmi_andl(struct de2_hdmi_priv *priv, u32 addr, u32 data)
+{
+ writel_relaxed(readl_relaxed(priv->mmio + addr) & data,
+ priv->mmio + addr);
+}
+
+/* read lock/unlock functions */
+static inline void hdmi_lock_read(struct de2_hdmi_priv *priv)
+{
+ hdmi_writel(priv, HDMI_PHY_LOCK_READ_REG, 0x54524545);
+}
+static inline void hdmi_unlock_read(struct de2_hdmi_priv *priv)
+{
+ hdmi_writel(priv, HDMI_PHY_LOCK_READ_REG, 0x57415452);
+}
+
+static void hdmi_inner_init(struct de2_hdmi_priv *priv)
+{
+ u8 clkdis = priv->soc_type == SOC_H3 ?
+ ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE : 0xff;
+
+ hdmi_lock_read(priv);
+
+ /* software reset */
+ hdmi_writeb(priv, R_4002_HDMI_MC_SWRSTZ, 0x00);
+ udelay(2);
+
+ /* mask all interrupts */
+ hdmi_writeb(priv, R_01ff_HDMI_IH_MUTE, 0x00);
+ hdmi_writeb(priv, R_0807_HDMI_VP_MASK, 0xff);
+ hdmi_writeb(priv, R_10d2_HDMI_FC_MASK0, 0xff);
+ hdmi_writeb(priv, R_10d6_HDMI_FC_MASK1, 0xff);
+ hdmi_writeb(priv, R_10da_HDMI_FC_MASK2, 0xff);
+ hdmi_writeb(priv, R_3102_HDMI_AUD_INT, 0xff);
+ hdmi_writeb(priv, R_3302_HDMI_AUD_SPDIFINT, 0xff);
+ hdmi_writeb(priv, R_3506_HDMI_GP_POL, 0xff);
+ hdmi_writeb(priv, R_5008_HDMI_A_APIINTMSK, 0xff);
+ hdmi_writeb(priv, R_7d02_HDMI_CEC_MASK, 0xff);
+ hdmi_writeb(priv, R_7e05_HDMI_I2CM_INT, 0xff);
+ hdmi_writeb(priv, R_7e06_HDMI_I2CM_CTLINT, 0xff);
+
+ hdmi_writeb(priv, R_1063_HDMI_FC_AUDSCONF, 0xf0);
+ hdmi_writeb(priv, R_10b3_HDMI_FC_DATAUTO0, 0x1e);
+ hdmi_writeb(priv, R_5001_HDMI_A_HDCPCFG1, 0x00);
+ hdmi_writeb(priv, R_5001_HDMI_A_HDCPCFG1,
+ HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE |
+ HDMI_A_HDCPCFG1_SWRESET);
+ hdmi_writeb(priv, R_5000_HDMI_A_HDCPCFG0, 0x00);
+ hdmi_writeb(priv, R_5009_HDMI_A_VIDPOLCFG,
+ HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH);
+ hdmi_writeb(priv, R_4001_HDMI_MC_CLKDIS, clkdis);
+ hdmi_writeb(priv, R_4001_HDMI_MC_CLKDIS, 0x00);
+ hdmi_writeb(priv, R_4001_HDMI_MC_CLKDIS, clkdis);
+ hdmi_writeb(priv, R_0100_HDMI_IH_FC_STAT0, 0xff);
+ hdmi_writeb(priv, R_0101_HDMI_IH_FC_STAT1, 0xff);
+ hdmi_writeb(priv, R_0102_HDMI_IH_FC_STAT2, 0xff);
+ hdmi_writeb(priv, R_0103_HDMI_IH_AS_STAT0, 0xff);
+ hdmi_writeb(priv, R_0105_HDMI_IH_I2CM_STAT0, 0xff);
+ hdmi_writeb(priv, R_0106_HDMI_IH_CEC_STAT0, 0xff);
+ hdmi_writeb(priv, R_0107_HDMI_IH_VP_STAT0, 0xff);
+}
+
+static void hdmi_phy_init_a83t(struct de2_hdmi_priv *priv)
+{
+ hdmi_inner_init(priv);
+
+ hdmi_writeb(priv, 0x10000, 0x01);
+ hdmi_writeb(priv, 0x10001, 0x00);
+ hdmi_writeb(priv, 0x10002, HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2);
+ hdmi_writeb(priv, 0x10003, 0x00);
+ hdmi_writeb(priv, 0x10007, 0xa0);
+ hdmi_writeb(priv, R_4005_HDMI_MC_PHYRSTZ, HDMI_MC_PHYRSTZ_DEASSERT);
+ udelay(1);
+ hdmi_writeb(priv, R_3000_HDMI_PHY_CONF0,
+ HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE |
+ HDMI_PHY_CONF0_SELDATAENPOL);
+ hdmi_writeb(priv, R_3000_HDMI_PHY_CONF0,
+ HDMI_PHY_CONF0_GEN2_PDDQ |
+ HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE |
+ HDMI_PHY_CONF0_SELDATAENPOL);
+ hdmi_writeb(priv, R_3000_HDMI_PHY_CONF0,
+ HDMI_PHY_CONF0_GEN2_PDDQ |
+ HDMI_PHY_CONF0_SELDATAENPOL);
+ hdmi_writeb(priv, R_3006_HDMI_PHY_MASK0, 0xf0);
+ hdmi_writeb(priv, R_3027_HDMI_PHY_I2CM_INT_ADDR, 0xff);
+ hdmi_writeb(priv, R_3028_HDMI_PHY_I2CM_CTLINT_ADDR, 0xff);
+ hdmi_writeb(priv, R_0104_HDMI_IH_PHY_STAT0, 0xff);
+ hdmi_writeb(priv, R_0108_HDMI_IH_I2CMPHY_STAT0, 0xff);
+ hdmi_writeb(priv, R_4005_HDMI_MC_PHYRSTZ, 0x00);
+ hdmi_writeb(priv, R_3000_HDMI_PHY_CONF0,
+ HDMI_PHY_CONF0_GEN2_PDDQ |
+ HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE |
+ HDMI_PHY_CONF0_SELDATAENPOL);
+ hdmi_writeb(priv, R_3000_HDMI_PHY_CONF0,
+ HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE |
+ HDMI_PHY_CONF0_SELDATAENPOL);
+ hdmi_writeb(priv, R_3001_HDMI_PHY_TST0, HDMI_PHY_TST0_TSTCLR);
+ hdmi_writeb(priv, R_3020_HDMI_PHY_I2CM_SLAVE_ADDR,
+ HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2);
+ hdmi_writeb(priv, R_3001_HDMI_PHY_TST0, 0x00);
+}
+
+static void hdmi_phy_init_h3(struct de2_hdmi_priv *priv)
+{
+ int to_cnt;
+ u32 tmp;
+
+ hdmi_writel(priv, HDMI_PHY_CTRL_REG, 0);
+ hdmi_writel(priv, HDMI_PHY_CTRL_REG, 1 << 0);
+ udelay(5);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 1 << 16);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 1 << 1);
+ udelay(10);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 1 << 2);
+ udelay(5);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 1 << 3);
+ usleep_range(40, 50);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 1 << 19);
+ usleep_range(100, 120);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 1 << 18);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 7 << 4);
+
+ to_cnt = 10;
+ while (1) {
+ if (hdmi_readl(priv, HDMI_PHY_STATUS_REG) & 0x80)
+ break;
+ usleep_range(200, 250);
+ if (--to_cnt == 0) {
+ pr_warn("hdmi phy init timeout\n");
+ break;
+ }
+ }
+
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 0xf << 8);
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 1 << 7);
+
+ hdmi_writel(priv, HDMI_PHY_PLL_REG, 0x39dc5040);
+ hdmi_writel(priv, HDMI_PHY_CLK_REG, 0x80084343);
+ msleep(20);
+ hdmi_writel(priv, HDMI_PHY_34_REG, 0x00000001);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0x02000000);
+ msleep(100);
+ tmp = hdmi_readl(priv, HDMI_PHY_STATUS_REG);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0xc0000000);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, (tmp >> 11) & 0x3f);
+ hdmi_writel(priv, HDMI_PHY_CTRL_REG, 0x01ff0f7f);
+ hdmi_writel(priv, HDMI_PHY_24_REG, 0x80639000);
+ hdmi_writel(priv, HDMI_PHY_28_REG, 0x0f81c405);
+
+ hdmi_inner_init(priv);
+}
+
+static void hdmi_i2cm_write(struct de2_hdmi_priv *priv,
+ int addr, u8 valh, u8 vall)
+{
+ hdmi_writeb(priv, R_3021_HDMI_PHY_I2CM_ADDRESS_ADDR, addr);
+ hdmi_writeb(priv, R_3022_HDMI_PHY_I2CM_DATAO_1_ADDR, valh);
+ hdmi_writeb(priv, R_3023_HDMI_PHY_I2CM_DATAO_0_ADDR, vall);
+ hdmi_writeb(priv, R_3026_HDMI_PHY_I2CM_OPERATION_ADDR,
+ HDMI_PHY_I2CM_OPERATION_ADDR_WRITE);
+ usleep_range(2000, 2500);
+}
+
+static int get_divider(int rate)
+{
+ if (rate <= 27000)
+ return 11;
+ if (rate <= 74250)
+ return 4;
+ if (rate <= 148500)
+ return 2;
+ return 1;
+}
+
+static void hdmi_phy_set_a83t(struct de2_hdmi_priv *priv,
+ struct drm_display_mode *mode)
+{
+ switch (get_divider(mode->clock)) {
+ case 1:
+ hdmi_i2cm_write(priv, 0x06, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x15, 0x00, 0x0f);
+ hdmi_i2cm_write(priv, 0x10, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x19, 0x00, 0x02);
+ hdmi_i2cm_write(priv, 0x0e, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x09, 0x80, 0x2b);
+ break;
+ case 2: /* 1080P @ 60 & 50 */
+ hdmi_i2cm_write(priv, 0x06, 0x04, 0xa0);
+ hdmi_i2cm_write(priv, 0x15, 0x00, 0x0a);
+ hdmi_i2cm_write(priv, 0x10, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x19, 0x00, 0x02);
+ hdmi_i2cm_write(priv, 0x0e, 0x00, 0x21);
+ hdmi_i2cm_write(priv, 0x09, 0x80, 0x29);
+ break;
+ case 4: /* 720P @ 50 & 60, 1080I, 1080P */
+ hdmi_i2cm_write(priv, 0x06, 0x05, 0x40);
+ hdmi_i2cm_write(priv, 0x15, 0x00, 0x05);
+ hdmi_i2cm_write(priv, 0x10, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x19, 0x00, 0x07);
+ hdmi_i2cm_write(priv, 0x0e, 0x02, 0xb5);
+ hdmi_i2cm_write(priv, 0x09, 0x80, 0x09);
+ break;
+/* case 11: * 480P/576P */
+ default:
+ hdmi_i2cm_write(priv, 0x06, 0x01,
+ mode->flags & DRM_MODE_FLAG_DBLCLK ? 0xe3 : 0xe0);
+ hdmi_i2cm_write(priv, 0x15, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x10, 0x08, 0xda);
+ hdmi_i2cm_write(priv, 0x19, 0x00, 0x07);
+ hdmi_i2cm_write(priv, 0x0e, 0x03, 0x18);
+ hdmi_i2cm_write(priv, 0x09, 0x80, 0x09);
+ break;
+ }
+ hdmi_i2cm_write(priv, 0x1e, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x13, 0x00, 0x00);
+ hdmi_i2cm_write(priv, 0x17, 0x00, 0x00);
+ hdmi_writeb(priv, R_3000_HDMI_PHY_CONF0,
+ HDMI_PHY_CONF0_GEN2_TXPWRON |
+ HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE |
+ HDMI_PHY_CONF0_SELDATAENPOL);
+}
+
+static void hdmi_phy_set_h3(struct de2_hdmi_priv *priv,
+ struct drm_display_mode *mode)
+{
+ u32 tmp;
+
+ hdmi_andl(priv, HDMI_PHY_CTRL_REG, ~0xf000);
+
+ switch (get_divider(mode->clock)) {
+ case 1:
+ hdmi_writel(priv, HDMI_PHY_PLL_REG, 0x31dc5fc0);
+ hdmi_writel(priv, HDMI_PHY_CLK_REG, 0x800863c0);
+ msleep(20);
+ hdmi_writel(priv, HDMI_PHY_34_REG, 0x00000001);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0x02000000);
+ msleep(200);
+ tmp = (hdmi_readl(priv, HDMI_PHY_STATUS_REG) >> 11) & 0x3f;
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0xc0000000);
+ if (tmp < 0x3d)
+ tmp += 2;
+ else
+ tmp = 0x3f;
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, tmp);
+ msleep(100);
+ hdmi_writel(priv, HDMI_PHY_CTRL_REG, 0x01ffff7f);
+ hdmi_writel(priv, HDMI_PHY_24_REG, 0x8063b000);
+ hdmi_writel(priv, HDMI_PHY_28_REG, 0x0f8246b5);
+ break;
+ case 2: /* 1080P @ 60 & 50 */
+ hdmi_writel(priv, HDMI_PHY_PLL_REG, 0x39dc5040);
+ hdmi_writel(priv, HDMI_PHY_CLK_REG, 0x80084381);
+ msleep(20);
+ hdmi_writel(priv, HDMI_PHY_34_REG, 0x00000001);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0x02000000);
+ msleep(100);
+ tmp = (hdmi_readl(priv, HDMI_PHY_STATUS_REG) >> 11) & 0x3f;
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0xc0000000);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, tmp);
+ hdmi_writel(priv, HDMI_PHY_CTRL_REG, 0x01ffff7f);
+ hdmi_writel(priv, HDMI_PHY_24_REG, 0x8063a800);
+ hdmi_writel(priv, HDMI_PHY_28_REG, 0x0f81c485);
+ break;
+ case 4: /* 720P @ 50 & 60, 1080I, 1080P */
+ hdmi_writel(priv, HDMI_PHY_PLL_REG, 0x39dc5040);
+ hdmi_writel(priv, HDMI_PHY_CLK_REG, 0x80084343);
+ msleep(20);
+ hdmi_writel(priv, HDMI_PHY_34_REG, 0x00000001);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0x02000000);
+ msleep(100);
+ tmp = (hdmi_readl(priv, HDMI_PHY_STATUS_REG) >> 11) & 0x3f;
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0xc0000000);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, tmp);
+ hdmi_writel(priv, HDMI_PHY_CTRL_REG, 0x01ffff7f);
+ hdmi_writel(priv, HDMI_PHY_24_REG, 0x8063b000);
+ hdmi_writel(priv, HDMI_PHY_28_REG, 0x0f81c405);
+ break;
+ default:
+/* case 11: * 480P/576P */
+ hdmi_writel(priv, HDMI_PHY_PLL_REG, 0x39dc5040);
+ hdmi_writel(priv, HDMI_PHY_CLK_REG, 0x8008430a);
+ msleep(20);
+ hdmi_writel(priv, HDMI_PHY_34_REG, 0x00000001);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0x02000000);
+ msleep(100);
+ tmp = (hdmi_readl(priv, HDMI_PHY_STATUS_REG) >> 11) & 0x3f;
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, 0xc0000000);
+ hdmi_orl(priv, HDMI_PHY_PLL_REG, tmp);
+ hdmi_writel(priv, HDMI_PHY_CTRL_REG, 0x01ffff7f);
+ hdmi_writel(priv, HDMI_PHY_24_REG, 0x8063b000);
+ hdmi_writel(priv, HDMI_PHY_28_REG, 0x0f81c405);
+ break;
+ }
+}
+
+/* HDMI functions */
+
+void hdmi_io_init(struct de2_hdmi_priv *priv)
+{
+ if (priv->soc_type == SOC_H3)
+ hdmi_phy_init_h3(priv);
+ else
+ hdmi_phy_init_a83t(priv);
+
+ /* hpd reset */
+ hdmi_writeb(priv, R_5001_HDMI_A_HDCPCFG1,
+ HDMI_A_HDCPCFG1_PH2UPSHFTENC);
+ hdmi_writeb(priv, R_4001_HDMI_MC_CLKDIS,
+ HDMI_MC_CLKDIS_HDCPCLK_DISABLE);
+}
+
+void hdmi_io_video_on(struct de2_hdmi_priv *priv)
+{
+ if (priv->soc_type == SOC_H3)
+ hdmi_orl(priv, HDMI_PHY_CTRL_REG, 0x0f << 12);
+}
+
+void hdmi_io_video_off(struct de2_hdmi_priv *priv)
+{
+ if (priv->soc_type == SOC_H3)
+ hdmi_andl(priv, HDMI_PHY_CTRL_REG, ~(0x0f << 12));
+}
+
+/* video init */
+int hdmi_io_video_mode(struct de2_hdmi_priv *priv,
+ struct drm_display_mode *mode)
+{
+ int avi_d2; /* AVI InfoFrame Data Byte 2 */
+ int h_blank, v_blank, h_sync_w, h_front_p;
+ int invidconf;
+
+ /* colorimetry and aspect ratio */
+ switch (priv->cea_mode) {
+ case VIC_720x480_60:
+ case VIC_720x480i_60:
+ case VIC_720x576_50:
+ case VIC_720x576i_50:
+ avi_d2 = (HDMI_COLORIMETRY_ITU_601 << 6) |
+ (HDMI_PICTURE_ASPECT_4_3 << 4) | 0x08;
+ break;
+ default:
+ avi_d2 = (HDMI_COLORIMETRY_ITU_709 << 6) |
+ (HDMI_PICTURE_ASPECT_16_9 << 4) | 0x08;
+ break;
+ }
+
+ h_blank = mode->htotal - mode->hdisplay;
+ v_blank = mode->vtotal - mode->vdisplay;
+ h_sync_w = mode->hsync_end - mode->hsync_start;
+ h_front_p = mode->hsync_start - mode->hdisplay;
+
+ invidconf = 0;
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+ invidconf |= 0x01;
+ if (mode->flags & DRM_MODE_FLAG_PHSYNC)
+ invidconf |= 0x20;
+ if (mode->flags & DRM_MODE_FLAG_PVSYNC)
+ invidconf |= 0x40;
+
+ if (priv->soc_type == SOC_H3) {
+ hdmi_phy_set_h3(priv, mode);
+ hdmi_inner_init(priv);
+ } else {
+ hdmi_io_init(priv);
+ }
+
+ hdmi_writeb(priv, R_1200_HDMI_FC_DBGFORCE,
+ HDMI_FC_DBGFORCE_FORCEVIDEO);
+ hdmi_writeb(priv, R_1219_HDMI_FC_DBGTMDS0, 0x00);
+ hdmi_writeb(priv, R_1000_HDMI_FC_INVIDCONF,
+ invidconf |
+ HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH);
+ hdmi_writeb(priv, 0x10001,
+ invidconf < 0x60 ? 0x03 : 0x00);
+ hdmi_writeb(priv, R_1002_HDMI_FC_INHACTV1,
+ mode->hdisplay >> 8);
+ hdmi_writeb(priv, R_100d_HDMI_FC_VSYNCINWIDTH,
+ mode->vsync_end - mode->vsync_start);
+ hdmi_writeb(priv, R_1006_HDMI_FC_INVACTV1,
+ mode->vdisplay >> 8);
+ hdmi_writeb(priv, R_1004_HDMI_FC_INHBLANK1,
+ h_blank >> 8);
+ hdmi_writeb(priv, R_100c_HDMI_FC_VSYNCINDELAY,
+ mode->vsync_start - mode->vdisplay);
+ hdmi_writeb(priv, R_1009_HDMI_FC_HSYNCINDELAY1,
+ h_front_p >> 8);
+ hdmi_writeb(priv, R_100b_HDMI_FC_HSYNCINWIDTH1,
+ h_sync_w >> 8);
+ hdmi_writeb(priv, R_1001_HDMI_FC_INHACTV0,
+ mode->hdisplay);
+ hdmi_writeb(priv, R_1003_HDMI_FC_INHBLANK0,
+ h_blank);
+ hdmi_writeb(priv, R_1008_HDMI_FC_HSYNCINDELAY0,
+ h_front_p);
+ hdmi_writeb(priv, R_100a_HDMI_FC_HSYNCINWIDTH0,
+ h_sync_w);
+ hdmi_writeb(priv, R_1005_HDMI_FC_INVACTV0,
+ mode->vdisplay);
+ hdmi_writeb(priv, R_1007_HDMI_FC_INVBLANK,
+ v_blank);
+ hdmi_writeb(priv, R_1011_HDMI_FC_CTRLDUR, 12);
+ hdmi_writeb(priv, R_1012_HDMI_FC_EXCTRLDUR, 32);
+ hdmi_writeb(priv, R_1013_HDMI_FC_EXCTRLSPAC, 1);
+ hdmi_writeb(priv, R_1014_HDMI_FC_CH0PREAM, 0x0b);
+ hdmi_writeb(priv, R_1015_HDMI_FC_CH1PREAM, 0x16);
+ hdmi_writeb(priv, R_1016_HDMI_FC_CH2PREAM, 0x21);
+ hdmi_writeb(priv, R_10e0_HDMI_FC_PRCONF,
+ mode->flags & DRM_MODE_FLAG_DBLCLK ? 0x21 : 0x10);
+ hdmi_writeb(priv, R_0801_HDMI_VP_PR_CD,
+ mode->flags & DRM_MODE_FLAG_DBLCLK ? 0x41 : 0x40);
+ hdmi_writeb(priv, R_0802_HDMI_VP_STUFF, 0x07);
+ hdmi_writeb(priv, R_0803_HDMI_VP_REMAP, 0x00);
+ hdmi_writeb(priv, R_0804_HDMI_VP_CONF, 0x47);
+ hdmi_writeb(priv, R_0200_HDMI_TX_INVID0, 0x01);
+ hdmi_writeb(priv, R_0201_HDMI_TX_INSTUFFING, 0x07);
+ hdmi_writeb(priv, R_0202_HDMI_TX_GYDATA0, 0x00);
+ hdmi_writeb(priv, R_0203_HDMI_TX_GYDATA1, 0x00);
+ hdmi_writeb(priv, R_0204_HDMI_TX_RCRDATA0, 0x00);
+ hdmi_writeb(priv, R_0205_HDMI_TX_RCRDATA1, 0x00);
+ hdmi_writeb(priv, R_0206_HDMI_TX_BCBDATA0, 0x00);
+ hdmi_writeb(priv, R_0207_HDMI_TX_BCBDATA1, 0x00);
+
+ if (priv->connector.eld[0]) { /* if audio/HDMI */
+ hdmi_writeb(priv, R_10b3_HDMI_FC_DATAUTO0, 0x08);
+ hdmi_writeb(priv, R_1031_HDMI_FC_VSDIEEEID2, 0x00);
+ hdmi_writeb(priv, R_1030_HDMI_FC_VSDIEEEID1,
+ HDMI_IEEE_OUI >> 8);
+ hdmi_writeb(priv, R_1029_HDMI_FC_VSDIEEEID0,
+ HDMI_IEEE_OUI & 0xff);
+ hdmi_writeb(priv, R_1032_HDMI_FC_VSDPAYLOAD0, 0x00);
+ hdmi_writeb(priv, R_1033_HDMI_FC_VSDPAYLOAD1, 0x00);
+ hdmi_writeb(priv, R_1034_HDMI_FC_VSDPAYLOAD2, 0x00);
+ hdmi_writeb(priv, R_10b4_HDMI_FC_DATAUTO1, 0x01);
+ hdmi_writeb(priv, R_10b5_HDMI_FC_DATAUTO2, 0x11);
+ hdmi_writeb(priv, R_1018_HDMI_FC_GCP, 0x00);
+ hdmi_writeb(priv, R_1104_HDMI_FC_GMD_HB, 0x00);
+ hdmi_writeb(priv, R_1103_HDMI_FC_GMD_CONF, 0x11);
+
+ hdmi_lock_read(priv);
+ hdmi_orb(priv, R_1000_HDMI_FC_INVIDCONF, 0x08);
+ hdmi_unlock_read(priv);
+
+ /* AVI */
+ hdmi_writeb(priv, R_1019_HDMI_FC_AVICONF0,
+ HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN);
+ hdmi_writeb(priv, R_101a_HDMI_FC_AVICONF1, avi_d2);
+
+ hdmi_writeb(priv, R_101b_HDMI_FC_AVICONF2, 0x08);
+ hdmi_writeb(priv, R_101c_HDMI_FC_AVIVID, priv->cea_mode);
+ }
+
+ hdmi_writeb(priv, R_4004_HDMI_MC_FLOWCTRL, 0x00);
+ hdmi_writeb(priv, R_4001_HDMI_MC_CLKDIS, 0x00); /* enable all clocks */
+
+ if (priv->soc_type != SOC_H3)
+ hdmi_phy_set_a83t(priv, mode);
+
+ hdmi_writeb(priv, R_1200_HDMI_FC_DBGFORCE, 0x00);
+
+ return 0;
+}
+
+/* get a block of EDID */
+int hdmi_io_ddc_read(struct de2_hdmi_priv *priv,
+ char pointer, char off,
+ int nbyte, char *pbuf)
+{
+ unsigned int to_cnt;
+ u8 reg;
+ int ret = 0;
+
+ hdmi_lock_read(priv);
+ hdmi_writeb(priv, R_7e09_HDMI_I2CM_SOFTRSTZ, 0x00);
+ to_cnt = 50;
+ while (!(hdmi_readb(priv, R_7e09_HDMI_I2CM_SOFTRSTZ) & 0x01)) {
+ udelay(10);
+ if (--to_cnt == 0) { /* wait for 500us for timeout */
+ pr_warn("hdmi ddc reset timeout\n");
+ break;
+ }
+ }
+
+ hdmi_writeb(priv, R_7e07_HDMI_I2CM_DIV, 0x05);
+ hdmi_writeb(priv, R_7e05_HDMI_I2CM_INT, 0x08);
+ hdmi_writeb(priv, R_7e0c_HDMI_I2CM_SS_SCL_HCNT_0_ADDR, 0xd8);
+ hdmi_writeb(priv, R_7e0e_HDMI_I2CM_SS_SCL_LCNT_0_ADDR, 0xfe);
+
+ while (nbyte > 0) {
+ hdmi_writeb(priv, R_7e00_HDMI_I2CM_SLAVE, 0xa0 >> 1);
+ hdmi_writeb(priv, R_7e01_HDMI_I2CM_ADDRESS, off);
+ hdmi_writeb(priv, R_7e08_HDMI_I2CM_SEGADDR, 0x60 >> 1);
+ hdmi_writeb(priv, R_7e0a_HDMI_I2CM_SEGPTR, pointer);
+ hdmi_writeb(priv, R_7e04_HDMI_I2CM_OPERATION,
+ HDMI_I2CM_OPERATION_DDC_READ);
+
+ to_cnt = 200; /* timeout 100ms */
+ while (1) {
+ reg = hdmi_readb(priv, R_0105_HDMI_IH_I2CM_STAT0);
+ hdmi_writeb(priv, R_0105_HDMI_IH_I2CM_STAT0, reg);
+ if (reg & 0x02) {
+ *pbuf++ = hdmi_readb(priv,
+ R_7e03_HDMI_I2CM_DATAI);
+ break;
+ }
+ if (reg & 0x01) {
+ pr_warn("hdmi ddc read error\n");
+ ret = -1;
+ break;
+ }
+ if (--to_cnt == 0) {
+ if (!ret) {
+ pr_warn("hdmi ddc read timeout\n");
+ ret = -1;
+ }
+ break;
+ }
+ usleep_range(500, 800);
+ }
+ if (ret)
+ break;
+ nbyte--;
+ off++;
+ }
+ hdmi_unlock_read(priv);
+
+ return ret;
+}
+
+int hdmi_io_get_hpd(struct de2_hdmi_priv *priv)
+{
+ int ret;
+
+ hdmi_lock_read(priv);
+
+ if (priv->soc_type == SOC_H3)
+ ret = hdmi_readl(priv, HDMI_PHY_STATUS_REG) & 0x80000;
+ else
+ ret = hdmi_readb(priv, R_3005_HDMI_PHY_INT0) & 0x02;
+
+ hdmi_unlock_read(priv);
+
+ return ret != 0;
+}
+
+int hdmi_io_mode_valid(int cea_mode)
+{
+ /* check the known working resolutions */
+ switch (cea_mode) {
+ case VIC_720x480_60:
+ case VIC_1280x720_60:
+ case VIC_1920x1080i_60:
+ case VIC_720x480i_60:
+ case VIC_1920x1080_60:
+ case VIC_720x576_50:
+ case VIC_1280x720_50:
+ case VIC_1920x1080i_50:
+ case VIC_720x576i_50:
+ case VIC_1920x1080_50:
+ case VIC_1920x1080_24:
+ case VIC_1920x1080_25:
+ case VIC_1920x1080_30:
+ return 1;
+ }
+ return -1;
+}
--
2.10.2
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