* [PATCH 3/3] pinctrl: sx150x: add support for sx1501, sx1504, sx1505 and sx1507
From: Peter Rosin @ 2016-11-24 20:45 UTC (permalink / raw)
To: linux-kernel
Cc: Peter Rosin, Linus Walleij, Rob Herring, Mark Rutland,
Andrey Smirnov, Neil Armstrong, linux-gpio, devicetree
In-Reply-To: <1480020320-28354-1-git-send-email-peda@axentia.se>
Untested, register offsets carefully copied from datasheets.
Signed-off-by: Peter Rosin <peda@axentia.se>
---
.../devicetree/bindings/pinctrl/pinctrl-sx150x.txt | 8 +-
drivers/pinctrl/pinctrl-sx150x.c | 98 ++++++++++++++++++++++
2 files changed, 104 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt
index 83f8d5c449ba..bf76867168e9 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt
@@ -6,9 +6,13 @@ pin controller, GPIO, and interrupt bindings.
Required properties:
- compatible: should be one of :
+ "semtech,sx1501q",
"semtech,sx1502q",
"semtech,sx1503q",
+ "semtech,sx1504q",
+ "semtech,sx1505q",
"semtech,sx1506q",
+ "semtech,sx1507q",
"semtech,sx1508q",
"semtech,sx1509q".
@@ -28,7 +32,7 @@ Optional properties :
- interrupt-controller: Marks the device as a interrupt controller.
- semtech,probe-reset: Will trigger a reset of the GPIO expander on probe,
- only for sx1508q and sx1509q
+ only for sx1507q, sx1508q and sx1509q
The GPIO expander can optionally be used as an interrupt controller, in
which case it uses the default two cell specifier.
@@ -43,7 +47,7 @@ Optional properties for pin configuration sub-nodes:
- bias-pull-down: pull down the pin, except the OSCIO pin
- bias-pull-pin-default: use pin-default pull state, except the OSCIO pin
- drive-push-pull: drive actively high and low
- - drive-open-drain: drive with open drain only for sx1508q and sx1509q and except the OSCIO pin
+ - drive-open-drain: drive with open drain only for sx1507q, sx1508q and sx1509q and except the OSCIO pin
- output-low: set the pin to output mode with low level
- output-high: set the pin to output mode with high level
diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c
index 97df9302e84b..eb6adbbd33f0 100644
--- a/drivers/pinctrl/pinctrl-sx150x.c
+++ b/drivers/pinctrl/pinctrl-sx150x.c
@@ -116,6 +116,14 @@ struct sx150x_pinctrl {
const struct sx150x_device_data *data;
};
+static const struct pinctrl_pin_desc sx150x_4_pins[] = {
+ PINCTRL_PIN(0, "gpio0"),
+ PINCTRL_PIN(1, "gpio1"),
+ PINCTRL_PIN(2, "gpio2"),
+ PINCTRL_PIN(3, "gpio3"),
+ PINCTRL_PIN(8, "oscio"),
+};
+
static const struct pinctrl_pin_desc sx150x_8_pins[] = {
PINCTRL_PIN(0, "gpio0"),
PINCTRL_PIN(1, "gpio1"),
@@ -148,6 +156,26 @@ static const struct pinctrl_pin_desc sx150x_16_pins[] = {
PINCTRL_PIN(16, "oscio"),
};
+static const struct sx150x_device_data sx1501q_device_data = {
+ .model = SX150X_123,
+ .reg_pullup = 0x02,
+ .reg_pulldn = 0x03,
+ .reg_dir = 0x01,
+ .reg_data = 0x00,
+ .reg_irq_mask = 0x05,
+ .reg_irq_src = 0x08,
+ .reg_sense = 0x07,
+ .pri.x123 = {
+ .reg_pld_mode = 0x10,
+ .reg_pld_table0 = 0x11,
+ .reg_pld_table2 = 0x13,
+ .reg_advance = 0xad,
+ },
+ .ngpios = 4,
+ .pins = sx150x_4_pins,
+ .npins = 4, /* oscio not available */
+};
+
static const struct sx150x_device_data sx1502q_device_data = {
.model = SX150X_123,
.reg_pullup = 0x02,
@@ -194,6 +222,47 @@ static const struct sx150x_device_data sx1503q_device_data = {
.npins = 16, /* oscio not available */
};
+static const struct sx150x_device_data sx1504q_device_data = {
+ .model = SX150X_456,
+ .reg_pullup = 0x02,
+ .reg_pulldn = 0x03,
+ .reg_dir = 0x01,
+ .reg_data = 0x00,
+ .reg_irq_mask = 0x05,
+ .reg_irq_src = 0x08,
+ .reg_sense = 0x07,
+ .pri.x456 = {
+ .reg_pld_mode = 0x10,
+ .reg_pld_table0 = 0x11,
+ .reg_pld_table2 = 0x13,
+ },
+ .ngpios = 4,
+ .pins = sx150x_4_pins,
+ .npins = 4, /* oscio not available */
+};
+
+static const struct sx150x_device_data sx1505q_device_data = {
+ .model = SX150X_456,
+ .reg_pullup = 0x02,
+ .reg_pulldn = 0x03,
+ .reg_dir = 0x01,
+ .reg_data = 0x00,
+ .reg_irq_mask = 0x05,
+ .reg_irq_src = 0x08,
+ .reg_sense = 0x06,
+ .pri.x456 = {
+ .reg_pld_mode = 0x10,
+ .reg_pld_table0 = 0x11,
+ .reg_pld_table1 = 0x12,
+ .reg_pld_table2 = 0x13,
+ .reg_pld_table3 = 0x14,
+ .reg_pld_table4 = 0x15,
+ },
+ .ngpios = 8,
+ .pins = sx150x_8_pins,
+ .npins = 8, /* oscio not available */
+};
+
static const struct sx150x_device_data sx1506q_device_data = {
.model = SX150X_456,
.reg_pullup = 0x04,
@@ -217,6 +286,27 @@ static const struct sx150x_device_data sx1506q_device_data = {
.npins = 16, /* oscio not available */
};
+static const struct sx150x_device_data sx1507q_device_data = {
+ .model = SX150X_789,
+ .reg_pullup = 0x03,
+ .reg_pulldn = 0x04,
+ .reg_dir = 0x07,
+ .reg_data = 0x08,
+ .reg_irq_mask = 0x09,
+ .reg_irq_src = 0x0b,
+ .reg_sense = 0x0a,
+ .pri.x789 = {
+ .reg_drain = 0x05,
+ .reg_polarity = 0x06,
+ .reg_clock = 0x0d,
+ .reg_misc = 0x0e,
+ .reg_reset = 0x7d,
+ },
+ .ngpios = 4,
+ .pins = sx150x_4_pins,
+ .npins = ARRAY_SIZE(sx150x_4_pins),
+};
+
static const struct sx150x_device_data sx1508q_device_data = {
.model = SX150X_789,
.reg_pullup = 0x03,
@@ -758,18 +848,26 @@ static const struct pinconf_ops sx150x_pinconf_ops = {
};
static const struct i2c_device_id sx150x_id[] = {
+ {"sx1501q", (kernel_ulong_t) &sx1501q_device_data },
{"sx1502q", (kernel_ulong_t) &sx1502q_device_data },
{"sx1503q", (kernel_ulong_t) &sx1503q_device_data },
+ {"sx1504q", (kernel_ulong_t) &sx1504q_device_data },
+ {"sx1505q", (kernel_ulong_t) &sx1505q_device_data },
{"sx1506q", (kernel_ulong_t) &sx1506q_device_data },
+ {"sx1507q", (kernel_ulong_t) &sx1507q_device_data },
{"sx1508q", (kernel_ulong_t) &sx1508q_device_data },
{"sx1509q", (kernel_ulong_t) &sx1509q_device_data },
{}
};
static const struct of_device_id sx150x_of_match[] = {
+ { .compatible = "semtech,sx1501q", .data = &sx1501q_device_data },
{ .compatible = "semtech,sx1502q", .data = &sx1502q_device_data },
{ .compatible = "semtech,sx1503q", .data = &sx1503q_device_data },
+ { .compatible = "semtech,sx1504q", .data = &sx1504q_device_data },
+ { .compatible = "semtech,sx1505q", .data = &sx1505q_device_data },
{ .compatible = "semtech,sx1506q", .data = &sx1506q_device_data },
+ { .compatible = "semtech,sx1507q", .data = &sx1507q_device_data },
{ .compatible = "semtech,sx1508q", .data = &sx1508q_device_data },
{ .compatible = "semtech,sx1509q", .data = &sx1509q_device_data },
{},
--
2.1.4
^ permalink raw reply related
* [PATCH 2/3] pinctrl: sx150x: sort chips by part number
From: Peter Rosin @ 2016-11-24 20:45 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Peter Rosin, Linus Walleij, Rob Herring, Mark Rutland,
Andrey Smirnov, Neil Armstrong, linux-gpio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1480020320-28354-1-git-send-email-peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
Signed-off-by: Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
---
.../devicetree/bindings/pinctrl/pinctrl-sx150x.txt | 6 +-
drivers/pinctrl/pinctrl-sx150x.c | 142 ++++++++++-----------
2 files changed, 74 insertions(+), 74 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt
index 25b4ec80c759..83f8d5c449ba 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt
@@ -6,11 +6,11 @@ pin controller, GPIO, and interrupt bindings.
Required properties:
- compatible: should be one of :
+ "semtech,sx1502q",
+ "semtech,sx1503q",
"semtech,sx1506q",
"semtech,sx1508q",
- "semtech,sx1509q",
- "semtech,sx1502q",
- "semtech,sx1503q".
+ "semtech,sx1509q".
- reg: The I2C slave address for this device.
diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c
index a19c814843aa..97df9302e84b 100644
--- a/drivers/pinctrl/pinctrl-sx150x.c
+++ b/drivers/pinctrl/pinctrl-sx150x.c
@@ -148,71 +148,6 @@ static const struct pinctrl_pin_desc sx150x_16_pins[] = {
PINCTRL_PIN(16, "oscio"),
};
-static const struct sx150x_device_data sx1508q_device_data = {
- .model = SX150X_789,
- .reg_pullup = 0x03,
- .reg_pulldn = 0x04,
- .reg_dir = 0x07,
- .reg_data = 0x08,
- .reg_irq_mask = 0x09,
- .reg_irq_src = 0x0c,
- .reg_sense = 0x0a,
- .pri.x789 = {
- .reg_drain = 0x05,
- .reg_polarity = 0x06,
- .reg_clock = 0x0f,
- .reg_misc = 0x10,
- .reg_reset = 0x7d,
- },
- .ngpios = 8,
- .pins = sx150x_8_pins,
- .npins = ARRAY_SIZE(sx150x_8_pins),
-};
-
-static const struct sx150x_device_data sx1509q_device_data = {
- .model = SX150X_789,
- .reg_pullup = 0x06,
- .reg_pulldn = 0x08,
- .reg_dir = 0x0e,
- .reg_data = 0x10,
- .reg_irq_mask = 0x12,
- .reg_irq_src = 0x18,
- .reg_sense = 0x14,
- .pri.x789 = {
- .reg_drain = 0x0a,
- .reg_polarity = 0x0c,
- .reg_clock = 0x1e,
- .reg_misc = 0x1f,
- .reg_reset = 0x7d,
- },
- .ngpios = 16,
- .pins = sx150x_16_pins,
- .npins = ARRAY_SIZE(sx150x_16_pins),
-};
-
-static const struct sx150x_device_data sx1506q_device_data = {
- .model = SX150X_456,
- .reg_pullup = 0x04,
- .reg_pulldn = 0x06,
- .reg_dir = 0x02,
- .reg_data = 0x00,
- .reg_irq_mask = 0x08,
- .reg_irq_src = 0x0e,
- .reg_sense = 0x0a,
- .pri.x456 = {
- .reg_pld_mode = 0x20,
- .reg_pld_table0 = 0x22,
- .reg_pld_table1 = 0x24,
- .reg_pld_table2 = 0x26,
- .reg_pld_table3 = 0x28,
- .reg_pld_table4 = 0x2a,
- .reg_advance = 0xad,
- },
- .ngpios = 16,
- .pins = sx150x_16_pins,
- .npins = 16, /* oscio not available */
-};
-
static const struct sx150x_device_data sx1502q_device_data = {
.model = SX150X_123,
.reg_pullup = 0x02,
@@ -259,6 +194,71 @@ static const struct sx150x_device_data sx1503q_device_data = {
.npins = 16, /* oscio not available */
};
+static const struct sx150x_device_data sx1506q_device_data = {
+ .model = SX150X_456,
+ .reg_pullup = 0x04,
+ .reg_pulldn = 0x06,
+ .reg_dir = 0x02,
+ .reg_data = 0x00,
+ .reg_irq_mask = 0x08,
+ .reg_irq_src = 0x0e,
+ .reg_sense = 0x0a,
+ .pri.x456 = {
+ .reg_pld_mode = 0x20,
+ .reg_pld_table0 = 0x22,
+ .reg_pld_table1 = 0x24,
+ .reg_pld_table2 = 0x26,
+ .reg_pld_table3 = 0x28,
+ .reg_pld_table4 = 0x2a,
+ .reg_advance = 0xad,
+ },
+ .ngpios = 16,
+ .pins = sx150x_16_pins,
+ .npins = 16, /* oscio not available */
+};
+
+static const struct sx150x_device_data sx1508q_device_data = {
+ .model = SX150X_789,
+ .reg_pullup = 0x03,
+ .reg_pulldn = 0x04,
+ .reg_dir = 0x07,
+ .reg_data = 0x08,
+ .reg_irq_mask = 0x09,
+ .reg_irq_src = 0x0c,
+ .reg_sense = 0x0a,
+ .pri.x789 = {
+ .reg_drain = 0x05,
+ .reg_polarity = 0x06,
+ .reg_clock = 0x0f,
+ .reg_misc = 0x10,
+ .reg_reset = 0x7d,
+ },
+ .ngpios = 8,
+ .pins = sx150x_8_pins,
+ .npins = ARRAY_SIZE(sx150x_8_pins),
+};
+
+static const struct sx150x_device_data sx1509q_device_data = {
+ .model = SX150X_789,
+ .reg_pullup = 0x06,
+ .reg_pulldn = 0x08,
+ .reg_dir = 0x0e,
+ .reg_data = 0x10,
+ .reg_irq_mask = 0x12,
+ .reg_irq_src = 0x18,
+ .reg_sense = 0x14,
+ .pri.x789 = {
+ .reg_drain = 0x0a,
+ .reg_polarity = 0x0c,
+ .reg_clock = 0x1e,
+ .reg_misc = 0x1f,
+ .reg_reset = 0x7d,
+ },
+ .ngpios = 16,
+ .pins = sx150x_16_pins,
+ .npins = ARRAY_SIZE(sx150x_16_pins),
+};
+
static int sx150x_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
{
return 0;
@@ -758,20 +758,20 @@ static const struct pinconf_ops sx150x_pinconf_ops = {
};
static const struct i2c_device_id sx150x_id[] = {
- {"sx1508q", (kernel_ulong_t) &sx1508q_device_data },
- {"sx1509q", (kernel_ulong_t) &sx1509q_device_data },
- {"sx1506q", (kernel_ulong_t) &sx1506q_device_data },
{"sx1502q", (kernel_ulong_t) &sx1502q_device_data },
{"sx1503q", (kernel_ulong_t) &sx1503q_device_data },
+ {"sx1506q", (kernel_ulong_t) &sx1506q_device_data },
+ {"sx1508q", (kernel_ulong_t) &sx1508q_device_data },
+ {"sx1509q", (kernel_ulong_t) &sx1509q_device_data },
{}
};
static const struct of_device_id sx150x_of_match[] = {
- { .compatible = "semtech,sx1508q", .data = &sx1508q_device_data },
- { .compatible = "semtech,sx1509q", .data = &sx1509q_device_data },
- { .compatible = "semtech,sx1506q", .data = &sx1506q_device_data },
{ .compatible = "semtech,sx1502q", .data = &sx1502q_device_data },
{ .compatible = "semtech,sx1503q", .data = &sx1503q_device_data },
+ { .compatible = "semtech,sx1506q", .data = &sx1506q_device_data },
+ { .compatible = "semtech,sx1508q", .data = &sx1508q_device_data },
+ { .compatible = "semtech,sx1509q", .data = &sx1509q_device_data },
{},
};
--
2.1.4
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^ permalink raw reply related
* [PATCH 1/3] pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)
From: Peter Rosin @ 2016-11-24 20:45 UTC (permalink / raw)
To: linux-kernel
Cc: Peter Rosin, Linus Walleij, Rob Herring, Mark Rutland,
Andrey Smirnov, Neil Armstrong, linux-gpio, devicetree
In-Reply-To: <1480020320-28354-1-git-send-email-peda@axentia.se>
All other registers on these chips are 8-bit, but reg_sense is 16-bits
and therefore needs to be moved down one notch.
This was apparently overlooked in the conversion to regmap, which only
updated the register locations for the 16-bit chips.
Fixes: 6489677f86c3 ("pinctrl-sx150x: Replace sx150x_*_cfg by means of regmap API")
Signed-off-by: Peter Rosin <peda@axentia.se>
---
drivers/pinctrl/pinctrl-sx150x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c
index f9e559e22537..a19c814843aa 100644
--- a/drivers/pinctrl/pinctrl-sx150x.c
+++ b/drivers/pinctrl/pinctrl-sx150x.c
@@ -156,7 +156,7 @@ static const struct sx150x_device_data sx1508q_device_data = {
.reg_data = 0x08,
.reg_irq_mask = 0x09,
.reg_irq_src = 0x0c,
- .reg_sense = 0x0b,
+ .reg_sense = 0x0a,
.pri.x789 = {
.reg_drain = 0x05,
.reg_polarity = 0x06,
@@ -221,7 +221,7 @@ static const struct sx150x_device_data sx1502q_device_data = {
.reg_data = 0x00,
.reg_irq_mask = 0x05,
.reg_irq_src = 0x08,
- .reg_sense = 0x07,
+ .reg_sense = 0x06,
.pri.x123 = {
.reg_pld_mode = 0x10,
.reg_pld_table0 = 0x11,
--
2.1.4
^ permalink raw reply related
* [PATCH 0/3] sx150x update - bugfix, cleanup, last 4 chips
From: Peter Rosin @ 2016-11-24 20:45 UTC (permalink / raw)
To: linux-kernel
Cc: Peter Rosin, Linus Walleij, Rob Herring, Mark Rutland,
Andrey Smirnov, Neil Armstrong, linux-gpio, devicetree
Hi!
Yet another sx150x update, only the first is critical.
Cheers,
Peter
Peter Rosin (3):
pinctrl: sx150x: use correct registers for reg_sense (sx1502 and
sx1508)
pinctrl: sx150x: sort chips by part number
pinctrl: sx150x: add support for sx1501, sx1504, sx1505 and sx1507
.../devicetree/bindings/pinctrl/pinctrl-sx150x.txt | 14 +-
drivers/pinctrl/pinctrl-sx150x.c | 206 +++++++++++++++------
2 files changed, 161 insertions(+), 59 deletions(-)
--
2.1.4
^ permalink raw reply
* Re: [RFC PATCH 2/5] dmaengine: allow sun6i-dma for more SoCs
From: Maxime Ripard @ 2016-11-24 20:44 UTC (permalink / raw)
To: Andre Przywara
Cc: Chen-Yu Tsai, Icenowy Zheng, linux-sunxi, linux-arm-kernel,
Mark Rutland, Rob Herring, devicetree
In-Reply-To: <606230fd-37f6-e1ed-adc3-72f606fa944c-5wv7dgnIgG8@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 2824 bytes --]
On Thu, Nov 24, 2016 at 11:15:42AM +0000, Andre Przywara wrote:
> On 24/11/16 10:55, Maxime Ripard wrote:
> > On Thu, Nov 24, 2016 at 05:30:45PM +0800, Chen-Yu Tsai wrote:
> >> On Thu, Nov 24, 2016 at 5:16 PM, Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org> wrote:
> >>> Hi,
> >>>
> >>> On 24/11/16 04:16, Chen-Yu Tsai wrote:
> >>>> Hi,
> >>>>
> >>>> On Thu, Nov 24, 2016 at 9:17 AM, Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org> wrote:
> >>>>> The sun6i DMA driver is used in the Allwinner A64 and H5 SoC, which
> >>>>> have arm64 capable cores. Add the generic sunxi config symbol to allow
> >>>>> the driver to be selected by arm64 Kconfigs, which don't feature
> >>>>> SoC specific MACH_xxxx configs.
> >>>>>
> >>>>> Signed-off-by: Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>
> >>>>> ---
> >>>>> drivers/dma/Kconfig | 2 +-
> >>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>>>>
> >>>>> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> >>>>> index af63a6b..003c284 100644
> >>>>> --- a/drivers/dma/Kconfig
> >>>>> +++ b/drivers/dma/Kconfig
> >>>>> @@ -157,7 +157,7 @@ config DMA_SUN4I
> >>>>>
> >>>>> config DMA_SUN6I
> >>>>> tristate "Allwinner A31 SoCs DMA support"
> >>>>> - depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST
> >>>>> + depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST || ARCH_SUNXI
> >>>>
> >>>> AFAIK ARCH_SUNXI encompasses/supersedes MACH_SUN*I.
> >>>> (And I don't have to add MACH_SUN9I later :) )
> >>>
> >>> Sure, admittedly it was just a quick hack to get things going.
> >>> Actually I don't know why we had a *depend* on those MACH_s before. I
> >>> think technically it does not depend on a certain SoC (having the
> >>> COMPILE_TEST in there hints on that). So what about:
> >>
> >> It was really because this DMA engine only comes with the later
> >> SoCs. We have dma-sun4i for the older one.
> >
> > Indeed.
> >
> >> But yes, there's no reason why you can't build it for the earlier
> >> SoC. It just doesn't get used.
> >
> > I'm still in favor of keeping the depends on. There's no point of
> > compiling something we know have zero chance of running.
> >
> > (But that would be (ARCH_SUNXI && ARM64))
>
> I am OK with that, just wondering if there is a definition of what
> "depends" really means. My impression what that it's a about code
> dependencies (requires a certain subsystem, for instance), not really if
> it's useful in a particular configuration.
My understanding is that it's a hard dependency that prevents
configuration that make no sense, ie being able to compile a driver
that has no chance of being useful in the system, or a driver missing
its framework of choice.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH v3 2/6] iio: adc: Add support for STM32 ADC core
From: Jonathan Cameron @ 2016-11-24 20:40 UTC (permalink / raw)
To: Fabrice Gasnier, linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: linux-I+IVW8TIWO2tmTQ+vhA3Yw, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w,
alexandre.torgue-qxv4g6HH51o, lars-Qo5EllUWu/uELgA04lAiVw,
knaack.h-Mmb7MZpHnFY, pmeerw-jW+XmwGofnusTnJN9+BGXg
In-Reply-To: <3775e118-ec41-8b09-6be3-6bde579f046d-qxv4g6HH51o@public.gmane.org>
On 21/11/16 08:54, Fabrice Gasnier wrote:
> On 11/19/2016 01:17 PM, Jonathan Cameron wrote:
>> On 15/11/16 15:30, Fabrice Gasnier wrote:
>>> Add core driver for STMicroelectronics STM32 ADC (Analog to Digital
>>> Converter). STM32 ADC can be composed of up to 3 ADCs with shared
>>> resources like clock prescaler, common interrupt line and analog
>>> reference voltage.
>>> This core driver basically manages shared resources.
>>>
>>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>
>> There is nothing in here that demands selecting a fixed regulator.
>> I've also switched the select regulator over to depends on inline with
>> other drivers in IIO that have a hard dependency on regulators.
>> Other than that which showed up during build tests, looks good to me.
>> Shout if I've broken anything with this change.
>
> Hi Jonathan, All,
>
> First many thanks.
> This is not a big deal. Only thing is: I think patch 4 of this series (on stm32_defconfig) need to be updated
> to accommodate this change. E.g. :
> +CONFIG_REGULATOR=y
> +CONFIG_REGULATOR_FIXED_VOLTAGE=y
>
> Shall I send a new version of this series (all patches), including your changes, with updated defconfig as well ?
> Or only updated patch on defconfig is enough ?
Just update those that haven't already been applied.
Thanks,
Jonathan
>
> Please advise,
> Fabrice
>>
>> Applied to the togreg branch of iio.git and pushed out as testing for
>> the autobuilders to play with it.
>>
>> Thanks,
>>
>> Jonathan
>>> ---
>>> drivers/iio/adc/Kconfig | 13 ++
>>> drivers/iio/adc/Makefile | 1 +
>>> drivers/iio/adc/stm32-adc-core.c | 303 +++++++++++++++++++++++++++++++++++++++
>>> drivers/iio/adc/stm32-adc-core.h | 52 +++++++
>>> 4 files changed, 369 insertions(+)
>>> create mode 100644 drivers/iio/adc/stm32-adc-core.c
>>> create mode 100644 drivers/iio/adc/stm32-adc-core.h
>>>
>>> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
>>> index 7edcf32..ff30239 100644
>>> --- a/drivers/iio/adc/Kconfig
>>> +++ b/drivers/iio/adc/Kconfig
>>> @@ -419,6 +419,19 @@ config ROCKCHIP_SARADC
>>> To compile this driver as a module, choose M here: the
>>> module will be called rockchip_saradc.
>>> +config STM32_ADC_CORE
>>> + tristate "STMicroelectronics STM32 adc core"
>>> + depends on ARCH_STM32 || COMPILE_TEST
>>> + depends on OF
>>> + select REGULATOR
>>> + select REGULATOR_FIXED_VOLTAGE
>>> + help
>>> + Select this option to enable the core driver for STMicroelectronics
>>> + STM32 analog-to-digital converter (ADC).
>>> +
>>> + This driver can also be built as a module. If so, the module
>>> + will be called stm32-adc-core.
>>> +
>>> config STX104
>>> tristate "Apex Embedded Systems STX104 driver"
>>> depends on X86 && ISA_BUS_API
>>> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
>>> index 7a40c04..a1e8f44 100644
>>> --- a/drivers/iio/adc/Makefile
>>> +++ b/drivers/iio/adc/Makefile
>>> @@ -41,6 +41,7 @@ obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o
>>> obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o
>>> obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
>>> obj-$(CONFIG_STX104) += stx104.o
>>> +obj-$(CONFIG_STM32_ADC_CORE) += stm32-adc-core.o
>>> obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
>>> obj-$(CONFIG_TI_ADC0832) += ti-adc0832.o
>>> obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
>>> diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c
>>> new file mode 100644
>>> index 0000000..4214b0c
>>> --- /dev/null
>>> +++ b/drivers/iio/adc/stm32-adc-core.c
>>> @@ -0,0 +1,303 @@
>>> +/*
>>> + * This file is part of STM32 ADC driver
>>> + *
>>> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
>>> + * Author: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>.
>>> + *
>>> + * Inspired from: fsl-imx25-tsadc
>>> + *
>>> + * License type: GPLv2
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify it
>>> + * under the terms of the GNU General Public License version 2 as published by
>>> + * the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
>>> + * or FITNESS FOR A PARTICULAR PURPOSE.
>>> + * See the GNU General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License along with
>>> + * this program. If not, see <http://www.gnu.org/licenses/>.
>>> + */
>>> +
>>> +#include <linux/clk.h>
>>> +#include <linux/interrupt.h>
>>> +#include <linux/irqchip/chained_irq.h>
>>> +#include <linux/irqdesc.h>
>>> +#include <linux/irqdomain.h>
>>> +#include <linux/module.h>
>>> +#include <linux/of_device.h>
>>> +#include <linux/regulator/consumer.h>
>>> +#include <linux/slab.h>
>>> +
>>> +#include "stm32-adc-core.h"
>>> +
>>> +/* STM32F4 - common registers for all ADC instances: 1, 2 & 3 */
>>> +#define STM32F4_ADC_CSR (STM32_ADCX_COMN_OFFSET + 0x00)
>>> +#define STM32F4_ADC_CCR (STM32_ADCX_COMN_OFFSET + 0x04)
>>> +
>>> +/* STM32F4_ADC_CSR - bit fields */
>>> +#define STM32F4_EOC3 BIT(17)
>>> +#define STM32F4_EOC2 BIT(9)
>>> +#define STM32F4_EOC1 BIT(1)
>>> +
>>> +/* STM32F4_ADC_CCR - bit fields */
>>> +#define STM32F4_ADC_ADCPRE_SHIFT 16
>>> +#define STM32F4_ADC_ADCPRE_MASK GENMASK(17, 16)
>>> +
>>> +/* STM32 F4 maximum analog clock rate (from datasheet) */
>>> +#define STM32F4_ADC_MAX_CLK_RATE 36000000
>>> +
>>> +/**
>>> + * struct stm32_adc_priv - stm32 ADC core private data
>>> + * @irq: irq for ADC block
>>> + * @domain: irq domain reference
>>> + * @aclk: clock reference for the analog circuitry
>>> + * @vref: regulator reference
>>> + * @common: common data for all ADC instances
>>> + */
>>> +struct stm32_adc_priv {
>>> + int irq;
>>> + struct irq_domain *domain;
>>> + struct clk *aclk;
>>> + struct regulator *vref;
>>> + struct stm32_adc_common common;
>>> +};
>>> +
>>> +static struct stm32_adc_priv *to_stm32_adc_priv(struct stm32_adc_common *com)
>>> +{
>>> + return container_of(com, struct stm32_adc_priv, common);
>>> +}
>>> +
>>> +/* STM32F4 ADC internal common clock prescaler division ratios */
>>> +static int stm32f4_pclk_div[] = {2, 4, 6, 8};
>>> +
>>> +/**
>>> + * stm32f4_adc_clk_sel() - Select stm32f4 ADC common clock prescaler
>>> + * @priv: stm32 ADC core private data
>>> + * Select clock prescaler used for analog conversions, before using ADC.
>>> + */
>>> +static int stm32f4_adc_clk_sel(struct platform_device *pdev,
>>> + struct stm32_adc_priv *priv)
>>> +{
>>> + unsigned long rate;
>>> + u32 val;
>>> + int i;
>>> +
>>> + rate = clk_get_rate(priv->aclk);
>>> + for (i = 0; i < ARRAY_SIZE(stm32f4_pclk_div); i++) {
>>> + if ((rate / stm32f4_pclk_div[i]) <= STM32F4_ADC_MAX_CLK_RATE)
>>> + break;
>>> + }
>>> + if (i >= ARRAY_SIZE(stm32f4_pclk_div))
>>> + return -EINVAL;
>>> +
>>> + val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR);
>>> + val &= ~STM32F4_ADC_ADCPRE_MASK;
>>> + val |= i << STM32F4_ADC_ADCPRE_SHIFT;
>>> + writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR);
>>> +
>>> + dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n",
>>> + rate / (stm32f4_pclk_div[i] * 1000));
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +/* ADC common interrupt for all instances */
>>> +static void stm32_adc_irq_handler(struct irq_desc *desc)
>>> +{
>>> + struct stm32_adc_priv *priv = irq_desc_get_handler_data(desc);
>>> + struct irq_chip *chip = irq_desc_get_chip(desc);
>>> + u32 status;
>>> +
>>> + chained_irq_enter(chip, desc);
>>> + status = readl_relaxed(priv->common.base + STM32F4_ADC_CSR);
>>> +
>>> + if (status & STM32F4_EOC1)
>>> + generic_handle_irq(irq_find_mapping(priv->domain, 0));
>>> +
>>> + if (status & STM32F4_EOC2)
>>> + generic_handle_irq(irq_find_mapping(priv->domain, 1));
>>> +
>>> + if (status & STM32F4_EOC3)
>>> + generic_handle_irq(irq_find_mapping(priv->domain, 2));
>>> +
>>> + chained_irq_exit(chip, desc);
>>> +};
>>> +
>>> +static int stm32_adc_domain_map(struct irq_domain *d, unsigned int irq,
>>> + irq_hw_number_t hwirq)
>>> +{
>>> + irq_set_chip_data(irq, d->host_data);
>>> + irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_level_irq);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static void stm32_adc_domain_unmap(struct irq_domain *d, unsigned int irq)
>>> +{
>>> + irq_set_chip_and_handler(irq, NULL, NULL);
>>> + irq_set_chip_data(irq, NULL);
>>> +}
>>> +
>>> +static const struct irq_domain_ops stm32_adc_domain_ops = {
>>> + .map = stm32_adc_domain_map,
>>> + .unmap = stm32_adc_domain_unmap,
>>> + .xlate = irq_domain_xlate_onecell,
>>> +};
>>> +
>>> +static int stm32_adc_irq_probe(struct platform_device *pdev,
>>> + struct stm32_adc_priv *priv)
>>> +{
>>> + struct device_node *np = pdev->dev.of_node;
>>> +
>>> + priv->irq = platform_get_irq(pdev, 0);
>>> + if (priv->irq < 0) {
>>> + dev_err(&pdev->dev, "failed to get irq\n");
>>> + return priv->irq;
>>> + }
>>> +
>>> + priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0,
>>> + &stm32_adc_domain_ops,
>>> + priv);
>>> + if (!priv->domain) {
>>> + dev_err(&pdev->dev, "Failed to add irq domain\n");
>>> + return -ENOMEM;
>>> + }
>>> +
>>> + irq_set_chained_handler(priv->irq, stm32_adc_irq_handler);
>>> + irq_set_handler_data(priv->irq, priv);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static void stm32_adc_irq_remove(struct platform_device *pdev,
>>> + struct stm32_adc_priv *priv)
>>> +{
>>> + int hwirq;
>>> +
>>> + for (hwirq = 0; hwirq < STM32_ADC_MAX_ADCS; hwirq++)
>>> + irq_dispose_mapping(irq_find_mapping(priv->domain, hwirq));
>>> + irq_domain_remove(priv->domain);
>>> + irq_set_chained_handler(priv->irq, NULL);
>>> +}
>>> +
>>> +static int stm32_adc_probe(struct platform_device *pdev)
>>> +{
>>> + struct stm32_adc_priv *priv;
>>> + struct device_node *np = pdev->dev.of_node;
>>> + struct resource *res;
>>> + int ret;
>>> +
>>> + if (!pdev->dev.of_node)
>>> + return -ENODEV;
>>> +
>>> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
>>> + if (!priv)
>>> + return -ENOMEM;
>>> +
>>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>> + priv->common.base = devm_ioremap_resource(&pdev->dev, res);
>>> + if (IS_ERR(priv->common.base))
>>> + return PTR_ERR(priv->common.base);
>>> +
>>> + priv->vref = devm_regulator_get(&pdev->dev, "vref");
>>> + if (IS_ERR(priv->vref)) {
>>> + ret = PTR_ERR(priv->vref);
>>> + dev_err(&pdev->dev, "vref get failed, %d\n", ret);
>>> + return ret;
>>> + }
>>> +
>>> + ret = regulator_enable(priv->vref);
>>> + if (ret < 0) {
>>> + dev_err(&pdev->dev, "vref enable failed\n");
>>> + return ret;
>>> + }
>>> +
>>> + ret = regulator_get_voltage(priv->vref);
>>> + if (ret < 0) {
>>> + dev_err(&pdev->dev, "vref get voltage failed, %d\n", ret);
>>> + goto err_regulator_disable;
>>> + }
>>> + priv->common.vref_mv = ret / 1000;
>>> + dev_dbg(&pdev->dev, "vref+=%dmV\n", priv->common.vref_mv);
>>> +
>>> + priv->aclk = devm_clk_get(&pdev->dev, "adc");
>>> + if (IS_ERR(priv->aclk)) {
>>> + ret = PTR_ERR(priv->aclk);
>>> + dev_err(&pdev->dev, "Can't get 'adc' clock\n");
>>> + goto err_regulator_disable;
>>> + }
>>> +
>>> + ret = clk_prepare_enable(priv->aclk);
>>> + if (ret < 0) {
>>> + dev_err(&pdev->dev, "adc clk enable failed\n");
>>> + goto err_regulator_disable;
>>> + }
>>> +
>>> + ret = stm32f4_adc_clk_sel(pdev, priv);
>>> + if (ret < 0) {
>>> + dev_err(&pdev->dev, "adc clk selection failed\n");
>>> + goto err_clk_disable;
>>> + }
>>> +
>>> + ret = stm32_adc_irq_probe(pdev, priv);
>>> + if (ret < 0)
>>> + goto err_clk_disable;
>>> +
>>> + platform_set_drvdata(pdev, &priv->common);
>>> +
>>> + ret = of_platform_populate(np, NULL, NULL, &pdev->dev);
>>> + if (ret < 0) {
>>> + dev_err(&pdev->dev, "failed to populate DT children\n");
>>> + goto err_irq_remove;
>>> + }
>>> +
>>> + return 0;
>>> +
>>> +err_irq_remove:
>>> + stm32_adc_irq_remove(pdev, priv);
>>> +
>>> +err_clk_disable:
>>> + clk_disable_unprepare(priv->aclk);
>>> +
>>> +err_regulator_disable:
>>> + regulator_disable(priv->vref);
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static int stm32_adc_remove(struct platform_device *pdev)
>>> +{
>>> + struct stm32_adc_common *common = platform_get_drvdata(pdev);
>>> + struct stm32_adc_priv *priv = to_stm32_adc_priv(common);
>>> +
>>> + of_platform_depopulate(&pdev->dev);
>>> + stm32_adc_irq_remove(pdev, priv);
>>> + clk_disable_unprepare(priv->aclk);
>>> + regulator_disable(priv->vref);
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static const struct of_device_id stm32_adc_of_match[] = {
>>> + { .compatible = "st,stm32f4-adc-core" },
>>> + {},
>>> +};
>>> +MODULE_DEVICE_TABLE(of, stm32_adc_of_match);
>>> +
>>> +static struct platform_driver stm32_adc_driver = {
>>> + .probe = stm32_adc_probe,
>>> + .remove = stm32_adc_remove,
>>> + .driver = {
>>> + .name = "stm32-adc-core",
>>> + .of_match_table = stm32_adc_of_match,
>>> + },
>>> +};
>>> +module_platform_driver(stm32_adc_driver);
>>> +
>>> +MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>");
>>> +MODULE_DESCRIPTION("STMicroelectronics STM32 ADC core driver");
>>> +MODULE_LICENSE("GPL v2");
>>> +MODULE_ALIAS("platform:stm32-adc-core");
>>> diff --git a/drivers/iio/adc/stm32-adc-core.h b/drivers/iio/adc/stm32-adc-core.h
>>> new file mode 100644
>>> index 0000000..081fa5f
>>> --- /dev/null
>>> +++ b/drivers/iio/adc/stm32-adc-core.h
>>> @@ -0,0 +1,52 @@
>>> +/*
>>> + * This file is part of STM32 ADC driver
>>> + *
>>> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
>>> + * Author: Fabrice Gasnier <fabrice.gasnier-qxv4g6HH51o@public.gmane.org>.
>>> + *
>>> + * License type: GPLv2
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify it
>>> + * under the terms of the GNU General Public License version 2 as published by
>>> + * the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful, but
>>> + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
>>> + * or FITNESS FOR A PARTICULAR PURPOSE.
>>> + * See the GNU General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License along with
>>> + * this program. If not, see <http://www.gnu.org/licenses/>.
>>> + */
>>> +
>>> +#ifndef __STM32_ADC_H
>>> +#define __STM32_ADC_H
>>> +
>>> +/*
>>> + * STM32 - ADC global register map
>>> + * ________________________________________________________
>>> + * | Offset | Register |
>>> + * --------------------------------------------------------
>>> + * | 0x000 | Master ADC1 |
>>> + * --------------------------------------------------------
>>> + * | 0x100 | Slave ADC2 |
>>> + * --------------------------------------------------------
>>> + * | 0x200 | Slave ADC3 |
>>> + * --------------------------------------------------------
>>> + * | 0x300 | Master & Slave common regs |
>>> + * --------------------------------------------------------
>>> + */
>>> +#define STM32_ADC_MAX_ADCS 3
>>> +#define STM32_ADCX_COMN_OFFSET 0x300
>>> +
>>> +/**
>>> + * struct stm32_adc_common - stm32 ADC driver common data (for all instances)
>>> + * @base: control registers base cpu addr
>>> + * @vref_mv: vref voltage (mv)
>>> + */
>>> +struct stm32_adc_common {
>>> + void __iomem *base;
>>> + int vref_mv;
>>> +};
>>> +
>>> +#endif
>>>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-iio" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH] ARM: dts: sunxi: Enable UEXT related nodes for Olimex A20 SOM EVB
From: Emmanuel Vadot @ 2016-11-24 20:08 UTC (permalink / raw)
To: Maxime Ripard
Cc: mark.rutland, devicetree, linux, linux-kernel, wens, robh+dt,
linux-arm-kernel
In-Reply-To: <20161123181610.cae67ad53f5f69246d341b30@bidouilliste.com>
On Wed, 23 Nov 2016 18:16:10 +0100
Emmanuel Vadot <manu@bidouilliste.com> wrote:
> On Wed, 23 Nov 2016 09:03:50 +0100
> Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
>
> > On Mon, Nov 21, 2016 at 05:49:11PM +0100, Emmanuel Vadot wrote:
> > > UEXT are Universal EXTension connector from Olimex. They embed i2c, spi
> > > and uart pins along power in one connector and are found on most,
> > > if not all, Olimex boards.
> > > The Olimex A20 SOM EVB have two UEXT connector so enable the nodes found on
> > > those two connectors.
> > >
> > > Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
> >
> > Fixed the indentation of the spi pinctrl cells, and applied.
> >
> > Please note that I'm note planning to send any new pull request, so
> > this will likely end up in 4.11.
> >
> > Thanks!
> > Maxime
> >
> > --
> > Maxime Ripard, Free Electrons
> > Embedded Linux and Kernel engineering
> > http://free-electrons.com
>
> Sorry about the indentation, I'll be more carefull next time.
>
> Thank you.
>
> --
> Emmanuel Vadot <manu@bidouilliste.com> <manu@freebsd.org>
>
Hi Maxime,
Re-reading the patch I've seen that I've not enabled the SPI nodes, I
guess it's easier if you revert my patch and that I send a new one ?
Cheers,
--
Emmanuel Vadot <manu@bidouilliste.com> <manu@freebsd.org>
^ permalink raw reply
* Re: [PATCH] ARM: dts: sunxi: Add num-cs for A20 spi nodes
From: Emmanuel Vadot @ 2016-11-24 20:05 UTC (permalink / raw)
To: Maxime Ripard
Cc: mark.rutland, devicetree, linux, linux-kernel, wens, robh+dt,
linux-arm-kernel
In-Reply-To: <20161124195517.qrq7briu3pwjnp4n@lukather>
On Thu, 24 Nov 2016 20:55:17 +0100
Maxime Ripard <maxime.ripard@free-electrons.com> wrote:
> On Tue, Nov 22, 2016 at 06:06:16PM +0100, Emmanuel Vadot wrote:
> > The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
> > others three only have 1.
> > Add the num-cs property to each node.
> >
> > Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
>
> I don't think we have any code that uses it at the moment. What is the
> rationale behind this patch?
>
> Thanks!
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
Hi Maxime,
If num-cs isn't present nothing prevent to start a transfer with a
non-valid CS pin, resulting in an error.
num-cs are default property especially made for this and a SPI driver
should try to get the property at probe/attach time.
Cheers,
--
Emmanuel Vadot <manu@bidouilliste.com> <manu@freebsd.org>
^ permalink raw reply
* Re: [PATCH] ARM: dts: sun6i: hummingbird: Enable USB OTG
From: Maxime Ripard @ 2016-11-24 20:04 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20161124112908.4796-1-wens-jdAy2FN1RRM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 555 bytes --]
On Thu, Nov 24, 2016 at 07:29:08PM +0800, Chen-Yu Tsai wrote:
> The A31 Hummingbird has a mini USB OTG port, and uses GPIO pins from the
> SoC for ID pin and VBUS detection and VBUS control. The PMIC can also do
> VBUS detection and control.
>
> Here we prefer to use the PMIC's DRIVEVBUS function to control VBUS for
> USB OTG, as that is the hardware default.
>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH 0/2] ARM: dts: sun6i: Disable display pipeline by default
From: Maxime Ripard @ 2016-11-24 20:00 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20161124064339.12615-1-wens-jdAy2FN1RRM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 807 bytes --]
On Thu, Nov 24, 2016 at 02:43:37PM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> While we now support the internal display pipeline found on sun6i, it
> is possible that we are unable to enable the display for some boards,
> due to a lack of drivers for the panels or bridges found on them. If
> the display pipeline is enabled, the driver will try to enable, and
> possibly screw up the simple framebuffer U-boot had configured.
>
> This series disables the display pipeline by default, and re-enables
> it for the A31 Hummingbird, which already had its display pipeline
> enabled.
>
> The series can go in after 4.10-rc1, as a fix, but should not be delayed
> till the next release.
Applied both, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH] ARM: dts: sunxi: Add num-cs for A20 spi nodes
From: Maxime Ripard @ 2016-11-24 19:55 UTC (permalink / raw)
To: Emmanuel Vadot
Cc: mark.rutland, devicetree, linux, linux-kernel, wens, robh+dt,
linux-arm-kernel
In-Reply-To: <20161122170616.29557-1-manu@bidouilliste.com>
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On Tue, Nov 22, 2016 at 06:06:16PM +0100, Emmanuel Vadot wrote:
> The spi0 controller on the A20 have up to 4 CS (Chip Select) while the
> others three only have 1.
> Add the num-cs property to each node.
>
> Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
I don't think we have any code that uses it at the moment. What is the
rationale behind this patch?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [RFC PATCH 2/2] arm64: dts: enable the MUSB controller of Pine64 in host-only mode
From: Maxime Ripard @ 2016-11-24 19:53 UTC (permalink / raw)
To: Icenowy Zheng
Cc: Chen-Yu Tsai, Hans de Goede,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20161122165902.62543-2-icenowy-ymACFijhrKM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 586 bytes --]
On Wed, Nov 23, 2016 at 12:59:02AM +0800, Icenowy Zheng wrote:
> A64 has a MUSB controller wired to the USB PHY 0, which is connected
> to the upper USB Type-A port of Pine64.
>
> As the port is a Type-A female port, enable it in host-only mode in the
> device tree, which makes devices with USB Type-A male port can work on
> this port (which is originally designed by Pine64 team).
>
> Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Applied both, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [net-next PATCH v1 0/2] stmmac: dwmac-meson8b: configurable RGMII TX delay
From: Florian Fainelli @ 2016-11-24 18:55 UTC (permalink / raw)
To: Martin Blumenstingl, Jerome Brunet, Sebastian Frias
Cc: linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, netdev-u79uwXL29TY76Z2rM5mHXA,
davem-fT/PcQaiUtIeIZ0/mPfg9Q, khilman-rdvid1DuHRBWk0Htik3J/w,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
alexandre.torgue-qxv4g6HH51o, peppe.cavallaro-qxv4g6HH51o,
carlo-KA+7E9HrN00dnm+yROfE0A, Mans Rullgard, Andrew Lunn
In-Reply-To: <CAFBinCB7sXjXor++W+PW0-j_VxATRzhexjqHgXj2jD10tBpZFg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Le 24/11/2016 à 09:05, Martin Blumenstingl a écrit :
> On Thu, Nov 24, 2016 at 4:56 PM, Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> wrote:
>> On Thu, 2016-11-24 at 15:34 +0100, Martin Blumenstingl wrote:
>>> Currently the dwmac-meson8b stmmac glue driver uses a hardcoded 1/4
>>> cycle TX clock delay. This seems to work fine for many boards (for
>>> example Odroid-C2 or Amlogic's reference boards) but there are some
>>> others where TX traffic is simply broken.
>>> There are probably multiple reasons why it's working on some boards
>>> while it's broken on others:
>>> - some of Amlogic's reference boards are using a Micrel PHY
>>> - hardware circuit design
>>> - maybe more...
>>>
>>> This raises a question though:
>>> Which device is supposed to enable the TX delay when both MAC and PHY
>>> support it? And should we implement it for each PHY / MAC separately
>>> or should we think about a more generic solution (currently it's not
>>> possible to disable the TX delay generated by the RTL8211F PHY via
>>> devicetree when using phy-mode "rgmii")?
>>
>> Actually you can skip the part which activate the Tx-delay on the phy
>> by setting "phy-mode = "rgmii-id" instead of "rgmii"
>>
>> phy->interface will no longer be PHY_INTERFACE_MODE_RGMII
>> but PHY_INTERFACE_MODE_RGMII_ID.
> unfortunately this is not true for RTL8211F (I did my previous tests
> with the same expectation in mind)!
> the code seems to suggest that TX-delay is disabled whenever mode !=
> PHY_INTERFACE_MODE_RGMII.
> BUT: on my device RTL8211F_TX_DELAY is set even before
> "phy_write(phydev, 0x11, reg);"!
(Adding Sebastian (and Mans, and Andrew) since he raised the same
question a while ago. I think I now understand a bit better what
Sebastian was after a couple of weeks ago)
>
> Based on what I found it seems that rgmii-id, rgmii-txid and
> rgmii-rxid are supposed to be handled by the PHY.
Correct, the meaning of PHY_INTERFACE_MODE should be from the
perspective of the PHY device:
- PHY_INTERFACE_MODE_RGMII_TXID means that the PHY is responsible for
adding a delay when the MAC transmits (TX MAC -> PHY (delay) -> wire)
- PHY_INTERFACE_MODE_RGMII_RXID means that the PHY is responsible for
adding a delay when the MAC receives (RX MAC <- (delay) PHY) <- wire)
> That would mean that we have two problems here:
> 1) drivers/net/phy/realtek.c:rtl8211f_config_init should check for
> PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID and
> enable the TX-delay in that case - otherwise explicitly disable it
Agreed.
> 2) dwmac-meson8b.c should only use the configured TX-delay for
> PHY_INTERFACE_MODE_RGMII
> @Florian: could you please share your thoughts on this (who handles
> the TX delay in which case)?
This also seems reasonable to do, provided that the PHY is also properly
configured not to add delays in both directions, and therefore assumes
that the MAC does it.
We have a fairly large problem with how RGMII delays are done in PHYLIB
and Ethernet MAC drivers (or just in general), where we can't really
intersect properly what a PHY is supporting (in terms of internal
delays), and what the MAC supports either. One possible approach could
be to update PHY drivers a list of PHY_INTERFACE_MODE_* that they
support (ideally, even with normalized nanosecond delay values), and
then intersect that with the requested phy_interface_t during
phy_{attach,connect} time, and feed this back to the MAC with a special
error code/callback, so we could gracefully try to choose another
PHY_INTERFACE_MODE_* value that the MAC supports....
A larger problem is that a number of drivers have been deployed, and
Device Trees, possibly with the meaning of "phy-mode" and
"phy-connection-type" being from the MAC perspective, and not the PHY
perspective *sigh*, good luck auditing those.
So from there, here is possibly what we could do
- submit a series of patches that update the PHYLIB documentation (there
are other things missing here) and make it clear from which entity (PHY
or MAC) does the delay apply to, document the "intersection" problem here
- have you document the configured behavior for dwmac-meson8b that we
just discussed here in v2 of this patch series
Sorry for the long post, here is a virtual potato: 0
--
Florian
--
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^ permalink raw reply
* Re: [PATCH mmc/next] mmc: sh_mmcif: Document r8a73a4, r8a7779 and sh73a0 DT bindings
From: Sergei Shtylyov @ 2016-11-24 18:50 UTC (permalink / raw)
To: Simon Horman, Ulf Hansson
Cc: linux-mmc, devicetree, Magnus Damm, linux-renesas-soc
In-Reply-To: <1480011435-22125-1-git-send-email-horms+renesas@verge.net.au>
Hello.
On 11/24/2016 09:17 PM, Simon Horman wrote:
> Simply document new compatibility strings as the driver is already
> activated using a fallback compatibility string.
>
> These compat strings are in keeping with those for all other
> Renesas ARM based SoCs with sh_mmcif enabled in mainline.
>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> I plan to follow-up with patches to use these new compat strings
> to bring the DT files of the SoCs in question in-line with those
> for other Renesas ARM based SoCs with sh_mmcif enabled in mainline.
> ---
> Documentation/devicetree/bindings/mmc/renesas,mmcif.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
> index ff611fa66871..e4ba92aa035e 100644
> --- a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
> +++ b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
> @@ -8,11 +8,14 @@ Required properties:
>
> - compatible: should be "renesas,mmcif-<soctype>", "renesas,sh-mmcif" as a
> fallback. Examples with <soctype> are:
> + - "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs
> - "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs
> + - "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs
7779 in the subject, 7778 here.
[...]
MBR, Sergei
^ permalink raw reply
* [PATCH mmc/next] mmc: sh_mmcif: Document r8a73a4, r8a7779 and sh73a0 DT bindings
From: Simon Horman @ 2016-11-24 18:17 UTC (permalink / raw)
To: Ulf Hansson
Cc: linux-mmc, devicetree, Magnus Damm, linux-renesas-soc,
Simon Horman
Simply document new compatibility strings as the driver is already
activated using a fallback compatibility string.
These compat strings are in keeping with those for all other
Renesas ARM based SoCs with sh_mmcif enabled in mainline.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
I plan to follow-up with patches to use these new compat strings
to bring the DT files of the SoCs in question in-line with those
for other Renesas ARM based SoCs with sh_mmcif enabled in mainline.
---
Documentation/devicetree/bindings/mmc/renesas,mmcif.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
index ff611fa66871..e4ba92aa035e 100644
--- a/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
+++ b/Documentation/devicetree/bindings/mmc/renesas,mmcif.txt
@@ -8,11 +8,14 @@ Required properties:
- compatible: should be "renesas,mmcif-<soctype>", "renesas,sh-mmcif" as a
fallback. Examples with <soctype> are:
+ - "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs
- "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs
+ - "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs
- "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs
- "renesas,mmcif-r8a7791" for the MMCIF found in r8a7791 SoCs
- "renesas,mmcif-r8a7793" for the MMCIF found in r8a7793 SoCs
- "renesas,mmcif-r8a7794" for the MMCIF found in r8a7794 SoCs
+ - "renesas,mmcif-sh73a0" for the MMCIF found in sh73a0 SoCs
- clocks: reference to the functional clock
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related
* Re: [PATCH v8 3/8] drivers:input:tsc2007: add iio interface to read external ADC input and temperature
From: H. Nikolaus Schaller @ 2016-11-24 18:05 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Sebastian Reichel, Dmitry Torokhov, Mark Rutland,
Benoît Cousson, Tony Lindgren, Russell King, Arnd Bergmann,
Michael Welling, Mika Penttilä, Javier Martinez Canillas,
Igor Grinberg, Andrew F. Davis, Mark Brown, Jonathan Cameron,
Rob Herring, Alexander Stein, Eric Engestrom, Hans de Goede
In-Reply-To: <E42B1EF7-222E-46D6-878B-30C789CFBBC5-tko9wxEg+fIOOJlXag/Snyp2UmYkHbXO@public.gmane.org>
> Am 24.11.2016 um 18:38 schrieb Jonathan Cameron <jic23-tko9wxEg+fIOOJlXag/Snyp2UmYkHbXO@public.gmane.org>:
>
>
>
> On 22 November 2016 14:02:30 GMT+00:00, "H. Nikolaus Schaller" <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org> wrote:
>> The tsc2007 chip not only has a resistive touch screen controller but
>> also an external AUX adc imput which can be used for an ambient
>> light sensor, battery voltage monitoring or any general purpose.
>>
>> Additionally it can measure the chip temperature.
>>
>> This extension provides an iio interface for these adc channels.
>>
>> Since it is not wasting much resources and is very straightforward,
>> we simply provide all other adc channels as optional iio interfaces
>> as weel. This can be used for debugging or special applications.
>>
>> This patch also splits the tsc2007 driver in several source files:
>> tsc2007.h -- constants, structs and stubs
>> tsc2007_core.c -- functional parts of the original driver
>> tsc2007_iio.c -- the optional iio stuff
>>
>> Makefile magic allows to conditionally link the iio stuff
>> if CONFIG_IIO=y or =m in a way that it works with
>> CONFIG_TOUCHSCREEN_TSC2007=m.
>>
>> Signed-off-by: H. Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
>> Reviewed-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>> ---
>> drivers/input/touchscreen/Makefile | 7 +
>> drivers/input/touchscreen/tsc2007.h | 116
>> ++++++++++++++++
>> .../touchscreen/{tsc2007.c => tsc2007_core.c} | 95 +++----------
>> drivers/input/touchscreen/tsc2007_iio.c | 150
>> +++++++++++++++++++++
>> 4 files changed, 294 insertions(+), 74 deletions(-)
>> create mode 100644 drivers/input/touchscreen/tsc2007.h
>> rename drivers/input/touchscreen/{tsc2007.c => tsc2007_core.c} (86%)
>> create mode 100644 drivers/input/touchscreen/tsc2007_iio.c
>>
>> diff --git a/drivers/input/touchscreen/Makefile
>> b/drivers/input/touchscreen/Makefile
>> index 81b8645..3be0d19 100644
>> --- a/drivers/input/touchscreen/Makefile
>> +++ b/drivers/input/touchscreen/Makefile
>> @@ -80,6 +80,13 @@ obj-$(CONFIG_TOUCHSCREEN_TSC_SERIO) += tsc40.o
>> obj-$(CONFIG_TOUCHSCREEN_TSC200X_CORE) += tsc200x-core.o
>> obj-$(CONFIG_TOUCHSCREEN_TSC2004) += tsc2004.o
>> obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o
>> +tsc2007-y := tsc2007_core.o
>> +ifeq ($(CONFIG_IIO),y)
>> +tsc2007-y += tsc2007_iio.o
>> +endif
>> +ifeq ($(CONFIG_IIO),m)
>> +tsc2007-y += tsc2007_iio.o
>
> Not tsc2007-m ?
>
> I don't follow how this works!
I guess tsc2007-y is an internal collector variable name
for multiple .o components. Sort of a "library" object.
While
obj-y += tsc2007.o adds it to the kernel
obj-m += tsc2007.o adds it to the modules
I am not sure if my explanation is correct but it appears
to work that way.
Anyways what shall we do? If CONFIG_TOUCHSCREEN_TSC2007=y
and IIO=m we have a problem that we need dynamic binding.
>> +endif
>> obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o
>> obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
>> obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o
>> diff --git a/drivers/input/touchscreen/tsc2007.h
>> b/drivers/input/touchscreen/tsc2007.h
>> new file mode 100644
>> index 0000000..c25932f
>> --- /dev/null
>> +++ b/drivers/input/touchscreen/tsc2007.h
>> @@ -0,0 +1,116 @@
>> +/*
>> + * Copyright (c) 2008 MtekVision Co., Ltd.
>> + * Kwangwoo Lee <kwlee-ec7hoAtq5SbSUeElwK9/Pw@public.gmane.org>
>> + *
>> + * Using code from:
>> + * - ads7846.c
>> + * Copyright (c) 2005 David Brownell
>> + * Copyright (c) 2006 Nokia Corporation
>> + * - corgi_ts.c
>> + * Copyright (C) 2004-2005 Richard Purdie
>> + * - omap_ts.[hc], ads7846.h, ts_osk.c
>> + * Copyright (C) 2002 MontaVista Software
>> + * Copyright (C) 2004 Texas Instruments
>> + * Copyright (C) 2005 Dirk Behme
>> + *
>> + * This program is free software; you can redistribute it and/or
>> modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/input/touchscreen.h>
>> +
>> +#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
>> +#define TSC2007_MEASURE_AUX (0x2 << 4)
>> +#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
>> +#define TSC2007_ACTIVATE_XN (0x8 << 4)
>> +#define TSC2007_ACTIVATE_YN (0x9 << 4)
>> +#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
>> +#define TSC2007_SETUP (0xb << 4)
>> +#define TSC2007_MEASURE_X (0xc << 4)
>> +#define TSC2007_MEASURE_Y (0xd << 4)
>> +#define TSC2007_MEASURE_Z1 (0xe << 4)
>> +#define TSC2007_MEASURE_Z2 (0xf << 4)
>> +
>> +#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
>> +#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
>> +#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
>> +#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
>> +
>> +#define TSC2007_12BIT (0x0 << 1)
>> +#define TSC2007_8BIT (0x1 << 1)
>> +
>> +#define MAX_12BIT ((1 << 12) - 1)
>> +
>> +#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
>> +
>> +#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
>> +#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
>> +#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
>> +#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
>> +#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
>> +
>> +struct ts_event {
>> + u16 x;
>> + u16 y;
>> + u16 z1, z2;
>> +};
>> +
>> +struct tsc2007 {
>> + struct input_dev *input;
>> + char phys[32];
>> +
>> + struct i2c_client *client;
>> +
>> + u16 model;
>> + u16 x_plate_ohms;
>> +
>> + struct touchscreen_properties prop;
>> +
>> + bool report_resistance;
>> + u16 min_x;
>> + u16 min_y;
>> + u16 max_x;
>> + u16 max_y;
>> + u16 max_rt;
>> + unsigned long poll_period; /* in jiffies */
>> + int fuzzx;
>> + int fuzzy;
>> + int fuzzz;
>> +
>> + unsigned int gpio;
>> + int irq;
>> +
>> + wait_queue_head_t wait;
>> + bool stopped;
>> + bool pendown;
>> +
>> + int (*get_pendown_state)(struct device *);
>> + void (*clear_penirq)(void);
>> +
>> + struct mutex mlock;
>> + struct iio_dev *iio_dev; /* optional */
>> +};
>> +
>> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
>> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>> + struct ts_event *tc);
>> +bool tsc2007_is_pen_down(struct tsc2007 *ts);
>> +
>> +#if IS_ENABLED(CONFIG_IIO)
>> +
>> +/* defined in tsc2007_iio.c */
>> +int tsc2007_iio_configure(struct tsc2007 *ts);
>> +void tsc2007_iio_unconfigure(struct tsc2007 *ts);
>> +
>> +#else /* CONFIG_IIO */
>> +
>> +static inline int tsc2007_iio_configure(struct tsc2007 *ts)
>> +{
>> + return 0;
>> +}
>> +static inline void tsc2007_iio_unconfigure(struct tsc2007 *ts)
>> +{
>> +}
>> +
>> +#endif /* CONFIG_IIO */
>> diff --git a/drivers/input/touchscreen/tsc2007.c
>> b/drivers/input/touchscreen/tsc2007_core.c
>> similarity index 86%
>> rename from drivers/input/touchscreen/tsc2007.c
>> rename to drivers/input/touchscreen/tsc2007_core.c
>> index 76b462b..812ded8 100644
>> --- a/drivers/input/touchscreen/tsc2007.c
>> +++ b/drivers/input/touchscreen/tsc2007_core.c
>> @@ -27,79 +27,11 @@
>> #include <linux/i2c.h>
>> #include <linux/i2c/tsc2007.h>
>> #include <linux/of_device.h>
>> -#include <linux/of.h>
>> #include <linux/of_gpio.h>
>> -#include <linux/input/touchscreen.h>
>> -
>> -#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
>> -#define TSC2007_MEASURE_AUX (0x2 << 4)
>> -#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
>> -#define TSC2007_ACTIVATE_XN (0x8 << 4)
>> -#define TSC2007_ACTIVATE_YN (0x9 << 4)
>> -#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
>> -#define TSC2007_SETUP (0xb << 4)
>> -#define TSC2007_MEASURE_X (0xc << 4)
>> -#define TSC2007_MEASURE_Y (0xd << 4)
>> -#define TSC2007_MEASURE_Z1 (0xe << 4)
>> -#define TSC2007_MEASURE_Z2 (0xf << 4)
>> -
>> -#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
>> -#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
>> -#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
>> -#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
>> -
>> -#define TSC2007_12BIT (0x0 << 1)
>> -#define TSC2007_8BIT (0x1 << 1)
>> -
>> -#define MAX_12BIT ((1 << 12) - 1)
>> -
>> -#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
>> -
>> -#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
>> -#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
>> -#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
>> -#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
>> -#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
>> -
>> -struct ts_event {
>> - u16 x;
>> - u16 y;
>> - u16 z1, z2;
>> -};
>> -
>> -struct tsc2007 {
>> - struct input_dev *input;
>> - char phys[32];
>> -
>> - struct i2c_client *client;
>> -
>> - u16 model;
>> - u16 x_plate_ohms;
>> -
>> - struct touchscreen_properties prop;
>> -
>> - bool report_resistance;
>> - u16 min_x;
>> - u16 min_y;
>> - u16 max_x;
>> - u16 max_y;
>> - u16 max_rt;
>> - unsigned long poll_period; /* in jiffies */
>> - int fuzzx;
>> - int fuzzy;
>> - int fuzzz;
>> -
>> - unsigned gpio;
>> - int irq;
>> -
>> - wait_queue_head_t wait;
>> - bool stopped;
>> +#include "tsc2007.h"
>>
>> - int (*get_pendown_state)(struct device *);
>> - void (*clear_penirq)(void);
>> -};
>>
>> -static inline int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
>> +int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
>> {
>> s32 data;
>> u16 val;
>> @@ -137,7 +69,7 @@ static void tsc2007_read_values(struct tsc2007 *tsc,
>> struct ts_event *tc)
>> tsc2007_xfer(tsc, PWRDOWN);
>> }
>>
>> -static u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>> +u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>> struct ts_event *tc)
>> {
>> u32 rt = 0;
>> @@ -158,7 +90,7 @@ static u32 tsc2007_calculate_resistance(struct
>> tsc2007 *tsc,
>> return rt;
>> }
>>
>> -static bool tsc2007_is_pen_down(struct tsc2007 *ts)
>> +bool tsc2007_is_pen_down(struct tsc2007 *ts)
>> {
>> /*
>> * NOTE: We can't rely on the pressure to determine the pen down
>> @@ -191,7 +123,10 @@ static irqreturn_t tsc2007_soft_irq(int irq, void
>> *handle)
>> while (!ts->stopped && tsc2007_is_pen_down(ts)) {
>>
>> /* pen is down, continue with the measurement */
>> +
>> + mutex_lock(&ts->mlock);
>> tsc2007_read_values(ts, &tc);
>> + mutex_unlock(&ts->mlock);
>>
>> rt = tsc2007_calculate_resistance(ts, &tc);
>>
>> @@ -441,7 +376,8 @@ static void tsc2007_call_exit_platform_hw(void
>> *data)
>> static int tsc2007_probe(struct i2c_client *client,
>> const struct i2c_device_id *id)
>> {
>> - const struct tsc2007_platform_data *pdata =
>> dev_get_platdata(&client->dev);
>> + const struct tsc2007_platform_data *pdata =
>> + dev_get_platdata(&client->dev);
>> struct tsc2007 *ts;
>> struct input_dev *input_dev;
>> int err;
>> @@ -463,7 +399,9 @@ static int tsc2007_probe(struct i2c_client *client,
>> ts->client = client;
>> ts->irq = client->irq;
>> ts->input = input_dev;
>> +
>> init_waitqueue_head(&ts->wait);
>> + mutex_init(&ts->mlock);
>>
>> snprintf(ts->phys, sizeof(ts->phys),
>> "%s/input0", dev_name(&client->dev));
>> @@ -534,7 +472,7 @@ static int tsc2007_probe(struct i2c_client *client,
>> if (err < 0) {
>> dev_err(&client->dev,
>> "Failed to setup chip: %d\n", err);
>> - return err; /* usually, chip does not respond */
>> + return err; /* chip does not respond */
>> }
>>
>> err = input_register_device(input_dev);
>> @@ -544,6 +482,14 @@ static int tsc2007_probe(struct i2c_client
>> *client,
>> return err;
>> }
>>
>> + return tsc2007_iio_configure(ts);
>> +}
>> +
>> +static int tsc2007_remove(struct i2c_client *client)
>> +{
>> + struct tsc2007 *ts = i2c_get_clientdata(client);
>> +
>> + tsc2007_iio_unconfigure(ts);
>> return 0;
>> }
>>
>> @@ -569,6 +515,7 @@ static struct i2c_driver tsc2007_driver = {
>> },
>> .id_table = tsc2007_idtable,
>> .probe = tsc2007_probe,
>> + .remove = tsc2007_remove,
>> };
>>
>> module_i2c_driver(tsc2007_driver);
>> diff --git a/drivers/input/touchscreen/tsc2007_iio.c
>> b/drivers/input/touchscreen/tsc2007_iio.c
>> new file mode 100644
>> index 0000000..ed79944
>> --- /dev/null
>> +++ b/drivers/input/touchscreen/tsc2007_iio.c
>> @@ -0,0 +1,150 @@
>> +/*
>> + * Copyright (c) 2016 Golden Delicious Comp. GmbH&Co. KG
>> + * Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +
>> +#include <linux/i2c.h>
>> +#include <linux/iio/iio.h>
>> +#include "tsc2007.h"
>> +
>> +struct tsc2007_iio {
>> + struct tsc2007 *ts;
>> +};
>> +
>> +#define TSC2007_CHAN_IIO(_chan, _name, _type, _chan_info) \
>> +{ \
>> + .datasheet_name = _name, \
>> + .type = _type, \
>> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
>> + BIT(_chan_info), \
>> + .indexed = 1, \
>> + .channel = _chan, \
>> +}
>> +
>> +static const struct iio_chan_spec tsc2007_iio_channel[] = {
>> + TSC2007_CHAN_IIO(0, "x", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> + TSC2007_CHAN_IIO(1, "y", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> + TSC2007_CHAN_IIO(2, "z1", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> + TSC2007_CHAN_IIO(3, "z2", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> + TSC2007_CHAN_IIO(4, "adc", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>> + TSC2007_CHAN_IIO(5, "rt", IIO_VOLTAGE, IIO_CHAN_INFO_RAW), /* Ohms?
>> */
>> + TSC2007_CHAN_IIO(6, "pen", IIO_PRESSURE, IIO_CHAN_INFO_RAW),
>> + TSC2007_CHAN_IIO(7, "temp0", IIO_TEMP, IIO_CHAN_INFO_RAW),
>> + TSC2007_CHAN_IIO(8, "temp1", IIO_TEMP, IIO_CHAN_INFO_RAW),
>> +};
>> +
>> +static int tsc2007_read_raw(struct iio_dev *indio_dev,
>> + struct iio_chan_spec const *chan, int *val, int *val2, long mask)
>> +{
>> + struct tsc2007_iio *iio = iio_priv(indio_dev);
>> + struct tsc2007 *tsc = iio->ts;
>> + int adc_chan = chan->channel;
>> + int ret = 0;
>> +
>> + if (adc_chan >= ARRAY_SIZE(tsc2007_iio_channel))
>> + return -EINVAL;
>> +
>> + if (mask != IIO_CHAN_INFO_RAW)
>> + return -EINVAL;
>> +
>> + mutex_lock(&tsc->mlock);
>> +
>> + switch (chan->channel) {
>> + case 0:
>> + *val = tsc2007_xfer(tsc, READ_X);
>> + break;
>> + case 1:
>> + *val = tsc2007_xfer(tsc, READ_Y);
>> + break;
>> + case 2:
>> + *val = tsc2007_xfer(tsc, READ_Z1);
>> + break;
>> + case 3:
>> + *val = tsc2007_xfer(tsc, READ_Z2);
>> + break;
>> + case 4:
>> + *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX));
>> + break;
>> + case 5: {
>> + struct ts_event tc;
>> +
>> + tc.x = tsc2007_xfer(tsc, READ_X);
>> + tc.z1 = tsc2007_xfer(tsc, READ_Z1);
>> + tc.z2 = tsc2007_xfer(tsc, READ_Z2);
>> + *val = tsc2007_calculate_resistance(tsc, &tc);
>> + break;
>> + }
>> + case 6:
>> + *val = tsc2007_is_pen_down(tsc);
>> + break;
>> + case 7:
>> + *val = tsc2007_xfer(tsc,
>> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP0));
>> + break;
>> + case 8:
>> + *val = tsc2007_xfer(tsc,
>> + (ADC_ON_12BIT | TSC2007_MEASURE_TEMP1));
>> + break;
>> + }
>> +
>> + /* Prepare for next touch reading - power down ADC, enable PENIRQ */
>> + tsc2007_xfer(tsc, PWRDOWN);
>> +
>> + mutex_unlock(&tsc->mlock);
>> +
>> + ret = IIO_VAL_INT;
>> +
>> + return ret;
>> +}
>> +
>> +static const struct iio_info tsc2007_iio_info = {
>> + .read_raw = tsc2007_read_raw,
>> + .driver_module = THIS_MODULE,
>> +};
>> +
>> +int tsc2007_iio_configure(struct tsc2007 *ts)
>> +{
>> + int err;
>> + struct iio_dev *indio_dev;
>> + struct tsc2007_iio *iio;
>> +
>> + indio_dev = devm_iio_device_alloc(&ts->client->dev,
>> + sizeof(struct tsc2007_iio));
>> + if (!indio_dev) {
>> + dev_err(&ts->client->dev, "iio_device_alloc failed\n");
>> + return -ENOMEM;
>> + }
>> +
>> + iio = iio_priv(indio_dev);
>> + iio->ts = ts;
>> + ts->iio_dev = (void *) indio_dev;
>> +
>> + indio_dev->name = "tsc2007";
>> + indio_dev->dev.parent = &ts->client->dev;
>> + indio_dev->info = &tsc2007_iio_info;
>> + indio_dev->modes = INDIO_DIRECT_MODE;
>> + indio_dev->channels = tsc2007_iio_channel;
>> + indio_dev->num_channels = ARRAY_SIZE(tsc2007_iio_channel);
>> +
>> + err = iio_device_register(indio_dev);
>> + if (err < 0) {
>> + dev_err(&ts->client->dev, "iio_device_register() failed: %d\n",
>> + err);
>> + return err;
>> + }
>> +
>> + return 0;
>> +}
>> +EXPORT_SYMBOL(tsc2007_iio_configure);
>> +
>> +void tsc2007_iio_unconfigure(struct tsc2007 *ts)
>> +{
>> + struct iio_dev *indio_dev = ts->iio_dev;
>> +
>> + iio_device_unregister(indio_dev);
>> +}
>> +EXPORT_SYMBOL(tsc2007_iio_unconfigure);
>
> --
> Sent from my Android device with K-9 Mail. Please excuse my brevity.
^ permalink raw reply
* Re: [PATCH 1/4] bindings: net: stmmac: correct note about TSO
From: Alexandre Torgue @ 2016-11-24 17:42 UTC (permalink / raw)
To: Niklas Cassel, Rob Herring, Mark Rutland, David S. Miller,
Giuseppe CAVALLARO, Phil Reid, Niklas Cassel, Eric Engestrom
Cc: netdev-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1479911066-19752-1-git-send-email-niklass-VrBV9hrLPhE@public.gmane.org>
Hi Niklas,
On 11/23/2016 03:24 PM, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel-VrBV9hrLPhE@public.gmane.org>
>
> snps,tso was previously placed under AXI BUS Mode parameters,
> suggesting that the property should be in the stmmac-axi-config node.
>
> TSO (TCP Segmentation Offloading) has nothing to do with AXI BUS Mode
> parameters, and the parser actually expects it to be in the root node,
> not in the stmmac-axi-config.
>
> Also added a note about snps,tso only being available on GMAC4 and newer.
>
> Signed-off-by: Niklas Cassel <niklas.cassel-VrBV9hrLPhE@public.gmane.org>
> ---
> Documentation/devicetree/bindings/net/stmmac.txt | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
> index 41b49e6075f5..b95ff998ba73 100644
> --- a/Documentation/devicetree/bindings/net/stmmac.txt
> +++ b/Documentation/devicetree/bindings/net/stmmac.txt
> @@ -1,7 +1,7 @@
> * STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
>
> Required properties:
> -- compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
> +- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac"
> For backwards compatibility: "st,spear600-gmac" is also supported.
> - reg: Address and length of the register set for the device
> - interrupt-parent: Should be the phandle for the interrupt controller
> @@ -50,6 +50,8 @@ Optional properties:
> - snps,ps-speed: port selection speed that can be passed to the core when
> PCS is supported. For example, this is used in case of SGMII
> and MAC2MAC connection.
> +- snps,tso: this enables the TSO feature otherwise it will be managed by
> + MAC HW capability register. Only for GMAC4 and newer.
> - AXI BUS Mode parameters: below the list of all the parameters to program the
> AXI register inside the DMA module:
> - snps,lpi_en: enable Low Power Interface
> @@ -62,8 +64,6 @@ Optional properties:
> - snps,fb: fixed-burst
> - snps,mb: mixed-burst
> - snps,rb: rebuild INCRx Burst
> - - snps,tso: this enables the TSO feature otherwise it will be managed by
> - MAC HW capability register.
> - mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
>
> Examples:
>
Acked-by: <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
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^ permalink raw reply
* Re: [PATCH v8 3/8] drivers:input:tsc2007: add iio interface to read external ADC input and temperature
From: Jonathan Cameron @ 2016-11-24 17:38 UTC (permalink / raw)
To: H. Nikolaus Schaller, Sebastian Reichel, Dmitry Torokhov,
Mark Rutland, Benoît Cousson, Tony Lindgren, Russell King,
Arnd Bergmann, Michael Welling, Mika Penttilä,
Javier Martinez Canillas, Igor Grinberg, Andrew F. Davis,
Mark Brown, Jonathan Cameron, Rob Herring, Alexander Stein,
Eric Engestrom
Cc: linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
letux-kernel-S0jZdbWzriLCfDggNXIi3w,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
kernel-Jl6IXVxNIMRxAtABVqVhTwC/G2K4zDHf
In-Reply-To: <99f236df48b03b3188e12f94a20097f8440db7a5.1479823354.git.hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
On 22 November 2016 14:02:30 GMT+00:00, "H. Nikolaus Schaller" <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org> wrote:
>The tsc2007 chip not only has a resistive touch screen controller but
>also an external AUX adc imput which can be used for an ambient
>light sensor, battery voltage monitoring or any general purpose.
>
>Additionally it can measure the chip temperature.
>
>This extension provides an iio interface for these adc channels.
>
>Since it is not wasting much resources and is very straightforward,
>we simply provide all other adc channels as optional iio interfaces
>as weel. This can be used for debugging or special applications.
>
>This patch also splits the tsc2007 driver in several source files:
>tsc2007.h -- constants, structs and stubs
>tsc2007_core.c -- functional parts of the original driver
>tsc2007_iio.c -- the optional iio stuff
>
>Makefile magic allows to conditionally link the iio stuff
>if CONFIG_IIO=y or =m in a way that it works with
>CONFIG_TOUCHSCREEN_TSC2007=m.
>
>Signed-off-by: H. Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
>Reviewed-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>---
> drivers/input/touchscreen/Makefile | 7 +
>drivers/input/touchscreen/tsc2007.h | 116
>++++++++++++++++
> .../touchscreen/{tsc2007.c => tsc2007_core.c} | 95 +++----------
>drivers/input/touchscreen/tsc2007_iio.c | 150
>+++++++++++++++++++++
> 4 files changed, 294 insertions(+), 74 deletions(-)
> create mode 100644 drivers/input/touchscreen/tsc2007.h
> rename drivers/input/touchscreen/{tsc2007.c => tsc2007_core.c} (86%)
> create mode 100644 drivers/input/touchscreen/tsc2007_iio.c
>
>diff --git a/drivers/input/touchscreen/Makefile
>b/drivers/input/touchscreen/Makefile
>index 81b8645..3be0d19 100644
>--- a/drivers/input/touchscreen/Makefile
>+++ b/drivers/input/touchscreen/Makefile
>@@ -80,6 +80,13 @@ obj-$(CONFIG_TOUCHSCREEN_TSC_SERIO) += tsc40.o
> obj-$(CONFIG_TOUCHSCREEN_TSC200X_CORE) += tsc200x-core.o
> obj-$(CONFIG_TOUCHSCREEN_TSC2004) += tsc2004.o
> obj-$(CONFIG_TOUCHSCREEN_TSC2005) += tsc2005.o
>+tsc2007-y := tsc2007_core.o
>+ifeq ($(CONFIG_IIO),y)
>+tsc2007-y += tsc2007_iio.o
>+endif
>+ifeq ($(CONFIG_IIO),m)
>+tsc2007-y += tsc2007_iio.o
Not tsc2007-m ?
I don't follow how this works!
>+endif
> obj-$(CONFIG_TOUCHSCREEN_TSC2007) += tsc2007.o
> obj-$(CONFIG_TOUCHSCREEN_UCB1400) += ucb1400_ts.o
> obj-$(CONFIG_TOUCHSCREEN_WACOM_W8001) += wacom_w8001.o
>diff --git a/drivers/input/touchscreen/tsc2007.h
>b/drivers/input/touchscreen/tsc2007.h
>new file mode 100644
>index 0000000..c25932f
>--- /dev/null
>+++ b/drivers/input/touchscreen/tsc2007.h
>@@ -0,0 +1,116 @@
>+/*
>+ * Copyright (c) 2008 MtekVision Co., Ltd.
>+ * Kwangwoo Lee <kwlee-ec7hoAtq5SbSUeElwK9/Pw@public.gmane.org>
>+ *
>+ * Using code from:
>+ * - ads7846.c
>+ * Copyright (c) 2005 David Brownell
>+ * Copyright (c) 2006 Nokia Corporation
>+ * - corgi_ts.c
>+ * Copyright (C) 2004-2005 Richard Purdie
>+ * - omap_ts.[hc], ads7846.h, ts_osk.c
>+ * Copyright (C) 2002 MontaVista Software
>+ * Copyright (C) 2004 Texas Instruments
>+ * Copyright (C) 2005 Dirk Behme
>+ *
>+ * This program is free software; you can redistribute it and/or
>modify
>+ * it under the terms of the GNU General Public License version 2 as
>+ * published by the Free Software Foundation.
>+ */
>+
>+#include <linux/input/touchscreen.h>
>+
>+#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
>+#define TSC2007_MEASURE_AUX (0x2 << 4)
>+#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
>+#define TSC2007_ACTIVATE_XN (0x8 << 4)
>+#define TSC2007_ACTIVATE_YN (0x9 << 4)
>+#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
>+#define TSC2007_SETUP (0xb << 4)
>+#define TSC2007_MEASURE_X (0xc << 4)
>+#define TSC2007_MEASURE_Y (0xd << 4)
>+#define TSC2007_MEASURE_Z1 (0xe << 4)
>+#define TSC2007_MEASURE_Z2 (0xf << 4)
>+
>+#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
>+#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
>+#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
>+#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
>+
>+#define TSC2007_12BIT (0x0 << 1)
>+#define TSC2007_8BIT (0x1 << 1)
>+
>+#define MAX_12BIT ((1 << 12) - 1)
>+
>+#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
>+
>+#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
>+#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
>+#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
>+#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
>+#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
>+
>+struct ts_event {
>+ u16 x;
>+ u16 y;
>+ u16 z1, z2;
>+};
>+
>+struct tsc2007 {
>+ struct input_dev *input;
>+ char phys[32];
>+
>+ struct i2c_client *client;
>+
>+ u16 model;
>+ u16 x_plate_ohms;
>+
>+ struct touchscreen_properties prop;
>+
>+ bool report_resistance;
>+ u16 min_x;
>+ u16 min_y;
>+ u16 max_x;
>+ u16 max_y;
>+ u16 max_rt;
>+ unsigned long poll_period; /* in jiffies */
>+ int fuzzx;
>+ int fuzzy;
>+ int fuzzz;
>+
>+ unsigned int gpio;
>+ int irq;
>+
>+ wait_queue_head_t wait;
>+ bool stopped;
>+ bool pendown;
>+
>+ int (*get_pendown_state)(struct device *);
>+ void (*clear_penirq)(void);
>+
>+ struct mutex mlock;
>+ struct iio_dev *iio_dev; /* optional */
>+};
>+
>+int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd);
>+u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>+ struct ts_event *tc);
>+bool tsc2007_is_pen_down(struct tsc2007 *ts);
>+
>+#if IS_ENABLED(CONFIG_IIO)
>+
>+/* defined in tsc2007_iio.c */
>+int tsc2007_iio_configure(struct tsc2007 *ts);
>+void tsc2007_iio_unconfigure(struct tsc2007 *ts);
>+
>+#else /* CONFIG_IIO */
>+
>+static inline int tsc2007_iio_configure(struct tsc2007 *ts)
>+{
>+ return 0;
>+}
>+static inline void tsc2007_iio_unconfigure(struct tsc2007 *ts)
>+{
>+}
>+
>+#endif /* CONFIG_IIO */
>diff --git a/drivers/input/touchscreen/tsc2007.c
>b/drivers/input/touchscreen/tsc2007_core.c
>similarity index 86%
>rename from drivers/input/touchscreen/tsc2007.c
>rename to drivers/input/touchscreen/tsc2007_core.c
>index 76b462b..812ded8 100644
>--- a/drivers/input/touchscreen/tsc2007.c
>+++ b/drivers/input/touchscreen/tsc2007_core.c
>@@ -27,79 +27,11 @@
> #include <linux/i2c.h>
> #include <linux/i2c/tsc2007.h>
> #include <linux/of_device.h>
>-#include <linux/of.h>
> #include <linux/of_gpio.h>
>-#include <linux/input/touchscreen.h>
>-
>-#define TSC2007_MEASURE_TEMP0 (0x0 << 4)
>-#define TSC2007_MEASURE_AUX (0x2 << 4)
>-#define TSC2007_MEASURE_TEMP1 (0x4 << 4)
>-#define TSC2007_ACTIVATE_XN (0x8 << 4)
>-#define TSC2007_ACTIVATE_YN (0x9 << 4)
>-#define TSC2007_ACTIVATE_YP_XN (0xa << 4)
>-#define TSC2007_SETUP (0xb << 4)
>-#define TSC2007_MEASURE_X (0xc << 4)
>-#define TSC2007_MEASURE_Y (0xd << 4)
>-#define TSC2007_MEASURE_Z1 (0xe << 4)
>-#define TSC2007_MEASURE_Z2 (0xf << 4)
>-
>-#define TSC2007_POWER_OFF_IRQ_EN (0x0 << 2)
>-#define TSC2007_ADC_ON_IRQ_DIS0 (0x1 << 2)
>-#define TSC2007_ADC_OFF_IRQ_EN (0x2 << 2)
>-#define TSC2007_ADC_ON_IRQ_DIS1 (0x3 << 2)
>-
>-#define TSC2007_12BIT (0x0 << 1)
>-#define TSC2007_8BIT (0x1 << 1)
>-
>-#define MAX_12BIT ((1 << 12) - 1)
>-
>-#define ADC_ON_12BIT (TSC2007_12BIT | TSC2007_ADC_ON_IRQ_DIS0)
>-
>-#define READ_Y (ADC_ON_12BIT | TSC2007_MEASURE_Y)
>-#define READ_Z1 (ADC_ON_12BIT | TSC2007_MEASURE_Z1)
>-#define READ_Z2 (ADC_ON_12BIT | TSC2007_MEASURE_Z2)
>-#define READ_X (ADC_ON_12BIT | TSC2007_MEASURE_X)
>-#define PWRDOWN (TSC2007_12BIT | TSC2007_POWER_OFF_IRQ_EN)
>-
>-struct ts_event {
>- u16 x;
>- u16 y;
>- u16 z1, z2;
>-};
>-
>-struct tsc2007 {
>- struct input_dev *input;
>- char phys[32];
>-
>- struct i2c_client *client;
>-
>- u16 model;
>- u16 x_plate_ohms;
>-
>- struct touchscreen_properties prop;
>-
>- bool report_resistance;
>- u16 min_x;
>- u16 min_y;
>- u16 max_x;
>- u16 max_y;
>- u16 max_rt;
>- unsigned long poll_period; /* in jiffies */
>- int fuzzx;
>- int fuzzy;
>- int fuzzz;
>-
>- unsigned gpio;
>- int irq;
>-
>- wait_queue_head_t wait;
>- bool stopped;
>+#include "tsc2007.h"
>
>- int (*get_pendown_state)(struct device *);
>- void (*clear_penirq)(void);
>-};
>
>-static inline int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
>+int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd)
> {
> s32 data;
> u16 val;
>@@ -137,7 +69,7 @@ static void tsc2007_read_values(struct tsc2007 *tsc,
>struct ts_event *tc)
> tsc2007_xfer(tsc, PWRDOWN);
> }
>
>-static u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
>+u32 tsc2007_calculate_resistance(struct tsc2007 *tsc,
> struct ts_event *tc)
> {
> u32 rt = 0;
>@@ -158,7 +90,7 @@ static u32 tsc2007_calculate_resistance(struct
>tsc2007 *tsc,
> return rt;
> }
>
>-static bool tsc2007_is_pen_down(struct tsc2007 *ts)
>+bool tsc2007_is_pen_down(struct tsc2007 *ts)
> {
> /*
> * NOTE: We can't rely on the pressure to determine the pen down
>@@ -191,7 +123,10 @@ static irqreturn_t tsc2007_soft_irq(int irq, void
>*handle)
> while (!ts->stopped && tsc2007_is_pen_down(ts)) {
>
> /* pen is down, continue with the measurement */
>+
>+ mutex_lock(&ts->mlock);
> tsc2007_read_values(ts, &tc);
>+ mutex_unlock(&ts->mlock);
>
> rt = tsc2007_calculate_resistance(ts, &tc);
>
>@@ -441,7 +376,8 @@ static void tsc2007_call_exit_platform_hw(void
>*data)
> static int tsc2007_probe(struct i2c_client *client,
> const struct i2c_device_id *id)
> {
>- const struct tsc2007_platform_data *pdata =
>dev_get_platdata(&client->dev);
>+ const struct tsc2007_platform_data *pdata =
>+ dev_get_platdata(&client->dev);
> struct tsc2007 *ts;
> struct input_dev *input_dev;
> int err;
>@@ -463,7 +399,9 @@ static int tsc2007_probe(struct i2c_client *client,
> ts->client = client;
> ts->irq = client->irq;
> ts->input = input_dev;
>+
> init_waitqueue_head(&ts->wait);
>+ mutex_init(&ts->mlock);
>
> snprintf(ts->phys, sizeof(ts->phys),
> "%s/input0", dev_name(&client->dev));
>@@ -534,7 +472,7 @@ static int tsc2007_probe(struct i2c_client *client,
> if (err < 0) {
> dev_err(&client->dev,
> "Failed to setup chip: %d\n", err);
>- return err; /* usually, chip does not respond */
>+ return err; /* chip does not respond */
> }
>
> err = input_register_device(input_dev);
>@@ -544,6 +482,14 @@ static int tsc2007_probe(struct i2c_client
>*client,
> return err;
> }
>
>+ return tsc2007_iio_configure(ts);
>+}
>+
>+static int tsc2007_remove(struct i2c_client *client)
>+{
>+ struct tsc2007 *ts = i2c_get_clientdata(client);
>+
>+ tsc2007_iio_unconfigure(ts);
> return 0;
> }
>
>@@ -569,6 +515,7 @@ static struct i2c_driver tsc2007_driver = {
> },
> .id_table = tsc2007_idtable,
> .probe = tsc2007_probe,
>+ .remove = tsc2007_remove,
> };
>
> module_i2c_driver(tsc2007_driver);
>diff --git a/drivers/input/touchscreen/tsc2007_iio.c
>b/drivers/input/touchscreen/tsc2007_iio.c
>new file mode 100644
>index 0000000..ed79944
>--- /dev/null
>+++ b/drivers/input/touchscreen/tsc2007_iio.c
>@@ -0,0 +1,150 @@
>+/*
>+ * Copyright (c) 2016 Golden Delicious Comp. GmbH&Co. KG
>+ * Nikolaus Schaller <hns-xXXSsgcRVICgSpxsJD1C4w@public.gmane.org>
>+ *
>+ * This program is free software; you can redistribute it and/or
>modify
>+ * it under the terms of the GNU General Public License version 2 as
>+ * published by the Free Software Foundation.
>+ */
>+
>+#include <linux/i2c.h>
>+#include <linux/iio/iio.h>
>+#include "tsc2007.h"
>+
>+struct tsc2007_iio {
>+ struct tsc2007 *ts;
>+};
>+
>+#define TSC2007_CHAN_IIO(_chan, _name, _type, _chan_info) \
>+{ \
>+ .datasheet_name = _name, \
>+ .type = _type, \
>+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
>+ BIT(_chan_info), \
>+ .indexed = 1, \
>+ .channel = _chan, \
>+}
>+
>+static const struct iio_chan_spec tsc2007_iio_channel[] = {
>+ TSC2007_CHAN_IIO(0, "x", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>+ TSC2007_CHAN_IIO(1, "y", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>+ TSC2007_CHAN_IIO(2, "z1", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>+ TSC2007_CHAN_IIO(3, "z2", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>+ TSC2007_CHAN_IIO(4, "adc", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
>+ TSC2007_CHAN_IIO(5, "rt", IIO_VOLTAGE, IIO_CHAN_INFO_RAW), /* Ohms?
>*/
>+ TSC2007_CHAN_IIO(6, "pen", IIO_PRESSURE, IIO_CHAN_INFO_RAW),
>+ TSC2007_CHAN_IIO(7, "temp0", IIO_TEMP, IIO_CHAN_INFO_RAW),
>+ TSC2007_CHAN_IIO(8, "temp1", IIO_TEMP, IIO_CHAN_INFO_RAW),
>+};
>+
>+static int tsc2007_read_raw(struct iio_dev *indio_dev,
>+ struct iio_chan_spec const *chan, int *val, int *val2, long mask)
>+{
>+ struct tsc2007_iio *iio = iio_priv(indio_dev);
>+ struct tsc2007 *tsc = iio->ts;
>+ int adc_chan = chan->channel;
>+ int ret = 0;
>+
>+ if (adc_chan >= ARRAY_SIZE(tsc2007_iio_channel))
>+ return -EINVAL;
>+
>+ if (mask != IIO_CHAN_INFO_RAW)
>+ return -EINVAL;
>+
>+ mutex_lock(&tsc->mlock);
>+
>+ switch (chan->channel) {
>+ case 0:
>+ *val = tsc2007_xfer(tsc, READ_X);
>+ break;
>+ case 1:
>+ *val = tsc2007_xfer(tsc, READ_Y);
>+ break;
>+ case 2:
>+ *val = tsc2007_xfer(tsc, READ_Z1);
>+ break;
>+ case 3:
>+ *val = tsc2007_xfer(tsc, READ_Z2);
>+ break;
>+ case 4:
>+ *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX));
>+ break;
>+ case 5: {
>+ struct ts_event tc;
>+
>+ tc.x = tsc2007_xfer(tsc, READ_X);
>+ tc.z1 = tsc2007_xfer(tsc, READ_Z1);
>+ tc.z2 = tsc2007_xfer(tsc, READ_Z2);
>+ *val = tsc2007_calculate_resistance(tsc, &tc);
>+ break;
>+ }
>+ case 6:
>+ *val = tsc2007_is_pen_down(tsc);
>+ break;
>+ case 7:
>+ *val = tsc2007_xfer(tsc,
>+ (ADC_ON_12BIT | TSC2007_MEASURE_TEMP0));
>+ break;
>+ case 8:
>+ *val = tsc2007_xfer(tsc,
>+ (ADC_ON_12BIT | TSC2007_MEASURE_TEMP1));
>+ break;
>+ }
>+
>+ /* Prepare for next touch reading - power down ADC, enable PENIRQ */
>+ tsc2007_xfer(tsc, PWRDOWN);
>+
>+ mutex_unlock(&tsc->mlock);
>+
>+ ret = IIO_VAL_INT;
>+
>+ return ret;
>+}
>+
>+static const struct iio_info tsc2007_iio_info = {
>+ .read_raw = tsc2007_read_raw,
>+ .driver_module = THIS_MODULE,
>+};
>+
>+int tsc2007_iio_configure(struct tsc2007 *ts)
>+{
>+ int err;
>+ struct iio_dev *indio_dev;
>+ struct tsc2007_iio *iio;
>+
>+ indio_dev = devm_iio_device_alloc(&ts->client->dev,
>+ sizeof(struct tsc2007_iio));
>+ if (!indio_dev) {
>+ dev_err(&ts->client->dev, "iio_device_alloc failed\n");
>+ return -ENOMEM;
>+ }
>+
>+ iio = iio_priv(indio_dev);
>+ iio->ts = ts;
>+ ts->iio_dev = (void *) indio_dev;
>+
>+ indio_dev->name = "tsc2007";
>+ indio_dev->dev.parent = &ts->client->dev;
>+ indio_dev->info = &tsc2007_iio_info;
>+ indio_dev->modes = INDIO_DIRECT_MODE;
>+ indio_dev->channels = tsc2007_iio_channel;
>+ indio_dev->num_channels = ARRAY_SIZE(tsc2007_iio_channel);
>+
>+ err = iio_device_register(indio_dev);
>+ if (err < 0) {
>+ dev_err(&ts->client->dev, "iio_device_register() failed: %d\n",
>+ err);
>+ return err;
>+ }
>+
>+ return 0;
>+}
>+EXPORT_SYMBOL(tsc2007_iio_configure);
>+
>+void tsc2007_iio_unconfigure(struct tsc2007 *ts)
>+{
>+ struct iio_dev *indio_dev = ts->iio_dev;
>+
>+ iio_device_unregister(indio_dev);
>+}
>+EXPORT_SYMBOL(tsc2007_iio_unconfigure);
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
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^ permalink raw reply
* Re: [PATCH v28 9/9] Documentation: dt: chosen properties for arm64 kdump
From: Catalin Marinas @ 2016-11-24 17:14 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8
Cc: AKASHI Takahiro, will.deacon-5wv7dgnIgG8,
devicetree-u79uwXL29TY76Z2rM5mHXA, geoff-wEGCiKHe2LqWVfeAwA7xHQ,
kexec-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, james.morse-5wv7dgnIgG8,
bauerman-23VcF4HTsmIX0ybBhKVfKdBPR1lH4CV8,
dyoung-H+wXaHxf7aLQT0dZR+AlfA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20161124095944.7167-1-takahiro.akashi-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
On Thu, Nov 24, 2016 at 06:59:44PM +0900, AKASHI Takahiro wrote:
> From: James Morse <james.morse-5wv7dgnIgG8@public.gmane.org>
>
> Add documentation for
> linux,crashkernel-base and crashkernel-size,
> linux,usable-memory-range
> linux,elfcorehdr
> used by arm64 kdump to decribe the kdump reserved area, and
> the elfcorehdr's location within it.
>
> Signed-off-by: James Morse <james.morse-5wv7dgnIgG8@public.gmane.org>
> [takahiro.akashi-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org: added "linux,crashkernel-base" and "-size" ]
> Signed-off-by: AKASHI Takahiro <takahiro.akashi-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Rob, Mark, are you ok with this patch?
--
Catalin
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^ permalink raw reply
* RE: [PATCH 0/3] arm64: dts: r8a7796: Add CAN/CAN FD support
From: Chris Paterson @ 2016-11-24 17:12 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Simon Horman, Marc Kleine-Budde, Wolfgang Grandegger, Magnus Damm,
Rob Herring, Mark Rutland, Ramesh Shanmugasundaram,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org
In-Reply-To: <CAMuHMdXO=uFuJCXPjkdYB_CeyfPMqy6cMrOW=s1DZzcJ9Gp33A@mail.gmail.com>
Hello Geert,
From: geert.uytterhoeven@gmail.com
Sent: 24 November 2016 16:42
> Hi Chris,
>
> On Thu, Nov 24, 2016 at 3:25 PM, Chris Paterson
> <Chris.Paterson2@renesas.com> wrote:
> > From: Simon Horman [mailto:horms@verge.net.au]
> > Sent: 24 November 2016 10:18
> >> On Thu, Nov 24, 2016 at 10:05:08AM +0000, Chris Paterson wrote:
> >> > From: Simon Horman [mailto:horms@verge.net.au]
> >> > > Regarding the arch/arm64/boot/dts/renesas/ portion, I would like
> >> > > some consideration given to what effect enabling memory above 4Gb
> >> > > (64bit
> >> > > addressing) would have.
> >> >
> >> > Can you give me some guidance here? I'm not sure what you're
> >> > referring to. As far as I know the DT reg definition here is
> >> > 64-bit, or are you referring to DMA usage? If the later, neither CAN
> driver uses DMA.
> >>
> >> Sorry for not being clearer.
> >>
> >> What I would like to know is if there are any problems in the CAN
> >> driver or hardware that would prevent it from functioning with memory
> >> that requires 64bit addressing present.
> >>
> >> If the CAN hardware cannot use DMA then DMA doesn't need to be
> taken
> >> into account. But if it DMA could be enabled in future for CAN, for
> >> example after some driver enhancements, then it would be good to know
> >> if 64bit memory can be supported - if not it would imply DMA cannot be
> enabled.
> >
> > Thank you for the clarification.
> >
> > The CAN interface for r8a7795/6 does not support DMA.
> >
> > With CAN FD there is currently a H/W issue that means DMA is unusable.
>
> Is that issue present on R-Car M3-W, or only on R-Car H3 ES1.x?
Both
>
> > Potentially this issue could be fixed in the future and DMA support
> > could be added to the driver. If this happens I can see no reason why
> > the CAN FD IP wouldn't be able to handle DMA transfers when using 64bit
> addressing.
>
> Yep, AFAIK it uses SYS-DMAC, which supports 64-bit addressing.
Yep
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
^ permalink raw reply
* Re: [RFC PATCH net v2 0/3] Fix OdroidC2 Gigabit Tx link issue
From: Martin Blumenstingl @ 2016-11-24 17:10 UTC (permalink / raw)
To: Jerome Brunet
Cc: netdev-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA,
Florian Fainelli, Carlo Caione, Kevin Hilman, Giuseppe Cavallaro,
Alexandre TORGUE, Andre Roth, Neil Armstrong,
linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1480003306.17538.137.camel-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
On Thu, Nov 24, 2016 at 5:01 PM, Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> wrote:
> On Thu, 2016-11-24 at 15:40 +0100, Martin Blumenstingl wrote:
>> Hi Jerome,
>>
>> On Mon, Nov 21, 2016 at 4:35 PM, Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
>> wrote:
>> >
>> > This patchset fixes an issue with the OdroidC2 board (DWMAC +
>> > RTL8211F).
>> > Initially reported as a low Tx throughput issue at gigabit speed,
>> > the
>> > platform enters LPI too often. This eventually break the link (both
>> > Tx
>> > and Rx), and require to bring the interface down and up again to
>> > get the
>> > Rx path working again.
>> >
>> > The root cause of this issue is not fully understood yet but
>> > disabling EEE
>> > advertisement on the PHY prevent this feature to be negotiated.
>> > With this change, the link is stable and reliable, with the
>> > expected
>> > throughput performance.
>> I have just sent a series which allows configuring the TX delay on
>> the
>> MAC (dwmac-meson8b glue) side: [0]
>> Disabling the TX delay generated by the MAC fixes TX throughput for
>> me, even when leaving EEE enabled in the RTL8211F PHY driver!
>>
>> Unfortunately the RTL8211F PHY is a black-box for the community
>> because there is no public datasheeet available.
>> *maybe* (pure speculation!) they're enabling the TX delay based on
>> some internal magic only when EEE is enabled.
>
> Hi already tried acting on the register setting the TX_delay. I also
> tried on the PHY. I never been able to improve situation on the
> Odroic2. Only disabling EEE improved the situation.
OK, thanks for clarifying this!
> To make sure, i tried again with your patch but the result remains
> unchanged. With Tx_delay disabled (either the mac or the phy), the
> situation is even worse, it seems that nothing gets through
This is interesting, because in your case you should have a 4ns TX
delay (2ns from the MAC and presumably 2ns from the PHY).
Maybe that is also the reason why the TX delay is configurable in 2ns
steps in PRG_ETHERNET0 on Amlogic SoCs.
out of curiosity: have you tried setting a 4ns (half clock-cycle) TX
delay for the MAC and disabling it in the PHY?
Regards,
Martin
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^ permalink raw reply
* Re: [net-next PATCH v1 0/2] stmmac: dwmac-meson8b: configurable RGMII TX delay
From: Martin Blumenstingl @ 2016-11-24 17:05 UTC (permalink / raw)
To: Jerome Brunet, f.fainelli-Re5JQEeQqe8AvxtiuMwx3w
Cc: linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, netdev-u79uwXL29TY76Z2rM5mHXA,
davem-fT/PcQaiUtIeIZ0/mPfg9Q, khilman-rdvid1DuHRBWk0Htik3J/w,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
alexandre.torgue-qxv4g6HH51o, peppe.cavallaro-qxv4g6HH51o,
carlo-KA+7E9HrN00dnm+yROfE0A
In-Reply-To: <1480002964.17538.131.camel-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
On Thu, Nov 24, 2016 at 4:56 PM, Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> wrote:
> On Thu, 2016-11-24 at 15:34 +0100, Martin Blumenstingl wrote:
>> Currently the dwmac-meson8b stmmac glue driver uses a hardcoded 1/4
>> cycle TX clock delay. This seems to work fine for many boards (for
>> example Odroid-C2 or Amlogic's reference boards) but there are some
>> others where TX traffic is simply broken.
>> There are probably multiple reasons why it's working on some boards
>> while it's broken on others:
>> - some of Amlogic's reference boards are using a Micrel PHY
>> - hardware circuit design
>> - maybe more...
>>
>> This raises a question though:
>> Which device is supposed to enable the TX delay when both MAC and PHY
>> support it? And should we implement it for each PHY / MAC separately
>> or should we think about a more generic solution (currently it's not
>> possible to disable the TX delay generated by the RTL8211F PHY via
>> devicetree when using phy-mode "rgmii")?
>
> Actually you can skip the part which activate the Tx-delay on the phy
> by setting "phy-mode = "rgmii-id" instead of "rgmii"
>
> phy->interface will no longer be PHY_INTERFACE_MODE_RGMII
> but PHY_INTERFACE_MODE_RGMII_ID.
unfortunately this is not true for RTL8211F (I did my previous tests
with the same expectation in mind)!
the code seems to suggest that TX-delay is disabled whenever mode !=
PHY_INTERFACE_MODE_RGMII.
BUT: on my device RTL8211F_TX_DELAY is set even before
"phy_write(phydev, 0x11, reg);"!
Based on what I found it seems that rgmii-id, rgmii-txid and
rgmii-rxid are supposed to be handled by the PHY.
That would mean that we have two problems here:
1) drivers/net/phy/realtek.c:rtl8211f_config_init should check for
PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID and
enable the TX-delay in that case - otherwise explicitly disable it
2) dwmac-meson8b.c should only use the configured TX-delay for
PHY_INTERFACE_MODE_RGMII
@Florian: could you please share your thoughts on this (who handles
the TX delay in which case)?
Regards,
Martin
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^ permalink raw reply
* Re: Re: [RFC PATCH 0/5] arm64: Allwinner H5 support
From: Ian Campbell @ 2016-11-24 17:03 UTC (permalink / raw)
To: andre.przywara-5wv7dgnIgG8, Maxime Ripard
Cc: Chen-Yu Tsai, Icenowy Zheng, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Mark Rutland,
Rob Herring, devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <560f873c-7ad9-5614-21f6-489879380ebe-5wv7dgnIgG8@public.gmane.org>
On Thu, 2016-11-24 at 11:05 +0000, Andre Przywara wrote:
>
> > I don't have any major comments but I guess it all depends on the DT
> > maintainers view on the symbolic link to share the DTSI.
>
> I am curious too ;-)
> But I saw symlinks for the RaspberryPi 3 (check
> arch/arm64/boot/dts/broadcom) and VExpress, so I picked that low hanging
> fruit ;-)
See http://git.kernel.org/torvalds/linux/c/8ee57b8182c4 and the ML
discussion around the posting of that for some background on why the
symlinks are being used in preference to #include or /include/.
IIRC there was some further discussion on some lists when http://git.ke
rnel.org/torvalds/linux/c/76aa75916880 was posted too.
Ian.
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^ permalink raw reply
* Re: [net-next PATCH v1 1/2] net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac
From: Martin Blumenstingl @ 2016-11-24 16:52 UTC (permalink / raw)
To: Andrew Lunn
Cc: linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, netdev-u79uwXL29TY76Z2rM5mHXA,
davem-fT/PcQaiUtIeIZ0/mPfg9Q, khilman-rdvid1DuHRBWk0Htik3J/w,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
alexandre.torgue-qxv4g6HH51o, peppe.cavallaro-qxv4g6HH51o,
carlo-KA+7E9HrN00dnm+yROfE0A, jbrunet-rdvid1DuHRBWk0Htik3J/w
In-Reply-To: <20161124154858.GB20455-g2DYL2Zd6BY@public.gmane.org>
Hi Andrew,
On Thu, Nov 24, 2016 at 4:48 PM, Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> wrote:
>> The configuration values are provided as preprocessor macros to make the
>> devicetree files easier to read.
>
> Hi Martin
>
> If i'm reading the code/comments correctly, you can set the delay to
> 0, 2, 4 or 6ns? So calling this property amlogic,tx-delay-ns would be
> even easier to read.
indeed, this sounds like a very nice idea (as it moves the calculation
from the programmer's brain to dwmac-meson8b.c)!
I'll send an updated version once I received enough feedback (in case
something else is wrong with the patches)
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^ permalink raw reply
* Re: [PATCH 0/3] arm64: dts: r8a7796: Add CAN/CAN FD support
From: Geert Uytterhoeven @ 2016-11-24 16:41 UTC (permalink / raw)
To: Chris Paterson
Cc: Simon Horman, Marc Kleine-Budde, Wolfgang Grandegger, Magnus Damm,
Rob Herring, Mark Rutland, Ramesh Shanmugasundaram,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-can-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <HK2PR0601MB1329C747CA5C6B5222C02C3FB7B60-5BHi1SMfQIfsvBovKiDY8NK/flDYrvD0nBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
Hi Chris,
On Thu, Nov 24, 2016 at 3:25 PM, Chris Paterson
<Chris.Paterson2-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org> wrote:
> From: Simon Horman [mailto:horms-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org]
> Sent: 24 November 2016 10:18
>> On Thu, Nov 24, 2016 at 10:05:08AM +0000, Chris Paterson wrote:
>> > From: Simon Horman [mailto:horms-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org]
>> > > Regarding the arch/arm64/boot/dts/renesas/ portion, I would like
>> > > some consideration given to what effect enabling memory above 4Gb
>> > > (64bit
>> > > addressing) would have.
>> >
>> > Can you give me some guidance here? I'm not sure what you're referring
>> > to. As far as I know the DT reg definition here is 64-bit, or are you
>> > referring to DMA usage? If the later, neither CAN driver uses DMA.
>>
>> Sorry for not being clearer.
>>
>> What I would like to know is if there are any problems in the CAN driver or
>> hardware that would prevent it from functioning with memory that requires
>> 64bit addressing present.
>>
>> If the CAN hardware cannot use DMA then DMA doesn't need to be taken
>> into account. But if it DMA could be enabled in future for CAN, for example
>> after some driver enhancements, then it would be good to know if 64bit
>> memory can be supported - if not it would imply DMA cannot be enabled.
>
> Thank you for the clarification.
>
> The CAN interface for r8a7795/6 does not support DMA.
>
> With CAN FD there is currently a H/W issue that means DMA is unusable.
Is that issue present on R-Car M3-W, or only on R-Car H3 ES1.x?
> Potentially this issue could be fixed in the future and DMA support could
> be added to the driver. If this happens I can see no reason why the CAN FD
> IP wouldn't be able to handle DMA transfers when using 64bit addressing.
Yep, AFAIK it uses SYS-DMAC, which supports 64-bit addressing.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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