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* Re: [PATCH v4 6/7] IIO: add STM32 timer trigger driver
From: Benjamin Gaignard @ 2016-12-07 11:00 UTC (permalink / raw)
  To: Lee Jones
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, Mark Rutland,
	alexandre.torgue-qxv4g6HH51o, devicetree-u79uwXL29TY76Z2rM5mHXA,
	Linux Kernel Mailing List, Thierry Reding,
	linux-pwm-u79uwXL29TY76Z2rM5mHXA, Jonathan Cameron,
	knaack.h-Mmb7MZpHnFY, Lars-Peter Clausen, Peter Meerwald-Stadler,
	linux-iio-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	Fabrice Gasnier, Gerald Baeza, Arnaud Pouliquen, Linus Walleij,
	Linaro Kernel Mailman List, Benjamin Gaignard
In-Reply-To: <20161207105002.GA3625-Re9dqnLqz4GzQB+pC5nmwQ@public.gmane.org>

2016-12-07 11:50 GMT+01:00 Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>:
> On Tue, 06 Dec 2016, Benjamin Gaignard wrote:
>
>> [snip]
>> >> +
>> >> +static const char * const triggers0[] = {
>> >> +     TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers1[] = {
>> >> +     TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers2[] = {
>> >> +     TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers3[] = {
>> >> +     TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers4[] = {
>> >> +     TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers5[] = {
>> >> +     TIM6_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers6[] = {
>> >> +     TIM7_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers7[] = {
>> >> +     TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers8[] = {
>> >> +     TIM9_TRGO, TIM9_CH1, TIM9_CH2, NULL,
>> >> +};
>> >> +
>> >> +static const char * const triggers9[] = {
>> >> +     TIM12_TRGO, TIM12_CH1, TIM12_CH2, NULL,
>> >> +};
>> >> +
>> >> +static const void *triggers_table[] = {
>> >> +     triggers0,
>> >> +     triggers1,
>> >> +     triggers2,
>> >> +     triggers3,
>> >> +     triggers4,
>> >> +     triggers5,
>> >> +     triggers6,
>> >> +     triggers7,
>> >> +     triggers8,
>> >> +     triggers9,
>> >> +};
>> >
>> > What about:
>> >
>> > static const char * const triggers[][] = {
>> >         { TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4, NULL },
>> >         { TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4, NULL },
>> >         { TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4, NULL },
>> >         { TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4, NULL },
>> >         { TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4, NULL },
>> >         { TIM6_TRGO, NULL },
>> >         { TIM7_TRGO, NULL },
>> >         { TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4, NULL },
>> >         { TIM9_TRGO, TIM9_CH1, TIM9_CH2, NULL },
>> >         { TIM12_TRGO, TIM12_CH1, TIM12_CH2, NULL }
>> > };
>>
>> I can't because the second dimension of the array isn't fix.
>> I could have between 2 and 6 elements per row... to create a dual dimension
>> array I would have to add NULL entries like that:
>>
>> #define MAX_TRIGGERS 6
>>
>> static const void *triggers_table[][MAX_TRIGGERS] = {
>> { TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4, NULL,},
>> { TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4, NULL,},
>> { TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4, NULL,},
>> { TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4, NULL,},
>> { TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4, NULL,},
>> { TIM6_TRGO, NULL,     NULL,     NULL,     NULL,     NULL,},
>> { TIM7_TRGO, NULL,     NULL,     NULL,     NULL,     NULL,},
>> { TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4, NULL,},
>> { TIM9_TRGO, TIM9_CH1, TIM9_CH2, NULL,     NULL,     NULL,},
>> { TIM12_TRGO, TIM12_CH1, TIM12_CH2, NULL,  NULL,     NULL,},
>> };
>
> It was just an idea, not a tested implementation.
>
> I don't understand why you have to pad with NULLs, but either way, it
> looks much better than before and saves lots of lines of code.

I have tested it this morning and it works fine so I will include it in v5.
I use NULL as limit when iterate in the table and for table padding too.

>
>> >> +static const char * const valids0[] = {
>> >> +     TIM5_TRGO, TIM2_TRGO, TIM4_TRGO, TIM3_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const valids1[] = {
>> >> +     TIM1_TRGO, TIM8_TRGO, TIM3_TRGO, TIM4_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const valids2[] = {
>> >> +     TIM1_TRGO, TIM8_TRGO, TIM5_TRGO, TIM4_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const valids3[] = {
>> >> +     TIM1_TRGO, TIM2_TRGO, TIM3_TRGO, TIM8_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char *const valids4[] = {
>> >> +     TIM2_TRGO, TIM3_TRGO, TIM4_TRGO, TIM8_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const valids7[] = {
>> >> +     TIM1_TRGO, TIM2_TRGO, TIM4_TRGO, TIM5_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const valids8[] = {
>> >> +     TIM2_TRGO, TIM3_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const char * const valids9[] = {
>> >> +     TIM4_TRGO, TIM5_TRGO, NULL,
>> >> +};
>> >> +
>> >> +static const void *valids_table[] = {
>> >> +     valids0,
>> >> +     valids1,
>> >> +     valids2,
>> >> +     valids3,
>> >> +     valids4,
>> >> +     NULL,
>> >> +     NULL,
>> >> +     valids7,
>> >> +     valids8,
>> >> +     valids9,
>> >> +};
>> >
>> > Same here.
>> >
>
> --
> Lee Jones
> Linaro STMicroelectronics Landing Team Lead
> Linaro.org │ Open source software for ARM SoCs
> Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply

* Re: [PATCH v4 6/7] IIO: add STM32 timer trigger driver
From: Lee Jones @ 2016-12-07 10:50 UTC (permalink / raw)
  To: Benjamin Gaignard
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, Mark Rutland,
	alexandre.torgue-qxv4g6HH51o, devicetree-u79uwXL29TY76Z2rM5mHXA,
	Linux Kernel Mailing List, Thierry Reding,
	linux-pwm-u79uwXL29TY76Z2rM5mHXA, Jonathan Cameron,
	knaack.h-Mmb7MZpHnFY, Lars-Peter Clausen, Peter Meerwald-Stadler,
	linux-iio-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	Fabrice Gasnier, Gerald Baeza, Arnaud Pouliquen, Linus Walleij,
	Linaro Kernel Mailman List, Benjamin Gaignard
In-Reply-To: <CA+M3ks6fxCucmaY0OgpMb_opA=YLrowijJ0YQ+imeprhWg6N_w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On Tue, 06 Dec 2016, Benjamin Gaignard wrote:

> [snip]
> >> +
> >> +static const char * const triggers0[] = {
> >> +     TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4, NULL,
> >> +};
> >> +
> >> +static const char * const triggers1[] = {
> >> +     TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4, NULL,
> >> +};
> >> +
> >> +static const char * const triggers2[] = {
> >> +     TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4, NULL,
> >> +};
> >> +
> >> +static const char * const triggers3[] = {
> >> +     TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4, NULL,
> >> +};
> >> +
> >> +static const char * const triggers4[] = {
> >> +     TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4, NULL,
> >> +};
> >> +
> >> +static const char * const triggers5[] = {
> >> +     TIM6_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const triggers6[] = {
> >> +     TIM7_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const triggers7[] = {
> >> +     TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4, NULL,
> >> +};
> >> +
> >> +static const char * const triggers8[] = {
> >> +     TIM9_TRGO, TIM9_CH1, TIM9_CH2, NULL,
> >> +};
> >> +
> >> +static const char * const triggers9[] = {
> >> +     TIM12_TRGO, TIM12_CH1, TIM12_CH2, NULL,
> >> +};
> >> +
> >> +static const void *triggers_table[] = {
> >> +     triggers0,
> >> +     triggers1,
> >> +     triggers2,
> >> +     triggers3,
> >> +     triggers4,
> >> +     triggers5,
> >> +     triggers6,
> >> +     triggers7,
> >> +     triggers8,
> >> +     triggers9,
> >> +};
> >
> > What about:
> >
> > static const char * const triggers[][] = {
> >         { TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4, NULL },
> >         { TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4, NULL },
> >         { TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4, NULL },
> >         { TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4, NULL },
> >         { TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4, NULL },
> >         { TIM6_TRGO, NULL },
> >         { TIM7_TRGO, NULL },
> >         { TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4, NULL },
> >         { TIM9_TRGO, TIM9_CH1, TIM9_CH2, NULL },
> >         { TIM12_TRGO, TIM12_CH1, TIM12_CH2, NULL }
> > };
> 
> I can't because the second dimension of the array isn't fix.
> I could have between 2 and 6 elements per row... to create a dual dimension
> array I would have to add NULL entries like that:
> 
> #define MAX_TRIGGERS 6
> 
> static const void *triggers_table[][MAX_TRIGGERS] = {
> { TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4, NULL,},
> { TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4, NULL,},
> { TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4, NULL,},
> { TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4, NULL,},
> { TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4, NULL,},
> { TIM6_TRGO, NULL,     NULL,     NULL,     NULL,     NULL,},
> { TIM7_TRGO, NULL,     NULL,     NULL,     NULL,     NULL,},
> { TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4, NULL,},
> { TIM9_TRGO, TIM9_CH1, TIM9_CH2, NULL,     NULL,     NULL,},
> { TIM12_TRGO, TIM12_CH1, TIM12_CH2, NULL,  NULL,     NULL,},
> };

It was just an idea, not a tested implementation.

I don't understand why you have to pad with NULLs, but either way, it
looks much better than before and saves lots of lines of code.

> >> +static const char * const valids0[] = {
> >> +     TIM5_TRGO, TIM2_TRGO, TIM4_TRGO, TIM3_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const valids1[] = {
> >> +     TIM1_TRGO, TIM8_TRGO, TIM3_TRGO, TIM4_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const valids2[] = {
> >> +     TIM1_TRGO, TIM8_TRGO, TIM5_TRGO, TIM4_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const valids3[] = {
> >> +     TIM1_TRGO, TIM2_TRGO, TIM3_TRGO, TIM8_TRGO, NULL,
> >> +};
> >> +
> >> +static const char *const valids4[] = {
> >> +     TIM2_TRGO, TIM3_TRGO, TIM4_TRGO, TIM8_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const valids7[] = {
> >> +     TIM1_TRGO, TIM2_TRGO, TIM4_TRGO, TIM5_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const valids8[] = {
> >> +     TIM2_TRGO, TIM3_TRGO, NULL,
> >> +};
> >> +
> >> +static const char * const valids9[] = {
> >> +     TIM4_TRGO, TIM5_TRGO, NULL,
> >> +};
> >> +
> >> +static const void *valids_table[] = {
> >> +     valids0,
> >> +     valids1,
> >> +     valids2,
> >> +     valids3,
> >> +     valids4,
> >> +     NULL,
> >> +     NULL,
> >> +     valids7,
> >> +     valids8,
> >> +     valids9,
> >> +};
> >
> > Same here.
> >

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

^ permalink raw reply

* Re: [PATCH v5 2/4] drm: bridge: add support for TI ths8135
From: Bartosz Golaszewski @ 2016-12-07 10:45 UTC (permalink / raw)
  To: Jyri Sarha, Tomi Valkeinen, David Airlie, Kevin Hilman,
	Michael Turquette, Sekhar Nori, Rob Herring, Frank Rowand,
	Mark Rutland, Laurent Pinchart, Peter Ujfalusi, Russell King,
	Maxime Ripard
  Cc: linux-devicetree, linux-drm, LKML, arm-soc, Bartosz Golaszewski
In-Reply-To: <1481107365-24839-3-git-send-email-bgolaszewski@baylibre.com>

2016-12-07 11:42 GMT+01:00 Bartosz Golaszewski <bgolaszewski@baylibre.com>:
> THS8135 is a configurable video DAC. Add DT bindings for this chip and
> use the dumb-vga-dac driver for now as no configuration is required to
> make it work.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
>  .../bindings/display/bridge/ti,ths8135.txt         | 52 ++++++++++++++++++++++
>  drivers/gpu/drm/bridge/dumb-vga-dac.c              |  1 +
>  2 files changed, 53 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt b/Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt
> new file mode 100644
> index 0000000..23cd8ee
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt
> @@ -0,0 +1,52 @@
> +THS8135 Video DAC
> +-----------------
> +
> +This is the binding for Texas Instruments THS8135 Video DAC bridge.
> +
> +Required properties:
> +
> +- compatible: Must be "ti,ths8135"
> +
> +Required nodes:
> +
> +This device has two video ports. Their connections are modelled using the OF
> +graph bindings specified in Documentation/devicetree/bindings/graph.txt.
> +
> +- Video port 0 for RGB input
> +- Video port 1 for VGA output
> +
> +Example
> +-------
> +
> +vga-bridge {
> +       compatible = "ti,ths8135";
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +
> +       ports {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               port@0 {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <0>;
> +
> +                       vga_bridge_in: endpoint@0 {
> +                               reg = <0>;
> +                               remote-endpoint = <&lcdc_out_vga>;
> +                       };
> +               };
> +
> +               port@1 {
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <1>;
> +
> +                       vga_bridge_out: endpoint@0 {
> +                               reg = <0>;
> +                               remote-endpoint = <&vga_con_in>;
> +                       };
> +               };
> +       };
> +};
> diff --git a/drivers/gpu/drm/bridge/dumb-vga-dac.c b/drivers/gpu/drm/bridge/dumb-vga-dac.c
> index afec232..498fa75 100644
> --- a/drivers/gpu/drm/bridge/dumb-vga-dac.c
> +++ b/drivers/gpu/drm/bridge/dumb-vga-dac.c
> @@ -204,6 +204,7 @@ static int dumb_vga_remove(struct platform_device *pdev)
>
>  static const struct of_device_id dumb_vga_match[] = {
>         { .compatible = "dumb-vga-dac" },
> +       { .compatible = "ti,ths8135" },
>         {},
>  };
>  MODULE_DEVICE_TABLE(of, dumb_vga_match);
> --
> 2.9.3
>

+ Maxime

Sorry, I forgot to include your e-mail.

Bartosz
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply

* [PATCH v5 4/4] ARM: dts: da850: specify the maximum pixel clock rate for tilcdc
From: Bartosz Golaszewski @ 2016-12-07 10:42 UTC (permalink / raw)
  To: Jyri Sarha, Tomi Valkeinen, David Airlie, Kevin Hilman,
	Michael Turquette, Sekhar Nori, Rob Herring, Frank Rowand,
	Mark Rutland, Laurent Pinchart, Peter Ujfalusi, Russell King
  Cc: linux-devicetree, linux-drm, LKML, arm-soc, Bartosz Golaszewski
In-Reply-To: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com>

At maximum CPU frequency of 300 MHz the maximum pixel clock frequency
is 37.5 MHz[1]. We must filter out any mode for which the calculated
pixel clock rate would exceed this value.

Specify the max-pixelclock property for the display node for
da850-lcdk.

[1] http://processors.wiki.ti.com/index.php/OMAP-L1x/C674x/AM1x_LCD_Controller_(LCDC)_Throughput_and_Optimization_Techniques

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
 arch/arm/boot/dts/da850.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index 3f51e59..ba5bf80 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -452,6 +452,7 @@
 			compatible = "ti,da850-tilcdc";
 			reg = <0x213000 0x1000>;
 			interrupts = <52>;
+			max-pixelclock = <37500>;
 			status = "disabled";
 		};
 	};
-- 
2.9.3

_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply related

* [PATCH v5 3/4] ARM: dts: da850-lcdk: add the vga-bridge node
From: Bartosz Golaszewski @ 2016-12-07 10:42 UTC (permalink / raw)
  To: Jyri Sarha, Tomi Valkeinen, David Airlie, Kevin Hilman,
	Michael Turquette, Sekhar Nori, Rob Herring, Frank Rowand,
	Mark Rutland, Laurent Pinchart, Peter Ujfalusi, Russell King
  Cc: linux-devicetree, linux-drm, LKML, arm-soc, Bartosz Golaszewski
In-Reply-To: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com>

Add the vga-bridge node to the board DT together with corresponding
ports and vga connector. This allows to retrieve the edid info from
the display automatically.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
 arch/arm/boot/dts/da850-lcdk.dts | 67 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/da850-lcdk.dts b/arch/arm/boot/dts/da850-lcdk.dts
index afcb482..39602eb 100644
--- a/arch/arm/boot/dts/da850-lcdk.dts
+++ b/arch/arm/boot/dts/da850-lcdk.dts
@@ -51,6 +51,51 @@
 			system-clock-frequency = <24576000>;
 		};
 	};
+
+	vga-bridge {
+		compatible = "ti,ths8135";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0>;
+
+				vga_bridge_in: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&lcdc_out_vga>;
+				};
+			};
+
+			port@1 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <1>;
+
+				vga_bridge_out: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vga_con_in>;
+				};
+			};
+		};
+	};
+
+	vga {
+		compatible = "vga-connector";
+
+		ddc-i2c-bus = <&i2c0>;
+
+		port {
+			vga_con_in: endpoint {
+				remote-endpoint = <&vga_bridge_out>;
+			};
+		};
+	};
 };
 
 &pmx_core {
@@ -236,3 +281,25 @@
 &memctrl {
 	status = "okay";
 };
+
+&lcdc {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&lcd_pins>;
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		lcdc_out: port@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			lcdc_out_vga: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&vga_bridge_in>;
+			};
+		};
+	};
+};
-- 
2.9.3

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* [PATCH v5 2/4] drm: bridge: add support for TI ths8135
From: Bartosz Golaszewski @ 2016-12-07 10:42 UTC (permalink / raw)
  To: Jyri Sarha, Tomi Valkeinen, David Airlie, Kevin Hilman,
	Michael Turquette, Sekhar Nori, Rob Herring, Frank Rowand,
	Mark Rutland, Laurent Pinchart, Peter Ujfalusi, Russell King
  Cc: linux-devicetree, linux-drm, LKML, arm-soc, Bartosz Golaszewski
In-Reply-To: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com>

THS8135 is a configurable video DAC. Add DT bindings for this chip and
use the dumb-vga-dac driver for now as no configuration is required to
make it work.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
 .../bindings/display/bridge/ti,ths8135.txt         | 52 ++++++++++++++++++++++
 drivers/gpu/drm/bridge/dumb-vga-dac.c              |  1 +
 2 files changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt

diff --git a/Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt b/Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt
new file mode 100644
index 0000000..23cd8ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt
@@ -0,0 +1,52 @@
+THS8135 Video DAC
+-----------------
+
+This is the binding for Texas Instruments THS8135 Video DAC bridge.
+
+Required properties:
+
+- compatible: Must be "ti,ths8135"
+
+Required nodes:
+
+This device has two video ports. Their connections are modelled using the OF
+graph bindings specified in Documentation/devicetree/bindings/graph.txt.
+
+- Video port 0 for RGB input
+- Video port 1 for VGA output
+
+Example
+-------
+
+vga-bridge {
+	compatible = "ti,ths8135";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+
+			vga_bridge_in: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&lcdc_out_vga>;
+			};
+		};
+
+		port@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+
+			vga_bridge_out: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&vga_con_in>;
+			};
+		};
+	};
+};
diff --git a/drivers/gpu/drm/bridge/dumb-vga-dac.c b/drivers/gpu/drm/bridge/dumb-vga-dac.c
index afec232..498fa75 100644
--- a/drivers/gpu/drm/bridge/dumb-vga-dac.c
+++ b/drivers/gpu/drm/bridge/dumb-vga-dac.c
@@ -204,6 +204,7 @@ static int dumb_vga_remove(struct platform_device *pdev)
 
 static const struct of_device_id dumb_vga_match[] = {
 	{ .compatible = "dumb-vga-dac" },
+	{ .compatible = "ti,ths8135" },
 	{},
 };
 MODULE_DEVICE_TABLE(of, dumb_vga_match);
-- 
2.9.3

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* [PATCH v5 1/4] ARM: dts: da850: rename the display node label
From: Bartosz Golaszewski @ 2016-12-07 10:42 UTC (permalink / raw)
  To: Jyri Sarha, Tomi Valkeinen, David Airlie, Kevin Hilman,
	Michael Turquette, Sekhar Nori, Rob Herring, Frank Rowand,
	Mark Rutland, Laurent Pinchart, Peter Ujfalusi, Russell King
  Cc: linux-devicetree, linux-drm, LKML, arm-soc, Bartosz Golaszewski
In-Reply-To: <1481107365-24839-1-git-send-email-bgolaszewski@baylibre.com>

The tilcdc node name is 'display' as per the ePAPR 1.1 recommendation.
The label is also 'display', but change it to 'lcdc' to make it clear
what the underlying hardware is.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
---
 arch/arm/boot/dts/da850.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ffc6e1a..3f51e59 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -448,7 +448,7 @@
 			dma-names = "tx", "rx";
 		};
 
-		display: display@213000 {
+		lcdc: display@213000 {
 			compatible = "ti,da850-tilcdc";
 			reg = <0x213000 0x1000>;
 			interrupts = <52>;
-- 
2.9.3

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* [PATCH v5 0/4] ARM: dts: da850: tilcdc related DT changes
From: Bartosz Golaszewski @ 2016-12-07 10:42 UTC (permalink / raw)
  To: Jyri Sarha, Tomi Valkeinen, David Airlie, Kevin Hilman,
	Michael Turquette, Sekhar Nori, Rob Herring, Frank Rowand,
	Mark Rutland, Laurent Pinchart, Peter Ujfalusi, Russell King
  Cc: linux-devicetree, linux-drm, LKML, arm-soc, Bartosz Golaszewski

This series contains the last DT changes required for LCDC support
on da850-lcdk. The first one adds the dumb-vga-dac nodes, the second
limits the maximum pixel clock rate.

v1 -> v2:
- drop patch 3/3 (already merged)
- use max-pixelclock instead of max-bandwidth for display mode limiting

v2 -> v3:
- make the commit message in patch [2/2] more detailed
- move the max-pixelclock property to da850.dtsi as the limit
  affects all da850-based boards

v3 -> v4:
- remove the input port from the display node
- move the display ports node to da850-lcdk.dts
- rename the vga_bridge node to vga-bridge
- move the LCDC pins to the LCDC node (from the vga bridge node)

v4 -> v5:
- rename the display label to lcdc
- instead of using the 'dumb-vga-dac' compatible, add bindings for
  ti,ths8135 and use it as the vga-bridge node compatible

Bartosz Golaszewski (4):
  ARM: dts: da850: rename the display node label
  drm: bridge: add support for TI ths8135
  ARM: dts: da850-lcdk: add the vga-bridge node
  ARM: dts: da850: specify the maximum pixel clock rate for tilcdc

 .../bindings/display/bridge/ti,ths8135.txt         | 52 +++++++++++++++++
 arch/arm/boot/dts/da850-lcdk.dts                   | 67 ++++++++++++++++++++++
 arch/arm/boot/dts/da850.dtsi                       |  3 +-
 drivers/gpu/drm/bridge/dumb-vga-dac.c              |  1 +
 4 files changed, 122 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,ths8135.txt

-- 
2.9.3

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* [PATCH 2/2] i2c: sh_mobile: Add per-Generation fallback bindings
From: Simon Horman @ 2016-12-07 10:39 UTC (permalink / raw)
  To: Wolfram Sang
  Cc: Magnus Damm, linux-i2c, linux-renesas-soc, devicetree,
	Simon Horman
In-Reply-To: <1481106689-22312-1-git-send-email-horms+renesas@verge.net.au>

Add per-Generation fallback bindings for R-Car SoCs.

This is in keeping with the compatibility string scheme is being adopted
for drivers for Renesas SoCs.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt | 17 ++++++++++++++---
 drivers/i2c/busses/i2c-sh_mobile.c                      |  2 ++
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
index 214f94c25d37..7716acc55dec 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
@@ -1,8 +1,7 @@
 Device tree configuration for Renesas IIC (sh_mobile) driver
 
 Required properties:
-- compatible      : "renesas,iic-<soctype>". "renesas,rmobile-iic" as fallback
-		     Examples with soctypes are:
+- compatible      :
 			- "renesas,iic-r8a73a4" (R-Mobile APE6)
 			- "renesas,iic-r8a7740" (R-Mobile A1)
 			- "renesas,iic-r8a7790" (R-Car H2)
@@ -12,6 +11,17 @@ Required properties:
 			- "renesas,iic-r8a7794" (R-Car E2)
 			- "renesas,iic-r8a7795" (R-Car H3)
 			- "renesas,iic-sh73a0" (SH-Mobile AG5)
+			- "renesas,rcar-gen2-iic" (generic R-Car Gen2 compatible device)
+			- "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device)
+			- "renesas,rmobile-iic" (generic device)
+
+			When compatible with a generic R-Car version, nodes
+			must list the SoC-specific version corresponding to
+			the platform first followed by the generic R-Car
+			version.
+
+			renesas,rmobile-iic must always follow.
+
 - reg             : address start and address range size of device
 - interrupts      : interrupt of device
 - clocks          : clock for device
@@ -31,7 +41,8 @@ Pinctrl properties might be needed, too. See there.
 Example:
 
 	iic0: i2c@e6500000 {
-		compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+		compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
+			     "renesas,rmobile-iic";
 		reg = <0 0xe6500000 0 0x425>;
 		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index 6335ad35902d..3d9ebe6e5716 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -834,7 +834,9 @@ static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
 	{ .compatible = "renesas,iic-r8a7792", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,iic-r8a7793", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,iic-r8a7794", .data = &fast_clock_dt_config },
+	{ .compatible = "renesas,rcar-gen2-iic", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,iic-r8a7795", .data = &fast_clock_dt_config },
+	{ .compatible = "renesas,rcar-gen3-iic", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,iic-sh73a0", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
 	{},
-- 
2.7.0.rc3.207.g0ac5344

^ permalink raw reply related

* [PATCH 1/2] i2c: sh_mobile: List rmobile fallback compatibility last
From: Simon Horman @ 2016-12-07 10:39 UTC (permalink / raw)
  To: Wolfram Sang
  Cc: Magnus Damm, linux-i2c, linux-renesas-soc, devicetree,
	Simon Horman
In-Reply-To: <1481106689-22312-1-git-send-email-horms+renesas@verge.net.au>

Improve readability by listing the rmobile fallback compatibility string
after the more-specific compatibility strings they provide a fallback for.

This does not effect run-time behaviour as it is the order in the DTB that
determines which compatibility string is used.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 drivers/i2c/busses/i2c-sh_mobile.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index 192f36f00e4d..6335ad35902d 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -827,7 +827,6 @@ static const struct sh_mobile_dt_config r8a7740_dt_config = {
 };
 
 static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
-	{ .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
 	{ .compatible = "renesas,iic-r8a73a4", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,iic-r8a7740", .data = &r8a7740_dt_config },
 	{ .compatible = "renesas,iic-r8a7790", .data = &fast_clock_dt_config },
@@ -837,6 +836,7 @@ static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
 	{ .compatible = "renesas,iic-r8a7794", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,iic-r8a7795", .data = &fast_clock_dt_config },
 	{ .compatible = "renesas,iic-sh73a0", .data = &fast_clock_dt_config },
+	{ .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
 	{},
 };
 MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
-- 
2.7.0.rc3.207.g0ac5344

^ permalink raw reply related

* [PATCH 0/2] i2c: sh_mobile: fallback enhancements
From: Simon Horman @ 2016-12-07 10:31 UTC (permalink / raw)
  To: Wolfram Sang
  Cc: Magnus Damm, linux-i2c-u79uwXL29TY76Z2rM5mHXA,
	linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA, Simon Horman

Hi,

this short series aims to improve the fallback compatibility strings
for the i2c-sh_mobile driver.

Simon Horman (2):
  i2c: sh_mobile: List rmobile fallback compatibility last
  i2c: sh_mobile: Add per-Generation fallback bindings

 Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt | 17 ++++++++++++++---
 drivers/i2c/busses/i2c-sh_mobile.c                      |  4 +++-
 2 files changed, 17 insertions(+), 4 deletions(-)

-- 
2.7.0.rc3.207.g0ac5344

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* Re: [PATCH 3/8] rtc: add STM32 RTC driver
From: Amelie DELAUNAY @ 2016-12-07 10:16 UTC (permalink / raw)
  To: Mathieu Poirier, a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org,
	alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	Alexandre TORGUE, linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org,
	rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Gabriel FERNANDEZ
In-Reply-To: <20161205163212.GA10458-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>



On 12/05/2016 05:32 PM, Mathieu Poirier wrote:
> On Mon, Dec 05, 2016 at 10:43:14AM +0100, Amelie DELAUNAY wrote:
>> Hi Mathieu,
>>
>> Thanks for reviewing
>>
>> On 12/02/2016 06:56 PM, Mathieu Poirier wrote:
>>> On Fri, Dec 02, 2016 at 03:09:56PM +0100, Amelie Delaunay wrote:
>>>> This patch adds support for the STM32 RTC.
>>>
>>> Hello Amelie,
>>>
>>>>
>>>> Signed-off-by: Amelie Delaunay <amelie.delaunay-qxv4g6HH51o@public.gmane.org>
>>>> ---
>>>>  drivers/rtc/Kconfig     |  10 +
>>>>  drivers/rtc/Makefile    |   1 +
>>>>  drivers/rtc/rtc-stm32.c | 777
>> ++++++++++++++++++++++++++++++++++++++++++++++++
>>>>  3 files changed, 788 insertions(+)
>>>>  create mode 100644 drivers/rtc/rtc-stm32.c
>>>>
>>>> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
>>>> index e859d14..dd8b218 100644
>>>> --- a/drivers/rtc/Kconfig
>>>> +++ b/drivers/rtc/Kconfig
>>>> @@ -1706,6 +1706,16 @@ config RTC_DRV_PIC32
>>>>         This driver can also be built as a module. If so, the module
>>>>         will be called rtc-pic32
>>>>
>>>> +config RTC_DRV_STM32
>>>> +    tristate "STM32 On-Chip RTC"
>>>> +    depends on ARCH_STM32
>>>> +    help
>>>> +       If you say yes here you get support for the STM32 On-Chip
>>>> +       Real Time Clock.
>>>> +
>>>> +       This driver can also be built as a module, if so, the module
>>>> +       will be called "rtc-stm32".
>>>> +
>>>>  comment "HID Sensor RTC drivers"
>>>>
>>>>  config RTC_DRV_HID_SENSOR_TIME
>>>> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
>>>> index 1ac694a..87bd9cc 100644
>>>> --- a/drivers/rtc/Makefile
>>>> +++ b/drivers/rtc/Makefile
>>>> @@ -144,6 +144,7 @@ obj-$(CONFIG_RTC_DRV_SNVS)    += rtc-snvs.o
>>>>  obj-$(CONFIG_RTC_DRV_SPEAR)    += rtc-spear.o
>>>>  obj-$(CONFIG_RTC_DRV_STARFIRE)    += rtc-starfire.o
>>>>  obj-$(CONFIG_RTC_DRV_STK17TA8)    += rtc-stk17ta8.o
>>>> +obj-$(CONFIG_RTC_DRV_STM32)     += rtc-stm32.o
>>>>  obj-$(CONFIG_RTC_DRV_STMP)    += rtc-stmp3xxx.o
>>>>  obj-$(CONFIG_RTC_DRV_ST_LPC)    += rtc-st-lpc.o
>>>>  obj-$(CONFIG_RTC_DRV_SUN4V)    += rtc-sun4v.o
>>>> diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
>>>> new file mode 100644
>>>> index 0000000..9e710ff
>>>> --- /dev/null
>>>> +++ b/drivers/rtc/rtc-stm32.c
>>>> @@ -0,0 +1,777 @@
>>>> +/*
>>>> + * Copyright (C) Amelie Delaunay 2015
>>>> + * Author:  Amelie Delaunay <adelaunay.stm32-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>>> + * License terms:  GNU General Public License (GPL), version 2
>>>> + */
>>>> +
>>>> +#include <linux/bcd.h>
>>>> +#include <linux/clk.h>
>>>> +#include <linux/init.h>
>>>> +#include <linux/io.h>
>>>> +#include <linux/iopoll.h>
>>>> +#include <linux/ioport.h>
>>>> +#include <linux/kernel.h>
>>>> +#include <linux/mfd/syscon.h>
>>>> +#include <linux/module.h>
>>>> +#include <linux/of.h>
>>>> +#include <linux/of_device.h>
>>>> +#include <linux/platform_device.h>
>>>> +#include <linux/regmap.h>
>>>> +#include <linux/rtc.h>
>>>> +#include <linux/spinlock.h>
>>>> +
>>>> +#define DRIVER_NAME "stm32_rtc"
>>>> +
>>>> +/* STM32 RTC registers */
>>>> +#define STM32_RTC_TR        0x00
>>>> +#define STM32_RTC_DR        0x04
>>>> +#define STM32_RTC_CR        0x08
>>>> +#define STM32_RTC_ISR        0x0C
>>>> +#define STM32_RTC_PRER        0x10
>>>> +#define STM32_RTC_ALRMAR    0x1C
>>>> +#define STM32_RTC_WPR        0x24
>>>> +
>>>> +/* STM32_RTC_TR bit fields  */
>>>> +#define STM32_RTC_TR_SEC_SHIFT        0
>>>> +#define STM32_RTC_TR_SEC        GENMASK(6, 0)
>>>> +#define STM32_RTC_TR_MIN_SHIFT        8
>>>> +#define STM32_RTC_TR_MIN        GENMASK(14, 8)
>>>> +#define STM32_RTC_TR_HOUR_SHIFT        16
>>>> +#define STM32_RTC_TR_HOUR        GENMASK(21, 16)
>>>> +
>>>> +/* STM32_RTC_DR bit fields */
>>>> +#define STM32_RTC_DR_DATE_SHIFT        0
>>>> +#define STM32_RTC_DR_DATE        GENMASK(5, 0)
>>>> +#define STM32_RTC_DR_MONTH_SHIFT    8
>>>> +#define STM32_RTC_DR_MONTH        GENMASK(11, 8)
>>>> +#define STM32_RTC_DR_WDAY_SHIFT        13
>>>> +#define STM32_RTC_DR_WDAY        GENMASK(15, 13)
>>>> +#define STM32_RTC_DR_YEAR_SHIFT        16
>>>> +#define STM32_RTC_DR_YEAR        GENMASK(23, 16)
>>>> +
>>>> +/* STM32_RTC_CR bit fields */
>>>> +#define STM32_RTC_CR_FMT        BIT(6)
>>>> +#define STM32_RTC_CR_ALRAE        BIT(8)
>>>> +#define STM32_RTC_CR_ALRAIE        BIT(12)
>>>> +
>>>> +/* STM32_RTC_ISR bit fields */
>>>> +#define STM32_RTC_ISR_ALRAWF        BIT(0)
>>>> +#define STM32_RTC_ISR_INITS        BIT(4)
>>>> +#define STM32_RTC_ISR_RSF        BIT(5)
>>>> +#define STM32_RTC_ISR_INITF        BIT(6)
>>>> +#define STM32_RTC_ISR_INIT        BIT(7)
>>>> +#define STM32_RTC_ISR_ALRAF        BIT(8)
>>>> +
>>>> +/* STM32_RTC_PRER bit fields */
>>>> +#define STM32_RTC_PRER_PRED_S_SHIFT    0
>>>> +#define STM32_RTC_PRER_PRED_S        GENMASK(14, 0)
>>>> +#define STM32_RTC_PRER_PRED_A_SHIFT    16
>>>> +#define STM32_RTC_PRER_PRED_A        GENMASK(22, 16)
>>>> +
>>>> +/* STM32_RTC_ALRMAR and STM32_RTC_ALRMBR bit fields */
>>>> +#define STM32_RTC_ALRMXR_SEC_SHIFT    0
>>>> +#define STM32_RTC_ALRMXR_SEC        GENMASK(6, 0)
>>>> +#define STM32_RTC_ALRMXR_SEC_MASK    BIT(7)
>>>> +#define STM32_RTC_ALRMXR_MIN_SHIFT    8
>>>> +#define STM32_RTC_ALRMXR_MIN        GENMASK(14, 8)
>>>> +#define STM32_RTC_ALRMXR_MIN_MASK    BIT(15)
>>>> +#define STM32_RTC_ALRMXR_HOUR_SHIFT    16
>>>> +#define STM32_RTC_ALRMXR_HOUR        GENMASK(21, 16)
>>>> +#define STM32_RTC_ALRMXR_PM        BIT(22)
>>>> +#define STM32_RTC_ALRMXR_HOUR_MASK    BIT(23)
>>>> +#define STM32_RTC_ALRMXR_DATE_SHIFT    24
>>>> +#define STM32_RTC_ALRMXR_DATE        GENMASK(29, 24)
>>>> +#define STM32_RTC_ALRMXR_WDSEL        BIT(30)
>>>> +#define STM32_RTC_ALRMXR_WDAY_SHIFT    24
>>>> +#define STM32_RTC_ALRMXR_WDAY        GENMASK(27, 24)
>>>> +#define STM32_RTC_ALRMXR_DATE_MASK    BIT(31)
>>>> +
>>>> +/* STM32_RTC_WPR key constants */
>>>> +#define RTC_WPR_1ST_KEY            0xCA
>>>> +#define RTC_WPR_2ND_KEY            0x53
>>>> +#define RTC_WPR_WRONG_KEY        0xFF
>>>> +
>>>> +/*
>>>> + * RTC registers are protected agains parasitic write access.
>>>> + * PWR_CR_DBP bit must be set to enable write access to RTC registers.
>>>> + */
>>>> +/* STM32_PWR_CR */
>>>> +#define PWR_CR                0x00
>>>> +/* STM32_PWR_CR bit field */
>>>> +#define PWR_CR_DBP            BIT(8)
>>>> +
>>>> +static struct regmap *dbp;
>>>> +
>>>> +struct stm32_rtc {
>>>> +    struct rtc_device *rtc_dev;
>>>> +    void __iomem *base;
>>>> +    struct clk *pclk;
>>>> +    struct clk *ck_rtc;
>>>> +    unsigned int clksrc;
>>>> +    spinlock_t lock; /* Protects registers accesses */
>>>> +    int irq_alarm;
>>>> +    struct regmap *pwrcr;
>>>> +};
>>>> +
>>>> +static inline unsigned int stm32_rtc_readl(struct stm32_rtc *rtc,
>>>> +                       unsigned int offset)
>>>> +{
>>>> +    return readl_relaxed(rtc->base + offset);
>>>> +}
>>>> +
>>>> +static inline void stm32_rtc_writel(struct stm32_rtc *rtc,
>>>> +                    unsigned int offset, unsigned int value)
>>>> +{
>>>> +    writel_relaxed(value, rtc->base + offset);
>>>> +}
>>>
>>> I'm not sure wrapping the readl/writel_relaxed function does anything
>> special
>>> other than simply redirecting the reader to another section of the code.
>> During development phase, it is useful to add debug traces but you're right,
>> this can be remove.
>>>
>>>> +
>>>> +static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
>>>> +{
>>>> +//    if (dbp)
>>>> +//        regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, PWR_CR_DBP);
>>>
>>> Did checkpatch let you get away with this?  What did you intend to do
>> here?
>> Hum, as surprising as it may seem, checkpatch didn't complained about these
>> comments! But anyway, this has to be removed, it was a tentative to
>> enable/disable backup domain write protection any time we have to write in a
>> protected RTC register, but it is not functionnal. I have commented this
>> just to keep it in mind and forget to remove it before sending.
>>>
>>>> +
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_WPR, RTC_WPR_1ST_KEY);
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_WPR, RTC_WPR_2ND_KEY);
>>>> +}
>>>> +
>>>> +static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc)
>>>> +{
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_WPR, RTC_WPR_WRONG_KEY);
>>>> +
>>>> +//    if (dbp)
>>>> +//        regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, ~PWR_CR_DBP);
>>>> +}
>>>> +
>>>> +static int stm32_rtc_enter_init_mode(struct stm32_rtc *rtc)
>>>> +{
>>>> +    unsigned int isr = stm32_rtc_readl(rtc, STM32_RTC_ISR);
>>>> +
>>>> +    if (!(isr & STM32_RTC_ISR_INITF)) {
>>>> +        isr |= STM32_RTC_ISR_INIT;
>>>> +        stm32_rtc_writel(rtc, STM32_RTC_ISR, isr);
>>>> +
>>>> +        return readl_relaxed_poll_timeout_atomic(
>>>> +                    rtc->base + STM32_RTC_ISR,
>>>> +                    isr, (isr & STM32_RTC_ISR_INITF),
>>>> +                    10, 100000);
>>>
>>> When using hard coded numerics please add comments that explains the
>> reason
>>> behind the selected values.
>> Sure. It takes around 2 RTCCLK clock cycles to enter in initialization phase
>> mode. So it depends on the frequency of the ck_rtc parent clock.
>> Either I keep parent clock frequency and compute the exact timeout, or I use
>> the "best and worst cases": slowest RTCCLK frequency is 32kHz, so it can
>> take up to 62us, highest RTCCLK frequency should be 1MHz, so it can take
>> only 2us. Polling every 10us with a timeout of 100ms seemed reasonable and
>> be a good compromise.
>
> I think this is a resonnable approach - please add that explanation as a comment
> in the code.
Ok I'll do that.
>
>>>
>>>> +    }
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +static void stm32_rtc_exit_init_mode(struct stm32_rtc *rtc)
>>>> +{
>>>> +    unsigned int isr = stm32_rtc_readl(rtc, STM32_RTC_ISR);
>>>> +
>>>> +    isr &= ~STM32_RTC_ISR_INIT;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_ISR, isr);
>>>> +}
>>>> +
>>>> +static int stm32_rtc_wait_sync(struct stm32_rtc *rtc)
>>>> +{
>>>> +    unsigned int isr;
>>>> +
>>>> +    isr = stm32_rtc_readl(rtc, STM32_RTC_ISR);
>>>> +
>>>> +    isr &= ~STM32_RTC_ISR_RSF;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_ISR, isr);
>>>> +
>>>> +    /* Wait the registers to be synchronised */
>>>> +    return readl_relaxed_poll_timeout_atomic(rtc->base + STM32_RTC_ISR,
>>>> +                         isr,
>>>> +                         (isr & STM32_RTC_ISR_RSF),
>>>> +                         10, 100000);
>>>
>>> Shouldn't the break condition be !((isr & STM32_RTC_ISR_RSF) ?  If not
>> this
>>> probably deserve a better comment.
>> RSF bit is set by hardware each time the calendar registers are synchronized
>> (it takes up to 2 RTCCLK). So the break condition is correct: we poll until
>> RSF flag is set or timeout is reached.
>>>
>>>> +}
>>>> +
>>>> +static irqreturn_t stm32_rtc_alarm_irq(int irq, void *dev_id)
>>>> +{
>>>> +    struct stm32_rtc *rtc = (struct stm32_rtc *)dev_id;
>>>> +    unsigned long irqflags, events = 0;
>>>> +    unsigned int isr, cr;
>>>> +
>>>> +    spin_lock_irqsave(&rtc->lock, irqflags);
>>>> +
>>>> +    isr = stm32_rtc_readl(rtc, STM32_RTC_ISR);
>>>> +    cr = stm32_rtc_readl(rtc, STM32_RTC_CR);
>>>> +
>>>> +    if ((isr & STM32_RTC_ISR_ALRAF) &&
>>>> +        (cr & STM32_RTC_CR_ALRAIE)) {
>>>> +        /* Alarm A flag - Alarm interrupt */
>>>> +        events |= RTC_IRQF | RTC_AF;
>>>> +        isr &= ~STM32_RTC_ISR_ALRAF;
>>>> +    }
>>>> +
>>>> +    /* Clear event irqflags, otherwise new events won't be received */
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_ISR, isr);
>>>> +
>>>> +    spin_unlock_irqrestore(&rtc->lock, irqflags);
>>>> +
>>>> +    if (events) {
>>>> +        dev_info(&rtc->rtc_dev->dev, "Alarm occurred\n");
>>>> +
>>>> +        /* Pass event to the kernel */
>>>> +        rtc_update_irq(rtc->rtc_dev, 1, events);
>>>> +        return IRQ_HANDLED;
>>>> +    } else {
>>>> +        return IRQ_NONE;
>>>> +    }
>>>> +}
>>>> +
>>>> +/* Convert rtc_time structure from bin to bcd format */
>>>> +static void tm2bcd(struct rtc_time *tm)
>>>> +{
>>>> +    tm->tm_sec = bin2bcd(tm->tm_sec);
>>>> +    tm->tm_min = bin2bcd(tm->tm_min);
>>>> +    tm->tm_hour = bin2bcd(tm->tm_hour);
>>>> +
>>>> +    tm->tm_mday = bin2bcd(tm->tm_mday);
>>>> +    tm->tm_mon = bin2bcd(tm->tm_mon + 1);
>>>> +    tm->tm_year = bin2bcd(tm->tm_year - 100);
>>>> +    /*
>>>> +     * Number of days since Sunday
>>>> +     * - on kernel side, 0=Sunday...6=Saturday
>>>> +     * - on rtc side, 0=invalid,1=Monday...7=Sunday
>>>> +     */
>>>> +    tm->tm_wday = (!tm->tm_wday) ? 7 : tm->tm_wday;
>>>> +}
>>>> +
>>>> +/* Convert rtc_time structure from bcd to bin format */
>>>> +static void bcd2tm(struct rtc_time *tm)
>>>> +{
>>>> +    tm->tm_sec = bcd2bin(tm->tm_sec);
>>>> +    tm->tm_min = bcd2bin(tm->tm_min);
>>>> +    tm->tm_hour = bcd2bin(tm->tm_hour);
>>>> +
>>>> +    tm->tm_mday = bcd2bin(tm->tm_mday);
>>>> +    tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
>>>> +    tm->tm_year = bcd2bin(tm->tm_year) + 100;
>>>> +    /*
>>>> +     * Number of days since Sunday
>>>> +     * - on kernel side, 0=Sunday...6=Saturday
>>>> +     * - on rtc side, 0=invalid,1=Monday...7=Sunday
>>>> +     */
>>>> +    tm->tm_wday %= 7;
>>>> +}
>>>> +
>>>> +static int stm32_rtc_read_time(struct device *dev, struct rtc_time *tm)
>>>> +{
>>>> +    struct stm32_rtc *rtc = dev_get_drvdata(dev);
>>>> +    unsigned int tr, dr;
>>>> +    unsigned long irqflags;
>>>> +
>>>> +    spin_lock_irqsave(&rtc->lock, irqflags);
>>>> +
>>>> +    /* Time and Date in BCD format */
>>>> +    tr = stm32_rtc_readl(rtc, STM32_RTC_TR);
>>>> +    dr = stm32_rtc_readl(rtc, STM32_RTC_DR);
>>>> +
>>>> +    spin_unlock_irqrestore(&rtc->lock, irqflags);
>>>> +
>>>> +    tm->tm_sec = (tr & STM32_RTC_TR_SEC) >> STM32_RTC_TR_SEC_SHIFT;
>>>> +    tm->tm_min = (tr & STM32_RTC_TR_MIN) >> STM32_RTC_TR_MIN_SHIFT;
>>>> +    tm->tm_hour = (tr & STM32_RTC_TR_HOUR) >> STM32_RTC_TR_HOUR_SHIFT;
>>>> +
>>>> +    tm->tm_mday = (dr & STM32_RTC_DR_DATE) >> STM32_RTC_DR_DATE_SHIFT;
>>>> +    tm->tm_mon = (dr & STM32_RTC_DR_MONTH) >> STM32_RTC_DR_MONTH_SHIFT;
>>>> +    tm->tm_year = (dr & STM32_RTC_DR_YEAR) >> STM32_RTC_DR_YEAR_SHIFT;
>>>> +    tm->tm_wday = (dr & STM32_RTC_DR_WDAY) >> STM32_RTC_DR_WDAY_SHIFT;
>>>> +
>>>> +    /* We don't report tm_yday and tm_isdst */
>>>> +
>>>> +    bcd2tm(tm);
>>>> +
>>>> +    if (rtc_valid_tm(tm) < 0) {
>>>> +        dev_err(dev, "%s: rtc_time is not valid.\n", __func__);
>>>> +        return -EINVAL;
>>>> +    }
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +static int stm32_rtc_set_time(struct device *dev, struct rtc_time *tm)
>>>> +{
>>>> +    struct stm32_rtc *rtc = dev_get_drvdata(dev);
>>>> +    unsigned int tr, dr;
>>>> +    unsigned long irqflags;
>>>> +    int ret = 0;
>>>> +
>>>> +    if (rtc_valid_tm(tm) < 0) {
>>>> +        dev_err(dev, "%s: rtc_time is not valid.\n", __func__);
>>>> +        return -EINVAL;
>>>> +    }
>>>> +
>>>> +    tm2bcd(tm);
>>>> +
>>>> +    /* Time in BCD format */
>>>> +    tr = ((tm->tm_sec << STM32_RTC_TR_SEC_SHIFT) & STM32_RTC_TR_SEC) |
>>>> +         ((tm->tm_min << STM32_RTC_TR_MIN_SHIFT) & STM32_RTC_TR_MIN) |
>>>> +         ((tm->tm_hour << STM32_RTC_TR_HOUR_SHIFT) & STM32_RTC_TR_HOUR);
>>>> +
>>>> +    /* Date in BCD format */
>>>> +    dr = ((tm->tm_mday << STM32_RTC_DR_DATE_SHIFT) & STM32_RTC_DR_DATE)
>> |
>>>> +         ((tm->tm_mon << STM32_RTC_DR_MONTH_SHIFT) & STM32_RTC_DR_MONTH)
>> |
>>>> +         ((tm->tm_year << STM32_RTC_DR_YEAR_SHIFT) & STM32_RTC_DR_YEAR)
>> |
>>>> +         ((tm->tm_wday << STM32_RTC_DR_WDAY_SHIFT) & STM32_RTC_DR_WDAY);
>>>> +
>>>> +    spin_lock_irqsave(&rtc->lock, irqflags);
>>>> +
>>>> +    stm32_rtc_wpr_unlock(rtc);
>>>> +
>>>> +    ret = stm32_rtc_enter_init_mode(rtc);
>>>> +    if (ret) {
>>>> +        dev_err(dev, "Can't enter in init mode. Set time aborted.\n");
>>>> +        goto end;
>>>> +    }
>>>> +
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_TR, tr);
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_DR, dr);
>>>> +
>>>> +    stm32_rtc_exit_init_mode(rtc);
>>>> +
>>>> +    ret = stm32_rtc_wait_sync(rtc);
>>>> +end:
>>>> +    stm32_rtc_wpr_lock(rtc);
>>>> +
>>>> +    spin_unlock_irqrestore(&rtc->lock, irqflags);
>>>> +
>>>> +    return ret;
>>>> +}
>>>> +
>>>> +static int stm32_rtc_read_alarm(struct device *dev, struct rtc_wkalrm
>> *alrm)
>>>> +{
>>>> +    struct stm32_rtc *rtc = dev_get_drvdata(dev);
>>>> +    struct rtc_time *tm = &alrm->time;
>>>> +    unsigned int alrmar, cr, isr;
>>>> +    unsigned long irqflags;
>>>> +
>>>> +    spin_lock_irqsave(&rtc->lock, irqflags);
>>>> +
>>>> +    alrmar = stm32_rtc_readl(rtc, STM32_RTC_ALRMAR);
>>>> +    cr = stm32_rtc_readl(rtc, STM32_RTC_CR);
>>>> +    isr = stm32_rtc_readl(rtc, STM32_RTC_ISR);
>>>> +
>>>> +    spin_unlock_irqrestore(&rtc->lock, irqflags);
>>>> +
>>>> +    if (alrmar & STM32_RTC_ALRMXR_DATE_MASK) {
>>>> +        /*
>>>> +         * Date/day don't care in Alarm comparison so alarm triggers
>>>> +         * every day
>>>> +         */
>>>> +        tm->tm_mday = -1;
>>>> +        tm->tm_wday = -1;
>>>> +    } else {
>>>> +        if (alrmar & STM32_RTC_ALRMXR_WDSEL) {
>>>> +            /* Alarm is set to a day of week */
>>>> +            tm->tm_mday = -1;
>>>> +            tm->tm_wday = (alrmar & STM32_RTC_ALRMXR_WDAY) >>
>>>> +                      STM32_RTC_ALRMXR_WDAY_SHIFT;
>>>> +            tm->tm_wday %= 7;
>>>> +        } else {
>>>> +            /* Alarm is set to a day of month */
>>>> +            tm->tm_wday = -1;
>>>> +            tm->tm_mday = (alrmar & STM32_RTC_ALRMXR_DATE) >>
>>>> +                       STM32_RTC_ALRMXR_DATE_SHIFT;
>>>> +        }
>>>> +    }
>>>> +
>>>> +    if (alrmar & STM32_RTC_ALRMXR_HOUR_MASK) {
>>>> +        /* Hours don't care in Alarm comparison */
>>>> +        tm->tm_hour = -1;
>>>> +    } else {
>>>> +        tm->tm_hour = (alrmar & STM32_RTC_ALRMXR_HOUR) >>
>>>> +                   STM32_RTC_ALRMXR_HOUR_SHIFT;
>>>> +        if (alrmar & STM32_RTC_ALRMXR_PM)
>>>> +            tm->tm_hour += 12;
>>>> +    }
>>>> +
>>>> +    if (alrmar & STM32_RTC_ALRMXR_MIN_MASK) {
>>>> +        /* Minutes don't care in Alarm comparison */
>>>> +        tm->tm_min = -1;
>>>> +    } else {
>>>> +        tm->tm_min = (alrmar & STM32_RTC_ALRMXR_MIN) >>
>>>> +                  STM32_RTC_ALRMXR_MIN_SHIFT;
>>>> +    }
>>>> +
>>>> +    if (alrmar & STM32_RTC_ALRMXR_SEC_MASK) {
>>>> +        /* Seconds don't care in Alarm comparison */
>>>> +        tm->tm_sec = -1;
>>>> +    } else {
>>>> +        tm->tm_sec = (alrmar & STM32_RTC_ALRMXR_SEC) >>
>>>> +                  STM32_RTC_ALRMXR_SEC_SHIFT;
>>>> +    }
>>>> +
>>>> +    bcd2tm(tm);
>>>> +
>>>> +    alrm->enabled = (cr & STM32_RTC_CR_ALRAE) ? 1 : 0;
>>>> +    alrm->pending = (isr & STM32_RTC_ISR_ALRAF) ? 1 : 0;
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +static int stm32_rtc_alarm_irq_enable(struct device *dev, unsigned int
>> enabled)
>>>> +{
>>>> +    struct stm32_rtc *rtc = dev_get_drvdata(dev);
>>>> +    unsigned long irqflags;
>>>> +    unsigned int isr, cr;
>>>> +
>>>> +    cr = stm32_rtc_readl(rtc, STM32_RTC_CR);
>>>
>>> Is the STM32_RTC_CR garanteed to be valid, i.e updated atomically? If not
>> this
>>> should probably be below the spinlock.
>> You're right.
>>>
>>>> +
>>>> +    spin_lock_irqsave(&rtc->lock, irqflags);
>>>> +
>>>> +    stm32_rtc_wpr_unlock(rtc);
>>>> +
>>>> +    /* We expose Alarm A to the kernel */
>>>> +    if (enabled)
>>>> +        cr |= (STM32_RTC_CR_ALRAIE | STM32_RTC_CR_ALRAE);
>>>> +    else
>>>> +        cr &= ~(STM32_RTC_CR_ALRAIE | STM32_RTC_CR_ALRAE);
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_CR, cr);
>>>> +
>>>> +    /* Clear event irqflags, otherwise new events won't be received */
>>>> +    isr = stm32_rtc_readl(rtc, STM32_RTC_ISR);
>>>> +    isr &= ~STM32_RTC_ISR_ALRAF;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_ISR, isr);
>>>> +
>>>> +    stm32_rtc_wpr_lock(rtc);
>>>> +
>>>> +    spin_unlock_irqrestore(&rtc->lock, irqflags);
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +static int stm32_rtc_set_alarm(struct device *dev, struct rtc_wkalrm
>> *alrm)
>>>> +{
>>>> +    struct stm32_rtc *rtc = dev_get_drvdata(dev);
>>>> +    struct rtc_time *tm = &alrm->time;
>>>> +    unsigned long irqflags;
>>>> +    unsigned int cr, isr, alrmar;
>>>> +    int ret = 0;
>>>> +
>>>> +    if (rtc_valid_tm(tm)) {
>>>> +        dev_err(dev, "Alarm time not valid.\n");
>>>> +        return -EINVAL;
>>>> +    }
>>>> +
>>>> +    tm2bcd(tm);
>>>> +
>>>> +    spin_lock_irqsave(&rtc->lock, irqflags);
>>>> +
>>>> +    stm32_rtc_wpr_unlock(rtc);
>>>> +
>>>> +    /* Disable Alarm */
>>>> +    cr = stm32_rtc_readl(rtc, STM32_RTC_CR);
>>>> +    cr &= ~STM32_RTC_CR_ALRAE;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_CR, cr);
>>>> +
>>>> +    /* Poll Alarm write flag to be sure that Alarm update is allowed */
>>>> +    ret = readl_relaxed_poll_timeout_atomic(rtc->base + STM32_RTC_ISR,
>>>> +                        isr,
>>>> +                        (isr & STM32_RTC_ISR_ALRAWF),
>>>> +                        10, 100);
>>>> +
>>>> +    if (ret) {
>>>> +        dev_err(dev, "Alarm update not allowed\n");
>>>> +        goto end;
>>>> +    }
>>>> +
>>>> +    alrmar = 0;
>>>> +
>>>> +    if (tm->tm_mday < 0 && tm->tm_wday < 0) {
>>>> +        /*
>>>> +         * Date/day don't care in Alarm comparison so alarm triggers
>>>> +         * every day
>>>> +         */
>>>> +        alrmar |= STM32_RTC_ALRMXR_DATE_MASK;
>>>> +    } else {
>>>> +        if (tm->tm_mday > 0) {
>>>> +            /* Date is selected (ignoring wday) */
>>>> +            alrmar |= (tm->tm_mday << STM32_RTC_ALRMXR_DATE_SHIFT) &
>>>> +                  STM32_RTC_ALRMXR_DATE;
>>>> +        } else {
>>>> +            /* Day of week is selected */
>>>> +            int wday = (tm->tm_wday == 0) ? 7 : tm->tm_wday;
>>>> +
>>>> +            alrmar |= STM32_RTC_ALRMXR_WDSEL;
>>>> +            alrmar |= (wday << STM32_RTC_ALRMXR_WDAY_SHIFT) &
>>>> +                  STM32_RTC_ALRMXR_WDAY;
>>>> +        }
>>>> +    }
>>>> +
>>>> +    if (tm->tm_hour < 0) {
>>>> +        /* Hours don't care in Alarm comparison */
>>>> +        alrmar |= STM32_RTC_ALRMXR_HOUR_MASK;
>>>> +    } else {
>>>> +        /* 24-hour format */
>>>> +        alrmar &= ~STM32_RTC_ALRMXR_PM;
>>>> +        alrmar |= (tm->tm_hour << STM32_RTC_ALRMXR_HOUR_SHIFT) &
>>>> +              STM32_RTC_ALRMXR_HOUR;
>>>> +    }
>>>> +
>>>> +    if (tm->tm_min < 0) {
>>>> +        /* Minutes don't care in Alarm comparison */
>>>> +        alrmar |= STM32_RTC_ALRMXR_MIN_MASK;
>>>> +    } else {
>>>> +        alrmar |= (tm->tm_min << STM32_RTC_ALRMXR_MIN_SHIFT) &
>>>> +              STM32_RTC_ALRMXR_MIN;
>>>> +    }
>>>> +
>>>> +    if (tm->tm_sec < 0) {
>>>> +        /* Seconds don't care in Alarm comparison */
>>>> +        alrmar |= STM32_RTC_ALRMXR_SEC_MASK;
>>>> +    } else {
>>>> +        alrmar |= (tm->tm_sec << STM32_RTC_ALRMXR_SEC_SHIFT) &
>>>> +              STM32_RTC_ALRMXR_SEC;
>>>> +    }
>>>> +
>>>> +    /* Write to Alarm register */
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_ALRMAR, alrmar);
>>>> +
>>>> +    if (alrm->enabled)
>>>> +        stm32_rtc_alarm_irq_enable(dev, 1);
>>>> +    else
>>>> +        stm32_rtc_alarm_irq_enable(dev, 0);
>>>> +
>>>> +end:
>>>> +    stm32_rtc_wpr_lock(rtc);
>>>> +
>>>> +    spin_unlock_irqrestore(&rtc->lock, irqflags);
>>>> +
>>>> +    return ret;
>>>> +}
>>>> +
>>>> +static const struct rtc_class_ops stm32_rtc_ops = {
>>>> +    .read_time    = stm32_rtc_read_time,
>>>> +    .set_time    = stm32_rtc_set_time,
>>>> +    .read_alarm    = stm32_rtc_read_alarm,
>>>> +    .set_alarm    = stm32_rtc_set_alarm,
>>>> +    .alarm_irq_enable = stm32_rtc_alarm_irq_enable,
>>>> +};
>>>> +
>>>> +#ifdef CONFIG_OF
>>>> +static const struct of_device_id stm32_rtc_of_match[] = {
>>>> +    { .compatible = "st,stm32-rtc" },
>>>> +    {}
>>>> +};
>>>> +MODULE_DEVICE_TABLE(of, stm32_rtc_of_match);
>>>> +#endif
>>>> +
>>>> +static int stm32_rtc_init(struct platform_device *pdev,
>>>> +              struct stm32_rtc *rtc)
>>>> +{
>>>> +    unsigned int prer, pred_a, pred_s, pred_a_max, pred_s_max, cr;
>>>> +    unsigned int rate;
>>>> +    unsigned long irqflags;
>>>> +    int ret = 0;
>>>> +
>>>> +    rate = clk_get_rate(rtc->ck_rtc);
>>>> +
>>>> +    /* Find prediv_a and prediv_s to obtain the 1Hz calendar clock */
>>>> +    pred_a_max = STM32_RTC_PRER_PRED_A >> STM32_RTC_PRER_PRED_A_SHIFT;
>>>> +    pred_s_max = STM32_RTC_PRER_PRED_S >> STM32_RTC_PRER_PRED_S_SHIFT;
>>>> +
>>>> +    for (pred_a = pred_a_max; pred_a >= 0; pred_a--) {
>>>> +        pred_s = (rate / (pred_a + 1)) - 1;
>>>> +
>>>> +        if (((pred_s + 1) * (pred_a + 1)) == rate)
>>>> +            break;
>>>> +    }
>>>> +
>>>> +    /*
>>>> +     * Can't find a 1Hz, so give priority to RTC power consumption
>>>> +     * by choosing the higher possible value for prediv_a
>>>> +     */
>>>> +    if ((pred_s > pred_s_max) || (pred_a > pred_a_max)) {
>>>> +        pred_a = pred_a_max;
>>>> +        pred_s = (rate / (pred_a + 1)) - 1;
>>>> +
>>>> +        dev_warn(&pdev->dev, "ck_rtc is %s\n",
>>>> +             (rate - ((pred_a + 1) * (pred_s + 1)) < 0) ?
>>>> +             "fast" : "slow");
>>>> +    }
>>>> +
>>>> +    spin_lock_irqsave(&rtc->lock, irqflags);
>>>> +
>>>> +    stm32_rtc_wpr_unlock(rtc);
>>>> +
>>>> +    ret = stm32_rtc_enter_init_mode(rtc);
>>>> +    if (ret) {
>>>> +        dev_err(&pdev->dev,
>>>> +            "Can't enter in init mode. Prescaler config failed.\n");
>>>> +        goto end;
>>>> +    }
>>>> +
>>>> +    prer = (pred_s << STM32_RTC_PRER_PRED_S_SHIFT) &
>> STM32_RTC_PRER_PRED_S;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_PRER, prer);
>>>> +    prer |= (pred_a << STM32_RTC_PRER_PRED_A_SHIFT) &
>> STM32_RTC_PRER_PRED_A;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_PRER, prer);
>>>> +
>>>> +    /* Force 24h time format */
>>>> +    cr = stm32_rtc_readl(rtc, STM32_RTC_CR);
>>>> +    cr &= ~STM32_RTC_CR_FMT;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_CR, cr);
>>>> +
>>>> +    stm32_rtc_exit_init_mode(rtc);
>>>> +
>>>> +    ret = stm32_rtc_wait_sync(rtc);
>>>> +
>>>> +    if (stm32_rtc_readl(rtc, STM32_RTC_ISR) & STM32_RTC_ISR_INITS)
>>>> +        dev_warn(&pdev->dev, "Date/Time must be initialized\n");
>>>> +end:
>>>> +    stm32_rtc_wpr_lock(rtc);
>>>> +
>>>> +    spin_unlock_irqrestore(&rtc->lock, irqflags);
>>>> +
>>>> +    return ret;
>>>> +}
>>>> +
>>>> +static int stm32_rtc_probe(struct platform_device *pdev)
>>>> +{
>>>> +    struct stm32_rtc *rtc;
>>>> +    struct resource *res;
>>>> +    int ret;
>>>> +
>>>> +    rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
>>>> +    if (!rtc)
>>>> +        return -ENOMEM;
>>>> +
>>>> +    res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>>
>>> The value of 'res' should be checked before using it.
>> res is checked in devm_ioremap_resource just below :
>>     if (!res || resource_type(res) != IORESOURCE_MEM) {
>>         dev_err(dev, "invalid resource\n");
>>         return IOMEM_ERR_PTR(-EINVAL);
>>     }
>> That's why it is not checked here.
>>>
>>>> +    rtc->base = devm_ioremap_resource(&pdev->dev, res);
>>>> +    if (IS_ERR(rtc->base))
>>>> +        return PTR_ERR(rtc->base);
>>>> +
>>>> +    dbp = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
>> "st,syscfg");
>>>> +    if (IS_ERR(dbp)) {
>>>> +        dev_err(&pdev->dev, "no st,syscfg\n");
>>>> +        return PTR_ERR(dbp);
>>>> +    }
>>>> +
>>>> +    spin_lock_init(&rtc->lock);
>>>> +
>>>> +    rtc->ck_rtc = devm_clk_get(&pdev->dev, "ck_rtc");
>>>> +    if (IS_ERR(rtc->ck_rtc)) {
>>>> +        dev_err(&pdev->dev, "no ck_rtc clock");
>>>> +        return PTR_ERR(rtc->ck_rtc);
>>>> +    }
>>>> +
>>>> +    ret = clk_prepare_enable(rtc->ck_rtc);
>>>> +    if (ret)
>>>> +        return ret;
>>>> +
>>>> +    if (dbp)
>>>> +        regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, PWR_CR_DBP);
>>>
>>> The code above exits if there is a problem with the dbp, there is no point
>> in
>>> checking again.
>> You're right.
>>>
>>>> +
>>>> +    ret = stm32_rtc_init(pdev, rtc);
>>>> +    if (ret)
>>>> +        goto err;
>>>> +
>>>> +    rtc->irq_alarm = platform_get_irq_byname(pdev, "alarm");
>>>> +    if (rtc->irq_alarm <= 0) {
>>>> +        dev_err(&pdev->dev, "no alarm irq\n");
>>>> +        ret = -ENOENT;
>>>> +        goto err;
>>>> +    }
>>>> +
>>>> +    platform_set_drvdata(pdev, rtc);
>>>> +
>>>> +    device_init_wakeup(&pdev->dev, true);
>>>
>>> What happens if device_init_wakeup() returns an error?
>> It means that RTC won't be able to wake up the board with RTC alarm. I can
>> add a warning for the user in this case ?
>
> Not really sure - it really depends on the kind of system will use this.
> For some not being able to wake up the board might a minor problem while
> for others a reason to fail the probing.
>
> Do we need a new binging for this, i.e one that would indicate this RTC can (and
> should) be able to wake up the board and fail driver probing if this can't be
> done?
>
> I'll let Alessandro and Alexander be the judge of that.
>
> Thanks,
> Mathieu
>
Ok, I wait for Alessandro and Alexandre advice to send a V2.

Thanks,
Amelie
>>>
>>>> +
>>>> +    rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
>>>> +            &stm32_rtc_ops, THIS_MODULE);
>>>> +    if (IS_ERR(rtc->rtc_dev)) {
>>>> +        ret = PTR_ERR(rtc->rtc_dev);
>>>> +        dev_err(&pdev->dev, "rtc device registration failed, err=%d\n",
>>>> +            ret);
>>>> +        goto err;
>>>> +    }
>>>> +
>>>> +    /* Handle RTC alarm interrupts */
>>>> +    ret = devm_request_irq(&pdev->dev, rtc->irq_alarm,
>>>> +                   stm32_rtc_alarm_irq, IRQF_TRIGGER_RISING,
>>>> +                   dev_name(&rtc->rtc_dev->dev), rtc);
>>>> +    if (ret) {
>>>> +        dev_err(&pdev->dev, "IRQ%d (alarm interrupt) already claimed\n",
>>>> +            rtc->irq_alarm);
>>>> +        goto err;
>>>> +    }
>>>> +
>>>> +    return 0;
>>>> +err:
>>>> +    clk_disable_unprepare(rtc->ck_rtc);
>>>> +
>>>> +    if (dbp)
>>>> +        regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, ~PWR_CR_DBP);
>>>
>>> Same comment as above.
>> OK.
>>>
>>>> +
>>>> +    device_init_wakeup(&pdev->dev, false);
>>>> +
>>>> +    return ret;
>>>> +}
>>>> +
>>>> +static int __exit stm32_rtc_remove(struct platform_device *pdev)
>>>> +{
>>>> +    struct stm32_rtc *rtc = platform_get_drvdata(pdev);
>>>> +    unsigned int cr;
>>>> +
>>>> +    /* Disable interrupts */
>>>> +    stm32_rtc_wpr_unlock(rtc);
>>>> +    cr = stm32_rtc_readl(rtc, STM32_RTC_CR);
>>>> +    cr &= ~STM32_RTC_CR_ALRAIE;
>>>> +    stm32_rtc_writel(rtc, STM32_RTC_CR, cr);
>>>> +    stm32_rtc_wpr_lock(rtc);
>>>> +
>>>> +    clk_disable_unprepare(rtc->ck_rtc);
>>>> +
>>>> +    /* Enable backup domain write protection */
>>>> +    if (dbp)
>>>> +        regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, ~PWR_CR_DBP);
>>>> +
>>>> +    device_init_wakeup(&pdev->dev, false);
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +#ifdef CONFIG_PM_SLEEP
>>>> +static int stm32_rtc_suspend(struct device *dev)
>>>> +{
>>>> +    struct stm32_rtc *rtc = dev_get_drvdata(dev);
>>>> +
>>>> +    if (device_may_wakeup(dev))
>>>> +        return enable_irq_wake(rtc->irq_alarm);
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +static int stm32_rtc_resume(struct device *dev)
>>>> +{
>>>> +    struct stm32_rtc *rtc = dev_get_drvdata(dev);
>>>> +    int ret = 0;
>>>> +
>>>> +    ret = stm32_rtc_wait_sync(rtc);
>>>> +    if (ret < 0)
>>>> +        return ret;
>>>> +
>>>> +    if (device_may_wakeup(dev))
>>>> +        return disable_irq_wake(rtc->irq_alarm);
>>>> +
>>>> +    return ret;
>>>> +}
>>>> +#endif
>>>> +
>>>> +static SIMPLE_DEV_PM_OPS(stm32_rtc_pm_ops,
>>>> +             stm32_rtc_suspend, stm32_rtc_resume);
>>>> +
>>>> +static struct platform_driver stm32_rtc_driver = {
>>>> +    .probe        = stm32_rtc_probe,
>>>> +    .remove        = stm32_rtc_remove,
>>>> +    .driver        = {
>>>> +        .name    = DRIVER_NAME,
>>>> +        .pm    = &stm32_rtc_pm_ops,
>>>> +        .of_match_table = stm32_rtc_of_match,
>>>> +    },
>>>> +};
>>>> +
>>>> +module_platform_driver(stm32_rtc_driver);
>>>> +
>>>> +MODULE_ALIAS("platform:" DRIVER_NAME);
>>>> +MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay-qxv4g6HH51o@public.gmane.org>");
>>>> +MODULE_DESCRIPTION("STMicroelectronics STM32 Real Time Clock driver");
>>>> +MODULE_LICENSE("GPL v2");
>>>> --
>>>> 1.9.1
>>>>
>>
>> Best regards,
>> Amelie
>>

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^ permalink raw reply

* Re: [PATCH 14/22] dt-bindings: display: dw-hdmi: Clean up DT bindings documentation
From: Laurent Pinchart @ 2016-12-07  9:53 UTC (permalink / raw)
  To: Rob Herring
  Cc: Fabio Estevam, Jose Abreu, Laurent Pinchart, Ulrich Hecht,
	devicetree, Kieran Bingham, dri-devel, linux-renesas-soc,
	Russell King, Andy Yan, Vladimir Zapolskiy
In-Reply-To: <20161206211550.oprrw3m76locagfo@rob-hp-laptop>

Hi Rob,

On Tuesday 06 Dec 2016 15:15:50 Rob Herring wrote:
> On Fri, Dec 02, 2016 at 01:43:29AM +0200, Laurent Pinchart wrote:
> > Make it clear that the core bridge/dw_hdmi.txt document isn't a device
> > tree binding by itself but is meant to be referenced by platform device
> > tree bindings, and update the Rockchip and Freescale DWC HDMI TX
> > bindings to reference it.
> > 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  .../devicetree/bindings/display/bridge/dw_hdmi.txt | 85 +++++++----------
> >  .../devicetree/bindings/display/imx/hdmi.txt       | 51 +++++++------
> >  .../bindings/display/rockchip/dw_hdmi-rockchip.txt | 43 +++++++----
> >  3 files changed, 91 insertions(+), 88 deletions(-)
> 
> Acked-by: Rob Herring <robh@kernel.org>
> 
> Really, the ddc-i2c-bus prop needs to move to a connector node, but
> that's a separate problem.

I fully agree. One step at a time though :-)

> We might also want to drop the 'ddc-' part and have a generic way to refer
> to an i2c bus. There's a couple of other cases.

Right, but a DT node might need to refer to multiple I2C buses (probably not 
for connectors though). The ddc- prefix serves a similar purpose than the 
power supply or GPIO name in the *-supply or *-gpios properties.

-- 
Regards,

Laurent Pinchart

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply

* Re: [PATCH 14/16] drivers/fsi: Add master unscan
From: Greg KH @ 2016-12-07  9:31 UTC (permalink / raw)
  To: Chris Bostic
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw, sre-DgEjT+Ai2ygdnm+yROfE0A,
	mturquette-rdvid1DuHRBWk0Htik3J/w,
	geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Chris Bostic,
	joel-U3u1mxZcP9KHXe+LvDLADg, jk-mnsaURCQ41sdnm+yROfE0A,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, andrew-zrmu5oMJ5Fs,
	alistair-Y4h6yKqj69EXC2x5gXVKYQ,
	benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r
In-Reply-To: <1481069677-53660-15-git-send-email-christopher.lee.bostic-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

On Tue, Dec 06, 2016 at 06:14:35PM -0600, Chris Bostic wrote:
> From: Chris Bostic <cbostic-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
> 
> Allow a master to undo a previous scan.  Should a master scan a bus
> twice it will need to ensure it doesn't double register any
> previously detected device.
> 
> Signed-off-by: Chris Bostic <cbostic-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
> ---
>  drivers/fsi/fsi-core.c   | 36 +++++++++++++++++++++++++++++++++++-
>  drivers/fsi/fsi-master.h |  2 ++
>  include/linux/fsi.h      |  1 +
>  3 files changed, 38 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c
> index a28434b..8ccfe50 100644
> --- a/drivers/fsi/fsi-core.c
> +++ b/drivers/fsi/fsi-core.c
> @@ -41,6 +41,8 @@
>  static atomic_t master_idx = ATOMIC_INIT(-1);
>  
>  struct fsi_slave {
> +	struct list_head	list_link;	/* Master's list of slaves */
> +	struct list_head	my_engines;
>  	struct device		dev;
>  	struct fsi_master	*master;
>  	int			link;
> @@ -196,6 +198,8 @@ static int fsi_slave_scan(struct fsi_slave *slave)
>  	uint32_t conf;
>  	int rc, i;
>  
> +	INIT_LIST_HEAD(&slave->my_engines);
> +
>  	/*
>  	 * scan engines
>  	 *
> @@ -264,7 +268,9 @@ static int fsi_slave_scan(struct fsi_slave *slave)
>  			if (rc) {
>  				dev_warn(&slave->dev, "add failed: %d\n", rc);
>  				put_device(&dev->dev);
> +				continue;
>  			}
> +			list_add(&dev->link, &slave->my_engines);
>  		}
>  
>  		engine_addr += slots * engine_page_size;
> @@ -357,7 +363,7 @@ static int fsi_slave_init(struct fsi_master *master,
>  		put_device(&slave->dev);
>  		return rc;
>  	}
> -
> +	list_add(&slave->list_link, &master->my_slaves);
>  	fsi_slave_scan(slave);
>  	return 0;
>  }
> @@ -388,6 +394,11 @@ static int fsi_master_scan(struct fsi_master *master)
>  	int link, slave_id, rc;
>  	uint32_t smode;
>  
> +	if (!master->slave_list) {
> +		INIT_LIST_HEAD(&master->my_slaves);
> +		master->slave_list = true;
> +	}
> +
>  	for (link = 0; link < master->n_links; link++) {
>  		rc = fsi_master_link_enable(master, link);
>  		if (rc) {
> @@ -423,9 +434,31 @@ static int fsi_master_scan(struct fsi_master *master)
>  	return 0;
>  }
>  
> +static void fsi_master_unscan(struct fsi_master *master)
> +{
> +	struct fsi_slave *slave, *slave_tmp;
> +	struct fsi_device *fsi_dev, *fsi_dev_tmp;
> +
> +	if (!master->slave_list)
> +		return;
> +
> +	list_for_each_entry_safe(slave, slave_tmp, &master->my_slaves,
> +							list_link) {
> +		list_del(&slave->list_link);
> +		list_for_each_entry_safe(fsi_dev, fsi_dev_tmp,
> +					&slave->my_engines, link) {
> +			list_del(&fsi_dev->link);
> +			put_device(&fsi_dev->dev);
> +		}
> +		device_unregister(&slave->dev);
> +	}
> +	master->slave_list = false;
> +}
> +
>  int fsi_master_register(struct fsi_master *master)
>  {
>  	master->idx = atomic_inc_return(&master_idx);
> +	master->slave_list = false;
>  	get_device(master->dev);
>  	fsi_master_scan(master);
>  	return 0;
> @@ -434,6 +467,7 @@ int fsi_master_register(struct fsi_master *master)
>  
>  void fsi_master_unregister(struct fsi_master *master)
>  {
> +	fsi_master_unscan(master);
>  	put_device(master->dev);
>  }
>  EXPORT_SYMBOL_GPL(fsi_master_unregister);
> diff --git a/drivers/fsi/fsi-master.h b/drivers/fsi/fsi-master.h
> index 56aad0e..454af2b 100644
> --- a/drivers/fsi/fsi-master.h
> +++ b/drivers/fsi/fsi-master.h
> @@ -20,6 +20,8 @@
>  #include <linux/device.h>
>  
>  struct fsi_master {
> +	struct list_head my_slaves;
> +	bool		slave_list;
>  	struct device	*dev;
>  	int		idx;
>  	int		n_links;
> diff --git a/include/linux/fsi.h b/include/linux/fsi.h
> index 66bce48..924502b 100644
> --- a/include/linux/fsi.h
> +++ b/include/linux/fsi.h
> @@ -18,6 +18,7 @@
>  #include <linux/device.h>
>  
>  struct fsi_device {
> +	struct list_head	link;	/* for slave's list */

Can't you use the device list on the bus instead?  Putting a device on
multiple lists gets tricky very quickly :(

thanks,

greg k-h
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^ permalink raw reply

* Re: [PATCH 11/16] drivers/fsi: Add device read/write/peek functions
From: Greg KH @ 2016-12-07  9:29 UTC (permalink / raw)
  To: Chris Bostic
  Cc: mark.rutland, devicetree, benh, geert+renesas, andrew,
	linux-kernel, mturquette, linux, Chris Bostic, sre, robh+dt,
	Jeremy Kerr, alistair, linux-arm-kernel, joel
In-Reply-To: <1481076574-54711-4-git-send-email-christopher.lee.bostic@gmail.com>

On Tue, Dec 06, 2016 at 08:09:33PM -0600, Chris Bostic wrote:
> diff --git a/include/linux/fsi.h b/include/linux/fsi.h
> index efa55ba..66bce48 100644
> --- a/include/linux/fsi.h
> +++ b/include/linux/fsi.h
> @@ -27,6 +27,12 @@ struct fsi_device {
>  	uint32_t		size;
>  };
>  
> +extern int fsi_device_read(struct fsi_device *dev, uint32_t addr,
> +		void *val, size_t size);
> +extern int fsi_device_write(struct fsi_device *dev, uint32_t addr,
> +		const void *val, size_t size);
> +extern int fsi_device_peek(struct fsi_device *dev, void *val);
> +
>  struct fsi_device_id {
>  	u8	engine_type;
>  	u8	version;
> @@ -40,7 +46,6 @@ struct fsi_device_id {
>  #define FSI_DEVICE_VERSIONED(t, v) \
>  	.engine_type = (t), .version = (v),
>  
> -
>  struct fsi_driver {
>  	struct device_driver		drv;
>  	const struct fsi_device_id	*id_table;

Strange whitespace change here :)

Not a real problem, I like the fact that you have broken this down into
very logical pieces making it much easier to review, thanks so much for
doing this.

greg k-h

^ permalink raw reply

* Re: [PATCH 04/16] drivers/fsi: Add fsi master definition
From: Greg KH @ 2016-12-07  9:06 UTC (permalink / raw)
  To: Chris Bostic
  Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw, sre-DgEjT+Ai2ygdnm+yROfE0A,
	mturquette-rdvid1DuHRBWk0Htik3J/w,
	geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Jeremy Kerr,
	joel-U3u1mxZcP9KHXe+LvDLADg, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	andrew-zrmu5oMJ5Fs, alistair-Y4h6yKqj69EXC2x5gXVKYQ,
	benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r, Chris Bostic
In-Reply-To: <1481076574-54711-1-git-send-email-christopher.lee.bostic-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

On Tue, Dec 06, 2016 at 08:09:30PM -0600, Chris Bostic wrote:
> From: Jeremy Kerr <jk-mnsaURCQ41sdnm+yROfE0A@public.gmane.org>
> 
> Signed-off-by: Jeremy Kerr <jk-mnsaURCQ41sdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Chris Bostic <cbostic-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
> ---
>  drivers/fsi/fsi-core.c   | 20 ++++++++++++++++++++
>  drivers/fsi/fsi-master.h | 37 +++++++++++++++++++++++++++++++++++++
>  2 files changed, 57 insertions(+)
>  create mode 100644 drivers/fsi/fsi-master.h
> 
> diff --git a/drivers/fsi/fsi-core.c b/drivers/fsi/fsi-core.c
> index 3d55bd5..ce9428d 100644
> --- a/drivers/fsi/fsi-core.c
> +++ b/drivers/fsi/fsi-core.c
> @@ -17,6 +17,26 @@
>  #include <linux/fsi.h>
>  #include <linux/module.h>
>  
> +#include "fsi-master.h"
> +
> +static atomic_t master_idx = ATOMIC_INIT(-1);

You don't really want/need an atomic variable, please use the simple ida
interface instead.

thanks,

greg k-h
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^ permalink raw reply

* Re: [PATCH v2 1/2] misc: atmel-ssc: register as sound DAI if #sound-dai-cells is present
From: Nicolas Ferre @ 2016-12-07  9:04 UTC (permalink / raw)
  To: Peter Rosin, linux-kernel, alsa-devel
  Cc: Rob Herring, Mark Rutland, Liam Girdwood, Mark Brown,
	Arnd Bergmann, Greg Kroah-Hartman, Jaroslav Kysela, Takashi Iwai,
	devicetree, linux-arm-kernel
In-Reply-To: <1481052157-23400-2-git-send-email-peda@axentia.se>

Le 06/12/2016 à 20:22, Peter Rosin a écrit :
> The SSC is currently not usable with the ASoC simple-audio-card, as
> every SSC audio user has to build a platform driver that may do as
> little as calling atmel_ssc_set_audio/atmel_ssc_put_audio (which
> allocates the SSC and registers a DAI with the ASoC subsystem).
> 
> So, have that happen automatically, if the #sound-dai-cells property
> is present in devicetree, which it has to be anyway for simple audio
> card to work.
> 
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Peter Rosin <peda@axentia.se>

Sounds okay: thanks Peter.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

I don't think my tag is needed for second patch but you can add it if
you wish.

Regards,


> ---
>  .../devicetree/bindings/misc/atmel-ssc.txt         |  2 +
>  drivers/misc/atmel-ssc.c                           | 50 ++++++++++++++++++++++
>  include/linux/atmel-ssc.h                          |  1 +
>  3 files changed, 53 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
> index efc98ea1f23d..f8629bb73945 100644
> --- a/Documentation/devicetree/bindings/misc/atmel-ssc.txt
> +++ b/Documentation/devicetree/bindings/misc/atmel-ssc.txt
> @@ -24,6 +24,8 @@ Optional properties:
>         this parameter to choose where the clock from.
>       - By default the clock is from TK pin, if the clock from RK pin, this
>         property is needed.
> +  - #sound-dai-cells: Should contain <0>.
> +     - This property makes the SSC into an automatically registered DAI.
>  
>  Examples:
>  - PDC transfer:
> diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
> index 0516ecda54d3..b2a0340f277e 100644
> --- a/drivers/misc/atmel-ssc.c
> +++ b/drivers/misc/atmel-ssc.c
> @@ -20,6 +20,8 @@
>  
>  #include <linux/of.h>
>  
> +#include "../../sound/soc/atmel/atmel_ssc_dai.h"
> +
>  /* Serialize access to ssc_list and user count */
>  static DEFINE_SPINLOCK(user_lock);
>  static LIST_HEAD(ssc_list);
> @@ -145,6 +147,49 @@ static inline const struct atmel_ssc_platform_data * __init
>  		platform_get_device_id(pdev)->driver_data;
>  }
>  
> +#ifdef CONFIG_SND_ATMEL_SOC_SSC
> +static int ssc_sound_dai_probe(struct ssc_device *ssc)
> +{
> +	struct device_node *np = ssc->pdev->dev.of_node;
> +	int ret;
> +	int id;
> +
> +	ssc->sound_dai = false;
> +
> +	if (!of_property_read_bool(np, "#sound-dai-cells"))
> +		return 0;
> +
> +	id = of_alias_get_id(np, "ssc");
> +	if (id < 0)
> +		return id;
> +
> +	ret = atmel_ssc_set_audio(id);
> +	ssc->sound_dai = !ret;
> +
> +	return ret;
> +}
> +
> +static void ssc_sound_dai_remove(struct ssc_device *ssc)
> +{
> +	if (!ssc->sound_dai)
> +		return;
> +
> +	atmel_ssc_put_audio(of_alias_get_id(ssc->pdev->dev.of_node, "ssc"));
> +}
> +#else
> +static inline int ssc_sound_dai_probe(struct ssc_device *ssc)
> +{
> +	if (of_property_read_bool(ssc->pdev->dev.of_node, "#sound-dai-cells"))
> +		return -ENOTSUPP;
> +
> +	return 0;
> +}
> +
> +static inline void ssc_sound_dai_remove(struct ssc_device *ssc)
> +{
> +}
> +#endif
> +
>  static int ssc_probe(struct platform_device *pdev)
>  {
>  	struct resource *regs;
> @@ -204,6 +249,9 @@ static int ssc_probe(struct platform_device *pdev)
>  	dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n",
>  			ssc->regs, ssc->irq);
>  
> +	if (ssc_sound_dai_probe(ssc))
> +		dev_err(&pdev->dev, "failed to auto-setup ssc for audio\n");
> +
>  	return 0;
>  }
>  
> @@ -211,6 +259,8 @@ static int ssc_remove(struct platform_device *pdev)
>  {
>  	struct ssc_device *ssc = platform_get_drvdata(pdev);
>  
> +	ssc_sound_dai_remove(ssc);
> +
>  	spin_lock(&user_lock);
>  	list_del(&ssc->list);
>  	spin_unlock(&user_lock);
> diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
> index 7c0f6549898b..fdb545101ede 100644
> --- a/include/linux/atmel-ssc.h
> +++ b/include/linux/atmel-ssc.h
> @@ -20,6 +20,7 @@ struct ssc_device {
>  	int			user;
>  	int			irq;
>  	bool			clk_from_rk_pin;
> +	bool			sound_dai;
>  };
>  
>  struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
> 


-- 
Nicolas Ferre

^ permalink raw reply

* Re: [PATCH 08/16] drivers/fsi: Add crc4 helpers
From: Greg KH @ 2016-12-07  9:02 UTC (permalink / raw)
  To: Chris Bostic
  Cc: mark.rutland, devicetree, benh, geert+renesas, andrew,
	linux-kernel, mturquette, linux, Chris Bostic, sre, robh+dt,
	Jeremy Kerr, alistair, linux-arm-kernel, joel
In-Reply-To: <1481076574-54711-2-git-send-email-christopher.lee.bostic@gmail.com>

On Tue, Dec 06, 2016 at 08:09:31PM -0600, Chris Bostic wrote:
> From: Jeremy Kerr <jk@ozlabs.org>
> 
> Add some helpers for the crc checks for the slave configuration table.
> This works 4-bits-at-a-time, using a simple table approach.
> 
> We will need this in the FSI core code, as well as any master
> implementations that need to calculate CRCs in software.
> 
> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
> Signed-off-by: Chris Bostic <cbostic@us.ibm.com>
> ---
>  drivers/fsi/fsi-core.c   | 21 +++++++++++++++++++++
>  drivers/fsi/fsi-master.h | 21 +++++++++++++++++++++
>  2 files changed, 42 insertions(+)

Why not just create lib/crc4.c with these functions, like the other crc
functions in the kernel?  Don't bury these in some random driver
subsystem please.

thanks,

greg k-h

^ permalink raw reply

* Re: [PATCH v5 00/13] net: ethernet: ti: cpts: update and fixes
From: Richard Cochran @ 2016-12-07  8:58 UTC (permalink / raw)
  To: Grygorii Strashko
  Cc: David S. Miller, netdev-u79uwXL29TY76Z2rM5mHXA, Mugunthan V N,
	Sekhar Nori, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-omap-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA, Murali Karicheri, Wingman Kwok,
	Thomas Gleixner
In-Reply-To: <20161207000045.28333-1-grygorii.strashko-l0cyMroinI0@public.gmane.org>

On Tue, Dec 06, 2016 at 06:00:32PM -0600, Grygorii Strashko wrote:
> It is preparation series intended to clean up and optimize TI CPTS driver to
> facilitate further integration with other TI's SoCs like Keystone 2.
> 
> Changes in v5:
> - fixed copy paste error in cpts_release
> - reworked cc.mult/shift and cc_mult initialization 

Looks good to me now.  For the series:

Acked-by: Richard Cochran <richardcochran-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>


Thanks,
Richard
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* [PATCH] ARM: EXYNOS: remove smp hook from machine descriptor
From: Pankaj Dubey @ 2016-12-07  8:30 UTC (permalink / raw)
  To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA
  Cc: krzk-DgEjT+Ai2ygdnm+yROfE0A, kgene-DgEjT+Ai2ygdnm+yROfE0A,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A, thomas.ab-Sze3O3UU22JBDgjK7y7TUQ,
	Pankaj Dubey

Use CPU_METHOD_OF_DECLARE() for smp_ops instead of using it
via machine descriptor.

Signed-off-by: Pankaj Dubey <pankaj.dubey-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
 arch/arm/boot/dts/exynos3250.dtsi      | 1 +
 arch/arm/boot/dts/exynos4210.dtsi      | 1 +
 arch/arm/boot/dts/exynos4212.dtsi      | 1 +
 arch/arm/boot/dts/exynos4412.dtsi      | 1 +
 arch/arm/boot/dts/exynos5250.dtsi      | 1 +
 arch/arm/boot/dts/exynos5260.dtsi      | 1 +
 arch/arm/boot/dts/exynos5410.dtsi      | 1 +
 arch/arm/boot/dts/exynos5420-cpus.dtsi | 1 +
 arch/arm/boot/dts/exynos5422-cpus.dtsi | 1 +
 arch/arm/boot/dts/exynos5440.dtsi      | 1 +
 arch/arm/mach-exynos/common.h          | 2 --
 arch/arm/mach-exynos/exynos.c          | 1 -
 arch/arm/mach-exynos/platsmp.c         | 2 ++
 13 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index ba17ee1..f28f669 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -53,6 +53,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 7f3a18c..6dfd98d 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -35,6 +35,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@900 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index 5389011..3e8982e 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -25,6 +25,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@A00 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 40beede..faf2fb8 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -25,6 +25,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@A00 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b6d7444..580897c 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -52,6 +52,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 5818718..1af6e76 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -32,6 +32,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu@0 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 2b6adaf..b092cdc 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -33,6 +33,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi
index 5c052d7..a587704 100644
--- a/arch/arm/boot/dts/exynos5420-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi
@@ -24,6 +24,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos5422-cpus.dtsi b/arch/arm/boot/dts/exynos5422-cpus.dtsi
index bf3c6f1..7fcdfd0 100644
--- a/arch/arm/boot/dts/exynos5422-cpus.dtsi
+++ b/arch/arm/boot/dts/exynos5422-cpus.dtsi
@@ -23,6 +23,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu0: cpu@100 {
 			device_type = "cpu";
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 2a2e570..0a958e8 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -50,6 +50,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
+		enable-method = "samsung,exynos-smp";
 
 		cpu@0 {
 			device_type = "cpu";
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index fb12d11..051e1ab 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -143,8 +143,6 @@ static inline void exynos_pm_init(void) {}
 extern void exynos_cpu_resume(void);
 extern void exynos_cpu_resume_ns(void);
 
-extern const struct smp_operations exynos_smp_ops;
-
 extern void exynos_cpu_power_down(int cpu);
 extern void exynos_cpu_power_up(int cpu);
 extern int  exynos_cpu_power_state(int cpu);
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index fa08ef9..f0a766e 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -211,7 +211,6 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
 	/* Maintainer: Kukjin Kim <kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> */
 	.l2c_aux_val	= 0x3c400001,
 	.l2c_aux_mask	= 0xc20fffff,
-	.smp		= smp_ops(exynos_smp_ops),
 	.map_io		= exynos_init_io,
 	.init_early	= exynos_firmware_init,
 	.init_irq	= exynos_init_irq,
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 94405c7..43eec10 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -474,3 +474,5 @@ const struct smp_operations exynos_smp_ops __initconst = {
 	.cpu_die		= exynos_cpu_die,
 #endif
 };
+
+CPU_METHOD_OF_DECLARE(exynos_smp, "samsung,exynos-smp", &exynos_smp_ops);
-- 
2.7.4

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* [PATCH V2 5/5] ARM: BCM53573: Specify USB ports of on-SoC controllers
From: Rafał Miłecki @ 2016-12-07  7:56 UTC (permalink / raw)
  To: Florian Fainelli
  Cc: Arnd Bergmann, Rob Herring, Mark Rutland, Russell King,
	Hauke Mehrtens, bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rafał Miłecki
In-Reply-To: <20161207075655.7396-1-zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>

Broadcom OHCI and EHCI controllers always have 2 ports each on the root
hub. Describe them in DT to allow specifying extra info or referencing
port nodes.

Signed-off-by: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
---
 arch/arm/boot/dts/bcm53573.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/bcm53573.dtsi b/arch/arm/boot/dts/bcm53573.dtsi
index e2c496a..2da04d0 100644
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -124,6 +124,17 @@
 				reg = <0x4000 0x1000>;
 				interrupt-parent = <&gic>;
 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ehci_port1: port@1 {
+					reg = <1>;
+				};
+
+				ehci_port2: port@2 {
+					reg = <2>;
+				};
 			};
 
 			ohci: ohci@d000 {
@@ -133,6 +144,17 @@
 				reg = <0xd000 0x1000>;
 				interrupt-parent = <&gic>;
 				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				ohci_port1: port@1 {
+					reg = <1>;
+				};
+
+				ohci_port2: port@2 {
+					reg = <2>;
+				};
 			};
 		};
 
-- 
2.10.1

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* [PATCH V2 4/5] ARM: BCM5301X: Specify all RAM by including an extra block
From: Rafał Miłecki @ 2016-12-07  7:56 UTC (permalink / raw)
  To: Florian Fainelli
  Cc: Arnd Bergmann, Rob Herring, Mark Rutland, Russell King,
	Hauke Mehrtens, bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rafał Miłecki
In-Reply-To: <20161207075655.7396-1-zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>

The first 128 MiB of RAM can be accessed using an alias at address 0x0.

In theory we could access whole RAM using 0x80000000 - 0xbfffffff range
(up to 1 GiB) but it doesn't seem to work on Northstar. For some reason
(hardware setup left by the bootloader maybe?) 0x80000000 - 0x87ffffff
range can't be used. I reproduced this problem on:
1) Buffalo WZR-600DHP2 (BCM47081)
2) Netgear R6250 (BCM4708)
3) D-Link DIR-885L (BCM47094)

So it seems we're forced to access first 128 MiB using alias at 0x0 and
the rest using real base address + 128 MiB offset which is 0x88000000.

Signed-off-by: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
---
V2: Updated commit message, thanks Jon!
    Included XWR-3100
---
 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts        | 3 ++-
 arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts        | 3 ++-
 arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts  | 3 ++-
 arch/arm/boot/dts/bcm4708-netgear-r6250.dts        | 3 ++-
 arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts     | 3 ++-
 arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts      | 3 ++-
 arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts        | 3 ++-
 arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 3 ++-
 arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts  | 3 ++-
 arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts        | 3 ++-
 arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts  | 3 ++-
 arch/arm/boot/dts/bcm4709-netgear-r7000.dts        | 3 ++-
 arch/arm/boot/dts/bcm4709-netgear-r8000.dts        | 3 ++-
 arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts      | 3 ++-
 arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts      | 3 ++-
 arch/arm/boot/dts/bcm47094-netgear-r8500.dts       | 3 ++-
 16 files changed, 32 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
index 112a5a8..d241cee 100644
--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
index 3600f56..b0e6204 100644
--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
index d49afec0..c9ba6b9 100644
--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x18000000>;
 	};
 
 	spi {
diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
index 8519548..b9f66c0 100644
--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
index 6229ef2..ae0199f 100644
--- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
index 74cfcd3..36b628b1 100644
--- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
index 71b98cf..db8608b 100644
--- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
index 2922536..d51586d 100644
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	spi {
diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
index 184fd92..de041b8 100644
--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	gpio-keys {
diff --git a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
index eac0f52..eaca687 100644
--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
index aab39c9..b32957c 100644
--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x18000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
index 7ab1176..f459a98 100644
--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
index 56d38a3..cd13534 100644
--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
index 7fb9270..64ded76 100644
--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
@@ -21,7 +21,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	nand: nand@18028000 {
diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
index 93cc91d..5cf4ab1 100644
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -18,7 +18,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x08000000>;
 	};
 
 	leds {
diff --git a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
index 7ecd57c..600795e 100644
--- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
@@ -18,7 +18,8 @@
 	};
 
 	memory {
-		reg = <0x00000000 0x08000000>;
+		reg = <0x00000000 0x08000000
+		       0x88000000 0x18000000>;
 	};
 
 	leds {
-- 
2.10.1

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* [PATCH V2 3/5] ARM: BCM5301X: Set GPIO enabling USB power on Netgear R7000
From: Rafał Miłecki @ 2016-12-07  7:56 UTC (permalink / raw)
  To: Florian Fainelli
  Cc: Arnd Bergmann, Rob Herring, Mark Rutland, Russell King,
	Hauke Mehrtens, bcm-kernel-feedback-list, devicetree,
	linux-arm-kernel, linux-kernel, Rafał Miłecki
In-Reply-To: <20161207075655.7396-1-zajec5@gmail.com>

From: Rafał Miłecki <rafal@milecki.pl>

There is one GPIO controlling power for both USB ports.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
V2: Avoid double Signed-off-by due to different e-mail address
---
 arch/arm/boot/dts/bcm4709-netgear-r7000.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
index 0225d82..7ab1176 100644
--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
@@ -100,3 +100,11 @@
 		};
 	};
 };
+
+&usb2 {
+	vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
+};
+
+&usb3 {
+	vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
+};
-- 
2.10.1

^ permalink raw reply related

* [PATCH V2 2/5] ARM: BCM5301X: Specify USB controllers in DT
From: Rafał Miłecki @ 2016-12-07  7:56 UTC (permalink / raw)
  To: Florian Fainelli
  Cc: Arnd Bergmann, Rob Herring, Mark Rutland, Russell King,
	Hauke Mehrtens, bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rafał Miłecki
In-Reply-To: <20161207075655.7396-1-zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

From: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>

There are 3 separated controllers, one per USB /standard/. With PHY
drivers in place they can be simply supported with generic drivers.

Signed-off-by: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
---
V2: Fix node names and reorder ehci with ohci. Thanks Ray!
---
 arch/arm/boot/dts/bcm5301x.dtsi | 33 ++++++++++++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index f09a2bb..a4614c9 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -248,8 +248,26 @@
 
 			#address-cells = <1>;
 			#size-cells = <1>;
+			ranges;
 
-			phys = <&usb2_phy>;
+			interrupt-parent = <&gic>;
+
+			ehci: ehci@21000 {
+				#usb-cells = <0>;
+
+				compatible = "generic-ehci";
+				reg = <0x00021000 0x1000>;
+				interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&usb2_phy>;
+			};
+
+			ohci: ohci@22000 {
+				#usb-cells = <0>;
+
+				compatible = "generic-ohci";
+				reg = <0x00022000 0x1000>;
+				interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+			};
 		};
 
 		usb3: usb3@23000 {
@@ -257,6 +275,19 @@
 
 			#address-cells = <1>;
 			#size-cells = <1>;
+			ranges;
+
+			interrupt-parent = <&gic>;
+
+			xhci: xhci@23000 {
+				#usb-cells = <0>;
+
+				compatible = "generic-xhci";
+				reg = <0x00023000 0x1000>;
+				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+				phys = <&usb3_phy>;
+				phy-names = "usb";
+			};
 		};
 
 		spi@29000 {
-- 
2.10.1

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* [PATCH V2 1/5] ARM: BCM5301X: Fix LAN LED labels for Luxul XWR-3100
From: Rafał Miłecki @ 2016-12-07  7:56 UTC (permalink / raw)
  To: Florian Fainelli
  Cc: Arnd Bergmann, Rob Herring, Mark Rutland, Russell King,
	Hauke Mehrtens, bcm-kernel-feedback-list, devicetree,
	linux-arm-kernel, linux-kernel, Rafał Miłecki

From: Rafał Miłecki <rafal@milecki.pl>

They were named incorrectly most likely due to copy & paste mistake.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
 arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
index 2f4a651..93cc91d 100644
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
@@ -31,13 +31,13 @@
 		};
 
 		lan3	{
-			label = "bcm53xx:green:lan1";
+			label = "bcm53xx:green:lan3";
 			gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "default-off";
 		};
 
 		lan4	{
-			label = "bcm53xx:green:lan0";
+			label = "bcm53xx:green:lan4";
 			gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "default-off";
 		};
@@ -49,7 +49,7 @@
 		};
 
 		lan1	{
-			label = "bcm53xx:green:lan3";
+			label = "bcm53xx:green:lan1";
 			gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "default-off";
 		};
-- 
2.10.1

^ permalink raw reply related


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