* Re: [PATCH v6 2/5] i2c: Add STM32F4 I2C driver
From: Uwe Kleine-König @ 2016-12-15 19:33 UTC (permalink / raw)
To: M'boumba Cedric Madianga
Cc: Wolfram Sang, Rob Herring, Maxime Coquelin, Alexandre Torgue,
Linus Walleij, Patrice Chotard, linux, linux-i2c, devicetree,
linux-arm-kernel, linux-kernel
In-Reply-To: <CAOAejn0Ej90amOZUC2wGNBsTAZVmcqEaViV1-TeoaspiADBkkg@mail.gmail.com>
Hello Cedric,
On Thu, Dec 15, 2016 at 04:26:25PM +0100, M'boumba Cedric Madianga wrote:
> >> +static struct platform_driver stm32f4_i2c_driver = {
> >> + .driver = {
> >> + .name = "stm32f4-i2c",
> >> + .of_match_table = stm32f4_i2c_match,
> >
> > Is this needed?
> Without of_match_table, I could not match an I2C device instance from
> DT with this driver.
> So maybe, there is a misunderstanding.
> Could you please clarify your question ?
I thought (but I could be wrong) that if the driver is called
"stm32f4-i2c", it is used to match "st,stm32f4-i2c" even without
.of_match_table. If this doesn't work, please disregard my question.
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* Re: [PATCH v6 2/5] i2c: Add STM32F4 I2C driver
From: Wolfram Sang @ 2016-12-15 19:40 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: devicetree, Alexandre Torgue, linux-kernel, Linus Walleij,
Patrice Chotard, linux, Rob Herring, linux-i2c, Maxime Coquelin,
M'boumba Cedric Madianga, linux-arm-kernel
In-Reply-To: <20161215193307.436sggu4zy4zezoe@pengutronix.de>
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> I thought (but I could be wrong) that if the driver is called
> "stm32f4-i2c", it is used to match "st,stm32f4-i2c" even without
> .of_match_table. If this doesn't work, please disregard my question.
This currently works only for *i2c client drivers*, it never did for i2c
adapters. And even for clients, this behaviour is going to be deprecated
somewhen. There are people working on it...
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v6 2/5] i2c: Add STM32F4 I2C driver
From: Wolfram Sang @ 2016-12-15 19:42 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: M'boumba Cedric Madianga, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mcoquelin.stm32-Re5JQEeQqe8AvxtiuMwx3w,
alexandre.torgue-qxv4g6HH51o,
linus.walleij-QSEj5FYQhm4dnm+yROfE0A, patrice.chotard-qxv4g6HH51o,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20161213092031.d2ax2pnpzzicriel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
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> > + if (ret) {
> > + dev_err(i2c_dev->dev, "bus not free\n");
> > + ret = -EBUSY;
>
> I'm not sure if "bus not free" deserves an error message. Wolfram?
I tend to agree. But I never enforced it up to now, never found the time
to double check if I could/should enforce it.
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^ permalink raw reply
* Re: [PATCH v4 1/3] bus: simple-pm: add support to pm clocks
From: Bjorn Andersson @ 2016-12-15 22:26 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Bjorn Helgaas, Srinivas Kandagatla,
svarbanov-NEYub+7Iv8PQT0dZR+AlfA, linux-pci, Bjorn Helgaas,
Rob Herring,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Geert Uytterhoeven, Kevin Hilman, Simon Horman, Linux PM list
In-Reply-To: <CAMuHMdUJ8Qn=dR_OMob4BO_4RmY5XemTf_UGM_oJ2VYtBa7Jiw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Tue 15 Nov 00:23 PST 2016, Geert Uytterhoeven wrote:
> +cc linux-pm
>
> On Mon, Nov 14, 2016 at 11:14 PM, Bjorn Helgaas <helgaas-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> > [+cc Geert, Kevin, Simon]
> >
> > On Mon, Nov 14, 2016 at 11:15:53AM +0000, Srinivas Kandagatla wrote:
> >> This patch adds support to pm clocks via device tree, so that the clocks
> >> can be turned on and off during runtime pm. This patch is required for
> >> Qualcomm msm8996 pcie controller which sits on a bus with its own
> >> power-domain and clocks.
> >>
> >> Without this patch the clock associated with the bus are never turned on.
> >>
> >> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> >
> > I don't see a formal maintainer for drivers/bus/simple-pm-bus.c, but I'd
> > like an ack or at least a review from Geert or Simon.
>
> Thanks for letting me know!
>
> >> ---
> >> drivers/bus/simple-pm-bus.c | 13 ++++++++++++-
> >> 1 file changed, 12 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/bus/simple-pm-bus.c b/drivers/bus/simple-pm-bus.c
> >> index c5eb46c..63b7e8c 100644
> >> --- a/drivers/bus/simple-pm-bus.c
> >> +++ b/drivers/bus/simple-pm-bus.c
> >> @@ -11,6 +11,7 @@
> >> #include <linux/module.h>
> >> #include <linux/of_platform.h>
> >> #include <linux/platform_device.h>
> >> +#include <linux/pm_clock.h>
> >> #include <linux/pm_runtime.h>
> >>
> >>
> >> @@ -22,17 +23,26 @@ static int simple_pm_bus_probe(struct platform_device *pdev)
> >>
> >> pm_runtime_enable(&pdev->dev);
> >>
> >> - if (np)
> >> + if (np) {
> >> + of_pm_clk_add_clks(&pdev->dev);
>
> This should work out-of-the-box (that's the actual purpose of this driver),
> if the platform code that registers your PM Domain would take care
> of registering the clocks needed for PM management of the bus.
>
Hi Geert,
I'm having problems finding any code that would make this work
"out-of-the-box". The DT binding documents a clocks property but I
can't find any code referencing this in the kernel.
I see that Srinivas interpreted your response as that we should fold the
clocks in behind the power-domain, rather than referencing them from the
bus - but this seems awkward and would indicate the DT binding being
wrong. Perhaps I'm just misunderstanding the design here?
Which "platform code" do you refer to, can you help me by pointing me to
the code that handles the zb_clk in the Renesas case?
> Adding of_pm_clk_add_clks() here will start managing all clocks of the bus,
> which may not be wanted on all platforms.
>
It would not be strange to do so in the "simple" implementation for the
bus, allowing custom behavior to be implemented in a more specific
driver for a platform with custom needs.
Regards,
Bjorn
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^ permalink raw reply
* [PATCH 1/3] NFC: trf7970a: add device tree option for 27MHz clock
From: Geoff Lansberry @ 2016-12-15 22:30 UTC (permalink / raw)
To: linux-wireless
Cc: lauro.venancio, aloisio.almeida, sameo, robh+dt, mark.rutland,
netdev, devicetree, linux-kernel, mgreer, justin, Geoff Lansberry
From: Geoff Lansberry <geoff@kuvee.com>
---
.../devicetree/bindings/net/nfc/trf7970a.txt | 3 ++
drivers/nfc/trf7970a.c | 42 ++++++++++++++++------
2 files changed, 34 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/nfc/trf7970a.txt b/Documentation/devicetree/bindings/net/nfc/trf7970a.txt
index 32b35a0..9dda879 100644
--- a/Documentation/devicetree/bindings/net/nfc/trf7970a.txt
+++ b/Documentation/devicetree/bindings/net/nfc/trf7970a.txt
@@ -21,6 +21,8 @@ Optional SoC Specific Properties:
- t5t-rmb-extra-byte-quirk: Specify that the trf7970a has the erratum
where an extra byte is returned by Read Multiple Block commands issued
to Type 5 tags.
+- crystal_27mhz: Set to specify that the input frequency to the trf7970a is 27.12MHz
+
Example (for ARM-based BeagleBone with TRF7970A on SPI1):
@@ -43,6 +45,7 @@ Example (for ARM-based BeagleBone with TRF7970A on SPI1):
irq-status-read-quirk;
en2-rf-quirk;
t5t-rmb-extra-byte-quirk;
+ crystal_27mhz;
status = "okay";
};
};
diff --git a/drivers/nfc/trf7970a.c b/drivers/nfc/trf7970a.c
index 26c9dbb..2d2a077 100644
--- a/drivers/nfc/trf7970a.c
+++ b/drivers/nfc/trf7970a.c
@@ -1056,12 +1056,11 @@ static int trf7970a_init(struct trf7970a *trf)
trf->chip_status_ctrl &= ~TRF7970A_CHIP_STATUS_RF_ON;
- ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL, 0);
+ ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL,
+ trf->modulator_sys_clk_ctrl);
if (ret)
goto err_out;
- trf->modulator_sys_clk_ctrl = 0;
-
ret = trf7970a_write(trf, TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS,
TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_96 |
TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_32);
@@ -1181,27 +1180,37 @@ static int trf7970a_in_config_rf_tech(struct trf7970a *trf, int tech)
switch (tech) {
case NFC_DIGITAL_RF_TECH_106A:
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_14443A_106;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_OOK;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_OOK;
trf->guard_time = TRF7970A_GUARD_TIME_NFCA;
break;
case NFC_DIGITAL_RF_TECH_106B:
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_14443B_106;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_ASK10;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_ASK10;
trf->guard_time = TRF7970A_GUARD_TIME_NFCB;
break;
case NFC_DIGITAL_RF_TECH_212F:
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_FELICA_212;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_ASK10;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_ASK10;
trf->guard_time = TRF7970A_GUARD_TIME_NFCF;
break;
case NFC_DIGITAL_RF_TECH_424F:
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_FELICA_424;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_ASK10;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_ASK10;
trf->guard_time = TRF7970A_GUARD_TIME_NFCF;
break;
case NFC_DIGITAL_RF_TECH_ISO15693:
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_OOK;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_OOK;
trf->guard_time = TRF7970A_GUARD_TIME_15693;
break;
default:
@@ -1571,17 +1580,23 @@ static int trf7970a_tg_config_rf_tech(struct trf7970a *trf, int tech)
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE |
TRF7970A_ISO_CTRL_NFC_CE |
TRF7970A_ISO_CTRL_NFC_CE_14443A;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_OOK;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_OOK;
break;
case NFC_DIGITAL_RF_TECH_212F:
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE |
TRF7970A_ISO_CTRL_NFC_NFCF_212;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_ASK10;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_ASK10;
break;
case NFC_DIGITAL_RF_TECH_424F:
trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE |
TRF7970A_ISO_CTRL_NFC_NFCF_424;
- trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_ASK10;
+ trf->modulator_sys_clk_ctrl =
+ (trf->modulator_sys_clk_ctrl & 0xF8) |
+ TRF7970A_MODULATOR_DEPTH_ASK10;
break;
default:
dev_dbg(trf->dev, "Unsupported rf technology: %d\n", tech);
@@ -2043,6 +2058,11 @@ static int trf7970a_probe(struct spi_device *spi)
return ret;
}
+ if (of_property_read_bool(np, "crystal_27mhz")) {
+ trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_27MHZ;
+ dev_dbg(trf->dev, "trf7970a configure crystal_27mhz\n");
+ }
+
if (of_property_read_bool(np, "en2-rf-quirk"))
trf->quirks |= TRF7970A_QUIRK_EN2_MUST_STAY_LOW;
--
Signed-off-by: Geoff Lansberry <geoff@kuvee.com>
^ permalink raw reply related
* [PATCH 2/3] NFC: trf7970a: Add device tree option of 1.8 Volt IO voltage
From: Geoff Lansberry @ 2016-12-15 22:30 UTC (permalink / raw)
To: linux-wireless-u79uwXL29TY76Z2rM5mHXA
Cc: lauro.venancio-430g2QfJUUCGglJvpFV4uA,
aloisio.almeida-430g2QfJUUCGglJvpFV4uA,
sameo-VuQAYsv1563Yd54FQh9/CA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
mgreer-luAo+O/VEmrlveNOaEYElw, justin-R+k406RtEhcAvxtiuMwx3w,
Geoff Lansberry
In-Reply-To: <1481841044-4314-1-git-send-email-glansberry-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Geoff Lansberry <geoff-R+k406RtEhcAvxtiuMwx3w@public.gmane.org>
---
Documentation/devicetree/bindings/net/nfc/trf7970a.txt | 2 ++
drivers/nfc/trf7970a.c | 13 ++++++++++++-
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/nfc/trf7970a.txt b/Documentation/devicetree/bindings/net/nfc/trf7970a.txt
index 9dda879..208f045 100644
--- a/Documentation/devicetree/bindings/net/nfc/trf7970a.txt
+++ b/Documentation/devicetree/bindings/net/nfc/trf7970a.txt
@@ -21,6 +21,7 @@ Optional SoC Specific Properties:
- t5t-rmb-extra-byte-quirk: Specify that the trf7970a has the erratum
where an extra byte is returned by Read Multiple Block commands issued
to Type 5 tags.
+- vdd_io_1v8: Set to specify that the trf7970a io voltage should be set to 1.8V
- crystal_27mhz: Set to specify that the input frequency to the trf7970a is 27.12MHz
@@ -45,6 +46,7 @@ Example (for ARM-based BeagleBone with TRF7970A on SPI1):
irq-status-read-quirk;
en2-rf-quirk;
t5t-rmb-extra-byte-quirk;
+ vdd_io_1v8;
crystal_27mhz;
status = "okay";
};
diff --git a/drivers/nfc/trf7970a.c b/drivers/nfc/trf7970a.c
index 2d2a077..b4c37ab 100644
--- a/drivers/nfc/trf7970a.c
+++ b/drivers/nfc/trf7970a.c
@@ -441,6 +441,7 @@ struct trf7970a {
u8 iso_ctrl_tech;
u8 modulator_sys_clk_ctrl;
u8 special_fcn_reg1;
+ u8 io_ctrl;
unsigned int guard_time;
int technology;
int framing;
@@ -1048,6 +1049,11 @@ static int trf7970a_init(struct trf7970a *trf)
if (ret)
goto err_out;
+ ret = trf7970a_write(trf, TRF7970A_REG_IO_CTRL,
+ trf->io_ctrl|TRF7970A_REG_IO_CTRL_VRS(0x1));
+ if (ret)
+ goto err_out;
+
ret = trf7970a_write(trf, TRF7970A_NFC_TARGET_LEVEL, 0);
if (ret)
goto err_out;
@@ -1764,7 +1770,7 @@ static int _trf7970a_tg_listen(struct nfc_digital_dev *ddev, u16 timeout,
goto out_err;
ret = trf7970a_write(trf, TRF7970A_REG_IO_CTRL,
- TRF7970A_REG_IO_CTRL_VRS(0x1));
+ trf->io_ctrl|TRF7970A_REG_IO_CTRL_VRS(0x1));
if (ret)
goto out_err;
@@ -2058,6 +2064,11 @@ static int trf7970a_probe(struct spi_device *spi)
return ret;
}
+ if (of_property_read_bool(np, "vdd_io_1v8")) {
+ trf->io_ctrl = TRF7970A_REG_IO_CTRL_IO_LOW;
+ dev_dbg(trf->dev, "trf7970a config vdd_io_1v8\n");
+ }
+
if (of_property_read_bool(np, "crystal_27mhz")) {
trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_27MHZ;
dev_dbg(trf->dev, "trf7970a configure crystal_27mhz\n");
--
Signed-off-by: Geoff Lansberry <geoff-R+k406RtEhcAvxtiuMwx3w@public.gmane.org>
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^ permalink raw reply related
* [PATCH 3/3] nfc: trf7970a: Prevent repeated polling from crashing the kernel
From: Geoff Lansberry @ 2016-12-15 22:30 UTC (permalink / raw)
To: linux-wireless
Cc: lauro.venancio, aloisio.almeida, sameo, robh+dt, mark.rutland,
netdev, devicetree, linux-kernel, mgreer, justin, Jaret Cantu,
Geoff Lansberry
In-Reply-To: <1481841044-4314-1-git-send-email-glansberry@gmail.com>
From: Jaret Cantu <jaret.cantu@timesys.com>
Repeated polling attempts cause a NULL dereference error to occur.
This is because the curent state of the trf7970a is reading but
a request has been made to send a command.
The solution is to properly kill the waiting reading (workqueue)
before failing on the send.
---
drivers/nfc/trf7970a.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/nfc/trf7970a.c b/drivers/nfc/trf7970a.c
index b4c37ab..f96a321 100644
--- a/drivers/nfc/trf7970a.c
+++ b/drivers/nfc/trf7970a.c
@@ -1493,6 +1493,10 @@ static int trf7970a_send_cmd(struct nfc_digital_dev *ddev,
(trf->state != TRF7970A_ST_IDLE_RX_BLOCKED)) {
dev_err(trf->dev, "%s - Bogus state: %d\n", __func__,
trf->state);
+ if (trf->state == TRF7970A_ST_WAIT_FOR_RX_DATA ||
+ trf->state == TRF7970A_ST_WAIT_FOR_RX_DATA_CONT)
+ trf->ignore_timeout =
+ !cancel_delayed_work(&trf->timeout_work);
ret = -EIO;
goto out_err;
}
--
Signed-off-by: Geoff Lansberry <geoff@kuvee.com>
^ permalink raw reply related
* [PATCH 1/3 v2] iio: adc: add device tree bindings for Qualcomm PM8xxx ADCs
From: Linus Walleij @ 2016-12-15 22:48 UTC (permalink / raw)
To: Jonathan Cameron, linux-iio-u79uwXL29TY76Z2rM5mHXA
Cc: Linus Walleij, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, Ivan T . Ivanov, Andy Gross,
Bjorn Andersson, Stephen Boyd, Srinivas Kandagatla
This adds the device tree bindings for the Qualcomm PM8xxx
ADCs. This is based on the existing DT bindings for the
SPMI ADC so there are hopefully no controversial features.
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Ivan T. Ivanov <iivanov.xz-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Andy Gross <andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
ChangeLog v1->v2:
- Spelling fixes
---
.../bindings/iio/adc/qcom,pm8xxx-xoadc.txt | 160 +++++++++++++++++++++
1 file changed, 160 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt
diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt b/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt
new file mode 100644
index 000000000000..3c6bca5b4edf
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt
@@ -0,0 +1,160 @@
+Qualcomm's PM8xxx voltage XOADC
+
+The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
+oscillator ADC) encompassing PM8018, PM8038, PM8058, PM8917 and PM8921.
+
+Required properties:
+
+- compatible: should be one of:
+ "qcom,pm8018-adc"
+ "qcom,pm8038-adc"
+ "qcom,pm8058-adc"
+ "qcom,pm8917-adc"
+ "qcom,pm8921-adc"
+
+- reg: should contain the ADC base address in the PMIC, typically
+ 0x197.
+
+The following required properties are standard for IO channels, see
+iio-bindings.txt for more details:
+
+- #address-cells: should be set to <1>
+
+- #size-cells: should be set to <0>
+
+- #io-channel-cells: should be set to <1>
+
+- interrupts: should refer to the parent PMIC interrupt controller
+ and reference the proper ADC interrupt.
+
+Required subnodes:
+
+The ADC channels are configured as subnodes of the ADC. Since some of
+them are used for calibrating the ADC, these nodes are compulsory:
+
+ref_625mv {
+ reg = <0x0c>;
+};
+
+ref_1250mv {
+ reg = <0x0d>;
+};
+
+ref_muxoff {
+ reg = <0x0f>;
+};
+
+These three nodes are used for absolute and ratiometric calibration
+and only need to have these reg values: they are by hardware definition
+1:1 ratio converters that sample 625, 1250 and 0 milliV and create
+an interpolation calibration for all other ADCs.
+
+Optional subnodes: any channels other than channel 0x0c, 0x0d and
+0x0f are optional.
+
+Required channel node properties:
+
+- reg: should contain the hardware channel number in the range
+ 0 .. 0x0f (4 bits). The hardware only supports 16 channels.
+
+Optional channel node properties:
+
+- qcom,decimation:
+ Value type: <u32>
+ Definition: This parameter is used to decrease the ADC sampling rate.
+ Quicker measurements can be made by reducing the decimation ratio.
+ Valid values are 512, 1024, 2048, 4096.
+ If the property is not found, a default value of 512 will be used.
+
+- qcom,ratiometric:
+ Value type: <empty>
+ Definition: Channel calibration type. If this property is specified
+ VADC will use the VDD reference (1.8V) and GND for channel
+ calibration. If the property is not found, the channel will be
+ calibrated with the 0.625V and 1.25V reference channels, also
+ known as an absolute calibration.
+
+- qcom,ratiometric-ref:
+ Value type: <u32>
+ Definition: The reference voltage pair when using ratiometric
+ calibration:
+ 0 = XO_IN/XOADC_GND
+ 1 = PMIC_IN/XOADC_GND
+ 2 = PMIC_IN/BMS_CSP
+ 3 (invalid)
+ 4 = XOADC_GND/XOADC_GND
+ 5 = XOADC_VREF/XOADC_GND
+
+Example:
+
+xoadc: xoadc@197 {
+ compatible = "qcom,pm8058-adc";
+ reg = <0x197>;
+ interrupt-parent = <&pm8058>;
+ interrupts = <76 1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+
+ vcoin {
+ reg = <0x00>;
+ };
+ vbat {
+ reg = <0x01>;
+ };
+ dcin {
+ reg = <0x02>;
+ };
+ ichg {
+ reg = <0x03>;
+ };
+ vph_pwr {
+ reg = <0x04>;
+ };
+ mpp5 {
+ reg = <0x05>;
+ };
+ mpp6 {
+ reg = <0x06>;
+ };
+ mpp7 {
+ reg = <0x07>;
+ };
+ mpp8 {
+ reg = <0x08>;
+ };
+ mpp9 {
+ reg = <0x09>;
+ };
+ usb_vbus {
+ reg = <0x0a>;
+ };
+ die_temp {
+ reg = <0x0b>;
+ };
+ ref_625mv {
+ reg = <0x0c>;
+ };
+ ref_1250mv {
+ reg = <0x0d>;
+ };
+ ref_325mv {
+ reg = <0x0e>;
+ };
+ ref_muxoff {
+ reg = <0x0f>;
+ };
+};
+
+
+/* IIO client node */
+iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&xoadc 0x01>, /* Battery */
+ <&xoadc 0x02>, /* DC in (charger) */
+ <&xoadc 0x04>, /* VPH the main system voltage */
+ <&xoadc 0x0b>, /* Die temperature */
+ <&xoadc 0x0c>, /* Reference voltage 1.25V */
+ <&xoadc 0x0d>, /* Reference voltage 0.625V */
+ <&xoadc 0x0e>; /* Reference voltage 0.325V */
+};
--
2.7.4
^ permalink raw reply related
* Re: [PATCH linux v1 4/4] arm: dts: Add dt-binding to support seven segment display on zaius
From: Linus Walleij @ 2016-12-15 23:07 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Arnd Bergmann, Mark Rutland,
Jaghathiswari Rankappagounder Natarajan,
devicetree@vger.kernel.org, Greg KH, OpenBMC Maillist,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
Rob Herring, Joel Stanley, linux-arm-kernel@lists.infradead.org
In-Reply-To: <20161214114051.GC14217@n2100.armlinux.org.uk>
On Wed, Dec 14, 2016 at 12:40 PM, Russell King - ARM Linux
<linux@armlinux.org.uk> wrote:
> Looking at this more, it's a SPI driver, presumably because the first
> case where it appeared was on a SPI bus.
>
> However, it's not a SPI device as such, it's a piece of standard,
> general purpose logic that's been around for many years, pre-dating
> the SPI bus.
Indeed.
> I think a much more sensible approach would be to turn the GPIO side
> of the 74x164 driver into a library, which can be re-used by multiple
> bus-specific drivers - one for SPI which allows it to be used in its
> current form, one for our platform bus which takes the GPIO lines for
> the data, clock and clear signals.
>
> I also don't see why they shouldn't use the same compatible - they're
> the same _device_ at the end of the day, just wired up differently.
> It makes the binding documentation a little fun wrt what are required
> and optional properties, but nothing that shouldn't be too difficult.
I agree on both accounts.
Sorry for not seeing this in the first place, I was well aware that this
is a standard component and may be connected in a myriad of ways,
so I should have known better :(
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH v4 1/4] mtd: spi-nor: add memory controllers for the Aspeed AST2500 SoC
From: Cyrille Pitchen @ 2016-12-15 23:15 UTC (permalink / raw)
To: Cédric Le Goater, linux-mtd
Cc: Mark Rutland, Boris Brezillon, devicetree, Richard Weinberger,
Marek Vasut, Rob Herring, Joel Stanley, Cyrille Pitchen,
Brian Norris, David Woodhouse
In-Reply-To: <1481557252-13656-2-git-send-email-clg@kaod.org>
Hi Cedric,
Le 12/12/2016 à 16:40, Cédric Le Goater a écrit :
> This driver adds mtd support for the Aspeed AST2500 SoC static memory
> controllers :
>
> * Firmware SPI Memory Controller (FMC)
> . BMC firmware
> . 3 chip select pins (CE0 ~ CE2)
> . supports SPI type flash memory (CE0-CE1)
> . CE2 can be of NOR type flash but this is not supported by the
> driver
>
> * SPI Flash Controller (SPI1 and SPI2)
> . host firmware
> . 2 chip select pins (CE0 ~ CE1)
> . supports SPI type flash memory
>
> Each controller has a memory range on which it maps its flash module
> slaves. Each slave is assigned a memory window for its mapping that
> can be changed at bootime with the Segment Address Register.
>
> Each SPI flash slave can then be accessed in two modes: Command and
> User. When in User mode, accesses to the memory segment of the slaves
> are translated in SPI transfers. When in Command mode, the HW
> generates the SPI commands automatically and the memory segment is
> accessed as if doing a MMIO.
>
> Currently, only the User mode is supported. Command mode needs a
> little more work to check that the memory window on the AHB bus fits
> the module size.
>
> Based on previous work from Milton D. Miller II <miltonm@us.ibm.com>
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
>
> Changes since v3:
> - reworked IO routines to use io{read,write}32_rep
> - changed config option to SPI_ASPEED_SMC
> - fixed aspeed_smc_chip_setup_init() returned value
> - merged the use of the "label" property"
>
> drivers/mtd/spi-nor/Kconfig | 10 +
> drivers/mtd/spi-nor/Makefile | 1 +
> drivers/mtd/spi-nor/aspeed-smc.c | 719 +++++++++++++++++++++++++++++++++++++++
> 3 files changed, 730 insertions(+)
> create mode 100644 drivers/mtd/spi-nor/aspeed-smc.c
>
> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
> index 4a682ee0f632..42168e9d6097 100644
> --- a/drivers/mtd/spi-nor/Kconfig
> +++ b/drivers/mtd/spi-nor/Kconfig
> @@ -29,6 +29,16 @@ config MTD_SPI_NOR_USE_4K_SECTORS
> Please note that some tools/drivers/filesystems may not work with
> 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
>
> +config SPI_ASPEED_SMC
> + tristate "Aspeed flash controllers in SPI mode"
> + depends on ARCH_ASPEED || COMPILE_TEST
> + depends on HAS_IOMEM && OF
> + help
> + This enables support for the Firmware Memory controller (FMC)
> + in the Aspeed AST2500 SoC when attached to SPI NOR chips,
> + and support for the SPI flash memory controller (SPI) for
> + the host firmware. The implementation only supports SPI NOR.
> +
> config SPI_ATMEL_QUADSPI
> tristate "Atmel Quad SPI Controller"
> depends on ARCH_AT91 || (ARM && COMPILE_TEST)
> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
> index 121695e83542..6ff64bc7fa0e 100644
> --- a/drivers/mtd/spi-nor/Makefile
> +++ b/drivers/mtd/spi-nor/Makefile
> @@ -1,4 +1,5 @@
> obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
> +obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o
> obj-$(CONFIG_SPI_ATMEL_QUADSPI) += atmel-quadspi.o
> obj-$(CONFIG_SPI_CADENCE_QUADSPI) += cadence-quadspi.o
> obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o
> diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
> new file mode 100644
> index 000000000000..2667ab7aeb9b
> --- /dev/null
> +++ b/drivers/mtd/spi-nor/aspeed-smc.c
> @@ -0,0 +1,719 @@
> +/*
> + * ASPEED Static Memory Controller driver
> + *
> + * Copyright (c) 2015-2016, IBM Corporation.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */
> +
> +#include <linux/bug.h>
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/partitions.h>
> +#include <linux/mtd/spi-nor.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/sysfs.h>
> +
> +#define DEVICE_NAME "aspeed-smc"
> +
> +/*
> + * The driver only support SPI flash
> + */
> +enum aspeed_smc_flash_type {
> + smc_type_nor = 0,
> + smc_type_nand = 1,
> + smc_type_spi = 2,
> +};
> +
> +struct aspeed_smc_chip;
> +
> +struct aspeed_smc_info {
> + u32 maxsize; /* maximum size of chip window */
> + u8 nce; /* number of chip enables */
> + bool hastype; /* flash type field exists in config reg */
> + u8 we0; /* shift for write enable bit for CE0 */
> + u8 ctl0; /* offset in regs of ctl for CE0 */
> +
> + void (*set_4b)(struct aspeed_smc_chip *chip);
> +};
> +
> +static void aspeed_smc_chip_set_4b(struct aspeed_smc_chip *chip);
> +
> +static const struct aspeed_smc_info fmc_2500_info = {
> + .maxsize = 256 * 1024 * 1024,
> + .nce = 3,
> + .hastype = true,
> + .we0 = 16,
> + .ctl0 = 0x10,
> + .set_4b = aspeed_smc_chip_set_4b,
> +};
> +
> +static const struct aspeed_smc_info spi_2500_info = {
> + .maxsize = 128 * 1024 * 1024,
> + .nce = 2,
> + .hastype = false,
> + .we0 = 16,
> + .ctl0 = 0x10,
> + .set_4b = aspeed_smc_chip_set_4b,
> +};
> +
> +enum aspeed_smc_ctl_reg_value {
> + smc_base, /* base value without mode for other commands */
> + smc_read, /* command reg for (maybe fast) reads */
> + smc_write, /* command reg for writes */
> + smc_max,
> +};
> +
> +struct aspeed_smc_controller;
> +
> +struct aspeed_smc_chip {
> + int cs;
> + struct aspeed_smc_controller *controller;
> + void __iomem *ctl; /* control register */
> + void __iomem *ahb_base; /* base of chip window */
> + u32 ctl_val[smc_max]; /* control settings */
> + enum aspeed_smc_flash_type type; /* what type of flash */
> + struct spi_nor nor;
> +};
> +
> +struct aspeed_smc_controller {
> + struct device *dev;
> +
> + struct mutex mutex; /* controller access mutex */
> + const struct aspeed_smc_info *info; /* type info of controller */
> + void __iomem *regs; /* controller registers */
> + void __iomem *ahb_base; /* per-chip windows resource */
> +
> + struct aspeed_smc_chip *chips[0]; /* pointers to attached chips */
> +};
> +
> +/*
> + * SPI Flash Configuration Register (AST2500 SPI)
> + * or
> + * Type setting Register (AST2500 FMC).
> + * CE0 and CE1 can only be of type SPI. CE2 can be of type NOR but the
> + * driver does not support it.
> + */
> +#define CONFIG_REG 0x0
> +#define CONFIG_DISABLE_LEGACY BIT(31) /* 1 */
> +
> +#define CONFIG_CE2_WRITE BIT(18)
> +#define CONFIG_CE1_WRITE BIT(17)
> +#define CONFIG_CE0_WRITE BIT(16)
> +
> +#define CONFIG_CE2_TYPE BIT(4) /* AST2500 FMC only */
> +#define CONFIG_CE1_TYPE BIT(2) /* AST2500 FMC only */
> +#define CONFIG_CE0_TYPE BIT(0) /* AST2500 FMC only */
> +
> +/*
> + * CE Control Register
> + */
> +#define CE_CONTROL_REG 0x4
> +
> +/*
> + * CEx Control Register
> + */
> +#define CONTROL_AAF_MODE BIT(31)
> +#define CONTROL_IO_MODE_MASK GENMASK(30, 28)
> +#define CONTROL_IO_DUAL_DATA BIT(29)
> +#define CONTROL_IO_DUAL_ADDR_DATA (BIT(29) | BIT(28))
> +#define CONTROL_IO_QUAD_DATA BIT(30)
> +#define CONTROL_IO_QUAD_ADDR_DATA (BIT(30) | BIT(28))
> +#define CONTROL_CE_INACTIVE_SHIFT 24
> +#define CONTROL_CE_INACTIVE_MASK GENMASK(27, \
> + CONTROL_CE_INACTIVE_SHIFT)
> +/* 0 = 16T ... 15 = 1T T=HCLK */
> +#define CONTROL_COMMAND_SHIFT 16
> +#define CONTROL_DUMMY_COMMAND_OUT BIT(15)
> +#define CONTROL_IO_DUMMY_HI BIT(14)
> +#define CONTROL_IO_DUMMY_HI_SHIFT 14
> +#define CONTROL_CLK_DIV4 BIT(13) /* others */
> +#define CONTROL_RW_MERGE BIT(12)
> +#define CONTROL_IO_DUMMY_LO_SHIFT 6
> +#define CONTROL_IO_DUMMY_LO GENMASK(7, \
> + CONTROL_IO_DUMMY_LO_SHIFT)
> +#define CONTROL_IO_DUMMY_MASK (CONTROL_IO_DUMMY_HI | \
> + CONTROL_IO_DUMMY_LO)
> +#define CONTROL_IO_DUMMY_SET(dummy) \
> + (((((dummy) >> 2) & 0x1) << CONTROL_IO_DUMMY_HI_SHIFT) | \
> + (((dummy) & 0x3) << CONTROL_IO_DUMMY_LO_SHIFT))
> +
> +#define CONTROL_CLOCK_FREQ_SEL_SHIFT 8
> +#define CONTROL_CLOCK_FREQ_SEL_MASK GENMASK(11, \
> + CONTROL_CLOCK_FREQ_SEL_SHIFT)
> +#define CONTROL_LSB_FIRST BIT(5)
> +#define CONTROL_CLOCK_MODE_3 BIT(4)
> +#define CONTROL_IN_DUAL_DATA BIT(3)
> +#define CONTROL_CE_STOP_ACTIVE_CONTROL BIT(2)
> +#define CONTROL_COMMAND_MODE_MASK GENMASK(1, 0)
> +#define CONTROL_COMMAND_MODE_NORMAL 0
> +#define CONTROL_COMMAND_MODE_FREAD 1
> +#define CONTROL_COMMAND_MODE_WRITE 2
> +#define CONTROL_COMMAND_MODE_USER 3
> +
> +#define CONTROL_KEEP_MASK \
> + (CONTROL_AAF_MODE | CONTROL_CE_INACTIVE_MASK | CONTROL_CLK_DIV4 | \
> + CONTROL_IO_DUMMY_MASK | CONTROL_CLOCK_FREQ_SEL_MASK | \
> + CONTROL_LSB_FIRST | CONTROL_CLOCK_MODE_3)
> +
> +/*
> + * The Segment Register uses a 8MB unit to encode the start address
> + * and the end address of the mapping window of a flash SPI slave :
> + *
> + * | byte 1 | byte 2 | byte 3 | byte 4 |
> + * +--------+--------+--------+--------+
> + * | end | start | 0 | 0 |
> + */
> +#define SEGMENT_ADDR_REG0 0x30
> +#define SEGMENT_ADDR_START(_r) ((((_r) >> 16) & 0xFF) << 23)
> +#define SEGMENT_ADDR_END(_r) ((((_r) >> 24) & 0xFF) << 23)
> +
> +/*
> + * In user mode all data bytes read or written to the chip decode address
> + * range are transferred to or from the SPI bus. The range is treated as a
> + * fifo of arbitratry 1, 2, or 4 byte width but each write has to be aligned
> + * to its size. The address within the multiple 8kB range is ignored when
> + * sending bytes to the SPI bus.
> + *
> + * On the arm architecture, as of Linux version 4.3, memcpy_fromio and
> + * memcpy_toio on little endian targets use the optimized memcpy routines
> + * that were designed for well behavied memory storage. These routines
> + * have a stutter if the source and destination are not both word aligned,
> + * once with a duplicate access to the source after aligning to the
> + * destination to a word boundary, and again with a duplicate access to
> + * the source when the final byte count is not word aligned.
> + *
> + * When writing or reading the fifo this stutter discards data or sends
> + * too much data to the fifo and can not be used by this driver.
> + *
> + * While the low level io string routines that implement the insl family do
> + * the desired accesses and memory increments, the cross architecture io
> + * macros make them essentially impossible to use on a memory mapped address
> + * instead of a a token from the call to iomap of an io port.
> + *
> + * These fifo routines use readl and friends to a constant io port and update
> + * the memory buffer pointer and count via explicit code. The final updates
> + * to len are optimistically suppressed.
> + */
> +static int aspeed_smc_read_from_ahb(void *buf, const void __iomem *src,
> + size_t len)
> +{
> + if (IS_ALIGNED((uintptr_t)src, sizeof(uintptr_t)) &&
> + IS_ALIGNED((uintptr_t)buf, sizeof(uintptr_t)) &&
> + IS_ALIGNED(len, sizeof(u32))) {
> + ioread32_rep(src, buf, len >> 2);
> + } else {
> + ioread8_rep(src, buf, len);
> + }
> + return 0;
> +}
> +
Maybe It might be something like:
size_t offset = 0;
if (IS_ALIGNED((uintptr_t)src, sizeof(uintptr_t)) &&
IS_ALIGNED((uintptr_t)buf, sizeof(uintptr_t))) {
ioread32_rep(src, buf, len >> 2);
offset = len & ~0x3;
len -= offset;
}
ioread8_rep(src, (const u8 *)buf + offset, len);
I assume the Aspeed SPI controller allows to read as much 32-bit words
as possible before reading the remaining bytes.
This is just a suggested optimization, no need to use it if you don't
want to.
In v3, with readl()/readb(), you used to increment both src and buf in
your while() loop but now with ioreadX_rep() only buf is incremented: it
always reads from src without incrementing this latest address.
I guess it means that the Aspeed SPI controller doesn't care of the
actual value of src as long as it lays inside the chip address range.
This is what you explain in the 1st paragraph of the comment, isn't it?
> +static int aspeed_smc_write_to_ahb(void __iomem *dst, const void *buf,
> + size_t len)
> +{
> + if (IS_ALIGNED((uintptr_t)dst, sizeof(uintptr_t)) &&
> + IS_ALIGNED((uintptr_t)buf, sizeof(uintptr_t)) &&
> + IS_ALIGNED(len, sizeof(u32))) {
> + iowrite32_rep(dst, buf, len >> 2);
> + } else {
> + iowrite8_rep(dst, buf, len);
> + }
> + return 0;
> +}
> +
> +static inline u32 aspeed_smc_chip_write_bit(struct aspeed_smc_chip *chip)
> +{
> + return BIT(chip->controller->info->we0 + chip->cs);
> +}
> +
> +static void aspeed_smc_chip_check_config(struct aspeed_smc_chip *chip)
> +{
> + struct aspeed_smc_controller *controller = chip->controller;
> + u32 reg;
> +
> + reg = readl(controller->regs + CONFIG_REG);
> +
> + if (reg & aspeed_smc_chip_write_bit(chip))
> + return;
> +
> + dev_dbg(controller->dev, "config write is not set ! @%p: 0x%08x\n",
> + controller->regs + CONFIG_REG, reg);
> + reg |= aspeed_smc_chip_write_bit(chip);
> + writel(reg, controller->regs + CONFIG_REG);
> +}
> +
> +static void aspeed_smc_start_user(struct spi_nor *nor)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> + u32 ctl = chip->ctl_val[smc_base];
> +
> + /*
> + * When the chip is controlled in user mode, we need write
> + * access to send the opcodes to it. So check the config.
> + */
> + aspeed_smc_chip_check_config(chip);
> +
> + ctl |= CONTROL_COMMAND_MODE_USER |
> + CONTROL_CE_STOP_ACTIVE_CONTROL;
> + writel(ctl, chip->ctl);
> +
> + ctl &= ~CONTROL_CE_STOP_ACTIVE_CONTROL;
> + writel(ctl, chip->ctl);
> +}
> +
> +static void aspeed_smc_stop_user(struct spi_nor *nor)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> +
> + u32 ctl = chip->ctl_val[smc_read];
> + u32 ctl2 = ctl | CONTROL_COMMAND_MODE_USER |
> + CONTROL_CE_STOP_ACTIVE_CONTROL;
> +
> + writel(ctl2, chip->ctl); /* stop user CE control */
> + writel(ctl, chip->ctl); /* default to fread or read mode */
> +}
> +
This driver seems to use only the "USER" mode so why do you go back the
the "FREAD" or "READ" modes at the very end of aspeed_smc_stop_user() as
the comment suggests?
Do you plan to implement other modes later? Can't you just stay in
"USER" mode? I guess you just need the chip-select control part.
> +static int aspeed_smc_prep(struct spi_nor *nor, enum spi_nor_ops ops)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> +
> + mutex_lock(&chip->controller->mutex);
> + return 0;
> +}
> +
> +static void aspeed_smc_unprep(struct spi_nor *nor, enum spi_nor_ops ops)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> +
> + mutex_unlock(&chip->controller->mutex);
> +}
> +
> +static int aspeed_smc_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> +
> + aspeed_smc_start_user(nor);
> + aspeed_smc_write_to_ahb(chip->ahb_base, &opcode, 1);
> + aspeed_smc_read_from_ahb(buf, chip->ahb_base, len);
> + aspeed_smc_stop_user(nor);
> + return 0;
> +}
> +
> +static int aspeed_smc_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
> + int len)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> +
> + aspeed_smc_start_user(nor);
> + aspeed_smc_write_to_ahb(chip->ahb_base, &opcode, 1);
> + aspeed_smc_write_to_ahb(chip->ahb_base, buf, len);
> + aspeed_smc_stop_user(nor);
> + return 0;
> +}
> +
> +static void aspeed_smc_send_cmd_addr(struct spi_nor *nor, u8 cmd, u32 addr)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> + __be32 temp;
> + u32 cmdaddr;
> +
> + switch (nor->addr_width) {
> + default:
> + WARN_ONCE(1, "Unexpected address width %u, defaulting to 3\n",
> + nor->addr_width);
> + /* FALLTHROUGH */
> + case 3:
> + cmdaddr = addr & 0xFFFFFF;
> + cmdaddr |= cmd << 24;
> +
> + temp = cpu_to_be32(cmdaddr);
> + aspeed_smc_write_to_ahb(chip->ahb_base, &temp, 4);
> + break;
> + case 4:
> + temp = cpu_to_be32(addr);
> + aspeed_smc_write_to_ahb(chip->ahb_base, &cmd, 1);
> + aspeed_smc_write_to_ahb(chip->ahb_base, &temp, 4);
> + break;
> + }
> +}
> +
> +static ssize_t aspeed_smc_read_user(struct spi_nor *nor, loff_t from,
> + size_t len, u_char *read_buf)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> +
> + aspeed_smc_start_user(nor);
> + aspeed_smc_send_cmd_addr(nor, nor->read_opcode, from);
Here, please check nor->read_dummy to write the relevant number dummy
bytes between the address and data cycles.
It should not need too much work to add support to the dummy clock
cycles and it's more reliable/safe.
Indeed, even if you call the current spi_nor_scan() function with the
enum read_mode SPI_NOR_NORMAL value, this function just doesn't care and
selects the Fast Read (0Bh) command instead of the Read (03h) command
for nor->read_opcode if the "m25p,fast-read" DT property is set.
So if any end user sets this property in a custom DT,
aspeed_smc_read_user() would just fail.
Hence I think it's worth dealing with dummy cycles now rather than later.
Actually all (Fast) Read commands but the legacy Read (03h) command need
dummy cycles. So the Read SFDP (5Ah) command does.
For all the (Q)SPI memories I've seen till now, the default factory
settings for the number of dummy cycles are chosen so it always
corresponds to entire bytes, whatever the SPI protocol is (SPI 1-1-2,
1-2-2, 1-1-4, 1-4-4, ...).
Besides, I recommend you use the 0xFF value for dummy cycles: this value
prevents the memory from entering its continuous mode by mistake.
The 0xFF value works for all manufacturers. The SFDP specification seems
to confirm that.
> + aspeed_smc_read_from_ahb(read_buf, chip->ahb_base, len);
> + aspeed_smc_stop_user(nor);
> + return len;
> +}
> +
> +static ssize_t aspeed_smc_write_user(struct spi_nor *nor, loff_t to,
> + size_t len, const u_char *write_buf)
> +{
> + struct aspeed_smc_chip *chip = nor->priv;
> +
> + aspeed_smc_start_user(nor);
> + aspeed_smc_send_cmd_addr(nor, nor->program_opcode, to);
> + aspeed_smc_write_to_ahb(chip->ahb_base, write_buf, len);
> + aspeed_smc_stop_user(nor);
> + return len;
> +}
> +
> +static int aspeed_smc_unregister(struct aspeed_smc_controller *controller)
> +{
> + struct aspeed_smc_chip *chip;
> + int n;
> +
> + for (n = 0; n < controller->info->nce; n++) {
> + chip = controller->chips[n];
> + if (chip)
> + mtd_device_unregister(&chip->nor.mtd);
> + }
> +
> + return 0;
> +}
> +
> +static int aspeed_smc_remove(struct platform_device *dev)
> +{
> + return aspeed_smc_unregister(platform_get_drvdata(dev));
> +}
> +
> +static const struct of_device_id aspeed_smc_matches[] = {
> + { .compatible = "aspeed,ast2500-fmc", .data = &fmc_2500_info },
> + { .compatible = "aspeed,ast2500-spi", .data = &spi_2500_info },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, aspeed_smc_matches);
> +
> +/*
> + * Each chip has a mapping window defined by a segment address
> + * register defining a start and an end address on the AHB bus. These
> + * addresses can be configured to fit the chip size and offer a
> + * contiguous memory region across chips. For the moment, we only
> + * check that each chip segment is valid.
> + */
> +static void __iomem *aspeed_smc_chip_base(struct aspeed_smc_chip *chip,
> + struct resource *res)
> +{
> + struct aspeed_smc_controller *controller = chip->controller;
> + u32 offset = 0;
> + u32 reg;
> +
> + if (controller->info->nce > 1) {
> + reg = readl(controller->regs + SEGMENT_ADDR_REG0 +
> + chip->cs * 4);
> +
> + if (SEGMENT_ADDR_START(reg) >= SEGMENT_ADDR_END(reg))
> + return NULL;
> +
> + offset = SEGMENT_ADDR_START(reg) - res->start;
> + }
> +
> + return controller->ahb_base + offset;
> +}
> +
> +static void aspeed_smc_chip_enable_write(struct aspeed_smc_chip *chip)
> +{
> + struct aspeed_smc_controller *controller = chip->controller;
> + u32 reg;
> +
> + reg = readl(controller->regs + CONFIG_REG);
> +
> + reg |= aspeed_smc_chip_write_bit(chip);
> + writel(reg, controller->regs + CONFIG_REG);
> +}
> +
> +static void aspeed_smc_chip_set_type(struct aspeed_smc_chip *chip, int type)
> +{
> + struct aspeed_smc_controller *controller = chip->controller;
> + u32 reg;
> +
> + chip->type = type;
> +
> + reg = readl(controller->regs + CONFIG_REG);
> + reg &= ~(3 << (chip->cs * 2));
> + reg |= chip->type << (chip->cs * 2);
> + writel(reg, controller->regs + CONFIG_REG);
> +}
> +
> +/*
> + * The AST2500 FMC flash controller should be strapped by hardware, or
> + * autodetected, but the AST2500 SPI flash needs to be set.
> + */
> +static void aspeed_smc_chip_set_4b(struct aspeed_smc_chip *chip)
> +{
> + struct aspeed_smc_controller *controller = chip->controller;
> + u32 reg;
> +
> + if (chip->controller->info == &spi_2500_info) {
> + reg = readl(controller->regs + CE_CONTROL_REG);
> + reg |= 1 << chip->cs;
> + writel(reg, controller->regs + CE_CONTROL_REG);
> + }
> +}
> +
> +static int aspeed_smc_chip_setup_init(struct aspeed_smc_chip *chip,
> + struct resource *res)
> +{
> + struct aspeed_smc_controller *controller = chip->controller;
> + const struct aspeed_smc_info *info = controller->info;
> + u32 reg, base_reg;
> +
> + /*
> + * Always turn on the write enable bit to allow opcodes to be
> + * sent in user mode.
> + */
> + aspeed_smc_chip_enable_write(chip);
> +
> + /* The driver only supports SPI type flash */
> + if (info->hastype)
> + aspeed_smc_chip_set_type(chip, smc_type_spi);
> +
> + /*
> + * Configure chip base address in memory
> + */
> + chip->ahb_base = aspeed_smc_chip_base(chip, res);
> + if (!chip->ahb_base) {
> + dev_warn(chip->nor.dev, "CE segment window closed.\n");
> + return -EINVAL;
> + }
> +
> + /*
> + * Get value of the inherited control register. U-Boot usually
> + * does some timing calibration on the FMC chip, so it's good
> + * to keep them. In the future, we should handle calibration
> + * from Linux.
> + */
> + reg = readl(chip->ctl);
> + dev_dbg(controller->dev, "control register: %08x\n", reg);
> +
> + base_reg = reg & CONTROL_KEEP_MASK;
> + if (base_reg != reg) {
> + dev_info(controller->dev,
> + "control register changed to: %08x\n",
> + base_reg);
dev_dbg() should be enough: end users don't know what to do with the new
control register value, do they?
This is just a suggestion, you can keep dev_info() if you want, I don't
mind :)
> + }
> + chip->ctl_val[smc_base] = base_reg;
> +
> + /*
> + * Retain the prior value of the control register as the
> + * default if it was normal access mode. Otherwise start with
> + * the sanitized base value set to read mode.
> + */
> + if ((reg & CONTROL_COMMAND_MODE_MASK) ==
> + CONTROL_COMMAND_MODE_NORMAL)
> + chip->ctl_val[smc_read] = reg;
> + else
> + chip->ctl_val[smc_read] = chip->ctl_val[smc_base] |
> + CONTROL_COMMAND_MODE_NORMAL;
> +
> + dev_dbg(controller->dev, "default control register: %08x\n",
> + chip->ctl_val[smc_read]);
> + return 0;
> +}
> +
> +static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip)
> +{
> + struct aspeed_smc_controller *controller = chip->controller;
> + const struct aspeed_smc_info *info = controller->info;
> + u32 cmd;
> +
> + if (chip->nor.addr_width == 4 && info->set_4b)
> + info->set_4b(chip);
> +
> + /*
> + * base mode has not been optimized yet. use it for writes.
> + */
> + chip->ctl_val[smc_write] = chip->ctl_val[smc_base] |
> + chip->nor.program_opcode << CONTROL_COMMAND_SHIFT |
> + CONTROL_COMMAND_MODE_WRITE;
> +
> + dev_dbg(controller->dev, "write control register: %08x\n",
> + chip->ctl_val[smc_write]);
> +
> + /*
> + * TODO: Adjust clocks if fast read is supported and interpret
> + * SPI-NOR flags to adjust controller settings.
> + */
> + switch (chip->nor.flash_read) {
> + case SPI_NOR_NORMAL:
> + cmd = CONTROL_COMMAND_MODE_NORMAL;
> + break;
> + case SPI_NOR_FAST:
> + cmd = CONTROL_COMMAND_MODE_FREAD;
> + break;
> + default:
> + dev_err(chip->nor.dev, "unsupported SPI read mode\n");
> + return -EINVAL;
> + }
> +
> + chip->ctl_val[smc_read] |= cmd |
> + CONTROL_IO_DUMMY_SET(chip->nor.read_dummy / 8);
> +
> + dev_dbg(controller->dev, "base control register: %08x\n",
> + chip->ctl_val[smc_read]);
> + return 0;
> +}
> +
Why do you configure both chip->ctrl_val[smc_write] and
chip->ctrl_val[smc_read] if the driver actually only uses
chip->ctrl_val[smc_base] ?
all aspeed_smc_[read|write]_[reg|user]() functions call
aspeed_smc_[start|stop]_user(), so this driver always selects the "USER"
mode and configures the control register based on chip->ctrl_val[smc_base].
> +static int aspeed_smc_setup_flash(struct aspeed_smc_controller *controller,
> + struct device_node *np, struct resource *r)
> +{
> + const struct aspeed_smc_info *info = controller->info;
> + struct device *dev = controller->dev;
> + struct device_node *child;
> + unsigned int cs;
> + int ret = -ENODEV;
> +
> + for_each_available_child_of_node(np, child) {
> + struct aspeed_smc_chip *chip;
> + struct spi_nor *nor;
> + struct mtd_info *mtd;
> +
> + /* This driver does not support NAND or NOR flash devices. */
> + if (!of_device_is_compatible(child, "jedec,spi-nor"))
> + continue;
> +
> + ret = of_property_read_u32(child, "reg", &cs);
> + if (ret) {
> + dev_err(dev, "Couldn't not read chip select.\n");
> + break;
> + }
> +
> + if (cs >= info->nce) {
> + dev_err(dev, "Chip select %d out of range.\n",
> + cs);
> + ret = -ERANGE;
> + break;
> + }
> +
> + if (controller->chips[cs]) {
> + dev_err(dev, "Chip select %d already in use by %s\n",
> + cs, dev_name(controller->chips[cs]->nor.dev));
> + ret = -EBUSY;
> + break;
> + }
> +
> + chip = devm_kzalloc(controller->dev, sizeof(*chip), GFP_KERNEL);
> + if (!chip) {
> + ret = -ENOMEM;
> + break;
> + }
> +
> + chip->controller = controller;
> + chip->ctl = controller->regs + info->ctl0 + cs * 4;
> + chip->cs = cs;
> +
> + nor = &chip->nor;
> + mtd = &nor->mtd;
> +
> + nor->dev = dev;
> + nor->priv = chip;
> + spi_nor_set_flash_node(nor, child);
> + nor->read = aspeed_smc_read_user;
> + nor->write = aspeed_smc_write_user;
> + nor->read_reg = aspeed_smc_read_reg;
> + nor->write_reg = aspeed_smc_write_reg;
> + nor->prepare = aspeed_smc_prep;
> + nor->unprepare = aspeed_smc_unprep;
> +
> + mtd->name = of_get_property(child, "label", NULL);
This new "label" DT property should be removed from this patch and send
in a dedicated patch to be discussed separately. However I agree with
Marek: it looks generic so maybe it could be managed directly from
mtd_device_register() since setting such as name could also be done when
using a NAND flash. Anyway, I don't see the link between this name and
spi-nor. Hence I don't think the DT property should be documented in
jedec,spi-nor.txt.
Be patient because I expect such a topic to be discussed quite a long
time before we all agree, even if this is "just" a new DT property ;)
Best regards,
Cyrille
> +
> + ret = aspeed_smc_chip_setup_init(chip, r);
> + if (ret)
> + break;
> +
> + /*
> + * TODO: Add support for SPI_NOR_QUAD and SPI_NOR_DUAL
> + * attach when board support is present as determined
> + * by of property.
> + */
> + ret = spi_nor_scan(nor, NULL, SPI_NOR_NORMAL);
> + if (ret)
> + break;
> +
> + ret = aspeed_smc_chip_setup_finish(chip);
> + if (ret)
> + break;
> +
> + ret = mtd_device_register(mtd, NULL, 0);
> + if (ret)
> + break;
> +
> + controller->chips[cs] = chip;
> + }
> +
> + if (ret)
> + aspeed_smc_unregister(controller);
> +
> + return ret;
> +}
> +
> +static int aspeed_smc_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct device *dev = &pdev->dev;
> + struct aspeed_smc_controller *controller;
> + const struct of_device_id *match;
> + const struct aspeed_smc_info *info;
> + struct resource *res;
> + int ret;
> +
> + match = of_match_device(aspeed_smc_matches, &pdev->dev);
> + if (!match || !match->data)
> + return -ENODEV;
> + info = match->data;
> +
> + controller = devm_kzalloc(&pdev->dev, sizeof(*controller) +
> + info->nce * sizeof(controller->chips[0]), GFP_KERNEL);
> + if (!controller)
> + return -ENOMEM;
> + controller->info = info;
> + controller->dev = dev;
> +
> + mutex_init(&controller->mutex);
> + platform_set_drvdata(pdev, controller);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + controller->regs = devm_ioremap_resource(dev, res);
> + if (IS_ERR(controller->regs)) {
> + dev_err(dev, "Cannot remap controller address.\n");
> + return PTR_ERR(controller->regs);
> + }
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> + controller->ahb_base = devm_ioremap_resource(dev, res);
> + if (IS_ERR(controller->ahb_base)) {
> + dev_err(dev, "Cannot remap controller address.\n");
> + return PTR_ERR(controller->ahb_base);
> + }
> +
> + ret = aspeed_smc_setup_flash(controller, np, res);
> + if (ret)
> + dev_err(dev, "Aspeed SMC probe failed %d\n", ret);
> +
> + return ret;
> +}
> +
> +static struct platform_driver aspeed_smc_driver = {
> + .probe = aspeed_smc_probe,
> + .remove = aspeed_smc_remove,
> + .driver = {
> + .name = DEVICE_NAME,
> + .of_match_table = aspeed_smc_matches,
> + }
> +};
> +
> +module_platform_driver(aspeed_smc_driver);
> +
> +MODULE_DESCRIPTION("ASPEED Static Memory Controller Driver");
> +MODULE_AUTHOR("Cedric Le Goater <clg@kaod.org>");
> +MODULE_LICENSE("GPL v2");
>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply
* Re: [PATCH 0/3] clkdev: add devm_get_clk_from_child()
From: Kuninori Morimoto @ 2016-12-16 0:02 UTC (permalink / raw)
To: Mark Brown
Cc: Stephen Boyd, Russell King - ARM Linux, Rob Herring, Linux-ALSA,
Linux-DT, Michael Turquette, Linux-Kernel, linux-clk, Linux-ARM
In-Reply-To: <20161215122115.zpxawc2xdc45rczf@sirena.org.uk>
Hi Mark
> > Mark, I think I should re-post 2nd patch (3rd will be dropped) after
> > merge window ? There will be no branch dependency
>
> Should be fine without but obviously if it looks like it's gone AWOL
> then reposting would be good.
OK, Thanks !
^ permalink raw reply
* [PATCH] Docs: dt: Be explicit and consistent in reference to IOMMU specifiers
From: Stuart Yoder @ 2016-12-16 0:16 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, will.deacon-5wv7dgnIgG8,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Stuart Yoder,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA
The generic IOMMU binding says that the meaning of an 'IOMMU specifier'
is defined by the binding of a specific SMMU. The ARM SMMU binding
never explicitly uses the term 'specifier' at all. Update implicit
references to use the explicit term.
In the iommu-map binding change references to iommu-specifier to
"IOMMU specifier" so we are 100% consistent everywhere with terminology
and capitalization.
Signed-off-by: Stuart Yoder <stuart.yoder-3arQi8VN3Tc@public.gmane.org>
---
Documentation/devicetree/bindings/iommu/arm,smmu.txt | 10 +++++-----
Documentation/devicetree/bindings/pci/pci-iommu.txt | 6 +++---
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index e862d148..6cdf32d 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -36,15 +36,15 @@ conditions.
combined interrupt, it must be listed multiple times.
- #iommu-cells : See Documentation/devicetree/bindings/iommu/iommu.txt
- for details. With a value of 1, each "iommus" entry
+ for details. With a value of 1, each IOMMU specifier
represents a distinct stream ID emitted by that device
into the relevant SMMU.
SMMUs with stream matching support and complex masters
- may use a value of 2, where the second cell represents
- an SMR mask to combine with the ID in the first cell.
- Care must be taken to ensure the set of matched IDs
- does not result in conflicts.
+ may use a value of 2, where the second cell of the
+ IOMMU specifier represents an SMR mask to combine with
+ the ID in the first cell. Care must be taken to ensure
+ the set of matched IDs does not result in conflicts.
** System MMU optional properties:
diff --git a/Documentation/devicetree/bindings/pci/pci-iommu.txt b/Documentation/devicetree/bindings/pci/pci-iommu.txt
index 56c8296..0def586 100644
--- a/Documentation/devicetree/bindings/pci/pci-iommu.txt
+++ b/Documentation/devicetree/bindings/pci/pci-iommu.txt
@@ -32,17 +32,17 @@ PCI root complex
Optional properties
-------------------
-- iommu-map: Maps a Requester ID to an IOMMU and associated iommu-specifier
+- iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
data.
The property is an arbitrary number of tuples of
(rid-base,iommu,iommu-base,length).
Any RID r in the interval [rid-base, rid-base + length) is associated with
- the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
+ the listed IOMMU, with the IOMMU specifier (r - rid-base + iommu-base).
- iommu-map-mask: A mask to be applied to each Requester ID prior to being
- mapped to an iommu-specifier per the iommu-map property.
+ mapped to an IOMMU specifier per the iommu-map property.
Example (1)
--
1.9.0
^ permalink raw reply related
* Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800
From: Doug Anderson @ 2016-12-16 0:52 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz
Cc: Mark Rutland, devicetree@vger.kernel.org, Thomas Abraham,
linux-pm@vger.kernel.org, Ben Gamari, Russell King, Rob Herring,
linux-kernel@vger.kernel.org, Javier Martinez Canillas,
Kukjin Kim, Krzysztof Kozlowski, Alim, Arjun K V, Andreas Faerber,
linux-samsung-soc, linux-arm-kernel@lists.infradead.org
In-Reply-To: <2340115.HEG9AYUCMD@amdc3058>
Hi,
On Wed, Dec 14, 2016 at 5:28 AM, Bartlomiej Zolnierkiewicz
<b.zolnierkie@samsung.com> wrote:
>
> On Tuesday, December 13, 2016 04:18:05 PM Javier Martinez Canillas wrote:
>> Hello Bartlomiej,
>
> Hi,
>
>> On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
>> > Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
>> > (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal
>> > cooling maps to account for new OPPs.
>> >
>> > Since new OPPs are not available on all Exynos5422/5800 boards modify
>> > dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
>> > Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
>> >
>> > Tested on Odroid-XU3 and XU3 Lite.
>> >
>> > Cc: Doug Anderson <dianders@chromium.org>
>> > Cc: Javier Martinez Canillas <javier@osg.samsung.com>
>> > Cc: Andreas Faerber <afaerber@suse.de>
>> > Cc: Thomas Abraham <thomas.ab@samsung.com>
>> > Cc: Ben Gamari <ben@smart-cactus.org>
>> > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
>> > ---
>> > arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 14 +++++++-------
>> > arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 17 +++++++++++++++++
>> > arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 ++++
>> > arch/arm/boot/dts/exynos5800.dtsi | 15 +++++++++++++++
>> > 4 files changed, 43 insertions(+), 7 deletions(-)
>> >
>> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> > ===================================================================
>> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-13 15:59:33.779763261 +0100
>> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-13 15:59:33.775763261 +0100
>> > @@ -118,7 +118,7 @@
>> > /*
>> > * When reaching cpu_alert3, reduce CPU
>> > * by 2 steps. On Exynos5422/5800 that would
>> > - * be: 1600 MHz and 1100 MHz.
>> > + * (usually) be: 1800 MHz and 1200 MHz.
>> > */
>> > map3 {
>> > trip = <&cpu_alert3>;
>> > @@ -131,16 +131,16 @@
>> >
>> > /*
>> > * When reaching cpu_alert4, reduce CPU
>> > - * further, down to 600 MHz (11 steps for big,
>> > - * 7 steps for LITTLE).
>> > + * further, down to 600 MHz (13 steps for big,
>> > + * 8 steps for LITTLE).
>> > */
>> > - map5 {
>> > + cooling_map5: map5 {
>> > trip = <&cpu_alert4>;
>> > - cooling-device = <&cpu0 3 7>;
>> > + cooling-device = <&cpu0 3 8>;
>> > };
>> > - map6 {
>> > + cooling_map6: map6 {
>> > trip = <&cpu_alert4>;
>> > - cooling-device = <&cpu4 3 11>;
>> > + cooling-device = <&cpu4 3 13>;
>> > };
>> > };
>> > };
>> > Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
>> > ===================================================================
>> > --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 15:59:33.779763261 +0100
>> > +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 15:59:33.775763261 +0100
>> > @@ -21,6 +21,23 @@
>> > compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
>> > };
>> >
>> > +&cluster_a15_opp_table {
>> > + /delete-node/opp@2000000000;
>> > + /delete-node/opp@1900000000;
>> > +};
>> > +
>> > +&cluster_a7_opp_table {
>> > + /delete-node/opp@1400000000;
>> > +};
>> > +
>>
>> I think that a comment in the DTS why these operating points aren't available
>> in this board will make more clear why the nodes are being deleted.
>
> Ok, I will add these comments in the next patch revision.
>
>> > +&cooling_map5 {
>> > + cooling-device = <&cpu0 3 7>;
>> > +};
>> > +
>> > +&cooling_map6 {
>> > + cooling-device = <&cpu4 3 11>;
>> > +};
>> > +
>> > &pwm {
>> > /*
>> > * PWM 0 -- fan
>> > Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
>> > ===================================================================
>> > --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 15:59:33.779763261 +0100
>> > +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 15:59:33.779763261 +0100
>> > @@ -146,6 +146,10 @@
>> > vdd-supply = <&ldo9_reg>;
>> > };
>> >
>> > +&cluster_a7_opp_table {
>> > + /delete-property/opp@1400000000;
>> > +};
>> > +
>> > &cpu0 {
>> > cpu-supply = <&buck2_reg>;
>> > };
>> > Index: b/arch/arm/boot/dts/exynos5800.dtsi
>> > ===================================================================
>> > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 +0100
>> > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 +0100
>> > @@ -24,6 +24,16 @@
>> > };
>> >
>> > &cluster_a15_opp_table {
>> > + opp@2000000000 {
>> > + opp-hz = /bits/ 64 <2000000000>;
>> > + opp-microvolt = <1250000>;
>> > + clock-latency-ns = <140000>;
>> > + };
>> > + opp@1900000000 {
>> > + opp-hz = /bits/ 64 <1900000000>;
>> > + opp-microvolt = <1250000>;
>> > + clock-latency-ns = <140000>;
>> > + };
>> > opp@1700000000 {
>> > opp-microvolt = <1250000>;
>> > };
>> > @@ -85,6 +95,11 @@
>> > };
>> >
>>
>> AFAIK Thomas restricted the maximum OPP, because for A15 freqs > 1.8GHz the
>> INT rail would need to be scaled up as well since there's a maximum voltage
>> difference between the ARM and INT rails before the system becomes unstable:
>>
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/276766.html
>> https://lkml.org/lkml/2014/5/2/419
>>
>> The ChromiumOS vendor tree uses a virtual regulator driver that makes sure
>> the maximum voltage skew is between a limit. But that never made to mainline:
>>
>> https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.8/arch/arm/boot/dts/exynos5420-peach-pit.dtsi#90
>> https://lkml.org/lkml/2014/4/29/28
>>
>> Did that change and there's infrastructure in mainline now to cope with that?
>> If that's the case, I think it would be good to mention in the commit message.
>
> I was not aware of this limitation and AFAIK mainline has currently
> no code to handle it. I also cannot find any code to handle this in
> Hardkernel's vendor kernel for Odroid-XU3 board.
>
> Do you know whether this problem exists also on Exynos5422/5800
> SoCs or only on Exynos5420 one? I see that ChromiumOS uses virtual
> regulator code also on Exynos5800 SoC based Peach Pi board but was
> the problem actually present on this board?
This was a long time ago and my memory is quite fuzzy. ...and I think
others have answered some of this already...
...but from my memory:
* This problem was said to exist on all Exynos 5420/5422/5800 SoCs.
* Samsung's original proposal included using the QoS subsystem to
enforce these constraints. I don't know where the Hardkernel source
is offhand, but you could check if that solution was used there? I
see one comment that links to these CLs:
https://chromium-review.googlesource.com/#/c/187420/
https://chromium-review.googlesource.com/#/c/187231/2
https://chromium-review.googlesource.com/#/c/184439/7
https://chromium-review.googlesource.com/#/c/184460/10
https://chromium-review.googlesource.com/#/c/186804/4
https://chromium-review.googlesource.com/#/c/186805/4
https://chromium-review.googlesource.com/#/c/186806/3
https://chromium-review.googlesource.com/#/c/186353/6
* Before using the voltage locker, we used an interrim solution of
bumping the INT frequency up to 500 MHz. See
<https://chromium-review.googlesource.com/#/c/187992/> and
<https://chromium-review.googlesource.com/#/c/187888/>. Perhaps this
is something that's happening upstream?
> [ I added Arjun to Cc:, maybe he can help in explaining this issue
> (unfortunately Inderpal's email is no longer working). ]
>
> Please also note that on Exynos5422/5800 SoCs the same ARM rail
> voltage is used for 1.9 GHz & 2.0 GHz OPPs as for the 1.8 GHz one.
> IOW if the problem exists it is already present in the mainline
> kernel.
Interesting. In the ChromeOS tree I see significantly higher voltages
needed... Note that one might naively look at
<https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.8/drivers/cpufreq/exynos5420-cpufreq.c#178>.
1362500, /* L0 2100 */
1312500, /* L1 2000 */
..but, amazingly enough those voltages aren't used at all. Surprise!
I believe that the above numbers are actually not used and the ASV
numbers are used instead. See
<https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.8/arch/arm/mach-exynos/include/mach/asv-exynos542x.h#452>
{ 2100000,
1350000, 1350000, 1350000, 1350000, 1350000,
1337500, 1325000, 1312500, 1300000, 1287500,
1275000, 1262500, 1250000, 1237500 },
I believe that interpretation there is: some bins of the CPU can run
at 2.1 GHz just fine at 1.25 V but others need up to 1.35V.
...so if you're running at 2.1 GHz at 1.25V then perhaps you're just
running on a CPU from a nice bin?
---
Anyway, I'm not setup at the moment to do a whole lot on exynos boards
(I'd have to go and dig some out and set them up again), so not sure
I'll be terribly useful in this discussion. ...but I can try to dig
up history, anyway.
-Doug
^ permalink raw reply
* Re: [PATCH v2] ARM: dts: Add missing CPU frequencies for Exynos5422/5800
From: Doug Anderson @ 2016-12-16 0:54 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz
Cc: Mark Rutland, devicetree@vger.kernel.org, Thomas Abraham,
linux-pm@vger.kernel.org, Ben Gamari, Russell King, Rob Herring,
linux-kernel@vger.kernel.org, Javier Martinez Canillas,
Kukjin Kim, Krzysztof Kozlowski, Arjun K V, Andreas Faerber,
linux-samsung-soc, linux-arm-kernel@lists.infradead.org
In-Reply-To: <10512254.nyUcL0zgTP@amdc3058>
Hi,
On Thu, Dec 15, 2016 at 3:55 AM, Bartlomiej Zolnierkiewicz
<b.zolnierkie@samsung.com> wrote:
> Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> cooling maps to account for new OPPs.
>
> Since new OPPs are not available on all Exynos5422/5800 boards modify
> dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
>
> Tested on Odroid-XU3 and XU3 Lite.
>
> Cc: Doug Anderson <dianders@chromium.org>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Cc: Andreas Faerber <afaerber@suse.de>
> Cc: Thomas Abraham <thomas.ab@samsung.com>
> Cc: Ben Gamari <ben@smart-cactus.org>
> Cc: Arjun K V <arjun.kv@samsung.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> v2:
> - added comments about limitations of SoC revisions used by Odroid-XU3 Lite and
> Peach Pi boards (suggested by Javier)
> - removed redundant opp_a7_14 label
> - added Arjun to Cc:
>
> Javier, could you test it on Peach Pi board?
>
> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 14 ++++++-------
> arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 22 +++++++++++++++++++++
> arch/arm/boot/dts/exynos5800-peach-pi.dts | 9 ++++++++
> arch/arm/boot/dts/exynos5800.dtsi | 15 ++++++++++++++
> 4 files changed, 53 insertions(+), 7 deletions(-)
>
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.365955950 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-15 12:43:54.361955949 +0100
> @@ -118,7 +118,7 @@
> /*
> * When reaching cpu_alert3, reduce CPU
> * by 2 steps. On Exynos5422/5800 that would
> - * be: 1600 MHz and 1100 MHz.
> + * (usually) be: 1800 MHz and 1200 MHz.
> */
> map3 {
> trip = <&cpu_alert3>;
> @@ -131,16 +131,16 @@
>
> /*
> * When reaching cpu_alert4, reduce CPU
> - * further, down to 600 MHz (11 steps for big,
> - * 7 steps for LITTLE).
> + * further, down to 600 MHz (13 steps for big,
> + * 8 steps for LITTLE).
> */
> - map5 {
> + cooling_map5: map5 {
> trip = <&cpu_alert4>;
> - cooling-device = <&cpu0 3 7>;
> + cooling-device = <&cpu0 3 8>;
> };
> - map6 {
> + cooling_map6: map6 {
> trip = <&cpu_alert4>;
> - cooling-device = <&cpu4 3 11>;
> + cooling-device = <&cpu4 3 13>;
> };
> };
> };
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.365955950 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-15 12:43:54.361955949 +0100
> @@ -21,6 +21,28 @@
> compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
> };
>
> +/*
> + * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies
> + * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores.
> + * Therefore we need to update OPPs tables and thermal maps accordingly.
> + */
> +&cluster_a15_opp_table {
> + /delete-node/opp@2000000000;
> + /delete-node/opp@1900000000;
> +};
> +
> +&cluster_a7_opp_table {
> + /delete-node/opp@1400000000;
> +};
> +
> +&cooling_map5 {
> + cooling-device = <&cpu0 3 7>;
> +};
> +
> +&cooling_map6 {
> + cooling-device = <&cpu4 3 11>;
> +};
> +
> &pwm {
> /*
> * PWM 0 -- fan
> Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.365955950 +0100
> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-15 12:43:54.361955949 +0100
> @@ -146,6 +146,15 @@
> vdd-supply = <&ldo9_reg>;
> };
>
> +/*
> + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores
> + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to
> + * update A7 OPPs table accordingly.
> + */
> +&cluster_a7_opp_table {
> + /delete-property/opp@1400000000;
> +};
> +
> &cpu0 {
> cpu-supply = <&buck2_reg>;
> };
> Index: b/arch/arm/boot/dts/exynos5800.dtsi
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100
> +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100
> @@ -24,6 +24,16 @@
> };
>
> &cluster_a15_opp_table {
> + opp@2000000000 {
> + opp-hz = /bits/ 64 <2000000000>;
> + opp-microvolt = <1250000>;
> + clock-latency-ns = <140000>;
> + };
> + opp@1900000000 {
> + opp-hz = /bits/ 64 <1900000000>;
> + opp-microvolt = <1250000>;
> + clock-latency-ns = <140000>;
> + };
I don't think the voltages you listed are high enough for all peach pi
boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research
I did. See my response to v1.
^ permalink raw reply
* Re: [PATCH 1/3] NFC: trf7970a: add device tree option for 27MHz clock
From: Mark Greer @ 2016-12-16 1:06 UTC (permalink / raw)
To: Geoff Lansberry
Cc: linux-wireless-u79uwXL29TY76Z2rM5mHXA,
lauro.venancio-430g2QfJUUCGglJvpFV4uA,
aloisio.almeida-430g2QfJUUCGglJvpFV4uA,
sameo-VuQAYsv1563Yd54FQh9/CA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
justin-R+k406RtEhcAvxtiuMwx3w
In-Reply-To: <1481841044-4314-1-git-send-email-glansberry-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Hi Geoff.
On Thu, Dec 15, 2016 at 05:30:42PM -0500, Geoff Lansberry wrote:
> From: Geoff Lansberry <geoff-R+k406RtEhcAvxtiuMwx3w@public.gmane.org>
Please add an informative commit description to all of your commits.
No matter how trivial this patch may seem to you now, it may not be
to others (or to you in a few years).
> diff --git a/drivers/nfc/trf7970a.c b/drivers/nfc/trf7970a.c
> index 26c9dbb..2d2a077 100644
> --- a/drivers/nfc/trf7970a.c
> +++ b/drivers/nfc/trf7970a.c
> @@ -1181,27 +1180,37 @@ static int trf7970a_in_config_rf_tech(struct trf7970a *trf, int tech)
> switch (tech) {
> case NFC_DIGITAL_RF_TECH_106A:
> trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_14443A_106;
> - trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_DEPTH_OOK;
> + trf->modulator_sys_clk_ctrl =
> + (trf->modulator_sys_clk_ctrl & 0xF8) |
nit: s/0xF8/0xf8/ please (for consistency with the rest of the file.).
Otherwise, it looks good.
Thanks,
Mark
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^ permalink raw reply
* Re: [PATCH 2/3] NFC: trf7970a: Add device tree option of 1.8 Volt IO voltage
From: Mark Greer @ 2016-12-16 1:13 UTC (permalink / raw)
To: Geoff Lansberry
Cc: linux-wireless-u79uwXL29TY76Z2rM5mHXA,
lauro.venancio-430g2QfJUUCGglJvpFV4uA,
aloisio.almeida-430g2QfJUUCGglJvpFV4uA,
sameo-VuQAYsv1563Yd54FQh9/CA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
justin-R+k406RtEhcAvxtiuMwx3w
In-Reply-To: <1481841044-4314-2-git-send-email-glansberry-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Thu, Dec 15, 2016 at 05:30:43PM -0500, Geoff Lansberry wrote:
> From: Geoff Lansberry <geoff-R+k406RtEhcAvxtiuMwx3w@public.gmane.org>
Missing commit description.
> diff --git a/drivers/nfc/trf7970a.c b/drivers/nfc/trf7970a.c
> index 2d2a077..b4c37ab 100644
> --- a/drivers/nfc/trf7970a.c
> +++ b/drivers/nfc/trf7970a.c
> @@ -1048,6 +1049,11 @@ static int trf7970a_init(struct trf7970a *trf)
> if (ret)
> goto err_out;
>
> + ret = trf7970a_write(trf, TRF7970A_REG_IO_CTRL,
> + trf->io_ctrl|TRF7970A_REG_IO_CTRL_VRS(0x1));
s/l|T/l | T/
Otherwise, looks good.
Mark
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^ permalink raw reply
* Re: [PATCH 3/3] nfc: trf7970a: Prevent repeated polling from crashing the kernel
From: Mark Greer @ 2016-12-16 1:18 UTC (permalink / raw)
To: Geoff Lansberry
Cc: linux-wireless-u79uwXL29TY76Z2rM5mHXA,
lauro.venancio-430g2QfJUUCGglJvpFV4uA,
aloisio.almeida-430g2QfJUUCGglJvpFV4uA,
sameo-VuQAYsv1563Yd54FQh9/CA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
justin-R+k406RtEhcAvxtiuMwx3w, Jaret Cantu
In-Reply-To: <1481841044-4314-3-git-send-email-glansberry-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Thu, Dec 15, 2016 at 05:30:44PM -0500, Geoff Lansberry wrote:
> From: Jaret Cantu <jaret.cantu-jEh4hwF5bVhBDgjK7y7TUQ@public.gmane.org>
>
> Repeated polling attempts cause a NULL dereference error to occur.
> This is because the curent state of the trf7970a is reading but
> a request has been made to send a command.
>
> The solution is to properly kill the waiting reading (workqueue)
> before failing on the send.
Maybe its just me but I find this description a little hard to grok.
Mind reworking it?
The patch itself looks fine.
Thanks,
Mark
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^ permalink raw reply
* RFC: extend iommu-map binding to support #iommu-cells > 1
From: Stuart Yoder @ 2016-12-16 2:36 UTC (permalink / raw)
To: Mark Rutland, robin.murphy-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
For context, please see the thread:
https://www.spinics.net/lists/arm-kernel/msg539066.html
The existing iommu-map binding did not account for the situation where
#iommu-cells == 2, as permitted in the ARM SMMU binding. The 2nd cell
of the IOMMU specifier being the SMR mask. The existing binding defines
the mapping as:
Any RID r in the interval [rid-base, rid-base + length) is associated with
the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
...and that does not work if iommu-base is 2 cells, the second being the
SMR mask.
While this can be worked around by always having length=1, it seems we
can get this cleaned up by updating the binding definition for iommu-map.
See patch below. Thoughts?
Thanks,
Stuart
-------------------------------------------------------------------------
diff --git a/Documentation/devicetree/bindings/pci/pci-iommu.txt b/Documentation/devicetree/bindings/pci/pci-iommu.txt
index 56c8296..e81b461 100644
--- a/Documentation/devicetree/bindings/pci/pci-iommu.txt
+++ b/Documentation/devicetree/bindings/pci/pci-iommu.txt
@@ -38,8 +38,20 @@ Optional properties
The property is an arbitrary number of tuples of
(rid-base,iommu,iommu-base,length).
- Any RID r in the interval [rid-base, rid-base + length) is associated with
- the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
+ If the associated IOMMU has an #iommu-cells value of 1, any RID r in the
+ interval [rid-base, rid-base + length) is associated with the listed IOMMU,
+ with the iommu-specifier (r - rid-base + iommu-base).
+
+ ARM SMMU Note:
+ The ARM SMMU binding permits an #iommu-cells value of 2 and in this
+ case defines an IOMMU specifier to be: (stream-id,smr-mask)
+
+ In an iommu-map this means the iommu-base consists of 2 cells:
+ (rid-base,iommu,[stream-id,smr-mask],length).
+
+ In this case the RID to IOMMU specifier mapping is defined to be:
+ any RID r in the interval [rid-base, rid-base + length) is associated
+ with the listed IOMMU, with the iommu-specifier (r - rid-base + stream-id).
- iommu-map-mask: A mask to be applied to each Requester ID prior to being
mapped to an iommu-specifier per the iommu-map property.
^ permalink raw reply related
* RE: RFC: extend iommu-map binding to support #iommu-cells > 1
From: Bharat Bhushan @ 2016-12-16 3:46 UTC (permalink / raw)
To: Stuart Yoder, Mark Rutland,
robin.murphy-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
In-Reply-To: <VI1PR0401MB2638DE2D30F8423F6F8C7A6E8D9C0-9IDQY6o3qQjcXZ0H4ZLnAo3W/0Ik+aLCnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
> -----Original Message-----
> From: Stuart Yoder
> Sent: Friday, December 16, 2016 8:07 AM
> To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>; robin.murphy-5wv7dgnIgG8@public.gmane.org;
> will.deacon-5wv7dgnIgG8@public.gmane.org
> Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org; Bharat Bhushan <bharat.bhushan-3arQi8VN3Tc@public.gmane.org>;
> Nipun Gupta <nipun.gupta-3arQi8VN3Tc@public.gmane.org>; Diana Madalina Craciun
> <diana.craciun-3arQi8VN3Tc@public.gmane.org>; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; iommu-cunTk1MwBs/ROKNJybVBZg@public.gmane.org
> foundation.org
> Subject: RFC: extend iommu-map binding to support #iommu-cells > 1
>
> For context, please see the thread:
> https://www.spinics.net/lists/arm-kernel/msg539066.html
>
> The existing iommu-map binding did not account for the situation where
> #iommu-cells == 2, as permitted in the ARM SMMU binding. The 2nd cell of
> the IOMMU specifier being the SMR mask. The existing binding defines the
> mapping as:
> Any RID r in the interval [rid-base, rid-base + length) is associated with
> the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
>
> ...and that does not work if iommu-base is 2 cells, the second being the SMR
> mask.
>
> While this can be worked around by always having length=1, it seems we can
> get this cleaned up by updating the binding definition for iommu-map.
>
> See patch below. Thoughts?
>
> Thanks,
> Stuart
>
> -------------------------------------------------------------------------
>
> diff --git a/Documentation/devicetree/bindings/pci/pci-iommu.txt
> b/Documentation/devicetree/bindings/pci/pci-iommu.txt
> index 56c8296..e81b461 100644
> --- a/Documentation/devicetree/bindings/pci/pci-iommu.txt
> +++ b/Documentation/devicetree/bindings/pci/pci-iommu.txt
> @@ -38,8 +38,20 @@ Optional properties
> The property is an arbitrary number of tuples of
> (rid-base,iommu,iommu-base,length).
>
> - Any RID r in the interval [rid-base, rid-base + length) is associated with
> - the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
> + If the associated IOMMU has an #iommu-cells value of 1, any RID r in
> + the interval [rid-base, rid-base + length) is associated with the
> + listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
> +
> + ARM SMMU Note:
> + The ARM SMMU binding permits an #iommu-cells value of 2 and in this
> + case defines an IOMMU specifier to be: (stream-id,smr-mask)
> +
> + In an iommu-map this means the iommu-base consists of 2 cells:
> + (rid-base,iommu,[stream-id,smr-mask],length).
> +
> + In this case the RID to IOMMU specifier mapping is defined to be:
> + any RID r in the interval [rid-base, rid-base + length) is associated
> + with the listed IOMMU, with the iommu-specifier (r - rid-base + stream-
> id).
Should not this be (r - rid-base + (stream-id & smr-mask)) ?
So basically stream-id ranges from (stream-id & smr-mask) - (stream-id & smr-mask + (length - 1) )
Thanks
-Bharat
>
> - iommu-map-mask: A mask to be applied to each Requester ID prior to
> being
> mapped to an iommu-specifier per the iommu-map property.
>
>
^ permalink raw reply
* Re: [PATCH v3 2/2] drm/panel: simple: Add support BOE nv101wxmn51
From: Stéphane Marchesin @ 2016-12-16 5:22 UTC (permalink / raw)
To: Caesar Wang
Cc: devicetree, Linux Kernel list, dri-devel@lists.freedesktop.org,
dianders, Rob Herring
In-Reply-To: <1481685596-15608-2-git-send-email-wxt@rock-chips.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
On Tue, Dec 13, 2016 at 7:19 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> 10.1WXGA is a color active matrix TFT LCD module using amorphous silicon
> TFT's as an active switching devices. It can be supported by the
> simple-panel driver.
>
> Read the panel default edid information:
>
> EDID MODE DETAILS
> name = <NULL>
> pixel_clock = 71900
> lvds_dual_channel = 0
> refresh = 0
> ha = 1280
> hbl = 160
> hso = 48
> hspw = 32
> hborder = 0
> va = 800
> vbl = 32
> vso = 3
> vspw = 5
> vborder = 0
> phsync = +
> pvsync = -
> x_mm = 0
> y_mm = 0
> drm_display_mode
> .hdisplay = 1280
> .hsync_start = 1328
> .hsync_end = 1360
> .htotal = 1440
> .vdisplay = 800
> .vsync_start = 803
> .vsync_end = 808
> .vtotal = 832
>
> There are two modes in the edid:
> Detailed mode1: Clock 71.900 MHz, 216 mm x 135 mm
> 1280 1328 1360 1440 hborder 0
> 800 803 808 832 vborder 0
> +hsync -vsync
> Detailed mode2: Clock 57.500 MHz, 216 mm x 135 mm
> 1280 1328 1360 1440 hborder 0
> 800 803 808 832 vborder 0
> +hsync -vsync
>
> Add the both edid to support more modes for BOE nv101wxmn51.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v3:
> - As Stéphane commented on https://patchwork.kernel.org/patch/9465911,
> add downclock mode for edid.
>
> Changes in v2:
> - fix the vsync_start and vsync_end from the edid.
> - change the commit.
>
> drivers/gpu/drm/panel/panel-simple.c | 45 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 06aaf79..1ce25b5 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -668,6 +668,48 @@ static const struct panel_desc avic_tm070ddh03 = {
> },
> };
>
> +static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
> + {
> + .clock = 71900,
> + .hdisplay = 1280,
> + .hsync_start = 1280 + 48,
> + .hsync_end = 1280 + 48 + 32,
> + .htotal = 1280 + 48 + 32 + 80,
> + .vdisplay = 800,
> + .vsync_start = 800 + 3,
> + .vsync_end = 800 + 3 + 5,
> + .vtotal = 800 + 3 + 5 + 24,
> + .vrefresh = 60,
> + },
> + {
> + .clock = 57500,
> + .hdisplay = 1280,
> + .hsync_start = 1280 + 48,
> + .hsync_end = 1280 + 48 + 32,
> + .htotal = 1280 + 48 + 32 + 80,
> + .vdisplay = 800,
> + .vsync_start = 800 + 3,
> + .vsync_end = 800 + 3 + 5,
> + .vtotal = 800 + 3 + 5 + 24,
> + .vrefresh = 48,
> + },
> +};
> +
> +static const struct panel_desc boe_nv101wxmn51 = {
> + .modes = boe_nv101wxmn51_modes,
> + .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
> + .bpc = 8,
> + .size = {
> + .width = 217,
> + .height = 136,
> + },
> + .delay = {
> + .prepare = 210,
> + .enable = 50,
> + .unprepare = 160,
> + },
> +};
> +
> static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
> .clock = 66770,
> .hdisplay = 800,
> @@ -1748,6 +1790,9 @@ static const struct of_device_id platform_of_match[] = {
> .compatible = "avic,tm070ddh03",
> .data = &avic_tm070ddh03,
> }, {
> + .compatible = "boe,nv101wxmn51",
> + .data = &boe_nv101wxmn51,
> + }, {
> .compatible = "chunghwa,claa070wp03xg",
> .data = &chunghwa_claa070wp03xg,
> }, {
> --
> 2.7.4
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply
* [PATCH v5 0/6] Add support for IR transmitters
From: Andi Shyti @ 2016-12-16 6:12 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Sean Young, Rob Herring, Mark Rutland,
Richard Purdie, Jacek Anaszewski, Heiner Kallweit
Cc: linux-media, devicetree, linux-leds, linux-kernel, Andi Shyti,
Andi Shyti
Hi,
The main goal is to add support in the rc framework for IR
transmitters, which currently is only supported by lirc but that
is not the preferred way.
The last patch adds support for an IR transmitter driven by
the MOSI line of an SPI controller, it's the case of the Samsung
TM2(e) board which support is currently ongoing.
The last patch adds support for an IR transmitter driven by
the MOSI line of an SPI controller, it's the case of the Samsung
TM2(e) board which support is currently ongoing.
Thanks,
Andi
Changelog from version 4:
-------------------------
patch 2: fixed a slip on a copy/paste. Thanks again Sean!
Changelog from version 3:
-------------------------
Added the patches Sean's review.
patch 1: commit ddbf7d5a has introduced the devm_* managed version
of rc_allocate_device and rc_register_device, this patch
has been rebased on top of it and adds the driver type
as a parameter of the devm_rc_allocate_device.
patch 3: fixes a warning from the kbuild test robot
patch 5: after a discussion with Rob, despite mine, Jacek's and
Mauro's objections [*] the binding has been placed under
leds/irled/spi-ir-led.txt
patch 6: uses the new devm_* allocation and registration rc
functions
[*] https://www.spinics.net/lists/linux-leds/msg07062.html
https://www.spinics.net/lists/linux-leds/msg07164.html
https://www.spinics.net/lists/linux-leds/msg07167.html
Changelog from version 2:
-------------------------
The original patch number 5 has been abandoned because it was not
bringing much benenfit.
patch 1: rebased on the new kernel.
patch 3: removed the sysfs attribute protocol for transmitters
patch 5: the binding has been moved to the leds section instead
of the media. Fixed all the comments from Rob
patch 6: fixed all the comments from Sean added also Sean's
review.
Changelog from version 1:
-------------------------
The RFC is now PATCH. The main difference is that this version
doesn't try to add the any bit streaming protocol and doesn't
modify any LIRC interface specification.
patch 1: updates all the drivers using rc_allocate_device
patch 2: fixed errors and warning reported from the kbuild test
robot
patch 5: this patch has been dropped and replaced with a new one
which avoids waiting for transmitters.
patch 6: added new properties to the dts specification
patch 7: the driver uses the pulse/space input and converts it to
a bit stream.
Andi Shyti (6):
[media] rc-main: assign driver type during allocation
[media] rc-main: split setup and unregister functions
[media] rc-core: add support for IR raw transmitters
[media] rc-ir-raw: do not generate any receiving thread for raw
transmitters
Documentation: bindings: add documentation for ir-spi device driver
[media] rc: add support for IR LEDs driven through SPI
.../devicetree/bindings/leds/irled/spi-ir-led.txt | 29 +++
drivers/hid/hid-picolcd_cir.c | 3 +-
drivers/media/cec/cec-core.c | 4 +-
drivers/media/common/siano/smsir.c | 3 +-
drivers/media/i2c/ir-kbd-i2c.c | 2 +-
drivers/media/pci/bt8xx/bttv-input.c | 2 +-
drivers/media/pci/cx23885/cx23885-input.c | 11 +-
drivers/media/pci/cx88/cx88-input.c | 3 +-
drivers/media/pci/dm1105/dm1105.c | 3 +-
drivers/media/pci/mantis/mantis_input.c | 2 +-
drivers/media/pci/saa7134/saa7134-input.c | 2 +-
drivers/media/pci/smipcie/smipcie-ir.c | 3 +-
drivers/media/pci/ttpci/budget-ci.c | 2 +-
drivers/media/rc/Kconfig | 9 +
drivers/media/rc/Makefile | 1 +
drivers/media/rc/ati_remote.c | 3 +-
drivers/media/rc/ene_ir.c | 3 +-
drivers/media/rc/fintek-cir.c | 3 +-
drivers/media/rc/gpio-ir-recv.c | 3 +-
drivers/media/rc/igorplugusb.c | 3 +-
drivers/media/rc/iguanair.c | 3 +-
drivers/media/rc/img-ir/img-ir-hw.c | 2 +-
drivers/media/rc/img-ir/img-ir-raw.c | 3 +-
drivers/media/rc/imon.c | 3 +-
drivers/media/rc/ir-hix5hd2.c | 3 +-
drivers/media/rc/ir-spi.c | 199 +++++++++++++++++++++
drivers/media/rc/ite-cir.c | 3 +-
drivers/media/rc/mceusb.c | 3 +-
drivers/media/rc/meson-ir.c | 3 +-
drivers/media/rc/nuvoton-cir.c | 3 +-
drivers/media/rc/rc-ir-raw.c | 17 +-
drivers/media/rc/rc-loopback.c | 3 +-
drivers/media/rc/rc-main.c | 186 +++++++++++--------
drivers/media/rc/redrat3.c | 3 +-
drivers/media/rc/serial_ir.c | 3 +-
drivers/media/rc/st_rc.c | 3 +-
drivers/media/rc/streamzap.c | 3 +-
drivers/media/rc/sunxi-cir.c | 3 +-
drivers/media/rc/ttusbir.c | 3 +-
drivers/media/rc/winbond-cir.c | 3 +-
drivers/media/usb/au0828/au0828-input.c | 3 +-
drivers/media/usb/cx231xx/cx231xx-input.c | 2 +-
drivers/media/usb/dvb-usb-v2/dvb_usb_core.c | 3 +-
drivers/media/usb/dvb-usb/dvb-usb-remote.c | 3 +-
drivers/media/usb/em28xx/em28xx-input.c | 2 +-
drivers/media/usb/tm6000/tm6000-input.c | 3 +-
include/media/rc-core.h | 15 +-
47 files changed, 409 insertions(+), 168 deletions(-)
create mode 100644 Documentation/devicetree/bindings/leds/irled/spi-ir-led.txt
create mode 100644 drivers/media/rc/ir-spi.c
--
2.10.2
^ permalink raw reply
* [PATCH v5 1/6] [media] rc-main: assign driver type during allocation
From: Andi Shyti @ 2016-12-16 6:12 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Sean Young, Rob Herring, Mark Rutland,
Richard Purdie, Jacek Anaszewski, Heiner Kallweit
Cc: linux-media-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-leds-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Andi Shyti, Andi Shyti
In-Reply-To: <20161216061218.5906-1-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
The driver type can be assigned immediately when an RC device
requests to the framework to allocate the device.
This is an 'enum rc_driver_type' data type and specifies whether
the device is a raw receiver or scancode receiver. The type will
be given as parameter to the rc_allocate_device device.
Change accordingly all the drivers calling rc_allocate_device()
so that the device type is specified during the rc device
allocation. Whenever the device type is not specified, it will be
set as RC_DRIVER_SCANCODE which was the default '0' value.
Suggested-by: Sean Young <sean-hENCXIMQXOg@public.gmane.org>
Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Reviewed-by: Sean Young <sean-hENCXIMQXOg@public.gmane.org>
---
drivers/hid/hid-picolcd_cir.c | 3 +--
drivers/media/cec/cec-core.c | 4 ++--
drivers/media/common/siano/smsir.c | 3 +--
drivers/media/i2c/ir-kbd-i2c.c | 2 +-
drivers/media/pci/bt8xx/bttv-input.c | 2 +-
drivers/media/pci/cx23885/cx23885-input.c | 11 +----------
drivers/media/pci/cx88/cx88-input.c | 3 +--
drivers/media/pci/dm1105/dm1105.c | 3 +--
drivers/media/pci/mantis/mantis_input.c | 2 +-
drivers/media/pci/saa7134/saa7134-input.c | 2 +-
drivers/media/pci/smipcie/smipcie-ir.c | 3 +--
drivers/media/pci/ttpci/budget-ci.c | 2 +-
drivers/media/rc/ati_remote.c | 3 +--
drivers/media/rc/ene_ir.c | 3 +--
drivers/media/rc/fintek-cir.c | 3 +--
drivers/media/rc/gpio-ir-recv.c | 3 +--
drivers/media/rc/igorplugusb.c | 3 +--
drivers/media/rc/iguanair.c | 3 +--
drivers/media/rc/img-ir/img-ir-hw.c | 2 +-
drivers/media/rc/img-ir/img-ir-raw.c | 3 +--
drivers/media/rc/imon.c | 3 +--
drivers/media/rc/ir-hix5hd2.c | 3 +--
drivers/media/rc/ite-cir.c | 3 +--
drivers/media/rc/mceusb.c | 3 +--
drivers/media/rc/meson-ir.c | 3 +--
drivers/media/rc/nuvoton-cir.c | 3 +--
drivers/media/rc/rc-loopback.c | 3 +--
drivers/media/rc/rc-main.c | 9 ++++++---
drivers/media/rc/redrat3.c | 3 +--
drivers/media/rc/serial_ir.c | 3 +--
drivers/media/rc/st_rc.c | 3 +--
drivers/media/rc/streamzap.c | 3 +--
drivers/media/rc/sunxi-cir.c | 3 +--
drivers/media/rc/ttusbir.c | 3 +--
drivers/media/rc/winbond-cir.c | 3 +--
drivers/media/usb/au0828/au0828-input.c | 3 +--
drivers/media/usb/cx231xx/cx231xx-input.c | 2 +-
drivers/media/usb/dvb-usb-v2/dvb_usb_core.c | 3 +--
drivers/media/usb/dvb-usb/dvb-usb-remote.c | 3 +--
drivers/media/usb/em28xx/em28xx-input.c | 2 +-
drivers/media/usb/tm6000/tm6000-input.c | 3 +--
include/media/rc-core.h | 6 ++++--
42 files changed, 51 insertions(+), 85 deletions(-)
diff --git a/drivers/hid/hid-picolcd_cir.c b/drivers/hid/hid-picolcd_cir.c
index 9628651..38b0ea8 100644
--- a/drivers/hid/hid-picolcd_cir.c
+++ b/drivers/hid/hid-picolcd_cir.c
@@ -108,12 +108,11 @@ int picolcd_init_cir(struct picolcd_data *data, struct hid_report *report)
struct rc_dev *rdev;
int ret = 0;
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rdev)
return -ENOMEM;
rdev->priv = data;
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
rdev->open = picolcd_cir_open;
rdev->close = picolcd_cir_close;
diff --git a/drivers/media/cec/cec-core.c b/drivers/media/cec/cec-core.c
index aca3ab8..2fee148 100644
--- a/drivers/media/cec/cec-core.c
+++ b/drivers/media/cec/cec-core.c
@@ -239,7 +239,7 @@ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
#if IS_REACHABLE(CONFIG_RC_CORE)
/* Prepare the RC input device */
- adap->rc = rc_allocate_device();
+ adap->rc = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!adap->rc) {
pr_err("cec-%s: failed to allocate memory for rc_dev\n",
name);
@@ -259,7 +259,7 @@ struct cec_adapter *cec_allocate_adapter(const struct cec_adap_ops *ops,
adap->rc->input_id.vendor = 0;
adap->rc->input_id.product = 0;
adap->rc->input_id.version = 1;
- adap->rc->driver_type = RC_DRIVER_SCANCODE;
+ adap->rc->dev.parent = parent;
adap->rc->driver_name = CEC_NAME;
adap->rc->allowed_protocols = RC_BIT_CEC;
adap->rc->priv = adap;
diff --git a/drivers/media/common/siano/smsir.c b/drivers/media/common/siano/smsir.c
index 41f2a39..ee30c7b 100644
--- a/drivers/media/common/siano/smsir.c
+++ b/drivers/media/common/siano/smsir.c
@@ -58,7 +58,7 @@ int sms_ir_init(struct smscore_device_t *coredev)
struct rc_dev *dev;
pr_debug("Allocating rc device\n");
- dev = rc_allocate_device();
+ dev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!dev)
return -ENOMEM;
@@ -86,7 +86,6 @@ int sms_ir_init(struct smscore_device_t *coredev)
#endif
dev->priv = coredev;
- dev->driver_type = RC_DRIVER_IR_RAW;
dev->allowed_protocols = RC_BIT_ALL;
dev->map_name = sms_get_board(board_id)->rc_codes;
dev->driver_name = MODULE_NAME;
diff --git a/drivers/media/i2c/ir-kbd-i2c.c b/drivers/media/i2c/ir-kbd-i2c.c
index cede397..5ad5167 100644
--- a/drivers/media/i2c/ir-kbd-i2c.c
+++ b/drivers/media/i2c/ir-kbd-i2c.c
@@ -428,7 +428,7 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
* If platform_data doesn't specify rc_dev, initialize it
* internally
*/
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!rc)
return -ENOMEM;
}
diff --git a/drivers/media/pci/bt8xx/bttv-input.c b/drivers/media/pci/bt8xx/bttv-input.c
index 4da720e..76daec7 100644
--- a/drivers/media/pci/bt8xx/bttv-input.c
+++ b/drivers/media/pci/bt8xx/bttv-input.c
@@ -424,7 +424,7 @@ int bttv_input_init(struct bttv *btv)
return -ENODEV;
ir = kzalloc(sizeof(*ir),GFP_KERNEL);
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!ir || !rc)
goto err_out_free;
diff --git a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c
index 1f092fe..c743317 100644
--- a/drivers/media/pci/cx23885/cx23885-input.c
+++ b/drivers/media/pci/cx23885/cx23885-input.c
@@ -267,7 +267,6 @@ int cx23885_input_init(struct cx23885_dev *dev)
struct cx23885_kernel_ir *kernel_ir;
struct rc_dev *rc;
char *rc_map;
- enum rc_driver_type driver_type;
u64 allowed_protos;
int ret;
@@ -285,28 +284,24 @@ int cx23885_input_init(struct cx23885_dev *dev)
case CX23885_BOARD_HAUPPAUGE_HVR1290:
case CX23885_BOARD_HAUPPAUGE_HVR1250:
/* Integrated CX2388[58] IR controller */
- driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_BIT_ALL;
/* The grey Hauppauge RC-5 remote */
rc_map = RC_MAP_HAUPPAUGE;
break;
case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
/* Integrated CX23885 IR controller */
- driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_BIT_ALL;
/* The grey Terratec remote with orange buttons */
rc_map = RC_MAP_NEC_TERRATEC_CINERGY_XS;
break;
case CX23885_BOARD_TEVII_S470:
/* Integrated CX23885 IR controller */
- driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_BIT_ALL;
/* A guess at the remote */
rc_map = RC_MAP_TEVII_NEC;
break;
case CX23885_BOARD_MYGICA_X8507:
/* Integrated CX23885 IR controller */
- driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_BIT_ALL;
/* A guess at the remote */
rc_map = RC_MAP_TOTAL_MEDIA_IN_HAND_02;
@@ -314,7 +309,6 @@ int cx23885_input_init(struct cx23885_dev *dev)
case CX23885_BOARD_TBS_6980:
case CX23885_BOARD_TBS_6981:
/* Integrated CX23885 IR controller */
- driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_BIT_ALL;
/* A guess at the remote */
rc_map = RC_MAP_TBS_NEC;
@@ -326,13 +320,11 @@ int cx23885_input_init(struct cx23885_dev *dev)
case CX23885_BOARD_DVBSKY_S952:
case CX23885_BOARD_DVBSKY_T982:
/* Integrated CX23885 IR controller */
- driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_BIT_ALL;
rc_map = RC_MAP_DVBSKY;
break;
case CX23885_BOARD_TT_CT2_4500_CI:
/* Integrated CX23885 IR controller */
- driver_type = RC_DRIVER_IR_RAW;
allowed_protos = RC_BIT_ALL;
rc_map = RC_MAP_TT_1500;
break;
@@ -352,7 +344,7 @@ int cx23885_input_init(struct cx23885_dev *dev)
pci_name(dev->pci));
/* input device */
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rc) {
ret = -ENOMEM;
goto err_out_free;
@@ -371,7 +363,6 @@ int cx23885_input_init(struct cx23885_dev *dev)
rc->input_id.product = dev->pci->device;
}
rc->dev.parent = &dev->pci->dev;
- rc->driver_type = driver_type;
rc->allowed_protocols = allowed_protos;
rc->priv = kernel_ir;
rc->open = cx23885_input_ir_open;
diff --git a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c
index dcfea35..6e9f366e 100644
--- a/drivers/media/pci/cx88/cx88-input.c
+++ b/drivers/media/pci/cx88/cx88-input.c
@@ -276,7 +276,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
*/
ir = kzalloc(sizeof(*ir), GFP_KERNEL);
- dev = rc_allocate_device();
+ dev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!ir || !dev)
goto err_out_free;
@@ -486,7 +486,6 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
dev->scancode_mask = hardware_mask;
if (ir->sampling) {
- dev->driver_type = RC_DRIVER_IR_RAW;
dev->timeout = 10 * 1000 * 1000; /* 10 ms */
} else {
dev->driver_type = RC_DRIVER_SCANCODE;
diff --git a/drivers/media/pci/dm1105/dm1105.c b/drivers/media/pci/dm1105/dm1105.c
index a589aa7..76e07c7 100644
--- a/drivers/media/pci/dm1105/dm1105.c
+++ b/drivers/media/pci/dm1105/dm1105.c
@@ -743,7 +743,7 @@ static int dm1105_ir_init(struct dm1105_dev *dm1105)
struct rc_dev *dev;
int err = -ENOMEM;
- dev = rc_allocate_device();
+ dev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!dev)
return -ENOMEM;
@@ -752,7 +752,6 @@ static int dm1105_ir_init(struct dm1105_dev *dm1105)
dev->driver_name = MODULE_NAME;
dev->map_name = RC_MAP_DM1105_NEC;
- dev->driver_type = RC_DRIVER_SCANCODE;
dev->input_name = "DVB on-card IR receiver";
dev->input_phys = dm1105->ir.input_phys;
dev->input_id.bustype = BUS_PCI;
diff --git a/drivers/media/pci/mantis/mantis_input.c b/drivers/media/pci/mantis/mantis_input.c
index 7f7f1d4..50d10cb 100644
--- a/drivers/media/pci/mantis/mantis_input.c
+++ b/drivers/media/pci/mantis/mantis_input.c
@@ -39,7 +39,7 @@ int mantis_input_init(struct mantis_pci *mantis)
struct rc_dev *dev;
int err;
- dev = rc_allocate_device();
+ dev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!dev) {
dprintk(MANTIS_ERROR, 1, "Remote device allocation failed");
err = -ENOMEM;
diff --git a/drivers/media/pci/saa7134/saa7134-input.c b/drivers/media/pci/saa7134/saa7134-input.c
index 823b75e..509caa86 100644
--- a/drivers/media/pci/saa7134/saa7134-input.c
+++ b/drivers/media/pci/saa7134/saa7134-input.c
@@ -846,7 +846,7 @@ int saa7134_input_init1(struct saa7134_dev *dev)
}
ir = kzalloc(sizeof(*ir), GFP_KERNEL);
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!ir || !rc) {
err = -ENOMEM;
goto err_out_free;
diff --git a/drivers/media/pci/smipcie/smipcie-ir.c b/drivers/media/pci/smipcie/smipcie-ir.c
index 826c7c7..d2730c3 100644
--- a/drivers/media/pci/smipcie/smipcie-ir.c
+++ b/drivers/media/pci/smipcie/smipcie-ir.c
@@ -183,7 +183,7 @@ int smi_ir_init(struct smi_dev *dev)
struct rc_dev *rc_dev;
struct smi_rc *ir = &dev->ir;
- rc_dev = rc_allocate_device();
+ rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!rc_dev)
return -ENOMEM;
@@ -202,7 +202,6 @@ int smi_ir_init(struct smi_dev *dev)
rc_dev->input_id.product = dev->pci_dev->subsystem_device;
rc_dev->dev.parent = &dev->pci_dev->dev;
- rc_dev->driver_type = RC_DRIVER_SCANCODE;
rc_dev->map_name = dev->info->rc_map;
ir->rc_dev = rc_dev;
diff --git a/drivers/media/pci/ttpci/budget-ci.c b/drivers/media/pci/ttpci/budget-ci.c
index 20ad93b..0c0b733 100644
--- a/drivers/media/pci/ttpci/budget-ci.c
+++ b/drivers/media/pci/ttpci/budget-ci.c
@@ -177,7 +177,7 @@ static int msp430_ir_init(struct budget_ci *budget_ci)
struct rc_dev *dev;
int error;
- dev = rc_allocate_device();
+ dev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!dev) {
printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
return -ENOMEM;
diff --git a/drivers/media/rc/ati_remote.c b/drivers/media/rc/ati_remote.c
index 0884b7d..7d0ee3d 100644
--- a/drivers/media/rc/ati_remote.c
+++ b/drivers/media/rc/ati_remote.c
@@ -764,7 +764,6 @@ static void ati_remote_rc_init(struct ati_remote *ati_remote)
struct rc_dev *rdev = ati_remote->rdev;
rdev->priv = ati_remote;
- rdev->driver_type = RC_DRIVER_SCANCODE;
rdev->allowed_protocols = RC_BIT_OTHER;
rdev->driver_name = "ati_remote";
@@ -851,7 +850,7 @@ static int ati_remote_probe(struct usb_interface *interface,
}
ati_remote = kzalloc(sizeof (struct ati_remote), GFP_KERNEL);
- rc_dev = rc_allocate_device();
+ rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!ati_remote || !rc_dev)
goto exit_free_dev_rdev;
diff --git a/drivers/media/rc/ene_ir.c b/drivers/media/rc/ene_ir.c
index bd5512e..3b7275f 100644
--- a/drivers/media/rc/ene_ir.c
+++ b/drivers/media/rc/ene_ir.c
@@ -1012,7 +1012,7 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
/* allocate memory */
dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL);
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!dev || !rdev)
goto exit_free_dev_rdev;
@@ -1058,7 +1058,6 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
if (!dev->hw_learning_and_tx_capable)
learning_mode_force = false;
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
rdev->priv = dev;
rdev->open = ene_open;
diff --git a/drivers/media/rc/fintek-cir.c b/drivers/media/rc/fintek-cir.c
index ecab69e..df125c2 100644
--- a/drivers/media/rc/fintek-cir.c
+++ b/drivers/media/rc/fintek-cir.c
@@ -492,7 +492,7 @@ static int fintek_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id
return ret;
/* input device for IR remote (and tx) */
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rdev)
goto exit_free_dev_rdev;
@@ -534,7 +534,6 @@ static int fintek_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id
/* Set up the rc device */
rdev->priv = fintek;
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
rdev->open = fintek_open;
rdev->close = fintek_close;
diff --git a/drivers/media/rc/gpio-ir-recv.c b/drivers/media/rc/gpio-ir-recv.c
index 5b63b1f..d5d2152 100644
--- a/drivers/media/rc/gpio-ir-recv.c
+++ b/drivers/media/rc/gpio-ir-recv.c
@@ -143,14 +143,13 @@ static int gpio_ir_recv_probe(struct platform_device *pdev)
if (!gpio_dev)
return -ENOMEM;
- rcdev = rc_allocate_device();
+ rcdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rcdev) {
rc = -ENOMEM;
goto err_allocate_device;
}
rcdev->priv = gpio_dev;
- rcdev->driver_type = RC_DRIVER_IR_RAW;
rcdev->input_name = GPIO_IR_DEVICE_NAME;
rcdev->input_phys = GPIO_IR_DEVICE_NAME "/input0";
rcdev->input_id.bustype = BUS_HOST;
diff --git a/drivers/media/rc/igorplugusb.c b/drivers/media/rc/igorplugusb.c
index 5cf983b..d770a62 100644
--- a/drivers/media/rc/igorplugusb.c
+++ b/drivers/media/rc/igorplugusb.c
@@ -190,7 +190,7 @@ static int igorplugusb_probe(struct usb_interface *intf,
usb_make_path(udev, ir->phys, sizeof(ir->phys));
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rc)
goto fail;
@@ -198,7 +198,6 @@ static int igorplugusb_probe(struct usb_interface *intf,
rc->input_phys = ir->phys;
usb_to_input_id(udev, &rc->input_id);
rc->dev.parent = &intf->dev;
- rc->driver_type = RC_DRIVER_IR_RAW;
/*
* This device can only store 36 pulses + spaces, which is not enough
* for the NEC protocol and many others.
diff --git a/drivers/media/rc/iguanair.c b/drivers/media/rc/iguanair.c
index 5f63454..4cd1e6b 100644
--- a/drivers/media/rc/iguanair.c
+++ b/drivers/media/rc/iguanair.c
@@ -431,7 +431,7 @@ static int iguanair_probe(struct usb_interface *intf,
struct usb_host_interface *idesc;
ir = kzalloc(sizeof(*ir), GFP_KERNEL);
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!ir || !rc) {
ret = -ENOMEM;
goto out;
@@ -494,7 +494,6 @@ static int iguanair_probe(struct usb_interface *intf,
rc->input_phys = ir->phys;
usb_to_input_id(ir->udev, &rc->input_id);
rc->dev.parent = &intf->dev;
- rc->driver_type = RC_DRIVER_IR_RAW;
rc->allowed_protocols = RC_BIT_ALL;
rc->priv = ir;
rc->open = iguanair_open;
diff --git a/drivers/media/rc/img-ir/img-ir-hw.c b/drivers/media/rc/img-ir/img-ir-hw.c
index 7bb71bc..c87ae03 100644
--- a/drivers/media/rc/img-ir/img-ir-hw.c
+++ b/drivers/media/rc/img-ir/img-ir-hw.c
@@ -1071,7 +1071,7 @@ int img_ir_probe_hw(struct img_ir_priv *priv)
}
/* Allocate hardware decoder */
- hw->rdev = rdev = rc_allocate_device();
+ hw->rdev = rdev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!rdev) {
dev_err(priv->dev, "cannot allocate input device\n");
error = -ENOMEM;
diff --git a/drivers/media/rc/img-ir/img-ir-raw.c b/drivers/media/rc/img-ir/img-ir-raw.c
index 33f37ed..8d2f8e2 100644
--- a/drivers/media/rc/img-ir/img-ir-raw.c
+++ b/drivers/media/rc/img-ir/img-ir-raw.c
@@ -110,7 +110,7 @@ int img_ir_probe_raw(struct img_ir_priv *priv)
setup_timer(&raw->timer, img_ir_echo_timer, (unsigned long)priv);
/* Allocate raw decoder */
- raw->rdev = rdev = rc_allocate_device();
+ raw->rdev = rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rdev) {
dev_err(priv->dev, "cannot allocate raw input device\n");
return -ENOMEM;
@@ -118,7 +118,6 @@ int img_ir_probe_raw(struct img_ir_priv *priv)
rdev->priv = priv;
rdev->map_name = RC_MAP_EMPTY;
rdev->input_name = "IMG Infrared Decoder Raw";
- rdev->driver_type = RC_DRIVER_IR_RAW;
/* Register raw decoder */
error = rc_register_device(rdev);
diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c
index 0785a24..4234ae6 100644
--- a/drivers/media/rc/imon.c
+++ b/drivers/media/rc/imon.c
@@ -1939,7 +1939,7 @@ static struct rc_dev *imon_init_rdev(struct imon_context *ictx)
const unsigned char fp_packet[] = { 0x40, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x88 };
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!rdev) {
dev_err(ictx->dev, "remote control dev allocation failed\n");
goto out;
@@ -1957,7 +1957,6 @@ static struct rc_dev *imon_init_rdev(struct imon_context *ictx)
rdev->dev.parent = ictx->dev;
rdev->priv = ictx;
- rdev->driver_type = RC_DRIVER_SCANCODE;
rdev->allowed_protocols = RC_BIT_OTHER | RC_BIT_RC6_MCE; /* iMON PAD or MCE */
rdev->change_protocol = imon_ir_change_protocol;
rdev->driver_name = MOD_NAME;
diff --git a/drivers/media/rc/ir-hix5hd2.c b/drivers/media/rc/ir-hix5hd2.c
index d26907e..dc3b959 100644
--- a/drivers/media/rc/ir-hix5hd2.c
+++ b/drivers/media/rc/ir-hix5hd2.c
@@ -229,7 +229,7 @@ static int hix5hd2_ir_probe(struct platform_device *pdev)
return priv->irq;
}
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rdev)
return -ENOMEM;
@@ -242,7 +242,6 @@ static int hix5hd2_ir_probe(struct platform_device *pdev)
clk_prepare_enable(priv->clock);
priv->rate = clk_get_rate(priv->clock);
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
rdev->priv = priv;
rdev->open = hix5hd2_ir_open;
diff --git a/drivers/media/rc/ite-cir.c b/drivers/media/rc/ite-cir.c
index 367b28b..92ed356 100644
--- a/drivers/media/rc/ite-cir.c
+++ b/drivers/media/rc/ite-cir.c
@@ -1470,7 +1470,7 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
return ret;
/* input device for IR remote (and tx) */
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rdev)
goto exit_free_dev_rdev;
itdev->rdev = rdev;
@@ -1561,7 +1561,6 @@ static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
/* set up ir-core props */
rdev->priv = itdev;
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
rdev->open = ite_open;
rdev->close = ite_close;
diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c
index 9bf6917..ebcc82d 100644
--- a/drivers/media/rc/mceusb.c
+++ b/drivers/media/rc/mceusb.c
@@ -1181,7 +1181,7 @@ static struct rc_dev *mceusb_init_rc_dev(struct mceusb_dev *ir)
struct rc_dev *rc;
int ret;
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rc) {
dev_err(dev, "remote dev allocation failed");
goto out;
@@ -1201,7 +1201,6 @@ static struct rc_dev *mceusb_init_rc_dev(struct mceusb_dev *ir)
usb_to_input_id(ir->usbdev, &rc->input_id);
rc->dev.parent = dev;
rc->priv = ir;
- rc->driver_type = RC_DRIVER_IR_RAW;
rc->allowed_protocols = RC_BIT_ALL;
rc->timeout = MS_TO_NS(100);
if (!ir->flags.no_tx) {
diff --git a/drivers/media/rc/meson-ir.c b/drivers/media/rc/meson-ir.c
index 7eb3f4f..8947dc6 100644
--- a/drivers/media/rc/meson-ir.c
+++ b/drivers/media/rc/meson-ir.c
@@ -131,7 +131,7 @@ static int meson_ir_probe(struct platform_device *pdev)
return ir->irq;
}
- ir->rc = rc_allocate_device();
+ ir->rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!ir->rc) {
dev_err(dev, "failed to allocate rc device\n");
return -ENOMEM;
@@ -144,7 +144,6 @@ static int meson_ir_probe(struct platform_device *pdev)
map_name = of_get_property(node, "linux,rc-map-name", NULL);
ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
ir->rc->dev.parent = dev;
- ir->rc->driver_type = RC_DRIVER_IR_RAW;
ir->rc->allowed_protocols = RC_BIT_ALL;
ir->rc->rx_resolution = US_TO_NS(MESON_TRATE);
ir->rc->timeout = MS_TO_NS(200);
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c
index 4b78c89..d4cc880 100644
--- a/drivers/media/rc/nuvoton-cir.c
+++ b/drivers/media/rc/nuvoton-cir.c
@@ -998,7 +998,7 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
return -ENOMEM;
/* input device for IR remote (and tx) */
- nvt->rdev = devm_rc_allocate_device(&pdev->dev);
+ nvt->rdev = devm_rc_allocate_device(&pdev->dev, RC_DRIVER_IR_RAW);
if (!nvt->rdev)
return -ENOMEM;
rdev = nvt->rdev;
@@ -1061,7 +1061,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
/* Set up the rc device */
rdev->priv = nvt;
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
rdev->open = nvt_open;
rdev->close = nvt_close;
diff --git a/drivers/media/rc/rc-loopback.c b/drivers/media/rc/rc-loopback.c
index 63dace8..36192ac 100644
--- a/drivers/media/rc/rc-loopback.c
+++ b/drivers/media/rc/rc-loopback.c
@@ -181,7 +181,7 @@ static int __init loop_init(void)
struct rc_dev *rc;
int ret;
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rc) {
printk(KERN_ERR DRIVER_NAME ": rc_dev allocation failed\n");
return -ENOMEM;
@@ -194,7 +194,6 @@ static int __init loop_init(void)
rc->driver_name = DRIVER_NAME;
rc->map_name = RC_MAP_EMPTY;
rc->priv = &loopdev;
- rc->driver_type = RC_DRIVER_IR_RAW;
rc->allowed_protocols = RC_BIT_ALL;
rc->timeout = 100 * 1000 * 1000; /* 100 ms */
rc->min_timeout = 1;
diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c
index dedaf38..a6bbceb 100644
--- a/drivers/media/rc/rc-main.c
+++ b/drivers/media/rc/rc-main.c
@@ -1357,7 +1357,7 @@ static struct device_type rc_dev_type = {
.uevent = rc_dev_uevent,
};
-struct rc_dev *rc_allocate_device(void)
+struct rc_dev *rc_allocate_device(enum rc_driver_type type)
{
struct rc_dev *dev;
@@ -1384,6 +1384,8 @@ struct rc_dev *rc_allocate_device(void)
dev->dev.class = &rc_class;
device_initialize(&dev->dev);
+ dev->driver_type = type;
+
__module_get(THIS_MODULE);
return dev;
}
@@ -1410,7 +1412,8 @@ static void devm_rc_alloc_release(struct device *dev, void *res)
rc_free_device(*(struct rc_dev **)res);
}
-struct rc_dev *devm_rc_allocate_device(struct device *dev)
+struct rc_dev *devm_rc_allocate_device(struct device *dev,
+ enum rc_driver_type type)
{
struct rc_dev **dr, *rc;
@@ -1418,7 +1421,7 @@ struct rc_dev *devm_rc_allocate_device(struct device *dev)
if (!dr)
return NULL;
- rc = rc_allocate_device();
+ rc = rc_allocate_device(type);
if (!rc) {
devres_free(dr);
return NULL;
diff --git a/drivers/media/rc/redrat3.c b/drivers/media/rc/redrat3.c
index 2784f5d..2b6f828 100644
--- a/drivers/media/rc/redrat3.c
+++ b/drivers/media/rc/redrat3.c
@@ -945,7 +945,7 @@ static struct rc_dev *redrat3_init_rc_dev(struct redrat3_dev *rr3)
int ret;
u16 prod = le16_to_cpu(rr3->udev->descriptor.idProduct);
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rc)
return NULL;
@@ -960,7 +960,6 @@ static struct rc_dev *redrat3_init_rc_dev(struct redrat3_dev *rr3)
usb_to_input_id(rr3->udev, &rc->input_id);
rc->dev.parent = dev;
rc->priv = rr3;
- rc->driver_type = RC_DRIVER_IR_RAW;
rc->allowed_protocols = RC_BIT_ALL;
rc->min_timeout = MS_TO_NS(RR3_RX_MIN_TIMEOUT);
rc->max_timeout = MS_TO_NS(RR3_RX_MAX_TIMEOUT);
diff --git a/drivers/media/rc/serial_ir.c b/drivers/media/rc/serial_ir.c
index 436bd58..640acc6 100644
--- a/drivers/media/rc/serial_ir.c
+++ b/drivers/media/rc/serial_ir.c
@@ -738,7 +738,7 @@ static int __init serial_ir_init_module(void)
if (result)
return result;
- rcdev = devm_rc_allocate_device(&serial_ir.pdev->dev);
+ rcdev = devm_rc_allocate_device(&serial_ir.pdev->dev, RC_DRIVER_IR_RAW);
if (!rcdev) {
result = -ENOMEM;
goto serial_cleanup;
@@ -777,7 +777,6 @@ static int __init serial_ir_init_module(void)
rcdev->open = serial_ir_open;
rcdev->close = serial_ir_close;
rcdev->dev.parent = &serial_ir.pdev->dev;
- rcdev->driver_type = RC_DRIVER_IR_RAW;
rcdev->allowed_protocols = RC_BIT_ALL;
rcdev->driver_name = KBUILD_MODNAME;
rcdev->map_name = RC_MAP_RC6_MCE;
diff --git a/drivers/media/rc/st_rc.c b/drivers/media/rc/st_rc.c
index 1fa0c9d..e6f6735 100644
--- a/drivers/media/rc/st_rc.c
+++ b/drivers/media/rc/st_rc.c
@@ -235,7 +235,7 @@ static int st_rc_probe(struct platform_device *pdev)
if (!rc_dev)
return -ENOMEM;
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rdev)
return -ENOMEM;
@@ -290,7 +290,6 @@ static int st_rc_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, rc_dev);
st_rc_hardware_init(rc_dev);
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
/* rx sampling rate is 10Mhz */
rdev->rx_resolution = 100;
diff --git a/drivers/media/rc/streamzap.c b/drivers/media/rc/streamzap.c
index 53f9b0a..f434e45 100644
--- a/drivers/media/rc/streamzap.c
+++ b/drivers/media/rc/streamzap.c
@@ -291,7 +291,7 @@ static struct rc_dev *streamzap_init_rc_dev(struct streamzap_ir *sz)
struct device *dev = sz->dev;
int ret;
- rdev = rc_allocate_device();
+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!rdev) {
dev_err(dev, "remote dev allocation failed\n");
goto out;
@@ -308,7 +308,6 @@ static struct rc_dev *streamzap_init_rc_dev(struct streamzap_ir *sz)
usb_to_input_id(sz->usbdev, &rdev->input_id);
rdev->dev.parent = dev;
rdev->priv = sz;
- rdev->driver_type = RC_DRIVER_IR_RAW;
rdev->allowed_protocols = RC_BIT_ALL;
rdev->driver_name = DRIVER_NAME;
rdev->map_name = RC_MAP_STREAMZAP;
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index eaadc08..5451f3d 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -212,7 +212,7 @@ static int sunxi_ir_probe(struct platform_device *pdev)
goto exit_clkdisable_clk;
}
- ir->rc = rc_allocate_device();
+ ir->rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!ir->rc) {
dev_err(dev, "failed to allocate device\n");
ret = -ENOMEM;
@@ -229,7 +229,6 @@ static int sunxi_ir_probe(struct platform_device *pdev)
ir->map_name = of_get_property(dn, "linux,rc-map-name", NULL);
ir->rc->map_name = ir->map_name ?: RC_MAP_EMPTY;
ir->rc->dev.parent = dev;
- ir->rc->driver_type = RC_DRIVER_IR_RAW;
ir->rc->allowed_protocols = RC_BIT_ALL;
ir->rc->rx_resolution = SUNXI_IR_SAMPLE;
ir->rc->timeout = MS_TO_NS(SUNXI_IR_TIMEOUT);
diff --git a/drivers/media/rc/ttusbir.c b/drivers/media/rc/ttusbir.c
index bc214e2..6ff2cef 100644
--- a/drivers/media/rc/ttusbir.c
+++ b/drivers/media/rc/ttusbir.c
@@ -205,7 +205,7 @@ static int ttusbir_probe(struct usb_interface *intf,
int altsetting = -1;
tt = kzalloc(sizeof(*tt), GFP_KERNEL);
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!tt || !rc) {
ret = -ENOMEM;
goto out;
@@ -317,7 +317,6 @@ static int ttusbir_probe(struct usb_interface *intf,
rc->input_phys = tt->phys;
usb_to_input_id(tt->udev, &rc->input_id);
rc->dev.parent = &intf->dev;
- rc->driver_type = RC_DRIVER_IR_RAW;
rc->allowed_protocols = RC_BIT_ALL;
rc->priv = tt;
rc->driver_name = DRIVER_NAME;
diff --git a/drivers/media/rc/winbond-cir.c b/drivers/media/rc/winbond-cir.c
index 78491ed..bc95d22 100644
--- a/drivers/media/rc/winbond-cir.c
+++ b/drivers/media/rc/winbond-cir.c
@@ -1059,13 +1059,12 @@ wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id)
if (err)
goto exit_free_data;
- data->dev = rc_allocate_device();
+ data->dev = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!data->dev) {
err = -ENOMEM;
goto exit_unregister_led;
}
- data->dev->driver_type = RC_DRIVER_IR_RAW;
data->dev->driver_name = DRVNAME;
data->dev->input_name = WBCIR_NAME;
data->dev->input_phys = "wbcir/cir0";
diff --git a/drivers/media/usb/au0828/au0828-input.c b/drivers/media/usb/au0828/au0828-input.c
index 1e66e78..9ec919c 100644
--- a/drivers/media/usb/au0828/au0828-input.c
+++ b/drivers/media/usb/au0828/au0828-input.c
@@ -298,7 +298,7 @@ int au0828_rc_register(struct au0828_dev *dev)
return -ENODEV;
ir = kzalloc(sizeof(*ir), GFP_KERNEL);
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_IR_RAW);
if (!ir || !rc)
goto error;
@@ -343,7 +343,6 @@ int au0828_rc_register(struct au0828_dev *dev)
rc->input_id.product = le16_to_cpu(dev->usbdev->descriptor.idProduct);
rc->dev.parent = &dev->usbdev->dev;
rc->driver_name = "au0828-input";
- rc->driver_type = RC_DRIVER_IR_RAW;
rc->allowed_protocols = RC_BIT_NEC | RC_BIT_NECX | RC_BIT_NEC32 |
RC_BIT_RC5;
diff --git a/drivers/media/usb/cx231xx/cx231xx-input.c b/drivers/media/usb/cx231xx/cx231xx-input.c
index 15d8d1b..6e80f3c 100644
--- a/drivers/media/usb/cx231xx/cx231xx-input.c
+++ b/drivers/media/usb/cx231xx/cx231xx-input.c
@@ -72,7 +72,7 @@ int cx231xx_ir_init(struct cx231xx *dev)
memset(&info, 0, sizeof(struct i2c_board_info));
memset(&dev->init_data, 0, sizeof(dev->init_data));
- dev->init_data.rc_dev = rc_allocate_device();
+ dev->init_data.rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!dev->init_data.rc_dev)
return -ENOMEM;
diff --git a/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c b/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c
index a8e6624..298c91a 100644
--- a/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c
+++ b/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c
@@ -147,7 +147,7 @@ static int dvb_usbv2_remote_init(struct dvb_usb_device *d)
if (!d->rc.map_name)
return 0;
- dev = rc_allocate_device();
+ dev = rc_allocate_device(d->rc.driver_type);
if (!dev) {
ret = -ENOMEM;
goto err;
@@ -162,7 +162,6 @@ static int dvb_usbv2_remote_init(struct dvb_usb_device *d)
/* TODO: likely RC-core should took const char * */
dev->driver_name = (char *) d->props->driver_name;
dev->map_name = d->rc.map_name;
- dev->driver_type = d->rc.driver_type;
dev->allowed_protocols = d->rc.allowed_protos;
dev->change_protocol = d->rc.change_protocol;
dev->priv = d;
diff --git a/drivers/media/usb/dvb-usb/dvb-usb-remote.c b/drivers/media/usb/dvb-usb/dvb-usb-remote.c
index c259f9e..059ded5 100644
--- a/drivers/media/usb/dvb-usb/dvb-usb-remote.c
+++ b/drivers/media/usb/dvb-usb/dvb-usb-remote.c
@@ -265,7 +265,7 @@ static int rc_core_dvb_usb_remote_init(struct dvb_usb_device *d)
int err, rc_interval;
struct rc_dev *dev;
- dev = rc_allocate_device();
+ dev = rc_allocate_device(d->props.rc.core.driver_type);
if (!dev)
return -ENOMEM;
@@ -273,7 +273,6 @@ static int rc_core_dvb_usb_remote_init(struct dvb_usb_device *d)
dev->map_name = d->props.rc.core.rc_codes;
dev->change_protocol = d->props.rc.core.change_protocol;
dev->allowed_protocols = d->props.rc.core.allowed_protos;
- dev->driver_type = d->props.rc.core.driver_type;
usb_to_input_id(d->udev, &dev->input_id);
dev->input_name = "IR-receiver inside an USB DVB receiver";
dev->input_phys = d->rc_phys;
diff --git a/drivers/media/usb/em28xx/em28xx-input.c b/drivers/media/usb/em28xx/em28xx-input.c
index 782ce09..aa24bba 100644
--- a/drivers/media/usb/em28xx/em28xx-input.c
+++ b/drivers/media/usb/em28xx/em28xx-input.c
@@ -719,7 +719,7 @@ static int em28xx_ir_init(struct em28xx *dev)
ir = kzalloc(sizeof(*ir), GFP_KERNEL);
if (!ir)
return -ENOMEM;
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!rc)
goto error;
diff --git a/drivers/media/usb/tm6000/tm6000-input.c b/drivers/media/usb/tm6000/tm6000-input.c
index 26b2ebb..377a69b 100644
--- a/drivers/media/usb/tm6000/tm6000-input.c
+++ b/drivers/media/usb/tm6000/tm6000-input.c
@@ -429,7 +429,7 @@ int tm6000_ir_init(struct tm6000_core *dev)
return 0;
ir = kzalloc(sizeof(*ir), GFP_ATOMIC);
- rc = rc_allocate_device();
+ rc = rc_allocate_device(RC_DRIVER_SCANCODE);
if (!ir || !rc)
goto out;
@@ -456,7 +456,6 @@ int tm6000_ir_init(struct tm6000_core *dev)
ir->polling = 50;
INIT_DELAYED_WORK(&ir->work, tm6000_ir_handle_key);
}
- rc->driver_type = RC_DRIVER_SCANCODE;
snprintf(ir->name, sizeof(ir->name), "tm5600/60x0 IR (%s)",
dev->name);
diff --git a/include/media/rc-core.h b/include/media/rc-core.h
index 55281b9..ba92c86 100644
--- a/include/media/rc-core.h
+++ b/include/media/rc-core.h
@@ -200,17 +200,19 @@ struct rc_dev {
/**
* rc_allocate_device - Allocates a RC device
*
+ * @rc_driver_type: specifies the type of the RC output to be allocated
* returns a pointer to struct rc_dev.
*/
-struct rc_dev *rc_allocate_device(void);
+struct rc_dev *rc_allocate_device(enum rc_driver_type);
/**
* devm_rc_allocate_device - Managed RC device allocation
*
* @dev: pointer to struct device
+ * @rc_driver_type: specifies the type of the RC output to be allocated
* returns a pointer to struct rc_dev.
*/
-struct rc_dev *devm_rc_allocate_device(struct device *dev);
+struct rc_dev *devm_rc_allocate_device(struct device *dev, enum rc_driver_type);
/**
* rc_free_device - Frees a RC device
--
2.10.2
--
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^ permalink raw reply related
* [PATCH v5 2/6] [media] rc-main: split setup and unregister functions
From: Andi Shyti @ 2016-12-16 6:12 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Sean Young, Rob Herring, Mark Rutland,
Richard Purdie, Jacek Anaszewski, Heiner Kallweit
Cc: linux-media-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-leds-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Andi Shyti, Andi Shyti
In-Reply-To: <20161216061218.5906-1-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Move the input device allocation, map and protocol handling to
different functions.
Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Reviewed-by: Sean Young <sean-hENCXIMQXOg@public.gmane.org>
---
drivers/media/rc/rc-main.c | 143 +++++++++++++++++++++++++--------------------
1 file changed, 81 insertions(+), 62 deletions(-)
diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c
index a6bbceb..7cc700d 100644
--- a/drivers/media/rc/rc-main.c
+++ b/drivers/media/rc/rc-main.c
@@ -1436,16 +1436,12 @@ struct rc_dev *devm_rc_allocate_device(struct device *dev,
}
EXPORT_SYMBOL_GPL(devm_rc_allocate_device);
-int rc_register_device(struct rc_dev *dev)
+static int rc_setup_rx_device(struct rc_dev *dev)
{
- static bool raw_init = false; /* raw decoders loaded? */
- struct rc_map *rc_map;
- const char *path;
- int attr = 0;
- int minor;
int rc;
+ struct rc_map *rc_map;
- if (!dev || !dev->map_name)
+ if (!dev->map_name)
return -EINVAL;
rc_map = rc_map_get(dev->map_name);
@@ -1454,6 +1450,19 @@ int rc_register_device(struct rc_dev *dev)
if (!rc_map || !rc_map->scan || rc_map->size == 0)
return -EINVAL;
+ rc = ir_setkeytable(dev, rc_map);
+ if (rc)
+ return rc;
+
+ if (dev->change_protocol) {
+ u64 rc_type = (1ll << rc_map->rc_type);
+
+ rc = dev->change_protocol(dev, &rc_type);
+ if (rc < 0)
+ goto out_table;
+ dev->enabled_protocols = rc_type;
+ }
+
set_bit(EV_KEY, dev->input_dev->evbit);
set_bit(EV_REP, dev->input_dev->evbit);
set_bit(EV_MSC, dev->input_dev->evbit);
@@ -1463,6 +1472,61 @@ int rc_register_device(struct rc_dev *dev)
if (dev->close)
dev->input_dev->close = ir_close;
+ /*
+ * Default delay of 250ms is too short for some protocols, especially
+ * since the timeout is currently set to 250ms. Increase it to 500ms,
+ * to avoid wrong repetition of the keycodes. Note that this must be
+ * set after the call to input_register_device().
+ */
+ dev->input_dev->rep[REP_DELAY] = 500;
+
+ /*
+ * As a repeat event on protocols like RC-5 and NEC take as long as
+ * 110/114ms, using 33ms as a repeat period is not the right thing
+ * to do.
+ */
+ dev->input_dev->rep[REP_PERIOD] = 125;
+
+ dev->input_dev->dev.parent = &dev->dev;
+ memcpy(&dev->input_dev->id, &dev->input_id, sizeof(dev->input_id));
+ dev->input_dev->phys = dev->input_phys;
+ dev->input_dev->name = dev->input_name;
+
+ /* rc_open will be called here */
+ rc = input_register_device(dev->input_dev);
+ if (rc)
+ goto out_table;
+
+ return 0;
+
+out_table:
+ ir_free_table(&dev->rc_map);
+
+ return rc;
+}
+
+static void rc_free_rx_device(struct rc_dev *dev)
+{
+ if (!dev)
+ return;
+
+ ir_free_table(&dev->rc_map);
+
+ input_unregister_device(dev->input_dev);
+ dev->input_dev = NULL;
+}
+
+int rc_register_device(struct rc_dev *dev)
+{
+ static bool raw_init = false; /* raw decoders loaded? */
+ const char *path;
+ int attr = 0;
+ int minor;
+ int rc;
+
+ if (!dev)
+ return -EINVAL;
+
minor = ida_simple_get(&rc_ida, 0, RC_DEV_MAX, GFP_KERNEL);
if (minor < 0)
return minor;
@@ -1486,39 +1550,15 @@ int rc_register_device(struct rc_dev *dev)
if (rc)
goto out_unlock;
- rc = ir_setkeytable(dev, rc_map);
- if (rc)
- goto out_dev;
-
- dev->input_dev->dev.parent = &dev->dev;
- memcpy(&dev->input_dev->id, &dev->input_id, sizeof(dev->input_id));
- dev->input_dev->phys = dev->input_phys;
- dev->input_dev->name = dev->input_name;
-
- rc = input_register_device(dev->input_dev);
- if (rc)
- goto out_table;
-
- /*
- * Default delay of 250ms is too short for some protocols, especially
- * since the timeout is currently set to 250ms. Increase it to 500ms,
- * to avoid wrong repetition of the keycodes. Note that this must be
- * set after the call to input_register_device().
- */
- dev->input_dev->rep[REP_DELAY] = 500;
-
- /*
- * As a repeat event on protocols like RC-5 and NEC take as long as
- * 110/114ms, using 33ms as a repeat period is not the right thing
- * to do.
- */
- dev->input_dev->rep[REP_PERIOD] = 125;
-
path = kobject_get_path(&dev->dev.kobj, GFP_KERNEL);
dev_info(&dev->dev, "%s as %s\n",
dev->input_name ?: "Unspecified device", path ?: "N/A");
kfree(path);
+ rc = rc_setup_rx_device(dev);
+ if (rc)
+ goto out_dev;
+
if (dev->driver_type == RC_DRIVER_IR_RAW) {
if (!raw_init) {
request_module_nowait("ir-lirc-codec");
@@ -1526,36 +1566,20 @@ int rc_register_device(struct rc_dev *dev)
}
rc = ir_raw_event_register(dev);
if (rc < 0)
- goto out_input;
- }
-
- if (dev->change_protocol) {
- u64 rc_type = (1ll << rc_map->rc_type);
- rc = dev->change_protocol(dev, &rc_type);
- if (rc < 0)
- goto out_raw;
- dev->enabled_protocols = rc_type;
+ goto out_rx;
}
/* Allow the RC sysfs nodes to be accessible */
atomic_set(&dev->initialized, 1);
- IR_dprintk(1, "Registered rc%u (driver: %s, remote: %s, mode %s)\n",
+ IR_dprintk(1, "Registered rc%u (driver: %s)\n",
dev->minor,
- dev->driver_name ? dev->driver_name : "unknown",
- rc_map->name ? rc_map->name : "unknown",
- dev->driver_type == RC_DRIVER_IR_RAW ? "raw" : "cooked");
+ dev->driver_name ? dev->driver_name : "unknown");
return 0;
-out_raw:
- if (dev->driver_type == RC_DRIVER_IR_RAW)
- ir_raw_event_unregister(dev);
-out_input:
- input_unregister_device(dev->input_dev);
- dev->input_dev = NULL;
-out_table:
- ir_free_table(&dev->rc_map);
+out_rx:
+ rc_free_rx_device(dev);
out_dev:
device_del(&dev->dev);
out_unlock:
@@ -1601,12 +1625,7 @@ void rc_unregister_device(struct rc_dev *dev)
if (dev->driver_type == RC_DRIVER_IR_RAW)
ir_raw_event_unregister(dev);
- /* Freeing the table should also call the stop callback */
- ir_free_table(&dev->rc_map);
- IR_dprintk(1, "Freed keycode table\n");
-
- input_unregister_device(dev->input_dev);
- dev->input_dev = NULL;
+ rc_free_rx_device(dev);
device_del(&dev->dev);
--
2.10.2
--
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^ permalink raw reply related
* [PATCH v5 3/6] [media] rc-core: add support for IR raw transmitters
From: Andi Shyti @ 2016-12-16 6:12 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Sean Young, Rob Herring, Mark Rutland,
Richard Purdie, Jacek Anaszewski, Heiner Kallweit
Cc: linux-media-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-leds-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Andi Shyti, Andi Shyti
In-Reply-To: <20161216061218.5906-1-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
IR raw transmitter driver type is specified in the enum
rc_driver_type as RC_DRIVER_IR_RAW_TX which includes all those
devices that transmit raw stream of bit to a receiver.
The data are provided by userspace applications, therefore they
don't need any input device allocation, but still they need to be
registered as raw devices.
Suggested-by: Sean Young <sean-hENCXIMQXOg@public.gmane.org>
Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Reviewed-by: Sean Young <sean-hENCXIMQXOg@public.gmane.org>
---
drivers/media/rc/rc-main.c | 42 +++++++++++++++++++++++++-----------------
include/media/rc-core.h | 9 ++++++---
2 files changed, 31 insertions(+), 20 deletions(-)
diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c
index 7cc700d..19cf15c 100644
--- a/drivers/media/rc/rc-main.c
+++ b/drivers/media/rc/rc-main.c
@@ -1365,20 +1365,24 @@ struct rc_dev *rc_allocate_device(enum rc_driver_type type)
if (!dev)
return NULL;
- dev->input_dev = input_allocate_device();
- if (!dev->input_dev) {
- kfree(dev);
- return NULL;
- }
+ if (type != RC_DRIVER_IR_RAW_TX) {
+ dev->input_dev = input_allocate_device();
+ if (!dev->input_dev) {
+ kfree(dev);
+ return NULL;
+ }
+
+ dev->input_dev->getkeycode = ir_getkeycode;
+ dev->input_dev->setkeycode = ir_setkeycode;
+ input_set_drvdata(dev->input_dev, dev);
- dev->input_dev->getkeycode = ir_getkeycode;
- dev->input_dev->setkeycode = ir_setkeycode;
- input_set_drvdata(dev->input_dev, dev);
+ setup_timer(&dev->timer_keyup, ir_timer_keyup,
+ (unsigned long)dev);
- spin_lock_init(&dev->rc_map.lock);
- spin_lock_init(&dev->keylock);
+ spin_lock_init(&dev->rc_map.lock);
+ spin_lock_init(&dev->keylock);
+ }
mutex_init(&dev->lock);
- setup_timer(&dev->timer_keyup, ir_timer_keyup, (unsigned long)dev);
dev->dev.type = &rc_dev_type;
dev->dev.class = &rc_class;
@@ -1507,7 +1511,7 @@ static int rc_setup_rx_device(struct rc_dev *dev)
static void rc_free_rx_device(struct rc_dev *dev)
{
- if (!dev)
+ if (!dev || dev->driver_type == RC_DRIVER_IR_RAW_TX)
return;
ir_free_table(&dev->rc_map);
@@ -1537,7 +1541,8 @@ int rc_register_device(struct rc_dev *dev)
atomic_set(&dev->initialized, 0);
dev->dev.groups = dev->sysfs_groups;
- dev->sysfs_groups[attr++] = &rc_dev_protocol_attr_grp;
+ if (dev->driver_type != RC_DRIVER_IR_RAW_TX)
+ dev->sysfs_groups[attr++] = &rc_dev_protocol_attr_grp;
if (dev->s_filter)
dev->sysfs_groups[attr++] = &rc_dev_filter_attr_grp;
if (dev->s_wakeup_filter)
@@ -1555,11 +1560,14 @@ int rc_register_device(struct rc_dev *dev)
dev->input_name ?: "Unspecified device", path ?: "N/A");
kfree(path);
- rc = rc_setup_rx_device(dev);
- if (rc)
- goto out_dev;
+ if (dev->driver_type != RC_DRIVER_IR_RAW_TX) {
+ rc = rc_setup_rx_device(dev);
+ if (rc)
+ goto out_dev;
+ }
- if (dev->driver_type == RC_DRIVER_IR_RAW) {
+ if (dev->driver_type == RC_DRIVER_IR_RAW ||
+ dev->driver_type == RC_DRIVER_IR_RAW_TX) {
if (!raw_init) {
request_module_nowait("ir-lirc-codec");
raw_init = true;
diff --git a/include/media/rc-core.h b/include/media/rc-core.h
index ba92c86..98d28d5 100644
--- a/include/media/rc-core.h
+++ b/include/media/rc-core.h
@@ -32,13 +32,16 @@ do { \
/**
* enum rc_driver_type - type of the RC output
*
- * @RC_DRIVER_SCANCODE: Driver or hardware generates a scancode
- * @RC_DRIVER_IR_RAW: Driver or hardware generates pulse/space sequences.
- * It needs a Infra-Red pulse/space decoder
+ * @RC_DRIVER_SCANCODE: Driver or hardware generates a scancode
+ * @RC_DRIVER_IR_RAW: Driver or hardware generates pulse/space sequences.
+ * It needs a Infra-Red pulse/space decoder
+ * @RC_DRIVER_IR_RAW_TX: Device transmitter only,
+ driver requires pulse/space data sequence.
*/
enum rc_driver_type {
RC_DRIVER_SCANCODE = 0,
RC_DRIVER_IR_RAW,
+ RC_DRIVER_IR_RAW_TX,
};
/**
--
2.10.2
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^ permalink raw reply related
* [PATCH v5 4/6] [media] rc-ir-raw: do not generate any receiving thread for raw transmitters
From: Andi Shyti @ 2016-12-16 6:12 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Sean Young, Rob Herring, Mark Rutland,
Richard Purdie, Jacek Anaszewski, Heiner Kallweit
Cc: linux-media, devicetree, linux-leds, linux-kernel, Andi Shyti,
Andi Shyti
In-Reply-To: <20161216061218.5906-1-andi.shyti@samsung.com>
Raw IR transmitters do not need any thread listening for
occurring events. Check the driver type before running the
thread.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Sean Young <sean@mess.org>
---
drivers/media/rc/rc-ir-raw.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/media/rc/rc-ir-raw.c b/drivers/media/rc/rc-ir-raw.c
index 1c42a9f..9938e42 100644
--- a/drivers/media/rc/rc-ir-raw.c
+++ b/drivers/media/rc/rc-ir-raw.c
@@ -270,12 +270,19 @@ int ir_raw_event_register(struct rc_dev *dev)
INIT_KFIFO(dev->raw->kfifo);
spin_lock_init(&dev->raw->lock);
- dev->raw->thread = kthread_run(ir_raw_event_thread, dev->raw,
- "rc%u", dev->minor);
- if (IS_ERR(dev->raw->thread)) {
- rc = PTR_ERR(dev->raw->thread);
- goto out;
+ /*
+ * raw transmitters do not need any event registration
+ * because the event is coming from userspace
+ */
+ if (dev->driver_type != RC_DRIVER_IR_RAW_TX) {
+ dev->raw->thread = kthread_run(ir_raw_event_thread, dev->raw,
+ "rc%u", dev->minor);
+
+ if (IS_ERR(dev->raw->thread)) {
+ rc = PTR_ERR(dev->raw->thread);
+ goto out;
+ }
}
mutex_lock(&ir_raw_handler_lock);
--
2.10.2
^ permalink raw reply related
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