* Re: [PATCH v2 1/3] ARM: dts: imx6dl: Add Engicam i.CoreM6 DualLite/Solo RQS initial support
From: Shawn Guo @ 2017-01-03 6:55 UTC (permalink / raw)
To: Jagan Teki
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Matteo Lisi,
Michael Trimarchi, Jagan Teki
In-Reply-To: <1483364420-10012-1-git-send-email-jagan-oRp2ZoJdM/RWk0Htik3J/w@public.gmane.org>
On Mon, Jan 02, 2017 at 02:40:18PM +0100, Jagan Teki wrote:
> From: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
>
> i.CoreM6 DualLite/Solo modules are system on module solutions manufactured
> by Engicam with following characteristics:
> CPU NXP i.MX6 DL, 800MHz
> RAM 1GB, 32, 64 bit, DDR3-800/1066
> NAND SLC,512MB
> Power supply Single 5V
> MAX LCD RES FULLHD
>
> and more info at
> http://www.engicam.com/en/products/embedded/som/standard/i-core-rqs-m6s-dl-d-q
>
> Cc: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Cc: Matteo Lisi <matteo.lisi-4s7YQHO/iPVBDgjK7y7TUQ@public.gmane.org>
> Cc: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
Applied all, thanks.
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* Re: [PATCH V3 2/2] cfg80211: support ieee80211-freq-limit DT property
From: Johannes Berg @ 2017-01-03 7:00 UTC (permalink / raw)
To: Arend van Spriel, Rafał Miłecki,
linux-wireless-u79uwXL29TY76Z2rM5mHXA
Cc: Martin Blumenstingl, Felix Fietkau, Arend van Spriel,
Arnd Bergmann, devicetree-u79uwXL29TY76Z2rM5mHXA,
Rafał Miłecki
In-Reply-To: <e194b980-1048-8da6-624b-26f824ff655d-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
> I suppose this then can also be done early in the wiphy_register()
> function itself, right?
No, because of the shared channel data issue. If this is
unconditionally in wiphy_register() then we can no longer guarantee
that sharing it is acceptable - which it is today under certain
circumstances the driver controls. This would move it out of driver
control, making it never possible to share any more.
> So does it mean the function can go in core.c again :-p If it is
> likely there will be other properties being added it might justify
> adding a new source file, eg. of.c, and only compile it when
> CONFIG_OF is set. Just a thought.
Yeah, whatever :)
We can figure that out once we have the mechanisms in place.
johannes
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* Re: [PATCH V2] arm64:dts:ls1046a: Add TMU device tree support
From: Shawn Guo @ 2017-01-03 7:06 UTC (permalink / raw)
To: Jia Hongtao
Cc: rui.zhang-ral2JQCrhuEAvxtiuMwx3w,
edubezval-Re5JQEeQqe8AvxtiuMwx3w, yuantian.tang-3arQi8VN3Tc,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, scott.wood-3arQi8VN3Tc,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1483425739-15404-1-git-send-email-hongtao.jia-3arQi8VN3Tc@public.gmane.org>
On Tue, Jan 03, 2017 at 02:42:19PM +0800, Jia Hongtao wrote:
> Also add nodes and properties for thermal management support.
>
> Signed-off-by: Jia Hongtao <hongtao.jia-3arQi8VN3Tc@public.gmane.org>
The subject prefix is still not so right. There should be a space after
each colon.
> ---
> Changes for V2:
> * Update the subject title according to Shawn Guo's comment.
> * Add comments for calibration data groups.
> * Update "thermal-zones" property in a unified style with platform dts.
>
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 83 ++++++++++++++++++++++++++
> 1 file changed, 83 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 38806ca..df53a4a 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -45,6 +45,7 @@
> */
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> compatible = "fsl,ls1046a";
> @@ -67,6 +68,7 @@
> clocks = <&clockgen 1 0>;
> next-level-cache = <&l2>;
> cpu-idle-states = <&CPU_PH20>;
> + #cooling-cells = <2>;
> };
>
> cpu1: cpu@1 {
> @@ -279,6 +281,87 @@
> clocks = <&sysclk>;
> };
>
> + tmu: tmu@1f00000 {
> + compatible = "fsl,qoriq-tmu";
> + reg = <0x0 0x1f00000 0x0 0x10000>;
> + interrupts = <0 33 0x4>;
> + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
> + fsl,tmu-calibration =
> + /* Calibration data group 1*/
> + <0x00000000 0x00000026
> + 0x00000001 0x0000002d
> + 0x00000002 0x00000032
> + 0x00000003 0x00000039
> + 0x00000004 0x0000003f
> + 0x00000005 0x00000046
> + 0x00000006 0x0000004d
> + 0x00000007 0x00000054
> + 0x00000008 0x0000005a
> + 0x00000009 0x00000061
> + 0x0000000a 0x0000006a
> + 0x0000000b 0x00000071
> +
> + /* Calibration data group 2*/
The single line comment format is /* blabla */. There are space at both
beginning and end of the text.
Also I am asking that we use the single line comment to replace the
blank line, which is still there.
> + 0x00010000 0x00000025
> + 0x00010001 0x0000002c
> + 0x00010002 0x00000035
> + 0x00010003 0x0000003d
> + 0x00010004 0x00000045
> + 0x00010005 0x0000004e
> + 0x00010006 0x00000057
> + 0x00010007 0x00000061
> + 0x00010008 0x0000006b
> + 0x00010009 0x00000076
> +
> + /* Calibration data group 3*/
> + 0x00020000 0x00000029
> + 0x00020001 0x00000033
> + 0x00020002 0x0000003d
> + 0x00020003 0x00000049
> + 0x00020004 0x00000056
> + 0x00020005 0x00000061
> + 0x00020006 0x0000006d
> +
> + /* Calibration data group 4*/
> + 0x00030000 0x00000021
> + 0x00030001 0x0000002a
> + 0x00030002 0x0000003c
> + 0x00030003 0x0000004e>;
Here is the format on my mind:
fsl,tmu-calibration = <
/* Calibration data group 1 */
0x00000000 0x00000026
0x00000001 0x0000002d
0x00000002 0x00000032
0x00000003 0x00000039
0x00000004 0x0000003f
0x00000005 0x00000046
0x00000006 0x0000004d
0x00000007 0x00000054
0x00000008 0x0000005a
0x00000009 0x00000061
0x0000000a 0x0000006a
0x0000000b 0x00000071
/* Calibration data group 2 */
0x00010000 0x00000025
0x00010001 0x0000002c
0x00010002 0x00000035
0x00010003 0x0000003d
0x00010004 0x00000045
0x00010005 0x0000004e
0x00010006 0x00000057
0x00010007 0x00000061
0x00010008 0x0000006b
0x00010009 0x00000076
/* Calibration data group 3 */
0x00020000 0x00000029
0x00020001 0x00000033
0x00020002 0x0000003d
0x00020003 0x00000049
0x00020004 0x00000056
0x00020005 0x00000061
0x00020006 0x0000006d
/* Calibration data group 4 */
0x00030000 0x00000021
0x00030001 0x0000002a
0x00030002 0x0000003c
0x00030003 0x0000004e
>;
Shawn
> + big-endian;
> + #thermal-sensor-cells = <1>;
> + };
> +
> + thermal-zones {
> + cpu_thermal: cpu-thermal {
> + polling-delay-passive = <1000>;
> + polling-delay = <5000>;
> + thermal-sensors = <&tmu 3>;
> +
> + trips {
> + cpu_alert: cpu-alert {
> + temperature = <85000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> +
> + cpu_crit: cpu-crit {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu_alert>;
> + cooling-device =
> + <&cpu0 THERMAL_NO_LIMIT
> + THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> + };
> +
> dspi: dspi@2100000 {
> compatible = "fsl,ls1021a-v1.0-dspi";
> #address-cells = <1>;
> --
> 2.1.0.27.g96db324
>
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^ permalink raw reply
* Re: [PATCH V3 2/2] cfg80211: support ieee80211-freq-limit DT property
From: Johannes Berg @ 2017-01-03 7:06 UTC (permalink / raw)
To: Rafał Miłecki
Cc: linux-wireless-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Martin Blumenstingl, Felix Fietkau, Arend van Spriel,
Arnd Bergmann, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Rafał Miłecki
In-Reply-To: <CACna6ryrYY5G=Fvmsrq_sD3iX5dWreyz7R8mGEd6ogUck=twnQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
> When driver uses custom regulatory it registers initial channels at
> init but it can also react to regdom changes using reg_notifier. Is
> that correct?
We can treat regulatory and OF data as entirely independent, I think.
At least that's my suggestion:
* use OF data to populate the original channel list, saying which
channels are valid (or not)
* use regulatory later to further restrict settings of the channels
> So I'm looking at brcmf_cfg80211_reg_notifier which calls
> brcmf_setup_wiphybands which calls brcmf_construct_chaninfo.
> That last one reworks all channels on every call. It first marks all
> existing channels as DISABLED then queries firmware for the list of
> supported channels and updates wiphy channels one by one.
> So if I understand this correctly, every regdom change can result in
> rebuilding channels pretty much from the scratch. That's why I
> believed I need to call wiphy_freq_limits_apply on runtime, not just
> during the init.
>
> Is there some flow in my understanding?
I think maybe there's a problem in my understanding :)
All the regulatory code usually takes into account channel->orig_flags.
If this code also did, then we could have the original DISABLED flag
taken from OF still be valid here.
johannes
johannes
^ permalink raw reply
* RE: [PATCH V2] arm64:dts:ls1046a: Add TMU device tree support
From: Troy Jia @ 2017-01-03 7:55 UTC (permalink / raw)
To: Shawn Guo
Cc: rui.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, Y.T. Tang,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Scott Wood,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
In-Reply-To: <20170103070607.GW20956@dragon>
> Subject: Re: [PATCH V2] arm64:dts:ls1046a: Add TMU device tree support
>
> On Tue, Jan 03, 2017 at 02:42:19PM +0800, Jia Hongtao wrote:
> > Also add nodes and properties for thermal management support.
> >
> > Signed-off-by: Jia Hongtao <hongtao.jia-3arQi8VN3Tc@public.gmane.org>
>
> The subject prefix is still not so right. There should be a space after each colon.
Sorry. I will fix it.
>
> > ---
> > Changes for V2:
> > * Update the subject title according to Shawn Guo's comment.
> > * Add comments for calibration data groups.
> > * Update "thermal-zones" property in a unified style with platform dts.
> >
> > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 83
> > ++++++++++++++++++++++++++
> > 1 file changed, 83 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > index 38806ca..df53a4a 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > @@ -45,6 +45,7 @@
> > */
> >
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/thermal/thermal.h>
> >
> > / {
> > compatible = "fsl,ls1046a";
> > @@ -67,6 +68,7 @@
> > clocks = <&clockgen 1 0>;
> > next-level-cache = <&l2>;
> > cpu-idle-states = <&CPU_PH20>;
> > + #cooling-cells = <2>;
> > };
> >
> > cpu1: cpu@1 {
> > @@ -279,6 +281,87 @@
> > clocks = <&sysclk>;
> > };
> >
> > + tmu: tmu@1f00000 {
> > + compatible = "fsl,qoriq-tmu";
> > + reg = <0x0 0x1f00000 0x0 0x10000>;
> > + interrupts = <0 33 0x4>;
> > + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
> > + fsl,tmu-calibration =
> > + /* Calibration data group 1*/
> > + <0x00000000 0x00000026
> > + 0x00000001 0x0000002d
> > + 0x00000002 0x00000032
> > + 0x00000003 0x00000039
> > + 0x00000004 0x0000003f
> > + 0x00000005 0x00000046
> > + 0x00000006 0x0000004d
> > + 0x00000007 0x00000054
> > + 0x00000008 0x0000005a
> > + 0x00000009 0x00000061
> > + 0x0000000a 0x0000006a
> > + 0x0000000b 0x00000071
> > +
> > + /* Calibration data group 2*/
>
> The single line comment format is /* blabla */. There are space at both beginning
> and end of the text.
Will fix.
>
> Also I am asking that we use the single line comment to replace the blank line,
> which is still there.
I think keeping the newline makes it more clear in structure. But I also understand
your point - no newline inside one property, right? If so I will delete the newline.
-Hongtao.
>
> > + 0x00010000 0x00000025
> > + 0x00010001 0x0000002c
> > + 0x00010002 0x00000035
> > + 0x00010003 0x0000003d
> > + 0x00010004 0x00000045
> > + 0x00010005 0x0000004e
> > + 0x00010006 0x00000057
> > + 0x00010007 0x00000061
> > + 0x00010008 0x0000006b
> > + 0x00010009 0x00000076
> > +
> > + /* Calibration data group 3*/
> > + 0x00020000 0x00000029
> > + 0x00020001 0x00000033
> > + 0x00020002 0x0000003d
> > + 0x00020003 0x00000049
> > + 0x00020004 0x00000056
> > + 0x00020005 0x00000061
> > + 0x00020006 0x0000006d
> > +
> > + /* Calibration data group 4*/
> > + 0x00030000 0x00000021
> > + 0x00030001 0x0000002a
> > + 0x00030002 0x0000003c
> > + 0x00030003 0x0000004e>;
>
> Here is the format on my mind:
>
> fsl,tmu-calibration = <
> /* Calibration data group 1 */
> 0x00000000 0x00000026
> 0x00000001 0x0000002d
> 0x00000002 0x00000032
> 0x00000003 0x00000039
> 0x00000004 0x0000003f
> 0x00000005 0x00000046
> 0x00000006 0x0000004d
> 0x00000007 0x00000054
> 0x00000008 0x0000005a
> 0x00000009 0x00000061
> 0x0000000a 0x0000006a
> 0x0000000b 0x00000071
> /* Calibration data group 2 */
> 0x00010000 0x00000025
> 0x00010001 0x0000002c
> 0x00010002 0x00000035
> 0x00010003 0x0000003d
> 0x00010004 0x00000045
> 0x00010005 0x0000004e
> 0x00010006 0x00000057
> 0x00010007 0x00000061
> 0x00010008 0x0000006b
> 0x00010009 0x00000076
> /* Calibration data group 3 */
> 0x00020000 0x00000029
> 0x00020001 0x00000033
> 0x00020002 0x0000003d
> 0x00020003 0x00000049
> 0x00020004 0x00000056
> 0x00020005 0x00000061
> 0x00020006 0x0000006d
> /* Calibration data group 4 */
> 0x00030000 0x00000021
> 0x00030001 0x0000002a
> 0x00030002 0x0000003c
> 0x00030003 0x0000004e
> >;
>
> Shawn
>
> > + big-endian;
> > + #thermal-sensor-cells = <1>;
> > + };
> > +
> > + thermal-zones {
> > + cpu_thermal: cpu-thermal {
> > + polling-delay-passive = <1000>;
> > + polling-delay = <5000>;
> > + thermal-sensors = <&tmu 3>;
> > +
> > + trips {
> > + cpu_alert: cpu-alert {
> > + temperature = <85000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + cpu_crit: cpu-crit {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > +
> > + cooling-maps {
> > + map0 {
> > + trip = <&cpu_alert>;
> > + cooling-device =
> > + <&cpu0
> THERMAL_NO_LIMIT
> > + THERMAL_NO_LIMIT>;
> > + };
> > + };
> > + };
> > + };
> > +
> > dspi: dspi@2100000 {
> > compatible = "fsl,ls1021a-v1.0-dspi";
> > #address-cells = <1>;
> > --
> > 2.1.0.27.g96db324
> >
--
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* [PATCH 0/4] Add touch key driver support for TM2
From: Jaechul Lee @ 2017-01-03 7:57 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Krzysztof Kozlowski,
Javier Martinez Canillas
Cc: Jaechul Lee, Andi Shyti, Chanwoo Choi,
beomho.seo-Sze3O3UU22JBDgjK7y7TUQ,
galaxyra-Re5JQEeQqe8AvxtiuMwx3w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <CGME20170103075733epcas5p48985c789a816f1f2eae84c52e070cc14@epcas5p4.samsung.com>
Hi,
This patchset adds support for the tm2 touchkey device.
The driver has been ported from Tizen Kernel, originally written
by Beomho. I ported it to the latest mainline Kernel.
dts has been separated between tm2 and tm2e because touchkey is present in tm2
but not tm2e.
Best Regards,
Jaechul
Andi Shyti (1):
arm64: dts: exynos: make tm2 and tm2e independent from each other
Jaechul Lee (3):
input: Add support for the tm2 touchkey device driver
input: tm2-touchkey: Add touchkey driver support for TM2
arm64: dts: exynos: Add tm2 touchkey node
.../bindings/input/samsung,tm2-touchkey.txt | 27 +
.../boot/dts/exynos/exynos5433-tm2-common.dtsi | 1046 ++++++++++++++++++++
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1037 +------------------
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 2 +-
drivers/input/keyboard/Kconfig | 11 +
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/tm2-touchkey.c | 326 ++++++
7 files changed, 1422 insertions(+), 1028 deletions(-)
create mode 100644 Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
create mode 100644 drivers/input/keyboard/tm2-touchkey.c
--
2.7.4
--
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^ permalink raw reply
* [PATCH 1/4] input: Add support for the tm2 touchkey device driver
From: Jaechul Lee @ 2017-01-03 7:57 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Krzysztof Kozlowski,
Javier Martinez Canillas
Cc: Jaechul Lee, Andi Shyti, Chanwoo Choi, beomho.seo, galaxyra,
linux-arm-kernel, linux-input, devicetree, linux-kernel,
linux-samsung-soc
In-Reply-To: <1483430237-26823-1-git-send-email-jcsing.lee@samsung.com>
This patch adds the binding description of the tm2 touchkey
device driver.
Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
---
.../bindings/input/samsung,tm2-touchkey.txt | 27 ++++++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
diff --git a/Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt b/Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
new file mode 100644
index 0000000..4de1af0
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/samsung,tm2-touchkey.txt
@@ -0,0 +1,27 @@
+Samsung tm2-touchkey
+
+Required properties:
+- compatible: must be "samsung,tm2-touchkey"
+- reg: I2C address of the chip.
+- interrupt-parent: a phandle for the interrupt controller (see interrupt
+ binding[0]).
+- interrupts: interrupt to which the chip is connected (see interrupt
+ binding[0]).
+- vcc-supply : internal regulator output. 1.8V
+- vdd-supply : power supply for IC 3.3V
+
+[0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+
+Example:
+ &i2c0 {
+ /* ... */
+
+ touchkey@20 {
+ compatible = "samsung,tm2-touchkey";
+ reg = <0x20>;
+ interrupt-parent = <&gpa3>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ vcc-supply=<&ldo32_reg>;
+ vdd-supply=<&ldo33_reg>;
+ };
+ };
--
2.7.4
^ permalink raw reply related
* [PATCH 2/4] input: tm2-touchkey: Add touchkey driver support for TM2
From: Jaechul Lee @ 2017-01-03 7:57 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Krzysztof Kozlowski,
Javier Martinez Canillas
Cc: Jaechul Lee, Andi Shyti, Chanwoo Choi, beomho.seo, galaxyra,
linux-arm-kernel, linux-input, devicetree, linux-kernel,
linux-samsung-soc
In-Reply-To: <1483430237-26823-1-git-send-email-jcsing.lee@samsung.com>
This patch adds support for the TM2 touch key and led
functionlity.
The driver interfaces with userspace through an input device and
reports KEY_PHONE and KEY_BACK event types. LED brightness can be
controlled by "/sys/class/leds/tm2-touchkey/brightness".
Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
---
drivers/input/keyboard/Kconfig | 11 ++
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/tm2-touchkey.c | 326 ++++++++++++++++++++++++++++++++++
3 files changed, 338 insertions(+)
create mode 100644 drivers/input/keyboard/tm2-touchkey.c
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index cbd75cf..72c0ba1 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -666,6 +666,17 @@ config KEYBOARD_TC3589X
To compile this driver as a module, choose M here: the
module will be called tc3589x-keypad.
+config KEYBOARD_TM2_TOUCHKEY
+ tristate "tm2-touchkey support"
+ depends on I2C
+ help
+ Say Y here to enable the tm2-touchkey.
+ touchkey driver for tm2. This driver can enable
+ the interrupt and make input events and control led brightness.
+
+ To compile this driver as a module, choose M here.
+ module will be called tm2-touchkey
+
config KEYBOARD_TWL4030
tristate "TI TWL4030/TWL5030/TPS659x0 keypad support"
depends on TWL4030_CORE
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index d9f4cfc..7d9acff 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_KEYBOARD_SUN4I_LRADC) += sun4i-lradc-keys.o
obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o
obj-$(CONFIG_KEYBOARD_TC3589X) += tc3589x-keypad.o
obj-$(CONFIG_KEYBOARD_TEGRA) += tegra-kbc.o
+obj-$(CONFIG_KEYBOARD_TM2_TOUCHKEY) += tm2-touchkey.o
obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o
obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o
obj-$(CONFIG_KEYBOARD_W90P910) += w90p910_keypad.o
diff --git a/drivers/input/keyboard/tm2-touchkey.c b/drivers/input/keyboard/tm2-touchkey.c
new file mode 100644
index 0000000..d9575d8
--- /dev/null
+++ b/drivers/input/keyboard/tm2-touchkey.c
@@ -0,0 +1,326 @@
+/*
+ * Driver for keys on GPIO lines capable of generating interrupts.
+ *
+ * Copyright 2005 Phil Blundell
+ * Copyright 2016 Samsung Electronics Co., Ltd.
+ *
+ * Author: Beomho Seo <beomho.seo@samsung.com>
+ * Author: Jaechul Lee <jcsing.lee@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pm.h>
+#include <linux/regulator/consumer.h>
+#include <linux/workqueue.h>
+
+#define TM2_TOUCHKEY_DEV_NAME "tm2-touchkey"
+#define TM2_TOUCHKEY_KEYCODE_REG 0x03
+#define TM2_TOUCHKEY_BASE_REG 0x00
+#define TM2_TOUCHKEY_CMD_LED_ON 0x10
+#define TM2_TOUCHKEY_CMD_LED_OFF 0x20
+#define TM2_TOUCHKEY_BIT_PRESS_EV BIT(3)
+#define TM2_TOUCHKEY_BIT_KEYCODE GENMASK(2, 0)
+#define TM2_TOUCHKEY_LED_VOLTAGE_MIN 2500000
+#define TM2_TOUCHKEY_LED_VOLTAGE_MAX 3300000
+
+enum {
+ TM2_TOUCHKEY_KEY_MENU = 0x1,
+ TM2_TOUCHKEY_KEY_BACK,
+};
+
+#define tm2_touchkey_power_enable(x) __tm2_touchkey_power_onoff(x, 1)
+#define tm2_touchkey_power_disable(x) __tm2_touchkey_power_onoff(x, 0)
+
+struct tm2_touchkey_data {
+ struct i2c_client *client;
+ struct input_dev *input_dev;
+ struct led_classdev led_dev;
+
+ u8 keycode_type;
+ u8 pressed;
+ struct work_struct irq_work;
+
+ bool power_onoff;
+ struct regulator *regulator_vcc; /* 1.8V */
+ struct regulator *regulator_vdd; /* 3.3V */
+};
+
+static void tm2_touchkey_led_brightness_set(struct led_classdev *led_dev,
+ enum led_brightness brightness)
+{
+ struct tm2_touchkey_data *samsung_touchkey =
+ container_of(led_dev, struct tm2_touchkey_data, led_dev);
+ u32 volt;
+ u8 data;
+
+ if (brightness == LED_OFF) {
+ volt = TM2_TOUCHKEY_LED_VOLTAGE_MIN;
+ data = TM2_TOUCHKEY_CMD_LED_OFF;
+ } else {
+ volt = TM2_TOUCHKEY_LED_VOLTAGE_MAX;
+ data = TM2_TOUCHKEY_CMD_LED_ON;
+ }
+
+ regulator_set_voltage(samsung_touchkey->regulator_vdd, volt, volt);
+ i2c_smbus_write_byte_data(samsung_touchkey->client,
+ TM2_TOUCHKEY_BASE_REG, data);
+}
+
+static int __tm2_touchkey_power_onoff(struct tm2_touchkey_data
+ *samsung_touchkey, bool onoff)
+{
+ int ret = 0;
+
+ if (samsung_touchkey->power_onoff == onoff)
+ return ret;
+
+ if (onoff) {
+ ret = regulator_enable(samsung_touchkey->regulator_vcc);
+ if (ret)
+ return ret;
+
+ ret = regulator_enable(samsung_touchkey->regulator_vdd);
+ if (ret) {
+ regulator_disable(samsung_touchkey->regulator_vcc);
+ return ret;
+ }
+ msleep(150);
+ } else {
+ int err;
+
+ err = regulator_disable(samsung_touchkey->regulator_vcc);
+ if (err)
+ ret = err;
+
+ err = regulator_disable(samsung_touchkey->regulator_vdd);
+ if (err && !ret)
+ ret = err;
+ }
+ samsung_touchkey->power_onoff = onoff;
+
+ return ret;
+}
+
+static void tm2_touchkey_irq_work(struct work_struct *irq_work)
+{
+ struct tm2_touchkey_data *samsung_touchkey =
+ container_of(irq_work, struct tm2_touchkey_data, irq_work);
+
+ if (!samsung_touchkey->pressed) {
+ input_report_key(samsung_touchkey->input_dev, KEY_PHONE, 0);
+ input_report_key(samsung_touchkey->input_dev, KEY_BACK, 0);
+ } else {
+ if (samsung_touchkey->keycode_type == TM2_TOUCHKEY_KEY_MENU)
+ input_report_key(samsung_touchkey->input_dev,
+ KEY_PHONE, 1);
+ else
+ input_report_key(samsung_touchkey->input_dev,
+ KEY_BACK, 1);
+ }
+ input_sync(samsung_touchkey->input_dev);
+}
+
+static irqreturn_t tm2_touchkey_irq_handler(int irq, void *devid)
+{
+ struct tm2_touchkey_data *samsung_touchkey = devid;
+ u32 data;
+
+ data = i2c_smbus_read_byte_data(samsung_touchkey->client,
+ TM2_TOUCHKEY_KEYCODE_REG);
+
+ if (data < 0) {
+ dev_err(&samsung_touchkey->client->dev, "Failed to read i2c data\n");
+ return IRQ_HANDLED;
+ }
+
+ samsung_touchkey->keycode_type = data & TM2_TOUCHKEY_BIT_KEYCODE;
+ samsung_touchkey->pressed = !(data & TM2_TOUCHKEY_BIT_PRESS_EV);
+
+ if (samsung_touchkey->keycode_type != TM2_TOUCHKEY_KEY_MENU &&
+ samsung_touchkey->keycode_type != TM2_TOUCHKEY_KEY_BACK)
+ return IRQ_HANDLED;
+
+ schedule_work(&samsung_touchkey->irq_work);
+
+ return IRQ_HANDLED;
+}
+
+static int tm2_touchkey_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct tm2_touchkey_data *samsung_touchkey;
+ int ret;
+
+ ret = i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE |
+ I2C_FUNC_SMBUS_BYTE_DATA);
+ if (!ret) {
+ dev_err(&client->dev, "No I2C functionality found\n");
+ return -ENODEV;
+ }
+
+ samsung_touchkey = devm_kzalloc(&client->dev,
+ sizeof(struct tm2_touchkey_data), GFP_KERNEL);
+
+ if (!samsung_touchkey) {
+ dev_err(&client->dev, "Failed to allocate memory.\n");
+ return -ENOMEM;
+ }
+
+ samsung_touchkey->client = client;
+ i2c_set_clientdata(client, samsung_touchkey);
+ INIT_WORK(&samsung_touchkey->irq_work, tm2_touchkey_irq_work);
+
+ /* regulator */
+ samsung_touchkey->regulator_vcc =
+ devm_regulator_get(&client->dev, "vcc");
+ if (IS_ERR(samsung_touchkey->regulator_vcc)) {
+ dev_err(&client->dev, "Failed to get vcc regulator\n");
+ return PTR_ERR(samsung_touchkey->regulator_vcc);
+ }
+
+ samsung_touchkey->regulator_vdd =
+ devm_regulator_get(&client->dev, "vdd");
+ if (IS_ERR(samsung_touchkey->regulator_vdd)) {
+ dev_err(&client->dev, "Failed to get vdd regulator\n");
+ return PTR_ERR(samsung_touchkey->regulator_vcc);
+ }
+
+ /* power */
+ ret = tm2_touchkey_power_enable(samsung_touchkey);
+ if (ret) {
+ dev_err(&client->dev, "Failed to enable power\n");
+ return ret;
+ }
+
+ /* irq */
+ ret = devm_request_threaded_irq(&client->dev,
+ client->irq, NULL,
+ tm2_touchkey_irq_handler,
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+ TM2_TOUCHKEY_DEV_NAME,
+ samsung_touchkey);
+ if (ret) {
+ dev_err(&client->dev, "Failed to request threaded irq\n");
+ return ret;
+ }
+
+ /* input device */
+ samsung_touchkey->input_dev = devm_input_allocate_device(&client->dev);
+ if (!samsung_touchkey->input_dev) {
+ dev_err(&client->dev, "Failed to alloc input device.\n");
+ return -ENOMEM;
+ }
+ samsung_touchkey->input_dev->name = TM2_TOUCHKEY_DEV_NAME;
+ samsung_touchkey->input_dev->id.bustype = BUS_I2C;
+ samsung_touchkey->input_dev->dev.parent = &client->dev;
+
+ set_bit(EV_KEY, samsung_touchkey->input_dev->evbit);
+ set_bit(KEY_PHONE, samsung_touchkey->input_dev->keybit);
+ set_bit(KEY_BACK, samsung_touchkey->input_dev->keybit);
+ input_set_drvdata(samsung_touchkey->input_dev, samsung_touchkey);
+
+ ret = input_register_device(samsung_touchkey->input_dev);
+ if (ret) {
+ dev_err(&client->dev, "Failed to register input device.\n");
+ return ret;
+ }
+
+ /* led device */
+ samsung_touchkey->led_dev.name = TM2_TOUCHKEY_DEV_NAME;
+ samsung_touchkey->led_dev.brightness = LED_FULL;
+ samsung_touchkey->led_dev.max_brightness = LED_FULL;
+ samsung_touchkey->led_dev.brightness_set =
+ tm2_touchkey_led_brightness_set;
+
+ ret = devm_led_classdev_register(&client->dev,
+ &samsung_touchkey->led_dev);
+ if (ret < 0) {
+ dev_err(&client->dev, "Failed to register touchkey led\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static void tm2_touchkey_shutdown(struct i2c_client *client)
+{
+ struct tm2_touchkey_data *samsung_touchkey =
+ i2c_get_clientdata(client);
+ int ret;
+
+ disable_irq(client->irq);
+ ret = tm2_touchkey_power_disable(samsung_touchkey);
+ if (ret)
+ dev_err(&client->dev, "Failed to disable power\n");
+}
+
+static int tm2_touchkey_suspend(struct device *dev)
+{
+ struct tm2_touchkey_data *samsung_touchkey = dev_get_drvdata(dev);
+ int ret;
+
+ disable_irq(samsung_touchkey->client->irq);
+ ret = tm2_touchkey_power_disable(samsung_touchkey);
+ if (ret)
+ dev_err(dev, "Failed to disable power\n");
+
+ return ret;
+}
+
+static int tm2_touchkey_resume(struct device *dev)
+{
+ struct tm2_touchkey_data *samsung_touchkey = dev_get_drvdata(dev);
+ int ret;
+
+ enable_irq(samsung_touchkey->client->irq);
+ ret = tm2_touchkey_power_enable(samsung_touchkey);
+ if (ret)
+ dev_err(dev, "Failed to enable power\n");
+
+ return ret;
+}
+
+static SIMPLE_DEV_PM_OPS(tm2_touchkey_pm_ops, tm2_touchkey_suspend,
+ tm2_touchkey_resume);
+
+static const struct i2c_device_id tm2_touchkey_id_table[] = {
+ {TM2_TOUCHKEY_DEV_NAME, 0},
+ {},
+};
+
+static const struct of_device_id tm2_touchkey_of_match[] = {
+ {.compatible = "samsung,tm2-touchkey",},
+ {},
+};
+
+static struct i2c_driver tm2_touchkey_driver = {
+ .driver = {
+ .name = TM2_TOUCHKEY_DEV_NAME,
+ .pm = &tm2_touchkey_pm_ops,
+ .of_match_table = of_match_ptr(tm2_touchkey_of_match),
+ },
+ .probe = tm2_touchkey_probe,
+ .shutdown = tm2_touchkey_shutdown,
+ .id_table = tm2_touchkey_id_table,
+};
+
+module_i2c_driver(tm2_touchkey_driver);
+
+MODULE_AUTHOR("Beomho Seo <beomho.seo@samsung.com>");
+MODULE_AUTHOR("Jaechul Lee <jcsing.lee@samsung.com>");
+MODULE_DESCRIPTION("Samsung touchkey driver");
+MODULE_LICENSE("GPL v2");
--
2.7.4
^ permalink raw reply related
* [PATCH 3/4] arm64: dts: exynos: make tm2 and tm2e independent from each other
From: Jaechul Lee @ 2017-01-03 7:57 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Krzysztof Kozlowski,
Javier Martinez Canillas
Cc: Jaechul Lee, Andi Shyti, Chanwoo Choi, beomho.seo, galaxyra,
linux-arm-kernel, linux-input, devicetree, linux-kernel,
linux-samsung-soc
In-Reply-To: <1483430237-26823-1-git-send-email-jcsing.lee@samsung.com>
From: Andi Shyti <andi.shyti@samsung.com>
Currently tm2e dts includes tm2 but there are some differences
between the two boards and tm2 has some properties that tm2e
doesn't have.
That's why it's important to keep the two dts files independent
and put all the commonalities in a tm2-common.dtsi file.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
---
.../boot/dts/exynos/exynos5433-tm2-common.dtsi | 1046 ++++++++++++++++++++
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1033 +------------------
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 2 +-
3 files changed, 1049 insertions(+), 1032 deletions(-)
create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
new file mode 100644
index 0000000..3d36717
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -0,0 +1,1046 @@
+/*
+ * SAMSUNG Exynos5433 TM2 board device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *
+ * Device tree source file for Samsung's TM2 board which is based on
+ * Samsung Exynos5433 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+#include "exynos5433.dtsi"
+#include <dt-bindings/clock/samsung,s2mps11.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ aliases {
+ gsc0 = &gsc_0;
+ gsc1 = &gsc_1;
+ gsc2 = &gsc_2;
+ pinctrl0 = &pinctrl_alive;
+ pinctrl1 = &pinctrl_aud;
+ pinctrl2 = &pinctrl_cpif;
+ pinctrl3 = &pinctrl_ese;
+ pinctrl4 = &pinctrl_finger;
+ pinctrl5 = &pinctrl_fsys;
+ pinctrl6 = &pinctrl_imem;
+ pinctrl7 = &pinctrl_nfc;
+ pinctrl8 = &pinctrl_peric;
+ pinctrl9 = &pinctrl_touch;
+ serial0 = &serial_0;
+ serial1 = &serial_1;
+ serial2 = &serial_2;
+ serial3 = &serial_3;
+ spi0 = &spi_0;
+ spi1 = &spi_1;
+ spi2 = &spi_2;
+ spi3 = &spi_3;
+ spi4 = &spi_4;
+ mshc0 = &mshc_0;
+ mshc2 = &mshc_2;
+ };
+
+ chosen {
+ stdout-path = &serial_1;
+ };
+
+ memory@20000000 {
+ device_type = "memory";
+ reg = <0x0 0x20000000 0x0 0xc0000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ power-key {
+ gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ label = "power key";
+ debounce-interval = <10>;
+ };
+
+ volume-up-key {
+ gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ label = "volume-up key";
+ debounce-interval = <10>;
+ };
+
+ volume-down-key {
+ gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ label = "volume-down key";
+ debounce-interval = <10>;
+ };
+
+ homepage-key {
+ gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_MENU>;
+ label = "homepage key";
+ debounce-interval = <10>;
+ };
+ };
+
+ i2c_max98504: i2c-gpio-0 {
+ compatible = "i2c-gpio";
+ gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
+ &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ max98504: max98504@31 {
+ compatible = "maxim,max98504";
+ reg = <0x31>;
+ maxim,rx-path = <1>;
+ maxim,tx-path = <1>;
+ maxim,tx-channel-mask = <3>;
+ maxim,tx-channel-source = <2>;
+ };
+ };
+
+ sound {
+ compatible = "samsung,tm2-audio";
+ audio-codec = <&wm5110>;
+ i2s-controller = <&i2s0>;
+ audio-amplifier = <&max98504>;
+ mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
+ model = "wm5110";
+ samsung,audio-routing =
+ /* Headphone */
+ "HP", "HPOUT1L",
+ "HP", "HPOUT1R",
+
+ /* Speaker */
+ "SPK", "SPKOUT",
+ "SPKOUT", "HPOUT2L",
+ "SPKOUT", "HPOUT2R",
+
+ /* Receiver */
+ "RCV", "HPOUT3L",
+ "RCV", "HPOUT3R";
+ status = "okay";
+ };
+};
+
+&adc {
+ vdd-supply = <&ldo3_reg>;
+ status = "okay";
+
+ thermistor-ap {
+ compatible = "murata,ncp03wf104";
+ pullup-uv = <1800000>;
+ pullup-ohm = <100000>;
+ pulldown-ohm = <0>;
+ io-channels = <&adc 0>;
+ };
+
+ thermistor-battery {
+ compatible = "murata,ncp03wf104";
+ pullup-uv = <1800000>;
+ pullup-ohm = <100000>;
+ pulldown-ohm = <0>;
+ io-channels = <&adc 1>;
+ #thermal-sensor-cells = <0>;
+ };
+
+ thermistor-charger {
+ compatible = "murata,ncp03wf104";
+ pullup-uv = <1800000>;
+ pullup-ohm = <100000>;
+ pulldown-ohm = <0>;
+ io-channels = <&adc 2>;
+ };
+};
+
+&cmu_aud {
+ assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
+ assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
+};
+
+&cmu_fsys {
+ assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
+ <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
+ <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
+ <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
+ <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
+ <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
+ <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
+ <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
+ <&cmu_top CLK_DIV_SCLK_USBDRD30>,
+ <&cmu_top CLK_DIV_SCLK_USBHOST30>;
+ assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
+ <&cmu_top CLK_MOUT_BUS_PLL_USER>,
+ <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
+ <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
+ <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
+ <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
+ <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
+ <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
+ assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
+ <66700000>, <66700000>;
+};
+
+&cmu_gscl {
+ assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
+ <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
+ assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
+ <&cmu_top CLK_ACLK_GSCL_333>;
+};
+
+&cmu_mfc {
+ assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
+ assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
+};
+
+&cmu_mscl {
+ assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
+ <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
+ <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
+ <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
+ assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
+ <&cmu_top CLK_SCLK_JPEG_MSCL>,
+ <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
+ <&cmu_top CLK_MOUT_BUS_PLL_USER>;
+};
+
+&cpu0 {
+ cpu-supply = <&buck3_reg>;
+};
+
+&cpu4 {
+ cpu-supply = <&buck2_reg>;
+};
+
+&decon {
+ status = "okay";
+
+ i80-if-timings {
+ };
+};
+
+&dsi {
+ status = "okay";
+ vddcore-supply = <&ldo6_reg>;
+ vddio-supply = <&ldo7_reg>;
+ samsung,pll-clock-frequency = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&te_irq>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ dsi_out: endpoint {
+ samsung,burst-clock-frequency = <512000000>;
+ samsung,esc-clock-frequency = <16000000>;
+ };
+ };
+ };
+};
+
+&hsi2c_0 {
+ status = "okay";
+ clock-frequency = <2500000>;
+
+ s2mps13-pmic@66 {
+ compatible = "samsung,s2mps13-pmic";
+ interrupt-parent = <&gpa0>;
+ interrupts = <7 IRQ_TYPE_NONE>;
+ reg = <0x66>;
+ samsung,s2mps11-wrstbi-ground;
+
+ s2mps13_osc: clocks {
+ compatible = "samsung,s2mps13-clk";
+ #clock-cells = <1>;
+ clock-output-names = "s2mps13_ap", "s2mps13_cp",
+ "s2mps13_bt";
+ };
+
+ regulators {
+ ldo1_reg: LDO1 {
+ regulator-name = "VDD_ALIVE_0.9V_AP";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-always-on;
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-name = "VDDQ_MMC2_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo3_reg: LDO3 {
+ regulator-name = "VDD1_E_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-name = "VDD10_MIF_PLL_1.0V_AP";
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo5_reg: LDO5 {
+ regulator-name = "VDD10_DPLL_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo6_reg: LDO6 {
+ regulator-name = "VDD10_MIPI2L_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo7_reg: LDO7 {
+ regulator-name = "VDD18_MIPI2L_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo8_reg: LDO8 {
+ regulator-name = "VDD18_LLI_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo9_reg: LDO9 {
+ regulator-name = "VDD18_ABB_ETC_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo10_reg: LDO10 {
+ regulator-name = "VDD33_USB30_3.0V_AP";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo11_reg: LDO11 {
+ regulator-name = "VDD_INT_M_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo12_reg: LDO12 {
+ regulator-name = "VDD_KFC_M_1.1V_AP";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ };
+
+ ldo13_reg: LDO13 {
+ regulator-name = "VDD_G3D_M_0.95V_AP";
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <950000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo14_reg: LDO14 {
+ regulator-name = "VDDQ_M1_LDO_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo15_reg: LDO15 {
+ regulator-name = "VDDQ_M2_LDO_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ ldo16_reg: LDO16 {
+ regulator-name = "VDDQ_EFUSE";
+ regulator-min-microvolt = <1400000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-always-on;
+ };
+
+ ldo17_reg: LDO17 {
+ regulator-name = "V_TFLASH_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo18_reg: LDO18 {
+ regulator-name = "V_CODEC_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo19_reg: LDO19 {
+ regulator-name = "VDDA_1.8V_COMP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo20_reg: LDO20 {
+ regulator-name = "VCC_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ ldo21_reg: LDO21 {
+ regulator-name = "VT_CAM_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo22_reg: LDO22 {
+ regulator-name = "CAM_IO_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo23_reg: LDO23 {
+ regulator-name = "CAM_SEN_CORE_1.2V_AP";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ ldo24_reg: LDO24 {
+ regulator-name = "VT_CAM_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ ldo25_reg: LDO25 {
+ regulator-name = "CAM_SEN_A2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo26_reg: LDO26 {
+ regulator-name = "CAM_AF_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo27_reg: LDO27 {
+ regulator-name = "VCC_3.0V_LCD_AP";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo28_reg: LDO28 {
+ regulator-name = "VCC_1.8V_LCD_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo29_reg: LDO29 {
+ regulator-name = "VT_CAM_2.8V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo30_reg: LDO30 {
+ regulator-name = "TSP_AVDD_3.3V_AP";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo31_reg: LDO31 {
+ regulator-name = "TSP_VDD_1.85V_AP";
+ regulator-min-microvolt = <1850000>;
+ regulator-max-microvolt = <1850000>;
+ };
+
+ ldo32_reg: LDO32 {
+ regulator-name = "VTOUCH_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo33_reg: LDO33 {
+ regulator-name = "VTOUCH_LED_3.3V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ };
+
+ ldo34_reg: LDO34 {
+ regulator-name = "VCC_1.8V_MHL_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <2100000>;
+ };
+
+ ldo35_reg: LDO35 {
+ regulator-name = "OIS_VM_2.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+
+ ldo36_reg: LDO36 {
+ regulator-name = "VSIL_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
+
+ ldo37_reg: LDO37 {
+ regulator-name = "VF_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo38_reg: LDO38 {
+ regulator-name = "VCC_3.0V_MOTOR_AP";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ };
+
+ ldo39_reg: LDO39 {
+ regulator-name = "V_HRM_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ ldo40_reg: LDO40 {
+ regulator-name = "V_HRM_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ buck1_reg: BUCK1 {
+ regulator-name = "VDD_MIF_0.9V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck2_reg: BUCK2 {
+ regulator-name = "VDD_EGL_1.0V_AP";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck3_reg: BUCK3 {
+ regulator-name = "VDD_KFC_1.0V_AP";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck4_reg: BUCK4 {
+ regulator-name = "VDD_INT_0.95V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck5_reg: BUCK5 {
+ regulator-name = "VDD_DISP_CAM0_0.9V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck6_reg: BUCK6 {
+ regulator-name = "VDD_G3D_0.9V_AP";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ buck7_reg: BUCK7 {
+ regulator-name = "VDD_MEM1_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ buck8_reg: BUCK8 {
+ regulator-name = "VDD_LLDO_1.35V_AP";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ buck9_reg: BUCK9 {
+ regulator-name = "VDD_MLDO_2.0V_AP";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ buck10_reg: BUCK10 {
+ regulator-name = "vdd_mem2";
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&hsi2c_8 {
+ status = "okay";
+
+ max77843@66 {
+ compatible = "maxim,max77843";
+ interrupt-parent = <&gpa1>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
+ reg = <0x66>;
+
+ muic: max77843-muic {
+ compatible = "maxim,max77843-muic";
+ };
+
+ regulators {
+ compatible = "maxim,max77843-regulator";
+ safeout1_reg: SAFEOUT1 {
+ regulator-name = "SAFEOUT1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <4950000>;
+ };
+
+ safeout2_reg: SAFEOUT2 {
+ regulator-name = "SAFEOUT2";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <4950000>;
+ };
+
+ charger_reg: CHARGER {
+ regulator-name = "CHARGER";
+ regulator-min-microamp = <100000>;
+ regulator-max-microamp = <3150000>;
+ };
+ };
+
+ haptic: max77843-haptic {
+ compatible = "maxim,max77843-haptic";
+ haptic-supply = <&ldo38_reg>;
+ pwms = <&pwm 0 33670 0>;
+ pwm-names = "haptic";
+ };
+ };
+};
+
+&i2s0 {
+ status = "okay";
+};
+
+&mshc_0 {
+ status = "okay";
+ num-slots = <1>;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ cap-mmc-highspeed;
+ non-removable;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ samsung,dw-mshc-hs400-timing = <0 3>;
+ samsung,read-strobe-delay = <90>;
+ fifo-depth = <0x80>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
+ &sd0_bus8 &sd0_rdqs>;
+ bus-width = <8>;
+ assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
+ assigned-clock-rates = <800000000>;
+};
+
+&mshc_2 {
+ status = "okay";
+ num-slots = <1>;
+ cap-sd-highspeed;
+ disable-wp;
+ cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ card-detect-delay = <200>;
+ samsung,dw-mshc-ciu-div = <3>;
+ samsung,dw-mshc-sdr-timing = <0 4>;
+ samsung,dw-mshc-ddr-timing = <0 2>;
+ fifo-depth = <0x80>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
+ bus-width = <4>;
+};
+
+&pinctrl_alive {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_alive>;
+
+ initial_alive: initial-state {
+ PIN(IN, gpa0-0, DOWN, LV1);
+ PIN(IN, gpa0-1, NONE, LV1);
+ PIN(IN, gpa0-2, DOWN, LV1);
+ PIN(IN, gpa0-3, NONE, LV1);
+ PIN(IN, gpa0-4, NONE, LV1);
+ PIN(IN, gpa0-5, DOWN, LV1);
+ PIN(IN, gpa0-6, NONE, LV1);
+ PIN(IN, gpa0-7, NONE, LV1);
+
+ PIN(IN, gpa1-0, UP, LV1);
+ PIN(IN, gpa1-1, NONE, LV1);
+ PIN(IN, gpa1-2, NONE, LV1);
+ PIN(IN, gpa1-3, DOWN, LV1);
+ PIN(IN, gpa1-4, DOWN, LV1);
+ PIN(IN, gpa1-5, NONE, LV1);
+ PIN(IN, gpa1-6, NONE, LV1);
+ PIN(IN, gpa1-7, NONE, LV1);
+
+ PIN(IN, gpa2-0, NONE, LV1);
+ PIN(IN, gpa2-1, NONE, LV1);
+ PIN(IN, gpa2-2, NONE, LV1);
+ PIN(IN, gpa2-3, DOWN, LV1);
+ PIN(IN, gpa2-4, NONE, LV1);
+ PIN(IN, gpa2-5, DOWN, LV1);
+ PIN(IN, gpa2-6, DOWN, LV1);
+ PIN(IN, gpa2-7, NONE, LV1);
+
+ PIN(IN, gpa3-0, DOWN, LV1);
+ PIN(IN, gpa3-1, DOWN, LV1);
+ PIN(IN, gpa3-2, NONE, LV1);
+ PIN(IN, gpa3-3, DOWN, LV1);
+ PIN(IN, gpa3-4, NONE, LV1);
+ PIN(IN, gpa3-5, DOWN, LV1);
+ PIN(IN, gpa3-6, DOWN, LV1);
+ PIN(IN, gpa3-7, DOWN, LV1);
+
+ PIN(IN, gpf1-0, NONE, LV1);
+ PIN(IN, gpf1-1, NONE, LV1);
+ PIN(IN, gpf1-2, DOWN, LV1);
+ PIN(IN, gpf1-4, UP, LV1);
+ PIN(OUT, gpf1-5, NONE, LV1);
+ PIN(IN, gpf1-6, DOWN, LV1);
+ PIN(IN, gpf1-7, DOWN, LV1);
+
+ PIN(IN, gpf2-0, DOWN, LV1);
+ PIN(IN, gpf2-1, DOWN, LV1);
+ PIN(IN, gpf2-2, DOWN, LV1);
+ PIN(IN, gpf2-3, DOWN, LV1);
+
+ PIN(IN, gpf3-0, DOWN, LV1);
+ PIN(IN, gpf3-1, DOWN, LV1);
+ PIN(IN, gpf3-2, NONE, LV1);
+ PIN(IN, gpf3-3, DOWN, LV1);
+
+ PIN(IN, gpf4-0, DOWN, LV1);
+ PIN(IN, gpf4-1, DOWN, LV1);
+ PIN(IN, gpf4-2, DOWN, LV1);
+ PIN(IN, gpf4-3, DOWN, LV1);
+ PIN(IN, gpf4-4, DOWN, LV1);
+ PIN(IN, gpf4-5, DOWN, LV1);
+ PIN(IN, gpf4-6, DOWN, LV1);
+ PIN(IN, gpf4-7, DOWN, LV1);
+
+ PIN(IN, gpf5-0, DOWN, LV1);
+ PIN(IN, gpf5-1, DOWN, LV1);
+ PIN(IN, gpf5-2, DOWN, LV1);
+ PIN(IN, gpf5-3, DOWN, LV1);
+ PIN(OUT, gpf5-4, NONE, LV1);
+ PIN(IN, gpf5-5, DOWN, LV1);
+ PIN(IN, gpf5-6, DOWN, LV1);
+ PIN(IN, gpf5-7, DOWN, LV1);
+ };
+
+ te_irq: te_irq {
+ samsung,pins = "gpf1-3";
+ samsung,pin-function = <0xf>;
+ };
+};
+
+&pinctrl_cpif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_cpif>;
+
+ initial_cpif: initial-state {
+ PIN(IN, gpv6-0, DOWN, LV1);
+ PIN(IN, gpv6-1, DOWN, LV1);
+ };
+};
+
+&pinctrl_ese {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_ese>;
+
+ initial_ese: initial-state {
+ PIN(IN, gpj2-0, DOWN, LV1);
+ PIN(IN, gpj2-1, DOWN, LV1);
+ PIN(IN, gpj2-2, DOWN, LV1);
+ };
+};
+
+&pinctrl_fsys {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_fsys>;
+
+ initial_fsys: initial-state {
+ PIN(IN, gpr3-0, NONE, LV1);
+ PIN(IN, gpr3-1, DOWN, LV1);
+ PIN(IN, gpr3-2, DOWN, LV1);
+ PIN(IN, gpr3-3, DOWN, LV1);
+ PIN(IN, gpr3-7, NONE, LV1);
+ };
+};
+
+&pinctrl_imem {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_imem>;
+
+ initial_imem: initial-state {
+ PIN(IN, gpf0-0, UP, LV1);
+ PIN(IN, gpf0-1, UP, LV1);
+ PIN(IN, gpf0-2, DOWN, LV1);
+ PIN(IN, gpf0-3, UP, LV1);
+ PIN(IN, gpf0-4, DOWN, LV1);
+ PIN(IN, gpf0-5, NONE, LV1);
+ PIN(IN, gpf0-6, DOWN, LV1);
+ PIN(IN, gpf0-7, UP, LV1);
+ };
+};
+
+&pinctrl_nfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_nfc>;
+
+ initial_nfc: initial-state {
+ PIN(IN, gpj0-2, DOWN, LV1);
+ };
+};
+
+&pinctrl_peric {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_peric>;
+
+ initial_peric: initial-state {
+ PIN(IN, gpv7-0, DOWN, LV1);
+ PIN(IN, gpv7-1, DOWN, LV1);
+ PIN(IN, gpv7-2, NONE, LV1);
+ PIN(IN, gpv7-3, DOWN, LV1);
+ PIN(IN, gpv7-4, DOWN, LV1);
+ PIN(IN, gpv7-5, DOWN, LV1);
+
+ PIN(IN, gpb0-4, DOWN, LV1);
+
+ PIN(IN, gpc0-2, DOWN, LV1);
+ PIN(IN, gpc0-5, DOWN, LV1);
+ PIN(IN, gpc0-7, DOWN, LV1);
+
+ PIN(IN, gpc1-1, DOWN, LV1);
+
+ PIN(IN, gpc3-4, NONE, LV1);
+ PIN(IN, gpc3-5, NONE, LV1);
+ PIN(IN, gpc3-6, NONE, LV1);
+ PIN(IN, gpc3-7, NONE, LV1);
+
+ PIN(OUT, gpg0-0, NONE, LV1);
+ PIN(FUNC1, gpg0-1, DOWN, LV1);
+
+ PIN(IN, gpd2-5, DOWN, LV1);
+
+ PIN(IN, gpd4-0, NONE, LV1);
+ PIN(IN, gpd4-1, DOWN, LV1);
+ PIN(IN, gpd4-2, DOWN, LV1);
+ PIN(IN, gpd4-3, DOWN, LV1);
+ PIN(IN, gpd4-4, DOWN, LV1);
+
+ PIN(IN, gpd6-3, DOWN, LV1);
+
+ PIN(IN, gpd8-1, UP, LV1);
+
+ PIN(IN, gpg1-0, DOWN, LV1);
+ PIN(IN, gpg1-1, DOWN, LV1);
+ PIN(IN, gpg1-2, DOWN, LV1);
+ PIN(IN, gpg1-3, DOWN, LV1);
+ PIN(IN, gpg1-4, DOWN, LV1);
+
+ PIN(IN, gpg2-0, DOWN, LV1);
+ PIN(IN, gpg2-1, DOWN, LV1);
+
+ PIN(IN, gpg3-0, DOWN, LV1);
+ PIN(IN, gpg3-1, DOWN, LV1);
+ PIN(IN, gpg3-5, DOWN, LV1);
+ PIN(IN, gpg3-7, DOWN, LV1);
+ };
+};
+
+&pinctrl_touch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&initial_touch>;
+
+ initial_touch: initial-state {
+ PIN(IN, gpj1-2, DOWN, LV1);
+ };
+};
+
+&pwm {
+ pinctrl-0 = <&pwm0_out>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&mic {
+ status = "okay";
+
+ i80-if-timings {
+ };
+};
+
+&pmu_system_controller {
+ assigned-clocks = <&pmu_system_controller 0>;
+ assigned-clock-parents = <&xxti>;
+};
+
+&serial_1 {
+ status = "okay";
+};
+
+&spi_1 {
+ cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ wm5110: wm5110-codec@0 {
+ compatible = "wlf,wm5110";
+ reg = <0x0>;
+ spi-max-frequency = <20000000>;
+ interrupt-parent = <&gpa0>;
+ interrupts = <4 IRQ_TYPE_NONE>;
+ clocks = <&pmu_system_controller 0>,
+ <&s2mps13_osc S2MPS11_CLK_BT>;
+ clock-names = "mclk1", "mclk2";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ wlf,micd-detect-debounce = <300>;
+ wlf,micd-bias-start-time = <0x1>;
+ wlf,micd-rate = <0x7>;
+ wlf,micd-dbtime = <0x1>;
+ wlf,micd-force-micbias;
+ wlf,micd-configs = <0x0 1 0>;
+ wlf,hpdet-channel = <1>;
+ wlf,gpsw = <0x1>;
+ wlf,inmode = <2 0 2 0>;
+
+ wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
+ wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
+
+ /* core supplies */
+ AVDD-supply = <&ldo18_reg>;
+ DBVDD1-supply = <&ldo18_reg>;
+ CPVDD-supply = <&ldo18_reg>;
+ DBVDD2-supply = <&ldo18_reg>;
+ DBVDD3-supply = <&ldo18_reg>;
+
+ controller-data {
+ samsung,spi-feedback-delay = <0>;
+ };
+ };
+};
+
+&timer {
+ clock-frequency = <24000000>;
+};
+
+&tmu_atlas0 {
+ vtmu-supply = <&ldo3_reg>;
+ status = "okay";
+};
+
+&tmu_apollo {
+ vtmu-supply = <&ldo3_reg>;
+ status = "okay";
+};
+
+&tmu_g3d {
+ vtmu-supply = <&ldo3_reg>;
+ status = "okay";
+};
+
+&usbdrd30 {
+ vdd33-supply = <&ldo10_reg>;
+ vdd10-supply = <&ldo6_reg>;
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ dr_mode = "otg";
+};
+
+&usbdrd30_phy {
+ vbus-supply = <&safeout1_reg>;
+ status = "okay";
+};
+
+&xxti {
+ clock-frequency = <24000000>;
+};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index f21bdc2..887a1f1 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -11,1039 +11,10 @@
* published by the Free Software Foundation.
*/
-/dts-v1/;
-#include "exynos5433.dtsi"
-#include <dt-bindings/clock/samsung,s2mps11.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
+#include "exynos5433-tm2-common.dtsi"
/ {
model = "Samsung TM2 board";
- compatible = "samsung,tm2", "samsung,exynos5433";
-
- aliases {
- gsc0 = &gsc_0;
- gsc1 = &gsc_1;
- gsc2 = &gsc_2;
- pinctrl0 = &pinctrl_alive;
- pinctrl1 = &pinctrl_aud;
- pinctrl2 = &pinctrl_cpif;
- pinctrl3 = &pinctrl_ese;
- pinctrl4 = &pinctrl_finger;
- pinctrl5 = &pinctrl_fsys;
- pinctrl6 = &pinctrl_imem;
- pinctrl7 = &pinctrl_nfc;
- pinctrl8 = &pinctrl_peric;
- pinctrl9 = &pinctrl_touch;
- serial0 = &serial_0;
- serial1 = &serial_1;
- serial2 = &serial_2;
- serial3 = &serial_3;
- spi0 = &spi_0;
- spi1 = &spi_1;
- spi2 = &spi_2;
- spi3 = &spi_3;
- spi4 = &spi_4;
- mshc0 = &mshc_0;
- mshc2 = &mshc_2;
- };
-
- chosen {
- stdout-path = &serial_1;
- };
-
- memory@20000000 {
- device_type = "memory";
- reg = <0x0 0x20000000 0x0 0xc0000000>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- power-key {
- gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_POWER>;
- label = "power key";
- debounce-interval = <10>;
- };
-
- volume-up-key {
- gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEUP>;
- label = "volume-up key";
- debounce-interval = <10>;
- };
-
- volume-down-key {
- gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_VOLUMEDOWN>;
- label = "volume-down key";
- debounce-interval = <10>;
- };
-
- homepage-key {
- gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_MENU>;
- label = "homepage key";
- debounce-interval = <10>;
- };
- };
-
- i2c_max98504: i2c-gpio-0 {
- compatible = "i2c-gpio";
- gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
- &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
- i2c-gpio,delay-us = <2>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- max98504: max98504@31 {
- compatible = "maxim,max98504";
- reg = <0x31>;
- maxim,rx-path = <1>;
- maxim,tx-path = <1>;
- maxim,tx-channel-mask = <3>;
- maxim,tx-channel-source = <2>;
- };
- };
-
- sound {
- compatible = "samsung,tm2-audio";
- audio-codec = <&wm5110>;
- i2s-controller = <&i2s0>;
- audio-amplifier = <&max98504>;
- mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
- model = "wm5110";
- samsung,audio-routing =
- /* Headphone */
- "HP", "HPOUT1L",
- "HP", "HPOUT1R",
-
- /* Speaker */
- "SPK", "SPKOUT",
- "SPKOUT", "HPOUT2L",
- "SPKOUT", "HPOUT2R",
-
- /* Receiver */
- "RCV", "HPOUT3L",
- "RCV", "HPOUT3R";
- status = "okay";
- };
-};
-
-&adc {
- vdd-supply = <&ldo3_reg>;
- status = "okay";
-
- thermistor-ap {
- compatible = "murata,ncp03wf104";
- pullup-uv = <1800000>;
- pullup-ohm = <100000>;
- pulldown-ohm = <0>;
- io-channels = <&adc 0>;
- };
-
- thermistor-battery {
- compatible = "murata,ncp03wf104";
- pullup-uv = <1800000>;
- pullup-ohm = <100000>;
- pulldown-ohm = <0>;
- io-channels = <&adc 1>;
- #thermal-sensor-cells = <0>;
- };
-
- thermistor-charger {
- compatible = "murata,ncp03wf104";
- pullup-uv = <1800000>;
- pullup-ohm = <100000>;
- pulldown-ohm = <0>;
- io-channels = <&adc 2>;
- };
-};
-
-&cmu_aud {
- assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>;
- assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>;
-};
-
-&cmu_fsys {
- assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
- <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
- <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
- <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
- <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
- <&cmu_top CLK_DIV_SCLK_USBDRD30>,
- <&cmu_top CLK_DIV_SCLK_USBHOST30>;
- assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
- <&cmu_top CLK_MOUT_BUS_PLL_USER>,
- <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
- <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
- <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
- <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
- <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
- <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
- assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
- <66700000>, <66700000>;
-};
-
-&cmu_gscl {
- assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
- <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
- assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
- <&cmu_top CLK_ACLK_GSCL_333>;
+ compatible = "samsung,tm2e", "samsung,exynos5433";
};
-&cmu_mfc {
- assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
- assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
-};
-
-&cmu_mscl {
- assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
- <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
- <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
- <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
- assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
- <&cmu_top CLK_SCLK_JPEG_MSCL>,
- <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
- <&cmu_top CLK_MOUT_BUS_PLL_USER>;
-};
-
-&cpu0 {
- cpu-supply = <&buck3_reg>;
-};
-
-&cpu4 {
- cpu-supply = <&buck2_reg>;
-};
-
-&decon {
- status = "okay";
-
- i80-if-timings {
- };
-};
-
-&dsi {
- status = "okay";
- vddcore-supply = <&ldo6_reg>;
- vddio-supply = <&ldo7_reg>;
- samsung,pll-clock-frequency = <24000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&te_irq>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@1 {
- reg = <1>;
-
- dsi_out: endpoint {
- samsung,burst-clock-frequency = <512000000>;
- samsung,esc-clock-frequency = <16000000>;
- };
- };
- };
-};
-
-&hsi2c_0 {
- status = "okay";
- clock-frequency = <2500000>;
-
- s2mps13-pmic@66 {
- compatible = "samsung,s2mps13-pmic";
- interrupt-parent = <&gpa0>;
- interrupts = <7 IRQ_TYPE_NONE>;
- reg = <0x66>;
- samsung,s2mps11-wrstbi-ground;
-
- s2mps13_osc: clocks {
- compatible = "samsung,s2mps13-clk";
- #clock-cells = <1>;
- clock-output-names = "s2mps13_ap", "s2mps13_cp",
- "s2mps13_bt";
- };
-
- regulators {
- ldo1_reg: LDO1 {
- regulator-name = "VDD_ALIVE_0.9V_AP";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = "VDDQ_MMC2_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo3_reg: LDO3 {
- regulator-name = "VDD1_E_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- ldo4_reg: LDO4 {
- regulator-name = "VDD10_MIF_PLL_1.0V_AP";
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo5_reg: LDO5 {
- regulator-name = "VDD10_DPLL_1.0V_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo6_reg: LDO6 {
- regulator-name = "VDD10_MIPI2L_1.0V_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo7_reg: LDO7 {
- regulator-name = "VDD18_MIPI2L_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo8_reg: LDO8 {
- regulator-name = "VDD18_LLI_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo9_reg: LDO9 {
- regulator-name = "VDD18_ABB_ETC_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo10_reg: LDO10 {
- regulator-name = "VDD33_USB30_3.0V_AP";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo11_reg: LDO11 {
- regulator-name = "VDD_INT_M_1.0V_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo12_reg: LDO12 {
- regulator-name = "VDD_KFC_M_1.1V_AP";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- };
-
- ldo13_reg: LDO13 {
- regulator-name = "VDD_G3D_M_0.95V_AP";
- regulator-min-microvolt = <950000>;
- regulator-max-microvolt = <950000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo14_reg: LDO14 {
- regulator-name = "VDDQ_M1_LDO_1.2V_AP";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo15_reg: LDO15 {
- regulator-name = "VDDQ_M2_LDO_1.2V_AP";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- ldo16_reg: LDO16 {
- regulator-name = "VDDQ_EFUSE";
- regulator-min-microvolt = <1400000>;
- regulator-max-microvolt = <3400000>;
- regulator-always-on;
- };
-
- ldo17_reg: LDO17 {
- regulator-name = "V_TFLASH_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- ldo18_reg: LDO18 {
- regulator-name = "V_CODEC_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo19_reg: LDO19 {
- regulator-name = "VDDA_1.8V_COMP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- ldo20_reg: LDO20 {
- regulator-name = "VCC_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- };
-
- ldo21_reg: LDO21 {
- regulator-name = "VT_CAM_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo22_reg: LDO22 {
- regulator-name = "CAM_IO_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo23_reg: LDO23 {
- regulator-name = "CAM_SEN_CORE_1.2V_AP";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1200000>;
- };
-
- ldo24_reg: LDO24 {
- regulator-name = "VT_CAM_1.2V";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
-
- ldo25_reg: LDO25 {
- regulator-name = "CAM_SEN_A2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- ldo26_reg: LDO26 {
- regulator-name = "CAM_AF_2.8V_AP";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- ldo27_reg: LDO27 {
- regulator-name = "VCC_3.0V_LCD_AP";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- ldo28_reg: LDO28 {
- regulator-name = "VCC_1.8V_LCD_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo29_reg: LDO29 {
- regulator-name = "VT_CAM_2.8V";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- ldo30_reg: LDO30 {
- regulator-name = "TSP_AVDD_3.3V_AP";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo31_reg: LDO31 {
- regulator-name = "TSP_VDD_1.85V_AP";
- regulator-min-microvolt = <1850000>;
- regulator-max-microvolt = <1850000>;
- };
-
- ldo32_reg: LDO32 {
- regulator-name = "VTOUCH_1.8V_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo33_reg: LDO33 {
- regulator-name = "VTOUCH_LED_3.3V";
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- };
-
- ldo34_reg: LDO34 {
- regulator-name = "VCC_1.8V_MHL_AP";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <2100000>;
- };
-
- ldo35_reg: LDO35 {
- regulator-name = "OIS_VM_2.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2800000>;
- };
-
- ldo36_reg: LDO36 {
- regulator-name = "VSIL_1.0V";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- };
-
- ldo37_reg: LDO37 {
- regulator-name = "VF_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo38_reg: LDO38 {
- regulator-name = "VCC_3.0V_MOTOR_AP";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
-
- ldo39_reg: LDO39 {
- regulator-name = "V_HRM_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- ldo40_reg: LDO40 {
- regulator-name = "V_HRM_3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- buck1_reg: BUCK1 {
- regulator-name = "VDD_MIF_0.9V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "VDD_EGL_1.0V_AP";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1300000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck3_reg: BUCK3 {
- regulator-name = "VDD_KFC_1.0V_AP";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck4_reg: BUCK4 {
- regulator-name = "VDD_INT_0.95V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck5_reg: BUCK5 {
- regulator-name = "VDD_DISP_CAM0_0.9V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck6_reg: BUCK6 {
- regulator-name = "VDD_G3D_0.9V_AP";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- buck7_reg: BUCK7 {
- regulator-name = "VDD_MEM1_1.2V_AP";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
- };
-
- buck8_reg: BUCK8 {
- regulator-name = "VDD_LLDO_1.35V_AP";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- buck9_reg: BUCK9 {
- regulator-name = "VDD_MLDO_2.0V_AP";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- buck10_reg: BUCK10 {
- regulator-name = "vdd_mem2";
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- };
- };
- };
-};
-
-&hsi2c_8 {
- status = "okay";
-
- max77843@66 {
- compatible = "maxim,max77843";
- interrupt-parent = <&gpa1>;
- interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
- reg = <0x66>;
-
- muic: max77843-muic {
- compatible = "maxim,max77843-muic";
- };
-
- regulators {
- compatible = "maxim,max77843-regulator";
- safeout1_reg: SAFEOUT1 {
- regulator-name = "SAFEOUT1";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <4950000>;
- };
-
- safeout2_reg: SAFEOUT2 {
- regulator-name = "SAFEOUT2";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <4950000>;
- };
-
- charger_reg: CHARGER {
- regulator-name = "CHARGER";
- regulator-min-microamp = <100000>;
- regulator-max-microamp = <3150000>;
- };
- };
-
- haptic: max77843-haptic {
- compatible = "maxim,max77843-haptic";
- haptic-supply = <&ldo38_reg>;
- pwms = <&pwm 0 33670 0>;
- pwm-names = "haptic";
- };
- };
-};
-
-&i2s0 {
- status = "okay";
-};
-
-&mshc_0 {
- status = "okay";
- num-slots = <1>;
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- cap-mmc-highspeed;
- non-removable;
- card-detect-delay = <200>;
- samsung,dw-mshc-ciu-div = <3>;
- samsung,dw-mshc-sdr-timing = <0 4>;
- samsung,dw-mshc-ddr-timing = <0 2>;
- samsung,dw-mshc-hs400-timing = <0 3>;
- samsung,read-strobe-delay = <90>;
- fifo-depth = <0x80>;
- pinctrl-names = "default";
- pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
- &sd0_bus8 &sd0_rdqs>;
- bus-width = <8>;
- assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
- assigned-clock-rates = <800000000>;
-};
-
-&mshc_2 {
- status = "okay";
- num-slots = <1>;
- cap-sd-highspeed;
- disable-wp;
- cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
- cd-inverted;
- card-detect-delay = <200>;
- samsung,dw-mshc-ciu-div = <3>;
- samsung,dw-mshc-sdr-timing = <0 4>;
- samsung,dw-mshc-ddr-timing = <0 2>;
- fifo-depth = <0x80>;
- pinctrl-names = "default";
- pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
- bus-width = <4>;
-};
-
-&pinctrl_alive {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_alive>;
-
- initial_alive: initial-state {
- PIN(IN, gpa0-0, DOWN, LV1);
- PIN(IN, gpa0-1, NONE, LV1);
- PIN(IN, gpa0-2, DOWN, LV1);
- PIN(IN, gpa0-3, NONE, LV1);
- PIN(IN, gpa0-4, NONE, LV1);
- PIN(IN, gpa0-5, DOWN, LV1);
- PIN(IN, gpa0-6, NONE, LV1);
- PIN(IN, gpa0-7, NONE, LV1);
-
- PIN(IN, gpa1-0, UP, LV1);
- PIN(IN, gpa1-1, NONE, LV1);
- PIN(IN, gpa1-2, NONE, LV1);
- PIN(IN, gpa1-3, DOWN, LV1);
- PIN(IN, gpa1-4, DOWN, LV1);
- PIN(IN, gpa1-5, NONE, LV1);
- PIN(IN, gpa1-6, NONE, LV1);
- PIN(IN, gpa1-7, NONE, LV1);
-
- PIN(IN, gpa2-0, NONE, LV1);
- PIN(IN, gpa2-1, NONE, LV1);
- PIN(IN, gpa2-2, NONE, LV1);
- PIN(IN, gpa2-3, DOWN, LV1);
- PIN(IN, gpa2-4, NONE, LV1);
- PIN(IN, gpa2-5, DOWN, LV1);
- PIN(IN, gpa2-6, DOWN, LV1);
- PIN(IN, gpa2-7, NONE, LV1);
-
- PIN(IN, gpa3-0, DOWN, LV1);
- PIN(IN, gpa3-1, DOWN, LV1);
- PIN(IN, gpa3-2, NONE, LV1);
- PIN(IN, gpa3-3, DOWN, LV1);
- PIN(IN, gpa3-4, NONE, LV1);
- PIN(IN, gpa3-5, DOWN, LV1);
- PIN(IN, gpa3-6, DOWN, LV1);
- PIN(IN, gpa3-7, DOWN, LV1);
-
- PIN(IN, gpf1-0, NONE, LV1);
- PIN(IN, gpf1-1, NONE, LV1);
- PIN(IN, gpf1-2, DOWN, LV1);
- PIN(IN, gpf1-4, UP, LV1);
- PIN(OUT, gpf1-5, NONE, LV1);
- PIN(IN, gpf1-6, DOWN, LV1);
- PIN(IN, gpf1-7, DOWN, LV1);
-
- PIN(IN, gpf2-0, DOWN, LV1);
- PIN(IN, gpf2-1, DOWN, LV1);
- PIN(IN, gpf2-2, DOWN, LV1);
- PIN(IN, gpf2-3, DOWN, LV1);
-
- PIN(IN, gpf3-0, DOWN, LV1);
- PIN(IN, gpf3-1, DOWN, LV1);
- PIN(IN, gpf3-2, NONE, LV1);
- PIN(IN, gpf3-3, DOWN, LV1);
-
- PIN(IN, gpf4-0, DOWN, LV1);
- PIN(IN, gpf4-1, DOWN, LV1);
- PIN(IN, gpf4-2, DOWN, LV1);
- PIN(IN, gpf4-3, DOWN, LV1);
- PIN(IN, gpf4-4, DOWN, LV1);
- PIN(IN, gpf4-5, DOWN, LV1);
- PIN(IN, gpf4-6, DOWN, LV1);
- PIN(IN, gpf4-7, DOWN, LV1);
-
- PIN(IN, gpf5-0, DOWN, LV1);
- PIN(IN, gpf5-1, DOWN, LV1);
- PIN(IN, gpf5-2, DOWN, LV1);
- PIN(IN, gpf5-3, DOWN, LV1);
- PIN(OUT, gpf5-4, NONE, LV1);
- PIN(IN, gpf5-5, DOWN, LV1);
- PIN(IN, gpf5-6, DOWN, LV1);
- PIN(IN, gpf5-7, DOWN, LV1);
- };
-
- te_irq: te_irq {
- samsung,pins = "gpf1-3";
- samsung,pin-function = <0xf>;
- };
-};
-
-&pinctrl_cpif {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_cpif>;
-
- initial_cpif: initial-state {
- PIN(IN, gpv6-0, DOWN, LV1);
- PIN(IN, gpv6-1, DOWN, LV1);
- };
-};
-
-&pinctrl_ese {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_ese>;
-
- initial_ese: initial-state {
- PIN(IN, gpj2-0, DOWN, LV1);
- PIN(IN, gpj2-1, DOWN, LV1);
- PIN(IN, gpj2-2, DOWN, LV1);
- };
-};
-
-&pinctrl_fsys {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_fsys>;
-
- initial_fsys: initial-state {
- PIN(IN, gpr3-0, NONE, LV1);
- PIN(IN, gpr3-1, DOWN, LV1);
- PIN(IN, gpr3-2, DOWN, LV1);
- PIN(IN, gpr3-3, DOWN, LV1);
- PIN(IN, gpr3-7, NONE, LV1);
- };
-};
-
-&pinctrl_imem {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_imem>;
-
- initial_imem: initial-state {
- PIN(IN, gpf0-0, UP, LV1);
- PIN(IN, gpf0-1, UP, LV1);
- PIN(IN, gpf0-2, DOWN, LV1);
- PIN(IN, gpf0-3, UP, LV1);
- PIN(IN, gpf0-4, DOWN, LV1);
- PIN(IN, gpf0-5, NONE, LV1);
- PIN(IN, gpf0-6, DOWN, LV1);
- PIN(IN, gpf0-7, UP, LV1);
- };
-};
-
-&pinctrl_nfc {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_nfc>;
-
- initial_nfc: initial-state {
- PIN(IN, gpj0-2, DOWN, LV1);
- };
-};
-
-&pinctrl_peric {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_peric>;
-
- initial_peric: initial-state {
- PIN(IN, gpv7-0, DOWN, LV1);
- PIN(IN, gpv7-1, DOWN, LV1);
- PIN(IN, gpv7-2, NONE, LV1);
- PIN(IN, gpv7-3, DOWN, LV1);
- PIN(IN, gpv7-4, DOWN, LV1);
- PIN(IN, gpv7-5, DOWN, LV1);
-
- PIN(IN, gpb0-4, DOWN, LV1);
-
- PIN(IN, gpc0-2, DOWN, LV1);
- PIN(IN, gpc0-5, DOWN, LV1);
- PIN(IN, gpc0-7, DOWN, LV1);
-
- PIN(IN, gpc1-1, DOWN, LV1);
-
- PIN(IN, gpc3-4, NONE, LV1);
- PIN(IN, gpc3-5, NONE, LV1);
- PIN(IN, gpc3-6, NONE, LV1);
- PIN(IN, gpc3-7, NONE, LV1);
-
- PIN(OUT, gpg0-0, NONE, LV1);
- PIN(FUNC1, gpg0-1, DOWN, LV1);
-
- PIN(IN, gpd2-5, DOWN, LV1);
-
- PIN(IN, gpd4-0, NONE, LV1);
- PIN(IN, gpd4-1, DOWN, LV1);
- PIN(IN, gpd4-2, DOWN, LV1);
- PIN(IN, gpd4-3, DOWN, LV1);
- PIN(IN, gpd4-4, DOWN, LV1);
-
- PIN(IN, gpd6-3, DOWN, LV1);
-
- PIN(IN, gpd8-1, UP, LV1);
-
- PIN(IN, gpg1-0, DOWN, LV1);
- PIN(IN, gpg1-1, DOWN, LV1);
- PIN(IN, gpg1-2, DOWN, LV1);
- PIN(IN, gpg1-3, DOWN, LV1);
- PIN(IN, gpg1-4, DOWN, LV1);
-
- PIN(IN, gpg2-0, DOWN, LV1);
- PIN(IN, gpg2-1, DOWN, LV1);
-
- PIN(IN, gpg3-0, DOWN, LV1);
- PIN(IN, gpg3-1, DOWN, LV1);
- PIN(IN, gpg3-5, DOWN, LV1);
- PIN(IN, gpg3-7, DOWN, LV1);
- };
-};
-
-&pinctrl_touch {
- pinctrl-names = "default";
- pinctrl-0 = <&initial_touch>;
-
- initial_touch: initial-state {
- PIN(IN, gpj1-2, DOWN, LV1);
- };
-};
-
-&pwm {
- pinctrl-0 = <&pwm0_out>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&mic {
- status = "okay";
-
- i80-if-timings {
- };
-};
-
-&pmu_system_controller {
- assigned-clocks = <&pmu_system_controller 0>;
- assigned-clock-parents = <&xxti>;
-};
-
-&serial_1 {
- status = "okay";
-};
-
-&spi_1 {
- cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
- status = "okay";
-
- wm5110: wm5110-codec@0 {
- compatible = "wlf,wm5110";
- reg = <0x0>;
- spi-max-frequency = <20000000>;
- interrupt-parent = <&gpa0>;
- interrupts = <4 IRQ_TYPE_NONE>;
- clocks = <&pmu_system_controller 0>,
- <&s2mps13_osc S2MPS11_CLK_BT>;
- clock-names = "mclk1", "mclk2";
-
- gpio-controller;
- #gpio-cells = <2>;
-
- wlf,micd-detect-debounce = <300>;
- wlf,micd-bias-start-time = <0x1>;
- wlf,micd-rate = <0x7>;
- wlf,micd-dbtime = <0x1>;
- wlf,micd-force-micbias;
- wlf,micd-configs = <0x0 1 0>;
- wlf,hpdet-channel = <1>;
- wlf,gpsw = <0x1>;
- wlf,inmode = <2 0 2 0>;
-
- wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
- wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
-
- /* core supplies */
- AVDD-supply = <&ldo18_reg>;
- DBVDD1-supply = <&ldo18_reg>;
- CPVDD-supply = <&ldo18_reg>;
- DBVDD2-supply = <&ldo18_reg>;
- DBVDD3-supply = <&ldo18_reg>;
-
- controller-data {
- samsung,spi-feedback-delay = <0>;
- };
- };
-};
-
-&timer {
- clock-frequency = <24000000>;
-};
-
-&tmu_atlas0 {
- vtmu-supply = <&ldo3_reg>;
- status = "okay";
-};
-
-&tmu_apollo {
- vtmu-supply = <&ldo3_reg>;
- status = "okay";
-};
-
-&tmu_g3d {
- vtmu-supply = <&ldo3_reg>;
- status = "okay";
-};
-
-&usbdrd30 {
- vdd33-supply = <&ldo10_reg>;
- vdd10-supply = <&ldo6_reg>;
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- dr_mode = "otg";
-};
-
-&usbdrd30_phy {
- vbus-supply = <&safeout1_reg>;
- status = "okay";
-};
-
-&xxti {
- clock-frequency = <24000000>;
-};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
index 1db4e7f..81fdbef 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts
@@ -11,7 +11,7 @@
* published by the Free Software Foundation.
*/
-#include "exynos5433-tm2.dts"
+#include "exynos5433-tm2-common.dtsi"
/ {
model = "Samsung TM2E board";
--
2.7.4
^ permalink raw reply related
* [PATCH 4/4] arm64: dts: exynos: Add tm2 touchkey node
From: Jaechul Lee @ 2017-01-03 7:57 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Krzysztof Kozlowski,
Javier Martinez Canillas
Cc: Jaechul Lee, Andi Shyti, Chanwoo Choi, beomho.seo, galaxyra,
linux-arm-kernel, linux-input, devicetree, linux-kernel,
linux-samsung-soc
In-Reply-To: <1483430237-26823-1-git-send-email-jcsing.lee@samsung.com>
Add DT node support for TM2 touchkey device.
Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
---
arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
index 887a1f1..ef7d21c 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts
@@ -18,3 +18,15 @@
compatible = "samsung,tm2e", "samsung,exynos5433";
};
+&hsi2c_9 {
+ status = "okay";
+
+ touchkey@20 {
+ compatible = "samsung,tm2-touchkey";
+ reg = <0x20>;
+ interrupt-parent = <&gpa3>;
+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+ vcc-supply = <&ldo32_reg>;
+ vdd-supply = <&ldo33_reg>;
+ };
+};
--
2.7.4
^ permalink raw reply related
* Re: [PATCH 3/4] arm64: dts: exynos: make tm2 and tm2e independent from each other
From: Andi Shyti @ 2017-01-03 8:16 UTC (permalink / raw)
To: Jaechul Lee
Cc: Dmitry Torokhov, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Krzysztof Kozlowski,
Javier Martinez Canillas, Chanwoo Choi, beomho.seo, galaxyra,
linux-arm-kernel, linux-input, devicetree, linux-kernel,
linux-samsung-soc
In-Reply-To: <1483430237-26823-4-git-send-email-jcsing.lee@samsung.com>
Hi,
> + compatible = "samsung,tm2e", "samsung,exynos5433";
this is supposed to be "samsung,tm2".
Will wait for other comments and fix it in v2.
Andi
^ permalink raw reply
* Re: [PATCH v2 3/4] ARM64: dts: exynos5433: use macros for pinctrl configuration on Exynos5433
From: Linus Walleij @ 2017-01-03 8:24 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andi Shyti, Chanwoo Choi, Tomasz Figa, Sylwester Nawrocki,
Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
Kukjin Kim, Javier Martinez Canillas, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-samsung-soc,
linux-kernel@vger.kernel.org, stable, Andi Shyti
In-Reply-To: <20161230151724.5wlp4hbphasmw3rg@kozik-lap>
On Fri, Dec 30, 2016 at 4:17 PM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> On Fri, Dec 30, 2016 at 02:32:39PM +0100, Linus Walleij wrote:
>> On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@samsung.com> wrote:
>>
>> > Use the macros defined in include/dt-bindings/pinctrl/samsung.h
>> > instead of hardcoded values.
>> >
>> > Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
>>
>> These look fine, but that this and the other DTS patch through ARM SoC.
>>
>> If you also need the headerfile patch (patch 2) to go through ARM SoC
>> that is fine,
>> I can take it out of pinctrl if you want.
>
> Yes, I need the header. It would be much appreciated if you could
> provide a tag or stable branch with it.
Nah better just merge that patch into the ARM SoC tree only.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
I'll remove it from the pinctrl tree.
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 3/4] arm64: dts: exynos: make tm2 and tm2e independent from each other
From: Krzysztof Kozlowski @ 2017-01-03 8:27 UTC (permalink / raw)
To: Jaechul Lee
Cc: Dmitry Torokhov, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Javier Martinez Canillas, Andi Shyti,
Chanwoo Choi, beomho.seo, galaxyra, linux-arm-kernel, linux-input,
devicetree, linux-kernel, linux-samsung-soc
In-Reply-To: <1483430237-26823-4-git-send-email-jcsing.lee@samsung.com>
On Tue, Jan 3, 2017 at 9:57 AM, Jaechul Lee <jcsing.lee@samsung.com> wrote:
> From: Andi Shyti <andi.shyti@samsung.com>
>
> Currently tm2e dts includes tm2 but there are some differences
> between the two boards and tm2 has some properties that tm2e
> doesn't have.
>
> That's why it's important to keep the two dts files independent
> and put all the commonalities in a tm2-common.dtsi file.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> Signed-off-by: Jaechul Lee <jcsing.lee@samsung.com>
> ---
> .../boot/dts/exynos/exynos5433-tm2-common.dtsi | 1046 ++++++++++++++++++++
> arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 1033 +------------------
> arch/arm64/boot/dts/exynos/exynos5433-tm2e.dts | 2 +-
> 3 files changed, 1049 insertions(+), 1032 deletions(-)
> create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
I would like to see here the rename and diff from it. Not entire delta
(deletions and addons). It is not possible to compare it... I think
git supports it by default with similarity of 50%.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [v2 2/2] MIPS: BMIPS: Add support SPI device nodes
From: Jaedon Shin @ 2017-01-03 8:36 UTC (permalink / raw)
To: Florian Fainelli
Cc: Ralf Baechle, Mark Brown, Kevin Cernekee, Rob Herring,
linux-mips-6z/3iImG2C8G8FEW9MqTrA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-spi-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <09536633-9c81-9621-36af-665369e97a78-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Hi Florian,
> On 1 Jan 2017, at 3:42 AM, Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>
> Hi Jaedon,
>
> On 12/29/2016 10:30 PM, Jaedon Shin wrote:
>> Adds SPI device nodes to BCM7xxx MIPS based SoCs.
>>
>> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
>
>> +
>> +&qspi {
>> + status = "okay";
>> +
>> + m25p80@0 {
>> + compatible = "m25p80";
>> + reg = <0>;
>> + spi-max-frequency = <0x2625a00>;
>
> Sorry for not noticing this earlier, can we have the frequency in a
> decimal form?
I will change to "spi-max-frequency = <40000000>" in v3.
Thanks,
Jaedon
>
> With that fixed, feel free to add:
>
> Reviewed-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>
> Thanks!
> --
> Florian
--
To unsubscribe from this list: send the line "unsubscribe linux-spi" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCHv2 3/8] rtc: add STM32 RTC driver
From: Amelie DELAUNAY @ 2017-01-03 8:42 UTC (permalink / raw)
To: Mathieu Poirier
Cc: Alessandro Zummo, Alexandre Belloni, Rob Herring, Mark Rutland,
Maxime Coquelin, Alexandre TORGUE, Russell King,
rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Gabriel FERNANDEZ
In-Reply-To: <20161216190848.GB8879-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Hi Mathieu,
Thanks for reviewing,
On 12/16/2016 08:08 PM, Mathieu Poirier wrote:
> On Fri, Dec 16, 2016 at 09:50:52AM +0100, Amelie Delaunay wrote:
>> This patch adds support for the STM32 RTC.
>>
>> Signed-off-by: Amelie Delaunay <amelie.delaunay-qxv4g6HH51o@public.gmane.org>
>> ---
>> drivers/rtc/Kconfig | 11 +
>> drivers/rtc/Makefile | 1 +
>> drivers/rtc/rtc-stm32.c | 776 ++++++++++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 788 insertions(+)
>> create mode 100644 drivers/rtc/rtc-stm32.c
>>
>> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
>> index e859d14..11eb28a 100644
>> --- a/drivers/rtc/Kconfig
>> +++ b/drivers/rtc/Kconfig
>> @@ -1706,6 +1706,17 @@ config RTC_DRV_PIC32
>> This driver can also be built as a module. If so, the module
>> will be called rtc-pic32
>>
>> +config RTC_DRV_STM32
>> + tristate "STM32 RTC"
>> + select REGMAP_MMIO
>> + depends on ARCH_STM32 || COMPILE_TEST
>> + help
>> + If you say yes here you get support for the STM32 On-Chip
>> + Real Time Clock.
>> +
>> + This driver can also be built as a module, if so, the module
>> + will be called "rtc-stm32".
>> +
>> comment "HID Sensor RTC drivers"
>>
>> config RTC_DRV_HID_SENSOR_TIME
>> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
>> index 1ac694a..87bd9cc 100644
>> --- a/drivers/rtc/Makefile
>> +++ b/drivers/rtc/Makefile
>> @@ -144,6 +144,7 @@ obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o
>> obj-$(CONFIG_RTC_DRV_SPEAR) += rtc-spear.o
>> obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o
>> obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o
>> +obj-$(CONFIG_RTC_DRV_STM32) += rtc-stm32.o
>> obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o
>> obj-$(CONFIG_RTC_DRV_ST_LPC) += rtc-st-lpc.o
>> obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o
>> diff --git a/drivers/rtc/rtc-stm32.c b/drivers/rtc/rtc-stm32.c
>> new file mode 100644
>> index 0000000..6ce0f5a
>> --- /dev/null
>> +++ b/drivers/rtc/rtc-stm32.c
>> @@ -0,0 +1,776 @@
>> +/*
>> + * Copyright (C) Amelie Delaunay 2016
>> + * Author: Amelie Delaunay <amelie.delaunay-qxv4g6HH51o@public.gmane.org>
>> + * License terms: GNU General Public License (GPL), version 2
>> + */
>> +
>> +#include <linux/bcd.h>
>> +#include <linux/clk.h>
>> +#include <linux/iopoll.h>
>> +#include <linux/ioport.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/module.h>
>> +#include <linux/of_device.h>
>> +#include <linux/regmap.h>
>> +#include <linux/rtc.h>
>> +#include <linux/spinlock.h>
>> +
>> +#define DRIVER_NAME "stm32_rtc"
>> +
>> +/* STM32 RTC registers */
>> +#define STM32_RTC_TR 0x00
>> +#define STM32_RTC_DR 0x04
>> +#define STM32_RTC_CR 0x08
>> +#define STM32_RTC_ISR 0x0C
>> +#define STM32_RTC_PRER 0x10
>> +#define STM32_RTC_ALRMAR 0x1C
>> +#define STM32_RTC_WPR 0x24
>> +
>> +/* STM32_RTC_TR bit fields */
>> +#define STM32_RTC_TR_SEC_SHIFT 0
>> +#define STM32_RTC_TR_SEC GENMASK(6, 0)
>> +#define STM32_RTC_TR_MIN_SHIFT 8
>> +#define STM32_RTC_TR_MIN GENMASK(14, 8)
>> +#define STM32_RTC_TR_HOUR_SHIFT 16
>> +#define STM32_RTC_TR_HOUR GENMASK(21, 16)
>> +
>> +/* STM32_RTC_DR bit fields */
>> +#define STM32_RTC_DR_DATE_SHIFT 0
>> +#define STM32_RTC_DR_DATE GENMASK(5, 0)
>> +#define STM32_RTC_DR_MONTH_SHIFT 8
>> +#define STM32_RTC_DR_MONTH GENMASK(12, 8)
>> +#define STM32_RTC_DR_WDAY_SHIFT 13
>> +#define STM32_RTC_DR_WDAY GENMASK(15, 13)
>> +#define STM32_RTC_DR_YEAR_SHIFT 16
>> +#define STM32_RTC_DR_YEAR GENMASK(23, 16)
>> +
>> +/* STM32_RTC_CR bit fields */
>> +#define STM32_RTC_CR_FMT BIT(6)
>> +#define STM32_RTC_CR_ALRAE BIT(8)
>> +#define STM32_RTC_CR_ALRAIE BIT(12)
>> +
>> +/* STM32_RTC_ISR bit fields */
>> +#define STM32_RTC_ISR_ALRAWF BIT(0)
>> +#define STM32_RTC_ISR_INITS BIT(4)
>> +#define STM32_RTC_ISR_RSF BIT(5)
>> +#define STM32_RTC_ISR_INITF BIT(6)
>> +#define STM32_RTC_ISR_INIT BIT(7)
>> +#define STM32_RTC_ISR_ALRAF BIT(8)
>> +
>> +/* STM32_RTC_PRER bit fields */
>> +#define STM32_RTC_PRER_PRED_S_SHIFT 0
>> +#define STM32_RTC_PRER_PRED_S GENMASK(14, 0)
>> +#define STM32_RTC_PRER_PRED_A_SHIFT 16
>> +#define STM32_RTC_PRER_PRED_A GENMASK(22, 16)
>> +
>> +/* STM32_RTC_ALRMAR and STM32_RTC_ALRMBR bit fields */
>> +#define STM32_RTC_ALRMXR_SEC_SHIFT 0
>> +#define STM32_RTC_ALRMXR_SEC GENMASK(6, 0)
>> +#define STM32_RTC_ALRMXR_SEC_MASK BIT(7)
>> +#define STM32_RTC_ALRMXR_MIN_SHIFT 8
>> +#define STM32_RTC_ALRMXR_MIN GENMASK(14, 8)
>> +#define STM32_RTC_ALRMXR_MIN_MASK BIT(15)
>> +#define STM32_RTC_ALRMXR_HOUR_SHIFT 16
>> +#define STM32_RTC_ALRMXR_HOUR GENMASK(21, 16)
>> +#define STM32_RTC_ALRMXR_PM BIT(22)
>> +#define STM32_RTC_ALRMXR_HOUR_MASK BIT(23)
>> +#define STM32_RTC_ALRMXR_DATE_SHIFT 24
>> +#define STM32_RTC_ALRMXR_DATE GENMASK(29, 24)
>> +#define STM32_RTC_ALRMXR_WDSEL BIT(30)
>> +#define STM32_RTC_ALRMXR_WDAY_SHIFT 24
>> +#define STM32_RTC_ALRMXR_WDAY GENMASK(27, 24)
>> +#define STM32_RTC_ALRMXR_DATE_MASK BIT(31)
>> +
>> +/* STM32_RTC_WPR key constants */
>> +#define RTC_WPR_1ST_KEY 0xCA
>> +#define RTC_WPR_2ND_KEY 0x53
>> +#define RTC_WPR_WRONG_KEY 0xFF
>> +
>> +/*
>> + * RTC registers are protected agains parasitic write access.
>> + * PWR_CR_DBP bit must be set to enable write access to RTC registers.
>> + */
>> +/* STM32_PWR_CR */
>> +#define PWR_CR 0x00
>> +/* STM32_PWR_CR bit field */
>> +#define PWR_CR_DBP BIT(8)
>> +
>> +static struct regmap *dbp;
>> +
>> +struct stm32_rtc {
>> + struct rtc_device *rtc_dev;
>> + void __iomem *base;
>> + struct clk *ck_rtc;
>> + spinlock_t lock; /* Protects registers accesses */
>> + int irq_alarm;
>> +};
>> +
>> +static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
>> +{
>> + writel_relaxed(RTC_WPR_1ST_KEY, rtc->base + STM32_RTC_WPR);
>> + writel_relaxed(RTC_WPR_2ND_KEY, rtc->base + STM32_RTC_WPR);
>> +}
>> +
>> +static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc)
>> +{
>> + writel_relaxed(RTC_WPR_WRONG_KEY, rtc->base + STM32_RTC_WPR);
>> +}
>> +
>> +static int stm32_rtc_enter_init_mode(struct stm32_rtc *rtc)
>> +{
>> + unsigned int isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
>> +
>> + if (!(isr & STM32_RTC_ISR_INITF)) {
>> + isr |= STM32_RTC_ISR_INIT;
>> + writel_relaxed(isr, rtc->base + STM32_RTC_ISR);
>> +
>> + /*
>> + * It takes around 2 ck_rtc clock cycles to enter in
>> + * initialization phase mode (and have INITF flag set). As
>> + * slowest ck_rtc frequency may be 32kHz and highest should be
>> + * 1MHz, we poll every 10 us with a timeout of 100ms.
>> + */
>> + return readl_relaxed_poll_timeout_atomic(
>> + rtc->base + STM32_RTC_ISR,
>> + isr, (isr & STM32_RTC_ISR_INITF),
>> + 10, 100000);
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static void stm32_rtc_exit_init_mode(struct stm32_rtc *rtc)
>> +{
>> + unsigned int isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
>> +
>> + isr &= ~STM32_RTC_ISR_INIT;
>> + writel_relaxed(isr, rtc->base + STM32_RTC_ISR);
>> +}
>> +
>> +static int stm32_rtc_wait_sync(struct stm32_rtc *rtc)
>> +{
>> + unsigned int isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
>> +
>> + isr &= ~STM32_RTC_ISR_RSF;
>> + writel_relaxed(isr, rtc->base + STM32_RTC_ISR);
>> +
>> + /*
>> + * Wait for RSF to be set to ensure the calendar registers are
>> + * synchronised, it takes around 2 ck_rtc clock cycles
>> + */
>> + return readl_relaxed_poll_timeout_atomic(rtc->base + STM32_RTC_ISR,
>> + isr,
>> + (isr & STM32_RTC_ISR_RSF),
>> + 10, 100000);
>> +}
>> +
>> +static irqreturn_t stm32_rtc_alarm_irq(int irq, void *dev_id)
>> +{
>> + struct stm32_rtc *rtc = (struct stm32_rtc *)dev_id;
>> + unsigned int isr, cr;
>> +
>> + mutex_lock(&rtc->rtc_dev->ops_lock);
>> +
>> + isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
>> + cr = readl_relaxed(rtc->base + STM32_RTC_CR);
>> +
>> + if ((isr & STM32_RTC_ISR_ALRAF) &&
>> + (cr & STM32_RTC_CR_ALRAIE)) {
>> + /* Alarm A flag - Alarm interrupt */
>> + dev_dbg(&rtc->rtc_dev->dev, "Alarm occurred\n");
>> +
>> + /* Pass event to the kernel */
>> + rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
>> +
>> + /* Clear event flag, otherwise new events won't be received */
>> + writel_relaxed(isr & ~STM32_RTC_ISR_ALRAF,
>> + rtc->base + STM32_RTC_ISR);
>> + }
>> +
>> + mutex_unlock(&rtc->rtc_dev->ops_lock);
>> +
>> + return IRQ_HANDLED;
>> +}
>> +
>> +/* Convert rtc_time structure from bin to bcd format */
>> +static void tm2bcd(struct rtc_time *tm)
>> +{
>> + tm->tm_sec = bin2bcd(tm->tm_sec);
>> + tm->tm_min = bin2bcd(tm->tm_min);
>> + tm->tm_hour = bin2bcd(tm->tm_hour);
>> +
>> + tm->tm_mday = bin2bcd(tm->tm_mday);
>> + tm->tm_mon = bin2bcd(tm->tm_mon + 1);
>> + tm->tm_year = bin2bcd(tm->tm_year - 100);
>> + /*
>> + * Number of days since Sunday
>> + * - on kernel side, 0=Sunday...6=Saturday
>> + * - on rtc side, 0=invalid,1=Monday...7=Sunday
>> + */
>> + tm->tm_wday = (!tm->tm_wday) ? 7 : tm->tm_wday;
>> +}
>> +
>> +/* Convert rtc_time structure from bcd to bin format */
>> +static void bcd2tm(struct rtc_time *tm)
>> +{
>> + tm->tm_sec = bcd2bin(tm->tm_sec);
>> + tm->tm_min = bcd2bin(tm->tm_min);
>> + tm->tm_hour = bcd2bin(tm->tm_hour);
>> +
>> + tm->tm_mday = bcd2bin(tm->tm_mday);
>> + tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
>> + tm->tm_year = bcd2bin(tm->tm_year) + 100;
>> + /*
>> + * Number of days since Sunday
>> + * - on kernel side, 0=Sunday...6=Saturday
>> + * - on rtc side, 0=invalid,1=Monday...7=Sunday
>> + */
>> + tm->tm_wday %= 7;
>> +}
>> +
>> +static int stm32_rtc_read_time(struct device *dev, struct rtc_time *tm)
>> +{
>> + struct stm32_rtc *rtc = dev_get_drvdata(dev);
>> + unsigned int tr, dr;
>> + unsigned long irqflags;
>> +
>> + spin_lock_irqsave(&rtc->lock, irqflags);
>> +
>> + /* Time and Date in BCD format */
>> + tr = readl_relaxed(rtc->base + STM32_RTC_TR);
>> + dr = readl_relaxed(rtc->base + STM32_RTC_DR);
>> +
>> + spin_unlock_irqrestore(&rtc->lock, irqflags);
>> +
>> + tm->tm_sec = (tr & STM32_RTC_TR_SEC) >> STM32_RTC_TR_SEC_SHIFT;
>> + tm->tm_min = (tr & STM32_RTC_TR_MIN) >> STM32_RTC_TR_MIN_SHIFT;
>> + tm->tm_hour = (tr & STM32_RTC_TR_HOUR) >> STM32_RTC_TR_HOUR_SHIFT;
>> +
>> + tm->tm_mday = (dr & STM32_RTC_DR_DATE) >> STM32_RTC_DR_DATE_SHIFT;
>> + tm->tm_mon = (dr & STM32_RTC_DR_MONTH) >> STM32_RTC_DR_MONTH_SHIFT;
>> + tm->tm_year = (dr & STM32_RTC_DR_YEAR) >> STM32_RTC_DR_YEAR_SHIFT;
>> + tm->tm_wday = (dr & STM32_RTC_DR_WDAY) >> STM32_RTC_DR_WDAY_SHIFT;
>> +
>> + /* We don't report tm_yday and tm_isdst */
>> +
>> + bcd2tm(tm);
>> +
>> + if (rtc_valid_tm(tm) < 0) {
>> + dev_err(dev, "%s: rtc_time is not valid.\n", __func__);
>> + return -EINVAL;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static int stm32_rtc_set_time(struct device *dev, struct rtc_time *tm)
>> +{
>> + struct stm32_rtc *rtc = dev_get_drvdata(dev);
>> + unsigned int tr, dr;
>> + unsigned long irqflags;
>> + int ret = 0;
>> +
>> + if (rtc_valid_tm(tm) < 0) {
>> + dev_err(dev, "%s: rtc_time is not valid.\n", __func__);
>> + return -EINVAL;
>> + }
>> +
>> + tm2bcd(tm);
>> +
>> + /* Time in BCD format */
>> + tr = ((tm->tm_sec << STM32_RTC_TR_SEC_SHIFT) & STM32_RTC_TR_SEC) |
>> + ((tm->tm_min << STM32_RTC_TR_MIN_SHIFT) & STM32_RTC_TR_MIN) |
>> + ((tm->tm_hour << STM32_RTC_TR_HOUR_SHIFT) & STM32_RTC_TR_HOUR);
>> +
>> + /* Date in BCD format */
>> + dr = ((tm->tm_mday << STM32_RTC_DR_DATE_SHIFT) & STM32_RTC_DR_DATE) |
>> + ((tm->tm_mon << STM32_RTC_DR_MONTH_SHIFT) & STM32_RTC_DR_MONTH) |
>> + ((tm->tm_year << STM32_RTC_DR_YEAR_SHIFT) & STM32_RTC_DR_YEAR) |
>> + ((tm->tm_wday << STM32_RTC_DR_WDAY_SHIFT) & STM32_RTC_DR_WDAY);
>> +
>> + spin_lock_irqsave(&rtc->lock, irqflags);
>> +
>> + stm32_rtc_wpr_unlock(rtc);
>> +
>> + ret = stm32_rtc_enter_init_mode(rtc);
>> + if (ret) {
>> + dev_err(dev, "Can't enter in init mode. Set time aborted.\n");
>> + goto end;
>> + }
>> +
>> + writel_relaxed(tr, rtc->base + STM32_RTC_TR);
>> + writel_relaxed(dr, rtc->base + STM32_RTC_DR);
>> +
>> + stm32_rtc_exit_init_mode(rtc);
>> +
>> + ret = stm32_rtc_wait_sync(rtc);
>> +end:
>> + stm32_rtc_wpr_lock(rtc);
>> +
>> + spin_unlock_irqrestore(&rtc->lock, irqflags);
>> +
>> + return ret;
>> +}
>> +
>> +static int stm32_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
>> +{
>> + struct stm32_rtc *rtc = dev_get_drvdata(dev);
>> + struct rtc_time *tm = &alrm->time;
>> + unsigned int alrmar, cr, isr;
>> + unsigned long irqflags;
>> +
>> + spin_lock_irqsave(&rtc->lock, irqflags);
>> +
>> + alrmar = readl_relaxed(rtc->base + STM32_RTC_ALRMAR);
>> + cr = readl_relaxed(rtc->base + STM32_RTC_CR);
>> + isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
>> +
>> + spin_unlock_irqrestore(&rtc->lock, irqflags);
>> +
>> + if (alrmar & STM32_RTC_ALRMXR_DATE_MASK) {
>> + /*
>> + * Date/day doesn't matter in Alarm comparison so alarm
>> + * triggers every day
>> + */
>> + tm->tm_mday = -1;
>> + tm->tm_wday = -1;
>> + } else {
>> + if (alrmar & STM32_RTC_ALRMXR_WDSEL) {
>> + /* Alarm is set to a day of week */
>> + tm->tm_mday = -1;
>> + tm->tm_wday = (alrmar & STM32_RTC_ALRMXR_WDAY) >>
>> + STM32_RTC_ALRMXR_WDAY_SHIFT;
>> + tm->tm_wday %= 7;
>> + } else {
>> + /* Alarm is set to a day of month */
>> + tm->tm_wday = -1;
>> + tm->tm_mday = (alrmar & STM32_RTC_ALRMXR_DATE) >>
>> + STM32_RTC_ALRMXR_DATE_SHIFT;
>> + }
>> + }
>> +
>> + if (alrmar & STM32_RTC_ALRMXR_HOUR_MASK) {
>> + /* Hours don't matter in Alarm comparison */
>> + tm->tm_hour = -1;
>> + } else {
>> + tm->tm_hour = (alrmar & STM32_RTC_ALRMXR_HOUR) >>
>> + STM32_RTC_ALRMXR_HOUR_SHIFT;
>> + if (alrmar & STM32_RTC_ALRMXR_PM)
>> + tm->tm_hour += 12;
>> + }
>> +
>> + if (alrmar & STM32_RTC_ALRMXR_MIN_MASK) {
>> + /* Minutes don't matter in Alarm comparison */
>> + tm->tm_min = -1;
>> + } else {
>> + tm->tm_min = (alrmar & STM32_RTC_ALRMXR_MIN) >>
>> + STM32_RTC_ALRMXR_MIN_SHIFT;
>> + }
>> +
>> + if (alrmar & STM32_RTC_ALRMXR_SEC_MASK) {
>> + /* Seconds don't matter in Alarm comparison */
>> + tm->tm_sec = -1;
>> + } else {
>> + tm->tm_sec = (alrmar & STM32_RTC_ALRMXR_SEC) >>
>> + STM32_RTC_ALRMXR_SEC_SHIFT;
>> + }
>> +
>> + bcd2tm(tm);
>> +
>> + alrm->enabled = (cr & STM32_RTC_CR_ALRAE) ? 1 : 0;
>> + alrm->pending = (isr & STM32_RTC_ISR_ALRAF) ? 1 : 0;
>> +
>> + return 0;
>> +}
>> +
>> +static int stm32_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
>> +{
>> + struct stm32_rtc *rtc = dev_get_drvdata(dev);
>> + unsigned long irqflags;
>> + unsigned int isr, cr;
>> +
>> + spin_lock_irqsave(&rtc->lock, irqflags);
>> +
>> + cr = readl_relaxed(rtc->base + STM32_RTC_CR);
>> +
>> + stm32_rtc_wpr_unlock(rtc);
>> +
>> + /* We expose Alarm A to the kernel */
>> + if (enabled)
>> + cr |= (STM32_RTC_CR_ALRAIE | STM32_RTC_CR_ALRAE);
>> + else
>> + cr &= ~(STM32_RTC_CR_ALRAIE | STM32_RTC_CR_ALRAE);
>> + writel_relaxed(cr, rtc->base + STM32_RTC_CR);
>> +
>> + /* Clear event irqflags, otherwise new events won't be received */
>> + isr = readl_relaxed(rtc->base + STM32_RTC_ISR);
>> + isr &= ~STM32_RTC_ISR_ALRAF;
>> + writel_relaxed(isr, rtc->base + STM32_RTC_ISR);
>> +
>> + stm32_rtc_wpr_lock(rtc);
>> +
>> + spin_unlock_irqrestore(&rtc->lock, irqflags);
>> +
>> + return 0;
>> +}
>> +
>> +static int stm32_rtc_valid_alrm(struct stm32_rtc *rtc, struct rtc_time *tm)
>> +{
>> + unsigned int cur_day, cur_mon, cur_year, cur_hour, cur_min, cur_sec;
>> + unsigned int dr = readl_relaxed(rtc->base + STM32_RTC_DR);
>> + unsigned int tr = readl_relaxed(rtc->base + STM32_RTC_TR);
>> +
>> + cur_day = (dr & STM32_RTC_DR_DATE) >> STM32_RTC_DR_DATE_SHIFT;
>> + cur_mon = (dr & STM32_RTC_DR_MONTH) >> STM32_RTC_DR_MONTH_SHIFT;
>> + cur_year = (dr & STM32_RTC_DR_YEAR) >> STM32_RTC_DR_YEAR_SHIFT;
>> + cur_sec = (tr & STM32_RTC_TR_SEC) >> STM32_RTC_TR_SEC_SHIFT;
>> + cur_min = (tr & STM32_RTC_TR_MIN) >> STM32_RTC_TR_MIN_SHIFT;
>> + cur_hour = (tr & STM32_RTC_TR_HOUR) >> STM32_RTC_TR_HOUR_SHIFT;
>> +
>> + /*
>> + * Assuming current date is M-D-Y H:M:S.
>> + * RTC alarm can't be set on a specific month and year.
>> + * So the valid alarm range is:
>> + * M-D-Y H:M:S < alarm <= (M+1)-D-Y H:M:S
>> + * with a specific case for December...
>> + */
>> + if ((((tm->tm_year > cur_year) &&
>> + (tm->tm_mon == 0x1) && (cur_mon == 0x12)) ||
>> + ((tm->tm_year == cur_year) &&
>> + (tm->tm_mon <= cur_mon + 1))) &&
>> + ((tm->tm_mday < cur_day) ||
>> + ((tm->tm_mday == cur_day) &&
>> + ((tm->tm_hour < cur_hour) ||
>> + ((tm->tm_hour == cur_hour) && (tm->tm_min < cur_min)) ||
>> + ((tm->tm_hour == cur_hour) && (tm->tm_min == cur_min) &&
>> + (tm->tm_sec <= cur_sec))))))
>> + return 0;
>> +
>> + return -EINVAL;
>> +}
>> +
>> +static int stm32_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
>> +{
>> + struct stm32_rtc *rtc = dev_get_drvdata(dev);
>> + struct rtc_time *tm = &alrm->time;
>> + unsigned long irqflags;
>> + unsigned int cr, isr, alrmar;
>> + int ret = 0;
>> +
>> + if (rtc_valid_tm(tm)) {
>> + dev_err(dev, "Alarm time not valid.\n");
>> + return -EINVAL;
>> + }
>> +
>> + tm2bcd(tm);
>> +
>> + /*
>> + * RTC alarm can't be set on a specific date, unless this date is
>> + * up to the same day of month next month.
>> + */
>> + if (stm32_rtc_valid_alrm(rtc, tm) < 0) {
>> + dev_err(dev, "Alarm can be set only on upcoming month.\n");
>> + return -EINVAL;
>> + }
>> +
>> + spin_lock_irqsave(&rtc->lock, irqflags);
>> +
>> + stm32_rtc_wpr_unlock(rtc);
>> +
>> + /* Disable Alarm */
>> + cr = readl_relaxed(rtc->base + STM32_RTC_CR);
>> + cr &= ~STM32_RTC_CR_ALRAE;
>> + writel_relaxed(cr, rtc->base + STM32_RTC_CR);
>> +
>> + /*
>> + * Poll Alarm write flag to be sure that Alarm update is allowed: it
>> + * takes around 2 ck_rtc clock cycles
>> + */
>> + ret = readl_relaxed_poll_timeout_atomic(rtc->base + STM32_RTC_ISR,
>> + isr,
>> + (isr & STM32_RTC_ISR_ALRAWF),
>> + 10, 100000);
>> +
>> + if (ret) {
>> + dev_err(dev, "Alarm update not allowed\n");
>> + goto end;
>> + }
>> +
>> + alrmar = 0;
>> + /* tm_year and tm_mon are not used because not supported by RTC */
>> + alrmar |= (tm->tm_mday << STM32_RTC_ALRMXR_DATE_SHIFT) &
>> + STM32_RTC_ALRMXR_DATE;
>> + /* 24-hour format */
>> + alrmar &= ~STM32_RTC_ALRMXR_PM;
>> + alrmar |= (tm->tm_hour << STM32_RTC_ALRMXR_HOUR_SHIFT) &
>> + STM32_RTC_ALRMXR_HOUR;
>> + alrmar |= (tm->tm_min << STM32_RTC_ALRMXR_MIN_SHIFT) &
>> + STM32_RTC_ALRMXR_MIN;
>> + alrmar |= (tm->tm_sec << STM32_RTC_ALRMXR_SEC_SHIFT) &
>> + STM32_RTC_ALRMXR_SEC;
>
> All this work on alrmar is done while the spinlock is held. If I'm not
> mistaking nothing prevents you from doing that processing before taking the
> spinlock.
>
Yes, I'll move alrmar processing above, just before taking the spinlock.
>> +
>> + /* Write to Alarm register */
>> + writel_relaxed(alrmar, rtc->base + STM32_RTC_ALRMAR);
>> +
>> + if (alrm->enabled)
>> + stm32_rtc_alarm_irq_enable(dev, 1);
>> + else
>> + stm32_rtc_alarm_irq_enable(dev, 0);
>> +
>> +end:
>> + stm32_rtc_wpr_lock(rtc);
>> +
>> + spin_unlock_irqrestore(&rtc->lock, irqflags);
>> +
>> + return ret;
>> +}
>> +
>> +static const struct rtc_class_ops stm32_rtc_ops = {
>> + .read_time = stm32_rtc_read_time,
>> + .set_time = stm32_rtc_set_time,
>> + .read_alarm = stm32_rtc_read_alarm,
>> + .set_alarm = stm32_rtc_set_alarm,
>> + .alarm_irq_enable = stm32_rtc_alarm_irq_enable,
>> +};
>> +
>> +#ifdef CONFIG_OF
>> +static const struct of_device_id stm32_rtc_of_match[] = {
>> + { .compatible = "st,stm32-rtc" },
>> + {}
>> +};
>> +MODULE_DEVICE_TABLE(of, stm32_rtc_of_match);
>> +#endif
>> +
>> +static int stm32_rtc_init(struct platform_device *pdev,
>> + struct stm32_rtc *rtc)
>> +{
>> + unsigned int prer, pred_a, pred_s, pred_a_max, pred_s_max, cr;
>> + unsigned int rate;
>> + unsigned long irqflags;
>> + int ret = 0;
>> +
>> + rate = clk_get_rate(rtc->ck_rtc);
>> +
>> + /* Find prediv_a and prediv_s to obtain the 1Hz calendar clock */
>> + pred_a_max = STM32_RTC_PRER_PRED_A >> STM32_RTC_PRER_PRED_A_SHIFT;
>> + pred_s_max = STM32_RTC_PRER_PRED_S >> STM32_RTC_PRER_PRED_S_SHIFT;
>> +
>> + for (pred_a = pred_a_max; pred_a >= 0; pred_a--) {
>> + pred_s = (rate / (pred_a + 1)) - 1;
>> +
>> + if (((pred_s + 1) * (pred_a + 1)) == rate)
>> + break;
>> + }
>> +
>> + /*
>> + * Can't find a 1Hz, so give priority to RTC power consumption
>> + * by choosing the higher possible value for prediv_a
>> + */
>> + if ((pred_s > pred_s_max) || (pred_a > pred_a_max)) {
>> + pred_a = pred_a_max;
>> + pred_s = (rate / (pred_a + 1)) - 1;
>> +
>> + dev_warn(&pdev->dev, "ck_rtc is %s\n",
>> + (rate - ((pred_a + 1) * (pred_s + 1)) < 0) ?
>> + "fast" : "slow");
>> + }
>> +
>> + spin_lock_irqsave(&rtc->lock, irqflags);
>> +
>> + stm32_rtc_wpr_unlock(rtc);
>> +
>> + ret = stm32_rtc_enter_init_mode(rtc);
>> + if (ret) {
>> + dev_err(&pdev->dev,
>> + "Can't enter in init mode. Prescaler config failed.\n");
>> + goto end;
>> + }
>> +
>> + prer = (pred_s << STM32_RTC_PRER_PRED_S_SHIFT) & STM32_RTC_PRER_PRED_S;
>> + writel_relaxed(prer, rtc->base + STM32_RTC_PRER);
>> + prer |= (pred_a << STM32_RTC_PRER_PRED_A_SHIFT) & STM32_RTC_PRER_PRED_A;
>> + writel_relaxed(prer, rtc->base + STM32_RTC_PRER);
>> +
>> + /* Force 24h time format */
>> + cr = readl_relaxed(rtc->base + STM32_RTC_CR);
>> + cr &= ~STM32_RTC_CR_FMT;
>> + writel_relaxed(cr, rtc->base + STM32_RTC_CR);
>> +
>> + stm32_rtc_exit_init_mode(rtc);
>> +
>> + ret = stm32_rtc_wait_sync(rtc);
>> +end:
>> + stm32_rtc_wpr_lock(rtc);
>> +
>> + spin_unlock_irqrestore(&rtc->lock, irqflags);
>> +
>> + return ret;
>> +}
>> +
>> +static int stm32_rtc_probe(struct platform_device *pdev)
>> +{
>> + struct stm32_rtc *rtc;
>> + struct resource *res;
>> + int ret;
>> +
>> + rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
>> + if (!rtc)
>> + return -ENOMEM;
>> +
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + rtc->base = devm_ioremap_resource(&pdev->dev, res);
>> + if (IS_ERR(rtc->base))
>> + return PTR_ERR(rtc->base);
>> +
>> + dbp = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "st,syscfg");
>> + if (IS_ERR(dbp)) {
>> + dev_err(&pdev->dev, "no st,syscfg\n");
>> + return PTR_ERR(dbp);
>> + }
>> +
>> + spin_lock_init(&rtc->lock);
>> +
>> + rtc->ck_rtc = devm_clk_get(&pdev->dev, NULL);
>> + if (IS_ERR(rtc->ck_rtc)) {
>> + dev_err(&pdev->dev, "no ck_rtc clock");
>> + return PTR_ERR(rtc->ck_rtc);
>> + }
>> +
>> + ret = clk_prepare_enable(rtc->ck_rtc);
>> + if (ret)
>> + return ret;
>> +
>> + regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, PWR_CR_DBP);
>> +
>> + /*
>> + * After a system reset, RTC_ISR.INITS flag can be read to check if
>> + * the calendar has been initalized or not. INITS flag is reset by a
>> + * power-on reset (no vbat, no power-supply). It is not reset if
>> + * ck_rtc parent clock has changed (so RTC prescalers need to be
>> + * changed). That's why we cannot rely on this flag to know if RTC
>> + * init has to be done.
>> + */
>> + ret = stm32_rtc_init(pdev, rtc);
>> + if (ret)
>> + goto err;
>> +
>> + rtc->irq_alarm = platform_get_irq(pdev, 0);
>> + if (rtc->irq_alarm <= 0) {
>> + dev_err(&pdev->dev, "no alarm irq\n");
>> + ret = -ENOENT;
>
> Function platform_get_irq() returns a wealth of error codes that are lost here.
> Doing 'ret = rtc->irq_alarm;' would prevent that from happening.
>
OK
>> + goto err;
>> + }
>> +
>> + platform_set_drvdata(pdev, rtc);
>> +
>> + ret = device_init_wakeup(&pdev->dev, true);
>> + if (ret)
>> + dev_warn(&pdev->dev,
>> + "alarm won't be able to wake up the system");
>> +
>> + rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
>> + &stm32_rtc_ops, THIS_MODULE);
>> + if (IS_ERR(rtc->rtc_dev)) {
>> + ret = PTR_ERR(rtc->rtc_dev);
>> + dev_err(&pdev->dev, "rtc device registration failed, err=%d\n",
>> + ret);
>> + goto err;
>> + }
>> +
>> + /* Handle RTC alarm interrupts */
>> + ret = devm_request_threaded_irq(&pdev->dev, rtc->irq_alarm, NULL,
>> + stm32_rtc_alarm_irq,
>> + IRQF_TRIGGER_RISING | IRQF_ONESHOT,
>> + pdev->name, rtc);
>> + if (ret) {
>> + dev_err(&pdev->dev, "IRQ%d (alarm interrupt) already claimed\n",
>> + rtc->irq_alarm);
>> + goto err;
>> + }
>> +
>> + /*
>> + * If INITS flag is reset (calendar year field set to 0x00), calendar
>> + * must be initialized
>> + */
>> + if (!(readl_relaxed(rtc->base + STM32_RTC_ISR) & STM32_RTC_ISR_INITS))
>> + dev_warn(&pdev->dev, "Date/Time must be initialized\n");
>> +
>> + return 0;
>> +err:
>> + clk_disable_unprepare(rtc->ck_rtc);
>> +
>> + regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, ~PWR_CR_DBP);
>> +
>> + device_init_wakeup(&pdev->dev, false);
>> +
>> + return ret;
>> +}
>> +
>> +static int __exit stm32_rtc_remove(struct platform_device *pdev)
>> +{
>> + struct stm32_rtc *rtc = platform_get_drvdata(pdev);
>> + unsigned int cr;
>> +
>> + /* Disable interrupts */
>> + stm32_rtc_wpr_unlock(rtc);
>> + cr = readl_relaxed(rtc->base + STM32_RTC_CR);
>> + cr &= ~STM32_RTC_CR_ALRAIE;
>> + writel_relaxed(cr, rtc->base + STM32_RTC_CR);
>> + stm32_rtc_wpr_lock(rtc);
>> +
>> + clk_disable_unprepare(rtc->ck_rtc);
>> +
>> + /* Enable backup domain write protection */
>> + regmap_update_bits(dbp, PWR_CR, PWR_CR_DBP, ~PWR_CR_DBP);
>> +
>> + device_init_wakeup(&pdev->dev, false);
>> +
>> + return 0;
>> +}
>> +
>> +#ifdef CONFIG_PM_SLEEP
>> +static int stm32_rtc_suspend(struct device *dev)
>> +{
>> + struct stm32_rtc *rtc = dev_get_drvdata(dev);
>> +
>> + if (device_may_wakeup(dev))
>> + return enable_irq_wake(rtc->irq_alarm);
>> +
>> + return 0;
>> +}
>> +
>> +static int stm32_rtc_resume(struct device *dev)
>> +{
>> + struct stm32_rtc *rtc = dev_get_drvdata(dev);
>> + int ret = 0;
>> +
>> + ret = stm32_rtc_wait_sync(rtc);
>> + if (ret < 0)
>> + return ret;
>> +
>> + if (device_may_wakeup(dev))
>> + return disable_irq_wake(rtc->irq_alarm);
>> +
>> + return ret;
>> +}
>> +#endif
>> +
>> +static SIMPLE_DEV_PM_OPS(stm32_rtc_pm_ops,
>> + stm32_rtc_suspend, stm32_rtc_resume);
>> +
>> +static struct platform_driver stm32_rtc_driver = {
>> + .probe = stm32_rtc_probe,
>> + .remove = stm32_rtc_remove,
>> + .driver = {
>> + .name = DRIVER_NAME,
>> + .pm = &stm32_rtc_pm_ops,
>> + .of_match_table = stm32_rtc_of_match,
>> + },
>> +};
>> +
>> +module_platform_driver(stm32_rtc_driver);
>> +
>> +MODULE_ALIAS("platform:" DRIVER_NAME);
>> +MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay-qxv4g6HH51o@public.gmane.org>");
>> +MODULE_DESCRIPTION("STMicroelectronics STM32 Real Time Clock driver");
>> +MODULE_LICENSE("GPL v2");
>> --
>> 1.9.1
>>
Happy New Year!
Amelie
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^ permalink raw reply
* [PATCH v2] Fix CMD6 timeout issue
From: Yong Mao @ 2017-01-03 8:49 UTC (permalink / raw)
To: Ulf Hansson
Cc: Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
Matthias Brugger, Chunfeng Yun, Eddie Huang, Greg Kroah-Hartman,
Philipp Zabel, Adrian Hunter, Shawn Lin, Baolin Wang,
Russell King, Linus Walleij, Chaotian Jing, Douglas Anderson,
Nicolas Boichat, Javier Martinez Canillas, yong
yong mao (2):
mmc: core: Fix CMD6 timeout issue
mmc: mediatek: correct the implementation of msdc_card_busy
drivers/mmc/core/core.c | 19 +++++++++++++++++++
drivers/mmc/host/mtk-sd.c | 7 ++-----
2 files changed, 21 insertions(+), 5 deletions(-)
--
1.8.1.1.dirty
--
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^ permalink raw reply
* [PATCH v2 1/2] mmc: core: Fix CMD6 timeout issue
From: Yong Mao @ 2017-01-03 8:49 UTC (permalink / raw)
To: Ulf Hansson
Cc: Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
Matthias Brugger, Chunfeng Yun, Eddie Huang, Greg Kroah-Hartman,
Philipp Zabel, Adrian Hunter, Shawn Lin, Baolin Wang,
Russell King, Linus Walleij, Chaotian Jing, Douglas Anderson,
Nicolas Boichat, Javier Martinez Canillas, yong
In-Reply-To: <1483433397-11756-1-git-send-email-yong.mao@mediatek.com>
From: yong mao <yong.mao@mediatek.com>
When initializing EMMC, after switch to HS400,
it will issue CMD6 to change ext_csd,
if first CMD6 got CRC error,
the repeat CMD6 may get timeout,
that's because card is not back to transfer state immediately.
For resolving this issue, it need check if card is busy
before sending repeat CMD6.
Not only CMD6 here has this issue, but also other R1B CMD has
the same issue.
Signed-off-by: Yong Mao <yong.mao@mediatek.com>
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
---
drivers/mmc/core/core.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 1076b9d..8674dbb 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -566,6 +566,25 @@ void mmc_wait_for_req_done(struct mmc_host *host, struct mmc_request *mrq)
mmc_retune_recheck(host);
+ /*
+ * If a R1B CMD such as CMD6 occur CRC error,
+ * it will retry 3 times here.
+ * But before retrying, it must ensure card is in
+ * transfer state.
+ * Otherwise, the next retried CMD will got TMO error.
+ */
+ if (mmc_resp_type(cmd) == MMC_RSP_R1B && host->ops->card_busy) {
+ int tries = 500; /* Wait aprox 500ms at maximum */
+
+ while (host->ops->card_busy(host) && --tries)
+ mmc_delay(1);
+
+ if (tries == 0) {
+ cmd->error = -EBUSY;
+ break;
+ }
+ }
+
pr_debug("%s: req failed (CMD%u): %d, retrying...\n",
mmc_hostname(host), cmd->opcode, cmd->error);
cmd->retries--;
--
1.7.9.5
^ permalink raw reply related
* [PATCH v2 2/2] mmc: mediatek: correct the implementation of msdc_card_busy
From: Yong Mao @ 2017-01-03 8:49 UTC (permalink / raw)
To: Ulf Hansson
Cc: Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
Matthias Brugger, Chunfeng Yun, Eddie Huang, Greg Kroah-Hartman,
Philipp Zabel, Adrian Hunter, Shawn Lin, Baolin Wang,
Russell King, Linus Walleij, Chaotian Jing, Douglas Anderson,
Nicolas Boichat, Javier Martinez Canillas, yong
In-Reply-To: <1483433397-11756-1-git-send-email-yong.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
From: yong mao <yong.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
msdc_card_busy only need check if the data0 is low.
In sdio data1 irq mode, data1 may be low because of interruption.
Signed-off-by: Yong Mao <yong.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Signed-off-by: Chaotian Jing <chaotian.jing-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
---
drivers/mmc/host/mtk-sd.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
index 10ef2ae..80ba034 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -1074,11 +1074,8 @@ static int msdc_card_busy(struct mmc_host *mmc)
struct msdc_host *host = mmc_priv(mmc);
u32 status = readl(host->base + MSDC_PS);
- /* check if any pin between dat[0:3] is low */
- if (((status >> 16) & 0xf) != 0xf)
- return 1;
-
- return 0;
+ /* only check if data0 is low */
+ return !(status & BIT(16));
}
static void msdc_request_timeout(struct work_struct *work)
--
1.7.9.5
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^ permalink raw reply related
* [PATCH v2] soc: zte: Add header for PM domains specifiers
From: Baoyou Xie @ 2017-01-03 9:01 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
jun.nie-QSEj5FYQhm4dnm+yROfE0A, shawnguo-DgEjT+Ai2ygdnm+yROfE0A
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
baoyou.xie-QSEj5FYQhm4dnm+yROfE0A,
xie.baoyou-Th6q7B73Y6EnDS1+zs4M5A,
chen.chaokai-Th6q7B73Y6EnDS1+zs4M5A,
wang.qiang01-Th6q7B73Y6EnDS1+zs4M5A
This patch adds header with values used for ZTE 2967
SoC's power domain driver.
Signed-off-by: Baoyou Xie <baoyou.xie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
include/dt-bindings/zte,pm_domains.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 include/dt-bindings/zte,pm_domains.h
diff --git a/include/dt-bindings/zte,pm_domains.h b/include/dt-bindings/zte,pm_domains.h
new file mode 100644
index 0000000..a64cfb8
--- /dev/null
+++ b/include/dt-bindings/zte,pm_domains.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2015 Linaro Ltd.
+ *
+ * Author: Baoyou Xie <baoyou.xie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+ * License terms: GNU General Public License (GPL) version 2
+ */
+#ifndef _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
+#define _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
+
+#define DM_ZX296718_SAPPU 0
+#define DM_ZX296718_VDE 1 /* g1v6 */
+#define DM_ZX296718_VCE 2 /* h1v6 */
+#define DM_ZX296718_HDE 3 /* g2v2 */
+#define DM_ZX296718_VIU 4
+#define DM_ZX296718_USB20 5
+#define DM_ZX296718_USB21 6
+#define DM_ZX296718_USB30 7
+#define DM_ZX296718_HSIC 8
+#define DM_ZX296718_GMAC 9
+#define DM_ZX296718_TS 10
+#define DM_ZX296718_VOU 11
+
+#endif /* _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H */
--
2.7.4
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^ permalink raw reply related
* Re: [PATCH] ARM: davinci_all_defconfig: enable dumb vga-dac drm bridge
From: Bartosz Golaszewski @ 2017-01-03 9:03 UTC (permalink / raw)
To: Kevin Hilman, Michael Turquette, Sekhar Nori, Rob Herring,
Frank Rowand, Mark Rutland, Peter Ujfalusi, Russell King
Cc: LKML, arm-soc, linux-drm, linux-devicetree, Jyri Sarha,
Tomi Valkeinen, David Airlie, Laurent Pinchart,
Bartosz Golaszewski
In-Reply-To: <1480065182-7095-1-git-send-email-bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2016-11-25 10:13 GMT+01:00 Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>:
> This enables the dumb-vga-dac driver by default for davinci boards.
>
> The driver is needed for tilcdc support on da850-lcdk board.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
> ---
> arch/arm/configs/davinci_all_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
> index b5e978f..ab1bf18 100644
> --- a/arch/arm/configs/davinci_all_defconfig
> +++ b/arch/arm/configs/davinci_all_defconfig
> @@ -127,6 +127,8 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
> CONFIG_REGULATOR_TPS6507X=y
> CONFIG_DRM=m
> CONFIG_DRM_TILCDC=m
> +CONFIG_DRM_BRIDGE=y
> +CONFIG_DRM_DUMB_VGA_DAC=m
> CONFIG_FB=y
> CONFIG_FIRMWARE_EDID=y
> CONFIG_FB_DA8XX=y
> --
> 2.9.3
>
Hi Sekhar,
ping for this patch - it's been stuck on the list since November. I
suppose it got lost in your queue.
Thanks,
Bartosz
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^ permalink raw reply
* Re: [PATCH v2] soc: zte: Add header for PM domains specifiers
From: Baoyou Xie @ 2017-01-03 9:07 UTC (permalink / raw)
To: Rob Herring, mark.rutland, Jun Nie, Shawn Guo
Cc: Linux Kernel Mailing List, devicetree, Baoyou Xie, xie.baoyou,
chen.chaokai, wang.qiang01
In-Reply-To: <1483434097-13647-1-git-send-email-baoyou.xie@linaro.org>
[-- Attachment #1: Type: text/plain, Size: 1555 bytes --]
Sorry, file named "zte,pm_domains.h" should be lived in
include/dt-bindings/soc/, I will resend this patch.
On 3 January 2017 at 17:01, Baoyou Xie <baoyou.xie@linaro.org> wrote:
> This patch adds header with values used for ZTE 2967
> SoC's power domain driver.
>
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> ---
> include/dt-bindings/zte,pm_domains.h | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
> create mode 100644 include/dt-bindings/zte,pm_domains.h
>
> diff --git a/include/dt-bindings/zte,pm_domains.h
> b/include/dt-bindings/zte,pm_domains.h
> new file mode 100644
> index 0000000..a64cfb8
> --- /dev/null
> +++ b/include/dt-bindings/zte,pm_domains.h
> @@ -0,0 +1,23 @@
> +/*
> + * Copyright (C) 2015 Linaro Ltd.
> + *
> + * Author: Baoyou Xie <baoyou.xie@linaro.org>
> + * License terms: GNU General Public License (GPL) version 2
> + */
> +#ifndef _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
> +#define _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
> +
> +#define DM_ZX296718_SAPPU 0
> +#define DM_ZX296718_VDE 1 /* g1v6 */
> +#define DM_ZX296718_VCE 2 /* h1v6 */
> +#define DM_ZX296718_HDE 3 /* g2v2 */
> +#define DM_ZX296718_VIU 4
> +#define DM_ZX296718_USB20 5
> +#define DM_ZX296718_USB21 6
> +#define DM_ZX296718_USB30 7
> +#define DM_ZX296718_HSIC 8
> +#define DM_ZX296718_GMAC 9
> +#define DM_ZX296718_TS 10
> +#define DM_ZX296718_VOU 11
> +
> +#endif /* _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H */
> --
> 2.7.4
>
>
[-- Attachment #2: Type: text/html, Size: 2262 bytes --]
^ permalink raw reply
* Re: [PATCH 1/4] mmc: mediatek: Fix CMD6 timeout issue
From: Yong Mao @ 2017-01-03 9:14 UTC (permalink / raw)
To: Ulf Hansson
Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
YH Huang, Nicolas Boichat, Mathias Nyman, srv_heupstream,
Catalin Marinas, Will Deacon, Douglas Anderson,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Chunfeng Yun, Rob Herring, Geert Uytterhoeven,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Philipp Zabel, Matthias Brugger,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Eddie Huang,
Chaotian Jing <chaot>
In-Reply-To: <CAPDyKFosQkxaFAKo0dm0TajgXqKG7XqRM1tTqR2vTsHzVrocfQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Thu, 2016-12-01 at 10:51 +0100, Ulf Hansson wrote:
> On 8 November 2016 at 07:08, Yong Mao <yong.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> wrote:
> > From: yong mao <yong.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> >
> > When initializing EMMC, after switch to HS400,
> > it will issue CMD6 to change ext_csd, if first CMD6 got CRC
> > error, the repeat CMD6 may get timeout, that's
> > because SDCBSY was cleared by msdc_reset_hw()
>
> Sorry for the delay!
>
> We have recently been re-working the sequence for how to deal more
> properly with CMD6 in the mmc core.
>
> The changes done so far should mostly concern switches to HS and HS
> DDR, but I think you should run a re-test to make sure you still hit
> the same problems.
>
Happy New Year!
The issue we met is not only just for CMD6, but also for other R1B CMD.
Your new changes does not cover all of these cases.
We would like to make error handle in the core layer to deal with these
issues.
I had submitted a new path ([PATCH v2] Fix CMD6 timeout issue) to you,
please help to review it.
Thanks.
> >
> > Signed-off-by: Yong Mao <yong.mao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > Signed-off-by: Chaotian Jing <chaotian.jing-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > ---
> > drivers/mmc/host/mtk-sd.c | 77 ++++++++++++++++++++++++++++++---------------
> > 1 file changed, 51 insertions(+), 26 deletions(-)
> >
> > diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
> > index 84e9afc..b29683b 100644
> > --- a/drivers/mmc/host/mtk-sd.c
> > +++ b/drivers/mmc/host/mtk-sd.c
> > @@ -826,6 +826,15 @@ static bool msdc_cmd_done(struct msdc_host *host, int events,
> > return true;
> > }
> >
> > +static int msdc_card_busy(struct mmc_host *mmc)
> > +{
> > + struct msdc_host *host = mmc_priv(mmc);
> > + u32 status = readl(host->base + MSDC_PS);
> > +
> > + /* check if data0 is low */
> > + return !(status & BIT(16));
> > +}
> > +
> > /* It is the core layer's responsibility to ensure card status
> > * is correct before issue a request. but host design do below
> > * checks recommended.
>
> Hmm. Why?
>
> I think you should rely on the mmc core to invoke the ->card_busy()
> ops instead. The core knows better when it's needed.
>
> Perhaps that may also resolve some of these issues for you!?
In my latest patch, msdc_card_busy will not be used in mtk-sd.c
directly. It only can be invoked by ->card_busy() in the mmc core.
>
> > @@ -835,10 +844,20 @@ static inline bool msdc_cmd_is_ready(struct msdc_host *host,
> > {
> > /* The max busy time we can endure is 20ms */
> > unsigned long tmo = jiffies + msecs_to_jiffies(20);
> > + u32 count = 0;
> > +
> > + if (in_interrupt()) {
> > + while ((readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) &&
> > + (count < 1000)) {
> > + udelay(1);
> > + count++;
>
> This seems like a bad idea, "busy-wait" in irq context is never a good idea.
Thanks. The modification here is not for the current issue.
I will submit a new patch to discuss with you.
> > + }
> > + } else {
> > + while ((readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) &&
> > + time_before(jiffies, tmo))
> > + cpu_relax();
> > + }
> >
> > - while ((readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) &&
> > - time_before(jiffies, tmo))
> > - cpu_relax();
> > if (readl(host->base + SDC_STS) & SDC_STS_CMDBUSY) {
> > dev_err(host->dev, "CMD bus busy detected\n");
> > host->error |= REQ_CMD_BUSY;
> > @@ -846,17 +865,35 @@ static inline bool msdc_cmd_is_ready(struct msdc_host *host,
> > return false;
> > }
> >
> > - if (mmc_resp_type(cmd) == MMC_RSP_R1B || cmd->data) {
> > - tmo = jiffies + msecs_to_jiffies(20);
> > - /* R1B or with data, should check SDCBUSY */
> > - while ((readl(host->base + SDC_STS) & SDC_STS_SDCBUSY) &&
> > - time_before(jiffies, tmo))
> > - cpu_relax();
> > - if (readl(host->base + SDC_STS) & SDC_STS_SDCBUSY) {
> > - dev_err(host->dev, "Controller busy detected\n");
> > - host->error |= REQ_CMD_BUSY;
> > - msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd);
> > - return false;
> > + if (cmd->opcode != MMC_SEND_STATUS) {
> > + count = 0;
> > + /* Consider that CMD6 crc error before card was init done,
> > + * mmc_retune() will return directly as host->card is null.
> > + * and CMD6 will retry 3 times, must ensure card is in transfer
> > + * state when retry.
> > + */
> > + tmo = jiffies + msecs_to_jiffies(60 * 1000);
> > + while (1) {
> > + if (msdc_card_busy(host->mmc)) {
> > + if (in_interrupt()) {
> > + udelay(1);
> > + count++;
> > + } else {
> > + msleep_interruptible(10);
> > + }
> > + } else {
> > + break;
> > + }
> > + /* Timeout if the device never
> > + * leaves the program state.
> > + */
> > + if (count > 1000 || time_after(jiffies, tmo)) {
> > + pr_err("%s: Card stuck in programming state! %s\n",
> > + mmc_hostname(host->mmc), __func__);
> > + host->error |= REQ_CMD_BUSY;
> > + msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd);
> > + return false;
> > + }
>
> This hole new code is a hack, that shouldn't be needed in the host driver.
>
> I think we need to investigate and fix the issue in the mmc core
> layer, to make this work for your host driver. That instead of doing a
> work around in the host.
>
I had already make some modification on the mmc core to resolve these
issues in the latest patch.
> > }
> > }
> > return true;
> > @@ -1070,18 +1107,6 @@ static int msdc_ops_switch_volt(struct mmc_host *mmc, struct mmc_ios *ios)
> > return ret;
> > }
> >
> > -static int msdc_card_busy(struct mmc_host *mmc)
> > -{
> > - struct msdc_host *host = mmc_priv(mmc);
> > - u32 status = readl(host->base + MSDC_PS);
> > -
> > - /* check if any pin between dat[0:3] is low */
> > - if (((status >> 16) & 0xf) != 0xf)
> > - return 1;
> > -
> > - return 0;
> > -}
> > -
> > static void msdc_request_timeout(struct work_struct *work)
> > {
> > struct msdc_host *host = container_of(work, struct msdc_host,
> > --
> > 1.7.9.5
> >
>
> Kind regards
> Uffe
^ permalink raw reply
* [PATCH v3] soc: zte: Add header for PM domains specifiers
From: Baoyou Xie @ 2017-01-03 9:15 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
jun.nie-QSEj5FYQhm4dnm+yROfE0A, shawnguo-DgEjT+Ai2ygdnm+yROfE0A
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
baoyou.xie-QSEj5FYQhm4dnm+yROfE0A,
xie.baoyou-Th6q7B73Y6EnDS1+zs4M5A,
chen.chaokai-Th6q7B73Y6EnDS1+zs4M5A,
wang.qiang01-Th6q7B73Y6EnDS1+zs4M5A
This patch adds header with values used for zx96718
SoC's power domain driver.
Signed-off-by: Baoyou Xie <baoyou.xie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
include/dt-bindings/soc/zte,pm_domains.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 include/dt-bindings/soc/zte,pm_domains.h
diff --git a/include/dt-bindings/soc/zte,pm_domains.h b/include/dt-bindings/soc/zte,pm_domains.h
new file mode 100644
index 0000000..a64cfb8
--- /dev/null
+++ b/include/dt-bindings/soc/zte,pm_domains.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2015 Linaro Ltd.
+ *
+ * Author: Baoyou Xie <baoyou.xie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+ * License terms: GNU General Public License (GPL) version 2
+ */
+#ifndef _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
+#define _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H
+
+#define DM_ZX296718_SAPPU 0
+#define DM_ZX296718_VDE 1 /* g1v6 */
+#define DM_ZX296718_VCE 2 /* h1v6 */
+#define DM_ZX296718_HDE 3 /* g2v2 */
+#define DM_ZX296718_VIU 4
+#define DM_ZX296718_USB20 5
+#define DM_ZX296718_USB21 6
+#define DM_ZX296718_USB30 7
+#define DM_ZX296718_HSIC 8
+#define DM_ZX296718_GMAC 9
+#define DM_ZX296718_TS 10
+#define DM_ZX296718_VOU 11
+
+#endif /* _DT_BINDINGS_SOC_ZTE_PM_DOMAINS_H */
--
2.7.4
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^ permalink raw reply related
* Re: [PATCH] ARM: davinci_all_defconfig: enable dumb vga-dac drm bridge
From: Sekhar Nori @ 2017-01-03 9:20 UTC (permalink / raw)
To: Bartosz Golaszewski, Kevin Hilman, Michael Turquette, Rob Herring,
Frank Rowand, Mark Rutland, Peter Ujfalusi, Russell King
Cc: LKML, arm-soc, linux-drm, linux-devicetree, Jyri Sarha,
Tomi Valkeinen, David Airlie, Laurent Pinchart
In-Reply-To: <1480065182-7095-1-git-send-email-bgolaszewski@baylibre.com>
On Friday 25 November 2016 02:43 PM, Bartosz Golaszewski wrote:
> This enables the dumb-vga-dac driver by default for davinci boards.
>
> The driver is needed for tilcdc support on da850-lcdk board.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/configs/davinci_all_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
> index b5e978f..ab1bf18 100644
> --- a/arch/arm/configs/davinci_all_defconfig
> +++ b/arch/arm/configs/davinci_all_defconfig
> @@ -127,6 +127,8 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
> CONFIG_REGULATOR_TPS6507X=y
> CONFIG_DRM=m
> CONFIG_DRM_TILCDC=m
> +CONFIG_DRM_BRIDGE=y
DRM_BRIDGE is a 'def_bool y'. So no need to explicitly enable it. And
actually it will get dropped with the next savedefconfig refresh anyway.
Applying this patch with this line dropped.
Thanks,
Sekhar
^ permalink raw reply
* Re: [PATCH v6 6/8] IIO: add STM32 timer trigger driver
From: Benjamin Gaignard @ 2017-01-03 9:23 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Lee Jones, robh+dt, Mark Rutland, Alexandre Torgue, devicetree,
Linux Kernel Mailing List, Thierry Reding, Linux PWM List,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
linux-iio, linux-arm-kernel, Fabrice Gasnier, Gerald Baeza,
Arnaud Pouliquen, Linus Walleij, Linaro Kernel Mailman List,
Benjamin Gaignard
In-Reply-To: <c46e6e59-b5b6-39e6-d6f4-5ca4539f746c@kernel.org>
2017-01-02 19:22 GMT+01:00 Jonathan Cameron <jic23@kernel.org>:
> On 02/01/17 08:46, Benjamin Gaignard wrote:
>> 2016-12-30 22:12 GMT+01:00 Jonathan Cameron <jic23@kernel.org>:
>>> On 09/12/16 14:15, Benjamin Gaignard wrote:
>>>> Timers IPs can be used to generate triggers for other IPs like
>>>> DAC, ADC or other timers.
>>>> Each trigger may result of timer internals signals like counter enable,
>>>> reset or edge, this configuration could be done through "master_mode"
>>>> device attribute.
>>>>
>>>> A timer device could be triggered by other timers, we use the trigger
>>>> name and is_stm32_iio_timer_trigger() function to distinguish them
>>>> and configure IP input switch.
>>>>
>>>> Timer may also decide on which event (edge, level) they could
>>>> be activated by a trigger, this configuration is done by writing in
>>>> "slave_mode" device attribute.
>>>>
>>>> Since triggers could also be used by DAC or ADC their names are defined
>>>> in include/ nux/iio/timer/stm32-timer-trigger.h so those IPs will be able
>>>> to configure themselves in valid_trigger function
>>>>
>>>> Trigger have a "sampling_frequency" attribute which allow to configure
>>>> timer sampling frequency without using PWM interface
>>>>
>>>> version 5:
>>>> - simplify tables of triggers
>>>> - only create an IIO device when needed
>>>>
>>>> version 4:
>>>> - get triggers configuration from "reg" in DT
>>>> - add tables of triggers
>>>> - sampling frequency is enable/disable when writing in trigger
>>>> sampling_frequency attribute
>>>> - no more use of interruptions
>>>>
>>>> version 3:
>>>> - change compatible to "st,stm32-timer-trigger"
>>>> - fix attributes access right
>>>> - use string instead of int for master_mode and slave_mode
>>>> - document device attributes in sysfs-bus-iio-timer-stm32
>>>>
>>>> version 2:
>>>> - keep only one compatible
>>>> - use st,input-triggers-names and st,output-triggers-names
>>>> to know which triggers are accepted and/or create by the device
>>> Firstly, sorry it has taken me so long to get back to this.
>>>
>>> I'm still not keen on this use of iio_device elements just to act as
>>> glue between triggers. I think we need to work out a more light weight
>>> way to do this. As you are only using them for validation and to provide
>>> somewhere to hang the control attibutes off, there is nothing stopping us
>>> moving that over to the iio_trigger instead which would avoid the messy
>>> duality going on here.
>>
>> I have add an iio_device because each hardware can generate multiple
>> triggers (up to 5: trgo, ch 1...4) and slave_mode attribute will impact all the
>> triggers of a device. For me it was making sense to centralize that in an
>> iio_device rather than having an attribute "shared" (from hardware
>> point of view)
>> on multiple triggers.
>> Since master_mode attribute is only used by trgo and not impact ch1...4
>> triggers I will move it to trigger instead of the iio_device.
>>
>> I also wanted to be able to connect triggers on a iio_device as I
>> could do for an
>> ADC with a command like 'echo "tim1_trgo" > iio_deviceX/trigger/current_trigger'
> This is interesting, but with a bit of refactoring I would think it would
> be possible to share some of that code thus allowing non IIO devices to
> bind to triggers. Ultimately I want to be able to bind a trigger to
> a trigger - I appreciate here the topology is more limited than that
> so some complexity comes in.
>
> My gut feeling is that representing that topology explicitly is hard
> to do in a remotely general way, but lets try it and see.
> We run into this sort of interdependency issue between different bits of
> the hardware all the time. Setting a value somewhere effects the configuration
> elsewhere - often the best plan is to just let that happen and leave it up to
> userspace to check for changes if it cares.
okay
>> If I change that to parent_trigger attribute it change this behavior
>> and I will have to
>> duplicated what is done in iio_trigger_write_current() to find and
>> validate triggers.
> I get the reasoning, but we still end up with something represented
> by an IIO device that isn't providing any channels at all. It's simply
> using some of the infrastructure. To my mind it is 'something else'
> and should be represented as such. I have no problem at all with
> you registering additional elements in /sysfs/bus/iio/ to represent
> these shared elements - we already have drivers that do that to
> provide some centralized infrastructure (e.g. the sysfs-trigger)
My hardware block are timers maybe I can add a channel type "IIO_TIMER"
and declare a channel with info_mask_separate = BIT(IIO_CHAN_INFO_SAMP_FREQ)
so I will be able to write/read sampling frequency on IIO device.
> I'm worried about the scope spread we get for an IIO device otherwise.
> They serve a well defined purpose at the moment, and that isn't what
> is happening here.
>
> So my gut feeling is we are better deliberately not representing the
> inter dependence and claiming all triggers we are creating are
> independent. That way we can have a nice generic infrastructure
> that will work in all cases (be it pushing the sanity checking to
> userspace).
>
> So each trigger has direct access to what controls it. Changing anything
> can effect other triggers in weird ways.
>
> I'm finding it hard to see anything else generalizing sufficiently
> as we'll always get cases where we can't represent the topology without
> diving into the complexity of something like the media controller
> framework.
>
> Jonathan
>>
>>> I might still be missing something though!
>>>
>>> You would only I think need 3 attributes
>>>
>>> parrent_trigger
>>> and something like your master_mode and slave_mode attributes.
>>>
>>> The parrent_trigger would need some validation etc, but if we keep it
>>> within this driver initially that won't be hard to do. Checking the device
>>> parent matches will do most of it.
>>>
>>> Jonathan
>>>>
>>>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
>>>> ---
>>>> .../ABI/testing/sysfs-bus-iio-timer-stm32 | 55 +++
>>>> drivers/iio/Kconfig | 2 +-
>>>> drivers/iio/Makefile | 1 +
>>>> drivers/iio/timer/Kconfig | 13 +
>>>> drivers/iio/timer/Makefile | 1 +
>>>> drivers/iio/timer/stm32-timer-trigger.c | 466 +++++++++++++++++++++
>>>> drivers/iio/trigger/Kconfig | 1 -
>>>> include/linux/iio/timer/stm32-timer-trigger.h | 62 +++
>>>> 8 files changed, 599 insertions(+), 2 deletions(-)
>>>> create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>>> create mode 100644 drivers/iio/timer/Kconfig
>>>> create mode 100644 drivers/iio/timer/Makefile
>>>> create mode 100644 drivers/iio/timer/stm32-timer-trigger.c
>>>> create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h
>>>>
>>>> diff --git a/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 b/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>>> new file mode 100644
>>>> index 0000000..26583dd
>>>> --- /dev/null
>>>> +++ b/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32
>>>> @@ -0,0 +1,55 @@
>>>> +What: /sys/bus/iio/devices/iio:deviceX/master_mode_available
>>>> +KernelVersion: 4.10
>>>> +Contact: benjamin.gaignard@st.com
>>>> +Description:
>>>> + Reading returns the list possible master modes which are:
>>>> + - "reset" : The UG bit from the TIMx_EGR register is used as trigger output (TRGO).
>>>> + - "enable" : The Counter Enable signal CNT_EN is used as trigger output.
>>>> + - "update" : The update event is selected as trigger output.
>>>> + For instance a master timer can then be used as a prescaler for a slave timer.
>>>> + - "compare_pulse" : The trigger output send a positive pulse when the CC1IF flag is to be set.
>>>> + - "OC1REF" : OC1REF signal is used as trigger output.
>>>> + - "OC2REF" : OC2REF signal is used as trigger output.
>>>> + - "OC3REF" : OC3REF signal is used as trigger output.
>>>> + - "OC4REF" : OC4REF signal is used as trigger output.
>>>> +
>>>> +What: /sys/bus/iio/devices/iio:deviceX/master_mode
>>>> +KernelVersion: 4.10
>>>> +Contact: benjamin.gaignard@st.com
>>>> +Description:
>>>> + Reading returns the current master modes.
>>>> + Writing set the master mode
>>>> +
>>>> +What: /sys/bus/iio/devices/iio:deviceX/slave_mode_available
>>>> +KernelVersion: 4.10
>>>> +Contact: benjamin.gaignard@st.com
>>>> +Description:
>>>> + Reading returns the list possible slave modes which are:
>>>> + - "disabled" : The prescaler is clocked directly by the internal clock.
>>>> + - "encoder_1" : Counter counts up/down on TI2FP1 edge depending on TI1FP2 level.
>>>> + - "encoder_2" : Counter counts up/down on TI1FP2 edge depending on TI2FP1 level.
>>>> + - "encoder_3" : Counter counts up/down on both TI1FP1 and TI2FP2 edges depending
>>>> + on the level of the other input.
>>>> + - "reset" : Rising edge of the selected trigger input reinitializes the counter
>>>> + and generates an update of the registers.
>>>> + - "gated" : The counter clock is enabled when the trigger input is high.
>>>> + The counter stops (but is not reset) as soon as the trigger becomes low.
>>>> + Both start and stop of the counter are controlled.
>>>> + - "trigger" : The counter starts at a rising edge of the trigger TRGI (but it is not
>>>> + reset). Only the start of the counter is controlled.
>>>> + - "external_clock": Rising edges of the selected trigger (TRGI) clock the counter.
>>>> +
>>>> +What: /sys/bus/iio/devices/iio:deviceX/slave_mode
>>>> +KernelVersion: 4.10
>>>> +Contact: benjamin.gaignard@st.com
>>>> +Description:
>>>> + Reading returns the current slave mode.
>>>> + Writing set the slave mode
>>>> +
>>>> +What: /sys/bus/iio/devices/triggerX/sampling_frequency
>>>> +KernelVersion: 4.10
>>>> +Contact: benjamin.gaignard@st.com
>>>> +Description:
>>>> + Reading returns the current sampling frequency.
>>>> + Writing an value different of 0 set and start sampling.
>>>> + Writing 0 stop sampling.
>>>> diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig
>>>> index 6743b18..2de2a80 100644
>>>> --- a/drivers/iio/Kconfig
>>>> +++ b/drivers/iio/Kconfig
>>>> @@ -90,5 +90,5 @@ source "drivers/iio/potentiometer/Kconfig"
>>>> source "drivers/iio/pressure/Kconfig"
>>>> source "drivers/iio/proximity/Kconfig"
>>>> source "drivers/iio/temperature/Kconfig"
>>>> -
>>>> +source "drivers/iio/timer/Kconfig"
>>>> endif # IIO
>>>> diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile
>>>> index 87e4c43..b797c08 100644
>>>> --- a/drivers/iio/Makefile
>>>> +++ b/drivers/iio/Makefile
>>>> @@ -32,4 +32,5 @@ obj-y += potentiometer/
>>>> obj-y += pressure/
>>>> obj-y += proximity/
>>>> obj-y += temperature/
>>>> +obj-y += timer/
>>>> obj-y += trigger/
>>>> diff --git a/drivers/iio/timer/Kconfig b/drivers/iio/timer/Kconfig
>>>> new file mode 100644
>>>> index 0000000..e3c21f2
>>>> --- /dev/null
>>>> +++ b/drivers/iio/timer/Kconfig
>>>> @@ -0,0 +1,13 @@
>>>> +#
>>>> +# Timers drivers
>>>> +
>>>> +menu "Timers"
>>>> +
>>>> +config IIO_STM32_TIMER_TRIGGER
>>>> + tristate "STM32 Timer Trigger"
>>>> + depends on (ARCH_STM32 && OF && MFD_STM32_TIMERS) || COMPILE_TEST
>>>> + select IIO_TRIGGERED_EVENT
>>>> + help
>>>> + Select this option to enable STM32 Timer Trigger
>>>> +
>>>> +endmenu
>>>> diff --git a/drivers/iio/timer/Makefile b/drivers/iio/timer/Makefile
>>>> new file mode 100644
>>>> index 0000000..4ad95ec9
>>>> --- /dev/null
>>>> +++ b/drivers/iio/timer/Makefile
>>>> @@ -0,0 +1 @@
>>>> +obj-$(CONFIG_IIO_STM32_TIMER_TRIGGER) += stm32-timer-trigger.o
>>>> diff --git a/drivers/iio/timer/stm32-timer-trigger.c b/drivers/iio/timer/stm32-timer-trigger.c
>>>> new file mode 100644
>>>> index 0000000..8d16e8f
>>>> --- /dev/null
>>>> +++ b/drivers/iio/timer/stm32-timer-trigger.c
>>>> @@ -0,0 +1,466 @@
>>>> +/*
>>>> + * Copyright (C) STMicroelectronics 2016
>>>> + *
>>>> + * Author: Benjamin Gaignard <benjamin.gaignard@st.com>
>>>> + *
>>>> + * License terms: GNU General Public License (GPL), version 2
>>>> + */
>>>> +
>>>> +#include <linux/iio/iio.h>
>>>> +#include <linux/iio/sysfs.h>
>>>> +#include <linux/iio/timer/stm32-timer-trigger.h>
>>>> +#include <linux/iio/trigger.h>
>>>> +#include <linux/iio/triggered_event.h>
>>>> +#include <linux/interrupt.h>
>>>> +#include <linux/mfd/stm32-timers.h>
>>>> +#include <linux/module.h>
>>>> +#include <linux/platform_device.h>
>>>> +
>>>> +#define MAX_TRIGGERS 6
>>>> +#define MAX_VALIDS 5
>>>> +
>>>> +/* List the triggers created by each timer */
>>>> +static const void *triggers_table[][MAX_TRIGGERS] = {
>>>> + { TIM1_TRGO, TIM1_CH1, TIM1_CH2, TIM1_CH3, TIM1_CH4,},
>>>> + { TIM2_TRGO, TIM2_CH1, TIM2_CH2, TIM2_CH3, TIM2_CH4,},
>>>> + { TIM3_TRGO, TIM3_CH1, TIM3_CH2, TIM3_CH3, TIM3_CH4,},
>>>> + { TIM4_TRGO, TIM4_CH1, TIM4_CH2, TIM4_CH3, TIM4_CH4,},
>>>> + { TIM5_TRGO, TIM5_CH1, TIM5_CH2, TIM5_CH3, TIM5_CH4,},
>>>> + { TIM6_TRGO,},
>>>> + { TIM7_TRGO,},
>>>> + { TIM8_TRGO, TIM8_CH1, TIM8_CH2, TIM8_CH3, TIM8_CH4,},
>>>> + { TIM9_TRGO, TIM9_CH1, TIM9_CH2,},
>>>> + { TIM12_TRGO, TIM12_CH1, TIM12_CH2,},
>>>> +};
>>>> +
>>>> +/* List the triggers accepted by each timer */
>>>> +static const void *valids_table[][MAX_VALIDS] = {
>>>> + { TIM5_TRGO, TIM2_TRGO, TIM4_TRGO, TIM3_TRGO,},
>>>> + { TIM1_TRGO, TIM8_TRGO, TIM3_TRGO, TIM4_TRGO,},
>>>> + { TIM1_TRGO, TIM8_TRGO, TIM5_TRGO, TIM4_TRGO,},
>>>> + { TIM1_TRGO, TIM2_TRGO, TIM3_TRGO, TIM8_TRGO,},
>>>> + { TIM2_TRGO, TIM3_TRGO, TIM4_TRGO, TIM8_TRGO,},
>>>> + { }, /* timer 6 */
>>>> + { }, /* timer 7 */
>>>> + { TIM1_TRGO, TIM2_TRGO, TIM4_TRGO, TIM5_TRGO,},
>>>> + { TIM2_TRGO, TIM3_TRGO,},
>>>> + { TIM4_TRGO, TIM5_TRGO,},
>>>> +};
>>>> +
>>>> +struct stm32_timer_trigger {
>>>> + struct device *dev;
>>>> + struct regmap *regmap;
>>>> + struct clk *clk;
>>>> + u32 max_arr;
>>>> + const void *triggers;
>>>> + const void *valids;
>>>> +};
>>>> +
>>>> +static int stm32_timer_start(struct stm32_timer_trigger *priv,
>>>> + unsigned int frequency)
>>>> +{
>>>> + unsigned long long prd, div;
>>>> + int prescaler = 0;
>>>> + u32 ccer, cr1;
>>>> +
>>>> + /* Period and prescaler values depends of clock rate */
>>>> + div = (unsigned long long)clk_get_rate(priv->clk);
>>>> +
>>>> + do_div(div, frequency);
>>>> +
>>>> + prd = div;
>>>> +
>>>> + /*
>>>> + * Increase prescaler value until we get a result that fit
>>>> + * with auto reload register maximum value.
>>>> + */
>>>> + while (div > priv->max_arr) {
>>>> + prescaler++;
>>>> + div = prd;
>>>> + do_div(div, (prescaler + 1));
>>>> + }
>>>> + prd = div;
>>>> +
>>>> + if (prescaler > MAX_TIM_PSC) {
>>>> + dev_err(priv->dev, "prescaler exceeds the maximum value\n");
>>>> + return -EINVAL;
>>>> + }
>>>> +
>>>> + /* Check if nobody else use the timer */
>>>> + regmap_read(priv->regmap, TIM_CCER, &ccer);
>>>> + if (ccer & TIM_CCER_CCXE)
>>>> + return -EBUSY;
>>>> +
>>>> + regmap_read(priv->regmap, TIM_CR1, &cr1);
>>>> + if (!(cr1 & TIM_CR1_CEN))
>>>> + clk_enable(priv->clk);
>>>> +
>>>> + regmap_write(priv->regmap, TIM_PSC, prescaler);
>>>> + regmap_write(priv->regmap, TIM_ARR, prd - 1);
>>>> + regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
>>>> +
>>>> + /* Force master mode to update mode */
>>>> + regmap_update_bits(priv->regmap, TIM_CR2, TIM_CR2_MMS, 0x20);
>>>> +
>>>> + /* Make sure that registers are updated */
>>>> + regmap_update_bits(priv->regmap, TIM_EGR, TIM_EGR_UG, TIM_EGR_UG);
>>>> +
>>>> + /* Enable controller */
>>>> + regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN);
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +static void stm32_timer_stop(struct stm32_timer_trigger *priv)
>>>> +{
>>>> + u32 ccer, cr1;
>>>> +
>>>> + regmap_read(priv->regmap, TIM_CCER, &ccer);
>>>> + if (ccer & TIM_CCER_CCXE)
>>>> + return;
>>>> +
>>>> + regmap_read(priv->regmap, TIM_CR1, &cr1);
>>>> + if (cr1 & TIM_CR1_CEN)
>>>> + clk_disable(priv->clk);
>>>> +
>>>> + /* Stop timer */
>>>> + regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
>>>> + regmap_write(priv->regmap, TIM_PSC, 0);
>>>> + regmap_write(priv->regmap, TIM_ARR, 0);
>>>> +}
>>>> +
>>>> +static ssize_t stm32_tt_store_frequency(struct device *dev,
>>>> + struct device_attribute *attr,
>>>> + const char *buf, size_t len)
>>>> +{
>>>> + struct iio_trigger *trig = to_iio_trigger(dev);
>>>> + struct stm32_timer_trigger *priv = iio_trigger_get_drvdata(trig);
>>>> + unsigned int freq;
>>>> + int ret;
>>>> +
>>>> + ret = kstrtouint(buf, 10, &freq);
>>>> + if (ret)
>>>> + return ret;
>>>> +
>>>> + if (freq == 0) {
>>>> + stm32_timer_stop(priv);
>>>> + } else {
>>>> + ret = stm32_timer_start(priv, freq);
>>>> + if (ret)
>>>> + return ret;
>>>> + }
>>>> +
>>>> + return len;
>>>> +}
>>>> +
>>>> +static ssize_t stm32_tt_read_frequency(struct device *dev,
>>>> + struct device_attribute *attr, char *buf)
>>>> +{
>>>> + struct iio_trigger *trig = to_iio_trigger(dev);
>>>> + struct stm32_timer_trigger *priv = iio_trigger_get_drvdata(trig);
>>>> + u32 psc, arr, cr1;
>>>> + unsigned long long freq = 0;
>>>> +
>>>> + regmap_read(priv->regmap, TIM_CR1, &cr1);
>>>> + regmap_read(priv->regmap, TIM_PSC, &psc);
>>>> + regmap_read(priv->regmap, TIM_ARR, &arr);
>>>> +
>>>> + if (psc && arr && (cr1 & TIM_CR1_CEN)) {
>>>> + freq = (unsigned long long)clk_get_rate(priv->clk);
>>>> + do_div(freq, psc);
>>>> + do_div(freq, arr);
>>>> + }
>>>> +
>>>> + return sprintf(buf, "%d\n", (unsigned int)freq);
>>>> +}
>>>> +
>>>> +static IIO_DEV_ATTR_SAMP_FREQ(0660,
>>>> + stm32_tt_read_frequency,
>>>> + stm32_tt_store_frequency);
>>>> +
>>>> +static struct attribute *stm32_trigger_attrs[] = {
>>>> + &iio_dev_attr_sampling_frequency.dev_attr.attr,
>>>> + NULL,
>>>> +};
>>>> +
>>>> +static const struct attribute_group stm32_trigger_attr_group = {
>>>> + .attrs = stm32_trigger_attrs,
>>>> +};
>>>> +
>>>> +static const struct attribute_group *stm32_trigger_attr_groups[] = {
>>>> + &stm32_trigger_attr_group,
>>>> + NULL,
>>>> +};
>>>> +
>>>> +static char *master_mode_table[] = {
>>>> + "reset",
>>>> + "enable",
>>>> + "update",
>>>> + "compare_pulse",
>>>> + "OC1REF",
>>>> + "OC2REF",
>>>> + "OC3REF",
>>>> + "OC4REF"
>>>> +};
>>>> +
>>>> +static ssize_t stm32_tt_show_master_mode(struct device *dev,
>>>> + struct device_attribute *attr,
>>>> + char *buf)
>>>> +{
>>>> + struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>> + struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>> + u32 cr2;
>>>> +
>>>> + regmap_read(priv->regmap, TIM_CR2, &cr2);
>>>> + cr2 = (cr2 & TIM_CR2_MMS) >> TIM_CR2_MMS_SHIFT;
>>>> +
>>>> + return snprintf(buf, PAGE_SIZE, "%s\n", master_mode_table[cr2]);
>>>> +}
>>>> +
>>>> +static ssize_t stm32_tt_store_master_mode(struct device *dev,
>>>> + struct device_attribute *attr,
>>>> + const char *buf, size_t len)
>>>> +{
>>>> + struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>> + struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>> + int i;
>>>> +
>>>> + for (i = 0; i < ARRAY_SIZE(master_mode_table); i++) {
>>>> + if (!strncmp(master_mode_table[i], buf,
>>>> + strlen(master_mode_table[i]))) {
>>>> + regmap_update_bits(priv->regmap, TIM_CR2,
>>>> + TIM_CR2_MMS, i << TIM_CR2_MMS_SHIFT);
>>>> + return len;
>>>> + }
>>>> + }
>>>> +
>>>> + return -EINVAL;
>>>> +}
>>>> +
>>>> +static IIO_CONST_ATTR(master_mode_available,
>>>> + "reset enable update compare_pulse OC1REF OC2REF OC3REF OC4REF");
>>>> +
>>>> +static IIO_DEVICE_ATTR(master_mode, 0660,
>>>> + stm32_tt_show_master_mode,
>>>> + stm32_tt_store_master_mode,
>>>> + 0);
>>>> +
>>>> +static char *slave_mode_table[] = {
>>>> + "disabled",
>>>> + "encoder_1",
>>>> + "encoder_2",
>>>> + "encoder_3",
>>>> + "reset",
>>>> + "gated",
>>>> + "trigger",
>>>> + "external_clock",
>>>> +};
>>>> +
>>>> +static ssize_t stm32_tt_show_slave_mode(struct device *dev,
>>>> + struct device_attribute *attr,
>>>> + char *buf)
>>>> +{
>>>> + struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>> + struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>> + u32 smcr;
>>>> +
>>>> + regmap_read(priv->regmap, TIM_SMCR, &smcr);
>>>> + smcr &= TIM_SMCR_SMS;
>>>> +
>>>> + return snprintf(buf, PAGE_SIZE, "%s\n", slave_mode_table[smcr]);
>>>> +}
>>>> +
>>>> +static ssize_t stm32_tt_store_slave_mode(struct device *dev,
>>>> + struct device_attribute *attr,
>>>> + const char *buf, size_t len)
>>>> +{
>>>> + struct iio_dev *indio_dev = dev_to_iio_dev(dev);
>>>> + struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>> + int i;
>>>> +
>>>> + for (i = 0; i < ARRAY_SIZE(slave_mode_table); i++) {
>>>> + if (!strncmp(slave_mode_table[i], buf,
>>>> + strlen(slave_mode_table[i]))) {
>>>> + regmap_update_bits(priv->regmap,
>>>> + TIM_SMCR, TIM_SMCR_SMS, i);
>>>> + return len;
>>>> + }
>>>> + }
>>>> +
>>>> + return -EINVAL;
>>>> +}
>>>> +
>>>> +static IIO_CONST_ATTR(slave_mode_available,
>>>> +"disabled encoder_1 encoder_2 encoder_3 reset gated trigger external_clock");
>>>> +
>>>> +static IIO_DEVICE_ATTR(slave_mode, 0660,
>>>> + stm32_tt_show_slave_mode,
>>>> + stm32_tt_store_slave_mode,
>>>> + 0);
>>>> +
>>>> +static struct attribute *stm32_timer_attrs[] = {
>>>> + &iio_dev_attr_master_mode.dev_attr.attr,
>>>> + &iio_const_attr_master_mode_available.dev_attr.attr,
>>>> + &iio_dev_attr_slave_mode.dev_attr.attr,
>>>> + &iio_const_attr_slave_mode_available.dev_attr.attr,
>>>> + NULL,
>>>> +};
>>>> +
>>>> +static const struct attribute_group stm32_timer_attr_group = {
>>>> + .attrs = stm32_timer_attrs,
>>>> +};
>>>> +
>>>> +static const struct iio_trigger_ops timer_trigger_ops = {
>>>> + .owner = THIS_MODULE,
>>>> +};
>>>> +
>>>> +static int stm32_setup_iio_triggers(struct stm32_timer_trigger *priv)
>>>> +{
>>>> + int ret;
>>>> + const char * const *cur = priv->triggers;
>>>> +
>>>> + while (cur && *cur) {
>>>> + struct iio_trigger *trig;
>>>> +
>>>> + trig = devm_iio_trigger_alloc(priv->dev, "%s", *cur);
>>>> + if (!trig)
>>>> + return -ENOMEM;
>>>> +
>>>> + trig->dev.parent = priv->dev->parent;
>>>> + trig->ops = &timer_trigger_ops;
>>>> + trig->dev.groups = stm32_trigger_attr_groups;
>>>> + iio_trigger_set_drvdata(trig, priv);
>>>> +
>>>> + ret = devm_iio_trigger_register(priv->dev, trig);
>>>> + if (ret)
>>>> + return ret;
>>>> + cur++;
>>>> + }
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +/**
>>>> + * is_stm32_timer_trigger
>>>> + * @trig: trigger to be checked
>>>> + *
>>>> + * return true if the trigger is a valid stm32 iio timer trigger
>>>> + * either return false
>>>> + */
>>>> +bool is_stm32_timer_trigger(struct iio_trigger *trig)
>>>> +{
>>>> + return (trig->ops == &timer_trigger_ops);
>>>> +}
>>>> +EXPORT_SYMBOL(is_stm32_timer_trigger);
>>>> +
>>>> +static int stm32_validate_trigger(struct iio_dev *indio_dev,
>>>> + struct iio_trigger *trig)
>>>> +{
>>>> + struct stm32_timer_trigger *priv = iio_priv(indio_dev);
>>>> + const char * const *cur = priv->valids;
>>>> + unsigned int i = 0;
>>>> +
>>>> + if (!is_stm32_timer_trigger(trig))
>>>> + return -EINVAL;
>>>> +
>>>> + while (cur && *cur) {
>>>> + if (!strncmp(trig->name, *cur, strlen(trig->name))) {
>>>> + regmap_update_bits(priv->regmap,
>>>> + TIM_SMCR, TIM_SMCR_TS,
>>>> + i << TIM_SMCR_TS_SHIFT);
>>>> + return 0;
>>>> + }
>>>> + cur++;
>>>> + i++;
>>>> + }
>>>> +
>>>> + return -EINVAL;
>>>> +}
>>>> +
>>>> +static const struct iio_info stm32_trigger_info = {
>>>> + .driver_module = THIS_MODULE,
>>>> + .validate_trigger = stm32_validate_trigger,
>>>> + .attrs = &stm32_timer_attr_group,
>>>> +};
>>>> +
>>>> +static struct stm32_timer_trigger *stm32_setup_iio_device(struct device *dev)
>>>> +{
>>>> + struct iio_dev *indio_dev;
>>>> + int ret;
>>>> +
>>>> + indio_dev = devm_iio_device_alloc(dev,
>>>> + sizeof(struct stm32_timer_trigger));
>>>> + if (!indio_dev)
>>>> + return NULL;
>>>> +
>>>> + indio_dev->name = dev_name(dev);
>>>> + indio_dev->dev.parent = dev;
>>>> + indio_dev->info = &stm32_trigger_info;
>>>> + indio_dev->modes = INDIO_EVENT_TRIGGERED;
>>>> + indio_dev->num_channels = 0;
>>>> + indio_dev->dev.of_node = dev->of_node;
>>>> +
>>>> + ret = devm_iio_device_register(dev, indio_dev);
>>>> + if (ret)
>>>> + return NULL;
>>>> +
>>>> + return iio_priv(indio_dev);
>>>> +}
>>>> +
>>>> +static int stm32_timer_trigger_probe(struct platform_device *pdev)
>>>> +{
>>>> + struct device *dev = &pdev->dev;
>>>> + struct stm32_timer_trigger *priv;
>>>> + struct stm32_timers *ddata = dev_get_drvdata(pdev->dev.parent);
>>>> + unsigned int index;
>>>> + int ret;
>>>> +
>>>> + if (of_property_read_u32(dev->of_node, "reg", &index))
>>>> + return -EINVAL;
>>>> +
>>>> + if (index >= ARRAY_SIZE(triggers_table))
>>>> + return -EINVAL;
>>>> +
>>>> + /* Create an IIO device only if we have triggers to be validated */
>>>> + if (*valids_table[index])
>>>> + priv = stm32_setup_iio_device(dev);
>>>
>>> I still don't like this. Really feels like we shouldn't be creating an
>>> iio device with all the bagage that carries just to allow us to do the
>>> trigger trees. We ought to have a much more light weight solution for this
>>> functionality - we aren't typically even using the interrupt tree stuff
>>> that the triggers for devices are all really about.
>>>
>>> A simpler approach of allowing each trigger the option of a parent seems like
>>> it would be cleaner. Could be done entirely within this driver in the first
>>> instance. Basically it would just look like your master and slave attributes
>>> but have those under triggerX not iio:deviceX.
>>>
>>> We can work out how to make it more generic later - including perhaps the
>>> option to trigger from triggers outside this driver, using some parallel
>>> infrastructure to the device triggering.
>>>
>>>
>>>> + else
>>>> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>>>> +
>>>> + if (!priv)
>>>> + return -ENOMEM;
>>>> +
>>>> + priv->dev = dev;
>>>> + priv->regmap = ddata->regmap;
>>>> + priv->clk = ddata->clk;
>>>> + priv->max_arr = ddata->max_arr;
>>>> + priv->triggers = triggers_table[index];
>>>> + priv->valids = valids_table[index];
>>>> +
>>>> + ret = stm32_setup_iio_triggers(priv);
>>>> + if (ret)
>>>> + return ret;
>>>> +
>>>> + platform_set_drvdata(pdev, priv);
>>>> +
>>>> + return 0;
>>>> +}
>>>> +
>>>> +static const struct of_device_id stm32_trig_of_match[] = {
>>>> + { .compatible = "st,stm32-timer-trigger", },
>>>> + { /* end node */ },
>>>> +};
>>>> +MODULE_DEVICE_TABLE(of, stm32_trig_of_match);
>>>> +
>>>> +static struct platform_driver stm32_timer_trigger_driver = {
>>>> + .probe = stm32_timer_trigger_probe,
>>>> + .driver = {
>>>> + .name = "stm32-timer-trigger",
>>>> + .of_match_table = stm32_trig_of_match,
>>>> + },
>>>> +};
>>>> +module_platform_driver(stm32_timer_trigger_driver);
>>>> +
>>>> +MODULE_ALIAS("platform: stm32-timer-trigger");
>>>> +MODULE_DESCRIPTION("STMicroelectronics STM32 Timer Trigger driver");
>>>> +MODULE_LICENSE("GPL v2");
>>>> diff --git a/drivers/iio/trigger/Kconfig b/drivers/iio/trigger/Kconfig
>>>> index 809b2e7..f2af4fe 100644
>>>> --- a/drivers/iio/trigger/Kconfig
>>>> +++ b/drivers/iio/trigger/Kconfig
>>>> @@ -46,5 +46,4 @@ config IIO_SYSFS_TRIGGER
>>>>
>>>> To compile this driver as a module, choose M here: the
>>>> module will be called iio-trig-sysfs.
>>>> -
>>> Clean this up.
>>
>> ok
>>
>>>> endmenu
>>>> diff --git a/include/linux/iio/timer/stm32-timer-trigger.h b/include/linux/iio/timer/stm32-timer-trigger.h
>>>> new file mode 100644
>>>> index 0000000..55535ae
>>>> --- /dev/null
>>>> +++ b/include/linux/iio/timer/stm32-timer-trigger.h
>>>> @@ -0,0 +1,62 @@
>>>> +/*
>>>> + * Copyright (C) STMicroelectronics 2016
>>>> + *
>>>> + * Author: Benjamin Gaignard <benjamin.gaignard@st.com>
>>>> + *
>>>> + * License terms: GNU General Public License (GPL), version 2
>>>> + */
>>>> +
>>>> +#ifndef _STM32_TIMER_TRIGGER_H_
>>>> +#define _STM32_TIMER_TRIGGER_H_
>>>> +
>>>> +#define TIM1_TRGO "tim1_trgo"
>>>> +#define TIM1_CH1 "tim1_ch1"
>>>> +#define TIM1_CH2 "tim1_ch2"
>>>> +#define TIM1_CH3 "tim1_ch3"
>>>> +#define TIM1_CH4 "tim1_ch4"
>>>> +
>>>> +#define TIM2_TRGO "tim2_trgo"
>>>> +#define TIM2_CH1 "tim2_ch1"
>>>> +#define TIM2_CH2 "tim2_ch2"
>>>> +#define TIM2_CH3 "tim2_ch3"
>>>> +#define TIM2_CH4 "tim2_ch4"
>>>> +
>>>> +#define TIM3_TRGO "tim3_trgo"
>>>> +#define TIM3_CH1 "tim3_ch1"
>>>> +#define TIM3_CH2 "tim3_ch2"
>>>> +#define TIM3_CH3 "tim3_ch3"
>>>> +#define TIM3_CH4 "tim3_ch4"
>>>> +
>>>> +#define TIM4_TRGO "tim4_trgo"
>>>> +#define TIM4_CH1 "tim4_ch1"
>>>> +#define TIM4_CH2 "tim4_ch2"
>>>> +#define TIM4_CH3 "tim4_ch3"
>>>> +#define TIM4_CH4 "tim4_ch4"
>>>> +
>>>> +#define TIM5_TRGO "tim5_trgo"
>>>> +#define TIM5_CH1 "tim5_ch1"
>>>> +#define TIM5_CH2 "tim5_ch2"
>>>> +#define TIM5_CH3 "tim5_ch3"
>>>> +#define TIM5_CH4 "tim5_ch4"
>>>> +
>>>> +#define TIM6_TRGO "tim6_trgo"
>>>> +
>>>> +#define TIM7_TRGO "tim7_trgo"
>>>> +
>>>> +#define TIM8_TRGO "tim8_trgo"
>>>> +#define TIM8_CH1 "tim8_ch1"
>>>> +#define TIM8_CH2 "tim8_ch2"
>>>> +#define TIM8_CH3 "tim8_ch3"
>>>> +#define TIM8_CH4 "tim8_ch4"
>>>> +
>>>> +#define TIM9_TRGO "tim9_trgo"
>>>> +#define TIM9_CH1 "tim9_ch1"
>>>> +#define TIM9_CH2 "tim9_ch2"
>>>> +
>>>> +#define TIM12_TRGO "tim12_trgo"
>>>> +#define TIM12_CH1 "tim12_ch1"
>>>> +#define TIM12_CH2 "tim12_ch2"
>>>> +
>>>> +bool is_stm32_timer_trigger(struct iio_trigger *trig);
>>>> +
>>>> +#endif
>>>>
>>>
>>
>>
>>
>
--
Benjamin Gaignard
Graphic Study Group
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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