* Re: [PATCH 2/2] ARM: dts: keystone: Add minimum support for K2G ICE evm
From: Rob Herring @ 2017-04-03 16:27 UTC (permalink / raw)
To: Franklin S Cooper Jr
Cc: linux-I+IVW8TIWO2tmTQ+vhA3Yw, ssantosh-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20170330152907.12595-3-fcooper-l0cyMroinI0@public.gmane.org>
On Thu, Mar 30, 2017 at 10:29:07AM -0500, Franklin S Cooper Jr wrote:
> Add barebones dts support for TI's K2G Industrial Communication Engine evm.
> This dts allows the board to boot using a ram based filesystem.
>
> Signed-off-by: Franklin S Cooper Jr <fcooper-l0cyMroinI0@public.gmane.org>
> ---
> arch/arm/boot/dts/Makefile | 3 ++-
> arch/arm/boot/dts/keystone-k2g-ice.dts | 42 ++++++++++++++++++++++++++++++++++
> 2 files changed, 44 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/keystone-k2g-ice.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 0118084..01a98f1 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -193,7 +193,8 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
> keystone-k2hk-evm.dtb \
> keystone-k2l-evm.dtb \
> keystone-k2e-evm.dtb \
> - keystone-k2g-evm.dtb
> + keystone-k2g-evm.dtb \
> + keystone-k2g-ice.dtb
> dtb-$(CONFIG_MACH_KIRKWOOD) += \
> kirkwood-b3.dtb \
> kirkwood-blackarmor-nas220.dtb \
> diff --git a/arch/arm/boot/dts/keystone-k2g-ice.dts b/arch/arm/boot/dts/keystone-k2g-ice.dts
> new file mode 100644
> index 0000000..9ab5f42
> --- /dev/null
> +++ b/arch/arm/boot/dts/keystone-k2g-ice.dts
> @@ -0,0 +1,42 @@
> +/*
> + * Device Tree Source for K2G Industrial Communication Engine EVM
> + *
> + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
> + * kind, whether express or implied; without even the implied warranty
> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
You can Use SPDX tags here.
> + */
> +/dts-v1/;
> +
> +#include "keystone-k2g.dtsi"
> +
> +/ {
> + compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone";
> + model = "Texas Instruments K2G Industrial Communication EVM";
> +
> + memory {
memory@800000000
unless that gives you bootloader(s) problems.
> + device_type = "memory";
> + reg = <0x00000008 0x00000000 0x00000000 0x20000000>;
> + };
> +};
> +
> +&k2g_pinctrl {
> + uart0_pins: pinmux_uart0_pins {
> + pinctrl-single,pins = <
> + K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
> + K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
> + >;
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins>;
> + status = "okay";
> +};
> --
> 2.10.0
>
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* Re: [PATCH 1/2] ARM: keystone: Create new binding for K2G ICE evm
From: Rob Herring @ 2017-04-03 16:25 UTC (permalink / raw)
To: Franklin S Cooper Jr
Cc: linux-I+IVW8TIWO2tmTQ+vhA3Yw, ssantosh-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20170330152907.12595-2-fcooper-l0cyMroinI0@public.gmane.org>
On Thu, Mar 30, 2017 at 10:29:06AM -0500, Franklin S Cooper Jr wrote:
> Add a new binding for the new K2G Industrial Communication Engine evm.
>
> Signed-off-by: Franklin S Cooper Jr <fcooper-l0cyMroinI0@public.gmane.org>
> ---
> Documentation/devicetree/bindings/arm/keystone/keystone.txt | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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* Re: [PATCH v2 1/8] dt-bindings: Document STM32 DCMI bindings
From: Rob Herring @ 2017-04-03 16:23 UTC (permalink / raw)
To: Hugues Fruchet
Cc: Mark Rutland, Maxime Coquelin, Alexandre Torgue,
Mauro Carvalho Chehab, Hans Verkuil,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-media-u79uwXL29TY76Z2rM5mHXA, Benjamin Gaignard,
Yannick Fertre
In-Reply-To: <1490887667-8880-2-git-send-email-hugues.fruchet-qxv4g6HH51o@public.gmane.org>
On Thu, Mar 30, 2017 at 05:27:40PM +0200, Hugues Fruchet wrote:
> This adds documentation of device tree bindings for the STM32 DCMI
> (Digital Camera Memory Interface).
>
> Signed-off-by: Hugues Fruchet <hugues.fruchet-qxv4g6HH51o@public.gmane.org>
> ---
> .../devicetree/bindings/media/st,stm32-dcmi.txt | 85 ++++++++++++++++++++++
> 1 file changed, 85 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/st,stm32-dcmi.txt
>
> diff --git a/Documentation/devicetree/bindings/media/st,stm32-dcmi.txt b/Documentation/devicetree/bindings/media/st,stm32-dcmi.txt
> new file mode 100644
> index 0000000..8180f63
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/st,stm32-dcmi.txt
> @@ -0,0 +1,85 @@
> +STMicroelectronics STM32 Digital Camera Memory Interface (DCMI)
> +
> +Required properties:
> +- compatible: "st,stm32-dcmi"
Same block and same errata on all stm32 variants?
> +- reg: physical base address and length of the registers set for the device
> +- interrupts: should contain IRQ line for the DCMI
> +- clocks: list of clock specifiers, corresponding to entries in
> + the clock-names property
> +- clock-names: must contain "mclk", which is the DCMI peripherial clock
> +- resets: reference to a reset controller
> +- reset-names: see Documentation/devicetree/bindings/reset/st,stm32-rcc.txt
> +
> +DCMI supports a single port node with parallel bus. It should contain one
> +'port' child node with child 'endpoint' node. Please refer to the bindings
> +defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
> +
> +Example:
> +
> +Device node example
> +-------------------
> + dcmi: dcmi@50050000 {
> + compatible = "st,stm32-dcmi";
> + reg = <0x50050000 0x400>;
> + interrupts = <78>;
> + resets = <&rcc STM32F4_AHB2_RESET(DCMI)>;
> + clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>;
> + clock-names = "mclk";
> + pinctrl-names = "default";
> + pinctrl-0 = <&dcmi_pins>;
Not documented.
> + dmas = <&dma2 1 1 0x414 0x3>;
> + dma-names = "tx";
Not documented.
> + status = "disabled";
Drop status from examples.
> + };
> +
> +Board setup example
Please don't split examples. That's just source level details and not
part of the ABI.
> +-------------------
> +This example is extracted from STM32F429-EVAL board devicetree.
> +Please note that on this board, the camera sensor reset & power-down
> +line level are inverted (so reset is active high and power-down is
> +active low).
> +
> +/ {
> + [...]
> + clocks {
> + clk_ext_camera: clk-ext-camera {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <24000000>;
> + };
> + };
> + [...]
> +};
> +
> +&dcmi {
> + status = "okay";
> +
> + port {
> + dcmi_0: endpoint@0 {
> + remote-endpoint = <&ov2640_0>;
> + bus-width = <8>;
> + hsync-active = <0>;
> + vsync-active = <0>;
> + pclk-sample = <1>;
> + };
> + };
> +};
> +
> +&i2c@1 {
> + [...]
> + ov2640: camera@30 {
> + compatible = "ovti,ov2640";
> + reg = <0x30>;
> + resetb-gpios = <&stmpegpio 2 GPIO_ACTIVE_HIGH>;
> + pwdn-gpios = <&stmpegpio 0 GPIO_ACTIVE_LOW>;
> + clocks = <&clk_ext_camera>;
> + clock-names = "xvclk";
> + status = "okay";
> +
> + port {
> + ov2640_0: endpoint {
> + remote-endpoint = <&dcmi_0>;
> + };
> + };
> + };
> +};
> --
> 1.9.1
>
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* Re: [PATCH v7 06/13] dt: bindings: Add bindings for Marvell Xenon SD Host Controller
From: Rob Herring @ 2017-04-03 16:19 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Ulf Hansson, Adrian Hunter, linux-mmc, Jason Cooper, Andrew Lunn,
Sebastian Hesselbarth, Thomas Petazzoni, linux-arm-kernel,
Mike Turquette, Stephen Boyd, linux-clk, linux-kernel, devicetree,
Ziji Hu, Jimmy Xu, Jisheng Zhang, Nadav Haklai, Ryan Gao,
Doug Jones, Victor Gu, Wei(SOCP) Liu, Wilson Ding
In-Reply-To: <ecacddaa5d38b678e1c8c95b56f65f4a39527ead.1490886907.git-series.gregory.clement@free-electrons.com>
On Thu, Mar 30, 2017 at 05:22:58PM +0200, Gregory CLEMENT wrote:
> From: Hu Ziji <huziji@marvell.com>
>
> Marvell Xenon SDHC can support eMMC/SD/SDIO.
> Add Xenon-specific properties.
> Also add properties for Xenon PHY setting.
>
> Signed-off-by: Hu Ziji <huziji@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
> Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt | 170 +++++++-
> 1 file changed, 170 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt
I acked v6 and it seems like a minor change, though I had to search for
both because there is no revision history nor explanation why you didn't
add my ack.
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [RFC PATCH 1/2] dt-bindings: mtd: Add Cavium SOCs NAND bindings
From: Jan Glauber @ 2017-04-03 16:18 UTC (permalink / raw)
To: Rob Herring
Cc: Boris Brezillon, Richard Weinberger, David Woodhouse,
Brian Norris, Marek Vasut, Cyrille Pitchen,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <CAL_JsqJ2VgF_Lp-vpdn6VL71K4z6Mu7DWYSaLZ_N0U+jaTuPsQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Mon, Apr 03, 2017 at 09:47:05AM -0500, Rob Herring wrote:
> On Mon, Apr 3, 2017 at 9:38 AM, Jan Glauber
> <jan.glauber-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> wrote:
> > On Mon, Apr 03, 2017 at 08:29:37AM -0500, Rob Herring wrote:
> >> On Mon, Mar 27, 2017 at 06:05:23PM +0200, Jan Glauber wrote:
> >> > Add device tree binding description for Cavium SOC nand flash controller.
> >> >
> >> > CC: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> >> > CC: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
> >> > CC: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> >> >
> >> > Signed-off-by: Jan Glauber <jglauber-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
> >> > ---
> >> > .../devicetree/bindings/mtd/cavium_nand.txt | 32 ++++++++++++++++++++++
> >> > 1 file changed, 32 insertions(+)
> >> > create mode 100644 Documentation/devicetree/bindings/mtd/cavium_nand.txt
> >> >
> >> > diff --git a/Documentation/devicetree/bindings/mtd/cavium_nand.txt b/Documentation/devicetree/bindings/mtd/cavium_nand.txt
> >> > new file mode 100644
> >> > index 0000000..4698d1f
> >> > --- /dev/null
> >> > +++ b/Documentation/devicetree/bindings/mtd/cavium_nand.txt
> >> > @@ -0,0 +1,32 @@
> >> > +* Cavium NAND controller
> >> > +
> >> > +Required properties:
> >> > +
> >> > +- compatible: should be "cavium,cn8xxx-nand"
> >>
> >> Don't use wildcards in compatible strings. For PCI devices, this should
> >> be based on the PCI vendor and device IDs.
> >>
> >
> > Is there a syntax for compatible PCI devices? I'm afraid I've not seen
> > this yet, can you give an example?
>
> www.o3one.org/hwdocs/openfirmware/pci_supplement_2_1.pdf
Thanks, I probably should have read this before...
So it will be something like:
compatible = "pci177d,a04f"
A bit unreadable, but it solves the wildcard issue.
> > Most of Cavium's devices are PCI devices, we just added the compatible
> > as convenience and usually it is not parsed.
>
> Linux doesn't parse it, but it's still required in the binding.
OK.
--Jan
> Rob
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* Re: [PATCH v3 01/11] dt-bindings: add binding for the Allwinner DE2 CCU
From: Icenowy Zheng @ 2017-04-03 16:18 UTC (permalink / raw)
To: Rob Herring
Cc: Maxime Ripard, Chen-Yu Tsai, Jernej Skrabec,
linux-clk-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, Icenowy Zheng
In-Reply-To: <20170403153323.kmq3ku7h3sj7fp4g@rob-hp-laptop>
在 2017年04月03日 23:33, Rob Herring 写道:
> On Thu, Mar 30, 2017 at 03:46:03AM +0800, Icenowy Zheng wrote:
>> From: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
>>
>> Allwinner "Display Engine 2.0" contains some clock controls in it.
>>
>> In order to add them as clock drivers, we need a device tree binding.
>> Add the binding here.
>>
>> Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
>> ---
>> Changes in v3:
>> - Fill the address space length of DE2 CCU to 0x100000, just reach the start of mixer0.
>
> Why? You waste virtual memory space making this bigger than it needs to
> be. Not an issue so much for 64-bit.
>
>>
>> .../devicetree/bindings/clock/sun8i-de2.txt | 31 ++++++++++++++++++++++
>> 1 file changed, 31 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/clock/sun8i-de2.txt
>>
>> diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
>> new file mode 100644
>> index 000000000000..34cf79c05f13
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
>> @@ -0,0 +1,31 @@
>> +Allwinner Display Engine 2.0 Clock Control Binding
>> +--------------------------------------------------
>> +
>> +Required properties :
>> +- compatible: must contain one of the following compatibles:
>> + - "allwinner,sun8i-a83t-de2-clk"
>> + - "allwinner,sun50i-a64-de2-clk"
>> + - "allwinner,sun50i-h5-de2-clk"
>> +
>> +- reg: Must contain the registers base address and length
>> +- clocks: phandle to the clocks feeding the display engine subsystem.
>> + Three are needed:
>> + - "mod": the display engine module clock
>> + - "bus": the bus clock for the whole display engine subsystem
>> +- clock-names: Must contain the clock names described just above
>> +- resets: phandle to the reset control for the display engine subsystem.
>> +- #clock-cells : must contain 1
>> +- #reset-cells : must contain 1
>> +
>> +Example:
>> +de2_clocks: clock@01000000 {
>
> Drop the leading 0s. dtc in linux-next will now warn on this with W=1
> compile. Looks like sunxi has a lot of them. Please fix so we don't keep
> repeating this same copy-n-paste.
Thanks ;-)
I will try to kill them all ;-)
>
>> + compatible = "allwinner,sun50i-a64-de2-clk";
>> + reg = <0x01000000 0x100000>;
>> + clocks = <&ccu CLK_DE>,
>> + <&ccu CLK_BUS_DE>;
>> + clock-names = "mod",
>> + "bus";
>> + resets = <&ccu RST_BUS_DE>;
>> + #clock-cells = <1>;
>> + #reset-cells = <1>;
>> +};
>> --
>> 2.12.0
>>
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^ permalink raw reply
* Re: [PATCH] of: irq: Export of_irq_count()
From: Rob Herring @ 2017-04-03 16:13 UTC (permalink / raw)
To: Thierry Reding
Cc: Frank Rowand, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <20170403155547.19917-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Mon, Apr 3, 2017 at 10:55 AM, Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> of_irq_count() is handy for obtaining the number of interrupts assigned
> to a device tree node. It is reasonable to want to access this function
> from loadable modules, so export the symbol to allow that.
>
> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> Hi Rob, Frank,
>
> This patch is required for the new Tegra186 GPIO driver I'm trying to
> get merged for v4.12. It'd be great if I could get an Acked-by from you
> so that the patch can be merged through the GPIO tree along with a few
> other prerequisites for the new driver.
Use platform_irq_count instead.
Rob
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* Re: [PATCH v4 1/5] dt-bindings: watchdog: Document STM32 IWDG bindings
From: Rob Herring @ 2017-04-03 16:10 UTC (permalink / raw)
To: Yannick Fertre
Cc: Wim Van Sebroeck, Guenter Roeck, Alexandre TORGUE,
Benjamin Gaignard, Maxime Coquelin,
linux-watchdog-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Philippe Cornu,
Gabriel FERNANDEZ, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1490886926-20585-2-git-send-email-yannick.fertre-qxv4g6HH51o@public.gmane.org>
On Thu, Mar 30, 2017 at 05:15:22PM +0200, Yannick Fertre wrote:
> This adds documentation of device tree bindings for the STM32 IWDG
> (Independent WatchDoG).
>
> Signed-off-by: Yannick Fertre <yannick.fertre-qxv4g6HH51o@public.gmane.org>
>
> Author: Yannick Fertre <yannick.fertre-qxv4g6HH51o@public.gmane.org>
This shouldn't be here.
> ---
> .../devicetree/bindings/watchdog/st,stm32-iwdg.txt | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.txt
Otherwise,
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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* Re: [PATCH v2] clk: stm32h7: Add stm32h743 clock driver
From: Rob Herring @ 2017-04-03 16:04 UTC (permalink / raw)
To: Gabriel Fernandez
Cc: Mark Rutland, Russell King, Maxime Coquelin, Alexandre Torgue,
Michael Turquette, Stephen Boyd, Nicolas Pitre, Arnd Bergmann,
Daniel Thompson, Andrea Merello, Radosław Pietrzyk,
Lee Jones, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk
In-Reply-To: <20170403143958.gi7vyhianzetnxz2@rob-hp-laptop>
On Mon, Apr 3, 2017 at 9:39 AM, Rob Herring <robh@kernel.org> wrote:
> On Wed, Mar 29, 2017 at 11:08:22AM +0200, gabriel.fernandez@st.com wrote:
>> From: Gabriel Fernandez <gabriel.fernandez@st.com>
>>
>> This patch enables clocks for STM32H743 boards.
>>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
>>
>> Just for the MFD changes:
>> Acked-by: Lee Jones <lee.jones@linaro.org>
>>
>> +Required properties for pll node:
>> +- compatible: Should be:
>> + "stm32h7-pll"
>
> stm,stm32h7-pll
Err, I meant st,stm32h7-pll.
>
> With that,
>
> Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v3 0/7] rtc: Reuse rtc-sh driver to support RZ/A1
From: Alexandre Belloni @ 2017-04-03 16:03 UTC (permalink / raw)
To: Chris Brandt
Cc: Alessandro Zummo, Rob Herring, Mark Rutland, Simon Horman,
Geert Uytterhoeven, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170329173035.67477-1-chris.brandt-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
Hi,
On 29/03/2017 at 10:30:28 -0700, Chris Brandt wrote:
> Basically, the same RTC that was used in SuperH devices is now used in
> RZ/A1 devices. Therefore with some slight changes, that driver can be
> reused.
>
> Additionally, since ARM architectures require Device Tree configurations,
> device tree support has been added.
>
> This was tested on RZ/A1H RSK board. Once the correct time was programmed
> into the RTC running off a 32.768kHz crystal, you can retain an accurate
> system clock between reboots (hard and soft) until power is finally removed
> from the board (there is no batter backup on the RSK board).
>
> v3:
> * remove 'power-domains' from example in documentation
> * update commit message subject and body of dt-bindings
>
> v2:
> * removed HAVE_CLK from Kconfig
> * when using DT, look for "fck" instead of "rtc0"
> * changed (res == NULL) to (!res)
> * added Reviewed-by for rtc-sh.c
> * added interrupt-names and clock-names
> * clocks now include counting sources
> * added clock-names "fck", "rtc_x1", "rtc_x3", "extal"
> * changed 'is a RTC' to 'is an RTC' in commit message
> * changed "rtc0" to "rtc"
> * Added clock nodes for RTC_X1 and RTC_X3 pin inputs
> * each commit now has a log message
>
>
> Chris Brandt (7):
> rtc: rtc-sh: add support for rza series
> dt-bindings: rtc: document the rtc-sh bindings
I applied those two, I'll let Simon take the device tree patches.
Thanks!
> ARM: dts: r7s72100: add rtc clock to device tree
> ARM: dts: r7s72100: add RTC_X clock inputs to device tree
> ARM: dts: r7s72100: add rtc to device tree
> ARM: dts: rskrza1: set rtc_x1 clock value
> ARM: dts: rskrza1: add rtc DT support
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* [PATCH] arm: dts: genmai: Enable rtc and rtc_x1 clock
From: Jacopo Mondi @ 2017-04-03 16:03 UTC (permalink / raw)
To: chris.brandt-zM6kxYcvzFBBDgjK7y7TUQ,
horms+renesas-/R6kz+dDXgpPR4JQBCEnsQ,
geert-Td1EMuHUCqxL1ZNQvxDV9g, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8
Cc: rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA
Enable the 32.768 kHz RTC_X1 clock by setting the frequency value to
non-zero and enable the realtime clock.
Signed-off-by: Jacopo Mondi <jacopo+renesas-AW8dsiIh9cEdnm+yROfE0A@public.gmane.org>
---
This patch depends on Chris Brandt's series
"rtc: Reuse rtc-sh driver to support RZ/A1"
Please queue this on top of that.
arch/arm/boot/dts/r7s72100-genmai.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
index 118a8e2..52a7b58 100644
--- a/arch/arm/boot/dts/r7s72100-genmai.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
@@ -44,6 +44,10 @@
clock-frequency = <48000000>;
};
+&rtc_x1_clk {
+ clock-frequency = <32768>;
+};
+
&mtu2 {
status = "okay";
};
@@ -59,6 +63,10 @@
};
};
+&rtc {
+ status = "okay";
+};
+
&scif2 {
status = "okay";
};
--
2.7.4
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^ permalink raw reply related
* Re: [PATCH 1/3] pinctrl: Add bindings for ARTPEC-6 pinmux
From: Rob Herring @ 2017-04-03 16:01 UTC (permalink / raw)
To: Jesper Nilsson
Cc: Jesper Nilsson, Lars Persson, Niklas Cassel, Linus Walleij,
Mark Rutland, Greg Kroah-Hartman, David S. Miller,
Geert Uytterhoeven, Mauro Carvalho Chehab,
linux-arm-kernel-VrBV9hrLPhE, linux-gpio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170330112744.GE29118-VrBV9hrLPhE@public.gmane.org>
On Thu, Mar 30, 2017 at 01:27:44PM +0200, Jesper Nilsson wrote:
> Add the bindings for the pinmux functions in the
> ARTPEC-6 SoC, including bias and drive strength.
>
> Signed-off-by: Jesper Nilsson <jesper.nilsson-VrBV9hrLPhE@public.gmane.org>
> ---
> .../bindings/pinctrl/axis,artpec6-pinctrl.txt | 85 ++++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 86 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
A couple of nits, otherwise:
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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* Re: [PATCH 4/4] dt-bindings: input: Add Atmel PTC subsystem bindings
From: Alexandre Belloni @ 2017-04-03 15:59 UTC (permalink / raw)
To: Ludovic Desroches
Cc: linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
nicolas.ferre-UWL1GkI3JZL3oGB3hsPCZA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170331152250.12758-5-ludovic.desroches-UWL1GkI3JZL3oGB3hsPCZA@public.gmane.org>
I think this patch should be first so you add the bindings before the
driver.
On 31/03/2017 at 17:22:50 +0200, Ludovic Desroches wrote:
> Add description of the Atmel PTC subsystem bindings.
>
> Signed-off-by: Ludovic Desroches <ludovic.desroches-UWL1GkI3JZL3oGB3hsPCZA@public.gmane.org>
> ---
> .../devicetree/bindings/input/atmel,ptc.txt | 67 ++++++++++++++++++++++
> 1 file changed, 67 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/input/atmel,ptc.txt
>
> diff --git a/Documentation/devicetree/bindings/input/atmel,ptc.txt b/Documentation/devicetree/bindings/input/atmel,ptc.txt
> new file mode 100644
> index 0000000..a183fd5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/input/atmel,ptc.txt
> @@ -0,0 +1,67 @@
> +Atmel PTC Subsystem
> +
> +The Atmel Peripheral Touch Controller subsystem offers built-in hardware
> +for capacitive touch measurement on sensors that function as buttons, sliders
> +and wheels.
> +
> +1) PTC Subsystem node
> +
> +Required properties:
> +- compatible: Must be "atmel,sama5d2-ptc"
> +- reg: Address, length of the shared memory and ppp registers location
> + and length.
> +- clocks: Phandlers to the clocks.
> +- clock-names: Must be "ptc_clk", "ptc_int_osc", "slow_clk".
> +- #address-cells: Must be one. The cell is the button or scroller id.
> +- #size-cells: Must be zero.
> +
> +Example:
> + ptc@fc060000 {
> + compatible = "atmel,sama5d2-ptc";
> + reg = <0x00800000 0x10000
> + 0xfc060000 0xcf>;
> + interrupts = <58 IRQ_TYPE_LEVEL_HIGH 7>;
> + clocks = <&ptc_clk>, <&main>, <&clk32k>;
> + clock-names = "ptc_clk", "ptc_int_osc", "slow_clk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + [ child node definitions... ]
> + };
> +
> +2) Scroller / buttons subnodes
> +
> +Subnodes describe the kind of sensors the customer want to use. They have to be
> +named according to their function: button, slider or wheel.
> +
> +2.1) Scroller subnodes
> +
> +Required properties:
> +- reg: Id of the scroller, each id must be different.
> +
> +Example:
> + slider@0 {
> + reg = <0>;
> + };
> +
> + wheel@1 {
> + reg = <1>;
> + };
> +
> +2.2) Button subnodes
> +
> +Required properties:
> +- reg: Id of node used for the button, each id must be
> + different.
> +- linux,keycode: Key code of the button.
> +
> +Example:
> + button@8 {
> + reg = <8>;
> + linux,keycode = <2>;
> + };
> +
> + button@9 {
> + reg = <9>;
> + linux,keycode = <3>;
> + };
> --
> 2.9.0
>
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH 1/4] input: misc: introduce Atmel PTC driver
From: Alexandre Belloni @ 2017-04-03 15:58 UTC (permalink / raw)
To: Ludovic Desroches
Cc: linux-input-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
nicolas.ferre-UWL1GkI3JZL3oGB3hsPCZA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Ludovic Desroches
In-Reply-To: <20170331152250.12758-2-ludovic.desroches-UWL1GkI3JZL3oGB3hsPCZA@public.gmane.org>
On 31/03/2017 at 17:22:47 +0200, Ludovic Desroches wrote:
> From: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
I think you probably want to switch to your microchip email.
Also, this requires a proper commit message.
>
> Signed-off-by: Ludovic Desroches <ludovic.desroches-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
> +struct atmel_ptc {
> + void __iomem *ppp_regs;
> + void __iomem *firmware;
> + int irq;
> + uint8_t imr;
> + volatile struct atmel_qtm_mailbox __iomem *qtm_mb;
> + struct clk *clk_per;
> + struct clk *clk_int_osc;
> + struct clk *clk_slow;
> + struct device *dev;
> + struct completion ppp_ack;
> + unsigned int button_keycode[ATMEL_PTC_MAX_NODES];
> + struct input_dev *buttons_input;
> + struct input_dev *scroller_input[ATMEL_PTC_MAX_SCROLLERS];
> + bool buttons_registered;
> + bool scroller_registered[ATMEL_PTC_MAX_SCROLLERS];
> + uint32_t button_event[ATMEL_PTC_MAX_NODES/32];
> + uint32_t button_state[ATMEL_PTC_MAX_NODES/32];
> + uint32_t scroller_event;
> + uint32_t scroller_state;
You should use u8, u16 and u32 instead of uint8_t, uint16_t and
uint32_t.
> diff --git a/include/uapi/linux/atmel_ptc.h b/include/uapi/linux/atmel_ptc.h
> new file mode 100644
> index 0000000..d15c4df
> --- /dev/null
> +++ b/include/uapi/linux/atmel_ptc.h
Is there any sample application showing how to configure the PTC?
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCHv4 25/29] drm/omap: displays: panel-dpi: Support for handling backlight devices
From: Rob Herring @ 2017-04-03 15:58 UTC (permalink / raw)
To: Tomi Valkeinen
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Laurent Pinchart,
Jyri Sarha, Peter Ujfalusi, devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1490872529-23084-26-git-send-email-tomi.valkeinen-l0cyMroinI0@public.gmane.org>
On Thu, Mar 30, 2017 at 02:15:25PM +0300, Tomi Valkeinen wrote:
> From: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>
>
> The associated backlight device can be configured via DT by providing the
> phandle to the device.
>
> If the backlight device is configured, the driver can manage the backligt
> along with the panel's power state, iow it can turn on the backlight when
> the panel is enabled and turn it off when the panel is disabled.
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi-l0cyMroinI0@public.gmane.org>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen-l0cyMroinI0@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> ---
> .../bindings/display/panel/panel-dpi.txt | 3 ++
> drivers/gpu/drm/omapdrm/displays/panel-dpi.c | 37 ++++++++++++++++++++--
> 2 files changed, 38 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/panel-dpi.txt b/Documentation/devicetree/bindings/display/panel/panel-dpi.txt
> index d4add13e592d..6b203bc4d932 100644
> --- a/Documentation/devicetree/bindings/display/panel/panel-dpi.txt
> +++ b/Documentation/devicetree/bindings/display/panel/panel-dpi.txt
> @@ -9,6 +9,7 @@ Optional properties:
> - enable-gpios: panel enable gpio
> - reset-gpios: GPIO to control the RESET pin
> - vcc-supply: phandle of regulator that will be used to enable power to the display
> +- backlight: phandle of the backlight device
Any panel can have a backlight, so please add to panel/panel.txt
instead.
>
> Required nodes:
> - "panel-timing" containing video timings
> @@ -22,6 +23,8 @@ lcd0: display@0 {
> compatible = "samsung,lte430wq-f0c", "panel-dpi";
> label = "lcd";
>
> + backlight = <&backlight>;
> +
> port {
> lcd_in: endpoint {
> remote-endpoint = <&dpi_out>;
--
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^ permalink raw reply
* RE: [PATCH V7 4/7] mfd: da9061: MFD core support
From: Steve Twiss @ 2017-04-03 15:56 UTC (permalink / raw)
To: Lee Jones
Cc: LINUX-KERNEL, DEVICETREE, Dmitry Torokhov, Eduardo Valentin,
Guenter Roeck, LINUX-INPUT, LINUX-PM, LINUX-WATCHDOG,
Liam Girdwood, Mark Brown, Mark Rutland, Rob Herring,
Support Opensource, Wim Van Sebroeck, Zhang Rui
In-Reply-To: <20170403143049.qyi4dagwi4cdenok@dell>
On 03 April 2017 15:31, Lee Jones wrote:
> Subject: Re: [PATCH V7 4/7] mfd: da9061: MFD core support
>
> On Mon, 03 Apr 2017, Steve Twiss wrote:
> > On 03 April 2017 15:12, Lee Jones wrote:
> >
> > > > @@ -475,7 +855,25 @@ static int da9062_i2c_probe(struct i2c_client *i2c,
> > > > return -EINVAL;
> > > > }
> > > >
> > > > - chip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config);
> > > > + switch (chip->chip_type) {
> > > > + case(COMPAT_TYPE_DA9061):
> > >
> > > Brackets around the case value?
> > >
> > > That's a new one on me.
> >
> > Hm. Do you want me to resend it without braces?
>
> Yes please. And a space after the 'case'.
Hi Lee,
I have resent PATCH V7 to change "case(X):" to be "case X:".
- Removed brackets surrounding case statements for
case COMPAT_TYPE_DA9061:
case COMPAT_TYPE_DA9062:
New patch is here:
https://lkml.org/lkml/2017/4/3/462
The patch it is called by the same title "[PATCH V7 4/7] mfd: da9061: MFD core support".
I've not updated the whole patch-set or changed the patch version number from V7.
Regards,
Steve
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: Add documentation for GP10B GPU
From: Rob Herring @ 2017-04-03 15:55 UTC (permalink / raw)
To: Alexandre Courbot
Cc: Thierry Reding, Jonathan Hunter, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-tegra-u79uwXL29TY76Z2rM5mHXA, gnurou-Re5JQEeQqe8AvxtiuMwx3w
In-Reply-To: <20170330092644.11890-1-acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On Thu, Mar 30, 2017 at 06:26:44PM +0900, Alexandre Courbot wrote:
> GP10B's definition is mostly similar to GK20A's and GM20B's. The only
> noticeable difference is the use of power domains instead of a regulator
> for power supply.
>
> Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> Changes since v1:
> - It's much better when it compiles.
>
> .../devicetree/bindings/gpu/nvidia,gk20a.txt | 25 +++++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
^ permalink raw reply
* [PATCH] of: irq: Export of_irq_count()
From: Thierry Reding @ 2017-04-03 15:55 UTC (permalink / raw)
To: Rob Herring
Cc: Frank Rowand, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
of_irq_count() is handy for obtaining the number of interrupts assigned
to a device tree node. It is reasonable to want to access this function
from loadable modules, so export the symbol to allow that.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
Hi Rob, Frank,
This patch is required for the new Tegra186 GPIO driver I'm trying to
get merged for v4.12. It'd be great if I could get an Acked-by from you
so that the patch can be merged through the GPIO tree along with a few
other prerequisites for the new driver.
Potential for conflicts is rather minimal given the line count.
Thanks,
Thierry
drivers/of/irq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 7c56b72d1dc6..3deaada2ff29 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -458,6 +458,7 @@ int of_irq_count(struct device_node *dev)
return nr;
}
+EXPORT_SYMBOL_GPL(of_irq_count);
/**
* of_irq_to_resource_table - Fill in resource table with node's IRQ info
--
2.12.0
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^ permalink raw reply related
* Re: [PATCH 1/5 v3] iio: xoadc: augment DT bindings a bit
From: Rob Herring @ 2017-04-03 15:54 UTC (permalink / raw)
To: Linus Walleij
Cc: Jonathan Cameron, linux-iio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170330080541.4065-1-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
On Thu, Mar 30, 2017 at 10:05:41AM +0200, Linus Walleij wrote:
> In order to accommodate in a logical manner for the premuxed channels
> in PM8921 and the similarly addressed channels in later PMICs, we
> need a twocell arrangement with premux and analog mux setting as
> a tuple to uniquely identify a hardware channel.
>
> These bindings are not yet in use, so it should be fine to augment
> them before we actually start using it in drivers and device trees.
>
> This scheme came out of lengthy discussions and reverse-engineering
> and reading of the few information sources we have.
>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Suggested-by: Björn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> ---
> ChangeLog v2->v3:
> - Drop leading zeroes on unit addresses.
> ChangeLog v1->v2:
> - Name nodes with <01 02> in a foo@0102 pattern.
> - Minor spelling nits.
> - Delete flimsy leftover docs from an interrim development path.
> ---
> .../bindings/iio/adc/qcom,pm8xxx-xoadc.txt | 76 ++++++++++++----------
> 1 file changed, 42 insertions(+), 34 deletions(-)
Other than the few typos mentioned,
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
^ permalink raw reply
* Re: [PATCH] Input: silead - list all supported compatible strings in binding document
From: Javier Martinez Canillas @ 2017-04-03 15:51 UTC (permalink / raw)
To: Rob Herring
Cc: linux-kernel, devicetree, Robert Dolca, Hans de Goede,
Dmitry Torokhov, linux-input, Mark Rutland
In-Reply-To: <20170403152543.im7tbkhfc3lj7lyt@rob-hp-laptop>
Hello Rob,
On 04/03/2017 11:25 AM, Rob Herring wrote:
> On Wed, Mar 29, 2017 at 02:25:31PM -0400, Javier Martinez Canillas wrote:
>> The driver contains compatible strings for different models, but the DT
>> binding doc only lists one of them. Add the remaining to the document.
>>
>> Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
>> ---
>>
>> .../devicetree/bindings/input/touchscreen/silead_gsl1680.txt | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> "dt-bindings: input: ..." is preferred for the subject, but no need to
> respin just for that.
>
Can we document it in Documentation/devicetree/bindings/submitting-patches.txt?
I'm asking because is true that at the beginning we used "dt-bindings: foo" for
all DT bindings patches but then many (most?) maintainers started asking for the
subsystem subject line to be used for both drivers and DT bindings docs since
they would be merging both and also they could miss the DT bindings patches if
their subsystem prefix was not used.
> Acked-by: Rob Herring <robh@kernel.org>
>
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
^ permalink raw reply
* [PATCH V5 2/2] thermal: broadcom: add Northstar thermal driver
From: Rafał Miłecki @ 2017-04-03 15:48 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin
Cc: Rob Herring, Mark Rutland, Stephen Warren, Lee Jones, Eric Anholt,
Florian Fainelli, Ray Jui, Scott Branden,
bcm-kernel-feedback-list, linux-pm, devicetree, linux-rpi-kernel,
linux-arm-kernel, Rafał Miłecki, Jon Mason
In-Reply-To: <20170403154829.29780-1-zajec5@gmail.com>
From: Rafał Miłecki <rafal@milecki.pl>
Northstar is a SoC family commonly used in home routers. This commit
adds a driver for checking CPU temperature. As Northstar Plus seems to
also have this IP block this new symbol gets ARCH_BCM_IPROC dependency.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
V2: Make it iProc specific as NSP can also use this driver
Select proper symbols in config ARCH_BCM_IPROC
Define PVTMON register bits
Update code selecting temperature monitor mode
Thank you Jon!
V3: More details in help message for BCM_NS_THERMAL
Use slope & offset
Drop arch code change (I'll be submitted using a proper tree)
Thank you Eduardo!
V4: Comment operations on PVTMON_CONTROL0 register
---
drivers/thermal/Kconfig | 5 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/broadcom/Kconfig | 8 +++
drivers/thermal/broadcom/Makefile | 1 +
drivers/thermal/broadcom/ns-thermal.c | 105 ++++++++++++++++++++++++++++++++++
5 files changed, 120 insertions(+)
create mode 100644 drivers/thermal/broadcom/Kconfig
create mode 100644 drivers/thermal/broadcom/Makefile
create mode 100644 drivers/thermal/broadcom/ns-thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 3bd24063375e..ac7301703d03 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -392,6 +392,11 @@ config MTK_THERMAL
Enable this option if you want to have support for thermal management
controller present in Mediatek SoCs
+menu "Broadcom thermal drivers"
+depends on ARCH_BCM || COMPILE_TEST
+source "drivers/thermal/broadcom/Kconfig"
+endmenu
+
menu "Texas Instruments thermal drivers"
depends on ARCH_HAS_BANDGAP || COMPILE_TEST
depends on HAS_IOMEM
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index f23cde05dac6..6b7706b9f27c 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -27,6 +27,7 @@ thermal_sys-$(CONFIG_CLOCK_THERMAL) += clock_cooling.o
thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o
# platform thermal drivers
+obj-y += broadcom/
obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o
obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
diff --git a/drivers/thermal/broadcom/Kconfig b/drivers/thermal/broadcom/Kconfig
new file mode 100644
index 000000000000..f0dea8a8e002
--- /dev/null
+++ b/drivers/thermal/broadcom/Kconfig
@@ -0,0 +1,8 @@
+config BCM_NS_THERMAL
+ tristate "Northstar thermal driver"
+ depends on ARCH_BCM_IPROC || COMPILE_TEST
+ help
+ Northstar is a family of SoCs that includes e.g. BCM4708, BCM47081,
+ BCM4709 and BCM47094. It contains DMU (Device Management Unit) block
+ with a thermal sensor that allows checking CPU temperature. This
+ driver provides support for it.
diff --git a/drivers/thermal/broadcom/Makefile b/drivers/thermal/broadcom/Makefile
new file mode 100644
index 000000000000..059df9a0ed69
--- /dev/null
+++ b/drivers/thermal/broadcom/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_BCM_NS_THERMAL) += ns-thermal.o
diff --git a/drivers/thermal/broadcom/ns-thermal.c b/drivers/thermal/broadcom/ns-thermal.c
new file mode 100644
index 000000000000..eab96b3572b9
--- /dev/null
+++ b/drivers/thermal/broadcom/ns-thermal.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/thermal.h>
+
+#define PVTMON_CONTROL0 0x00
+#define PVTMON_CONTROL0_SEL_MASK 0x0000000e
+#define PVTMON_CONTROL0_SEL_TEMP_MONITOR 0x00000000
+#define PVTMON_CONTROL0_SEL_TEST_MODE 0x0000000e
+#define PVTMON_STATUS 0x08
+
+struct ns_thermal {
+ struct thermal_zone_device *tz;
+ void __iomem *pvtmon;
+};
+
+static int ns_thermal_get_temp(void *data, int *temp)
+{
+ struct ns_thermal *ns_thermal = data;
+ int offset = thermal_zone_get_offset(ns_thermal->tz);
+ int slope = thermal_zone_get_slope(ns_thermal->tz);
+ u32 val;
+
+ val = readl(ns_thermal->pvtmon + PVTMON_CONTROL0);
+ if ((val & PVTMON_CONTROL0_SEL_MASK) != PVTMON_CONTROL0_SEL_TEMP_MONITOR) {
+ /* Clear current mode selection */
+ val &= ~PVTMON_CONTROL0_SEL_MASK;
+
+ /* Set temp monitor mode (it's the default actually) */
+ val |= PVTMON_CONTROL0_SEL_TEMP_MONITOR;
+
+ writel(val, ns_thermal->pvtmon + PVTMON_CONTROL0);
+ }
+
+ val = readl(ns_thermal->pvtmon + PVTMON_STATUS);
+ *temp = slope * val + offset;
+
+ return 0;
+}
+
+const struct thermal_zone_of_device_ops ns_thermal_ops = {
+ .get_temp = ns_thermal_get_temp,
+};
+
+static int ns_thermal_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct ns_thermal *ns_thermal;
+
+ ns_thermal = devm_kzalloc(dev, sizeof(*ns_thermal), GFP_KERNEL);
+ if (!ns_thermal)
+ return -ENOMEM;
+
+ ns_thermal->pvtmon = of_iomap(dev_of_node(dev), 0);
+ if (WARN_ON(!ns_thermal->pvtmon))
+ return -ENOENT;
+
+ ns_thermal->tz = devm_thermal_zone_of_sensor_register(dev, 0,
+ ns_thermal,
+ &ns_thermal_ops);
+ if (IS_ERR(ns_thermal->tz)) {
+ iounmap(ns_thermal->pvtmon);
+ return PTR_ERR(ns_thermal->tz);
+ }
+
+ platform_set_drvdata(pdev, ns_thermal);
+
+ return 0;
+}
+
+static int ns_thermal_remove(struct platform_device *pdev)
+{
+ struct ns_thermal *ns_thermal = platform_get_drvdata(pdev);
+
+ iounmap(ns_thermal->pvtmon);
+
+ return 0;
+}
+
+static const struct of_device_id ns_thermal_of_match[] = {
+ { .compatible = "brcm,ns-thermal", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ns_thermal_of_match);
+
+static struct platform_driver ns_thermal_driver = {
+ .probe = ns_thermal_probe,
+ .remove = ns_thermal_remove,
+ .driver = {
+ .name = "ns-thermal",
+ .of_match_table = ns_thermal_of_match,
+ },
+};
+module_platform_driver(ns_thermal_driver);
+
+MODULE_DESCRIPTION("Northstar thermal driver");
+MODULE_LICENSE("GPL v2");
--
2.11.0
^ permalink raw reply related
* [PATCH V5 1/2] dt-bindings: thermal: add support for Broadcom's Northstar thermal
From: Rafał Miłecki @ 2017-04-03 15:48 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin
Cc: Rob Herring, Mark Rutland, Stephen Warren, Lee Jones, Eric Anholt,
Florian Fainelli, Ray Jui, Scott Branden,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Rafał Miłecki
In-Reply-To: <20170331201124.656-1-zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
This commit documents binding for thermal used in Northstar family SoCs.
There isn't any known Northstar device with active cooling system so DT
example has empty cooling-maps node. There is also no support for CPU
frequency throttling so I put only a critical trip in the example.
Signed-off-by: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
---
V3: Add thermal-zones to the example
V5: Extend example by including trips and cooling-maps. Update commit message
---
.../devicetree/bindings/thermal/brcm,ns-thermal | 37 ++++++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/brcm,ns-thermal
diff --git a/Documentation/devicetree/bindings/thermal/brcm,ns-thermal b/Documentation/devicetree/bindings/thermal/brcm,ns-thermal
new file mode 100644
index 000000000000..68e047170039
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/brcm,ns-thermal
@@ -0,0 +1,37 @@
+* Broadcom Northstar Thermal
+
+This binding describes thermal sensor that is part of Northstar's DMU (Device
+Management Unit).
+
+Required properties:
+- compatible : Must be "brcm,ns-thermal"
+- reg : iomem address range of PVTMON registers
+- #thermal-sensor-cells : Should be <0>
+
+Example:
+
+thermal: thermal@1800c2c0 {
+ compatible = "brcm,ns-thermal";
+ reg = <0x1800c2c0 0x10>;
+ #thermal-sensor-cells = <0>;
+};
+
+thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ coefficients = <(-556) 418000>;
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ };
+ };
+};
--
2.11.0
--
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^ permalink raw reply related
* Re: [PATCH v3 5/7] mfd: Add Device Tree bindings document for TI tps6105x chip
From: Javier Martinez Canillas @ 2017-04-03 15:47 UTC (permalink / raw)
To: Lee Jones; +Cc: linux-kernel, devicetree, Rob Herring, Mark Rutland
In-Reply-To: <20170403111540.7k3rjucvcxe5cunf@dell>
Hello Lee,
On 04/03/2017 07:15 AM, Lee Jones wrote:
[snip]
>> +
>> +The TP61050/TPS61052 is a high-power "white LED driver". This boost converter
>> +is also used for other things than white LEDs, and also contains a GPIO pin.
>
> What functions does it offer?
>
Same comment than before, I'm not really familiar with this driver. But I'll
look what are the MFD cell instantiated to better understand dev functions
and expand this documentation accordingly.
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
^ permalink raw reply
* Re: [PATCH v3 16/37] mtd: nand: denali_dt: add compatible strings for UniPhier SoC variants
From: Rob Herring @ 2017-04-03 15:46 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Mark Rutland, Boris Brezillon, Richard Weinberger, Marek Vasut,
Artem Bityutskiy, Cyrille Pitchen, linux-kernel, Dinh Nguyen,
devicetree, linux-mtd, Masami Hiramatsu, Chuanxiao Dong,
Jassi Brar, Brian Norris, Enrico Jorns, David Woodhouse,
Graham Moore
In-Reply-To: <1490856383-31560-17-git-send-email-yamada.masahiro@socionext.com>
On Thu, Mar 30, 2017 at 03:46:02PM +0900, Masahiro Yamada wrote:
> Add two compatible strings for UniPhier SoCs.
>
> "socionext,uniphier-denali-nand-v5a" is used on UniPhier sLD3, LD4,
> Pro4, sLD8 SoCs.
>
> "socionext,uniphier-denali-nand-v5b" is used on UniPhier Pro5, PXs2,
> LD6b, LD11, LD20 SoCs.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
>
> Changes in v3: None
> Changes in v2:
> - Change the compatible strings
> - Fix the ecc_strength_capability
> - Override revision number for the newer one
>
> .../devicetree/bindings/mtd/denali-nand.txt | 6 ++++++
> drivers/mtd/nand/denali_dt.c | 23 ++++++++++++++++++++++
> 2 files changed, 29 insertions(+)
Acked-by: Rob Herring <robh@kernel.org>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply
* Re: [PATCH v3 2/7] mfd: retu: Add OF device ID table
From: Javier Martinez Canillas @ 2017-04-03 15:45 UTC (permalink / raw)
To: Lee Jones; +Cc: linux-kernel, devicetree, Rob Herring
In-Reply-To: <20170403111502.lotjpd746vkhekkg@dell>
Hello Lee,
On 04/03/2017 07:15 AM, Lee Jones wrote:
[snip]
>>
>> +static const struct of_device_id retu_of_match[] = {
>> + { .compatible = "nokia,retu-mfd" },
>> + { .compatible = "nokia,tahvo-mfd" },
>
> Please drop the "-mfd".
>
Yes, I also didn't like it but I didn't want to change it since that would
mean that backward compatiblity and bisect-ability will be broken by this
change.
In other words, just adding a vendor prefix won't cause an issue if patches
are merged independently since if DTS patches are merged before, the driver
will still lookup using the I2C device ID table. And if the drivers patches
are picked before, the DTS will match using the OF device ID table.
But changing to "nokia,retu" and "nokia,tahvo" means that you will need to
pick all patches and also that the DTS and drivers changes will have to be
done in the same patch. If you are OK with that, then I can change in the
next version.
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
^ permalink raw reply
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