* Re: [PATCH v3 00/11] add thermal throttling to Allwinner A33 SoC
From: Lee Jones @ 2017-04-05 9:57 UTC (permalink / raw)
To: Quentin Schulz
Cc: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, jic23-DgEjT+Ai2ygdnm+yROfE0A,
knaack.h-Mmb7MZpHnFY, lars-Qo5EllUWu/uELgA04lAiVw,
pmeerw-jW+XmwGofnusTnJN9+BGXg,
thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <fcc2ec2c-cf46-0cf9-1933-53511fe77cf2-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On Wed, 05 Apr 2017, Quentin Schulz wrote:
> On 04/04/2017 10:31, Lee Jones wrote:
> > On Tue, 21 Mar 2017, Quentin Schulz wrote:
> >> v3:
> >> - fixed compatible name in DT and in documentation,
> >> - fixed DT node name and label,
> >> - added explanations in commit logs,
> >> - moved frequencies that need overvolting to board DTS instead of A33 DTSI,
> >> - fixed a typo in if is_enabled condition,
> >> - removed all patches concerning Olimex Olinuxino (no HW to test on),
> >
> > What is the plan for this series?
> >
> > I'm guessing there are no hard dependencies on the ARM parts?
> >
> > If not, I'm happy to take the changes to 'drivers/*'.
> >
>
> I've sent a v4 to add some Acked-by and change a few commit "titles".
> It's ready to be merged with only the following patch required (which
> Jonathan asked if you could merge it through the mfd tree): "[RESEND
> PATCH v4] iio: adc: add support for X-Powers AXP20X and AXP22X PMICs
> ADCs" (https://patchwork.kernel.org/patch/9660879/)
Right, but how would you like *this* patch-set applied?
I'm guessing the ARM patches need to go in via ARM-SoC.
What about the drivers/{input,iio,mfd} patches?
I'm guessing they're to all go in via my tree?
> >> [1] https://lkml.org/lkml/2016/12/13/298 : "[PATCH v9] add support for Allwinner
> >> SoCs ADC"
> >>
> >> Thanks,
> >> Quentin
> >>
> >> Maxime Ripard (1):
> >> ARM: sun8i: a33: Add devfreq-based GPU cooling
> >>
> >> Quentin Schulz (10):
> >> ARM: sun8i: a33: add operating-points-v2 property to all nodes
> >> ARM: sun8i: a33: add all operating points
> >> ARM: dts: sun8i: sina33: add cpu-supply
> >> Documentation: DT: bindings: mfd: add A33 GPADC binding
> >> Documentation: DT: bindings: input: touschcreen: remove sun4i
> >> documentation
> >> iio: adc: sun4i-gpadc-iio: move code used in MFD probing to new
> >> function
> >> iio: adc: sun4i-gpadc-iio: add support for A33 thermal sensor
> >> ARM: dtsi: sun8i: a33: add thermal sensor
> >> ARM: dtsi: sun8i: a33: add CPU thermal throttling
> >> ARM: sun8i: sina33: add highest OPP of CPUs
> >>
> >> .../touchscreen/sun4i.txt => mfd/sun4i-gpadc.txt} | 21 +++
> >> arch/arm/boot/dts/sun8i-a23-a33.dtsi | 1 +
> >> arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 18 +++
> >> arch/arm/boot/dts/sun8i-a33.dtsi | 141 +++++++++++++++++
> >> drivers/iio/adc/Kconfig | 2 +-
> >> drivers/iio/adc/sun4i-gpadc-iio.c | 170 +++++++++++++++++----
> >> include/linux/mfd/sun4i-gpadc.h | 4 +
> >> 7 files changed, 324 insertions(+), 33 deletions(-)
> >> rename Documentation/devicetree/bindings/{input/touchscreen/sun4i.txt => mfd/sun4i-gpadc.txt} (64%)
> >>
> >
>
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply
* Re: [RFC] [media] imx: assume MEDIA_ENT_F_ATV_DECODER entities output video on pad 1
From: Philipp Zabel @ 2017-04-05 9:43 UTC (permalink / raw)
To: Steve Longerbeam
Cc: mark.rutland, andrew-ct.chen, minghsiu.tsai, nick, songjun.wu,
hverkuil, pavel, shuah, devel, markus.heiser, Steve Longerbeam,
robert.jarzmik, linux, geert, linux-media, devicetree, kernel,
arnd, tiffany.lin, bparrot, robh+dt, horms+renesas, mchehab,
laurent.pinchart+renesas, linux-arm-kernel,
niklas.soderlund+renesas, gregkh, linux-kernel,
jean-christophe.trotin, sakari.ailus, fabio.estevam, shawnguo,
sudipm.mukherjee
In-Reply-To: <9bfabc5c-d90f-6487-537d-20515ec61f9c@gmail.com>
On Tue, 2017-04-04 at 15:11 -0700, Steve Longerbeam wrote:
>
> On 03/30/2017 10:25 AM, Philipp Zabel wrote:
> > The TVP5150 DT bindings specify a single output port (port 0) that
> > corresponds to the video output pad (pad 1, DEMOD_PAD_VID_OUT).
> >
> > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> > ---
> > I'm trying to get this to work with a TVP5150 analog TV decoder, and the
> > first problem is that this device doesn't have pad 0 as its single
> > output pad. Instead, as a MEDIA_ENT_F_ATV_DECODER entity, it has for
> > pads (input, video out, vbi out, audio out), and video out is pad 1,
> > whereas the device tree only defines a single port (0).
>
> Shouldn't the DT bindings define ports for these other pads?
In this case, probably yes for the input pad, certainly no for the
VBI/audio pads. See the other mail.
> I haven't seen this documented anywhere, but shouldn't there
> be a 1:1 correspondence between DT ports and media pads?
Not in general. But imagine a dual HDMI->CSI2 converter, for example. We
don't support this yet, but that might reasonably be described in the
device tree as a single device with two output ports. But the internal
representation would be two completely separate v4l2 subdevices.
regards
Philipp
^ permalink raw reply
* Re: [RFC] [media] imx: assume MEDIA_ENT_F_ATV_DECODER entities output video on pad 1
From: Philipp Zabel @ 2017-04-05 9:34 UTC (permalink / raw)
To: Russell King - ARM Linux, mchehab
Cc: mark.rutland, andrew-ct.chen, minghsiu.tsai, nick, songjun.wu,
hverkuil, Steve Longerbeam, pavel, robert.jarzmik, devel,
markus.heiser, laurent.pinchart+renesas, shuah, geert,
Steve Longerbeam, linux-media, devicetree, sakari.ailus, arnd,
bparrot, robh+dt, horms+renesas, tiffany.lin, linux-arm-kernel,
niklas.soderlund+renesas, gregkh, linux-kernel,
jean-christophe.trotin, kernel, fabio.estevam, shawnguo,
sudipm.mukherjee
In-Reply-To: <20170405082134.GF7909@n2100.armlinux.org.uk>
On Wed, 2017-04-05 at 09:21 +0100, Russell King - ARM Linux wrote:
[...]
> > Actually what was I thinking, the TVP5150 is already an example of
> > such a device.
> >
> > All of this could be solved if there was some direction information
> > in port nodes.
>
> I disagree.
>
> Philipp identified that the TVP5150 has four pads:
>
> * Input pad
> * Video output pad
> * VBI output pad
> * Audio output pad
I didn't think hard enough about this earlier, but there are really only
two hardware interfaces on TVP5150. The ADC input, which can be
connected to either of two composite input pins (AIP1A, AIP1B), or use
both for s-video, and the digital output connected to pins (YOUT[7:0]).
VBI data can be transferred via the output pins during horizontal or
vertical blanking, if I understand correctly, or read from a FIFO via
I2C.
There is no apparent support for audio data whatsoever, and the only
mention of audio in the data manual is a vague reference about an "audio
interface available on the TVP5150" providing a clock to an audio
interface between an external audio decoder and the backend processor.
Further, commit 55606310e77f ("[media] tvp5150: create the expected
number of pads") creates DEMOD_NUM_PADS pads, but doesn't mention or
initialize the audio pad. It clearly expects the value of DEMOD_NUM_PADS
to be 3. And indeed the fourth pad was added later in commit
bddc418787cc ("[media] au0828: use standard demod pads struct").
So to me it looks like the VBI and audio pads should be removed from
TVP5150.
> So, it has one input and three outputs. How does marking the direction
> in the port node (which would indicate that there was a data flow out of
> TVP5150 into the iMX6 capture) help identify which of those pads should
> be used?
>
> It would eliminate the input pad, but you still have three output pads
> to choose from.
>
> So no, your idea can't work.
In this case, removal of the VBI and audio pads might make this work,
but in general this is true. In my opinion, to make this truly generic,
we need an interface to ask the driver which media entity pad a given
device tree port corresponds to, as there might not even be a single
media entity corresponding to all ports for more complex devices.
> As I already stated, I believe that this case is already covered by
> video-interfaces.txt:
>
> If more than
> one port is present in a device node or there is more than one endpoint at a
> port, or port node needs to be associated with a selected hardware interface,
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
> used.
>
> So, according to that, you do not need to have more than one port node
> to use the reg property - it's _either_ more than one port _or_ to
> select the hardware interface.
I don't think enforcing a 1:1 correspondence between device tree node
and media entity and enforcing port reg property == entity pad index is
a good idea in the long run. Binding errors are going to be made that
will have to be worked around at the driver level, and more complex
devices might have to create multiple media entities / v4l2 subdevices
with external ports that interface with the of graph.
> It all hinges on whether you consider the video output, VBI output or
> audio output to be separate hardware interfaces that the singular
> specified "port" node needs to select between.
>
> There's another reason why the TVP5150 binding looks wrong and broken,
> however. How does the audio output get routed to other parts of the
> system if you're using the video output, and how is that relationship
> defined? It's a v4l2 subdev pad, so it would need to be part of the
> v4l2 subdev graph. It sounds to me like the binding was created with
> a narrow focused "this is the board in front of me, it only has video
> wired up, I'm not going to consider other use cases" blinkered view.
I think the output part is accurate, as the audio pad is an artifact of
an unrelated change. I'm not so sure about the VBI pad, but I think that
shouldn't exist either. The input pad, on the other hand, not having any
of graph representation in the device tree seems a bit strange. There
was a custom binding for the inputs, that got quickly reverted:
https://patchwork.kernel.org/patch/8395521/
regards
Philipp
^ permalink raw reply
* [PATCH v2 2/2] dt-bindings: document: add firefly-rk3399 board support
From: Kever Yang @ 2017-04-05 9:33 UTC (permalink / raw)
To: heiko
Cc: linux-rockchip, Kever Yang, devicetree, Jianqun Xu, Liang Chen,
Brian Norris, linux-kernel, Randy Li, Andy Yan, Rob Herring,
Eddie Cai, Mark Rutland, linux-arm-kernel, Xing Zheng
In-Reply-To: <1491384800-22412-1-git-send-email-kever.yang@rock-chips.com>
Use "firefly,firefly-rk3399" compatible string for firefly-rk3399 board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v2: None
Documentation/devicetree/bindings/arm/rockchip.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 250fdf0..b5201f4 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -42,6 +42,10 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
+- Firefly Firefly-RK3399 board:
+ Required root node properties:
+ - compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
+
- ChipSPARK PopMetal-RK3288 board:
Required root node properties:
- compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
--
1.9.1
^ permalink raw reply related
* [PATCH v2 1/2] arm64: dts: rk3399: add support for firefly-rk3399 board
From: Kever Yang @ 2017-04-05 9:33 UTC (permalink / raw)
To: heiko
Cc: linux-rockchip, Kever Yang, devicetree, Jianqun Xu, Liang Chen,
Brian Norris, linux-kernel, Andy Yan, Rob Herring,
linux-arm-kernel, Will Deacon, Mark Rutland, Catalin Marinas,
Matthias Brugger
Firefly-rk3399 is a bord from T-Firefly, you can find detail about
it here:
http://en.t-firefly.com/en/firenow/Firefly_RK3399/
This patch add basic node for the board and make it able to bring
up.
Peripheral works:
- usb hub which connect to ehci controller;
- UART2 debug
- eMMC
- PCIe
Not work:
- USB 3.0 HOST, type-C port
- sdio, sd-card
Not test for other peripheral:
- HDMI
- Ethernet
- OPTICAL
- WiFi/BT
- MIPI CSI/DSI
- IR
- EDP/DP
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
Changes in v2:
- rebase on Heiko's for-next
- using pinctrl binding header definition instead of a number
- other fix by comments from Heiko and Andreas.
arch/arm64/boot/dts/rockchip/Makefile | 1 +
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 750 ++++++++++++++++++++++++
2 files changed, 751 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b5636bb..bcfa53b 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
new file mode 100644
index 0000000..d427d40
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -0,0 +1,750 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3399.dtsi"
+
+/ {
+ model = "Firefly-RK3399 Board";
+ compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
+
+ backlight: backlight {
+ status = "okay";
+ compatible = "pwm-backlight";
+ enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
+ pwms = <&pwm0 0 25000 0>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ rt5640-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "rockchip,rt5640-codec";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,widgets =
+ "Microphone", "Mic Jack",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing =
+ "Mic Jack", "MICBIAS1",
+ "IN1P", "Mic Jack",
+ "Headphone Jack", "HPOL",
+ "Headphone Jack", "HPOR";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&rt5640>;
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_drv>;
+ regulator-name = "vcc3v3_pcie";
+ };
+
+ vcc3v3_sys: vcc3v3-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&host_vbus_drv>;
+ regulator-name = "vcc5v0_host";
+ regulator-always-on;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc_phy: vcc-phy-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_phy";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "pwm-regulator";
+ pwms = <&pwm2 0 25000 1>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ /* for rockchip boot on */
+ rockchip,pwm_id= <2>;
+ rockchip,pwm_voltage = <1000000>;
+ };
+
+ vccadc_ref: vccadc-ref {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc_phy>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x28>;
+ rx_delay = <0x11>;
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ i2c-scl-rising-time-ns = <168>;
+ i2c-scl-falling-time-ns = <4>;
+ clock-frequency = <400000>;
+
+ vdd_cpu_b: pmic@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-compatible = "fan53555-reg";
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ vsel-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
+ fcs,suspend-voltage-selector = <0>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-state = <3>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: syr828@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-compatible = "fan53555-reg";
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-initial-state = <3>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+ #clock-cells = <1>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+
+ vcc1-supply = <&vcc3v3_sys>;
+ vcc2-supply = <&vcc3v3_sys>;
+ vcc3-supply = <&vcc3v3_sys>;
+ vcc4-supply = <&vcc3v3_sys>;
+ vcc6-supply = <&vcc3v3_sys>;
+ vcc7-supply = <&vcc3v3_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc3v3_sys>;
+ vcc10-supply = <&vcc3v3_sys>;
+ vcc11-supply = <&vcc3v3_sys>;
+ vcc12-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc1v8_pmu>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-name = "vdd_center";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-name = "vdd_cpu_l";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_1v8: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc1v8_dvp: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8_dvp";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v0_tp: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc3v0_tp";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8_pmu: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8_pmu";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sd: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_sd";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcca3v0_codec: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcca3v0_codec";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc_1v5";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1500000>;
+ };
+ };
+
+ vcca1v8_codec: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca1v8_codec";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc_3v0";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v3_s3: SWITCH_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_s3";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc3v3_s0: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc3v3_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ i2c-scl-rising-time-ns = <300>;
+ i2c-scl-falling-time-ns = <15>;
+
+ gsl3673: gsl3673@40 {
+ compatible = "GSL,GSL3673";
+ reg = <0x40>;
+ screen_max_x = <1536>;
+ screen_max_y = <2048>;
+ irq_gpio_number = <&gpio1 RK_PC4 IRQ_TYPE_LEVEL_LOW>;
+ rst_gpio_number = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
+ };
+
+ rt5640: rt5640@1c {
+ #sound-dai-cells = <0>;
+ compatible = "realtek,rt5640";
+ reg = <0x1c>;
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
+ clock-names = "mclk";
+ realtek,in1-differential;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rt5640_hpcon>;
+ hp-con-gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
+ io-channels = <&saradc 4>;
+ hp-det-adc-value = <500>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+ i2c-scl-rising-time-ns = <450>;
+ i2c-scl-falling-time-ns = <15>;
+};
+
+&i2c4 {
+ status = "okay";
+ i2c-scl-rising-time-ns = <600>;
+ i2c-scl-falling-time-ns = <20>;
+
+ fusb0: fusb30x@22 {
+ compatible = "fairchild,fusb302";
+ reg = <0x22>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&fusb0_int>;
+ int-n-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
+ vbus-5v-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+
+ mpu6500@68 {
+ status = "okay";
+ compatible = "invensense,mpu6500";
+ reg = <0x68>;
+ irq-gpio = <&gpio1 RK_PC6 IRQ_TYPE_EDGE_RISING>;
+ mpu-int_config = <0x10>;
+ mpu-level_shifter = <0>;
+ mpu-orientation = <0 1 0 1 0 0 0 0 1>;
+ orientation-x= <1>;
+ orientation-y= <0>;
+ orientation-z= <0>;
+ mpu-debug = <1>;
+ };
+};
+
+&i2s0 {
+ status = "okay";
+ rockchip,i2s-broken-burst-len;
+ rockchip,playback-channels = <8>;
+ rockchip,capture-channels = <8>;
+ #sound-dai-cells = <0>;
+};
+
+&i2s1 {
+ status = "okay";
+ rockchip,i2s-broken-burst-len;
+ rockchip,playback-channels = <2>;
+ rockchip,capture-channels = <2>;
+ #sound-dai-cells = <0>;
+};
+
+&i2s2 {
+ #sound-dai-cells = <0>;
+ status = "okay";
+};
+
+&io_domains {
+ status = "okay";
+
+ bt656-supply = <&vcc1v8_dvp>;
+ audio-supply = <&vcca1v8_codec>;
+ sdmmc-supply = <&vcc_sd>;
+ gpio1830-supply = <&vcc_3v0>;
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pcie0 {
+ ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
+ num-lanes = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreqn>;
+ status = "okay";
+};
+
+&pmu_io_domains {
+ status = "okay";
+ pmu1830-supply = <&vcc_3v0>;
+};
+
+&pinctrl {
+ buttons {
+ pwrbtn: pwrbtn {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ lcd-panel {
+ lcd_panel_reset: lcd-panel-reset {
+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pcie {
+ pcie_drv: pcie-drv {
+ rockchip,pins =
+ <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ pcie_3g_drv: pcie-3g-drv {
+ rockchip,pins =
+ <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pmic {
+ vsel1_gpio: vsel1-gpio {
+ rockchip,pins =
+ <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel2_gpio: vsel2-gpio {
+ rockchip,pins =
+ <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins =
+ <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wireless-bluetooth {
+ uart0_gpios: uart0-gpios {
+ rockchip,pins =
+ <2 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rt5640 {
+ rt5640_hpcon: rt5640-hpcon {
+ rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins =
+ <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb2 {
+ host_vbus_drv: host-vbus-drv {
+ rockchip,pins =
+ <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ fusb30x {
+ fusb0_int: fusb0-int {
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm2 {
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vccadc_ref>;
+};
+
+&sdhci {
+ bus-width = <8>;
+ keep-power-in-suspend;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ status = "okay";
+ supports-emmc;
+};
+
+&tsadc {
+ /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-mode = <1>;
+ /* tshut polarity 0:LOW 1:HIGH */
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+ extcon = <&fusb0>;
+
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy0_host: host-port {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+ };
+};
+
+&u2phy1 {
+ status = "okay";
+
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy1_host: host-port {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
--
1.9.1
^ permalink raw reply related
* Re: [PATCH v3 00/11] add thermal throttling to Allwinner A33 SoC
From: Quentin Schulz @ 2017-04-05 9:10 UTC (permalink / raw)
To: Lee Jones
Cc: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, jic23-DgEjT+Ai2ygdnm+yROfE0A,
knaack.h-Mmb7MZpHnFY, lars-Qo5EllUWu/uELgA04lAiVw,
pmeerw-jW+XmwGofnusTnJN9+BGXg,
thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170404083133.ffrsxjsakynruwzv@dell>
Hi Lee,
On 04/04/2017 10:31, Lee Jones wrote:
> On Tue, 21 Mar 2017, Quentin Schulz wrote:
>
>> The Allwinner SoCs all have an ADC that can also act as a touchscreen
>> controller and a thermal sensor. The first four channels can be used
>> either for the ADC or the touchscreen and the fifth channel is used for
>> the thermal sensor. We currently have a driver for the two latter
>> functions in drivers/input/touchscreen/sun4i-ts.c but we don't have
>> access to the ADC feature at all. It is meant to replace the current
>> driver by using MFD and subdrivers for existing bindings.
>>
>> The Allwinner A33 only has a thermal sensor present in the GPADC. In
>> addition, there is not an existing DT binding for the GPADC. Thus, we do
>> not need the sun4i-gpadc MFD driver which was made to keep DT compatibility
>> and probe subdrivers without the need to add DT subnodes.
>>
>> This series of patch adds the thermal sensor for the A33 and GPU/CPU
>> thermal throttling. It also adds the cpu-supply property to the CPU node
>> needed by the Sinlinx SinA33 and Olinuxino A33 to adapt their CPU regulator
>> voltage depending on the currently used OPP. The other A33 boards all have
>> their cpu-supply property set.
>>
>> This series also fixes the missing operating-points-v2 property in cpu DT
>> nodes. Finally, it also adds all remaining OPPs which can be found in
>> Allwinner 3.4 linux and fex files of all A33 boards.
>>
>> This series of patch is based on this[1] series of patch.
>>
>> v3:
>> - fixed compatible name in DT and in documentation,
>> - fixed DT node name and label,
>> - added explanations in commit logs,
>> - moved frequencies that need overvolting to board DTS instead of A33 DTSI,
>> - fixed a typo in if is_enabled condition,
>> - removed all patches concerning Olimex Olinuxino (no HW to test on),
>
> What is the plan for this series?
>
> I'm guessing there are no hard dependencies on the ARM parts?
>
> If not, I'm happy to take the changes to 'drivers/*'.
>
I've sent a v4 to add some Acked-by and change a few commit "titles".
It's ready to be merged with only the following patch required (which
Jonathan asked if you could merge it through the mfd tree): "[RESEND
PATCH v4] iio: adc: add support for X-Powers AXP20X and AXP22X PMICs
ADCs" (https://patchwork.kernel.org/patch/9660879/)
Thanks,
Quentin
>> [1] https://lkml.org/lkml/2016/12/13/298 : "[PATCH v9] add support for Allwinner
>> SoCs ADC"
>>
>> Thanks,
>> Quentin
>>
>> Maxime Ripard (1):
>> ARM: sun8i: a33: Add devfreq-based GPU cooling
>>
>> Quentin Schulz (10):
>> ARM: sun8i: a33: add operating-points-v2 property to all nodes
>> ARM: sun8i: a33: add all operating points
>> ARM: dts: sun8i: sina33: add cpu-supply
>> Documentation: DT: bindings: mfd: add A33 GPADC binding
>> Documentation: DT: bindings: input: touschcreen: remove sun4i
>> documentation
>> iio: adc: sun4i-gpadc-iio: move code used in MFD probing to new
>> function
>> iio: adc: sun4i-gpadc-iio: add support for A33 thermal sensor
>> ARM: dtsi: sun8i: a33: add thermal sensor
>> ARM: dtsi: sun8i: a33: add CPU thermal throttling
>> ARM: sun8i: sina33: add highest OPP of CPUs
>>
>> .../touchscreen/sun4i.txt => mfd/sun4i-gpadc.txt} | 21 +++
>> arch/arm/boot/dts/sun8i-a23-a33.dtsi | 1 +
>> arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 18 +++
>> arch/arm/boot/dts/sun8i-a33.dtsi | 141 +++++++++++++++++
>> drivers/iio/adc/Kconfig | 2 +-
>> drivers/iio/adc/sun4i-gpadc-iio.c | 170 +++++++++++++++++----
>> include/linux/mfd/sun4i-gpadc.h | 4 +
>> 7 files changed, 324 insertions(+), 33 deletions(-)
>> rename Documentation/devicetree/bindings/{input/touchscreen/sun4i.txt => mfd/sun4i-gpadc.txt} (64%)
>>
>
--
Quentin Schulz, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH v6 1/4] dt-bindings: phy: Add support for QUSB2 phy
From: Vivek Gautam @ 2017-04-05 9:09 UTC (permalink / raw)
To: Stephen Boyd
Cc: kishon, robh+dt, linux-arm-kernel, linux-arm-msm, linux-kernel,
linux-usb, devicetree, mark.rutland, bjorn.andersson,
srinivas.kandagatla
In-Reply-To: <20170404182839.GE18246@codeaurora.org>
On 04/04/2017 11:58 PM, Stephen Boyd wrote:
> On 03/20, Vivek Gautam wrote:
>> diff --git a/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
>> new file mode 100644
>> index 000000000000..a6d19acde9e0
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt
>> @@ -0,0 +1,45 @@
>> +Qualcomm QUSB2 phy controller
>> +=============================
>> +
>> +QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.
>> +
>> +Required properties:
>> + - compatible: compatible list, contains "qcom,msm8996-qusb2-phy".
>> + - reg: offset and length of the PHY register set.
>> + - #phy-cells: must be 0.
>> +
>> + - clocks: a list of phandles and clock-specifier pairs,
>> + one for each entry in clock-names.
>> + - clock-names: must be "cfg_ahb" for phy config clock,
>> + "ref" for 19.2 MHz ref clk,
>> + "iface" for phy interface clock (Optional).
>> +
>> + - vdd-phy-supply: Phandle to a regulator supply to PHY core block.
>> + - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
>> + - vdda-phy-dpdm-supply: Phandle to 3.1V regulator supply to Dp/Dm port signals.
>> +
>> + - resets: Phandle to reset to phy block.
>> +
>> +Optional properties:
>> + - nvmem-cells: Phandle to nvmem cell that contains 'HS Tx trim'
>> + tuning parameter value for qusb2 phy.
>> +
>> + - qcom,tcsr-syscon: Phandle to TCSR syscon register region.
>> +
>> +Example:
>> + hsusb_phy: phy@7411000 {
>> + compatible = "qcom,msm8996-qusb2-phy";
>> + reg = <0x7411000 0x180>;
>> + #phy-cells = <0>;
>> +
>> + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
>> + <&gcc GCC_RX1_USB2_CLKREF_CLK>,
>> + clock-names = "cfg_ahb", "ref";
>> +
>> + vdd-phy-supply = <&pm8994_s2>;
> pm8994_s2 is a "corner" regulator. I'm not sure how we're going
> to have it listed here as something like a regulator supply in
> the binding. We probably should leave it out for now and let the
> power domain + pm_qos stuff for corners work out. From what I see
> in the downstream driver the code is setting the corner to '4'
> when active, and '1' when inactive.
Sure, let's allow power domain and corner voltage work handle
this. I will drop this regulator entry from bindings, and the driver.
Best regards
Vivek
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* Re: [PATCH v5 1/7] dt-bindings: power: supply: add AXP20X/AXP22X battery DT binding
From: Liam Breck @ 2017-04-05 9:08 UTC (permalink / raw)
To: Quentin Schulz
Cc: Sebastian Reichel, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <c1fd3ae7-4e4a-bb5b-f8ce-123d85d9b937-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On Wed, Apr 5, 2017 at 1:48 AM, Quentin Schulz
<quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Liam,
>
> On 05/04/2017 10:38, Liam Breck wrote:
>> [reduced CC list]
>>
>> Hi Quentin,
>>
>> On Wed, Apr 5, 2017 at 1:10 AM, Quentin Schulz
>> <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>>> The X-Powers AXP20X and AXP22X PMICs can have a battery as power supply.
>>>
>>> This patch adds the DT binding documentation for the battery power
>>> supply which gets various data from the PMIC, such as the battery status
>>> (charging, discharging, full, dead), current max limit, current current,
>>> battery capacity (in percentage), voltage max and min limits, current
>>> voltage and battery capacity (in Ah).
>>>
>>> Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>>> Acked-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
>>> Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>>> ---
>>>
>>> v5:
>>> - removed DT property example from monitored-battery,
>>>
>>> v4:
>>> - added monitored-battery optional property,
>>> - added example with battery,
>>>
>>> v3:
>>> - removed constant charge current property, now should use the WIP
>>> battery framework,
>>>
>>> v2:
>>> - changed DT node name from ac_power_supply to ac-power-supply,
>>> - removed io-channels and io-channel-names from DT (the IIO mapping is
>>> done in the IIO ADC driver now),
>>> - added x-powers,constant-charge-current property to set the maximal
>>> default constant current charge of the battery,
>>>
>>> .../bindings/power/supply/axp20x_battery.txt | 28 ++++++++++++++++++++++
>>> 1 file changed, 28 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt b/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
>>> new file mode 100644
>>> index 0000000..63826fd
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/power/supply/axp20x_battery.txt
>>> @@ -0,0 +1,28 @@
>>> +AXP20x and AXP22x battery power supply
>>> +
>>> +Required Properties:
>>> + - compatible, one of:
>>> + "x-powers,axp209-battery-power-supply"
>>> + "x-powers,axp221-battery-power-supply"
>>> +
>>> +Optional properties:
>>> + - monitored-battery, phandle to a fixed battery
>>
>> Say here what properties of the battery your driver considers, e.g.
>> https://patchwork.kernel.org/patch/9660987/
>>
>
> Sorry but I'm completely lost in your patch series, this isn't your
> patch series for the battery framework. How do I know from which I
> should take the name of the DT property then?
That's a link from a subset, with just bq27xxx fuel gauge stuff; it
demonstrates documenting the properties a driver considers from
battery node.
Here's a link into previous full series:
https://patchwork.kernel.org/patch/9633605/
>>> +
>>> +This node is a subnode of the axp20x/axp22x PMIC.
>>> +
>>> +The AXP20X and AXP22X can read the battery voltage, charge and discharge
>>> +currents of the battery by reading ADC channels from the AXP20X/AXP22X
>>> +ADC.
>>> +
>>> +Example:
>>> +
>>> +battery: battery {
>>> + compatible = "fixed-battery";
>>
>> This is now "simple-battery". Also needs properties.
>>
>
> I've removed all the code in the driver to take care of the monitored
> battery info until your framework is merged. Since there are still
> discussion around the name to give to the different DT properties and
> since it's not required in this driver, I'll add them later to the DT
> binding.
The DT maintainers want complete-file patches, so maybe drop this
patch until later?
> Quentin
>
> --
> Quentin Schulz, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH] arm64: dts: rk3399: add support for firefly-rk3399 board
From: Kever Yang @ 2017-04-05 9:08 UTC (permalink / raw)
To: Heiko Stuebner, Andreas Färber
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, Jianqun Xu,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Andy Yan, Rob Herring,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Will Deacon,
Mark Rutland, Catalin Marinas, Matthias Brugger
In-Reply-To: <2267024.EkVhuakEXa@phil>
Hi Heiko, Andreas,
On 04/01/2017 03:41 AM, Heiko Stuebner wrote:
> Hi,
>
> Am Freitag, 31. März 2017, 18:59:49 CEST schrieb Andreas Färber:
>> Am 31.03.2017 um 14:56 schrieb Heiko Stuebner:
>>> Hi Kever,
>>>
>>> Am Freitag, 31. März 2017, 17:59:07 CEST schrieb Kever Yang:
>>>> Firefly-rk3399 is a bord from T-Firefly, you can find detail about
>>>> it here:
>>>> http://en.t-firefly.com/en/firenow/Firefly_RK3399/
>>>>
>>>> This patch add basic node for the board and make it able to bring
>>>> up.
>>> This more a first glance, I didn't check every binding, but already found
>>> some dubious ones, so in general, please make sure to only include nodes
>>> with approved bindings.
>>>
Thanks for your review, this dts is worked with rockchip kernel 4.4
tree, I have
remove nodes that not upstreamed, but still not clean enough.
>>> [...]
>>>
>>>> arch/arm64/boot/dts/rockchip/Makefile | 1 +
>>>> arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 772 ++++++++++++++++++++++++
>>> please provide a binding addition for the board in a separate patch as well.
OK, will do it in next patch.
>>>
>>>
>>>> 2 files changed, 773 insertions(+)
>>>> create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
>>>>
>>>> diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
>>>> index 3a86289..dd3d550 100644
>>>> --- a/arch/arm64/boot/dts/rockchip/Makefile
>>>> +++ b/arch/arm64/boot/dts/rockchip/Makefile
>>>> @@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
>>>> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
>>>> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
>>>> dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
>>>> +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb
>>> if possible, please rebase on top of my for-next branch, as we also
>>> have the first gru board in there now.
OK.
>>>
>>>>
>>>> always := $(dtb-y)
>>>> subdir-y := $(dts-dirs)
>>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
>>>> new file mode 100644
>>>> index 0000000..686977b
>>>> --- /dev/null
>>>> +++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
>>>> @@ -0,0 +1,772 @@
>>>> +/*
>>>> + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
>> "Ltd."?
Yes, missing the '.'.
>>
>>>> + *
>>>> + * This file is dual-licensed: you can use it either under the terms
>>>> + * of the GPL or the X11 license, at your option. Note that this dual
>>>> + * licensing only applies to this file, and not this project as a
>>>> + * whole.
>>>> + *
>>>> + * a) This file is free software; you can redistribute it and/or
>>>> + * modify it under the terms of the GNU General Public License as
>>>> + * published by the Free Software Foundation; either version 2 of the
>>>> + * License, or (at your option) any later version.
>>>> + *
>>>> + * This file is distributed in the hope that it will be useful,
>>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>>> + * GNU General Public License for more details.
>>>> + *
>>>> + * Or, alternatively,
>>>> + *
>>>> + * b) Permission is hereby granted, free of charge, to any person
>>>> + * obtaining a copy of this software and associated documentation
>>>> + * files (the "Software"), to deal in the Software without
>>>> + * restriction, including without limitation the rights to use,
>>>> + * copy, modify, merge, publish, distribute, sublicense, and/or
>>>> + * sell copies of the Software, and to permit persons to whom the
>>>> + * Software is furnished to do so, subject to the following
>>>> + * conditions:
>>>> + *
>>>> + * The above copyright notice and this permission notice shall be
>>>> + * included in all copies or substantial portions of the Software.
>>>> + *
>>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>>>> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
>>>> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>>>> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
>>>> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
>>>> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>>>> + * OTHER DEALINGS IN THE SOFTWARE.
>> This should be shorter: "SPDX-License-Identifier: GPL-2.0+ OR MIT"
> I'm not sure about that. There was disagreement over using SPDX in some
> other dts [0]. Sadly it doesn't look like it was resolved either way.
>
> Asking armsoc people on IRC just now, there really isn't any decision one
> way or another, so please stay with real license texts until there is an
> actual consensus on using spdx tags instead of license texts.
>
>
> [0] https://lkml.org/lkml/2017/2/28/750
I'm not clear with this, so I just copy it from other dts, if kernel
have a final
decision, people can move all these license to SPDX format together, right?
>
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +#include <dt-bindings/pwm/pwm.h>
>>>> +#include "rk3399.dtsi"
>>>> +
>>>> +/ {
>>>> + model = "Rockchip RK3399 Firefly Board (Linux Opensource)";
>> "(Linux Opensource)" is not a hardware description, please drop.
>>
>>>> + compatible = "rockchip,rk3399-firefly-linux", "rockchip,rk3399";
>>> Just to make sure, is this really a Rockchip board? I would've expected
>>> to see something like "firefly,firefly-rk3399" here, like on the rk3288-
>>> variant. Not a requirement, just a question to clarify who designed the
>>> board please :-) .
>> +1, especially no -linux suffix please. The same device tree should in
>> theory be usable with Linux, Android, FreeBSD or any other OS with
>> drivers based on the official bindings.
Firefly is the vendor, will use "firefly,firefly-rk3399".
>>>> +
>>>> + backlight: backlight {
>>>> + status = "okay";
>>>> + compatible = "pwm-backlight";
>>>> + enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
>>>> + pwms = <&pwm0 0 25000 0>;
>>>> + brightness-levels = <
>>>> + 0 1 2 3 4 5 6 7
>>>> + 8 9 10 11 12 13 14 15
>>>> + 16 17 18 19 20 21 22 23
>>>> + 24 25 26 27 28 29 30 31
>>>> + 32 33 34 35 36 37 38 39
>>>> + 40 41 42 43 44 45 46 47
>>>> + 48 49 50 51 52 53 54 55
>>>> + 56 57 58 59 60 61 62 63
>>>> + 64 65 66 67 68 69 70 71
>>>> + 72 73 74 75 76 77 78 79
>>>> + 80 81 82 83 84 85 86 87
>>>> + 88 89 90 91 92 93 94 95
>>>> + 96 97 98 99 100 101 102 103
>>>> + 104 105 106 107 108 109 110 111
>>>> + 112 113 114 115 116 117 118 119
>>>> + 120 121 122 123 124 125 126 127
>>>> + 128 129 130 131 132 133 134 135
>>>> + 136 137 138 139 140 141 142 143
>>>> + 144 145 146 147 148 149 150 151
>>>> + 152 153 154 155 156 157 158 159
>>>> + 160 161 162 163 164 165 166 167
>>>> + 168 169 170 171 172 173 174 175
>>>> + 176 177 178 179 180 181 182 183
>>>> + 184 185 186 187 188 189 190 191
>>>> + 192 193 194 195 196 197 198 199
>>>> + 200 201 202 203 204 205 206 207
>>>> + 208 209 210 211 212 213 214 215
>>>> + 216 217 218 219 220 221 222 223
>>>> + 224 225 226 227 228 229 230 231
>>>> + 232 233 234 235 236 237 238 239
>>>> + 240 241 242 243 244 245 246 247
>>>> + 248 249 250 251 252 253 254 255>;
>>>> + default-brightness-level = <200>;
>>>> + };
>>>> +
>>>> + clkin_gmac: external-gmac-clock {
>>>> + compatible = "fixed-clock";
>>>> + clock-frequency = <125000000>;
>>>> + clock-output-names = "clkin_gmac";
>>>> + #clock-cells = <0>;
>>>> + };
>>>> +
>>>> + rt5640-sound {
>> Drop rt5640- node prefix, or is there more than one?
> There can be more, the dw_hdmi (once we support graphics) also brings its
> sound node, if I remember correctly.
There have sound node from HDMI and maybe DP.
>
>
>>>> + compatible = "simple-audio-card";
>>>> + simple-audio-card,format = "i2s";
>>>> + simple-audio-card,name = "rockchip,rt5640-codec";
>>>> + simple-audio-card,mclk-fs = <256>;
>>>> + simple-audio-card,widgets =
>>>> + "Microphone", "Mic Jack",
>>>> + "Headphone", "Headphone Jack";
>>>> + simple-audio-card,routing =
>>>> + "Mic Jack", "MICBIAS1",
>>>> + "IN1P", "Mic Jack",
>>>> + "Headphone Jack", "HPOL",
>>>> + "Headphone Jack", "HPOR";
>>>> + simple-audio-card,cpu {
>>>> + sound-dai = <&i2s1>;
>>>> + };
>>>> + simple-audio-card,codec {
>>>> + sound-dai = <&rt5640>;
>>>> + };
>> Insert while lines before these two nodes for readability?
>>
>>>> + };
>>>> +
>>>> + sdio_pwrseq: sdio-pwrseq {
>>>> + compatible = "mmc-pwrseq-simple";
>>>> + clocks = <&rk808 1>;
>>>> + clock-names = "ext_clock";
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&wifi_enable_h>;
>>>> +
>>>> + /*
>>>> + * On the module itself this is one of these (depending
>>>> + * on the actual card populated):
>>>> + * - SDIO_RESET_L_WL_REG_ON
>>>> + * - PDN (power down when low)
>>>> + */
>>>> + reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO0_B2 */
>>> Thanks to Andy's persistence, we have nice constants in the pinctrl-
>>> binding-header now, like RK_PB2 for the above. So you can drop the
>>> comment and use the constant instead for easier reading.
>>> Same for other pins.
OK, will do it.
>>>
>>>
>>>> + };
>>>> +
>>>> + vcc3v3_pcie: vcc3v3-pcie-regulator {
>>>> + compatible = "regulator-fixed";
>>>> + enable-active-high;
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> + gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&pcie_drv>;
>>>> + regulator-name = "vcc3v3_pcie";
>>>> + };
>>>> +
>>>> + vcc3v3_sys: vcc3v3-sys {
>>>> + compatible = "regulator-fixed";
>>>> + regulator-name = "vcc3v3_sys";
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> + regulator-min-microvolt = <3300000>;
>>>> + regulator-max-microvolt = <3300000>;
>>>> + };
>>>> +
>>>> + vcc5v0_host: vcc5v0-host-regulator {
>>>> + compatible = "regulator-fixed";
>>>> + enable-active-high;
>>>> + gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&host_vbus_drv>;
>>>> + regulator-name = "vcc5v0_host";
>>>> + regulator-always-on;
>>>> + };
>>>> +
>>>> + vcc5v0_sys: vcc5v0-sys {
>>>> + compatible = "regulator-fixed";
>>>> + regulator-name = "vcc5v0_sys";
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> + regulator-min-microvolt = <5000000>;
>>>> + regulator-max-microvolt = <5000000>;
>>>> + };
>>>> +
>>>> + vcc_phy: vcc-phy-regulator {
>>>> + compatible = "regulator-fixed";
>>>> + regulator-name = "vcc_phy";
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> + };
>>>> +
>>>> + vdd_log: vdd-log {
>>>> + compatible = "pwm-regulator";
>>>> + pwms = <&pwm2 0 25000 1>;
>>>> + regulator-name = "vdd_log";
>>>> + regulator-min-microvolt = <800000>;
>>>> + regulator-max-microvolt = <1400000>;
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> +
>>>> + /* for rockchip boot on */
>>>> + rockchip,pwm_id= <2>;
>>>> + rockchip,pwm_voltage = <1000000>;
>>>> + };
>>>> +
>>>> + vccadc_ref: vccadc-ref {
>>>> + compatible = "regulator-fixed";
>>>> + regulator-name = "vcc1v8_sys";
>>>> + regulator-always-on;
>>>> + regulator-boot-on;
>>>> + regulator-min-microvolt = <1800000>;
>>>> + regulator-max-microvolt = <1800000>;
>>>> + };
>>>> +
>>>> + wireless-wlan {
>>>> + compatible = "wlan-platdata";
>>>> + rockchip,grf = <&grf>;
>>>> + wifi_chip_type = "ap6354";
>>>> + sdio_vref = <1800>;
>>>> + WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
>>>> + status = "okay";
>>> that is not a valid binding, am I right? ;-)
>>> So should be dropped.
>> ... or should be replaced by the proper binding (brcmfmac probably?).
I will remove this first, the brcmfmac should be work.
Thanks,
- Kever
>>
>>>> + };
>>>> +
>>>> + wireless-bluetooth {
>>>> + compatible = "bluetooth-platdata";
>>>> + //wifi-bt-power-toggle;
>>>> + uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; /* GPIO2_C3 */
>>>> + pinctrl-names = "default", "rts_gpio";
>>>> + pinctrl-0 = <&uart0_rts>;
>>>> + pinctrl-1 = <&uart0_gpios>;
>>>> + //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIOx_xx */
>>>> + BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; /* GPIO0_B1 */
>>>> + BT,wake_gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; /* GPIO2_D2 */
>>>> + BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>; /* GPIO0_A4 */
>>>> + status = "okay";
>>>> + };
>>> same here
>> Move to corresponding uart node? (serdev bindings)
> Oh, did this get merged, that would be pretty cool.
>
>
>>>> +};
>>>> +
>>>> +&cpu_l0 {
>>>> + cpu-supply = <&vdd_cpu_l>;
>>>> +};
>>>> +
>>>> +&cpu_l1 {
>>>> + cpu-supply = <&vdd_cpu_l>;
>>>> +};
>>>> +
>>>> +&cpu_l2 {
>>>> + cpu-supply = <&vdd_cpu_l>;
>>>> +};
>>>> +
>>>> +&cpu_l3 {
>>>> + cpu-supply = <&vdd_cpu_l>;
>>>> +};
>>>> +
>>>> +&cpu_b0 {
>>>> + cpu-supply = <&vdd_cpu_b>;
>>>> +};
>>>> +
>>>> +&cpu_b1 {
>>>> + cpu-supply = <&vdd_cpu_b>;
>>>> +};
>>>> +
>>>> +&emmc_phy {
>>>> + status = "okay";
>>>> +};
>>>> +
>>>> +&gmac {
>>>> + assigned-clocks = <&cru SCLK_RMII_SRC>;
>>>> + assigned-clock-parents = <&clkin_gmac>;
>>>> + clock_in_out = "input";
>>>> + phy-supply = <&vcc_phy>;
>>>> + phy-mode = "rgmii";
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&rgmii_pins>;
>>>> + snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
>>>> + snps,reset-active-low;
>>>> + snps,reset-delays-us = <0 10000 50000>;
>>>> + tx_delay = <0x28>;
>>>> + rx_delay = <0x11>;
>>>> + status = "okay";
>>>> +};
>>>> +
>>>> +&i2c0 {
>>>> + status = "okay";
>>>> + i2c-scl-rising-time-ns = <168>;
>>>> + i2c-scl-falling-time-ns = <4>;
>>>> + clock-frequency = <400000>;
>>>> +
>>>> + vdd_cpu_b: syr827@40 {
>> Node name should not duplicate the model. pmic@40?
> Thanks Andreas for finding all these little bits :-)
>
>
> Heiko
>
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^ permalink raw reply
* [PATCH v4 8/8] ARM: sun8i: sina33: add highest OPP of CPUs
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The A33 supports 1.1GHz and 1.2GHz frequencies at 1.32V and the Sinlinx
SinA33 has its cpu-supply property set in the cpu DT node.
Therefore, CPUfreq knows how to handle the regulator in charge of the
CPU and can adjust its voltage to match the OPP.
Add these two CPU frequencies to the CPU OPP table of the Sinlinx
SinA33.
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
added in v3
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index e34e092..9b620cc 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -87,6 +87,20 @@
cpu-supply = <®_dcdc3>;
};
+&cpu0_opp_table {
+ opp@1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1320000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp@1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1320000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+};
+
&de {
status = "okay";
};
--
2.9.3
^ permalink raw reply related
* [PATCH v4 7/8] ARM: sun8i: a33: Add devfreq-based GPU cooling
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM,
Quentin Schulz
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This adds GPU thermal throttling for the Allwinner A33.
Signed-off-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
v3:
- got rid of cooling-min-level and cooling-max-level as it's not used in any
code in the kernel,
added in v2
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 1 +
arch/arm/boot/dts/sun8i-a33.dtsi | 24 ++++++++++++++++++++++++
2 files changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 5e8725d..6d81a6d 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -495,6 +495,7 @@
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <384000000>;
+ #cooling-cells = <2>;
};
gic: interrupt-controller@01c81000 {
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index b88c107..541ca45 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -188,6 +188,16 @@
trip = <&cpu_alert1>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
+
+ map2 {
+ trip = <&gpu_alert0>;
+ cooling-device = <&mali 1 THERMAL_NO_LIMIT>;
+ };
+
+ map3 {
+ trip = <&gpu_alert1>;
+ cooling-device = <&mali 2 THERMAL_NO_LIMIT>;
+ };
};
trips {
@@ -198,6 +208,13 @@
type = "passive";
};
+ gpu_alert0: gpu_alert0 {
+ /* milliCelsius */
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cpu_alert1: cpu_alert1 {
/* milliCelsius */
temperature = <90000>;
@@ -205,6 +222,13 @@
type = "hot";
};
+ gpu_alert1: gpu_alert1 {
+ /* milliCelsius */
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
cpu_crit: cpu_crit {
/* milliCelsius */
temperature = <110000>;
--
2.9.3
^ permalink raw reply related
* [PATCH v4 6/8] ARM: sun8i: a33: add CPU thermal throttling
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This adds CPU thermal throttling for the Allwinner A33. It uses the
thermal sensor present in the SoC's GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
v3:
- switched to new phandle because of modified DT node name for the GPADC
(named THS),
- got rid of cooling-min-level and cooling-max-level as it's not used in any
code in the kernel,
v2:
- updated cooling-max-level to reflect newly added OPPs,
arch/arm/boot/dts/sun8i-a33.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 9734e63..b88c107 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -43,6 +43,7 @@
*/
#include "sun8i-a23-a33.dtsi"
+#include <dt-bindings/thermal/thermal.h>
/ {
cpu0_opp_table: opp_table0 {
@@ -127,6 +128,7 @@
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
+ #cooling-cells = <2>;
};
cpu@1 {
@@ -170,6 +172,49 @@
};
};
+ thermal-zones {
+ cpu_thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths>;
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ map1 {
+ trip = <&cpu_alert1>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+
+ trips {
+ cpu_alert0: cpu_alert0 {
+ /* milliCelsius */
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_alert1: cpu_alert1 {
+ /* milliCelsius */
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ cpu_crit: cpu_crit {
+ /* milliCelsius */
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
memory {
reg = <0x40000000 0x80000000>;
};
--
2.9.3
^ permalink raw reply related
* [PATCH v4 5/8] ARM: sun8i: a33: add thermal sensor
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This adds the DT node for the thermal sensor present in the Allwinner
A33 GPADC.
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
v3:
- switched compatible to allwinner,sun8i-a33-ths,
- renamed DT node name and label to ths to better match datasheet's name,
arch/arm/boot/dts/sun8i-a33.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 077db22..9734e63 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -266,6 +266,13 @@
status = "disabled";
};
+ ths: ths@01c25000 {
+ compatible = "allwinner,sun8i-a33-ths";
+ reg = <0x01c25000 0x100>;
+ #thermal-sensor-cells = <0>;
+ #io-channel-cells = <0>;
+ };
+
fe0: display-frontend@01e00000 {
compatible = "allwinner,sun8i-a33-display-frontend";
reg = <0x01e00000 0x20000>;
@@ -376,6 +383,11 @@
};
};
};
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&ths>;
+ };
};
&ccu {
--
2.9.3
^ permalink raw reply related
* [PATCH v4 4/8] iio: adc: sun4i-gpadc-iio: add support for A33 thermal sensor
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This adds support for the Allwinner A33 thermal sensor.
Unlike the A10, A13 and A31, the Allwinner A33 only has one channel
which is dedicated to the thermal sensor. Moreover, its thermal sensor
does not generate interruptions, thus we only need to directly read the
register storing the temperature value.
The MFD used by the A10, A13 and A31, was created to avoid breaking the
DT binding, but since the nodes for the ADC weren't there for the A33,
it is not needed.
Though the A33 does not have an internal ADC, it has a thermal sensor
which shares the same registers with GPADC of the already supported SoCs
and almost the same bits, for the same purpose (thermal sensor).
The thermal sensor behaves exactly the same (except the presence of
interrupts or not) on the different SoCs.
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Acked-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
v3:
- switched compatible from allwinner,sun8i-a33-gpadc-iio to
allwinner,sun8i-a33-ths to better reflect the datasheet's name,
- fixed the non-working if (!IS_ENABLED(THERMAL_OF)) by prefixing it with
CONFIG,
v2:
- removed added comments in Kconfig,
- simplified Kconfig depends on condition,
- removed THERMAL_OF requirement for sun8i,
- renamed sun8i_gpadc_channels to sun8i_a33_gpadc_channels,
- renamed use_dt boolean in no_irq as it reflects better why we need it,
- removed spurious/unneeded modifications done in v1,
drivers/iio/adc/Kconfig | 2 +-
drivers/iio/adc/sun4i-gpadc-iio.c | 100 ++++++++++++++++++++++++++++++++++++--
include/linux/mfd/sun4i-gpadc.h | 4 ++
3 files changed, 102 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index d0af51d..d9b6101 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -561,7 +561,7 @@ config STX104
config SUN4I_GPADC
tristate "Support for the Allwinner SoCs GPADC"
depends on IIO
- depends on MFD_SUN4I_GPADC
+ depends on MFD_SUN4I_GPADC || MACH_SUN8I
help
Say yes here to build support for Allwinner (A10, A13 and A31) SoCs
GPADC. This ADC provides 4 channels which can be used as an ADC or as
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 7cb997a..74705aa 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -85,6 +85,12 @@ static const struct gpadc_data sun6i_gpadc_data = {
.adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
};
+static const struct gpadc_data sun8i_a33_gpadc_data = {
+ .temp_offset = -1662,
+ .temp_scale = 162,
+ .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
+};
+
struct sun4i_gpadc_iio {
struct iio_dev *indio_dev;
struct completion completion;
@@ -96,6 +102,7 @@ struct sun4i_gpadc_iio {
unsigned int temp_data_irq;
atomic_t ignore_temp_data_irq;
const struct gpadc_data *data;
+ bool no_irq;
/* prevents concurrent reads of temperature and ADC */
struct mutex mutex;
};
@@ -138,6 +145,23 @@ static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
};
+static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
+ {
+ .type = IIO_TEMP,
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
+ BIT(IIO_CHAN_INFO_SCALE) |
+ BIT(IIO_CHAN_INFO_OFFSET),
+ .datasheet_name = "temp_adc",
+ },
+};
+
+static const struct regmap_config sun4i_gpadc_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .fast_io = true,
+};
+
static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
unsigned int irq)
{
@@ -247,6 +271,17 @@ static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
{
struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
+ if (info->no_irq) {
+ pm_runtime_get_sync(indio_dev->dev.parent);
+
+ regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
+
+ pm_runtime_mark_last_busy(indio_dev->dev.parent);
+ pm_runtime_put_autosuspend(indio_dev->dev.parent);
+
+ return 0;
+ }
+
return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
}
@@ -454,6 +489,58 @@ static int sun4i_irq_init(struct platform_device *pdev, const char *name,
return 0;
}
+static const struct of_device_id sun4i_gpadc_of_id[] = {
+ {
+ .compatible = "allwinner,sun8i-a33-ths",
+ .data = &sun8i_a33_gpadc_data,
+ },
+ { /* sentinel */ }
+};
+
+static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
+ struct iio_dev *indio_dev)
+{
+ struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
+ const struct of_device_id *of_dev;
+ struct thermal_zone_device *tzd;
+ struct resource *mem;
+ void __iomem *base;
+ int ret;
+
+ of_dev = of_match_device(sun4i_gpadc_of_id, &pdev->dev);
+ if (!of_dev)
+ return -ENODEV;
+
+ info->no_irq = true;
+ info->data = (struct gpadc_data *)of_dev->data;
+ indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
+ indio_dev->channels = sun8i_a33_gpadc_channels;
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(&pdev->dev, mem);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
+ &sun4i_gpadc_regmap_config);
+ if (IS_ERR(info->regmap)) {
+ ret = PTR_ERR(info->regmap);
+ dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
+ return ret;
+ }
+
+ if (!IS_ENABLED(CONFIG_THERMAL_OF))
+ return 0;
+
+ tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, 0, info,
+ &sun4i_ts_tz_ops);
+ if (IS_ERR(tzd))
+ dev_err(&pdev->dev, "could not register thermal sensor: %ld\n",
+ PTR_ERR(tzd));
+
+ return PTR_ERR_OR_ZERO(tzd);
+}
+
static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
struct iio_dev *indio_dev)
{
@@ -462,6 +549,7 @@ static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
dev_get_drvdata(pdev->dev.parent);
int ret;
+ info->no_irq = false;
info->regmap = sun4i_gpadc_dev->regmap;
indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
@@ -561,7 +649,11 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
indio_dev->info = &sun4i_gpadc_iio_info;
indio_dev->modes = INDIO_DIRECT_MODE;
- ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
+ if (pdev->dev.of_node)
+ ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
+ else
+ ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
+
if (ret)
return ret;
@@ -580,7 +672,7 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
return 0;
err_map:
- if (IS_ENABLED(CONFIG_THERMAL_OF))
+ if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
iio_map_array_unregister(indio_dev);
pm_runtime_put(&pdev->dev);
@@ -592,10 +684,11 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
static int sun4i_gpadc_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
+ struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
pm_runtime_put(&pdev->dev);
pm_runtime_disable(&pdev->dev);
- if (IS_ENABLED(CONFIG_THERMAL_OF))
+ if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
iio_map_array_unregister(indio_dev);
return 0;
@@ -611,6 +704,7 @@ static const struct platform_device_id sun4i_gpadc_id[] = {
static struct platform_driver sun4i_gpadc_driver = {
.driver = {
.name = "sun4i-gpadc-iio",
+ .of_match_table = sun4i_gpadc_of_id,
.pm = &sun4i_gpadc_pm_ops,
},
.id_table = sun4i_gpadc_id,
diff --git a/include/linux/mfd/sun4i-gpadc.h b/include/linux/mfd/sun4i-gpadc.h
index 509e736..139872c 100644
--- a/include/linux/mfd/sun4i-gpadc.h
+++ b/include/linux/mfd/sun4i-gpadc.h
@@ -38,6 +38,10 @@
#define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x))
#define SUN6I_GPADC_CTRL1_ADC_CHAN_MASK GENMASK(3, 0)
+/* TP_CTRL1 bits for sun8i SoCs */
+#define SUN8I_GPADC_CTRL1_CHOP_TEMP_EN BIT(8)
+#define SUN8I_GPADC_CTRL1_GPADC_CALI_EN BIT(7)
+
#define SUN4I_GPADC_CTRL2 0x08
#define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28)
--
2.9.3
^ permalink raw reply related
* [PATCH v4 3/8] iio: adc: sun4i-gpadc-iio: move code used in MFD probing to new function
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This moves code used in MFD probing to a new sun4i_gpadc_probe_mfd
function.
This driver was initially written for A10, A13 and A31 SoCs which
already had a DT binding for this IP, thus we needed to use an MFD to
probe the different drivers without changing the DT binding of these
SoCs.
For SoCs that will require to create a DT binding for this IP, we can
avoid using an MFD, thus we need two separate functions: one for probing
via MFD and one for probing without MFD.
This split the code specific to MFD probing in a function separated from
the driver probe function.
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
v3:
- updated commit log,
added in v2
drivers/iio/adc/sun4i-gpadc-iio.c | 78 ++++++++++++++++++++++-----------------
1 file changed, 45 insertions(+), 33 deletions(-)
diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index a8e134f..7cb997a 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -454,31 +454,16 @@ static int sun4i_irq_init(struct platform_device *pdev, const char *name,
return 0;
}
-static int sun4i_gpadc_probe(struct platform_device *pdev)
+static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
+ struct iio_dev *indio_dev)
{
- struct sun4i_gpadc_iio *info;
- struct iio_dev *indio_dev;
+ struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
+ struct sun4i_gpadc_dev *sun4i_gpadc_dev =
+ dev_get_drvdata(pdev->dev.parent);
int ret;
- struct sun4i_gpadc_dev *sun4i_gpadc_dev;
-
- sun4i_gpadc_dev = dev_get_drvdata(pdev->dev.parent);
-
- indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
- if (!indio_dev)
- return -ENOMEM;
- info = iio_priv(indio_dev);
- platform_set_drvdata(pdev, indio_dev);
-
- mutex_init(&info->mutex);
info->regmap = sun4i_gpadc_dev->regmap;
- info->indio_dev = indio_dev;
- init_completion(&info->completion);
- indio_dev->name = dev_name(&pdev->dev);
- indio_dev->dev.parent = &pdev->dev;
- indio_dev->dev.of_node = pdev->dev.of_node;
- indio_dev->info = &sun4i_gpadc_iio_info;
- indio_dev->modes = INDIO_DIRECT_MODE;
+
indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
indio_dev->channels = sun4i_gpadc_channels;
@@ -519,8 +504,7 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
dev_err(&pdev->dev,
"could not register thermal sensor: %ld\n",
PTR_ERR(tzd));
- ret = PTR_ERR(tzd);
- goto err;
+ return PTR_ERR(tzd);
}
} else {
indio_dev->num_channels =
@@ -528,36 +512,65 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
indio_dev->channels = sun4i_gpadc_channels_no_temp;
}
- pm_runtime_set_autosuspend_delay(&pdev->dev,
- SUN4I_GPADC_AUTOSUSPEND_DELAY);
- pm_runtime_use_autosuspend(&pdev->dev);
- pm_runtime_set_suspended(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
-
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
sun4i_gpadc_temp_data_irq_handler,
"temp_data", &info->temp_data_irq,
&info->ignore_temp_data_irq);
if (ret < 0)
- goto err;
+ return ret;
}
ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
&info->fifo_data_irq, &info->ignore_fifo_data_irq);
if (ret < 0)
- goto err;
+ return ret;
if (IS_ENABLED(CONFIG_THERMAL_OF)) {
ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
if (ret < 0) {
dev_err(&pdev->dev,
"failed to register iio map array\n");
- goto err;
+ return ret;
}
}
+ return 0;
+}
+
+static int sun4i_gpadc_probe(struct platform_device *pdev)
+{
+ struct sun4i_gpadc_iio *info;
+ struct iio_dev *indio_dev;
+ int ret;
+
+ indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
+ if (!indio_dev)
+ return -ENOMEM;
+
+ info = iio_priv(indio_dev);
+ platform_set_drvdata(pdev, indio_dev);
+
+ mutex_init(&info->mutex);
+ info->indio_dev = indio_dev;
+ init_completion(&info->completion);
+ indio_dev->name = dev_name(&pdev->dev);
+ indio_dev->dev.parent = &pdev->dev;
+ indio_dev->dev.of_node = pdev->dev.of_node;
+ indio_dev->info = &sun4i_gpadc_iio_info;
+ indio_dev->modes = INDIO_DIRECT_MODE;
+
+ ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
+ if (ret)
+ return ret;
+
+ pm_runtime_set_autosuspend_delay(&pdev->dev,
+ SUN4I_GPADC_AUTOSUSPEND_DELAY);
+ pm_runtime_use_autosuspend(&pdev->dev);
+ pm_runtime_set_suspended(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+
ret = devm_iio_device_register(&pdev->dev, indio_dev);
if (ret < 0) {
dev_err(&pdev->dev, "could not register the device\n");
@@ -570,7 +583,6 @@ static int sun4i_gpadc_probe(struct platform_device *pdev)
if (IS_ENABLED(CONFIG_THERMAL_OF))
iio_map_array_unregister(indio_dev);
-err:
pm_runtime_put(&pdev->dev);
pm_runtime_disable(&pdev->dev);
--
2.9.3
^ permalink raw reply related
* [PATCH v4 2/8] dt-bindings: input: touschcreen: remove sun4i documentation
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This patch removes the sun4i touchscreen controller binding
documentation since it has been merged with the sun4i GPADC binding
documentation.
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Acked-by: Dmitry Torokhov <dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
v4:
- correct patch title,
.../bindings/input/touchscreen/sun4i.txt | 38 ----------------------
1 file changed, 38 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/input/touchscreen/sun4i.txt
diff --git a/Documentation/devicetree/bindings/input/touchscreen/sun4i.txt b/Documentation/devicetree/bindings/input/touchscreen/sun4i.txt
deleted file mode 100644
index 89abecd..0000000
--- a/Documentation/devicetree/bindings/input/touchscreen/sun4i.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-sun4i resistive touchscreen controller
---------------------------------------
-
-Required properties:
- - compatible: "allwinner,sun4i-a10-ts", "allwinner,sun5i-a13-ts" or
- "allwinner,sun6i-a31-ts"
- - reg: mmio address range of the chip
- - interrupts: interrupt to which the chip is connected
- - #thermal-sensor-cells: shall be 0
-
-Optional properties:
- - allwinner,ts-attached : boolean indicating that an actual touchscreen
- is attached to the controller
- - allwinner,tp-sensitive-adjust : integer (4 bits)
- adjust sensitivity of pen down detection
- between 0 (least sensitive) and 15
- (defaults to 15)
- - allwinner,filter-type : integer (2 bits)
- select median and averaging filter
- samples used for median / averaging filter
- 0: 4/2
- 1: 5/3
- 2: 8/4
- 3: 16/8
- (defaults to 1)
-
-Example:
-
- rtp: rtp@01c25000 {
- compatible = "allwinner,sun4i-a10-ts";
- reg = <0x01c25000 0x100>;
- interrupts = <29>;
- allwinner,ts-attached;
- #thermal-sensor-cells = <0>;
- /* sensitive/noisy touch panel */
- allwinner,tp-sensitive-adjust = <0>;
- allwinner,filter-type = <3>;
- };
--
2.9.3
^ permalink raw reply related
* [PATCH v4 1/8] dt-bindings: mfd: add A33 GPADC binding
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
In-Reply-To: <20170405090634.4649-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This patch adds documentation for the A33 GPADC binding.
Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
v4:
- correct patch title,
v3:
- fixed missing allwinner in front of compatible,
- updated compatible to allwinner,sun8i-a33-ths to better reflect the
datasheet's name,
- updated example's DT node name and label to ths,
added in v2
.../devicetree/bindings/mfd/sun4i-gpadc.txt | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
new file mode 100644
index 0000000..badff36
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
@@ -0,0 +1,59 @@
+Allwinner SoCs' GPADC Device Tree bindings
+------------------------------------------
+The Allwinner SoCs all have an ADC that can also act as a thermal sensor
+and sometimes as a touchscreen controller.
+
+Required properties:
+ - compatible: "allwinner,sun8i-a33-ths",
+ - reg: mmio address range of the chip,
+ - #thermal-sensor-cells: shall be 0,
+ - #io-channel-cells: shall be 0,
+
+Example:
+ ths: ths@01c25000 {
+ compatible = "allwinner,sun8i-a33-ths";
+ reg = <0x01c25000 0x100>;
+ #thermal-sensor-cells = <0>;
+ #io-channel-cells = <0>;
+ };
+
+sun4i, sun5i and sun6i SoCs are also supported via the older binding:
+
+sun4i resistive touchscreen controller
+--------------------------------------
+
+Required properties:
+ - compatible: "allwinner,sun4i-a10-ts", "allwinner,sun5i-a13-ts" or
+ "allwinner,sun6i-a31-ts"
+ - reg: mmio address range of the chip
+ - interrupts: interrupt to which the chip is connected
+ - #thermal-sensor-cells: shall be 0
+
+Optional properties:
+ - allwinner,ts-attached : boolean indicating that an actual touchscreen
+ is attached to the controller
+ - allwinner,tp-sensitive-adjust : integer (4 bits)
+ adjust sensitivity of pen down detection
+ between 0 (least sensitive) and 15
+ (defaults to 15)
+ - allwinner,filter-type : integer (2 bits)
+ select median and averaging filter
+ samples used for median / averaging filter
+ 0: 4/2
+ 1: 5/3
+ 2: 8/4
+ 3: 16/8
+ (defaults to 1)
+
+Example:
+
+ rtp: rtp@01c25000 {
+ compatible = "allwinner,sun4i-a10-ts";
+ reg = <0x01c25000 0x100>;
+ interrupts = <29>;
+ allwinner,ts-attached;
+ #thermal-sensor-cells = <0>;
+ /* sensitive/noisy touch panel */
+ allwinner,tp-sensitive-adjust = <0>;
+ allwinner,filter-type = <3>;
+ };
--
2.9.3
^ permalink raw reply related
* [PATCH v4 0/8] add thermal throttling to Allwinner A33 SoC
From: Quentin Schulz @ 2017-04-05 9:06 UTC (permalink / raw)
To: dmitry.torokhov-Re5JQEeQqe8AvxtiuMwx3w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
lee.jones-QSEj5FYQhm4dnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg
Cc: Quentin Schulz, thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-input-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw, icenowy-ymACFijhrKM
The Allwinner SoCs all have an ADC that can also act as a touchscreen
controller and a thermal sensor. The first four channels can be used
either for the ADC or the touchscreen and the fifth channel is used for
the thermal sensor. We currently have a driver for the two latter
functions in drivers/input/touchscreen/sun4i-ts.c but we don't have
access to the ADC feature at all. It is meant to replace the current
driver by using MFD and subdrivers for existing bindings.
The Allwinner A33 only has a thermal sensor present in the GPADC. In
addition, there is not an existing DT binding for the GPADC. Thus, we do
not need the sun4i-gpadc MFD driver which was made to keep DT compatibility
and probe subdrivers without the need to add DT subnodes.
This series of patch adds the thermal sensor for the A33 and GPU/CPU
thermal throttling. It also adds the cpu-supply property to the CPU node
needed by the Sinlinx SinA33 and Olinuxino A33 to adapt their CPU regulator
voltage depending on the currently used OPP. The other A33 boards all have
their cpu-supply property set.
This series also fixes the missing operating-points-v2 property in cpu DT
nodes. Finally, it also adds all remaining OPPs which can be found in
Allwinner 3.4 linux and fex files of all A33 boards.
This series of patch is based on this[1] series of patch.
v4:
- fixing patch name for DT bindings,
v3:
- fixed compatible name in DT and in documentation,
- fixed DT node name and label,
- added explanations in commit logs,
- moved frequencies that need overvolting to board DTS instead of A33 DTSI,
- fixed a typo in if is_enabled condition,
- removed all patches concerning Olimex Olinuxino (no HW to test on),
[1] https://lkml.org/lkml/2016/12/13/298 : "[PATCH v9] add support for Allwinner
SoCs ADC"
Thanks,
Quentin
Maxime Ripard (1):
ARM: sun8i: a33: Add devfreq-based GPU cooling
Quentin Schulz (7):
dt-bindings: mfd: add A33 GPADC binding
dt-bindings: input: touschcreen: remove sun4i documentation
iio: adc: sun4i-gpadc-iio: move code used in MFD probing to new
function
iio: adc: sun4i-gpadc-iio: add support for A33 thermal sensor
ARM: sun8i: a33: add thermal sensor
ARM: sun8i: a33: add CPU thermal throttling
ARM: sun8i: sina33: add highest OPP of CPUs
.../touchscreen/sun4i.txt => mfd/sun4i-gpadc.txt} | 21 +++
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 1 +
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 14 ++
arch/arm/boot/dts/sun8i-a33.dtsi | 81 ++++++++++
drivers/iio/adc/Kconfig | 2 +-
drivers/iio/adc/sun4i-gpadc-iio.c | 170 +++++++++++++++++----
include/linux/mfd/sun4i-gpadc.h | 4 +
7 files changed, 260 insertions(+), 33 deletions(-)
rename Documentation/devicetree/bindings/{input/touchscreen/sun4i.txt => mfd/sun4i-gpadc.txt} (64%)
--
2.9.3
^ permalink raw reply
* Re: [PATCH v3 1/3] NFC: trf7970a: add device tree option for 27MHz clock
From: Samuel Ortiz @ 2017-04-05 9:06 UTC (permalink / raw)
To: Geoff Lansberry
Cc: linux-wireless, robh+dt, mark.rutland, netdev, devicetree,
linux-kernel, mgreer, justin
In-Reply-To: <1482380314-16440-1-git-send-email-geoff@kuvee.com>
Hi Geoff,
On Wed, Dec 21, 2016 at 11:18:32PM -0500, Geoff Lansberry wrote:
> The TRF7970A has configuration options to support hardware designs
> which use a 27.12MHz clock. This commit adds a device tree option
> 'clock-frequency' to support configuring the this chip for default
> 13.56MHz clock or the optional 27.12MHz clock.
>
> Signed-off-by: Geoff Lansberry <geoff@kuvee.com>
> ---
> .../devicetree/bindings/net/nfc/trf7970a.txt | 2 +
> drivers/nfc/trf7970a.c | 50 +++++++++++++++++-----
> 2 files changed, 41 insertions(+), 11 deletions(-)
Patches #1 and #2 applied to nfc-next. I'll wait for you to rework #3
before merging.
Cheers,
Samuel.
^ permalink raw reply
* Re: [PATCH v5 3/7] mfd: axp20x: add MFD cells for AXP20X and AXP22X battery driver
From: Lee Jones @ 2017-04-05 8:59 UTC (permalink / raw)
To: Quentin Schulz
Cc: sre-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
jic23-DgEjT+Ai2ygdnm+yROfE0A, knaack.h-Mmb7MZpHnFY,
lars-Qo5EllUWu/uELgA04lAiVw, pmeerw-jW+XmwGofnusTnJN9+BGXg,
icenowy-ymACFijhrKM, liam-RYWXG+zxWwBdeoIcmNTgJF6hYfS7NtTn,
thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
linux-pm-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-iio-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20170405081059.1684-4-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On Wed, 05 Apr 2017, Quentin Schulz wrote:
> The X-Powers AXP20X and AXP22X PMICs can have a battery as power supply.
>
> This patch adds the AXP20X/AXP22X battery driver to the MFD cells of the
> AXP209, AXP221 and AXP223 MFD.
>
> Signed-off-by: Quentin Schulz <quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> Acked-for-MFD-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Acked-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> ---
>
> v2:
> - changed DT node name from battery_power_supply to
> battery-power-supply,
> - removed io-channels and io-channel-names from DT (the IIO mapping is
> done in the IIO ADC driver now),
>
> drivers/mfd/axp20x.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
Applied, thanks.
> diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
> index 5ba3b04..e6f5507 100644
> --- a/drivers/mfd/axp20x.c
> +++ b/drivers/mfd/axp20x.c
> @@ -594,6 +594,9 @@ static struct mfd_cell axp20x_cells[] = {
> }, {
> .name = "axp20x-adc",
> }, {
> + .name = "axp20x-battery-power-supply",
> + .of_compatible = "x-powers,axp209-battery-power-supply",
> + }, {
> .name = "axp20x-ac-power-supply",
> .of_compatible = "x-powers,axp202-ac-power-supply",
> .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
> @@ -621,6 +624,9 @@ static struct mfd_cell axp221_cells[] = {
> .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
> .resources = axp20x_ac_power_supply_resources,
> }, {
> + .name = "axp20x-battery-power-supply",
> + .of_compatible = "x-powers,axp221-battery-power-supply",
> + }, {
> .name = "axp20x-usb-power-supply",
> .of_compatible = "x-powers,axp221-usb-power-supply",
> .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
> @@ -636,6 +642,9 @@ static struct mfd_cell axp223_cells[] = {
> }, {
> .name = "axp22x-adc",
> }, {
> + .name = "axp20x-battery-power-supply",
> + .of_compatible = "x-powers,axp221-battery-power-supply",
> + }, {
> .name = "axp20x-regulator",
> }, {
> .name = "axp20x-ac-power-supply",
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply
* [PATCH v6 23/23] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP
From: Kishon Vijay Abraham I @ 2017-04-05 8:52 UTC (permalink / raw)
To: Bjorn Helgaas, Joao Pinto, linux-pci, linux-doc, linux-kernel,
devicetree, linux-omap, linux-arm-kernel
Cc: hch, nsekhar, kishon
In-Reply-To: <20170405085243.18123-1-kishon@ti.com>
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be
set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC
mode. However in EP mode, the host system is not able to access the
MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
arch/arm/mach-omap2/clockdomains7xx_data.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c
index 6c679659cda5..67ebff829cf2 100644
--- a/arch/arm/mach-omap2/clockdomains7xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains7xx_data.c
@@ -524,7 +524,7 @@ static struct clockdomain pcie_7xx_clkdm = {
.dep_bit = DRA7XX_PCIE_STATDEP_SHIFT,
.wkdep_srcs = pcie_wkup_sleep_deps,
.sleepdep_srcs = pcie_wkup_sleep_deps,
- .flags = CLKDM_CAN_HWSUP_SWSUP,
+ .flags = CLKDM_CAN_SWSUP,
};
static struct clockdomain atl_7xx_clkdm = {
--
2.11.0
^ permalink raw reply related
* [PATCH v6 22/23] MAINTAINERS: Add PCI Endpoint maintainer
From: Kishon Vijay Abraham I @ 2017-04-05 8:52 UTC (permalink / raw)
To: Bjorn Helgaas, Joao Pinto, linux-pci, linux-doc, linux-kernel,
devicetree, linux-omap, linux-arm-kernel
Cc: hch, nsekhar, kishon
In-Reply-To: <20170405085243.18123-1-kishon@ti.com>
Add maintainer for the newly introduced PCI Endpoint framework.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5fe4848..15ed84389092 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9581,6 +9581,15 @@ F: include/linux/pci*
F: arch/x86/pci/
F: arch/x86/kernel/quirks.c
+PCI ENDPOINT SUBSYSTEM
+M: Kishon Vijay Abraham I <kishon@ti.com>
+L: linux-pci@vger.kernel.org
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/pci-endpoint.git
+S: Supported
+F: drivers/pci/endpoint/
+F: drivers/misc/pci_endpoint_test.c
+F: tools/pci/
+
PCI DRIVER FOR ALTERA PCIE IP
M: Ley Foon Tan <lftan@altera.com>
L: rfi@lists.rocketboards.org (moderated for non-subscribers)
--
2.11.0
^ permalink raw reply related
* [PATCH v6 21/23] Documentation: PCI: Add userguide for PCI endpoint test function
From: Kishon Vijay Abraham I @ 2017-04-05 8:52 UTC (permalink / raw)
To: Bjorn Helgaas, Joao Pinto, linux-pci, linux-doc, linux-kernel,
devicetree, linux-omap, linux-arm-kernel
Cc: hch, nsekhar, kishon
In-Reply-To: <20170405085243.18123-1-kishon@ti.com>
Add documentation to help users use pci-epf-test function driver and
pci_endpoint_test host driver for testing PCI.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
Documentation/PCI/00-INDEX | 2 +
Documentation/PCI/endpoint/pci-test-howto.txt | 179 ++++++++++++++++++++++++++
2 files changed, 181 insertions(+)
create mode 100644 Documentation/PCI/endpoint/pci-test-howto.txt
diff --git a/Documentation/PCI/00-INDEX b/Documentation/PCI/00-INDEX
index 2fc901a1c32e..00c9a90b6f38 100644
--- a/Documentation/PCI/00-INDEX
+++ b/Documentation/PCI/00-INDEX
@@ -18,5 +18,7 @@ endpoint/pci-endpoint-cfs.txt
- guide to use configfs to configure the PCI endpoint function.
endpoint/pci-test-function.txt
- specification of *PCI test* function device.
+endpoint/pci-test-howto.txt
+ - userguide for PCI endpoint test function.
endpoint/function/binding/
- binding documentation for PCI endpoint function
diff --git a/Documentation/PCI/endpoint/pci-test-howto.txt b/Documentation/PCI/endpoint/pci-test-howto.txt
new file mode 100644
index 000000000000..75f48c3bb191
--- /dev/null
+++ b/Documentation/PCI/endpoint/pci-test-howto.txt
@@ -0,0 +1,179 @@
+ PCI TEST USERGUIDE
+ Kishon Vijay Abraham I <kishon@ti.com>
+
+This document is a guide to help users use pci-epf-test function driver
+and pci_endpoint_test host driver for testing PCI. The list of steps to
+be followed in the host side and EP side is given below.
+
+1. Endpoint Device
+
+1.1 Endpoint Controller Devices
+
+To find the list of endpoint controller devices in the system:
+
+ # ls /sys/class/pci_epc/
+ 51000000.pcie_ep
+
+If PCI_ENDPOINT_CONFIGFS is enabled
+ # ls /sys/kernel/config/pci_ep/controllers
+ 51000000.pcie_ep
+
+1.2 Endpoint Function Drivers
+
+To find the list of endpoint function drivers in the system:
+
+ # ls /sys/bus/pci-epf/drivers
+ pci_epf_test
+
+If PCI_ENDPOINT_CONFIGFS is enabled
+ # ls /sys/kernel/config/pci_ep/functions
+ pci_epf_test
+
+1.3 Creating pci-epf-test Device
+
+PCI endpoint function device can be created using the configfs. To create
+pci-epf-test device, the following commands can be used
+
+ # mount -t configfs none /sys/kernel/config
+ # cd /sys/kernel/config/pci_ep/
+ # mkdir functions/pci_epf_test/func1
+
+The "mkdir func1" above creates the pci-epf-test function device that will
+be probed by pci_epf_test driver.
+
+The PCI endpoint framework populates the directory with the following
+configurable fields.
+
+ # ls functions/pci_epf_test/func1
+ baseclass_code interrupt_pin revid subsys_vendor_id
+ cache_line_size msi_interrupts subclass_code vendorid
+ deviceid progif_code subsys_id
+
+The PCI endpoint function driver populates these entries with default values
+when the device is bound to the driver. The pci-epf-test driver populates
+vendorid with 0xffff and interrupt_pin with 0x0001
+
+ # cat functions/pci_epf_test/func1/vendorid
+ 0xffff
+ # cat functions/pci_epf_test/func1/interrupt_pin
+ 0x0001
+
+1.4 Configuring pci-epf-test Device
+
+The user can configure the pci-epf-test device using configfs entry. In order
+to change the vendorid and the number of MSI interrupts used by the function
+device, the following commands can be used.
+
+ # echo 0x104c > functions/pci_epf_test/func1/vendorid
+ # echo 0xb500 > functions/pci_epf_test/func1/deviceid
+ # echo 16 > functions/pci_epf_test/func1/msi_interrupts
+
+1.5 Binding pci-epf-test Device to EP Controller
+
+In order for the endpoint function device to be useful, it has to be bound to
+a PCI endpoint controller driver. Use the configfs to bind the function
+device to one of the controller driver present in the system.
+
+ # ln -s functions/pci_epf_test/func1 controllers/51000000.pcie_ep/
+
+Once the above step is completed, the PCI endpoint is ready to establish a link
+with the host.
+
+1.6 Start the Link
+
+In order for the endpoint device to establish a link with the host, the _start_
+field should be populated with '1'.
+
+ # echo 1 > controllers/51000000.pcie_ep/start
+
+2. RootComplex Device
+
+2.1 lspci Output
+
+Note that the devices listed here correspond to the value populated in 1.4 above
+
+ 00:00.0 PCI bridge: Texas Instruments Device 8888 (rev 01)
+ 01:00.0 Unassigned class [ff00]: Texas Instruments Device b500
+
+2.2 Using Endpoint Test function Device
+
+pcitest.sh added in tools/pci/ can be used to run all the default PCI endpoint
+tests. Before pcitest.sh can be used pcitest.c should be compiled using the
+following commands.
+
+ cd <kernel-dir>
+ make headers_install ARCH=arm
+ arm-linux-gnueabihf-gcc -Iusr/include tools/pci/pcitest.c -o pcitest
+ cp pcitest <rootfs>/usr/sbin/
+ cp tools/pci/pcitest.sh <rootfs>
+
+2.2.1 pcitest.sh Output
+ # ./pcitest.sh
+ BAR tests
+
+ BAR0: OKAY
+ BAR1: OKAY
+ BAR2: OKAY
+ BAR3: OKAY
+ BAR4: NOT OKAY
+ BAR5: NOT OKAY
+
+ Interrupt tests
+
+ LEGACY IRQ: NOT OKAY
+ MSI1: OKAY
+ MSI2: OKAY
+ MSI3: OKAY
+ MSI4: OKAY
+ MSI5: OKAY
+ MSI6: OKAY
+ MSI7: OKAY
+ MSI8: OKAY
+ MSI9: OKAY
+ MSI10: OKAY
+ MSI11: OKAY
+ MSI12: OKAY
+ MSI13: OKAY
+ MSI14: OKAY
+ MSI15: OKAY
+ MSI16: OKAY
+ MSI17: NOT OKAY
+ MSI18: NOT OKAY
+ MSI19: NOT OKAY
+ MSI20: NOT OKAY
+ MSI21: NOT OKAY
+ MSI22: NOT OKAY
+ MSI23: NOT OKAY
+ MSI24: NOT OKAY
+ MSI25: NOT OKAY
+ MSI26: NOT OKAY
+ MSI27: NOT OKAY
+ MSI28: NOT OKAY
+ MSI29: NOT OKAY
+ MSI30: NOT OKAY
+ MSI31: NOT OKAY
+ MSI32: NOT OKAY
+
+ Read Tests
+
+ READ ( 1 bytes): OKAY
+ READ ( 1024 bytes): OKAY
+ READ ( 1025 bytes): OKAY
+ READ (1024000 bytes): OKAY
+ READ (1024001 bytes): OKAY
+
+ Write Tests
+
+ WRITE ( 1 bytes): OKAY
+ WRITE ( 1024 bytes): OKAY
+ WRITE ( 1025 bytes): OKAY
+ WRITE (1024000 bytes): OKAY
+ WRITE (1024001 bytes): OKAY
+
+ Copy Tests
+
+ COPY ( 1 bytes): OKAY
+ COPY ( 1024 bytes): OKAY
+ COPY ( 1025 bytes): OKAY
+ COPY (1024000 bytes): OKAY
+ COPY (1024001 bytes): OKAY
--
2.11.0
^ permalink raw reply related
* [PATCH v6 20/23] tools: PCI: Add sample test script to invoke pcitest
From: Kishon Vijay Abraham I @ 2017-04-05 8:52 UTC (permalink / raw)
To: Bjorn Helgaas, Joao Pinto, linux-pci-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: hch-wEGCiKHe2LqWVfeAwA7xHQ, nsekhar-l0cyMroinI0,
kishon-l0cyMroinI0
In-Reply-To: <20170405085243.18123-1-kishon-l0cyMroinI0@public.gmane.org>
Add a simple test script that invokes the pcitest userspace tool to perform
all the PCI endpoint tests (BAR tests, interrupt tests, read tests, write
tests and copy tests).
Signed-off-by: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
Signed-off-by: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
---
tools/pci/pcitest.sh | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 tools/pci/pcitest.sh
diff --git a/tools/pci/pcitest.sh b/tools/pci/pcitest.sh
new file mode 100644
index 000000000000..5442bbea4c22
--- /dev/null
+++ b/tools/pci/pcitest.sh
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+echo "BAR tests"
+echo
+
+bar=0
+
+while [ $bar -lt 6 ]
+do
+ pcitest -b $bar
+ bar=`expr $bar + 1`
+done
+echo
+
+echo "Interrupt tests"
+echo
+
+pcitest -l
+msi=1
+
+while [ $msi -lt 33 ]
+do
+ pcitest -m $msi
+ msi=`expr $msi + 1`
+done
+echo
+
+echo "Read Tests"
+echo
+
+pcitest -r -s 1
+pcitest -r -s 1024
+pcitest -r -s 1025
+pcitest -r -s 1024000
+pcitest -r -s 1024001
+echo
+
+echo "Write Tests"
+echo
+
+pcitest -w -s 1
+pcitest -w -s 1024
+pcitest -w -s 1025
+pcitest -w -s 1024000
+pcitest -w -s 1024001
+echo
+
+echo "Copy Tests"
+echo
+
+pcitest -c -s 1
+pcitest -c -s 1024
+pcitest -c -s 1025
+pcitest -c -s 1024000
+pcitest -c -s 1024001
+echo
--
2.11.0
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^ permalink raw reply related
* [PATCH v6 19/23] tools: PCI: Add a userspace tool to test PCI endpoint
From: Kishon Vijay Abraham I @ 2017-04-05 8:52 UTC (permalink / raw)
To: Bjorn Helgaas, Joao Pinto, linux-pci-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: hch-wEGCiKHe2LqWVfeAwA7xHQ, nsekhar-l0cyMroinI0,
kishon-l0cyMroinI0
In-Reply-To: <20170405085243.18123-1-kishon-l0cyMroinI0@public.gmane.org>
Add a userspace tool to invoke the ioctls exposed by the PCI endpoint test
driver to perform various PCI tests.
Signed-off-by: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
Signed-off-by: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
---
tools/pci/pcitest.c | 186 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 186 insertions(+)
create mode 100644 tools/pci/pcitest.c
diff --git a/tools/pci/pcitest.c b/tools/pci/pcitest.c
new file mode 100644
index 000000000000..ad54a58d7dda
--- /dev/null
+++ b/tools/pci/pcitest.c
@@ -0,0 +1,186 @@
+/**
+ * Userspace PCI Endpoint Test Module
+ *
+ * Copyright (C) 2017 Texas Instruments
+ * Author: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <errno.h>
+#include <fcntl.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/ioctl.h>
+#include <time.h>
+#include <unistd.h>
+
+#include <linux/pcitest.h>
+
+#define BILLION 1E9
+
+static char *result[] = { "NOT OKAY", "OKAY" };
+
+struct pci_test {
+ char *device;
+ char barnum;
+ bool legacyirq;
+ unsigned int msinum;
+ bool read;
+ bool write;
+ bool copy;
+ unsigned long size;
+};
+
+static int run_test(struct pci_test *test)
+{
+ long ret;
+ int fd;
+ struct timespec start, end;
+ double time;
+
+ fd = open(test->device, O_RDWR);
+ if (fd < 0) {
+ perror("can't open PCI Endpoint Test device");
+ return fd;
+ }
+
+ if (test->barnum >= 0 && test->barnum <= 5) {
+ ret = ioctl(fd, PCITEST_BAR, test->barnum);
+ fprintf(stdout, "BAR%d:\t\t", test->barnum);
+ if (ret < 0)
+ fprintf(stdout, "TEST FAILED\n");
+ else
+ fprintf(stdout, "%s\n", result[ret]);
+ }
+
+ if (test->legacyirq) {
+ ret = ioctl(fd, PCITEST_LEGACY_IRQ, 0);
+ fprintf(stdout, "LEGACY IRQ:\t");
+ if (ret < 0)
+ fprintf(stdout, "TEST FAILED\n");
+ else
+ fprintf(stdout, "%s\n", result[ret]);
+ }
+
+ if (test->msinum > 0 && test->msinum <= 32) {
+ ret = ioctl(fd, PCITEST_MSI, test->msinum);
+ fprintf(stdout, "MSI%d:\t\t", test->msinum);
+ if (ret < 0)
+ fprintf(stdout, "TEST FAILED\n");
+ else
+ fprintf(stdout, "%s\n", result[ret]);
+ }
+
+ if (test->write) {
+ ret = ioctl(fd, PCITEST_WRITE, test->size);
+ fprintf(stdout, "WRITE (%7ld bytes):\t\t", test->size);
+ if (ret < 0)
+ fprintf(stdout, "TEST FAILED\n");
+ else
+ fprintf(stdout, "%s\n", result[ret]);
+ }
+
+ if (test->read) {
+ ret = ioctl(fd, PCITEST_READ, test->size);
+ fprintf(stdout, "READ (%7ld bytes):\t\t", test->size);
+ if (ret < 0)
+ fprintf(stdout, "TEST FAILED\n");
+ else
+ fprintf(stdout, "%s\n", result[ret]);
+ }
+
+ if (test->copy) {
+ ret = ioctl(fd, PCITEST_COPY, test->size);
+ fprintf(stdout, "COPY (%7ld bytes):\t\t", test->size);
+ if (ret < 0)
+ fprintf(stdout, "TEST FAILED\n");
+ else
+ fprintf(stdout, "%s\n", result[ret]);
+ }
+
+ fflush(stdout);
+}
+
+int main(int argc, char **argv)
+{
+ int c;
+ struct pci_test *test;
+
+ test = calloc(1, sizeof(*test));
+ if (!test) {
+ perror("Fail to allocate memory for pci_test\n");
+ return -ENOMEM;
+ }
+
+ /* since '0' is a valid BAR number, initialize it to -1 */
+ test->barnum = -1;
+
+ /* set default size as 100KB */
+ test->size = 0x19000;
+
+ /* set default endpoint device */
+ test->device = "/dev/pci-endpoint-test.0";
+
+ while ((c = getopt(argc, argv, "D:b:m:lrwcs:")) != EOF)
+ switch (c) {
+ case 'D':
+ test->device = optarg;
+ continue;
+ case 'b':
+ test->barnum = atoi(optarg);
+ if (test->barnum < 0 || test->barnum > 5)
+ goto usage;
+ continue;
+ case 'l':
+ test->legacyirq = true;
+ continue;
+ case 'm':
+ test->msinum = atoi(optarg);
+ if (test->msinum < 1 || test->msinum > 32)
+ goto usage;
+ continue;
+ case 'r':
+ test->read = true;
+ continue;
+ case 'w':
+ test->write = true;
+ continue;
+ case 'c':
+ test->copy = true;
+ continue;
+ case 's':
+ test->size = strtoul(optarg, NULL, 0);
+ continue;
+ case '?':
+ case 'h':
+ default:
+usage:
+ fprintf(stderr,
+ "usage: %s [options]\n"
+ "Options:\n"
+ "\t-D <dev> PCI endpoint test device {default: /dev/pci-endpoint-test.0}\n"
+ "\t-b <bar num> BAR test (bar number between 0..5)\n"
+ "\t-m <msi num> MSI test (msi number between 1..32)\n"
+ "\t-r Read buffer test\n"
+ "\t-w Write buffer test\n"
+ "\t-c Copy buffer test\n"
+ "\t-s <size> Size of buffer {default: 100KB}\n",
+ argv[0]);
+ return -EINVAL;
+ }
+
+ run_test(test);
+ return 0;
+}
--
2.11.0
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