* [PATCH v2 0/3] of: Make of_match_node() an inline stub for CONFIG_OF=n
From: Florian Fainelli @ 2017-04-12 4:41 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: andrew-g2DYL2Zd6BY,
vivien.didelot-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/, Florian Fainelli,
Lee Jones, Nicolas Ferre, Rob Herring, Frank Rowand,
open list:NETWORKING DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
Hi all,
This patch series makes of_match_node() an inline stub for CONFIG_OF=n. kbuild
reported two build errors which are fixed as preriquisite patches.
This is based on Linus' master, not sure which tree would merge this, Frank's?
Thanks!
Florian Fainelli (3):
mfd: max8998: Remove CONFIG_OF around max8998_dt_match
net: macb: Remove CONFIG_OF around DT match table
of: Make of_match_node() an inline stub for CONFIG_OF=n
drivers/mfd/max8998.c | 2 --
drivers/net/ethernet/cadence/macb.c | 2 --
include/linux/of.h | 6 +++++-
3 files changed, 5 insertions(+), 5 deletions(-)
--
2.9.3
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^ permalink raw reply
* [PATCH v2 1/3] mfd: max8998: Remove CONFIG_OF around max8998_dt_match
From: Florian Fainelli @ 2017-04-12 4:41 UTC (permalink / raw)
To: linux-kernel
Cc: andrew, vivien.didelot, Florian Fainelli, Lee Jones,
Nicolas Ferre, Rob Herring, Frank Rowand,
open list:NETWORKING DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
In-Reply-To: <20170412044156.17351-1-f.fainelli@gmail.com>
A subsequent patch is going to make of_match_node() an inline stub when
CONFIG_OF is disabled which will properly take care of having the compiler
eliminate the variable. To avoid more #ifdef/#else, just always make the match
table available.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/mfd/max8998.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/mfd/max8998.c b/drivers/mfd/max8998.c
index 4c33b8063bc3..372f681ec1bb 100644
--- a/drivers/mfd/max8998.c
+++ b/drivers/mfd/max8998.c
@@ -129,14 +129,12 @@ int max8998_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask)
}
EXPORT_SYMBOL(max8998_update_reg);
-#ifdef CONFIG_OF
static const struct of_device_id max8998_dt_match[] = {
{ .compatible = "maxim,max8998", .data = (void *)TYPE_MAX8998 },
{ .compatible = "national,lp3974", .data = (void *)TYPE_LP3974 },
{ .compatible = "ti,lp3974", .data = (void *)TYPE_LP3974 },
{},
};
-#endif
/*
* Only the common platform data elements for max8998 are parsed here from the
--
2.9.3
^ permalink raw reply related
* [PATCH v2 2/3] net: macb: Remove CONFIG_OF around DT match table
From: Florian Fainelli @ 2017-04-12 4:41 UTC (permalink / raw)
To: linux-kernel
Cc: andrew, vivien.didelot, Florian Fainelli, Lee Jones,
Nicolas Ferre, Rob Herring, Frank Rowand,
open list:NETWORKING DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
In-Reply-To: <20170412044156.17351-1-f.fainelli@gmail.com>
A subsequent patch is going to make of_match_node() an inline stub when
CONFIG_OF is disabled, which will let the compiler eliminate unused variables.
In order not to clutter the code more, remove the CONFIG_OF #ifdef such that
macb_dt_ids and what it references are always defined.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/ethernet/cadence/macb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index 30606b11b128..01016e9525ee 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2811,7 +2811,6 @@ static int macb_init(struct platform_device *pdev)
return 0;
}
-#if defined(CONFIG_OF)
/* 1518 rounded up */
#define AT91ETHER_MAX_RBUFF_SZ 0x600
/* max number of receive buffers */
@@ -3215,7 +3214,6 @@ static const struct of_device_id macb_dt_ids[] = {
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, macb_dt_ids);
-#endif /* CONFIG_OF */
static const struct macb_config default_gem_config = {
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
--
2.9.3
^ permalink raw reply related
* [PATCH v2 3/3] of: Make of_match_node() an inline stub for CONFIG_OF=n
From: Florian Fainelli @ 2017-04-12 4:41 UTC (permalink / raw)
To: linux-kernel
Cc: andrew, vivien.didelot, Florian Fainelli, Lee Jones,
Nicolas Ferre, Rob Herring, Frank Rowand,
open list:NETWORKING DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
In-Reply-To: <20170412044156.17351-1-f.fainelli@gmail.com>
Make of_match_node() an inline function when CONFIG_OF=n which allows the
compiler to eliminate warnings about unused variables.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
include/linux/of.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/linux/of.h b/include/linux/of.h
index 21e6323de0f3..2803a85e81ec 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -839,7 +839,11 @@ static inline void of_property_clear_flag(struct property *p, unsigned long flag
}
#define of_match_ptr(_ptr) NULL
-#define of_match_node(_matches, _node) NULL
+static inline const struct of_device_id *of_match_node(
+ const struct of_device_id *matches, const struct device_node *node)
+{
+ return NULL;
+}
#endif /* CONFIG_OF */
/* Default string compare functions, Allow arch asm/prom.h to override */
--
2.9.3
^ permalink raw reply related
* Re: [GIT PULL] PCI: Support for configurable PCI endpoint
From: Kishon Vijay Abraham I @ 2017-04-12 5:43 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: devicetree, Joao Pinto, linux-doc, linux-pci, nsekhar,
linux-kernel, hch, Bjorn Helgaas, linux-omap, linux-arm-kernel
In-Reply-To: <20170411193447.GA14778@bhelgaas-glaptop.roam.corp.google.com>
Hi Bjorn,
On Wednesday 12 April 2017 01:04 AM, Bjorn Helgaas wrote:
> On Mon, Apr 10, 2017 at 10:43:28AM -0500, Bjorn Helgaas wrote:
>> On Wed, Apr 05, 2017 at 02:22:20PM +0530, Kishon Vijay Abraham I wrote:
>>> Hi Bjorn,
>>>
>>> Please find the pull request for PCI endpoint support below. I've
>>> also included all the history here.
>>
>> Thanks, I applied these (with v7 of the first patch) to pci/host-designware
>> for v4.12.
>
> Ok, sorry, I screwed this up. I think my branch actually had v5, not
> v6. But I *think* I fixed it. Here's the diff from my branch to your
> git tree. Apparently you haven't pushed the v7 patch there, so I
> *think* the diff below is the diff between v6 and v7 of that first
> patch.
I just checked your pci/host-designware branch and it looks correct. Thanks for
sorting this out.
Cheers
Kishon
^ permalink raw reply
* Re: [PATCH v1 3/3] nvmem: dt: document SNVS LPGPR binding
From: Oleksij Rempel @ 2017-04-12 6:23 UTC (permalink / raw)
To: Rob Herring
Cc: Oleksij Rempel, Srinivas Kandagatla, Maxime Ripard, Mark Rutland,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
kernel-rffoE+Jg25C1LGEWPFfZhQ
In-Reply-To: <CAL_JsqJeqYEw7v_z9zhtnP9hZEvkc5Z8TsktzbrCrmc7vorGkA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Tue, Apr 11, 2017 at 08:35:00AM -0500, Rob Herring wrote:
> On Mon, Apr 10, 2017 at 11:36 PM, Oleksij Rempel <ore-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> wrote:
> > Hi,
> > On 04/10/2017 08:22 PM, Rob Herring wrote:
> >>
> >> On Thu, Apr 06, 2017 at 09:31:07AM +0200, Oleksij Rempel wrote:
> >>>
> >>> Documenation bindings for the Low Power General Purpose Registe
> >>
> > Jes, it is refereed by other driver.
>
> What I mean is snvs-lpgpr referenced elsewhere in DT, not by some
> driver? You are not using the nvmem binding here so it doesn't seem
> like it is. If that's the case, then you don't need this node. The
> only information here is the offset which can be part of a driver for
> the parent node. To put it another way, we don't want to fill DT with
> a node per register.
This node is referenced insight of product DT. Since the system has
or may have more then one nvmem node we need to assigne aliase to it.
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* [PATCH 1/1] ARM: dts: dra7: Reduce cpu thermal shutdown temperature
From: Ravikumar Kattekola @ 2017-04-12 6:24 UTC (permalink / raw)
To: bcousson, tony
Cc: mark.rutland, devicetree, linux-kernel, robh+dt, linux-omap,
linux-arm-kernel
On dra7, as per TRM, the HW shutdown (TSHUT) temperature is hardcoded
to 123C and cannot be modified by SW. This means when the temperature
reaches 123C HW asserts TSHUT output which signals a warm reset.
This reset is held until the temperature goes below the TSHUT low (105C).
While in SW, the thermal driver continuously monitors current temperature
and takes decisions based on whether it reached an alert or a critical point.
The intention of setting a SW critical point is to prevent force reset by HW
and instead do an orderly_poweroff(). But if the SW critical temperature is
greater than or equal to that of HW then it defeats the purpose. To address
this and let SW take action before HW does keep the SW critical temperature
less than HW TSHUT value.
The value for SW critical temperature was chosen as 120C just to ensure
we give SW sometime before HW catches up.
Document reference
SPRUI30C – DRA75x, DRA74x Technical Reference Manual - November 2016
SPRUHZ6H - AM572x Technical Reference Manual - November 2016
Tested on:
DRA75x PG 2.0 Rev H EVM
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 57892f2..e714466 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -2017,4 +2017,8 @@
coefficients = <0 2000>;
};
+&cpu_crit {
+ temperature = <120000>; /* milli Celsius */
+};
+
/include/ "dra7xx-clocks.dtsi"
--
2.8.0.GIT
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
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* Re: [PATCH v4 2/3] Broadcom USB DRD Phy driver for Northstar2
From: Raviteja Garimella @ 2017-04-12 6:54 UTC (permalink / raw)
To: Kishon Vijay Abraham I
Cc: Rob Herring, Mark Rutland, Ray Jui, Scott Branden, Jon Mason,
Catalin Marinas, Will Deacon, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, BCM Kernel Feedback,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1727318a-7ef8-1ea7-a657-241bbc96bc89-l0cyMroinI0@public.gmane.org>
Hi,
On Mon, Apr 10, 2017 at 2:07 PM, Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org> wrote:
> Hi,
>
> On Wednesday 05 April 2017 07:40 PM, Raviteja Garimella wrote:
>> Hi Kishon,
>>
>> On Wed, Apr 5, 2017 at 7:04 PM, Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org> wrote:
>>> Hi Ravi,
>>>
>>> On Wednesday 05 April 2017 06:30 PM, Raviteja Garimella wrote:
>>>> Hi Kishon,
>>>>
>>>> On Wed, Apr 5, 2017 at 4:30 PM, Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org> wrote:
>>>>> Hi,
>>>>>
>>>>> On Tuesday 28 March 2017 05:57 PM, Raviteja Garimella wrote:
>>>>>> This is driver for USB DRD Phy used in Broadcom's Northstar2
>>>>>> SoC. The phy can be configured to be in Device mode or Host
>>>>>> mode based on the type of cable connected to the port. The
>>>>>> driver registers to extcon framework to get appropriate
>>>>>> connect events for Host/Device cables connect/disconnect
>>>>>> states based on VBUS and ID interrupts.
>>>>>
>>>>> $patch should be phy: phy-bcm-ns2-usbdrd: USB DRD Phy driver for Broadcoms
>>>>> Northstar2.
>>>>>
>>>>
>>>> Will do.
>>>>
>>>>> Sorry for not letting you know this earlier. But I feel the design of the
>>>>> driver should be changed. Extcon shouldn't be used here. The extcon
>>>>> notifications should be sent to the consumer driver and the consumer driver
>>>>> should be responsible for invoking the phy ops.
>>>>>
>>>>
>>>> The consumer drivers here would be a UDC driver (USB device
>>>> controller), EHCI and OHCI host controller drivers.
>>>> I was already suggested in UDC driver review to deal with extcon in Phy driver.
>>>>
>>>> This phy connects to 2 host controllers, and one device controller.
>>>> That's the design in Broadcom Northstar2
>>>> platform. The values of the VBUS and ID pins of this port are
>>>> determined based on the type of the cable (device cable
>>>> or host cable). And. phy has to be configured accordingly.
>>>>
>>>>> The phy ops being invoked during extcon events doesn't look right.
>>>>
>>>> Could you please elaborate on the concern, so that we can think of
>>>> mitigating those issues in this driver?
>>>> Since we are dealing with phy init/shutdown in this driver itself, are
>>>> you okay with moving the extcon handling code
>>>> out of phy ops ?
>>>
>>> yeah, For e.g., ns2_drd_phy_init is part of phy_ops and is being invoked from
>>> extcon events too. Can a phy which is initialized by a phy consumer (say your
>>> UDC invokes phy_init) can be shutdown by an extcon event?
>>>
>>> Maybe a clear explanation of when phy_ops here will be invoked and when it will
>>> set using extcon events might help.
>>>
>>
>> Say, we have a USB pendrive which is connected to the DRD port through
>> a host cable.
>> Now the PHY will be initialized to be in host mode.
>> When the pendrive is unplugged, and we now connect the NS2 device to
>> some linux PC,
>> now the PHY has to be shutdown, and re-initialized to be in Device mode.
>>
>> On unplug event, it is set neither to Host nor Device mode (basically
>> shutdown). Next time which ever cable is connected, the PHY is
>> initialized to the respective
>> mode.
>>
>> Please let me know if it's fine to do these initializations outside
>> phy ops, because those will
>> be irrelevant for phy consumers (the controllers) as it's anyways
>> dealt in the phy driver through
>> extcon.
>
> Yes. We shouldn't add phy_ops just for the sake of it. I think this should be
> made as a purely extcon driver (though there are a couple of bits that looks
> like initializing PHY) and keep it in drivers/extcon.
>
Actually phy_ops would be required when we want phy to be shutdown/init
during power management, where USB controllers would call them.
I reworked on this driver to address the concerns raised here. Please check
PATCH v5 that I will submit shortly.
If we want to dynamically change the mode of PHY either to be in host mode
or device mode or idle, we don't have to do a full PHY init/power on (that
earlier required doing a PHY PLL lock and other resets). We just have to
program couple of register bits that are dedicated for this purpose.
I made those changes, now we don't have to call phy ops in the driver.
Phy_ops will be called only by the consumer drivers.
Thanks,
Ravi
> Thanks
> Kishon
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^ permalink raw reply
* Re: [PATCH] [media] imx: csi: retain current field order and colorimetry setting as default
From: Hans Verkuil @ 2017-04-12 7:03 UTC (permalink / raw)
To: Philipp Zabel
Cc: Steve Longerbeam, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, shawnguo-DgEjT+Ai2ygdnm+yROfE0A,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ, fabio.estevam-3arQi8VN3Tc,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, mchehab-DgEjT+Ai2ygdnm+yROfE0A,
nick-gcszYUEDH4VrovVCs/uTlw, markus.heiser-O6JHGLzbNUwb1SvskN2V4Q,
laurent.pinchart+renesas-ryLnwIuWjnjg/C1BVhZhaw,
bparrot-l0cyMroinI0, geert-Td1EMuHUCqxL1ZNQvxDV9g,
arnd-r2nGTMty4D4, sudipm.mukherjee-Re5JQEeQqe8AvxtiuMwx3w,
minghsiu.tsai-NuS5LvNUpcJWk0Htik3J/w,
tiffany.lin-NuS5LvNUpcJWk0Htik3J/w,
jean-christophe.trotin-qxv4g6HH51o,
horms+renesas-/R6kz+dDXgpPR4JQBCEnsQ,
niklas.soderlund+renesas-1zkq55x86MTxsAP9Fp7wbw,
robert.jarzmik-GANU6spQydw, songjun.wu-UWL1GkI3JZL3oGB3hsPCZA,
andrew-ct.chen-NuS5LvNUpcJWk0Htik3J/w,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
shuah-DgEjT+Ai2ygdnm+yROfE0A, sakari.ailus-VuQAYsv1563Yd54FQh9/CA,
pavel-+ZI9xUNit7I, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-medi
In-Reply-To: <1491494481.2392.102.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
On 04/06/2017 06:01 PM, Philipp Zabel wrote:
> On Thu, 2017-04-06 at 17:43 +0200, Hans Verkuil wrote:
>> On 04/06/2017 04:54 PM, Philipp Zabel wrote:
>>> On Thu, 2017-04-06 at 16:20 +0200, Hans Verkuil wrote:
>>>> On 04/06/2017 03:55 PM, Philipp Zabel wrote:
>>>>> If the the field order is set to ANY in set_fmt, choose the currently
>>>>> set field order. If the colorspace is set to DEFAULT, choose the current
>>>>> colorspace. If any of xfer_func, ycbcr_enc or quantization are set to
>>>>> DEFAULT, either choose the current setting, or the default setting for the
>>>>> new colorspace, if non-DEFAULT colorspace was given.
>>>>>
>>>>> This allows to let field order and colorimetry settings be propagated
>>>>> from upstream by calling media-ctl on the upstream entity source pad,
>>>>> and then call media-ctl on the sink pad to manually set the input frame
>>>>> interval, without changing the already set field order and colorimetry
>>>>> information.
>>>>>
>>>>> Signed-off-by: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>>>>> ---
>>>>> This is based on imx-media-staging-md-v14, and it is supposed to allow
>>>>> configuring the pipeline with media-ctl like this:
>>>>>
>>>>> 1) media-ctl --set-v4l2 "'tc358743 1-000f':0[fmt:UYVY8_1X16/1920x1080]"
>>>>> 2) media-ctl --set-v4l2 "'imx6-mipi-csi2':1[fmt:UYVY8_1X16/1920x108]"
>>>>> 3) media-ctl --set-v4l2 "'ipu1_csi0_mux':2[fmt:UYVY8_1X16/1920x1080]"
>>>>> 4) media-ctl --set-v4l2 "'ipu1_csi0':0[fmt:UYVY8_1X16/1920x1080@1/60]"
>>>>> 5) media-ctl --set-v4l2 "'ipu1_csi0':2[fmt:AYUV32/1920x1080@1/30]"
>>>>>
>>>>> Without having step 4) overwrite the colorspace and field order set on
>>>>> 'ipu1_csi0':0 by the propagation in step 3).
>>>>> ---
>>>>> drivers/staging/media/imx/imx-media-csi.c | 34 +++++++++++++++++++++++++++++++
>>>>> 1 file changed, 34 insertions(+)
>>>>>
>>>>> diff --git a/drivers/staging/media/imx/imx-media-csi.c b/drivers/staging/media/imx/imx-media-csi.c
>>>>> index 64dc454f6b371..d94ce1de2bf05 100644
>>>>> --- a/drivers/staging/media/imx/imx-media-csi.c
>>>>> +++ b/drivers/staging/media/imx/imx-media-csi.c
>>>>> @@ -1325,6 +1325,40 @@ static int csi_set_fmt(struct v4l2_subdev *sd,
>>>>> csi_try_fmt(priv, sensor, cfg, sdformat, crop, compose, &cc);
>>>>>
>>>>> fmt = __csi_get_fmt(priv, cfg, sdformat->pad, sdformat->which);
>>>>> +
>>>>> + /* Retain current field setting as default */
>>>>> + if (sdformat->format.field == V4L2_FIELD_ANY)
>>>>> + sdformat->format.field = fmt->field;
>>>>
>>>> sdformat->format.field should never be FIELD_ANY. If it is, then that's a
>>>> subdev bug and I'm pretty sure FIELD_NONE was intended.
>>>
>>> This is the subdev. sdformat is passed in from userspace, so we have to
>>> deal with it being set to ANY. I'm trying hard right now not to return
>>> ANY though. The values in sdformat->format are applied to fmt down
>>> below.
>>
>> Do you have a git tree with this patch? It is really hard to review without
>> having the full imx-media-csi.c source.
>
> The patch applies on top of
>
> https://github.com/slongerbeam/mediatree.git imx-media-staging-md-v14
>
> I have uploaded a branch
>
> git://git.pengutronix.de/git/pza/linux imx-media-staging-md-v14+color
>
> with the patch applied on top.
>
>> I think one problem is that it is not clearly defined how subdevs and colorspace
>> information should work.
Ah, having the full source helped.
Ignore my previous review, it was incorrect.
I'll have to think about this some more. I'll get back to this, but it may take some
time since my vacation starts tomorrow. The spec is simply unclear about how to handle
this so we have to come up with some guidelines.
Regards,
Hans
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^ permalink raw reply
* Re: [PATCH 4/5] mtd: nand: add support for Micron on-die ECC
From: Boris Brezillon @ 2017-04-12 7:03 UTC (permalink / raw)
To: Bean Huo (beanhuo)
Cc: Thomas Petazzoni,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org, Campbell,
richard-/L3Ra7n9ekc@public.gmane.org, Mark Rutland,
marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, Rob Herring,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, Cyrille Pitchen,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
In-Reply-To: <5a96e73ef951414a82c01b67088b24d3-aBoyCxvc2dBaXkNJqdKpEhSpLNRU/VIH@public.gmane.org>
On Tue, 11 Apr 2017 17:01:51 +0000
"Bean Huo (beanhuo)" <beanhuo-AL4WhLSQfzjQT0dZR+AlfA@public.gmane.org> wrote:
> >On Tue, 11 Apr 2017 15:02:22 +0000
> >"Bean Huo (beanhuo)" <beanhuo-AL4WhLSQfzjQT0dZR+AlfA@public.gmane.org> wrote:
> >
> >> Hi, Boris and Thomas
> >> Let me do some explanation.
> >>
> >> >> if (NAND == SLC ) { // on-die ECC only exists in SLC //check device
> >> >> ID byte 4
> >> >> if ((ID.byte4 & 0x02) == 0x02) {// internal ECC level ==10b
> >> >
> >> >So here the MT29F1G08ABADAWP datasheet says 0x2 <=> 4bit/512bytes ECC.
> >> >
> >>
> >> If the NAND supports on-die ECC, here should be 10b, not matter it is
> >> 8bit or 4bit, You are correct, MT29F1G08ABADAWP is 0x2, its explanation is
> >4bit/512bytes ECC.
> >> But for the 70s, it is 8bit on-die ECC, but it is still 10b.
> >> So that why here using these two bits to determine if exist on-die ECC.
> >> What's more, for some old products, they don't support on-die ECC,
> >> Sometimes, here is still 01b, so still need following codes to do
> >> further determinations.
> >
> >Okay, then here is the differentiator. Did you check that on SLC NANDs there's no
> >collision on ID[4].bits[1:0]. I've seen NAND vendors changing their ID scheme in
> >incompatible ways (old fields were replaced by new ones with completely
> >different meanings).
>
>
> Yes, this is true, there is no one standard to define and formalize ID.byte4,
> It is always changing. Also, sometimes it definitely conflicts with other NAND without
> On-die ECC. For the Micron both serials SLC NAND with on-die ECC, bits[1:0] is defined
> Internal ECC level.
>
> >I'd really like to make sure we're not mis-interpreting READ_ID information, so
> >maybe we should restrict the test on ONFI NANDs if all NANDs supporting on-die
> >ECC are ONFI compliant. We should probably also check that chip->id.len >= 5.
> >
> >
> >>
> >> >> if (ID.byte4 & 0x80) {//on-Die ECC enabled
> >> >
> >> >Did you read my last reply?
> >> >Thomas discovered that ID[4].bit7 is actually reflecting the ECC
> >> >engine state (1 if the engine is enabled, 0 if it's disabled), not
> >> >whether the NAND supports on-die ECC or not, so no this test is not reliable.
> >> >
> >> For the on-die ECC, it is not always default enabled. It depends on requirement
> >from costumers.
> >> If on-die ECC is not enabled, bit7 is 0. It can be switched through "Feature
> >Operations".
> >
> >So this check is not needed, right?
>
> Here is much complicated. One question is that what main purpose of on-die ECC.
> there are two types of usage model:
> 1. on-die ECC default enabled:
> Normally before bootloader and kernel, there is no any ECC to correct and maintain
> Bootloader reliability. For this kind of customer, I think, they mainly want to have reliable booting.
> Rather than for store user data. Per this kind of condition, we don't check, because on-die ECC
> Always be enabled, cannot be disabled.
>
> 2. on-die ECC default disabled:
> I think this is used for some important user data. Unless the bootrom of CPU can issue
> SET_FEATURE to enable on-die ECC, and until Linux running, on-die ECC is still enabled.
> Otherwise, we need to check if it enables or not.
Well, knowing whether the NAND has on-die ECC or not and determining if
it's enabled by default are 2 different things. Until now, we were
trying to detect the former.
>
> >BTW, do you have NANDs where the on-die ECC is always enabled, and if this is
> >the case, what happens when you call
> >SET_FEATURE(disable/enable-ECC) on these NANDs?
>
> If this NAND is on-die ECC defaulted enabled, the on-die ECC cannot
> Disabled later. Why? This is related to specific user model.
Erf, this changes a bit what Thomas and I had in mind, because that
means read/write_page_raw() are not supported in this case, and more
importantly, that means users should by no mean enable external ECC
engines.
> We have one PPT on Micron domain website, it is "on die ECC training",
> It opens and can freely download. It clearly describes this.
Okay, I'll try to download this document.
One last question. Is it dangerous to call
SET_FEATURE(disable/enable-ECC) on a NAND that has ECC enabled by
default? We could use that to detect whether on-die ECC can be turned
off or not and adjust the chip->ecc init steps accordingly.
Thanks,
Boris
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* [PATCH 1/4] arm64: dts: rk3399: add missing qos node
From: Kever Yang @ 2017-04-12 7:10 UTC (permalink / raw)
To: heiko-4mtYJXux2i+zQB+pC5nmwQ
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Kever Yang,
devicetree-u79uwXL29TY76Z2rM5mHXA, David Wu, Caesar Wang,
Elaine Zhang, Brian Norris, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
Shawn Lin, Douglas Anderson, Will Deacon, Jianqun Xu,
Mark Rutland, Rob Herring, Catalin Marinas,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Add qos setting reg for some peripheral like sd, usb, pcie.
Signed-off-by: Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 45 ++++++++++++++++++++++++++++----
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index f4f3c96..387ae34 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -769,11 +769,6 @@
status = "disabled";
};
- qos_sd: qos@ffa74000 {
- compatible = "syscon";
- reg = <0x0 0xffa74000 0x0 0x20>;
- };
-
qos_emmc: qos@ffa58000 {
compatible = "syscon";
reg = <0x0 0xffa58000 0x0 0x20>;
@@ -784,6 +779,41 @@
reg = <0x0 0xffa5c000 0x0 0x20>;
};
+ qos_pcie: qos@ffa60080 {
+ compatible = "syscon";
+ reg = <0x0 0xffa60080 0x0 0x20>;
+ };
+
+ qos_usb_host0: qos@ffa60100 {
+ compatible = "syscon";
+ reg = <0x0 0xffa60100 0x0 0x20>;
+ };
+
+ qos_usb_host1: qos@ffa60180 {
+ compatible = "syscon";
+ reg = <0x0 0xffa60180 0x0 0x20>;
+ };
+
+ qos_usb_otg0: qos@ffa70000 {
+ compatible = "syscon";
+ reg = <0x0 0xffa70000 0x0 0x20>;
+ };
+
+ qos_usb_otg1: qos@ffa70080 {
+ compatible = "syscon";
+ reg = <0x0 0xffa70080 0x0 0x20>;
+ };
+
+ qos_sd: qos@ffa74000 {
+ compatible = "syscon";
+ reg = <0x0 0xffa74000 0x0 0x20>;
+ };
+
+ qos_sdioaudio: qos@ffa76000 {
+ compatible = "syscon";
+ reg = <0x0 0xffa76000 0x0 0x20>;
+ };
+
qos_hdcp: qos@ffa90000 {
compatible = "syscon";
reg = <0x0 0xffa90000 0x0 0x20>;
@@ -854,6 +884,11 @@
reg = <0x0 0xffad0000 0x0 0x20>;
};
+ qos_perihp: qos@ffad8080 {
+ compatible = "syscon";
+ reg = <0x0 0xffad8080 0x0 0x20>;
+ };
+
qos_gpu: qos@ffae0000 {
compatible = "syscon";
reg = <0x0 0xffae0000 0x0 0x20>;
--
1.9.1
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* [PATCH 2/4] arm64: dts: rk3399: add power domain for some peripheral
From: Kever Yang @ 2017-04-12 7:10 UTC (permalink / raw)
To: heiko-4mtYJXux2i+zQB+pC5nmwQ
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Kever Yang,
devicetree-u79uwXL29TY76Z2rM5mHXA, David Wu, Caesar Wang,
Elaine Zhang, Brian Norris, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
Shawn Lin, Douglas Anderson, Will Deacon, Jianqun Xu,
Mark Rutland, Rob Herring, Catalin Marinas,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1491981044-24635-1-git-send-email-kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Add power domain for sd, usb, edp.
Signed-off-by: Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 36 +++++++++++++++++++++++++++-----
1 file changed, 31 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 387ae34..9d44c19 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -947,6 +947,10 @@
};
/* These power domains are grouped by VD_LOGIC */
+ pd_edp@RK3399_PD_EDP {
+ reg = <RK3399_PD_EDP>;
+ clocks = <&cru PCLK_EDP_CTRL>;
+ };
pd_emmc@RK3399_PD_EMMC {
reg = <RK3399_PD_EMMC>;
clocks = <&cru ACLK_EMMC>;
@@ -958,11 +962,33 @@
<&cru PCLK_GMAC>;
pm_qos = <&qos_gmac>;
};
- pd_sd@RK3399_PD_SD {
- reg = <RK3399_PD_SD>;
- clocks = <&cru HCLK_SDMMC>,
- <&cru SCLK_SDMMC>;
- pm_qos = <&qos_sd>;
+ pd_perihp@RK3399_PD_PERIHP {
+ reg = <RK3399_PD_PERIHP>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru ACLK_PERIHP>;
+ pm_qos = <&qos_perihp>,
+ <&qos_pcie>,
+ <&qos_usb_host0>,
+ <&qos_usb_host1>;
+
+ pd_sd@RK3399_PD_SD {
+ reg = <RK3399_PD_SD>;
+ clocks = <&cru HCLK_SDMMC>,
+ <&cru SCLK_SDMMC>;
+ pm_qos = <&qos_sd>;
+ };
+ };
+ pd_sdioaudio@RK3399_PD_SDIOAUDIO {
+ reg = <RK3399_PD_SDIOAUDIO>;
+ clocks = <&cru HCLK_SDIO>;
+ pm_qos = <&qos_sdioaudio>;
+ };
+ pd_usb3@RK3399_PD_USB3 {
+ reg = <RK3399_PD_USB3>;
+ clocks = <&cru ACLK_USB3>;
+ pm_qos = <&qos_usb_otg0>,
+ <&qos_usb_otg1>;
};
pd_vio@RK3399_PD_VIO {
reg = <RK3399_PD_VIO>;
--
1.9.1
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* [PATCH 3/4] ARM: dts: rockchip: use pin constants to describe IO in pinctrl
From: Kever Yang @ 2017-04-12 7:10 UTC (permalink / raw)
To: heiko
Cc: linux-rockchip, Kever Yang, Rob Herring, Shawn Lin, Huibin Hong,
Elaine Zhang, Catalin Marinas, David Wu, Brian Norris,
Jaehoon Chung, Douglas Anderson, Will Deacon, Matthias Brugger,
devicetree, Russell King, linux-arm-kernel, Jianqun Xu,
linux-kernel, Andy Yan, Caesar Wang
In-Reply-To: <1491981044-24635-1-git-send-email-kever.yang@rock-chips.com>
Use command below to replace the IO naming in pinctrl:
sed -i -e 's/ 31 RK_FUNC_/ RK_PD7 RK_FUNC_/' arch/arm/boot/dts/rk*
sed -i -e 's/ 0 RK_FUNC_/ RK_PA0 RK_FUNC_/'
arch/arm64/boot/dts/rockchip/*
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/boot/dts/rk3036-kylin.dts | 10 +-
arch/arm/boot/dts/rk3036.dtsi | 132 ++++++------
arch/arm/boot/dts/rk3066a-marsboard.dts | 2 +-
arch/arm/boot/dts/rk3066a-mk808.dts | 8 +-
arch/arm/boot/dts/rk3066a-rayeager.dts | 26 +--
arch/arm/boot/dts/rk3066a.dtsi | 180 ++++++++--------
arch/arm/boot/dts/rk3188-px3-evb.dts | 4 +-
arch/arm/boot/dts/rk3188-radxarock.dts | 12 +-
arch/arm/boot/dts/rk3188.dtsi | 154 ++++++-------
arch/arm/boot/dts/rk322x.dtsi | 144 ++++++-------
arch/arm/boot/dts/rk3288-evb-act8846.dts | 4 +-
arch/arm/boot/dts/rk3288-evb.dtsi | 26 +--
arch/arm/boot/dts/rk3288-fennec.dts | 10 +-
arch/arm/boot/dts/rk3288-firefly-beta.dts | 4 +-
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi | 10 +-
arch/arm/boot/dts/rk3288-firefly-reload.dts | 36 ++--
arch/arm/boot/dts/rk3288-firefly.dts | 4 +-
arch/arm/boot/dts/rk3288-firefly.dtsi | 38 ++--
arch/arm/boot/dts/rk3288-miqi.dts | 28 +--
arch/arm/boot/dts/rk3288-r89.dts | 14 +-
arch/arm/boot/dts/rk3288-rock2-som.dtsi | 4 +-
arch/arm/boot/dts/rk3288-rock2-square.dts | 16 +-
arch/arm/boot/dts/rk3288-tinker.dts | 30 +--
arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi | 8 +-
arch/arm/boot/dts/rk3288-veyron-brain.dts | 8 +-
arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 18 +-
arch/arm/boot/dts/rk3288-veyron-jaq.dts | 14 +-
arch/arm/boot/dts/rk3288-veyron-jerry.dts | 14 +-
arch/arm/boot/dts/rk3288-veyron-mickey.dts | 6 +-
arch/arm/boot/dts/rk3288-veyron-minnie.dts | 24 +--
arch/arm/boot/dts/rk3288-veyron-pinky.dts | 6 +-
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi | 16 +-
arch/arm/boot/dts/rk3288-veyron-speedy.dts | 14 +-
arch/arm/boot/dts/rk3288-veyron.dtsi | 50 ++---
arch/arm/boot/dts/rk3288.dtsi | 188 ++++++++--------
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 34 +--
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 8 +-
.../boot/dts/rockchip/rk3368-orion-r68-meta.dts | 46 ++--
arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts | 6 +-
arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 36 ++--
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 238 ++++++++++-----------
arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 6 +-
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts | 10 +-
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 68 +++---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 236 ++++++++++----------
45 files changed, 975 insertions(+), 975 deletions(-)
diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index 5726135..0393de7 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -404,31 +404,31 @@
&pinctrl {
leds {
led_ctl: led-ctl {
- rockchip,pins = <2 30 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
- rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdio {
bt_wake_h: bt-wake-h {
- rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sleep {
global_pwroff: global-pwroff {
- rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index ec91325..199afed 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -568,13 +568,13 @@
pwm0 {
pwm0_pin: pwm0-pin {
- rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_2 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
- rockchip,pins = <0 1 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA1 RK_FUNC_2 &pcfg_pull_none>;
};
};
@@ -592,47 +592,47 @@
sdmmc {
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PB7 RK_FUNC_1 &pcfg_pull_default>;
};
sdmmc_cd: sdmcc-cd {
- rockchip,pins = <1 17 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PC1 RK_FUNC_1 &pcfg_pull_default>;
};
sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_1 &pcfg_pull_default>;
};
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>,
- <1 19 RK_FUNC_1 &pcfg_pull_default>,
- <1 20 RK_FUNC_1 &pcfg_pull_default>,
- <1 21 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PC3 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PC4 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PC5 RK_FUNC_1 &pcfg_pull_default>;
};
};
sdio {
sdio_bus1: sdio-bus1 {
- rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <0 RK_PB3 RK_FUNC_1 &pcfg_pull_default>;
};
sdio_bus4: sdio-bus4 {
- rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>,
- <0 12 RK_FUNC_1 &pcfg_pull_default>,
- <0 13 RK_FUNC_1 &pcfg_pull_default>,
- <0 14 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <0 RK_PB3 RK_FUNC_1 &pcfg_pull_default>,
+ <0 RK_PB4 RK_FUNC_1 &pcfg_pull_default>,
+ <0 RK_PB5 RK_FUNC_1 &pcfg_pull_default>,
+ <0 RK_PB6 RK_FUNC_1 &pcfg_pull_default>;
};
sdio_cmd: sdio-cmd {
- rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_1 &pcfg_pull_default>;
};
sdio_clk: sdio-clk {
- rockchip,pins = <0 9 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none>;
};
};
@@ -642,135 +642,135 @@
* We also have external pulls, so disable the internal ones.
*/
emmc_clk: emmc-clk {
- rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
- rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <2 RK_PA1 RK_FUNC_2 &pcfg_pull_default>;
};
emmc_bus8: emmc-bus8 {
- rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_default>,
- <1 25 RK_FUNC_2 &pcfg_pull_default>,
- <1 26 RK_FUNC_2 &pcfg_pull_default>,
- <1 27 RK_FUNC_2 &pcfg_pull_default>,
- <1 28 RK_FUNC_2 &pcfg_pull_default>,
- <1 29 RK_FUNC_2 &pcfg_pull_default>,
- <1 30 RK_FUNC_2 &pcfg_pull_default>,
- <1 31 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PD0 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PD1 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PD2 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PD3 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PD4 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PD5 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PD6 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PD7 RK_FUNC_2 &pcfg_pull_default>;
};
};
emac {
emac_xfer: emac-xfer {
- rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */
- <2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */
- <2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */
- <2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */
- <2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */
- <2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */
- <2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */
- <2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */
+ rockchip,pins = <2 RK_PB2 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */
+ <2 RK_PB5 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */
+ <2 RK_PB6 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */
+ <2 RK_PB7 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */
+ <2 RK_PC0 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */
+ <2 RK_PC1 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */
+ <2 RK_PC2 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */
+ <2 RK_PC3 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */
};
emac_mdio: emac-mdio {
- rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */
- <2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */
+ rockchip,pins = <2 RK_PB4 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */
+ <2 RK_PD1 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
- rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
- <0 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
- rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
- <0 3 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
- rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
- <2 21 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2s {
i2s_bus: i2s-bus {
- rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_default>,
- <1 1 RK_FUNC_1 &pcfg_pull_default>,
- <1 2 RK_FUNC_1 &pcfg_pull_default>,
- <1 3 RK_FUNC_1 &pcfg_pull_default>,
- <1 4 RK_FUNC_1 &pcfg_pull_default>,
- <1 5 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PA0 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PA1 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PA2 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PA3 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PA4 RK_FUNC_1 &pcfg_pull_default>,
+ <1 RK_PA5 RK_FUNC_1 &pcfg_pull_default>;
};
};
hdmi {
hdmi_ctl: hdmi-ctl {
- rockchip,pins = <1 8 RK_FUNC_1 &pcfg_pull_none>,
- <1 9 RK_FUNC_1 &pcfg_pull_none>,
- <1 10 RK_FUNC_1 &pcfg_pull_none>,
- <1 11 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_default>,
- <0 17 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PC0 RK_FUNC_1 &pcfg_pull_default>,
+ <0 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
- rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <0 RK_PC2 RK_FUNC_1 &pcfg_pull_default>;
};
uart0_rts: uart0-rts {
- rockchip,pins = <0 19 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_default>,
- <2 23 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PC6 RK_FUNC_1 &pcfg_pull_default>,
+ <2 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
};
/* no rts / cts for uart1 */
};
uart2 {
uart2_xfer: uart2-xfer {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_default>,
- <1 19 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_default>,
+ <1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
spi {
spi_txd:spi-txd {
- rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PD5 RK_FUNC_3 &pcfg_pull_default>;
};
spi_rxd:spi-rxd {
- rockchip,pins = <1 28 RK_FUNC_3 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PD4 RK_FUNC_3 &pcfg_pull_default>;
};
spi_clk:spi-clk {
- rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <2 RK_PA0 RK_FUNC_2 &pcfg_pull_default>;
};
spi_cs0:spi-cs0 {
- rockchip,pins = <1 30 RK_FUNC_3 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PD6 RK_FUNC_3 &pcfg_pull_default>;
};
spi_cs1:spi-cs1 {
- rockchip,pins = <1 31 RK_FUNC_3 &pcfg_pull_default>;
+ rockchip,pins = <1 RK_PD7 RK_FUNC_3 &pcfg_pull_default>;
};
};
diff --git a/arch/arm/boot/dts/rk3066a-marsboard.dts b/arch/arm/boot/dts/rk3066a-marsboard.dts
index c6d92c2..59c9df9 100644
--- a/arch/arm/boot/dts/rk3066a-marsboard.dts
+++ b/arch/arm/boot/dts/rk3066a-marsboard.dts
@@ -201,7 +201,7 @@
&pinctrl {
lan8720a {
phy_int: phy-int {
- rockchip,pins = <RK_GPIO1 26 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts
index 7ca1cf5..0e32a6b 100644
--- a/arch/arm/boot/dts/rk3066a-mk808.dts
+++ b/arch/arm/boot/dts/rk3066a-mk808.dts
@@ -151,25 +151,25 @@
&pinctrl {
usb-host {
host_drv: host-drv {
- rockchip,pins = <RK_GPIO0 6 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
usb-otg {
otg_drv: otg-drv {
- rockchip,pins = <RK_GPIO0 5 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <RK_GPIO3 7 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdio {
wifi_pwr: wifi-pwr {
- rockchip,pins = <RK_GPIO3 24 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts
index 8907dea..983518f 100644
--- a/arch/arm/boot/dts/rk3066a-rayeager.dts
+++ b/arch/arm/boot/dts/rk3066a-rayeager.dts
@@ -363,71 +363,71 @@
ak8963 {
comp_int: comp-int {
- rockchip,pins = <4 17 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
emac {
rmii_rst: rmii-rst {
- rockchip,pins = <1 30 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_output_high>;
};
};
ir {
ir_int: ir-int {
- rockchip,pins = <6 1 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <6 RK_PA1 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <6 2 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <6 RK_PA2 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
mma8452 {
gsensor_int: gsensor-int {
- rockchip,pins = <4 16 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
mmc {
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <3 7 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
usb_host {
host_drv: host-drv {
- rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_default>;
};
hub_rst: hub-rst {
- rockchip,pins = <1 31 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_output_high>;
};
sata_pwr: sata-pwr {
- rockchip,pins = <4 22 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_default>;
};
sata_reset: sata-reset {
- rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_high>;
};
};
usb_otg {
otg_drv: otg-drv {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
tps {
pmic_int: pmic-int {
- rockchip,pins = <6 4 RK_FUNC_GPIO &pcfg_pull_default>;
+ rockchip,pins = <6 RK_PA4 RK_FUNC_GPIO &pcfg_pull_default>;
};
pwr_hold: pwr-hold {
- rockchip,pins = <6 8 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <6 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index f50481f..e339ee53 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -329,33 +329,33 @@
emac {
emac_xfer: emac-xfer {
- rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
- <RK_GPIO1 17 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
- <RK_GPIO1 18 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
- <RK_GPIO1 19 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
- <RK_GPIO1 20 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
- <RK_GPIO1 21 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */
- <RK_GPIO1 22 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
- <RK_GPIO1 23 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */
+ rockchip,pins = <RK_GPIO1 RK_PC0 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
+ <RK_GPIO1 RK_PC1 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
+ <RK_GPIO1 RK_PC2 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
+ <RK_GPIO1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
+ <RK_GPIO1 RK_PC4 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
+ <RK_GPIO1 RK_PC5 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */
+ <RK_GPIO1 RK_PC6 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
+ <RK_GPIO1 RK_PC7 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */
};
emac_mdio: emac-mdio {
- rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
- <RK_GPIO1 25 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */
+ rockchip,pins = <RK_GPIO1 RK_PD0 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
+ <RK_GPIO1 RK_PD1 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */
};
};
emmc {
emmc_clk: emmc-clk {
- rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PD7 RK_FUNC_2 &pcfg_pull_default>;
};
emmc_cmd: emmc-cmd {
- rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO4 RK_PB1 RK_FUNC_2 &pcfg_pull_default>;
};
emmc_rst: emmc-rst {
- rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO4 RK_PB2 RK_FUNC_2 &pcfg_pull_default>;
};
/*
@@ -368,243 +368,243 @@
i2c0 {
i2c0_xfer: i2c0-xfer {
- rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO2 29 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO2 RK_PD4 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO2 RK_PD5 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
- rockchip,pins = <RK_GPIO2 30 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO2 31 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO2 RK_PD6 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO2 RK_PD7 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
- rockchip,pins = <RK_GPIO3 0 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
- rockchip,pins = <RK_GPIO3 2 RK_FUNC_2 &pcfg_pull_none>,
- <RK_GPIO3 3 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA2 RK_FUNC_2 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PA3 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
- rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_out: pwm0-out {
- rockchip,pins = <RK_GPIO0 3 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_out: pwm1-out {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_out: pwm2-out {
- rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PD6 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_out: pwm3-out {
- rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PD7 RK_FUNC_1 &pcfg_pull_none>;
};
};
spi0 {
spi0_clk: spi0-clk {
- rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA5 RK_FUNC_2 &pcfg_pull_default>;
};
spi0_cs0: spi0-cs0 {
- rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA4 RK_FUNC_2 &pcfg_pull_default>;
};
spi0_tx: spi0-tx {
- rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA7 RK_FUNC_2 &pcfg_pull_default>;
};
spi0_rx: spi0-rx {
- rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA6 RK_FUNC_2 &pcfg_pull_default>;
};
spi0_cs1: spi0-cs1 {
- rockchip,pins = <RK_GPIO4 15 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO4 RK_PB7 RK_FUNC_1 &pcfg_pull_default>;
};
};
spi1 {
spi1_clk: spi1-clk {
- rockchip,pins = <RK_GPIO2 19 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO2 RK_PC3 RK_FUNC_2 &pcfg_pull_default>;
};
spi1_cs0: spi1-cs0 {
- rockchip,pins = <RK_GPIO2 20 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO2 RK_PC4 RK_FUNC_2 &pcfg_pull_default>;
};
spi1_rx: spi1-rx {
- rockchip,pins = <RK_GPIO2 22 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO2 RK_PC6 RK_FUNC_2 &pcfg_pull_default>;
};
spi1_tx: spi1-tx {
- rockchip,pins = <RK_GPIO2 21 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO2 RK_PC5 RK_FUNC_2 &pcfg_pull_default>;
};
spi1_cs1: spi1-cs1 {
- rockchip,pins = <RK_GPIO2 23 RK_FUNC_2 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO2 RK_PC7 RK_FUNC_2 &pcfg_pull_default>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA0 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO1 RK_PA1 RK_FUNC_1 &pcfg_pull_default>;
};
uart0_cts: uart0-cts {
- rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA2 RK_FUNC_1 &pcfg_pull_default>;
};
uart0_rts: uart0-rts {
- rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA3 RK_FUNC_1 &pcfg_pull_default>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA4 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO1 RK_PA5 RK_FUNC_1 &pcfg_pull_default>;
};
uart1_cts: uart1-cts {
- rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA6 RK_FUNC_1 &pcfg_pull_default>;
};
uart1_rts: uart1-rts {
- rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PA7 RK_FUNC_1 &pcfg_pull_default>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
- rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO1 RK_PB0 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO1 RK_PB1 RK_FUNC_1 &pcfg_pull_default>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
- rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PD3 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO3 RK_PD4 RK_FUNC_1 &pcfg_pull_default>;
};
uart3_cts: uart3-cts {
- rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PD5 RK_FUNC_1 &pcfg_pull_default>;
};
uart3_rts: uart3-rts {
- rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PD6 RK_FUNC_1 &pcfg_pull_default>;
};
};
sd0 {
sd0_clk: sd0-clk {
- rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PB0 RK_FUNC_1 &pcfg_pull_default>;
};
sd0_cmd: sd0-cmd {
- rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PB1 RK_FUNC_1 &pcfg_pull_default>;
};
sd0_cd: sd0-cd {
- rockchip,pins = <RK_GPIO3 14 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PB6 RK_FUNC_1 &pcfg_pull_default>;
};
sd0_wp: sd0-wp {
- rockchip,pins = <RK_GPIO3 15 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PB7 RK_FUNC_1 &pcfg_pull_default>;
};
sd0_bus1: sd0-bus-width1 {
- rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PB2 RK_FUNC_1 &pcfg_pull_default>;
};
sd0_bus4: sd0-bus-width4 {
- rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO3 11 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO3 12 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO3 13 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PB2 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO3 RK_PB3 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO3 RK_PB4 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO3 RK_PB5 RK_FUNC_1 &pcfg_pull_default>;
};
};
sd1 {
sd1_clk: sd1-clk {
- rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PC5 RK_FUNC_1 &pcfg_pull_default>;
};
sd1_cmd: sd1-cmd {
- rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PC0 RK_FUNC_1 &pcfg_pull_default>;
};
sd1_cd: sd1-cd {
- rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PC6 RK_FUNC_1 &pcfg_pull_default>;
};
sd1_wp: sd1-wp {
- rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PC7 RK_FUNC_1 &pcfg_pull_default>;
};
sd1_bus1: sd1-bus-width1 {
- rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PC1 RK_FUNC_1 &pcfg_pull_default>;
};
sd1_bus4: sd1-bus-width4 {
- rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO3 RK_PC1 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO3 RK_PC2 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO3 RK_PC3 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO3 RK_PC4 RK_FUNC_1 &pcfg_pull_default>;
};
};
i2s0 {
i2s0_bus: i2s0-bus {
- rockchip,pins = <RK_GPIO0 7 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 8 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 9 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 10 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 11 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 12 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 13 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 14 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 15 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO0 RK_PA7 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB0 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB1 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB2 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB3 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB4 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB5 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB6 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PB7 RK_FUNC_1 &pcfg_pull_default>;
};
};
i2s1 {
i2s1_bus: i2s1-bus {
- rockchip,pins = <RK_GPIO0 16 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 17 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 18 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 19 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 20 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 21 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO0 RK_PC0 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PC1 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PC2 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PC3 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PC4 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PC5 RK_FUNC_1 &pcfg_pull_default>;
};
};
i2s2 {
i2s2_bus: i2s2-bus {
- rockchip,pins = <RK_GPIO0 24 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 25 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 26 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 27 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_default>,
- <RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_default>;
+ rockchip,pins = <RK_GPIO0 RK_PD0 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PD1 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PD2 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PD3 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PD4 RK_FUNC_1 &pcfg_pull_default>,
+ <RK_GPIO0 RK_PD5 RK_FUNC_1 &pcfg_pull_default>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3188-px3-evb.dts b/arch/arm/boot/dts/rk3188-px3-evb.dts
index 5b2a0b6..e97d95d 100644
--- a/arch/arm/boot/dts/rk3188-px3-evb.dts
+++ b/arch/arm/boot/dts/rk3188-px3-evb.dts
@@ -275,10 +275,10 @@
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
- rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index ca0a1c4..fe1393c 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -327,34 +327,34 @@
act8846 {
act8846_dvs0_ctl: act8846-dvs0-ctl {
- rockchip,pins = <RK_GPIO3 27 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <RK_GPIO3 RK_PD3 RK_FUNC_GPIO &pcfg_output_low>;
};
};
hym8563 {
rtc_int: rtc-int {
- rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
lan8720a {
phy_int: phy-int {
- rockchip,pins = <RK_GPIO3 26 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
ir-receiver {
ir_recv_pin: ir-recv-pin {
- rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
- rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index fa1bdb8..d417156 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -258,15 +258,15 @@
emmc {
emmc_clk: emmc-clk {
- rockchip,pins = <RK_GPIO0 24 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PD0 RK_FUNC_2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
- rockchip,pins = <RK_GPIO0 26 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PD2 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_rst: emmc-rst {
- rockchip,pins = <RK_GPIO0 27 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PD3 RK_FUNC_2 &pcfg_pull_none>;
};
/*
@@ -279,246 +279,246 @@
emac {
emac_xfer: emac-xfer {
- rockchip,pins = <RK_GPIO3 16 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
- <RK_GPIO3 17 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
- <RK_GPIO3 18 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
- <RK_GPIO3 19 RK_FUNC_2 &pcfg_pull_none>, /* rxd0 */
- <RK_GPIO3 20 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
- <RK_GPIO3 21 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
- <RK_GPIO3 22 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
- <RK_GPIO3 23 RK_FUNC_2 &pcfg_pull_none>; /* crs_dvalid */
+ rockchip,pins = <RK_GPIO3 RK_PC0 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
+ <RK_GPIO3 RK_PC1 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
+ <RK_GPIO3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
+ <RK_GPIO3 RK_PC3 RK_FUNC_2 &pcfg_pull_none>, /* rxd0 */
+ <RK_GPIO3 RK_PC4 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
+ <RK_GPIO3 RK_PC5 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
+ <RK_GPIO3 RK_PC6 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
+ <RK_GPIO3 RK_PC7 RK_FUNC_2 &pcfg_pull_none>; /* crs_dvalid */
};
emac_mdio: emac-mdio {
- rockchip,pins = <RK_GPIO3 24 RK_FUNC_2 &pcfg_pull_none>,
- <RK_GPIO3 25 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PD0 RK_FUNC_2 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PD1 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
- rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 25 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
- rockchip,pins = <RK_GPIO1 26 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 27 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PD3 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
- rockchip,pins = <RK_GPIO1 28 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 29 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PD5 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
- rockchip,pins = <RK_GPIO3 14 RK_FUNC_2 &pcfg_pull_none>,
- <RK_GPIO3 15 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PB6 RK_FUNC_2 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PB7 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
- rockchip,pins = <RK_GPIO1 30 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 31 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PD6 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PD7 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_out: pwm0-out {
- rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_out: pwm1-out {
- rockchip,pins = <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PD4 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_out: pwm2-out {
- rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PD5 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_out: pwm3-out {
- rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PD6 RK_FUNC_1 &pcfg_pull_none>;
};
};
spi0 {
spi0_clk: spi0-clk {
- rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO1 RK_PA6 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
- rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO1 RK_PA7 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
- rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO1 RK_PA5 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
- rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO1 RK_PA4 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
- rockchip,pins = <RK_GPIO1 15 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO1 RK_PB7 RK_FUNC_1 &pcfg_pull_up>;
};
};
spi1 {
spi1_clk: spi1-clk {
- rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PD6 RK_FUNC_1 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
- rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PD7 RK_FUNC_1 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
- rockchip,pins = <RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
- rockchip,pins = <RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PD5 RK_FUNC_1 &pcfg_pull_up>;
};
spi1_cs1: spi1-cs1 {
- rockchip,pins = <RK_GPIO1 14 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO1 RK_PB6 RK_FUNC_2 &pcfg_pull_up>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
- <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PA0 RK_FUNC_1 &pcfg_pull_up>,
+ <RK_GPIO1 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
- rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PA2 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
- rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
- <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PA4 RK_FUNC_1 &pcfg_pull_up>,
+ <RK_GPIO1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
- rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
- rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
- rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
- <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PB0 RK_FUNC_1 &pcfg_pull_up>,
+ <RK_GPIO1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
- rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
- <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
+ <RK_GPIO1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
- rockchip,pins = <RK_GPIO1 12 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
};
uart3_rts: uart3-rts {
- rockchip,pins = <RK_GPIO1 13 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
};
};
sd0 {
sd0_clk: sd0-clk {
- rockchip,pins = <RK_GPIO3 2 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA2 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_cmd: sd0-cmd {
- rockchip,pins = <RK_GPIO3 3 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_cd: sd0-cd {
- rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_wp: sd0-wp {
- rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_pwr: sd0-pwr {
- rockchip,pins = <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_bus1: sd0-bus-width1 {
- rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
};
sd0_bus4: sd0-bus-width4 {
- rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 6 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 7 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
};
};
sd1 {
sd1_clk: sd1-clk {
- rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_cmd: sd1-cmd {
- rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_cd: sd1-cd {
- rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_wp: sd1-wp {
- rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_bus1: sd1-bus-width1 {
- rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
};
sd1_bus4: sd1-bus-width4 {
- rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2s0 {
i2s0_bus: i2s0-bus {
- rockchip,pins = <RK_GPIO1 16 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 17 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 18 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 19 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 20 RK_FUNC_1 &pcfg_pull_none>,
- <RK_GPIO1 21 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
+ <RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
};
spdif {
spdif_tx: spdif-tx {
- rockchip,pins = <RK_GPIO1 14 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 7cc3446..fe800bd 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -528,181 +528,181 @@
emmc {
emmc_clk: emmc-clk {
- rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
- rockchip,pins = <1 22 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PC6 RK_FUNC_2 &pcfg_pull_none>;
};
emmc_bus8: emmc-bus8 {
- rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
- <1 25 RK_FUNC_2 &pcfg_pull_none>,
- <1 26 RK_FUNC_2 &pcfg_pull_none>,
- <1 27 RK_FUNC_2 &pcfg_pull_none>,
- <1 28 RK_FUNC_2 &pcfg_pull_none>,
- <1 29 RK_FUNC_2 &pcfg_pull_none>,
- <1 30 RK_FUNC_2 &pcfg_pull_none>,
- <1 31 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PD0 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PD1 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PD2 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PD3 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PD4 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PD5 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PD6 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PD7 RK_FUNC_2 &pcfg_pull_none>;
};
};
gmac {
rgmii_pins: rgmii-pins {
- rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
- <2 12 RK_FUNC_1 &pcfg_pull_none>,
- <2 25 RK_FUNC_1 &pcfg_pull_none>,
- <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 22 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 23 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 9 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 17 RK_FUNC_1 &pcfg_pull_none>,
- <2 16 RK_FUNC_1 &pcfg_pull_none>,
- <2 21 RK_FUNC_2 &pcfg_pull_none>,
- <2 20 RK_FUNC_2 &pcfg_pull_none>,
- <2 11 RK_FUNC_1 &pcfg_pull_none>,
- <2 8 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC3 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PC2 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PC6 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PC7 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PB1 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PB5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC5 RK_FUNC_2 &pcfg_pull_none>,
+ <2 RK_PC4 RK_FUNC_2 &pcfg_pull_none>,
+ <2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
};
rmii_pins: rmii-pins {
- rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
- <2 12 RK_FUNC_1 &pcfg_pull_none>,
- <2 25 RK_FUNC_1 &pcfg_pull_none>,
- <2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
- <2 17 RK_FUNC_1 &pcfg_pull_none>,
- <2 16 RK_FUNC_1 &pcfg_pull_none>,
- <2 8 RK_FUNC_1 &pcfg_pull_none>,
- <2 15 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC3 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PC2 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PB5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
+ <2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
};
phy_pins: phy-pins {
- rockchip,pins = <2 14 RK_FUNC_2 &pcfg_pull_none>,
- <2 8 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB6 RK_FUNC_2 &pcfg_pull_none>,
+ <2 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
- rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
- <0 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
- rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
- <0 3 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
- rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
- <2 21 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
- rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
- <0 7 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2s1 {
i2s1_bus: i2s1-bus {
- rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
- <0 9 RK_FUNC_1 &pcfg_pull_none>,
- <0 11 RK_FUNC_1 &pcfg_pull_none>,
- <0 12 RK_FUNC_1 &pcfg_pull_none>,
- <0 13 RK_FUNC_1 &pcfg_pull_none>,
- <0 14 RK_FUNC_1 &pcfg_pull_none>,
- <1 2 RK_FUNC_1 &pcfg_pull_none>,
- <1 4 RK_FUNC_1 &pcfg_pull_none>,
- <1 5 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
- rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
- rockchip,pins = <0 30 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD6 RK_FUNC_2 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
- rockchip,pins = <1 12 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB4 RK_FUNC_2 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_pin: pwm3-pin {
- rockchip,pins = <1 11 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB3 RK_FUNC_2 &pcfg_pull_none>;
};
};
tsadc {
otp_gpio: otp-gpio {
- rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
- rockchip,pins = <0 24 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD0 RK_FUNC_2 &pcfg_pull_none>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>,
- <2 27 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PD3 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
- rockchip,pins = <2 29 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD5 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
- rockchip,pins = <0 17 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <1 9 RK_FUNC_1 &pcfg_pull_none>,
- <1 10 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
- rockchip,pins = <1 8 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
- rockchip,pins = <1 11 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>,
- <1 19 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
};
uart2_cts: uart2-cts {
- rockchip,pins = <0 25 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
};
uart2_rts: uart2-rts {
- rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts
index b9418d1..28c0690 100644
--- a/arch/arm/boot/dts/rk3288-evb-act8846.dts
+++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts
@@ -213,13 +213,13 @@
&pinctrl {
lcd {
lcd_en: lcd-en {
- rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
wifi_pwr: wifi-pwr {
- rockchip,pins = <7 9 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index 0dec94c..bee91dc 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -307,25 +307,25 @@
backlight {
bl_en: bl-en {
- rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
pwrbtn: pwrbtn {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
lcd {
lcd_cs: lcd-cs {
- rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
@@ -335,34 +335,34 @@
* high-speed mode on EVB board so bump up to 8ma.
*/
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <6 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <6 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
eth_phy {
eth_phy_pwr: eth-phy-pwr {
- rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-fennec.dts b/arch/arm/boot/dts/rk3288-fennec.dts
index 61d1c10..4d5b5df 100644
--- a/arch/arm/boot/dts/rk3288-fennec.dts
+++ b/arch/arm/boot/dts/rk3288-fennec.dts
@@ -313,27 +313,27 @@
gmac {
phy_int: phy-int {
- rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
- rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
- rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
pmic {
pmic_int: pmic-int {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usbphy {
host_drv: host-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-firefly-beta.dts b/arch/arm/boot/dts/rk3288-firefly-beta.dts
index 0195d97..5403251 100644
--- a/arch/arm/boot/dts/rk3288-firefly-beta.dts
+++ b/arch/arm/boot/dts/rk3288-firefly-beta.dts
@@ -55,13 +55,13 @@
&pinctrl {
act8846 {
pmic_vsel: pmic-vsel {
- rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
};
};
ir {
ir_int: ir-int {
- rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
index 8134966..55c568e 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
@@ -260,25 +260,25 @@
act8846 {
pwr_hold: pwr-hold {
- rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
};
pmic_vsel: pmic-vsel {
- rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>;
};
};
gmac {
phy_int: phy-int {
- rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
- rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
- rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-firefly-reload.dts b/arch/arm/boot/dts/rk3288-firefly-reload.dts
index d0b3204a..eadd1d8f 100644
--- a/arch/arm/boot/dts/rk3288-firefly-reload.dts
+++ b/arch/arm/boot/dts/rk3288-firefly-reload.dts
@@ -318,39 +318,39 @@
&pinctrl {
ir {
ir_int: ir-int {
- rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
dvp {
dvp_pwr: dvp-pwr {
- rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
cif_pwr: cif-pwr {
- rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
rtc_int: rtc-int {
- rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
power_led: power-led {
- rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
work_led: work-led {
- rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -360,44 +360,44 @@
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
+ rockchip,pins = <6 RK_PC4 RK_FUNC_1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ rockchip,pins = <6 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio {
wifi_enable: wifi-enable {
- rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_host {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbhub_rst: usbhub-rst {
- rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
};
};
usb_otg {
otg_vbus_drv: otg-vbus-drv {
- rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-firefly.dts b/arch/arm/boot/dts/rk3288-firefly.dts
index 14271be..22185b3 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dts
+++ b/arch/arm/boot/dts/rk3288-firefly.dts
@@ -55,13 +55,13 @@
&pinctrl {
act8846 {
pmic_vsel: pmic-vsel {
- rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>;
};
};
ir {
ir_int: ir-int {
- rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi
index 10793ac..a099f98 100644
--- a/arch/arm/boot/dts/rk3288-firefly.dtsi
+++ b/arch/arm/boot/dts/rk3288-firefly.dtsi
@@ -412,49 +412,49 @@
act8846 {
pwr_hold: pwr-hold {
- rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
};
};
dvp {
dvp_pwr: dvp-pwr {
- rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gmac {
phy_int: phy-int {
- rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
- rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
- rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
hym8563 {
rtc_int: rtc-int {
- rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
power_led: power-led {
- rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
work_led: work-led {
- rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -464,38 +464,38 @@
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
+ rockchip,pins = <6 RK_PC4 RK_FUNC_1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ rockchip,pins = <6 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_host {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbhub_rst: usbhub-rst {
- rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
};
};
usb_otg {
otg_vbus_drv: otg-vbus-drv {
- rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts
index 30e93f6..3067102 100644
--- a/arch/arm/boot/dts/rk3288-miqi.dts
+++ b/arch/arm/boot/dts/rk3288-miqi.dts
@@ -335,29 +335,29 @@
act8846 {
pmic_int: pmic-int {
- rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
pmic_sleep: pmic-sleep {
- rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_low>;
};
pmic_vsel: pmic-vsel {
- rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
};
};
gmac {
phy_int: phy-int {
- rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
- rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
- rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
@@ -367,28 +367,28 @@
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
+ <6 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
+ rockchip,pins = <6 RK_PC4 RK_FUNC_1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
+ rockchip,pins = <6 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_host {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-r89.dts b/arch/arm/boot/dts/rk3288-r89.dts
index 1145b62..d23cf23 100644
--- a/arch/arm/boot/dts/rk3288-r89.dts
+++ b/arch/arm/boot/dts/rk3288-r89.dts
@@ -302,39 +302,39 @@
act8846 {
pmic_vsel: pmic-vsel {
- rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
};
pwr_hold: pwr-hold {
- rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>;
};
};
buttons {
pwrbtn: pwrbtn {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
ir {
ir_int: ir-int {
- rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
- rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
index f0778a4..c81968b 100644
--- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi
@@ -265,13 +265,13 @@
emmc {
emmc_reset: emmc-reset {
- rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gmac {
phy_rst: phy-rst {
- rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts
index a23a948..2c76e4d 100644
--- a/arch/arm/boot/dts/rk3288-rock2-square.dts
+++ b/arch/arm/boot/dts/rk3288-rock2-square.dts
@@ -222,47 +222,47 @@
&pinctrl {
ir {
ir_int: ir-int {
- rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
- rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headphone {
hp_det: hp-det {
- rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
phone_ctl: phone-ctl {
- rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sata {
sata_pwr_en: sata-pwr-en {
- rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio {
wifi_enable: wifi-enable {
- rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
index f601c78..0ef6832 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dts
+++ b/arch/arm/boot/dts/rk3288-tinker.dts
@@ -384,68 +384,68 @@
backlight {
bl_en: bl-en {
- rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
pwrbtn: pwrbtn {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
eth_phy {
eth_phy_pwr: eth-phy-pwr {
- rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \
+ rockchip,pins = <RK_GPIO0 RK_PA4 RK_FUNC_GPIO \
&pcfg_pull_up>;
};
dvs_1: dvs-1 {
- rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \
+ rockchip,pins = <RK_GPIO0 RK_PB3 RK_FUNC_GPIO \
&pcfg_pull_down>;
};
dvs_2: dvs-2 {
- rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \
+ rockchip,pins = <RK_GPIO0 RK_PB4 RK_FUNC_GPIO \
&pcfg_pull_down>;
};
};
sdmmc {
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <6 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 \
+ rockchip,pins = <6 RK_PC4 RK_FUNC_1 \
&pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <6 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
pwr_3g: pwr-3g {
- rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
index 280acea..bc2c114 100644
--- a/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
@@ -76,7 +76,7 @@
&pinctrl {
codec {
hp_det: hp-det {
- rockchip,pins = <6 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
/*
@@ -85,17 +85,17 @@
* we've got a ts3a227e chip but the driver requires it.
*/
int_codec: int-codec {
- rockchip,pins = <6 7 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
mic_det: mic-det {
- rockchip,pins = <6 11 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headset {
ts3a227e_int_l: ts3a227e-int-l {
- rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-brain.dts b/arch/arm/boot/dts/rk3288-veyron-brain.dts
index ed42552..677b899 100644
--- a/arch/arm/boot/dts/rk3288-veyron-brain.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-brain.dts
@@ -79,23 +79,23 @@
&pinctrl {
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
- rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
- rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb-host {
usb2_pwr_en: usb2-pwr-en {
- rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
index d752a31..dd6e36d 100644
--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
@@ -281,51 +281,51 @@
backlight {
bl_en: bl-en {
- rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
ap_lid_int_l: ap-lid-int-l {
- rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
charger {
ac_present_ap: ac-present-ap {
- rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
cros-ec {
ec_int: ec-int {
- rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
suspend {
suspend_l_wake: suspend-l-wake {
- rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>;
};
suspend_l_sleep: suspend-l-sleep {
- rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_high>;
};
};
trackpad {
trackpad_int: trackpad-int {
- rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb-host {
host1_pwr_en: host1-pwr-en {
- rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbotg_pwren_h: usbotg-pwren-h {
- rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
index d33f576..5d3884d 100644
--- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
@@ -175,39 +175,39 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
- rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
- rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
- rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
- rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
- rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
- rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
- rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
index cdea751..d3977ee 100644
--- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
@@ -138,39 +138,39 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
- rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
- rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
- rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
- rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
- rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
- rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
- rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-mickey.dts b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
index f0994f0..d83f877 100644
--- a/arch/arm/boot/dts/rk3288-veyron-mickey.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-mickey.dts
@@ -219,17 +219,17 @@
&pinctrl {
hdmi {
power_hdmi_on: power-hdmi-on {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
- rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
- rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-minnie.dts b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
index 544de60..d8ffb26 100644
--- a/arch/arm/boot/dts/rk3288-veyron-minnie.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-minnie.dts
@@ -226,65 +226,65 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
- rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
- rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
volum_down_l: volum-down-l {
- rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
};
volum_up_l: volum-up-l {
- rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
- rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
- rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
- rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
- rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
- rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
prochot {
gpio_prochot: gpio-prochot {
- rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
touchscreen {
touch_int: touch-int {
- rockchip,pins = <2 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
touch_rst: touch-rst {
- rockchip,pins = <2 15 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
index 995cff4..6491af8 100644
--- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
@@ -92,19 +92,19 @@
&pinctrl {
buttons {
pwr_key_h: pwr-key-h {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
emmc {
emmc_reset: emmc-reset {
- rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_wp_gpio: sdmmc-wp-gpio {
- rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
index aef0710..c740c11 100644
--- a/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
@@ -53,18 +53,18 @@
* We also have external pulls, so disable the internal ones.
*/
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
- <6 17 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
- <6 18 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
- <6 19 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
+ <6 RK_PC1 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
+ <6 RK_PC2 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
+ <6 RK_PC3 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <6 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <6 RK_PC5 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
/*
@@ -74,12 +74,12 @@
* think there's a card inserted
*/
sdmmc_cd_disabled: sdmmc-cd-disabled {
- rockchip,pins = <6 22 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <6 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
/* This is where we actually hook up CD */
sdmmc_cd_gpio: sdmmc-cd-gpio {
- rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
index cc0b78c..b4a1653 100644
--- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
@@ -141,39 +141,39 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
- rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
- rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
- rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
- rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
- rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
- rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
- rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 5d1eb0a..49bc880 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -482,13 +482,13 @@
buttons {
pwr_key_l: pwr-key-l {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
emmc {
emmc_reset: emmc-reset {
- rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
/*
@@ -496,51 +496,51 @@
* We also have external pulls, so disable the internal ones.
*/
emmc_clk: emmc-clk {
- rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <3 RK_PC2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
emmc_cmd: emmc-cmd {
- rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <3 RK_PC0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
emmc_bus8: emmc-bus8 {
- rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
- <3 1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
- <3 2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
- <3 3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
- <3 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
- <3 5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
- <3 6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
- <3 7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <3 RK_PA0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
+ <3 RK_PA1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
+ <3 RK_PA2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
+ <3 RK_PA3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
+ <3 RK_PA4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
+ <3 RK_PA5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
+ <3 RK_PA6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
+ <3 RK_PA7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
};
pmic {
pmic_int_l: pmic-int-l {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
reboot {
ap_warm_reset_h: ap-warm-reset-h {
- rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
recovery-switch {
rec_mode_l: rec-mode-l {
- rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdio0 {
wifi_enable_h: wifienable-h {
- rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
/* NOTE: mislabelled on schematic; should be bt_enable_h */
bt_enable_l: bt-enable-l {
- rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
/*
@@ -548,30 +548,30 @@
* We also have external pulls, so disable the internal ones.
*/
sdio0_bus4: sdio0-bus4 {
- rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
- <4 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
- <4 22 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
- <4 23 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <4 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
+ <4 RK_PC5 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
+ <4 RK_PC6 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
+ <4 RK_PC7 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdio0_cmd: sdio0-cmd {
- rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <4 RK_PD0 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdio0_clk: sdio0-clk {
- rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <4 RK_PD1 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
};
tpm {
tpm_int_h: tpm-int-h {
- rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
write-protect {
fw_wp_ap: fw-wp-ap {
- rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ad5d602..ad1895f 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1348,8 +1348,8 @@
hdmi {
hdmi_ddc: hdmi-ddc {
- rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
- <7 20 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC3 RK_FUNC_2 &pcfg_pull_none>,
+ <7 RK_PC4 RK_FUNC_2 &pcfg_pull_none>;
};
};
@@ -1372,144 +1372,144 @@
sleep {
global_pwroff: global-pwroff {
- rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
};
ddrio_pwroff: ddrio-pwroff {
- rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
ddr0_retention: ddr0-retention {
- rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_1 &pcfg_pull_up>;
};
ddr1_retention: ddr1-retention {
- rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
};
};
edp {
edp_hpd: edp-hpd {
- rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
+ rockchip,pins = <7 RK_PB3 RK_FUNC_2 &pcfg_pull_down>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
- rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,
- <0 16 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
- rockchip,pins = <8 4 RK_FUNC_1 &pcfg_pull_none>,
- <8 5 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <8 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+ <8 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
- rockchip,pins = <6 9 RK_FUNC_1 &pcfg_pull_none>,
- <6 10 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <6 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+ <6 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
- rockchip,pins = <2 16 RK_FUNC_1 &pcfg_pull_none>,
- <2 17 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
- rockchip,pins = <7 17 RK_FUNC_1 &pcfg_pull_none>,
- <7 18 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <7 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c5 {
i2c5_xfer: i2c5-xfer {
- rockchip,pins = <7 19 RK_FUNC_1 &pcfg_pull_none>,
- <7 20 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+ <7 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2s0 {
i2s0_bus: i2s0-bus {
- rockchip,pins = <6 0 RK_FUNC_1 &pcfg_pull_none>,
- <6 1 RK_FUNC_1 &pcfg_pull_none>,
- <6 2 RK_FUNC_1 &pcfg_pull_none>,
- <6 3 RK_FUNC_1 &pcfg_pull_none>,
- <6 4 RK_FUNC_1 &pcfg_pull_none>,
- <6 8 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <6 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
+ <6 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,
+ <6 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+ <6 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
+ <6 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+ <6 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <6 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <6 RK_PC5 RK_FUNC_1 &pcfg_pull_up>;
};
sdmmc_cd: sdmmc-cd {
- rockchip,pins = <6 22 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <6 RK_PC6 RK_FUNC_1 &pcfg_pull_up>;
};
sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_up>;
};
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up>,
- <6 17 RK_FUNC_1 &pcfg_pull_up>,
- <6 18 RK_FUNC_1 &pcfg_pull_up>,
- <6 19 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <6 RK_PC0 RK_FUNC_1 &pcfg_pull_up>,
+ <6 RK_PC1 RK_FUNC_1 &pcfg_pull_up>,
+ <6 RK_PC2 RK_FUNC_1 &pcfg_pull_up>,
+ <6 RK_PC3 RK_FUNC_1 &pcfg_pull_up>;
};
};
sdio0 {
sdio0_bus1: sdio0-bus1 {
- rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_bus4: sdio0-bus4 {
- rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>,
- <4 21 RK_FUNC_1 &pcfg_pull_up>,
- <4 22 RK_FUNC_1 &pcfg_pull_up>,
- <4 23 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PC4 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PC7 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_cmd: sdio0-cmd {
- rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PD0 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_clk: sdio0-clk {
- rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
};
sdio0_cd: sdio0-cd {
- rockchip,pins = <4 26 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PD2 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_wp: sdio0-wp {
- rockchip,pins = <4 27 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PD3 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_pwr: sdio0-pwr {
- rockchip,pins = <4 28 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_bkpwr: sdio0-bkpwr {
- rockchip,pins = <4 29 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PD5 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_int: sdio0-int {
- rockchip,pins = <4 30 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PD6 RK_FUNC_1 &pcfg_pull_up>;
};
};
@@ -1556,140 +1556,140 @@
emmc {
emmc_clk: emmc-clk {
- rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
- rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PC0 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_pwr: emmc-pwr {
- rockchip,pins = <3 9 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_bus1: emmc-bus1 {
- rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA0 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_bus4: emmc-bus4 {
- rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>,
- <3 1 RK_FUNC_2 &pcfg_pull_up>,
- <3 2 RK_FUNC_2 &pcfg_pull_up>,
- <3 3 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA0 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA1 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA2 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA3 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_bus8: emmc-bus8 {
- rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>,
- <3 1 RK_FUNC_2 &pcfg_pull_up>,
- <3 2 RK_FUNC_2 &pcfg_pull_up>,
- <3 3 RK_FUNC_2 &pcfg_pull_up>,
- <3 4 RK_FUNC_2 &pcfg_pull_up>,
- <3 5 RK_FUNC_2 &pcfg_pull_up>,
- <3 6 RK_FUNC_2 &pcfg_pull_up>,
- <3 7 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA0 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA1 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA2 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA3 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA4 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA5 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA6 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PA7 RK_FUNC_2 &pcfg_pull_up>;
};
};
spi0 {
spi0_clk: spi0-clk {
- rockchip,pins = <5 12 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PB4 RK_FUNC_1 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
- rockchip,pins = <5 13 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PB5 RK_FUNC_1 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
- rockchip,pins = <5 14 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PB6 RK_FUNC_1 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
- rockchip,pins = <5 15 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PB7 RK_FUNC_1 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
- rockchip,pins = <5 16 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PC0 RK_FUNC_1 &pcfg_pull_up>;
};
};
spi1 {
spi1_clk: spi1-clk {
- rockchip,pins = <7 12 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PB4 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
- rockchip,pins = <7 13 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PB5 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
- rockchip,pins = <7 14 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PB6 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
- rockchip,pins = <7 15 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PB7 RK_FUNC_2 &pcfg_pull_up>;
};
};
spi2 {
spi2_cs1: spi2-cs1 {
- rockchip,pins = <8 3 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <8 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
};
spi2_clk: spi2-clk {
- rockchip,pins = <8 6 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <8 RK_PA6 RK_FUNC_1 &pcfg_pull_up>;
};
spi2_cs0: spi2-cs0 {
- rockchip,pins = <8 7 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <8 RK_PA7 RK_FUNC_1 &pcfg_pull_up>;
};
spi2_rx: spi2-rx {
- rockchip,pins = <8 8 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <8 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
};
spi2_tx: spi2-tx {
- rockchip,pins = <8 9 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <8 RK_PB1 RK_FUNC_1 &pcfg_pull_up>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <4 16 RK_FUNC_1 &pcfg_pull_up>,
- <4 17 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PC0 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
- rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <4 RK_PC2 RK_FUNC_1 &pcfg_pull_up>;
};
uart0_rts: uart0-rts {
- rockchip,pins = <4 19 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <5 8 RK_FUNC_1 &pcfg_pull_up>,
- <5 9 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <5 RK_PB0 RK_FUNC_1 &pcfg_pull_up>,
+ <5 RK_PB1 RK_FUNC_1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
- rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <5 RK_PB2 RK_FUNC_1 &pcfg_pull_up>;
};
uart1_rts: uart1-rts {
- rockchip,pins = <5 11 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <5 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
- rockchip,pins = <7 22 RK_FUNC_1 &pcfg_pull_up>,
- <7 23 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
+ <7 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
- rockchip,pins = <7 7 RK_FUNC_1 &pcfg_pull_up>,
- <7 8 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA7 RK_FUNC_1 &pcfg_pull_up>,
+ <7 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
- rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <7 RK_PB1 RK_FUNC_1 &pcfg_pull_up>;
};
uart3_rts: uart3-rts {
- rockchip,pins = <7 10 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;
};
};
@@ -1710,23 +1710,23 @@
tsadc {
otp_gpio: otp-gpio {
- rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
- rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB2 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
- rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
- rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <7 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
};
@@ -1777,7 +1777,7 @@
spdif {
spdif_tx: spdif-tx {
- rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <RK_GPIO6 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
index 4772917..678fbbf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
@@ -193,60 +193,60 @@
backlight {
bl_en: bl-en {
- rockchip,pins = <0 20 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
emmc {
emmc_bus8: emmc-bus8 {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 19 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 20 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 21 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 22 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 23 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 24 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 25 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC6 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC7 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PD0 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PD1 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
};
emmc-clk {
- rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <2 RK_PA4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
emmc-cmd {
- rockchip,pins = <1 26 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <1 RK_PD2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
};
emmc_reset: emmc-reset {
- rockchip,pins = <2 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
- rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdio {
wifi_reg_on: wifi-reg-on {
- rockchip,pins = <3 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_rst: bt-rst {
- rockchip,pins = <3 5 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
index e631d42..7205909 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
@@ -272,23 +272,23 @@
&pinctrl {
ir {
ir_int: ir-int {
- rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_sleep: pmic-sleep {
- rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_2 &pcfg_pull_none>;
};
pmic_int: pmic-int {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
index fac116a..f0d4015 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts
@@ -265,73 +265,73 @@
emmc {
emmc_bus8: emmc-bus8 {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 19 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 20 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 21 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 22 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 23 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 24 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 25 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC6 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC7 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PD0 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PD1 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
};
emmc-clk {
- rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <2 RK_PA4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
emmc-cmd {
- rockchip,pins = <1 26 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <1 RK_PD2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
};
emmc_reset: emmc-reset {
- rockchip,pins = <2 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
leds {
stby_pwren: stby-pwren {
- rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
led_ctl: led-ctl {
- rockchip,pins = <3 29 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <2 9 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <2 RK_PB1 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <2 RK_PB2 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_cd: sdmmc-cd {
- rockchip,pins = <2 11 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <2 RK_PB3 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins = <2 5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <2 RK_PA5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <2 5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <2 6 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <2 7 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
- <2 8 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <2 RK_PA5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <2 RK_PA6 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <2 RK_PA7 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
+ <2 RK_PB0 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
index 8cdb3bf..f7c6520 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts
@@ -258,17 +258,17 @@
&pinctrl {
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_sleep: pmic-sleep {
- rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_2 &pcfg_pull_none>;
};
pmic_int: pmic-int {
- rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
index 7134181..e724177 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -275,64 +275,64 @@
emmc {
emmc_bus8: emmc-bus8 {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 19 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 20 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 21 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 22 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 23 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 24 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
- <1 25 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC6 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PC7 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PD0 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
+ <1 RK_PD1 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
};
emmc-clk {
- rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
+ rockchip,pins = <2 RK_PA4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
emmc-cmd {
- rockchip,pins = <1 26 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
+ rockchip,pins = <1 RK_PD2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
};
emmc_reset: emmc-reset {
- rockchip,pins = <2 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
ir {
ir_int: ir-int {
- rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
pwr_key: pwr-key {
- rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
stby_pwren: stby-pwren {
- rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
led_ctl: led-ctl {
- rockchip,pins = <3 29 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio {
wifi_reg_on: wifi-reg-on {
- rockchip,pins = <3 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_rst: bt-rst {
- rockchip,pins = <3 5 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
- rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d5dc05..eb9101c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -817,339 +817,339 @@
emmc {
emmc_clk: emmc-clk {
- rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
- rockchip,pins = <1 26 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PD2 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_pwr: emmc-pwr {
- rockchip,pins = <1 27 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PD3 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_bus1: emmc-bus1 {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_bus4: emmc-bus4 {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>,
- <1 19 RK_FUNC_2 &pcfg_pull_up>,
- <1 20 RK_FUNC_2 &pcfg_pull_up>,
- <1 21 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC3 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC4 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC5 RK_FUNC_2 &pcfg_pull_up>;
};
emmc_bus8: emmc-bus8 {
- rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>,
- <1 19 RK_FUNC_2 &pcfg_pull_up>,
- <1 20 RK_FUNC_2 &pcfg_pull_up>,
- <1 21 RK_FUNC_2 &pcfg_pull_up>,
- <1 22 RK_FUNC_2 &pcfg_pull_up>,
- <1 23 RK_FUNC_2 &pcfg_pull_up>,
- <1 24 RK_FUNC_2 &pcfg_pull_up>,
- <1 25 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC3 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC4 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC5 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC6 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PC7 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PD0 RK_FUNC_2 &pcfg_pull_up>,
+ <1 RK_PD1 RK_FUNC_2 &pcfg_pull_up>;
};
};
gmac {
rgmii_pins: rgmii-pins {
- rockchip,pins = <3 22 RK_FUNC_1 &pcfg_pull_none>,
- <3 24 RK_FUNC_1 &pcfg_pull_none>,
- <3 19 RK_FUNC_1 &pcfg_pull_none>,
- <3 8 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 9 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 10 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 14 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 28 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 13 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 15 RK_FUNC_1 &pcfg_pull_none>,
- <3 16 RK_FUNC_1 &pcfg_pull_none>,
- <3 17 RK_FUNC_1 &pcfg_pull_none>,
- <3 18 RK_FUNC_1 &pcfg_pull_none>,
- <3 25 RK_FUNC_1 &pcfg_pull_none>,
- <3 20 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PD4 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
};
rmii_pins: rmii-pins {
- rockchip,pins = <3 22 RK_FUNC_1 &pcfg_pull_none>,
- <3 24 RK_FUNC_1 &pcfg_pull_none>,
- <3 19 RK_FUNC_1 &pcfg_pull_none>,
- <3 8 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 9 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 13 RK_FUNC_1 &pcfg_pull_none_12ma>,
- <3 15 RK_FUNC_1 &pcfg_pull_none>,
- <3 16 RK_FUNC_1 &pcfg_pull_none>,
- <3 20 RK_FUNC_1 &pcfg_pull_none>,
- <3 21 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none_12ma>,
+ <3 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
- rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
- <0 7 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+ <0 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
- rockchip,pins = <2 21 RK_FUNC_1 &pcfg_pull_none>,
- <2 22 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
- rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_none>,
- <3 31 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB1 RK_FUNC_2 &pcfg_pull_none>,
+ <3 RK_PD7 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
- rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none>,
- <1 17 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
- rockchip,pins = <3 24 RK_FUNC_2 &pcfg_pull_none>,
- <3 25 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD0 RK_FUNC_2 &pcfg_pull_none>,
+ <3 RK_PD1 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c5 {
i2c5_xfer: i2c5-xfer {
- rockchip,pins = <3 26 RK_FUNC_2 &pcfg_pull_none>,
- <3 27 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD2 RK_FUNC_2 &pcfg_pull_none>,
+ <3 RK_PD3 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2s {
i2s_8ch_bus: i2s-8ch-bus {
- rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_none>,
- <2 13 RK_FUNC_1 &pcfg_pull_none>,
- <2 14 RK_FUNC_1 &pcfg_pull_none>,
- <2 15 RK_FUNC_1 &pcfg_pull_none>,
- <2 16 RK_FUNC_1 &pcfg_pull_none>,
- <2 17 RK_FUNC_1 &pcfg_pull_none>,
- <2 18 RK_FUNC_1 &pcfg_pull_none>,
- <2 19 RK_FUNC_1 &pcfg_pull_none>,
- <2 20 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
+ <2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
- rockchip,pins = <3 8 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
- rockchip,pins = <0 8 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_pin: pwm3-pin {
- rockchip,pins = <3 29 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD5 RK_FUNC_3 &pcfg_pull_none>;
};
};
sdio0 {
sdio0_bus1: sdio0-bus1 {
- rockchip,pins = <2 28 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_bus4: sdio0-bus4 {
- rockchip,pins = <2 28 RK_FUNC_1 &pcfg_pull_up>,
- <2 29 RK_FUNC_1 &pcfg_pull_up>,
- <2 30 RK_FUNC_1 &pcfg_pull_up>,
- <2 31 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PD5 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PD6 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PD7 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_cmd: sdio0-cmd {
- rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA0 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_clk: sdio0-clk {
- rockchip,pins = <3 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
sdio0_cd: sdio0-cd {
- rockchip,pins = <3 2 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA2 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_wp: sdio0-wp {
- rockchip,pins = <3 3 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_pwr: sdio0-pwr {
- rockchip,pins = <3 4 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA4 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_bkpwr: sdio0-bkpwr {
- rockchip,pins = <3 5 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA5 RK_FUNC_1 &pcfg_pull_up>;
};
sdio0_int: sdio0-int {
- rockchip,pins = <3 6 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PA6 RK_FUNC_1 &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_clk: sdmmc-clk {
- rockchip,pins = <2 9 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>;
};
sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PB2 RK_FUNC_1 &pcfg_pull_up>;
};
sdmmc_cd: sdmmc-cd {
- rockchip,pins = <2 11 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
};
sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins = <2 5 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PA5 RK_FUNC_1 &pcfg_pull_up>;
};
sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <2 5 RK_FUNC_1 &pcfg_pull_up>,
- <2 6 RK_FUNC_1 &pcfg_pull_up>,
- <2 7 RK_FUNC_1 &pcfg_pull_up>,
- <2 8 RK_FUNC_1 &pcfg_pull_up>;
+ rockchip,pins = <2 RK_PA5 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PA6 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PA7 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
};
};
spi0 {
spi0_clk: spi0-clk {
- rockchip,pins = <1 29 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PD5 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
- rockchip,pins = <1 24 RK_FUNC_3 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PD0 RK_FUNC_3 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
- rockchip,pins = <1 25 RK_FUNC_3 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PD1 RK_FUNC_3 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
- rockchip,pins = <1 23 RK_FUNC_3 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC7 RK_FUNC_3 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
- rockchip,pins = <1 22 RK_FUNC_3 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC6 RK_FUNC_3 &pcfg_pull_up>;
};
};
spi1 {
spi1_clk: spi1-clk {
- rockchip,pins = <1 14 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PB6 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
- rockchip,pins = <1 15 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PB7 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_cs1: spi1-cs1 {
- rockchip,pins = <3 28 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PD4 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
- rockchip,pins = <1 16 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC0 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
- rockchip,pins = <1 17 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC1 RK_FUNC_2 &pcfg_pull_up>;
};
};
spi2 {
spi2_clk: spi2-clk {
- rockchip,pins = <0 12 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB4 RK_FUNC_2 &pcfg_pull_up>;
};
spi2_cs0: spi2-cs0 {
- rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB5 RK_FUNC_2 &pcfg_pull_up>;
};
spi2_rx: spi2-rx {
- rockchip,pins = <0 10 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB2 RK_FUNC_2 &pcfg_pull_up>;
};
spi2_tx: spi2-tx {
- rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB3 RK_FUNC_2 &pcfg_pull_up>;
};
};
tsadc {
otp_gpio: otp-gpio {
- rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
- rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
- rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,
- <2 25 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD0 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
- rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
- rockchip,pins = <2 27 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
- rockchip,pins = <0 20 RK_FUNC_3 &pcfg_pull_up>,
- <0 21 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PC4 RK_FUNC_3 &pcfg_pull_up>,
+ <0 RK_PC5 RK_FUNC_3 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
- rockchip,pins = <0 22 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PC6 RK_FUNC_3 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
- rockchip,pins = <0 23 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PC7 RK_FUNC_3 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
- rockchip,pins = <2 6 RK_FUNC_2 &pcfg_pull_up>,
- <2 5 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA6 RK_FUNC_2 &pcfg_pull_up>,
+ <2 RK_PA5 RK_FUNC_2 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
- rockchip,pins = <3 29 RK_FUNC_2 &pcfg_pull_up>,
- <3 30 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PD5 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PD6 RK_FUNC_3 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
- rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PC0 RK_FUNC_2 &pcfg_pull_none>;
};
uart3_rts: uart3-rts {
- rockchip,pins = <3 17 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <3 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
};
};
uart4 {
uart4_xfer: uart4-xfer {
- rockchip,pins = <0 27 RK_FUNC_3 &pcfg_pull_up>,
- <0 26 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD3 RK_FUNC_3 &pcfg_pull_up>,
+ <0 RK_PD2 RK_FUNC_3 &pcfg_pull_none>;
};
uart4_cts: uart4-cts {
- rockchip,pins = <0 24 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD0 RK_FUNC_3 &pcfg_pull_none>;
};
uart4_rts: uart4-rts {
- rockchip,pins = <0 25 RK_FUNC_3 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PD1 RK_FUNC_3 &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
index 42033bc..d95d3bf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
@@ -245,19 +245,19 @@
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
- <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
+ <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
pmic_dvs2: pmic-dvs2 {
rockchip,pins =
- <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
+ <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb2 {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins =
- <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
+ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts
index 658bb9d..8279801 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts
@@ -277,30 +277,30 @@ ap_i2c_dig: &i2c2 {
digitizer {
/* Has external pullup */
cpu1_dig_irq_l: cpu1-dig-irq-l {
- rockchip,pins = <2 4 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
/* Has external pullup */
cpu1_dig_pdct_l: cpu1-dig-pdct-l {
- rockchip,pins = <2 5 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
discrete-regulators {
cpu3_pen_pwr_en: cpu3-pen-pwr-en {
- rockchip,pins = <4 30 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pen {
cpu1_pen_eject: cpu1-pen-eject {
- rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
wifi {
wlan_host_wake_l: wlan-host-wake-l {
- rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 0d960b7..35af9d0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -919,54 +919,54 @@ ap_i2c_audio: &i2c8 {
backlight-enable {
bl_en: bl-en {
- rockchip,pins = <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
cros-ec {
ec_ap_int_l: ec-ap-int-l {
- rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <RK_GPIO0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
discrete-regulators {
pp1500_en: pp1500-en {
- rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO0 RK_PB2 RK_FUNC_GPIO
&pcfg_pull_none>;
};
pp1800_audio_en: pp1800-audio-en {
- rockchip,pins = <RK_GPIO0 2 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO0 RK_PA2 RK_FUNC_GPIO
&pcfg_pull_down>;
};
pp3300_disp_en: pp3300-disp-en {
- rockchip,pins = <RK_GPIO4 27 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO4 RK_PD3 RK_FUNC_GPIO
&pcfg_pull_none>;
};
pp3000_en: pp3000-en {
- rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO0 RK_PB4 RK_FUNC_GPIO
&pcfg_pull_none>;
};
sd_io_pwr_en: sd-io-pwr-en {
- rockchip,pins = <RK_GPIO2 2 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO2 RK_PA2 RK_FUNC_GPIO
&pcfg_pull_none>;
};
sd_pwr_1800_sel: sd-pwr-1800-sel {
- rockchip,pins = <RK_GPIO2 28 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO2 RK_PD4 RK_FUNC_GPIO
&pcfg_pull_none>;
};
sd_slot_pwr_en: sd-slot-pwr-en {
- rockchip,pins = <RK_GPIO4 29 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO4 RK_PD5 RK_FUNC_GPIO
&pcfg_pull_none>;
};
wlan_module_pd_l: wlan-module-pd-l {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO
+ rockchip,pins = <RK_GPIO0 RK_PA4 RK_FUNC_GPIO
&pcfg_pull_down>;
};
};
@@ -974,17 +974,17 @@ ap_i2c_audio: &i2c8 {
codec {
/* Has external pullup */
headset_int_l: headset-int-l {
- rockchip,pins = <1 23 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
mic_int: mic-int {
- rockchip,pins = <1 13 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
max98357a {
sdmode_en: sdmode-en {
- rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
@@ -995,7 +995,7 @@ ap_i2c_audio: &i2c8 {
* to hack this as gpio, so the EP could be able to
* de-assert it along and make ClockPM(CPM) work.
*/
- rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -1006,20 +1006,20 @@ ap_i2c_audio: &i2c8 {
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins =
- <4 8 RK_FUNC_1 &pcfg_pull_none_8ma>,
- <4 9 RK_FUNC_1 &pcfg_pull_none_8ma>,
- <4 10 RK_FUNC_1 &pcfg_pull_none_8ma>,
- <4 11 RK_FUNC_1 &pcfg_pull_none_8ma>;
+ <4 RK_PB0 RK_FUNC_1 &pcfg_pull_none_8ma>,
+ <4 RK_PB1 RK_FUNC_1 &pcfg_pull_none_8ma>,
+ <4 RK_PB2 RK_FUNC_1 &pcfg_pull_none_8ma>,
+ <4 RK_PB3 RK_FUNC_1 &pcfg_pull_none_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins =
- <4 12 RK_FUNC_1 &pcfg_pull_none_8ma>;
+ <4 RK_PB4 RK_FUNC_1 &pcfg_pull_none_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins =
- <4 13 RK_FUNC_1 &pcfg_pull_none_8ma>;
+ <4 RK_PB5 RK_FUNC_1 &pcfg_pull_none_8ma>;
};
/*
@@ -1033,12 +1033,12 @@ ap_i2c_audio: &i2c8 {
*/
sdmmc_cd: sdmcc-cd {
rockchip,pins =
- <0 7 RK_FUNC_1 &pcfg_pull_none>;
+ <0 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
};
/* This is where we actually hook up CD; has external pull */
sdmmc_cd_gpio: sdmmc-cd-gpio {
- rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -1048,36 +1048,36 @@ ap_i2c_audio: &i2c8 {
* Pull down SPI1 CLK/CS/RX/TX during suspend, to
* prevent leakage.
*/
- rockchip,pins = <1 9 RK_FUNC_GPIO &pcfg_pull_down>,
- <1 10 RK_FUNC_GPIO &pcfg_pull_down>,
- <1 7 RK_FUNC_GPIO &pcfg_pull_down>,
- <1 8 RK_FUNC_GPIO &pcfg_pull_down>;
+ rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>,
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>,
+ <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>,
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
touchscreen {
touch_int_l: touch-int-l {
- rockchip,pins = <3 13 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
touch_reset_l: touch-reset-l {
- rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
trackpad {
ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
- rockchip,pins = <3 12 RK_FUNC_GPIO &pcfg_output_high>;
+ rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_output_high>;
};
trackpad_int_l: trackpad-int-l {
- rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
wifi {
wifi_perst_l: wifi-perst-l {
- rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
wlan_module_reset_l: wlan-module-reset-l {
@@ -1086,18 +1086,18 @@ ap_i2c_audio: &i2c8 {
* Possible), to avoid leakage through the powered-down
* WiFi.
*/
- rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_output_low>;
+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_output_low>;
};
bt_host_wake_l: bt-host-wake-l {
/* Kevin has an external pull up, but Gru does not */
- rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
write-protect {
ap_fw_wp: ap-fw-wp {
- rockchip,pins = <1 18 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 9d44c19..54a5340 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1568,14 +1568,14 @@
clock {
clk_32k: clk-32k {
- rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA0 RK_FUNC_2 &pcfg_pull_none>;
};
};
edp {
edp_hpd: edp-hpd {
rockchip,pins =
- <4 23 RK_FUNC_2 &pcfg_pull_none>;
+ <4 RK_PC7 RK_FUNC_2 &pcfg_pull_none>;
};
};
@@ -1583,443 +1583,443 @@
rgmii_pins: rgmii-pins {
rockchip,pins =
/* mac_txclk */
- <3 17 RK_FUNC_1 &pcfg_pull_none_13ma>,
+ <3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_13ma>,
/* mac_rxclk */
- <3 14 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
/* mac_mdio */
- <3 13 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txen */
- <3 12 RK_FUNC_1 &pcfg_pull_none_13ma>,
+ <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_13ma>,
/* mac_clk */
- <3 11 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxdv */
- <3 9 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
/* mac_mdc */
- <3 8 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxd1 */
- <3 7 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxd0 */
- <3 6 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txd1 */
- <3 5 RK_FUNC_1 &pcfg_pull_none_13ma>,
+ <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_13ma>,
/* mac_txd0 */
- <3 4 RK_FUNC_1 &pcfg_pull_none_13ma>,
+ <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_13ma>,
/* mac_rxd3 */
- <3 3 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxd2 */
- <3 2 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txd3 */
- <3 1 RK_FUNC_1 &pcfg_pull_none_13ma>,
+ <3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_13ma>,
/* mac_txd2 */
- <3 0 RK_FUNC_1 &pcfg_pull_none_13ma>;
+ <3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_13ma>;
};
rmii_pins: rmii-pins {
rockchip,pins =
/* mac_mdio */
- <3 13 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txen */
- <3 12 RK_FUNC_1 &pcfg_pull_none_13ma>,
+ <3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_13ma>,
/* mac_clk */
- <3 11 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxer */
- <3 10 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxdv */
- <3 9 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
/* mac_mdc */
- <3 8 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxd1 */
- <3 7 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
/* mac_rxd0 */
- <3 6 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
/* mac_txd1 */
- <3 5 RK_FUNC_1 &pcfg_pull_none_13ma>,
+ <3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_13ma>,
/* mac_txd0 */
- <3 4 RK_FUNC_1 &pcfg_pull_none_13ma>;
+ <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_13ma>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins =
- <1 15 RK_FUNC_2 &pcfg_pull_none>,
- <1 16 RK_FUNC_2 &pcfg_pull_none>;
+ <1 RK_PB7 RK_FUNC_2 &pcfg_pull_none>,
+ <1 RK_PC0 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins =
- <4 2 RK_FUNC_1 &pcfg_pull_none>,
- <4 1 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+ <4 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
rockchip,pins =
- <2 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <2 0 RK_FUNC_2 &pcfg_pull_none_12ma>;
+ <2 RK_PA1 RK_FUNC_2 &pcfg_pull_none_12ma>,
+ <2 RK_PA0 RK_FUNC_2 &pcfg_pull_none_12ma>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
rockchip,pins =
- <4 17 RK_FUNC_1 &pcfg_pull_none>,
- <4 16 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
+ <4 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
rockchip,pins =
- <1 12 RK_FUNC_1 &pcfg_pull_none>,
- <1 11 RK_FUNC_1 &pcfg_pull_none>;
+ <1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c5 {
i2c5_xfer: i2c5-xfer {
rockchip,pins =
- <3 11 RK_FUNC_2 &pcfg_pull_none>,
- <3 10 RK_FUNC_2 &pcfg_pull_none>;
+ <3 RK_PB3 RK_FUNC_2 &pcfg_pull_none>,
+ <3 RK_PB2 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c6 {
i2c6_xfer: i2c6-xfer {
rockchip,pins =
- <2 10 RK_FUNC_2 &pcfg_pull_none>,
- <2 9 RK_FUNC_2 &pcfg_pull_none>;
+ <2 RK_PB2 RK_FUNC_2 &pcfg_pull_none>,
+ <2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c7 {
i2c7_xfer: i2c7-xfer {
rockchip,pins =
- <2 8 RK_FUNC_2 &pcfg_pull_none>,
- <2 7 RK_FUNC_2 &pcfg_pull_none>;
+ <2 RK_PB0 RK_FUNC_2 &pcfg_pull_none>,
+ <2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
};
};
i2c8 {
i2c8_xfer: i2c8-xfer {
rockchip,pins =
- <1 21 RK_FUNC_1 &pcfg_pull_none>,
- <1 20 RK_FUNC_1 &pcfg_pull_none>;
+ <1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,
+ <1 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2s0 {
i2s0_8ch_bus: i2s0-8ch-bus {
rockchip,pins =
- <3 24 RK_FUNC_1 &pcfg_pull_none>,
- <3 25 RK_FUNC_1 &pcfg_pull_none>,
- <3 26 RK_FUNC_1 &pcfg_pull_none>,
- <3 27 RK_FUNC_1 &pcfg_pull_none>,
- <3 28 RK_FUNC_1 &pcfg_pull_none>,
- <3 29 RK_FUNC_1 &pcfg_pull_none>,
- <3 30 RK_FUNC_1 &pcfg_pull_none>,
- <3 31 RK_FUNC_1 &pcfg_pull_none>,
- <4 0 RK_FUNC_1 &pcfg_pull_none>;
+ <3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD4 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD5 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD6 RK_FUNC_1 &pcfg_pull_none>,
+ <3 RK_PD7 RK_FUNC_1 &pcfg_pull_none>,
+ <4 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2s1 {
i2s1_2ch_bus: i2s1-2ch-bus {
rockchip,pins =
- <4 3 RK_FUNC_1 &pcfg_pull_none>,
- <4 4 RK_FUNC_1 &pcfg_pull_none>,
- <4 5 RK_FUNC_1 &pcfg_pull_none>,
- <4 6 RK_FUNC_1 &pcfg_pull_none>,
- <4 7 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
+ <4 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
+ <4 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
+ <4 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+ <4 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
};
};
sleep {
ap_pwroff: ap-pwroff {
- rockchip,pins = <1 5 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
};
ddrio_pwroff: ddrio-pwroff {
- rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
};
};
spdif {
spdif_bus: spdif-bus {
rockchip,pins =
- <4 21 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
};
spi0 {
spi0_clk: spi0-clk {
rockchip,pins =
- <3 6 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA6 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
rockchip,pins =
- <3 7 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA7 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
rockchip,pins =
- <3 8 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PB0 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
rockchip,pins =
- <3 5 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA5 RK_FUNC_2 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
rockchip,pins =
- <3 4 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA4 RK_FUNC_2 &pcfg_pull_up>;
};
};
spi1 {
spi1_clk: spi1-clk {
rockchip,pins =
- <1 9 RK_FUNC_2 &pcfg_pull_up>;
+ <1 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
rockchip,pins =
- <1 10 RK_FUNC_2 &pcfg_pull_up>;
+ <1 RK_PB2 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
rockchip,pins =
- <1 7 RK_FUNC_2 &pcfg_pull_up>;
+ <1 RK_PA7 RK_FUNC_2 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
rockchip,pins =
- <1 8 RK_FUNC_2 &pcfg_pull_up>;
+ <1 RK_PB0 RK_FUNC_2 &pcfg_pull_up>;
};
};
spi2 {
spi2_clk: spi2-clk {
rockchip,pins =
- <2 11 RK_FUNC_1 &pcfg_pull_up>;
+ <2 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
};
spi2_cs0: spi2-cs0 {
rockchip,pins =
- <2 12 RK_FUNC_1 &pcfg_pull_up>;
+ <2 RK_PB4 RK_FUNC_1 &pcfg_pull_up>;
};
spi2_rx: spi2-rx {
rockchip,pins =
- <2 9 RK_FUNC_1 &pcfg_pull_up>;
+ <2 RK_PB1 RK_FUNC_1 &pcfg_pull_up>;
};
spi2_tx: spi2-tx {
rockchip,pins =
- <2 10 RK_FUNC_1 &pcfg_pull_up>;
+ <2 RK_PB2 RK_FUNC_1 &pcfg_pull_up>;
};
};
spi3 {
spi3_clk: spi3-clk {
rockchip,pins =
- <1 17 RK_FUNC_1 &pcfg_pull_up>;
+ <1 RK_PC1 RK_FUNC_1 &pcfg_pull_up>;
};
spi3_cs0: spi3-cs0 {
rockchip,pins =
- <1 18 RK_FUNC_1 &pcfg_pull_up>;
+ <1 RK_PC2 RK_FUNC_1 &pcfg_pull_up>;
};
spi3_rx: spi3-rx {
rockchip,pins =
- <1 15 RK_FUNC_1 &pcfg_pull_up>;
+ <1 RK_PB7 RK_FUNC_1 &pcfg_pull_up>;
};
spi3_tx: spi3-tx {
rockchip,pins =
- <1 16 RK_FUNC_1 &pcfg_pull_up>;
+ <1 RK_PC0 RK_FUNC_1 &pcfg_pull_up>;
};
};
spi4 {
spi4_clk: spi4-clk {
rockchip,pins =
- <3 2 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA2 RK_FUNC_2 &pcfg_pull_up>;
};
spi4_cs0: spi4-cs0 {
rockchip,pins =
- <3 3 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA3 RK_FUNC_2 &pcfg_pull_up>;
};
spi4_rx: spi4-rx {
rockchip,pins =
- <3 0 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA0 RK_FUNC_2 &pcfg_pull_up>;
};
spi4_tx: spi4-tx {
rockchip,pins =
- <3 1 RK_FUNC_2 &pcfg_pull_up>;
+ <3 RK_PA1 RK_FUNC_2 &pcfg_pull_up>;
};
};
spi5 {
spi5_clk: spi5-clk {
rockchip,pins =
- <2 22 RK_FUNC_2 &pcfg_pull_up>;
+ <2 RK_PC6 RK_FUNC_2 &pcfg_pull_up>;
};
spi5_cs0: spi5-cs0 {
rockchip,pins =
- <2 23 RK_FUNC_2 &pcfg_pull_up>;
+ <2 RK_PC7 RK_FUNC_2 &pcfg_pull_up>;
};
spi5_rx: spi5-rx {
rockchip,pins =
- <2 20 RK_FUNC_2 &pcfg_pull_up>;
+ <2 RK_PC4 RK_FUNC_2 &pcfg_pull_up>;
};
spi5_tx: spi5-tx {
rockchip,pins =
- <2 21 RK_FUNC_2 &pcfg_pull_up>;
+ <2 RK_PC5 RK_FUNC_2 &pcfg_pull_up>;
};
};
tsadc {
otp_gpio: otp-gpio {
- rockchip,pins = <1 6 RK_FUNC_GPIO &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
- rockchip,pins = <1 6 RK_FUNC_1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins =
- <2 16 RK_FUNC_1 &pcfg_pull_up>,
- <2 17 RK_FUNC_1 &pcfg_pull_none>;
+ <2 RK_PC0 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins =
- <2 18 RK_FUNC_1 &pcfg_pull_none>;
+ <2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
rockchip,pins =
- <2 19 RK_FUNC_1 &pcfg_pull_none>;
+ <2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins =
- <3 12 RK_FUNC_2 &pcfg_pull_up>,
- <3 13 RK_FUNC_2 &pcfg_pull_none>;
+ <3 RK_PB4 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PB5 RK_FUNC_2 &pcfg_pull_none>;
};
};
uart2a {
uart2a_xfer: uart2a-xfer {
rockchip,pins =
- <4 8 RK_FUNC_2 &pcfg_pull_up>,
- <4 9 RK_FUNC_2 &pcfg_pull_none>;
+ <4 RK_PB0 RK_FUNC_2 &pcfg_pull_up>,
+ <4 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
};
};
uart2b {
uart2b_xfer: uart2b-xfer {
rockchip,pins =
- <4 16 RK_FUNC_2 &pcfg_pull_up>,
- <4 17 RK_FUNC_2 &pcfg_pull_none>;
+ <4 RK_PC0 RK_FUNC_2 &pcfg_pull_up>,
+ <4 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
};
};
uart2c {
uart2c_xfer: uart2c-xfer {
rockchip,pins =
- <4 19 RK_FUNC_1 &pcfg_pull_up>,
- <4 20 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PC3 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
};
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins =
- <3 14 RK_FUNC_2 &pcfg_pull_up>,
- <3 15 RK_FUNC_2 &pcfg_pull_none>;
+ <3 RK_PB6 RK_FUNC_2 &pcfg_pull_up>,
+ <3 RK_PB7 RK_FUNC_2 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
rockchip,pins =
- <3 18 RK_FUNC_2 &pcfg_pull_none>;
+ <3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
};
uart3_rts: uart3-rts {
rockchip,pins =
- <3 19 RK_FUNC_2 &pcfg_pull_none>;
+ <3 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
};
};
uart4 {
uart4_xfer: uart4-xfer {
rockchip,pins =
- <1 7 RK_FUNC_1 &pcfg_pull_up>,
- <1 8 RK_FUNC_1 &pcfg_pull_none>;
+ <1 RK_PA7 RK_FUNC_1 &pcfg_pull_up>,
+ <1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
};
};
uarthdcp {
uarthdcp_xfer: uarthdcp-xfer {
rockchip,pins =
- <4 21 RK_FUNC_2 &pcfg_pull_up>,
- <4 22 RK_FUNC_2 &pcfg_pull_none>;
+ <4 RK_PC5 RK_FUNC_2 &pcfg_pull_up>,
+ <4 RK_PC6 RK_FUNC_2 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins =
- <4 18 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
};
vop0_pwm_pin: vop0-pwm-pin {
rockchip,pins =
- <4 18 RK_FUNC_2 &pcfg_pull_none>;
+ <4 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins =
- <4 22 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
};
vop1_pwm_pin: vop1-pwm-pin {
rockchip,pins =
- <4 18 RK_FUNC_3 &pcfg_pull_none>;
+ <4 RK_PC2 RK_FUNC_3 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
rockchip,pins =
- <1 19 RK_FUNC_1 &pcfg_pull_none>;
+ <1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm3a {
pwm3a_pin: pwm3a-pin {
rockchip,pins =
- <0 6 RK_FUNC_1 &pcfg_pull_none>;
+ <0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
};
};
pwm3b {
pwm3b_pin: pwm3b-pin {
rockchip,pins =
- <1 14 RK_FUNC_1 &pcfg_pull_none>;
+ <1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;
};
};
pcie {
pcie_clkreqn: pci-clkreqn {
rockchip,pins =
- <2 26 RK_FUNC_2 &pcfg_pull_none>;
+ <2 RK_PD2 RK_FUNC_2 &pcfg_pull_none>;
};
pcie_clkreqnb: pci-clkreqnb {
rockchip,pins =
- <4 24 RK_FUNC_1 &pcfg_pull_none>;
+ <4 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
};
};
--
1.9.1
^ permalink raw reply related
* [PATCH 4/4] arm64: dts: rk3399: add pinctrl for some peripheral
From: Kever Yang @ 2017-04-12 7:10 UTC (permalink / raw)
To: heiko-4mtYJXux2i+zQB+pC5nmwQ
Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Kever Yang,
devicetree-u79uwXL29TY76Z2rM5mHXA, David Wu, Caesar Wang,
Elaine Zhang, Brian Norris, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
Shawn Lin, Douglas Anderson, Will Deacon, Jianqun Xu,
Mark Rutland, Rob Herring, Catalin Marinas,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1491981044-24635-1-git-send-email-kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Add pinctrl for sdio, sdmmc, pcie, spdif, hdmi.
Signed-off-by: Kever Yang <kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 113 +++++++++++++++++++++++++++++++
1 file changed, 113 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 54a5340..0096c70 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1737,6 +1737,91 @@
};
};
+ sdio0 {
+ sdio0_bus1: sdio0-bus1 {
+ rockchip,pins =
+ <2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdio0_bus4: sdio0-bus4 {
+ rockchip,pins =
+ <2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
+ <2 RK_PC7 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdio0_cmd: sdio0-cmd {
+ rockchip,pins =
+ <2 RK_PD0 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdio0_clk: sdio0-clk {
+ rockchip,pins =
+ <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
+ };
+
+ sdio0_cd: sdio0-cd {
+ rockchip,pins =
+ <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdio0_pwr: sdio0-pwr {
+ rockchip,pins =
+ <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdio0_bkpwr: sdio0-bkpwr {
+ rockchip,pins =
+ <2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdio0_wp: sdio0-wp {
+ rockchip,pins =
+ <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdio0_int: sdio0-int {
+ rockchip,pins =
+ <0 RK_PA4 RK_FUNC_1 &pcfg_pull_up>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_bus1: sdmmc-bus1 {
+ rockchip,pins =
+ <4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins =
+ <4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PB1 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
+ <4 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins =
+ <4 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins =
+ <4 RK_PB5 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_cd: sdmcc-cd {
+ rockchip,pins =
+ <0 RK_PA7 RK_FUNC_1 &pcfg_pull_up>;
+ };
+
+ sdmmc_wp: sdmmc-wp {
+ rockchip,pins =
+ <0 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
+ };
+ };
+
sleep {
ap_pwroff: ap-pwroff {
rockchip,pins = <1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
@@ -1752,6 +1837,11 @@
rockchip,pins =
<4 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
+
+ spdif_bus_1: spdif-bus-1 {
+ rockchip,pins =
+ <3 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
+ };
};
spi0 {
@@ -2011,6 +2101,19 @@
};
};
+ hdmi {
+ hdmi_i2c_xfer: hdmi-i2c-xfer {
+ rockchip,pins =
+ <4 RK_PC1 RK_FUNC_3 &pcfg_pull_none>,
+ <4 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
+ };
+
+ hdmi_cec: hdmi-cec {
+ rockchip,pins =
+ <4 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
pcie {
pcie_clkreqn: pci-clkreqn {
rockchip,pins =
@@ -2021,6 +2124,16 @@
rockchip,pins =
<4 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
};
+
+ pcie_clkreqn_cpm: pci-clkreqn-cpm {
+ rockchip,pins =
+ <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie_clkreqnb_cpm: pci-clkreqnb-cpm {
+ rockchip,pins =
+ <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
};
};
--
1.9.1
--
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the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH v5 0/3] Support for USB DRD Phy driver for NS2
From: Raviteja Garimella @ 2017-04-12 7:12 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kishon Vijay Abraham I, Ray Jui,
Scott Branden, Jon Mason, Catalin Marinas, Will Deacon
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Changes in v5:
=============
Removed references to phy_ops in the same driver by connect_work
event handler to change the phy modes.
To support dynamically changing the mode of the phy, it does
not require doing a phy reset/programming of PHY PLL. Changes
are made to the connect_work routine to just program the required
register bits to achieve this purpose.
<clip: as before>
Changes in v4:
=============
Remove references to edev->name in debug prints.
Changes in v3:
=============
Remove unnecessary checks for poweron as suggested in review.
Changes in v2:
=============
1. Initialize file operations .owner field with THIS_MODULE.
2. Remove unnecessary gpio example in DT bindings documentation.
This is previously acked by Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Introduction for PATCH v1:
This patch adds support for USB Dual Role Device Phy for Broadcom
Northstar2 SoC. Apart from the new phy driver, this patchset contains
changes to Kconfig, Makefile, and Device tree files.
This patchset is tested on Broadcom NS2 BCM958712K reference board.
Repo: https://github.com/Broadcom/arm64-linux.git
Branch: ns2_drdphy_v5
Raviteja Garimella (3):
dt-bindings:phy:Add DT bindings documentation for NS2 USB DRD phy
phy:phy-bcm-ns2-usbdrd:Broadcom USB DRD Phy driver for Northstar2
DT nodes for Broadcom Northstar2 USB DRD Phy
.../devicetree/bindings/phy/brcm,ns2-drd-phy.txt | 30 ++
arch/arm64/boot/dts/broadcom/ns2.dtsi | 14 +
drivers/phy/Kconfig | 13 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-bcm-ns2-usbdrd.c | 595 +++++++++++++++++++++
5 files changed, 653 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/brcm,ns2-drd-phy.txt
create mode 100644 drivers/phy/phy-bcm-ns2-usbdrd.c
--
2.1.0
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH v5 1/3] dt-bindings:phy:Add DT bindings documentation for NS2 USB DRD phy
From: Raviteja Garimella @ 2017-04-12 7:12 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kishon Vijay Abraham I, Ray Jui,
Scott Branden, Jon Mason, Catalin Marinas, Will Deacon
Cc: devicetree, linux-kernel, bcm-kernel-feedback-list,
linux-arm-kernel
In-Reply-To: <1491981125-6859-1-git-send-email-raviteja.garimella@broadcom.com>
This patch adds documentation for NS2 DRD Phy driver DT bindings
Signed-off-by: Raviteja Garimella <raviteja.garimella@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/phy/brcm,ns2-drd-phy.txt | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/brcm,ns2-drd-phy.txt
diff --git a/Documentation/devicetree/bindings/phy/brcm,ns2-drd-phy.txt b/Documentation/devicetree/bindings/phy/brcm,ns2-drd-phy.txt
new file mode 100644
index 0000000..04f063a
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm,ns2-drd-phy.txt
@@ -0,0 +1,30 @@
+BROADCOM NORTHSTAR2 USB2 (DUAL ROLE DEVICE) PHY
+
+Required properties:
+ - compatible: brcm,ns2-drd-phy
+ - reg: offset and length of the NS2 PHY related registers.
+ - reg-names
+ The below registers must be provided.
+ icfg - for DRD ICFG configurations
+ rst-ctrl - for DRD IDM reset
+ crmu-ctrl - for CRMU core vdd, PHY and PHY PLL reset
+ usb2-strap - for port over current polarity reversal
+ - #phy-cells: Must be 0. No args required.
+ - vbus-gpios: vbus gpio binding
+ - id-gpios: id gpio binding
+
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Example:
+ usbdrd_phy: phy@66000960 {
+ #phy-cells = <0>;
+ compatible = "brcm,ns2-drd-phy";
+ reg = <0x66000960 0x24>,
+ <0x67012800 0x4>,
+ <0x6501d148 0x4>,
+ <0x664d0700 0x4>;
+ reg-names = "icfg", "rst-ctrl",
+ "crmu-ctrl", "usb2-strap";
+ id-gpios = <&gpio_g 30 0>;
+ vbus-gpios = <&gpio_g 31 0>;
+ };
--
2.1.0
^ permalink raw reply related
* [PATCH v5 2/3] phy:phy-bcm-ns2-usbdrd:Broadcom USB DRD Phy driver for Northstar2
From: Raviteja Garimella @ 2017-04-12 7:12 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kishon Vijay Abraham I, Ray Jui,
Scott Branden, Jon Mason, Catalin Marinas, Will Deacon
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1491981125-6859-1-git-send-email-raviteja.garimella-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
This is driver for USB DRD Phy used in Broadcom's Northstar2
SoC. The phy can be configured to be in Device mode or Host
mode based on the type of cable connected to the port. The
driver registers to extcon framework to get appropriate
connect events for Host/Device cables connect/disconnect
states based on VBUS and ID interrupts.
Signed-off-by: Raviteja Garimella <raviteja.garimella-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
drivers/phy/Kconfig | 13 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-bcm-ns2-usbdrd.c | 595 +++++++++++++++++++++++++++++++++++++++
3 files changed, 609 insertions(+)
create mode 100644 drivers/phy/phy-bcm-ns2-usbdrd.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 005cadb..c9de9a9 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -488,6 +488,19 @@ config PHY_CYGNUS_PCIE
Enable this to support the Broadcom Cygnus PCIe PHY.
If unsure, say N.
+config PHY_NS2_USB_DRD
+ tristate "Broadcom Northstar2 USB DRD PHY support"
+ depends on OF && (ARCH_BCM_IPROC || COMPILE_TEST)
+ select GENERIC_PHY
+ select EXTCON
+ default ARCH_BCM_IPROC
+ help
+ Enable this to support the Broadcom Northstar2 USB DRD PHY.
+ This driver initializes the PHY in either HOST or DEVICE mode.
+ The host or device configuration is read from device tree.
+
+ If unsure, say N.
+
source "drivers/phy/tegra/Kconfig"
config PHY_NS2_PCIE
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index dd8f3b5..9285f88 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
obj-$(CONFIG_PHY_BRCM_SATA) += phy-brcm-sata.o
obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o
+obj-$(CONFIG_PHY_NS2_USB_DRD) += phy-bcm-ns2-usbdrd.o
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
diff --git a/drivers/phy/phy-bcm-ns2-usbdrd.c b/drivers/phy/phy-bcm-ns2-usbdrd.c
new file mode 100644
index 0000000..92b68b1
--- /dev/null
+++ b/drivers/phy/phy-bcm-ns2-usbdrd.c
@@ -0,0 +1,595 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/extcon.h>
+#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/workqueue.h>
+
+#define ICFG_DRD_AFE 0x0
+#define ICFG_MISC_STAT 0x18
+#define ICFG_DRD_P0CTL 0x1C
+#define ICFG_STRAP_CTRL 0x20
+#define ICFG_FSM_CTRL 0x24
+
+#define ICFG_DEV_BIT BIT(2)
+#define IDM_RST_BIT BIT(0)
+#define AFE_CORERDY_VDDC BIT(18)
+#define PHY_PLL_RESETB BIT(15)
+#define PHY_RESETB BIT(14)
+#define PHY_PLL_LOCK BIT(0)
+
+#define DRD_DEV_MODE BIT(20)
+#define OHCI_OVRCUR_POL BIT(11)
+#define ICFG_OFF_MODE BIT(6)
+#define PLL_LOCK_RETRY 1000
+
+#define EVT_DEVICE 0
+#define EVT_HOST 1
+#define EVT_IDLE 2
+
+#define DRD_HOST_MODE (BIT(2) | BIT(3))
+#define DRD_DEVICE_MODE (BIT(4) | BIT(5))
+#define DRD_HOST_VAL 0x803
+#define DRD_DEV_VAL 0x807
+#define GPIO_DELAY 20
+#define PHY_WQ_DELAY msecs_to_jiffies(600)
+
+struct ns2_phy_data;
+struct ns2_phy_driver {
+ void __iomem *icfgdrd_regs;
+ void __iomem *idmdrd_rst_ctrl;
+ void __iomem *crmu_usb2_ctrl;
+ void __iomem *usb2h_strap_reg;
+ spinlock_t lock; /* spin lock for phy driver */
+ struct ns2_phy_data *data;
+ struct extcon_specific_cable_nb extcon_dev;
+ struct extcon_specific_cable_nb extcon_host;
+ struct notifier_block host_nb;
+ struct notifier_block dev_nb;
+ struct delayed_work conn_work;
+ struct extcon_dev *edev;
+ struct gpio_desc *vbus_gpiod;
+ struct gpio_desc *id_gpiod;
+ int id_irq;
+ int vbus_irq;
+ unsigned long debounce_jiffies;
+ struct delayed_work wq_extcon;
+};
+
+struct ns2_phy_data {
+ struct ns2_phy_driver *driver;
+ struct phy *phy;
+ int new_state;
+};
+
+static const unsigned int usb_extcon_cable[] = {
+ EXTCON_USB,
+ EXTCON_USB_HOST,
+ EXTCON_NONE,
+};
+
+static inline int pll_lock_stat(u32 usb_reg, int reg_mask,
+ struct ns2_phy_driver *driver)
+{
+ int retry = PLL_LOCK_RETRY;
+ u32 val;
+
+ do {
+ udelay(1);
+ val = readl(driver->icfgdrd_regs + usb_reg);
+ if (val & reg_mask)
+ return 0;
+ } while (--retry > 0);
+
+ return -EBUSY;
+}
+
+static int ns2_drd_phy_init(struct phy *phy)
+{
+ struct ns2_phy_data *data = phy_get_drvdata(phy);
+ struct ns2_phy_driver *driver = data->driver;
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&driver->lock, flags);
+
+ val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ if (data->new_state == EVT_HOST) {
+ val &= ~DRD_DEVICE_MODE;
+ val |= DRD_HOST_MODE;
+ } else {
+ val &= ~DRD_HOST_MODE;
+ val |= DRD_DEVICE_MODE;
+ }
+ writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ spin_unlock_irqrestore(&driver->lock, flags);
+ return 0;
+}
+
+static int ns2_drd_phy_shutdown(struct phy *phy)
+{
+ struct ns2_phy_data *data = phy_get_drvdata(phy);
+ struct ns2_phy_driver *driver = data->driver;
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&driver->lock, flags);
+
+ val = readl(driver->crmu_usb2_ctrl);
+ val &= ~AFE_CORERDY_VDDC;
+ writel(val, driver->crmu_usb2_ctrl);
+
+ val = readl(driver->crmu_usb2_ctrl);
+ val &= ~DRD_DEV_MODE;
+ writel(val, driver->crmu_usb2_ctrl);
+
+ /* Disable Host and Device Mode */
+ val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
+ val &= ~(DRD_HOST_MODE | DRD_DEVICE_MODE | ICFG_OFF_MODE);
+ writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ spin_unlock_irqrestore(&driver->lock, flags);
+ return 0;
+}
+
+static int ns2_drd_phy_poweron(struct phy *phy)
+{
+ struct ns2_phy_data *data = phy_get_drvdata(phy);
+ struct ns2_phy_driver *driver = data->driver;
+ u32 extcon_event = data->new_state;
+ unsigned long flags;
+ int ret;
+ u32 val;
+
+ spin_lock_irqsave(&driver->lock, flags);
+ if (extcon_event == EVT_DEVICE) {
+ writel(DRD_DEV_VAL, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
+
+ val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
+ val &= ~(DRD_HOST_MODE | ICFG_OFF_MODE);
+ val |= DRD_DEVICE_MODE;
+ writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ val = readl(driver->idmdrd_rst_ctrl);
+ val &= ~IDM_RST_BIT;
+ writel(val, driver->idmdrd_rst_ctrl);
+
+ val = readl(driver->crmu_usb2_ctrl);
+ val |= (AFE_CORERDY_VDDC | DRD_DEV_MODE);
+ writel(val, driver->crmu_usb2_ctrl);
+
+ /* Bring PHY and PHY_PLL out of Reset */
+ val = readl(driver->crmu_usb2_ctrl);
+ val |= (PHY_PLL_RESETB | PHY_RESETB);
+ writel(val, driver->crmu_usb2_ctrl);
+
+ ret = pll_lock_stat(ICFG_MISC_STAT, PHY_PLL_LOCK, driver);
+ if (ret < 0) {
+ dev_err(&phy->dev, "Phy PLL lock failed\n");
+ goto err_shutdown;
+ }
+ } else {
+ writel(DRD_HOST_VAL, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
+
+ val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
+ val &= ~(DRD_DEVICE_MODE | ICFG_OFF_MODE);
+ val |= DRD_HOST_MODE;
+ writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ val = readl(driver->crmu_usb2_ctrl);
+ val |= AFE_CORERDY_VDDC;
+ writel(val, driver->crmu_usb2_ctrl);
+
+ ret = pll_lock_stat(ICFG_MISC_STAT, PHY_PLL_LOCK, driver);
+ if (ret < 0) {
+ dev_err(&phy->dev, "Phy PLL lock failed\n");
+ goto err_shutdown;
+ }
+
+ val = readl(driver->idmdrd_rst_ctrl);
+ val &= ~IDM_RST_BIT;
+ writel(val, driver->idmdrd_rst_ctrl);
+
+ /* port over current Polarity */
+ val = readl(driver->usb2h_strap_reg);
+ val |= OHCI_OVRCUR_POL;
+ writel(val, driver->usb2h_strap_reg);
+ }
+ spin_unlock_irqrestore(&driver->lock, flags);
+ return 0;
+
+err_shutdown:
+ spin_unlock_irqrestore(&driver->lock, flags);
+ ns2_drd_phy_shutdown(phy);
+ return ret;
+}
+
+static void connect_work(struct work_struct *work)
+{
+ struct ns2_phy_driver *driver;
+ u32 extcon_event;
+ u32 val;
+
+ driver = container_of(to_delayed_work(work),
+ struct ns2_phy_driver, conn_work);
+ extcon_event = driver->data->new_state;
+
+ val = readl(driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ switch (extcon_event) {
+ case EVT_DEVICE:
+ val = (val & ~DRD_HOST_MODE) | DRD_DEVICE_MODE;
+ writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ val = readl(driver->icfgdrd_regs + ICFG_DRD_P0CTL);
+ val |= ICFG_DEV_BIT;
+ writel(val, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
+ break;
+
+ case EVT_HOST:
+ val = (val & ~DRD_DEVICE_MODE) | DRD_HOST_MODE;
+ writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
+
+ val = readl(driver->usb2h_strap_reg);
+ val |= OHCI_OVRCUR_POL;
+ writel(val, driver->usb2h_strap_reg);
+
+ val = readl(driver->icfgdrd_regs + ICFG_DRD_P0CTL);
+ val &= ~ICFG_DEV_BIT;
+ writel(val, driver->icfgdrd_regs + ICFG_DRD_P0CTL);
+ break;
+
+ case EVT_IDLE:
+ val &= ~(DRD_HOST_MODE | DRD_DEVICE_MODE);
+ writel(val, driver->icfgdrd_regs + ICFG_FSM_CTRL);
+ break;
+
+ default:
+ pr_err("Invalid extcon event\n");
+ break;
+ }
+}
+
+static int drd_device_notify(struct notifier_block *self,
+ unsigned long event, void *ptr)
+{
+ struct ns2_phy_driver *driver = container_of(self,
+ struct ns2_phy_driver, dev_nb);
+
+ if (event) {
+ pr_debug("Device connected\n");
+ driver->data->new_state = EVT_DEVICE;
+ schedule_delayed_work(&driver->conn_work, 0);
+ } else {
+ pr_debug("Device disconnected\n");
+ driver->data->new_state = EVT_IDLE;
+ schedule_delayed_work(&driver->conn_work, PHY_WQ_DELAY);
+ }
+
+ return NOTIFY_DONE;
+}
+
+static int drd_host_notify(struct notifier_block *self,
+ unsigned long event, void *ptr)
+{
+ struct ns2_phy_driver *driver = container_of(self,
+ struct ns2_phy_driver, host_nb);
+
+ if (event) {
+ pr_debug("Host connected\n");
+ driver->data->new_state = EVT_HOST;
+ schedule_delayed_work(&driver->conn_work, 0);
+ } else {
+ pr_debug("Host disconnected\n");
+ driver->data->new_state = EVT_IDLE;
+ schedule_delayed_work(&driver->conn_work, PHY_WQ_DELAY);
+ }
+
+ return NOTIFY_DONE;
+}
+
+static void extcon_work(struct work_struct *work)
+{
+ struct ns2_phy_driver *driver;
+ int vbus;
+ int id;
+
+ driver = container_of(to_delayed_work(work),
+ struct ns2_phy_driver, wq_extcon);
+
+ id = gpiod_get_value_cansleep(driver->id_gpiod);
+ vbus = gpiod_get_value_cansleep(driver->vbus_gpiod);
+
+ if (!id && vbus) {
+ extcon_set_cable_state_(driver->edev, EXTCON_USB_HOST, true);
+ } else if (id && !vbus) {
+ extcon_set_cable_state_(driver->edev, EXTCON_USB_HOST, false);
+ extcon_set_cable_state_(driver->edev, EXTCON_USB, false);
+ } else if (id && vbus) {
+ extcon_set_cable_state_(driver->edev, EXTCON_USB, true);
+ }
+}
+
+static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
+{
+ struct ns2_phy_driver *driver = dev_id;
+
+ queue_delayed_work(system_power_efficient_wq, &driver->wq_extcon,
+ driver->debounce_jiffies);
+
+ return IRQ_HANDLED;
+}
+
+static int register_extcon_notifier(struct ns2_phy_driver *phy_driver,
+ struct device *dev)
+{
+ struct extcon_dev *edev;
+ int ret;
+
+ phy_driver->host_nb.notifier_call = drd_host_notify;
+ phy_driver->dev_nb.notifier_call = drd_device_notify;
+
+ edev = phy_driver->edev;
+
+ /* Register for device change notification */
+ ret = extcon_register_notifier(edev, EXTCON_USB,
+ &phy_driver->dev_nb);
+ if (ret < 0) {
+ dev_err(dev, "can't register extcon_dev\n");
+ return ret;
+ }
+
+ /* Register for host change notification */
+ ret = extcon_register_notifier(edev, EXTCON_USB_HOST,
+ &phy_driver->host_nb);
+ if (ret < 0) {
+ dev_err(dev, "can't register extcon_dev\n");
+ goto err_dev;
+ }
+
+ /* Check the device cable connect state */
+ ret = extcon_get_cable_state_(edev, EXTCON_USB);
+ if (ret < 0) {
+ dev_err(dev, "can't get extcon_dev state\n");
+ goto err_host;
+ } else if (ret) {
+ phy_driver->data->new_state = EVT_DEVICE;
+ }
+
+ /* Check the host cable connect state */
+ ret = extcon_get_cable_state_(edev, EXTCON_USB_HOST);
+ if (ret < 0) {
+ dev_err(dev, "can't get extcon_dev state\n");
+ goto err_host;
+ } else if (ret) {
+ phy_driver->data->new_state = EVT_HOST;
+ }
+
+ return 0;
+
+err_host:
+ ret = extcon_unregister_notifier(edev, EXTCON_USB_HOST,
+ &phy_driver->host_nb);
+err_dev:
+ ret = extcon_unregister_notifier(edev, EXTCON_USB,
+ &phy_driver->dev_nb);
+ return ret;
+}
+
+static struct phy_ops ops = {
+ .init = ns2_drd_phy_init,
+ .power_on = ns2_drd_phy_poweron,
+ .power_off = ns2_drd_phy_shutdown,
+ .owner = THIS_MODULE,
+};
+
+static const struct of_device_id ns2_drd_phy_dt_ids[] = {
+ { .compatible = "brcm,ns2-drd-phy", },
+ { }
+};
+
+static int ns2_drd_phy_remove(struct platform_device *pdev)
+{
+ struct ns2_phy_driver *driver = dev_get_drvdata(&pdev->dev);
+
+ if (driver->edev) {
+ extcon_unregister_notifier(driver->edev, EXTCON_USB_HOST,
+ &driver->host_nb);
+ extcon_unregister_notifier(driver->edev, EXTCON_USB,
+ &driver->dev_nb);
+ }
+
+ return 0;
+}
+static int ns2_drd_phy_probe(struct platform_device *pdev)
+{
+ struct phy_provider *phy_provider;
+ struct device *dev = &pdev->dev;
+ struct ns2_phy_driver *driver;
+ struct ns2_phy_data *data;
+ struct resource *res;
+ int ret;
+ u32 val;
+
+ driver = devm_kzalloc(dev, sizeof(struct ns2_phy_driver),
+ GFP_KERNEL);
+ if (!driver)
+ return -ENOMEM;
+
+ driver->data = devm_kzalloc(dev, sizeof(struct ns2_phy_data),
+ GFP_KERNEL);
+ if (!driver->data)
+ return -ENOMEM;
+
+ spin_lock_init(&driver->lock);
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "icfg");
+ driver->icfgdrd_regs = devm_ioremap_resource(dev, res);
+ if (IS_ERR(driver->icfgdrd_regs))
+ return PTR_ERR(driver->icfgdrd_regs);
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rst-ctrl");
+ driver->idmdrd_rst_ctrl = devm_ioremap_resource(dev, res);
+ if (IS_ERR(driver->idmdrd_rst_ctrl))
+ return PTR_ERR(driver->idmdrd_rst_ctrl);
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "crmu-ctrl");
+ driver->crmu_usb2_ctrl = devm_ioremap_resource(dev, res);
+ if (IS_ERR(driver->crmu_usb2_ctrl))
+ return PTR_ERR(driver->crmu_usb2_ctrl);
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "usb2-strap");
+ driver->usb2h_strap_reg = devm_ioremap_resource(dev, res);
+ if (IS_ERR(driver->usb2h_strap_reg))
+ return PTR_ERR(driver->usb2h_strap_reg);
+
+ /* create extcon */
+ driver->id_gpiod = devm_gpiod_get(&pdev->dev, "id", GPIOD_IN);
+ if (IS_ERR(driver->id_gpiod)) {
+ dev_err(dev, "failed to get ID GPIO\n");
+ return PTR_ERR(driver->id_gpiod);
+ }
+ driver->vbus_gpiod = devm_gpiod_get(&pdev->dev, "vbus", GPIOD_IN);
+ if (IS_ERR(driver->vbus_gpiod)) {
+ dev_err(dev, "failed to get VBUS GPIO\n");
+ return PTR_ERR(driver->vbus_gpiod);
+ }
+
+ driver->edev = devm_extcon_dev_allocate(dev, usb_extcon_cable);
+ if (IS_ERR(driver->edev)) {
+ dev_err(dev, "failed to allocate extcon device\n");
+ return -ENOMEM;
+ }
+
+ ret = devm_extcon_dev_register(dev, driver->edev);
+ if (ret < 0) {
+ dev_err(dev, "failed to register extcon device\n");
+ goto extcon_free;
+ }
+
+ ret = gpiod_set_debounce(driver->id_gpiod, GPIO_DELAY * 1000);
+ if (ret < 0)
+ driver->debounce_jiffies = msecs_to_jiffies(GPIO_DELAY);
+
+ INIT_DELAYED_WORK(&driver->wq_extcon, extcon_work);
+
+ driver->id_irq = gpiod_to_irq(driver->id_gpiod);
+ if (driver->id_irq < 0) {
+ dev_err(dev, "failed to get ID IRQ\n");
+ ret = driver->id_irq;
+ goto extcon_unregister;
+ }
+ driver->vbus_irq = gpiod_to_irq(driver->vbus_gpiod);
+ if (driver->vbus_irq < 0) {
+ dev_err(dev, "failed to get ID IRQ\n");
+ ret = driver->vbus_irq;
+ goto extcon_unregister;
+ }
+
+ ret = devm_request_threaded_irq(dev, driver->id_irq, NULL,
+ gpio_irq_handler,
+ IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+ "usb_id", driver);
+ if (ret < 0) {
+ dev_err(dev, "failed to request handler for ID IRQ\n");
+ goto extcon_unregister;
+ }
+ ret = devm_request_threaded_irq(dev, driver->vbus_irq, NULL,
+ gpio_irq_handler,
+ IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
+ "usb_vbus", driver);
+ if (ret < 0) {
+ dev_err(dev, "failed to request handler for VBUS IRQ\n");
+ goto extcon_unregister;
+ }
+
+ dev_set_drvdata(dev, driver);
+
+ /* Shutdown all ports. They can be powered up as required */
+ val = readl(driver->crmu_usb2_ctrl);
+ val &= ~(AFE_CORERDY_VDDC | PHY_RESETB);
+ writel(val, driver->crmu_usb2_ctrl);
+
+ data = driver->data;
+ data->phy = devm_phy_create(dev, dev->of_node, &ops);
+ if (IS_ERR(data->phy)) {
+ dev_err(dev, "Failed to create usb drd phy\n");
+ ret = PTR_ERR(data->phy);
+ goto extcon_unregister;
+ }
+
+ data->driver = driver;
+ phy_set_drvdata(data->phy, data);
+
+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+ if (IS_ERR(phy_provider)) {
+ dev_err(dev, "Failed to register as phy provider\n");
+ ret = PTR_ERR(phy_provider);
+ goto extcon_unregister;
+ }
+
+ INIT_DELAYED_WORK(&driver->conn_work, connect_work);
+ platform_set_drvdata(pdev, driver);
+
+ ret = register_extcon_notifier(driver, dev);
+ if (ret < 0) {
+ dev_err(dev, "register extcon notifier failed (%d)\n", ret);
+ goto extcon_unregister;
+ }
+ dev_info(dev, "Registered extcon device\n");
+ queue_delayed_work(system_power_efficient_wq, &driver->wq_extcon,
+ driver->debounce_jiffies);
+
+ return 0;
+
+extcon_unregister:
+ devm_extcon_dev_unregister(dev, driver->edev);
+extcon_free:
+ devm_extcon_dev_free(dev, driver->edev);
+ return ret;
+}
+
+MODULE_DEVICE_TABLE(of, ns2_drd_phy_dt_ids);
+
+static struct platform_driver ns2_drd_phy_driver = {
+ .probe = ns2_drd_phy_probe,
+ .remove = ns2_drd_phy_remove,
+ .driver = {
+ .name = "bcm-ns2-usbphy",
+ .of_match_table = of_match_ptr(ns2_drd_phy_dt_ids),
+ },
+};
+module_platform_driver(ns2_drd_phy_driver);
+
+MODULE_ALIAS("platform:bcm-ns2-drd-phy");
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("Broadcom NS2 USB2 PHY driver");
+MODULE_LICENSE("GPL v2");
--
2.1.0
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^ permalink raw reply related
* [PATCH v5 3/3] DT nodes for Broadcom Northstar2 USB DRD Phy
From: Raviteja Garimella @ 2017-04-12 7:12 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kishon Vijay Abraham I, Ray Jui,
Scott Branden, Jon Mason, Catalin Marinas, Will Deacon
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <1491981125-6859-1-git-send-email-raviteja.garimella-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
This patch adds device tree nodes for USB Dual Role Device Phy for
Broadcom's Northstar2 SoC.
Signed-off-by: Raviteja Garimella <raviteja.garimella-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
arch/arm64/boot/dts/broadcom/ns2.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index bcb03fc..c71f330 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -436,6 +436,20 @@
};
};
+ usbdrd_phy: phy@66000960 {
+ #phy-cells = <0>;
+ compatible = "brcm,ns2-drd-phy";
+ reg = <0x66000960 0x24>,
+ <0x67012800 0x4>,
+ <0x6501d148 0x4>,
+ <0x664d0700 0x4>;
+ reg-names = "icfg", "rst-ctrl",
+ "crmu-ctrl", "usb2-strap";
+ id-gpios = <&gpio_g 30 0>;
+ vbus-gpios = <&gpio_g 31 0>;
+ status = "disabled";
+ };
+
pwm: pwm@66010000 {
compatible = "brcm,iproc-pwm";
reg = <0x66010000 0x28>;
--
2.1.0
--
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^ permalink raw reply related
* Re: [PATCH v3 01/20] net: stmmac: export stmmac_set_mac_addr/stmmac_get_mac_addr
From: Corentin Labbe @ 2017-04-12 7:42 UTC (permalink / raw)
To: Giuseppe CAVALLARO
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, alexandre.torgue-qxv4g6HH51o,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <9514c077-1738-ea49-ca18-fbc46bac6144-qxv4g6HH51o@public.gmane.org>
On Mon, Apr 03, 2017 at 02:39:03PM +0200, Giuseppe CAVALLARO wrote:
> Hello Alex
>
> do you can check if this has to be done for ST platforms?
> I do not remember that it was necessary when build as module so
> I cannot expect this should be only for dwmac-sun8i.
>
> Regards
> peppe
>
dwmac-sun8i is simply the first "user" of stmmac_[sg]et_mac_addr outside of stmmac-objs
Regards
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^ permalink raw reply
* Re: [PATCH v2 1/3] mfd: max8998: Remove CONFIG_OF around max8998_dt_match
From: Lee Jones @ 2017-04-12 7:59 UTC (permalink / raw)
To: Florian Fainelli
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, andrew-g2DYL2Zd6BY,
vivien.didelot-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/, Nicolas Ferre,
Rob Herring, Frank Rowand, open list:NETWORKING DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE
In-Reply-To: <20170412044156.17351-2-f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Tue, 11 Apr 2017, Florian Fainelli wrote:
> A subsequent patch is going to make of_match_node() an inline stub when
> CONFIG_OF is disabled which will properly take care of having the compiler
> eliminate the variable. To avoid more #ifdef/#else, just always make the match
> table available.
>
> Signed-off-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> drivers/mfd/max8998.c | 2 --
> 1 file changed, 2 deletions(-)
If it works, great!
For my own reference:
Acked-for-MFD-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> diff --git a/drivers/mfd/max8998.c b/drivers/mfd/max8998.c
> index 4c33b8063bc3..372f681ec1bb 100644
> --- a/drivers/mfd/max8998.c
> +++ b/drivers/mfd/max8998.c
> @@ -129,14 +129,12 @@ int max8998_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask)
> }
> EXPORT_SYMBOL(max8998_update_reg);
>
> -#ifdef CONFIG_OF
> static const struct of_device_id max8998_dt_match[] = {
> { .compatible = "maxim,max8998", .data = (void *)TYPE_MAX8998 },
> { .compatible = "national,lp3974", .data = (void *)TYPE_LP3974 },
> { .compatible = "ti,lp3974", .data = (void *)TYPE_LP3974 },
> {},
> };
> -#endif
>
> /*
> * Only the common platform data elements for max8998 are parsed here from the
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply
* Re: [PATCH V2] clk: hi6220: Add the hi655x's pmic clock
From: Lee Jones @ 2017-04-12 8:00 UTC (permalink / raw)
To: Daniel Lezcano
Cc: sboyd, mturquette, xuwei5, devicetree, linux-kernel,
linux-arm-kernel, linux-clk
In-Reply-To: <20170411211936.GT2078@mai>
On Tue, 11 Apr 2017, Daniel Lezcano wrote:
> On Tue, Apr 11, 2017 at 03:06:13PM +0100, Lee Jones wrote:
> > On Sat, 08 Apr 2017, Daniel Lezcano wrote:
> >
> > > The hi655x multi function device is a PMIC providing regulators.
> > >
> > > The PMIC also provides a clock for the WiFi and the Bluetooth, let's implement
> > > this clock in order to add it in the hi655x MFD and allow proper wireless
> > > initialization.
> > >
> > > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
> > > ---
> > >
> > > Changelog:
> > >
> > > V2:
> > > - Added COMPILE_TEST option, compiled on x86
> > > - Removed useless parenthesis
> > > - Used of_clk_hw_simple_get() instead of deref dance
> > > - Do bailout if the clock-names is not specified
> > > - Rollback on error
> > > - Folded mfd line change and binding
> >
> > Why did you do that?
>
> I thought as the V1 had comments you would have waited for the V2 and as it was
> trivial enough, it could be folded and picked up via the clk tree via with your
> acked-by.
It's *always* a good idea to keep patches subsystem orthogonal if
at all possible.
> I realize it was not a good idea.
>
> Do you want to drop it from your tree or shall I resubmit a V3 without the mfd
> change?
The latter please.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply
* Re: [linux-sunxi] Re: [PATCH v2 03/11] dt-bindings: add device tree binding for X-Powers AXP803 PMIC
From: Lee Jones @ 2017-04-12 8:06 UTC (permalink / raw)
To: Icenowy Zheng
Cc: linux-arm-kernel, linux-sunxi, Rob Herring, linux-kernel,
Liam Girdwood, devicetree, Maxime Ripard, Chen-Yu Tsai
In-Reply-To: <20170411180844.9176B125521-Y9/x5g2N/Tt0ykcd9G8QkxTxI0vvWBSX@public.gmane.org>
On Wed, 12 Apr 2017, Icenowy Zheng wrote:
>
> 2017年4月12日 上午12:29于 Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>写道：
> >
> > On Tue, 11 Apr 2017, Chen-Yu Tsai wrote:
> >
> > > Hi,
> > >
> > > On Tue, Apr 11, 2017 at 11:00 PM, Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org> wrote:
> > > >
> > > >
> > > > On Tue, 11 Apr 2017, Lee Jones wrote:
> > > >
> > > >> On Sat, 08 Apr 2017, Icenowy Zheng wrote:
> > > >>
> > > >>> AXP803 is a PMIC produced by Shenzhen X-Powers, with either I2C or RSB
> > > >>> bus.
> > > >>>
> > > >>> Add a compatible for it.
> > > >>>
> > > >>> Signed-off-by: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
> > > >>> Acked-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> > > >>> ---
> > > >>> Changes in v2:
> > > >>> - Place AXP803 before AXP806/809.
> > > >>> - Added Chen-Yu's ACK.
> > > >>>
> > > >>> Documentation/devicetree/bindings/mfd/axp20x.txt | 5 +++--
> > > >>> 1 file changed, 3 insertions(+), 2 deletions(-)
> > > >>
> > > >>
> > > >> For my own reference:
> > > >> Acked-for-MFD-by: Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > > >
> > > >
> > > > Excuse me... Who will apply this patch?
> >
> > Excuse you? Are you trying to be polite, or rude?
> >
> > I'm guessing due to the lagging '...', that it's the latter?
>
> Oh sorry, I mean the former...
Okay, no problem then.
> > > > I think this patch should be applied by you as it's in bindings/mfd
> > > > directory, however, if I'm wrong, please point out ;-)
> > >
> > > We need the DT maintainers to ack it first. :)
> >
> > We don't really need the DT Maintainers to get involved here.
> >
> > What I do need is either clear direction as to how this
> > patch-set should be applied, or an indication of which patches are
> > dependant on others and which are orthogonal and can be applied
> > independently.
>
> This patch is independent, although the regulator binding patch
> depends on it.
>
> The real driver patches will need the binding patches to be merged
> first.
Right, so Acking and not applying wasn't such a strange practice
after all then. =;-)
> And the dt patches depend on also the binding patches.
The issue I have now is; because your email client replies as a new
mail i.e. non-threaded, now I have no reference to the patch-set.
Since time is a valuable resource, I will not be dredging though my
inbox looking for all your replies.
Please fix your client before replying to another mail.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply
* Re: [PATCH v2 1/5] dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
From: Guillaume Tucker @ 2017-04-12 8:25 UTC (permalink / raw)
To: Heiko Stübner
Cc: Neil Armstrong, Rob Herring, Mark Rutland, devicetree,
Sjoerd Simons, Wookey, linux-kernel, linux-rockchip, John Reitan,
Enric Balletbo i Serra, linux-arm-kernel
In-Reply-To: <8676554.1IW2xieEGM@diego>
Hi Heiko,
On 11/04/17 21:52, Heiko Stübner wrote:
> Hi Guillaume,
>
> Am Dienstag, 11. April 2017, 18:40:37 CEST schrieb Guillaume Tucker:
>> On 03/04/17 09:12, Neil Armstrong wrote:
>>> On 04/02/2017 09:59 AM, Guillaume Tucker wrote:
>>>> +Optional:
>>>> +
>>>> +- clocks : Phandle to clock for the Mali Midgard device.
>>>> +- clock-names : Shall be "clk_mali".
>>>> +- mali-supply : Phandle to regulator for the Mali device. Refer to
>>>> + Documentation/devicetree/bindings/regulator/regulator.txt for details.
>>>> +- operating-points : Refer to
>>>> Documentation/devicetree/bindings/power/opp.txt + for details.
>>>
>>> Please add :
>>> * Must be one of the following:
>>> "arm,mali-t820"
>>>
>>> * And, optionally, one of the vendor specific compatible:
>>> "amlogic,meson-gxm-mali"
>>>
>>> with my Ack for the amlogic platform.
>>
>> It seems to me that as long as the GPU architecture hasn't been
>> modified (I don't think I've ever encountered such a case) then
>> it has to be a standard ARM Mali type regardless of the SoC
>> vendor. So unless a Mali-T820 in the Amlogic S912 SoC is not the
>> same as a T820 in a different SoC, please forgive me but I don't
>> understand why a vendor compatible string is needed. My main
>> concern is that it's going to be very hard to keep that list
>> up-to-date with all existing Midgard SoC variants. If do we need
>> to add vendor compatible strings to correctly describe the
>> hardware then I'm happy to add the amlogic one in my patch v3; I
>> would just like to understand why that's necessary.
>
> SoC vendors in most cases hook ip blocks into their socs in different
> and often strange ways. After all it's not some discrete ic you solder
> onto a board, but instead a part of the soc itself.
Thanks for your explanation. I see, it's really about special
things that are not supported by the standard Midgard kernel
driver.
> So in most cases you will have some hooks outside the actual gpu iospace
> that can be used to tune different things about how the gpu interacts with
> the system. Which is probably also the reason the midgard kernel driver
> has this ugly "platform" subdirectory for compile-time platform selection.
I see the "platform" directory approach as an old and deprecated
way of supporting platforms, upstreaming the dt bindings goes in
the direction of using solely the device tree to describe the GPU
hardware (i.e. CONFIG_MALI_PLATFORM_DEVICETREE). If something
quirky is needed in the platform, it should be possible to
support it outside the GPU driver (platform devfreq etc...).
Back to the original intent of enabling distros to make Mali GPU
driver packages, when using the device tree you can have a single
kernel driver package for all Midgard platforms. When using the
third-party platform sources approach, you need to make an extra
package for each one of them.
So if there is value in supporting platforms that absolutely
require something special due to their hardware GPU integration,
then yes I see why vendor dt bindings might be useful. However
it seems to me that this should really be an exception and
avoided whenever possible.
> On my rk3288 for example we have [0] in the chromeos tree, that handles
> the oddities of the midgard on the rk3288 used in a lot of Chromebooks.
> There are soc-specific oddities of frequencies, frequency-scaling and
> whatnot. And there are also more gpu-specific setting in syscon areas
> of the soc (pmu and grf) that can also influence the gpus performance
> and might need tweaking at some point.
For the rk3288, this is purely a software implementation issue on
the chromeos-3.14 branch. With mainline kernel, you can use
devfreq and no platform files at all (that's how I tested these
dt bindings). So as far as I know, there's no need for a vendor
compatible string on rk3288.
> That doesn't even take into account that there may even be differences
> on how things are synthesized that we don't know about. See all the
> variants of the dw_hdmi ip block (imx, rockchip, meson [more?]) .
I'm not too familiar with that driver, just had a quick look and
it seems to be a different issue as there's a kernel config for
each platform to build separate driver modules. And it looks
like they are actually needed to cope with variants of the
hardware inside the display processor block, unlike with the Mali
GPU which in principle should always be the same. I've run this
Midgard driver without any platform files and using devfreq at
least on rk3288 Firefly, Exynos 5422 ODROID-XU3 and Juno and they
all have a vanilla Mali GPU hw block. It's just wired
differently in each SoC.
> So we really want to have the special compatibles in place, to be prepared
> for the future per-soc oddities that always appear :-) .
How about aiming for the ideal case where vendor-specific things
are not needed and add them if and when they really become
inevitable and worth the cost?
Thanks,
Guillaume
> [0] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.14/drivers/gpu/arm/midgard/platform/rk/
^ permalink raw reply
* Re: [PATCH v5 2/2] i2c: mux: ltc4306: LTC4306 and LTC4305 I2C multiplexer/switch
From: Linus Walleij @ 2017-04-12 8:26 UTC (permalink / raw)
To: Michael Hennerich
Cc: Wolfram Sang, Peter Rosin, Rob Herring, Mark Rutland,
linux-i2c@vger.kernel.org, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <1491912976-8396-2-git-send-email-michael.hennerich@analog.com>
On Tue, Apr 11, 2017 at 2:16 PM, <michael.hennerich@analog.com> wrote:
> From: Michael Hennerich <michael.hennerich@analog.com>
>
> This patch adds support for the Analog Devices / Linear Technology
> LTC4306 and LTC4305 4/2 Channel I2C Bus Multiplexer/Switches.
> The LTC4306 optionally provides two general purpose input/output pins
> (GPIOs) that can be configured as logic inputs, opendrain outputs or
> push-pull outputs via the generic GPIOLIB framework.
>
> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
(...)
> Changes since v4:
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Please go ahead and merge to the i2c tree if you like.
Yours,
Linus Walleij
^ permalink raw reply
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