* Re: [PATCH v3 1/5] clk: sunxi-ng: Add sun4i/sun7i CCU driver
From: Maxime Ripard @ 2017-05-01 16:02 UTC (permalink / raw)
To: Priit Laes
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-clk-u79uwXL29TY76Z2rM5mHXA, Philipp Zabel, Russell King,
Chen-Yu Tsai, Mark Rutland, Rob Herring, Stephen Boyd,
Michael Turquette, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <528b9b3895e654b6d3cf95187433f9fb7b4eb50c.1493235134.git-series.plaes-q/aMd4JkU83YtjvyW6yDsg@public.gmane.org>
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Hi Priit,
Almost good, thanks!
On Wed, Apr 26, 2017 at 10:32:21PM +0300, Priit Laes wrote:
> +/* TODO: GPS CLK 0x0d0 */
You should still create a define in the header for this one.
> +/* Following only exist on sun7i-a20 */
> +#define CLK_MBUS 165
> +#define CLK_HDMI1_SLOW 166
> +#define CLK_HDMI1 167
> +#define CLK_OUT_A 168
> +#define CLK_OUT_B 169
Wouldn't it be better to simply create a new A20-only header that
would include the A10's and add the A20 specific clocks on top?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply
* Re: [PATCH v5 00/20] net-next: stmmac: add dwmac-sun8i ethernet driver
From: Corentin Labbe @ 2017-05-01 15:58 UTC (permalink / raw)
To: Andrew Lunn
Cc: Chen-Yu Tsai, Rob Herring, Mark Rutland, Maxime Ripard,
Russell King, Catalin Marinas, Will Deacon, Giuseppe Cavallaro,
alexandre.torgue, devicetree, linux-kernel, linux-arm-kernel,
netdev
In-Reply-To: <20170501144541.GB1285@lunn.ch>
On Mon, May 01, 2017 at 04:45:41PM +0200, Andrew Lunn wrote:
> On Mon, May 01, 2017 at 10:28:46PM +0800, Chen-Yu Tsai wrote:
> > On Mon, May 1, 2017 at 10:01 PM, Andrew Lunn <andrew@lunn.ch> wrote:
> > > On Mon, May 01, 2017 at 02:45:00PM +0200, Corentin Labbe wrote:
> > >> Hello
> > >>
> > >> This patch series add the driver for dwmac-sun8i which handle the Ethernet MAC
> > >> present on Allwinner H3/H5/A83T/A64 SoCs.
> > >>
> > >> This driver is the continuation of the sun8i-emac driver.
> > >> During the development, it appeared that in fact the hardware was a modified
> > >> version of some dwmac.
> > >> So the driver is now written as a glue driver for stmmac.
> > >>
> > >> It supports 10/100/1000 Mbit/s speed with half/full duplex.
> > >> It can use an internal PHY (MII 10/100) or an external PHY
> > >> via RGMII/RMII.
> > >
> > > Hi Corentin
> > >
> > > Sorry if this has been asked before....
> > >
> > > Does the internal PHY have a phy driver? It seems like
> > > tx-delay-ps/rx-delay-ps are properties of this internal PHY, and so
> > > should be in the phy driver, if it has one.
> >
> > Nope. These affect the delay lines for the external PHY interface.
I will add some sentences in the documentation to be more clear about that.
>
> Oh, yes. I understood the patch wrong.
>
> None of the patches actually use these properties. Are they actually
> needed? We should avoid adding vendor specific properties, if they are
> not used.
>
The board that use it is the BananaPi M3, but the SoC A83T still lack clocks support.
So theses properties is already used out of tree, and will be used in tree soon.
Regards
^ permalink raw reply
* Re: [PATCH 1/3] ARM: dts: rockchip: Move cros-ec-sbs to rk3288-veyron-chromebook-sbs
From: Doug Anderson @ 2017-05-01 15:49 UTC (permalink / raw)
To: Heiko Stuebner
Cc: Paul Kocialkowski, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
open list:ARM/Rockchip SoC...,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring,
Mark Rutland, Russell King
In-Reply-To: <2337202.q9Cdx8Nyxy@phil>
Hi,
On Mon, May 1, 2017 at 7:07 AM, Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org> wrote:
> Am Sonntag, 30. April 2017, 22:56:52 CEST schrieb Paul Kocialkowski:
>> Le dimanche 30 avril 2017 à 22:37 +0200, Heiko Stuebner a écrit :
>> > Hi Paul,
>> >
>> > Am Sonntag, 30. April 2017, 20:30:52 CEST schrieb Paul Kocialkowski:
>> > > This moves the cros-ec-sbs dtsi to a new rk3288-veyron-chromebook-sbs
>> > > dtsi since it only concerns rk3288 veyron Chromebooks.
>> > >
>> > > Other Chromebooks (such as the tegra124 nyans) also have sbs batteries
>> > > and don't use this dtsi, that only makes sense when used with
>> > > rk3288-veyron-chromebook anyway.
>> >
>> > That isn't true. The gru series (rk3399-based) also uses the
>> > sbs-battery [0]. And while it is currently limited to Rockchip-based
>> > Chromebooks it is nevertheless used on more than one platform, so
>> > the probability is high that it will be used in future series as well.
>>
>> That's good to know, but as pointed out, other cros devices are using a sbs
>> battery without this header, so such a generic name isn't really a good fit.
It would be interesting to know if the "retry-count" ought to be the
same across all Chromebooks. I guess you could argue that maybe
someone found it needed to be 10 in all "nyan" variants and needed to
be 1 in all "veyron" variants, but it seems more likely that the
difference is arbitrary, or that one of the two values would work for
everyone. It sure looks like we've just been copying values from
device to device. Given that all the "veyron" devices have vastly
different batteries (and probably all the nyan ones too), it seems
likely there ought to be one value.
In terms of setting the "charger", that also could potentially be
something that could be for all Chromebooks, or at least older ones
that don't have their charger implemented by the type C driver. ...or
nyan devices could simply have a line in their dts like:
&battery {
power-supplies = <&charger>;
};
>> Note that &charger has to be defined (after my subsequent patches), which it is
>> for devices that also include rk3288-veyron-chromebook, but not necessarily
>> others.
>>
>> Overall, I think having one -sbs dtsi file makes sense here because there is
>> already a rk3288-veyron-chromebook dtsi that veyron chromebooks use. That file
>> cannot contain the battery bindings because minnie has a different one and it
>> would be a bit silly to copy it over all devices. That definitely makes sense.
>>
>> As for other devices, I don't see why we should have a separate include file for
>> the battery instead of having it in the device's dts. I think this should be the
>> case on gru/kevin.
>>
>> Also maybe not *all* gru-based devices will turn out to use a SBS battery, so it
>> seems early to include this header in the gru dtsi.
For gru devices, we've moved to a "virtual sbs battery" provided by
the EC. I'm not 100% positive that everything will just magically
work and be converted in the EC if we put a non-sbs battery on a board
with this EC feature, but I would hope we'd convert everything
properly.
>> One last point, gru/kevin
>> currently don't define a charger, which will break my subsequent patch (that is
>> however needed for the veyrons that use this file).
Arguably this should be fixed. On veyron-chromebook we just use
"gpio-charger". We didn't add a special charger driver w/ a property
like "ti,external-control" since the only piece of information that
Linux really needed from the charger was whether or not AC was
connected.
>> To me, it seems that there's little advantage and major drawbacks in keeping
>> this file the way it is.
>
> I don't have any set opinion right now but after looking through the
> other uses of the sbs-battery the cros-ec-sbs.dtsi snippet really seems
> somewhat veyron/gru-specific - especially wrt. the retry-count values.
>
> What I'm not sure about is whether it is actually better to keep the include
> around under a new name or just move the (rather tiny) sbs-battery node
> into the relevant devicetrees directly, when there aren't that many users
> anyway.
I'm fine with whatever you guys choose to do here. It's nice not to
have copied "code", but with device tree sometimes copies are cleaner
than trying to share something.
-Doug
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^ permalink raw reply
* Re: [PATCH v2] power: tps65217_charger: Add properties like voltage and current charge
From: Sebastian Reichel @ 2017-05-01 15:41 UTC (permalink / raw)
To: Enric Balletbo i Serra
Cc: Rob Herring, Mark Rutland, linux-pm-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170421155032.22784-1-enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
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Hi Enric,
On Fri, Apr 21, 2017 at 05:50:32PM +0200, Enric Balletbo i Serra wrote:
> Allow the possibility to configure the charge and the current voltage of
> the charger and also the NTC type for battery temperature measurement.
>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
> ---
> Changes since v1:
> - Requested by Rob Herring
> - Rename ti,charge-* to charge-* to be standard properties.
> - Use unit suffixes as per bindings/property-units.txt
> ---
> .../bindings/power/supply/tps65217_charger.txt | 15 ++
> drivers/power/supply/tps65217_charger.c | 187 +++++++++++++++++++--
> include/linux/mfd/tps65217.h | 2 +
> 3 files changed, 192 insertions(+), 12 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt b/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt
> index a11072c..4415618 100644
> --- a/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt
> +++ b/Documentation/devicetree/bindings/power/supply/tps65217_charger.txt
> @@ -6,6 +6,18 @@ Required Properties:
> Should be <0> for the USB charger and <1> for the AC adapter.
> -interrupt-names: Should be "USB" and "AC"
>
> +Optional properties:
> +-charge-voltage-microvolt: set the charge voltage. The value can be: 4100000,
> + 4150000, 4200000, 4250000; default: 4100000
> +
> +-charge-current-microamp: set the charging current. The value can be: 300000,
> + 400000, 500000, 700000; default: 500000
These two are battery specific. Please use newly introduced
"simple-battery" instead. See
https://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply.git/commit/?h=for-next&id=ecc931a585b3b2567da772233215f59b56fb42f9
https://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply.git/commit/?h=for-next&id=fb38342a5ae6e4f438256e98e4c29a7916195125
> +-ti,ntc-type: set the NTC type for battery temperature measurement. The value
> + must be 0 or 1, where:
> + 0 – 100k (curve 1, B = 3960)
> + 1 – 10k (curve 2, B = 3480) (default)
> +
This looks fine. Might make sense to move this into its own patch.
> This node is a subnode of the tps65217 PMIC.
>
> Example:
> @@ -14,4 +26,7 @@ Example:
> compatible = "ti,tps65217-charger";
> interrupts = <0>, <1>;
> interrupt-names = "USB", "AC";
> + charge-voltage-microvolt = <4100000>;
> + charge-current-microamp = <500000>;
> + ti,ntc-type = <1>;
> };
> diff --git a/drivers/power/supply/tps65217_charger.c b/drivers/power/supply/tps65217_charger.c
> index 1f52340..087f29c 100644
> --- a/drivers/power/supply/tps65217_charger.c
> +++ b/drivers/power/supply/tps65217_charger.c
> @@ -39,6 +39,12 @@
> #define NUM_CHARGER_IRQS 2
> #define POLL_INTERVAL (HZ * 2)
>
> +struct tps65217_charger_platform_data {
> + u32 charge_current_uamp;
> + u32 charge_voltage_uvolt;
> + int ntc_type;
> +};
> +
> struct tps65217_charger {
> struct tps65217 *tps;
> struct device *dev;
> @@ -48,16 +54,82 @@ struct tps65217_charger {
> int prev_online;
>
> struct task_struct *poll_task;
> + struct tps65217_charger_platform_data *pdata;
> };
>
> static enum power_supply_property tps65217_charger_props[] = {
> POWER_SUPPLY_PROP_ONLINE,
> };
>
> -static int tps65217_config_charger(struct tps65217_charger *charger)
> +static int tps65217_set_charge_current(struct tps65217_charger *charger,
> + unsigned int uamp)
> +{
> + int ret, val;
> +
> + dev_dbg(charger->dev, "setting charge current to %d uA\n", uamp);
> +
> + if (uamp == 300000)
> + val = 0x00;
> + else if (uamp == 400000)
> + val = 0x01;
> + else if (uamp == 500000)
> + val = 0x02;
> + else if (uamp == 700000)
> + val = 0x03;
> + else
> + return -EINVAL;
> +
> + ret = tps65217_set_bits(charger->tps, TPS65217_REG_CHGCONFIG3,
> + TPS65217_CHGCONFIG3_ICHRG_MASK,
> + val << TPS65217_CHGCONFIG3_ICHRG_SHIFT,
> + TPS65217_PROTECT_NONE);
> + if (ret) {
> + dev_err(charger->dev,
> + "failed to set ICHRG setting to 0x%02x (err: %d)\n",
> + val, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int tps65217_set_charge_voltage(struct tps65217_charger *charger,
> + unsigned int uvolt)
> +{
> + int ret, val;
> +
> + dev_dbg(charger->dev, "setting charge voltage to %d uV\n", uvolt);
> +
> + if (uvolt != 4100000 && uvolt != 4150000 &&
> + uvolt != 4200000 && uvolt != 4250000)
> + return -EINVAL;
> +
> + val = (uvolt - 4100000) / 50000;
> +
> + ret = tps65217_set_bits(charger->tps, TPS65217_REG_CHGCONFIG2,
> + TPS65217_CHGCONFIG2_VOREG_MASK,
> + val << TPS65217_CHGCONFIG2_VOREG_SHIFT,
> + TPS65217_PROTECT_NONE);
> + if (ret) {
> + dev_err(charger->dev,
> + "failed to set VOCHG setting to 0x%02x (err: %d)\n",
> + val, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static int tps65217_set_ntc_type(struct tps65217_charger *charger,
> + unsigned int ntc)
> {
> int ret;
>
> + dev_dbg(charger->dev, "setting NTC type to %d\n", ntc);
> +
> + if (ntc != 0 && ntc != 1)
> + return -EINVAL;
> +
> /*
> * tps65217 rev. G, p. 31 (see p. 32 for NTC schematic)
> *
> @@ -74,14 +146,57 @@ static int tps65217_config_charger(struct tps65217_charger *charger)
> * NTC TYPE (for battery temperature measurement)
> * 0 – 100k (curve 1, B = 3960)
> * 1 – 10k (curve 2, B = 3480) (default on reset)
> - *
> */
> - ret = tps65217_clear_bits(charger->tps, TPS65217_REG_CHGCONFIG1,
> - TPS65217_CHGCONFIG1_NTC_TYPE,
> - TPS65217_PROTECT_NONE);
> + if (ntc) {
> + ret = tps65217_set_bits(charger->tps, TPS65217_REG_CHGCONFIG1,
> + TPS65217_CHGCONFIG1_NTC_TYPE,
> + TPS65217_CHGCONFIG1_NTC_TYPE,
> + TPS65217_PROTECT_NONE);
> + if (ret) {
> + dev_err(charger->dev,
> + "failed to set NTC type to 10K: %d\n", ret);
> + return ret;
> + }
> + } else {
> + ret = tps65217_clear_bits(charger->tps, TPS65217_REG_CHGCONFIG1,
> + TPS65217_CHGCONFIG1_NTC_TYPE,
> + TPS65217_PROTECT_NONE);
> + if (ret) {
> + dev_err(charger->dev,
> + "failed to set NTC type to 100K: %d\n", ret);
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static int tps65217_config_charger(struct tps65217_charger *charger)
> +{
> + int ret;
> + struct tps65217_charger_platform_data *pdata = charger->pdata;
> +
> + if (!charger->pdata)
> + return -EINVAL;
> +
> + ret = tps65217_set_charge_voltage(charger, pdata->charge_voltage_uvolt);
> if (ret) {
> dev_err(charger->dev,
> - "failed to set 100k NTC setting: %d\n", ret);
> + "failed to set charge voltage setting: %d\n", ret);
> + return ret;
> + }
> +
> + ret = tps65217_set_charge_current(charger, pdata->charge_current_uamp);
> + if (ret) {
> + dev_err(charger->dev,
> + "failed to set charge current setting: %d\n", ret);
> + return ret;
> + }
> +
> + ret = tps65217_set_ntc_type(charger, pdata->ntc_type);
> + if (ret) {
> + dev_err(charger->dev,
> + "failed to set NTC type setting: %d\n", ret);
> return ret;
> }
>
> @@ -185,6 +300,48 @@ static int tps65217_charger_poll_task(void *data)
> return 0;
> }
>
> +#ifdef CONFIG_OF
> +static struct tps65217_charger_platform_data *tps65217_charger_pdata_init(
> + struct platform_device *pdev)
> +{
> + struct tps65217_charger_platform_data *pdata;
> + struct device_node *np = pdev->dev.of_node;
> + int ret;
> +
> + if (!np) {
> + dev_err(&pdev->dev, "No charger OF node\n");
> + return ERR_PTR(-EINVAL);
> + }
> +
> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
> + if (!pdata)
> + return ERR_PTR(-ENOMEM);
> +
> + ret = of_property_read_u32(np, "charge-voltage-microvolt",
> + &pdata->charge_voltage_uvolt);
> + if (ret)
> + pdata->charge_voltage_uvolt = 4100000;
> +
> + ret = of_property_read_u32(np, "charge-current-microamp",
> + &pdata->charge_current_uamp);
> + if (ret)
> + pdata->charge_current_uamp = 500000;
struct power_supply_battery_info info = {};
power_supply_get_battery_info(tps65217, &info);
The simple-battery framework does not yet provide charge
current/voltage, so you will need to add that first. Please
Cc Liam on that patch.
> + ret = of_property_read_u32(np, "ti,ntc-type",
> + &pdata->ntc_type);
> + if (ret)
> + pdata->ntc_type = 1; /* 10k (curve 2, B = 3480) */
Please use device_property_read_u32(dev, ...) instead.
> +
> + return pdata;
> +}
> +#else /* CONFIG_OF */
> +static struct tps65217_charger_platform_data *tps65217_charger_pdata_init(
> + struct platform_device *pdev)
> +{
> + return NULL;
> +}
> +#endif /* CONFIG_OF */
> +
> static const struct power_supply_desc tps65217_charger_desc = {
> .name = "tps65217-charger",
> .type = POWER_SUPPLY_TYPE_MAINS,
> @@ -214,6 +371,18 @@ static int tps65217_charger_probe(struct platform_device *pdev)
> cfg.of_node = pdev->dev.of_node;
> cfg.drv_data = charger;
>
> + charger->pdata = tps65217_charger_pdata_init(pdev);
> + if (IS_ERR(charger->pdata)) {
> + dev_err(charger->dev, "failed: getting platform data\n");
> + return PTR_ERR(charger->pdata);
> + }
> +
> + ret = tps65217_config_charger(charger);
> + if (ret < 0) {
> + dev_err(charger->dev, "charger config failed, err %d\n", ret);
> + return ret;
> + }
> +
> charger->psy = devm_power_supply_register(&pdev->dev,
> &tps65217_charger_desc,
> &cfg);
> @@ -225,12 +394,6 @@ static int tps65217_charger_probe(struct platform_device *pdev)
> irq[0] = platform_get_irq_byname(pdev, "USB");
> irq[1] = platform_get_irq_byname(pdev, "AC");
>
> - ret = tps65217_config_charger(charger);
> - if (ret < 0) {
> - dev_err(charger->dev, "charger config failed, err %d\n", ret);
> - return ret;
> - }
> -
> /* Create a polling thread if an interrupt is invalid */
> if (irq[0] < 0 || irq[1] < 0) {
> poll_task = kthread_run(tps65217_charger_poll_task,
> diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h
> index eac2857..d040062 100644
> --- a/include/linux/mfd/tps65217.h
> +++ b/include/linux/mfd/tps65217.h
> @@ -103,8 +103,10 @@
> #define TPS65217_CHGCONFIG2_DYNTMR BIT(7)
> #define TPS65217_CHGCONFIG2_VPREGHG BIT(6)
> #define TPS65217_CHGCONFIG2_VOREG_MASK 0x30
> +#define TPS65217_CHGCONFIG2_VOREG_SHIFT 4
>
> #define TPS65217_CHGCONFIG3_ICHRG_MASK 0xC0
> +#define TPS65217_CHGCONFIG3_ICHRG_SHIFT 6
> #define TPS65217_CHGCONFIG3_DPPMTH_MASK 0x30
> #define TPS65217_CHGCONFIG2_PCHRGT BIT(3)
> #define TPS65217_CHGCONFIG2_TERMIF 0x06
-- Sebastian
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^ permalink raw reply
* Re: [PATCH v3 1/2] net: dsa: b53: Add compatible strings for the Cygnus-family BCM11360.
From: Eric Anholt @ 2017-05-01 15:15 UTC (permalink / raw)
To: David Miller
Cc: mark.rutland, andrew, f.fainelli, sbranden, vivien.didelot,
jonmason, netdev, linux-kernel, devicetree, robh+dt,
bcm-kernel-feedback-list, rjui, linux-arm-kernel
In-Reply-To: <20170430.224852.172293736555378453.davem@davemloft.net>
[-- Attachment #1.1: Type: text/plain, Size: 850 bytes --]
David Miller <davem@davemloft.net> writes:
> From: Eric Anholt <eric@anholt.net>
> Date: Fri, 28 Apr 2017 15:22:03 -0700
>
>> Cygnus is a small family of SoCs, of which we currently have
>> devicetree for BCM11360 and BCM58300. The 11360's B53 is mostly the
>> same as 58xx, just requiring a tiny bit of setup that was previously
>> missing.
>>
>> v2: Reorder the entry in the docs (suggestion by Scott Branden), add
>> missing '"'
>>
>> Signed-off-by: Eric Anholt <eric@anholt.net>
>> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>
> The second patch with the DTS file update doesn't apply cleanly
> at all to net-next.
>
> So I'm dropping this series.
DTS updates go through arm-soc branches through Florian. The first
patch is the one I would like you to apply.
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
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^ permalink raw reply
* Re: [PATCH v11 03/10] devicetree: power: bq27xxx: Add monitored-battery documentation
From: Sebastian Reichel @ 2017-05-01 15:10 UTC (permalink / raw)
To: Liam Breck
Cc: Andrew F. Davis, linux-pm, Matt Ranostay, Rob Herring, devicetree,
Liam Breck
In-Reply-To: <20170320094335.19224-4-liam@networkimprov.net>
[-- Attachment #1: Type: text/plain, Size: 1516 bytes --]
Hi,
On Mon, Mar 20, 2017 at 02:43:28AM -0700, Liam Breck wrote:
> From: Liam Breck <kernel@networkimprov.net>
>
> Document monitored-battery = <&battery_node>
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Matt Ranostay <matt@ranostay.consulting>
> Signed-off-by: Liam Breck <kernel@networkimprov.net>
> Acked-by: Rob Herring <robh@kernel.org>
> Acked-by: Sebastian Reichel <sre@kernel.org>
> ---
> Documentation/devicetree/bindings/power/supply/bq27xxx.txt | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/power/supply/bq27xxx.txt b/Documentation/devicetree/bindings/power/supply/bq27xxx.txt
> index b0c95ef..cf83371 100644
> --- a/Documentation/devicetree/bindings/power/supply/bq27xxx.txt
> +++ b/Documentation/devicetree/bindings/power/supply/bq27xxx.txt
> @@ -28,9 +28,18 @@ Required properties:
> * "ti,bq27621" - BQ27621
> - reg: integer, i2c address of the device.
>
> +Optional properties:
> +- monitored-battery: phandle of battery information devicetree node
> +
> + See Documentation/devicetree/bindings/power/supply/battery.txt
> + If either of the referenced battery's *-full-design-*-hours properties are set,
> + then both must be.
> +
> Example:
>
> -bq27510g3 {
> +bq27510g3 : fuel-gauge@55 {
> compatible = "ti,bq27510g3";
> reg = <0x55>;
> +
> + monitored-battery = <&bat>;
> };
Thanks, queued.
-- Sebastian
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^ permalink raw reply
* Re: [PATCH v11 01/10] devicetree: power: Add battery.txt
From: Sebastian Reichel @ 2017-05-01 15:09 UTC (permalink / raw)
To: Liam Breck
Cc: Andrew F. Davis, linux-pm-u79uwXL29TY76Z2rM5mHXA, Matt Ranostay,
Rob Herring, devicetree-u79uwXL29TY76Z2rM5mHXA, Liam Breck
In-Reply-To: <20170320094335.19224-2-liam-RYWXG+zxWwBdeoIcmNTgJF6hYfS7NtTn@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 2240 bytes --]
Hi,
On Mon, Mar 20, 2017 at 02:43:26AM -0700, Liam Breck wrote:
> From: Liam Breck <kernel-RYWXG+zxWwBdeoIcmNTgJF6hYfS7NtTn@public.gmane.org>
>
> Documentation of static battery characteristics that can be defined
> for batteries which cannot self-identify. This information is required
> by fuel-gauge and charger chips for proper handling of the battery.
>
> Cc: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Matt Ranostay <matt-sk+viVC6FLCDq+mSdOJa79kegs52MxvZ@public.gmane.org>
> Signed-off-by: Liam Breck <kernel-RYWXG+zxWwBdeoIcmNTgJF6hYfS7NtTn@public.gmane.org>
> ---
> .../devicetree/bindings/power/supply/battery.txt | 43 ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/power/supply/battery.txt
>
> diff --git a/Documentation/devicetree/bindings/power/supply/battery.txt b/Documentation/devicetree/bindings/power/supply/battery.txt
> new file mode 100644
> index 0000000..53a68c0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/supply/battery.txt
> @@ -0,0 +1,43 @@
> +Battery Characteristics
> +
> +The devicetree battery node provides static battery characteristics.
> +In smart batteries, these are typically stored in non-volatile memory
> +on a fuel gauge chip. The battery node should be used where there is
> +no appropriate non-volatile memory, or it is unprogrammed/incorrect.
> +
> +Required Properties:
> + - compatible: Must be "simple-battery"
> +
> +Optional Properties:
> + - voltage-min-design-microvolt: drained battery voltage
> + - energy-full-design-microwatt-hours: battery design energy
> + - charge-full-design-microamp-hours: battery design capacity
> +
> +Battery properties are named, where possible, for the corresponding
> +elements in enum power_supply_property, defined in
> +https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/power_supply.h#n86
Since Rob did not reply, I queued this with this paragraph removed
and whitespace errors fixed to speed up things. You can always try
persuading Rob in an incremental patch ;)
-- Sebastian
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^ permalink raw reply
* Re: [PATCH v11 02/10] devicetree: property-units: Add uWh and uAh units
From: Sebastian Reichel @ 2017-05-01 15:06 UTC (permalink / raw)
To: Liam Breck
Cc: Andrew F. Davis, linux-pm, Matt Ranostay, Rob Herring,
Mark Rutland, devicetree, linux-kernel, Liam Breck
In-Reply-To: <20170320094335.19224-3-liam@networkimprov.net>
[-- Attachment #1: Type: text/plain, Size: 1257 bytes --]
Hi,
On Mon, Mar 20, 2017 at 02:43:27AM -0700, Liam Breck wrote:
> From: Matt Ranostay <matt@ranostay.consulting>
>
> Add entries for microwatt-hours and microamp-hours.
>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Matt Ranostay <matt@ranostay.consulting>
> Signed-off-by: Liam Breck <kernel@networkimprov.net>
> Acked-by: Sebastian Reichel <sre@kernel.org>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> Documentation/devicetree/bindings/property-units.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/property-units.txt b/Documentation/devicetree/bindings/property-units.txt
> index 12278d7..0849618 100644
> --- a/Documentation/devicetree/bindings/property-units.txt
> +++ b/Documentation/devicetree/bindings/property-units.txt
> @@ -25,8 +25,10 @@ Distance
> Electricity
> ----------------------------------------
> -microamp : micro amps
> +-microamp-hours : micro amp-hours
> -ohms : Ohms
> -micro-ohms : micro Ohms
> +-microwatt-hours: micro Watt-hours
> -microvolt : micro volts
>
> Temperature
Thanks, queued.
-- Sebastian
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^ permalink raw reply
* Re: [PATCH v5 00/20] net-next: stmmac: add dwmac-sun8i ethernet driver
From: Andrew Lunn @ 2017-05-01 14:45 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Corentin Labbe, Rob Herring, Mark Rutland, Maxime Ripard,
Russell King, Catalin Marinas, Will Deacon, Giuseppe Cavallaro,
alexandre.torgue-qxv4g6HH51o, devicetree, linux-kernel,
linux-arm-kernel, netdev
In-Reply-To: <CAGb2v67qGqswdz_JcDaD5jTkcvtBuzqqP8KZh=S_5pkp=o6cUQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Mon, May 01, 2017 at 10:28:46PM +0800, Chen-Yu Tsai wrote:
> On Mon, May 1, 2017 at 10:01 PM, Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> wrote:
> > On Mon, May 01, 2017 at 02:45:00PM +0200, Corentin Labbe wrote:
> >> Hello
> >>
> >> This patch series add the driver for dwmac-sun8i which handle the Ethernet MAC
> >> present on Allwinner H3/H5/A83T/A64 SoCs.
> >>
> >> This driver is the continuation of the sun8i-emac driver.
> >> During the development, it appeared that in fact the hardware was a modified
> >> version of some dwmac.
> >> So the driver is now written as a glue driver for stmmac.
> >>
> >> It supports 10/100/1000 Mbit/s speed with half/full duplex.
> >> It can use an internal PHY (MII 10/100) or an external PHY
> >> via RGMII/RMII.
> >
> > Hi Corentin
> >
> > Sorry if this has been asked before....
> >
> > Does the internal PHY have a phy driver? It seems like
> > tx-delay-ps/rx-delay-ps are properties of this internal PHY, and so
> > should be in the phy driver, if it has one.
>
> Nope. These affect the delay lines for the external PHY interface.
Oh, yes. I understood the patch wrong.
None of the patches actually use these properties. Are they actually
needed? We should avoid adding vendor specific properties, if they are
not used.
Andrew
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^ permalink raw reply
* Re: [PATCH v5 00/20] net-next: stmmac: add dwmac-sun8i ethernet driver
From: Chen-Yu Tsai @ 2017-05-01 14:28 UTC (permalink / raw)
To: Andrew Lunn
Cc: Corentin Labbe, Rob Herring, Mark Rutland, Maxime Ripard,
Chen-Yu Tsai, Russell King, Catalin Marinas, Will Deacon,
Giuseppe Cavallaro, alexandre.torgue, devicetree, linux-kernel,
linux-arm-kernel, netdev
In-Reply-To: <20170501140133.GD31281@lunn.ch>
On Mon, May 1, 2017 at 10:01 PM, Andrew Lunn <andrew@lunn.ch> wrote:
> On Mon, May 01, 2017 at 02:45:00PM +0200, Corentin Labbe wrote:
>> Hello
>>
>> This patch series add the driver for dwmac-sun8i which handle the Ethernet MAC
>> present on Allwinner H3/H5/A83T/A64 SoCs.
>>
>> This driver is the continuation of the sun8i-emac driver.
>> During the development, it appeared that in fact the hardware was a modified
>> version of some dwmac.
>> So the driver is now written as a glue driver for stmmac.
>>
>> It supports 10/100/1000 Mbit/s speed with half/full duplex.
>> It can use an internal PHY (MII 10/100) or an external PHY
>> via RGMII/RMII.
>
> Hi Corentin
>
> Sorry if this has been asked before....
>
> Does the internal PHY have a phy driver? It seems like
> tx-delay-ps/rx-delay-ps are properties of this internal PHY, and so
> should be in the phy driver, if it has one.
Nope. These affect the delay lines for the external PHY interface.
These have existed since the A20, when the GMAC hardware block and
glue layer controls were introduced.
ChenYu
^ permalink raw reply
* Re: [PATCH 1/3] ARM: dts: rockchip: Move cros-ec-sbs to rk3288-veyron-chromebook-sbs
From: Heiko Stuebner @ 2017-05-01 14:07 UTC (permalink / raw)
To: Paul Kocialkowski, briannorris-F7+t8E8rja9g9hUCZPvPmw,
Doug Anderson
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Mark Rutland,
Russell King
In-Reply-To: <1493585812.6493.4.camel-W9ppeneeCTY@public.gmane.org>
Am Sonntag, 30. April 2017, 22:56:52 CEST schrieb Paul Kocialkowski:
> Le dimanche 30 avril 2017 à 22:37 +0200, Heiko Stuebner a écrit :
> > Hi Paul,
> >
> > Am Sonntag, 30. April 2017, 20:30:52 CEST schrieb Paul Kocialkowski:
> > > This moves the cros-ec-sbs dtsi to a new rk3288-veyron-chromebook-sbs
> > > dtsi since it only concerns rk3288 veyron Chromebooks.
> > >
> > > Other Chromebooks (such as the tegra124 nyans) also have sbs batteries
> > > and don't use this dtsi, that only makes sense when used with
> > > rk3288-veyron-chromebook anyway.
> >
> > That isn't true. The gru series (rk3399-based) also uses the
> > sbs-battery [0]. And while it is currently limited to Rockchip-based
> > Chromebooks it is nevertheless used on more than one platform, so
> > the probability is high that it will be used in future series as well.
>
> That's good to know, but as pointed out, other cros devices are using a sbs
> battery without this header, so such a generic name isn't really a good fit.
>
> Note that &charger has to be defined (after my subsequent patches), which it is
> for devices that also include rk3288-veyron-chromebook, but not necessarily
> others.
>
> Overall, I think having one -sbs dtsi file makes sense here because there is
> already a rk3288-veyron-chromebook dtsi that veyron chromebooks use. That file
> cannot contain the battery bindings because minnie has a different one and it
> would be a bit silly to copy it over all devices. That definitely makes sense.
>
> As for other devices, I don't see why we should have a separate include file for
> the battery instead of having it in the device's dts. I think this should be the
> case on gru/kevin.
>
> Also maybe not *all* gru-based devices will turn out to use a SBS battery, so it
> seems early to include this header in the gru dtsi. One last point, gru/kevin
> currently don't define a charger, which will break my subsequent patch (that is
> however needed for the veyrons that use this file).
>
> To me, it seems that there's little advantage and major drawbacks in keeping
> this file the way it is.
I don't have any set opinion right now but after looking through the
other uses of the sbs-battery the cros-ec-sbs.dtsi snippet really seems
somewhat veyron/gru-specific - especially wrt. the retry-count values.
What I'm not sure about is whether it is actually better to keep the include
around under a new name or just move the (rather tiny) sbs-battery node
into the relevant devicetrees directly, when there aren't that many users
anyway.
Heiko
>
> > Also, it might be nice to also include some Chromeos people (there should
> > be some in the git logs, like Brian who submitted the Gru patches), as they
> > might be able to provide more detailed input.
>
> That's a good point, thanks for including them.
>
> >
> > Heiko
> >
> > [0] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/a
> > rch/arm64/boot/dts/rockchip/rk3399-gru.dtsi#n886
> >
> > >
> > > Signed-off-by: Paul Kocialkowski <contact-W9ppeneeCTY@public.gmane.org>
> > > ---
> > > .../boot/dts/{cros-ec-sbs.dtsi => rk3288-veyron-chromebook-sbs.dtsi} | 0
> > > arch/arm/boot/dts/rk3288-veyron-jaq.dts | 2
> > > +-
> > > arch/arm/boot/dts/rk3288-veyron-jerry.dts | 2
> > > +-
> > > arch/arm/boot/dts/rk3288-veyron-pinky.dts | 2
> > > +-
> > > arch/arm/boot/dts/rk3288-veyron-speedy.dts | 2
> > > +-
> > > 5 files changed, 4 insertions(+), 4 deletions(-)
> > > rename arch/arm/boot/dts/{cros-ec-sbs.dtsi => rk3288-veyron-chromebook-
> > > sbs.dtsi} (100%)
> > >
> > > diff --git a/arch/arm/boot/dts/cros-ec-sbs.dtsi b/arch/arm/boot/dts/rk3288-
> > > veyron-chromebook-sbs.dtsi
> > > similarity index 100%
> > > rename from arch/arm/boot/dts/cros-ec-sbs.dtsi
> > > rename to arch/arm/boot/dts/rk3288-veyron-chromebook-sbs.dtsi
> > > diff --git a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> > > b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> > > index d33f5763c39c..f217a978e47a 100644
> > > --- a/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> > > +++ b/arch/arm/boot/dts/rk3288-veyron-jaq.dts
> > > @@ -45,7 +45,7 @@
> > > /dts-v1/;
> > >
> > > #include "rk3288-veyron-chromebook.dtsi"
> > > -#include "cros-ec-sbs.dtsi"
> > > +#include "rk3288-veyron-chromebook-sbs.dtsi"
> > >
> > > / {
> > > model = "Google Jaq";
> > > diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
> > > b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
> > > index cdea751f2a8c..bec607574165 100644
> > > --- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
> > > +++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
> > > @@ -44,7 +44,7 @@
> > >
> > > /dts-v1/;
> > > #include "rk3288-veyron-chromebook.dtsi"
> > > -#include "cros-ec-sbs.dtsi"
> > > +#include "rk3288-veyron-chromebook-sbs.dtsi"
> > >
> > > / {
> > > model = "Google Jerry";
> > > diff --git a/arch/arm/boot/dts/rk3288-veyron-pinky.dts
> > > b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
> > > index 995cff42fa43..c81ad5bf1121 100644
> > > --- a/arch/arm/boot/dts/rk3288-veyron-pinky.dts
> > > +++ b/arch/arm/boot/dts/rk3288-veyron-pinky.dts
> > > @@ -44,7 +44,7 @@
> > >
> > > /dts-v1/;
> > > #include "rk3288-veyron-chromebook.dtsi"
> > > -#include "cros-ec-sbs.dtsi"
> > > +#include "rk3288-veyron-chromebook-sbs.dtsi"
> > >
> > > / {
> > > model = "Google Pinky";
> > > diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
> > > b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
> > > index cc0b78cefe34..8aea9c3ff6e2 100644
> > > --- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
> > > +++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
> > > @@ -44,7 +44,7 @@
> > >
> > > /dts-v1/;
> > > #include "rk3288-veyron-chromebook.dtsi"
> > > -#include "cros-ec-sbs.dtsi"
> > > +#include "rk3288-veyron-chromebook-sbs.dtsi"
> > >
> > > / {
> > > model = "Google Speedy";
> > >
> >
> >
>
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^ permalink raw reply
* Re: [PATCH v5 00/20] net-next: stmmac: add dwmac-sun8i ethernet driver
From: Andrew Lunn @ 2017-05-01 14:01 UTC (permalink / raw)
To: Corentin Labbe
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, peppe.cavallaro-qxv4g6HH51o,
alexandre.torgue-qxv4g6HH51o, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Mon, May 01, 2017 at 02:45:00PM +0200, Corentin Labbe wrote:
> Hello
>
> This patch series add the driver for dwmac-sun8i which handle the Ethernet MAC
> present on Allwinner H3/H5/A83T/A64 SoCs.
>
> This driver is the continuation of the sun8i-emac driver.
> During the development, it appeared that in fact the hardware was a modified
> version of some dwmac.
> So the driver is now written as a glue driver for stmmac.
>
> It supports 10/100/1000 Mbit/s speed with half/full duplex.
> It can use an internal PHY (MII 10/100) or an external PHY
> via RGMII/RMII.
Hi Corentin
Sorry if this has been asked before....
Does the internal PHY have a phy driver? It seems like
tx-delay-ps/rx-delay-ps are properties of this internal PHY, and so
should be in the phy driver, if it has one.
Andrew
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^ permalink raw reply
* Re: [PATCH v5 9/9] power: supply: sbs-manager: Add alert callback and battery change notification
From: Sebastian Reichel @ 2017-05-01 13:50 UTC (permalink / raw)
To: Phil Reid
Cc: wsa-z923LK4zBo2bacvFa/9K2g, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, peda-koto5C5qi+TLoDKTGw+V6w,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-pm-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1493628599-30552-10-git-send-email-preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 7217 bytes --]
Hi,
On Mon, May 01, 2017 at 04:49:59PM +0800, Phil Reid wrote:
> This adds smb alert support via the smbus_alert driver to generate
> power_supply_changed notifications when either external power is
> removed / applied or a battery inserted / removed.
> Use the i2c alert callback to notify the attached battery driver that a
> change has occurred.
>
> Signed-off-by: Phil Reid <preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
> ---
> drivers/power/supply/Kconfig | 1 +
> drivers/power/supply/sbs-manager.c | 129 ++++++++++++++++++++++++++++++++++++-
> 2 files changed, 127 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
> index 8aa5324..a25359c 100644
> --- a/drivers/power/supply/Kconfig
> +++ b/drivers/power/supply/Kconfig
> @@ -536,6 +536,7 @@ config AXP20X_POWER
> config MANAGER_SBS
> tristate "Smart Battery System Manager"
> depends on I2C && I2C_MUX
> + select I2C_SMBUS
I guess we also need to depend on GPIO stuff?
> help
> Say Y here to include support for Smart Battery System Manager
> ICs. The driver reports online and charging status via sysfs.
> diff --git a/drivers/power/supply/sbs-manager.c b/drivers/power/supply/sbs-manager.c
> index adf9e41..d7f7a92 100644
> --- a/drivers/power/supply/sbs-manager.c
> +++ b/drivers/power/supply/sbs-manager.c
> @@ -19,6 +19,7 @@
> #include <linux/module.h>
> #include <linux/i2c.h>
> #include <linux/i2c-mux.h>
> +#include <linux/gpio.h>
> #include <linux/power_supply.h>
>
> #define SBSM_MAX_BATS 4
> @@ -30,14 +31,22 @@
> #define SBSM_CMD_BATSYSINFO 0x04
> #define SBSM_CMD_LTC 0x3c
>
> +#define SBSM_BIT_AC_PRESENT BIT(0)
> +
> struct sbsm_data {
> struct i2c_client *client;
> struct i2c_mux_core *muxc;
>
> struct power_supply *psy;
>
> + struct gpio_chip chip;
> +
> int cur_chan; /* currently selected channel */
> bool is_ltc1760; /* special capabilities */
> +
> + unsigned int supported_bats;
> + unsigned int last_state;
> + unsigned int last_state_cont;
> };
>
> static enum power_supply_property sbsm_props[] = {
> @@ -184,6 +193,116 @@ static int sbsm_select(struct i2c_mux_core *muxc, u32 chan)
> return ret;
> }
>
> +static int sbsm_gpio_get_value(struct gpio_chip *gc, unsigned off)
> +{
> + struct sbsm_data *data = gpiochip_get_data(gc);
> + int ret;
> +
> + ret = sbsm_read_word(data->client, SBSM_CMD_BATSYSSTATE);
> + if (ret < 0)
> + return ret;
> +
> + return ret & BIT(off);
> +}
> +
> +/*
> + * This needs to be defined or the GPIO lib fails to register the pin.
> + * But the 'gpio' is always an input.
> + */
> +static int sbsm_gpio_direction_input(struct gpio_chip *gc, unsigned off)
> +{
> + return 0;
> +}
> +
> +static int sbsm_do_alert(struct device *dev, void *d)
> +{
> + struct i2c_client *client = i2c_verify_client(dev);
> + struct i2c_driver *driver;
> +
> + if (!client || client->addr != 0x0b)
> + return 0;
> +
> + device_lock(dev);
> + if (client->dev.driver) {
> + driver = to_i2c_driver(client->dev.driver);
> + if (driver->alert)
> + driver->alert(client, I2C_PROTOCOL_SMBUS_ALERT, 0);
> + else
> + dev_warn(&client->dev, "no driver alert()!\n");
> + } else
> + dev_dbg(&client->dev, "alert with no driver\n");
> + device_unlock(dev);
> +
> + return -EBUSY;
> +}
> +
> +static void sbsm_alert(struct i2c_client *client, enum i2c_alert_protocol prot,
> + unsigned int d)
> +{
> + struct sbsm_data *sbsm = i2c_get_clientdata(client);
> +
> + int ret, i, irq_bat = 0;
> +
> + ret = sbsm_read_word(sbsm->client, SBSM_CMD_BATSYSSTATE);
> + if (ret >= 0)
> + irq_bat = ret ^ sbsm->last_state;
> + sbsm->last_state = ret;
> +
> + ret = sbsm_read_word(sbsm->client, SBSM_CMD_BATSYSSTATECONT);
> + if ((ret >= 0) &&
> + ((ret ^ sbsm->last_state_cont) & SBSM_BIT_AC_PRESENT)) {
> + irq_bat |= sbsm->supported_bats;
> + power_supply_changed(sbsm->psy);
> + }
> + sbsm->last_state_cont = ret;
> +
> + for (i = 0; i < SBSM_MAX_BATS; i++) {
> + if (irq_bat & BIT(i)) {
> + device_for_each_child(&sbsm->muxc->adapter[i]->dev,
> + NULL, sbsm_do_alert);
> + }
> + }
> +}
> +
> +static int sbsm_gpio_setup(struct sbsm_data *data)
> +{
> + struct gpio_chip *gc = &data->chip;
> + struct i2c_client *client = data->client;
> + struct device *dev = &client->dev;
> + struct device_node *of_node = client->dev.of_node;
> + int ret;
> +
> + if (!of_get_property(of_node, "gpio-controller", NULL))
> + return 0;
#include <linux/property.h>
if (!device_property_present(dev, "gpio-controller"))
return 0;
(and remove of_node from this function)
> + ret = sbsm_read_word(client, SBSM_CMD_BATSYSSTATE);
> + if (ret < 0)
> + return ret;
> + data->last_state = ret;
> +
> + ret = sbsm_read_word(client, SBSM_CMD_BATSYSSTATECONT);
> + if (ret < 0)
> + return ret;
> + data->last_state_cont = ret;
> +
> + gc->get = sbsm_gpio_get_value;
> + gc->direction_input = sbsm_gpio_direction_input;
> + gc->can_sleep = true;
> + gc->base = -1;
> + gc->ngpio = SBSM_MAX_BATS;
> + gc->label = client->name;
> + gc->parent = dev;
> + gc->owner = THIS_MODULE;
> +
> + ret = devm_gpiochip_add_data(dev, gc, data);
> + if (ret) {
> + dev_err(dev, "devm_gpiochip_add_data failed: %d\n", ret);
> + return ret;
> + }
> +
> + return ret;
> +}
> +
> #if defined(CONFIG_OF)
>
> #include <linux/of_device.h>
> @@ -214,7 +333,7 @@ static int sbsm_probe(struct i2c_client *client,
> struct device *dev = &client->dev;
> struct power_supply_desc *psy_desc;
> struct power_supply_config psy_cfg = {};
> - int ret = 0, i, supported_bats;
> + int ret = 0, i;
>
> /* Device listens only at address 0x0a */
> if (client->addr != 0x0a)
> @@ -235,7 +354,7 @@ static int sbsm_probe(struct i2c_client *client,
> ret = sbsm_read_word(client, SBSM_CMD_BATSYSINFO);
> if (ret < 0)
> return ret;
> - supported_bats = le16_to_cpu(ret) & 0xf;
> + data->supported_bats = le16_to_cpu(ret) & 0xf;
>
> data->muxc = i2c_mux_alloc(adapter, dev, SBSM_MAX_BATS, 0,
> I2C_MUX_LOCKED, &sbsm_select, NULL);
> @@ -248,7 +367,7 @@ static int sbsm_probe(struct i2c_client *client,
>
> /* register muxed i2c channels. One for each supported battery */
> for (i = 0; i < SBSM_MAX_BATS; ++i) {
> - if ((1 << i) & supported_bats) {
> + if ((1 << i) & data->supported_bats) {
> ret = i2c_mux_add_adapter(data->muxc, 0, i + 1, 0);
> if (ret) {
> dev_err(dev,
> @@ -273,6 +392,9 @@ static int sbsm_probe(struct i2c_client *client,
> ret = -ENOMEM;
> goto err_psy;
> }
> + ret = sbsm_gpio_setup(data);
> + if (ret < 0)
> + goto err_psy;
>
> psy_cfg.drv_data = data;
> data->psy = devm_power_supply_register(dev, psy_desc, &psy_cfg);
> @@ -316,6 +438,7 @@ static int sbsm_remove(struct i2c_client *client)
> },
> .probe = sbsm_probe,
> .remove = sbsm_remove,
> + .alert = sbsm_alert,
> .id_table = sbsm_ids
> };
> module_i2c_driver(sbsm_driver);
-- Sebastian
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH v5 03/20] dt-bindings: net: Add DT bindings documentation for Allwinner dwmac-sun8i
From: Andrew Lunn @ 2017-05-01 13:45 UTC (permalink / raw)
To: Corentin Labbe
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, peppe.cavallaro-qxv4g6HH51o,
alexandre.torgue-qxv4g6HH51o, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
netdev-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20170501124520.3769-4-clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Mon, May 01, 2017 at 02:45:03PM +0200, Corentin Labbe wrote:
> +emac: ethernet@1c0b000 {
> + compatible = "allwinner,sun8i-h3-emac";
> + syscon = <&syscon>;
> + reg = <0x01c0b000 0x104>;
> + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + resets = <&ccu RST_BUS_EMAC>;
> + reset-names = "stmmaceth";
> + clocks = <&ccu CLK_BUS_EMAC>;
> + clock-names = "stmmaceth";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + phy = <&int_mii_phy>;
Hi Corentin
Should this be phy-handle?
Andrew
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^ permalink raw reply
* Re: [PATCH v5 7/9] power: Adds support for Smart Battery System Manager
From: Sebastian Reichel @ 2017-05-01 13:41 UTC (permalink / raw)
To: Phil Reid
Cc: wsa-z923LK4zBo2bacvFa/9K2g, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, peda-koto5C5qi+TLoDKTGw+V6w,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-pm-u79uwXL29TY76Z2rM5mHXA, Karl-Heinz Schneider
In-Reply-To: <1493628599-30552-8-git-send-email-preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 13318 bytes --]
Hi,
On Mon, May 01, 2017 at 04:49:57PM +0800, Phil Reid wrote:
> From: Karl-Heinz Schneider <karl-heinz-X5L7DgJ4l23oE99TX8zNy7NAH6kLmebB@public.gmane.org>
>
> This patch adds support for Smart Battery System Manager.
> A SBSM is a device listening at I2C/SMBus address 0x0a and is capable of
> communicating up to four I2C smart battery devices. All smart battery
> devices are listening at address 0x0b, so the SBSM muliplexes between
> them. The driver makes use of the I2C-Mux framework to allow smart
> batteries to be bound via device tree, i.e. the sbs-battery driver.
>
> Via sysfs interface the online state and charge type are presented. If
> the driver is bound as ltc1760 (an implementation of a Dual Smart Battery
> System Manager) the charge type can also be changed from trickle to fast.
>
> Tested-by: Phil Reid <preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
> Reviewed-by: Phil Reid <preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
> Signed-off-by: Karl-Heinz Schneider <karl-heinz-X5L7DgJ4l23oE99TX8zNy7NAH6kLmebB@public.gmane.org>
> Signed-off-by: Phil Reid <preid-qgqNFa1JUf/o2iN0hyhwsIdd74u8MsAO@public.gmane.org>
> ---
> drivers/power/supply/Kconfig | 13 ++
> drivers/power/supply/Makefile | 1 +
> drivers/power/supply/sbs-manager.c | 325 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 339 insertions(+)
> create mode 100644 drivers/power/supply/sbs-manager.c
>
> diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
> index da54ac8..8aa5324 100644
> --- a/drivers/power/supply/Kconfig
> +++ b/drivers/power/supply/Kconfig
> @@ -533,4 +533,17 @@ config AXP20X_POWER
> This driver provides support for the power supply features of
> AXP20x PMIC.
>
> +config MANAGER_SBS
> + tristate "Smart Battery System Manager"
> + depends on I2C && I2C_MUX
> + help
> + Say Y here to include support for Smart Battery System Manager
> + ICs. The driver reports online and charging status via sysfs.
> + It presents itself also as I2C mux which allows to bind
> + smart battery driver to its ports.
> + Supported is for example LTC1760.
> +
> + This driver can also be built as a module. If so, the module will be
> + called sbs-manager.
> +
Let's move add this directly next to CHARGER_SBS.
> endif # POWER_SUPPLY
> diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile
> index 3789a2c..4f53c98 100644
> --- a/drivers/power/supply/Makefile
> +++ b/drivers/power/supply/Makefile
> @@ -74,3 +74,4 @@ obj-$(CONFIG_CHARGER_TPS65090) += tps65090-charger.o
> obj-$(CONFIG_CHARGER_TPS65217) += tps65217_charger.o
> obj-$(CONFIG_AXP288_FUEL_GAUGE) += axp288_fuel_gauge.o
> obj-$(CONFIG_AXP288_CHARGER) += axp288_charger.o
> +obj-$(CONFIG_MANAGER_SBS) += sbs-manager.o
same here.
> diff --git a/drivers/power/supply/sbs-manager.c b/drivers/power/supply/sbs-manager.c
> new file mode 100644
> index 0000000..adf9e41
> --- /dev/null
> +++ b/drivers/power/supply/sbs-manager.c
> @@ -0,0 +1,325 @@
> +/*
> + * Driver for SBS compliant Smart Battery System Managers
> + *
> + * The device communicates via i2c at address 0x0a and multiplexes access to up
> + * to four smart batteries at address 0x0b.
> + *
> + * Via sysfs interface the online state and charge type are presented.
> + *
> + * Datasheet SBSM: http://sbs-forum.org/specs/sbsm100b.pdf
> + * Datasheet LTC1760: http://cds.linear.com/docs/en/datasheet/1760fb.pdf
> + *
> + * Karl-Heinz Schneider <karl-heinz-X5L7DgJ4l23oE99TX8zNy7NAH6kLmebB@public.gmane.org>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/i2c.h>
> +#include <linux/i2c-mux.h>
> +#include <linux/power_supply.h>
> +
> +#define SBSM_MAX_BATS 4
> +#define SBSM_RETRY_CNT 3
> +
> +/* registers addresses */
> +#define SBSM_CMD_BATSYSSTATE 0x01
> +#define SBSM_CMD_BATSYSSTATECONT 0x02
> +#define SBSM_CMD_BATSYSINFO 0x04
> +#define SBSM_CMD_LTC 0x3c
> +
> +struct sbsm_data {
> + struct i2c_client *client;
> + struct i2c_mux_core *muxc;
> +
> + struct power_supply *psy;
> +
> + int cur_chan; /* currently selected channel */
u8?
> + bool is_ltc1760; /* special capabilities */
> +};
> +
> +static enum power_supply_property sbsm_props[] = {
> + POWER_SUPPLY_PROP_ONLINE,
> + POWER_SUPPLY_PROP_CHARGE_TYPE,
> +};
> +
> +static int sbsm_read_word(struct i2c_client *client, u8 address)
> +{
> + int reg, retries = SBSM_RETRY_CNT;
> +
> + while (retries > 0) {
> + reg = i2c_smbus_read_word_data(client, address);
> + if (reg >= 0)
> + break;
> + --retries;
> + }
for (retries = SBSM_RETRY_CNT; retries > 0; retries--)
> +
> + if (reg < 0) {
> + dev_err(&client->dev, "failed to read register %i\n",
> + (int)address);
dev_err(&client->dev, "failed to read register 0x%02x\n", address);
> + return reg;
> + }
> +
> + return le16_to_cpu(reg);
This is already done by i2c_smbus_read_word_data() and doing it
again will result in incorrect values on big endian architectures.
> +}
> +
> +static int sbsm_write_word(struct i2c_client *client, u8 address, u16 word)
> +{
> + int ret, retries = SBSM_RETRY_CNT;
> +
> + word = cpu_to_le16(word);
Same as for read_word: This is already done by the i2c-core.
> + while (retries > 0) {
> + ret = i2c_smbus_write_word_data(client, address, word);
> + if (ret >= 0)
> + break;
> + --retries;
> + }
for (retries = SBSM_RETRY_CNT; retries > 0; retries--)
> + if (ret < 0)
> + dev_err(&client->dev, "failed to write to register %i\n",
> + (int)address);
dev_err(&client->dev, "failed to read register 0x%02x\n", address);
> +
> + return ret;
> +}
> +
> +static int sbsm_get_property(struct power_supply *psy,
> + enum power_supply_property psp,
> + union power_supply_propval *val)
> +{
> + struct sbsm_data *data = power_supply_get_drvdata(psy);
> + int regval = 0;
> +
> + switch (psp) {
> + case POWER_SUPPLY_PROP_ONLINE:
> + regval = sbsm_read_word(data->client, SBSM_CMD_BATSYSSTATECONT);
> + if (regval < 0)
> + return regval;
> + val->intval = !!(regval & 0x1);
> + break;
> +
> + case POWER_SUPPLY_PROP_CHARGE_TYPE:
> + regval = sbsm_read_word(data->client, SBSM_CMD_BATSYSSTATE);
> + if (regval < 0)
> + return regval;
> +
> + if ((regval & 0x00f0) == 0) {
> + val->intval = POWER_SUPPLY_CHARGE_TYPE_NONE;
> + return 0;
> + }
> + val->intval = POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
> +
> + if (data->is_ltc1760) {
> + /* charge mode fast if turbo is active */
> + regval = sbsm_read_word(data->client, SBSM_CMD_LTC);
> + if (regval < 0)
> + return regval;
> + else if (regval & 0x80)
> + val->intval = POWER_SUPPLY_CHARGE_TYPE_FAST;
> + }
> + break;
> +
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int sbsm_prop_is_writeable(struct power_supply *psy,
> + enum power_supply_property psp)
> +{
> + struct sbsm_data *data = power_supply_get_drvdata(psy);
> +
> + return (psp == POWER_SUPPLY_PROP_CHARGE_TYPE) && data->is_ltc1760;
> +}
> +
> +static int sbsm_set_property(struct power_supply *psy,
> + enum power_supply_property psp,
> + const union power_supply_propval *val)
> +{
> + struct sbsm_data *data = power_supply_get_drvdata(psy);
> + int ret = -EINVAL;
> +
> + switch (psp) {
> + case POWER_SUPPLY_PROP_CHARGE_TYPE:
> + /* write 1 to TURBO if type fast is given */
> + if (data->is_ltc1760) {
> + u16 regval = val->intval ==
> + POWER_SUPPLY_CHARGE_TYPE_FAST ? (0x1 << 7) : 0;
> + ret = sbsm_write_word(data->client, SBSM_CMD_LTC,
> + regval);
> + }
That's not nicely indented. Try doing it this way to
reduce indention:
if (data->is_ltc1760)
break;
u16 regval = ...
> + break;
> +
> + default:
> + break;
> + }
> +
> + return ret;
> +}
> +
> +/*
> + * Switch to battery
> + * Parameter chan is directly the content of SMB_BAT* nibble
> + */
> +static int sbsm_select(struct i2c_mux_core *muxc, u32 chan)
> +{
> + struct sbsm_data *data = i2c_mux_priv(muxc);
> + int ret = 0;
> + u16 reg;
> +
> + if (data->cur_chan == chan)
> + return ret;
> +
> + /* chan goes from 1 ... 4 */
> + reg = 1 << (11 + chan);
> + ret = sbsm_write_word(data->client, SBSM_CMD_BATSYSSTATE, reg);
> + if (ret)
> + dev_err(&data->client->dev, "Failed to select channel %i\n",
> + chan);
Add
struct device *dev = &data->client->dev;
at the beginning of the function and use it here to avoid line
break.
> + else
> + data->cur_chan = chan;
> +
> + return ret;
> +}
> +
> +#if defined(CONFIG_OF)
> +
> +#include <linux/of_device.h>
Move include to top of file. You can include it unconditionally.
> +static const struct of_device_id sbsm_dt_ids[] = {
> + { .compatible = "sbs,sbs-manager" },
> + { .compatible = "lltc,ltc1760" },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, sbsm_dt_ids);
This can go next to the other MODULE_DEVICE_TABLE.
> +#endif
> +
> +static const struct power_supply_desc sbsm_default_psy_desc = {
> + .type = POWER_SUPPLY_TYPE_MAINS,
> + .properties = sbsm_props,
> + .num_properties = ARRAY_SIZE(sbsm_props),
> + .get_property = &sbsm_get_property,
> + .set_property = &sbsm_set_property,
> + .property_is_writeable = &sbsm_prop_is_writeable,
> +};
> +
> +static int sbsm_probe(struct i2c_client *client,
> + const struct i2c_device_id *id)
> +{
> + struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
> + struct sbsm_data *data;
> + struct device *dev = &client->dev;
> + struct power_supply_desc *psy_desc;
> + struct power_supply_config psy_cfg = {};
> + int ret = 0, i, supported_bats;
> +
> + /* Device listens only at address 0x0a */
> + if (client->addr != 0x0a)
> + return -ENODEV;
I guess EINVAL makes more sense?
> + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
> + return -EPFNOSUPPORT;
> +
> + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
> + if (!data)
> + return -ENOMEM;
> +
> + i2c_set_clientdata(client, data);
> +
> + data->client = client;
> + data->is_ltc1760 = !!strstr(id->name, "ltc1760");
> +
> + ret = sbsm_read_word(client, SBSM_CMD_BATSYSINFO);
> + if (ret < 0)
> + return ret;
> + supported_bats = le16_to_cpu(ret) & 0xf;
How often do you want to convert endianess? :)
Drop this.
> + data->muxc = i2c_mux_alloc(adapter, dev, SBSM_MAX_BATS, 0,
> + I2C_MUX_LOCKED, &sbsm_select, NULL);
> + if (!data->muxc) {
> + dev_err(dev, "failed to alloc i2c mux\n");
> + ret = -ENOMEM;
> + goto err_mux_alloc;
> + }
> + data->muxc->priv = data;
> +
> + /* register muxed i2c channels. One for each supported battery */
> + for (i = 0; i < SBSM_MAX_BATS; ++i) {
> + if ((1 << i) & supported_bats) {
This can be written more readable as
if (supported_bats & BIT(i))
> + ret = i2c_mux_add_adapter(data->muxc, 0, i + 1, 0);
> + if (ret) {
> + dev_err(dev,
> + "failed to register i2c mux channel %d\n",
> + i + 1);
> + goto err_mux_register;
> + }
> + }
> + }
> +
> + psy_desc = devm_kmemdup(dev, &sbsm_default_psy_desc,
> + sizeof(struct power_supply_desc),
> + GFP_KERNEL);
> + if (!psy_desc) {
> + ret = -ENOMEM;
> + goto err_psy;
> + }
> +
> + psy_desc->name = devm_kasprintf(dev, GFP_KERNEL, "sbsm-%s",
> + dev_name(&client->dev));
> + if (!psy_desc->name) {
> + ret = -ENOMEM;
> + goto err_psy;
> + }
> +
> + psy_cfg.drv_data = data;
Please add:
psy_cfg->of_node = dev->of_node;
> + data->psy = devm_power_supply_register(dev, psy_desc, &psy_cfg);
> + if (IS_ERR(data->psy)) {
> + ret = PTR_ERR(data->psy);
> + dev_err(dev, "failed to register power supply %s\n",
> + psy_desc->name);
> + goto err_psy;
> + }
> +
> + dev_info(dev, "sbsm registered\n");
> + return 0;
> +
> +err_psy:
> +err_mux_register:
> + i2c_mux_del_adapters(data->muxc);
> +
> +err_mux_alloc:
> + return ret;
> +}
> +
> +static int sbsm_remove(struct i2c_client *client)
> +{
> + struct sbsm_data *data = i2c_get_clientdata(client);
> +
> + i2c_mux_del_adapters(data->muxc);
> + return 0;
> +}
> +
> +static const struct i2c_device_id sbsm_ids[] = {
> + { "sbs-manager", 0 },
> + { "ltc1760", 0 },
> + { }
> +};
> +MODULE_DEVICE_TABLE(i2c, sbsm_ids);
> +
> +static struct i2c_driver sbsm_driver = {
> + .driver = {
> + .name = "sbsm",
> + .owner = THIS_MODULE,
Please drop .owner assignment. It will be done by i2c-core.
But you should add the following:
.of_match_table = of_match_ptr(sbsm_dt_ids),
> + },
> + .probe = sbsm_probe,
> + .remove = sbsm_remove,
> + .id_table = sbsm_ids
> +};
> +module_i2c_driver(sbsm_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Karl-Heinz Schneider <karl-heinz-X5L7DgJ4l23oE99TX8zNy7NAH6kLmebB@public.gmane.org>");
> +MODULE_DESCRIPTION("SBSM Smart Battery System Manager");
-- Sebastian
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* [PATCH v2 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support
From: Paolo Pisati @ 2017-05-01 13:15 UTC (permalink / raw)
To: Alan Tull, Rob Herring, Mark Rutland, Moritz Fischer
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-fpga-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1493644512-14776-1-git-send-email-p.pisati-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.
Signed-off-by: Paolo Pisati <p.pisati-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
drivers/fpga/Kconfig | 7 ++
drivers/fpga/Makefile | 1 +
drivers/fpga/machxo2-spi.c | 214 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 222 insertions(+)
create mode 100644 drivers/fpga/machxo2-spi.c
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index c81cb7d..cce135b 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -26,6 +26,13 @@ config FPGA_MGR_ICE40_SPI
help
FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
+config FPGA_MGR_MACHXO2_SPI
+ tristate "Lattice MachXO2 SPI"
+ depends on SPI
+ help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
config FPGA_MGR_SOCFPGA
tristate "Altera SOCFPGA FPGA Manager"
depends on ARCH_SOCFPGA || COMPILE_TEST
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index c6f5d74..cdab1fe 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_FPGA) += fpga-mgr.o
# FPGA Manager Drivers
obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 0000000..264ef63
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,214 @@
+/**
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Copyright (C) 2017 Paolo Pisati <p.pisati-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ */
+
+#include <linux/delay.h>
+#include <linux/fpga/fpga-mgr.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/spi/spi.h>
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+
+#define ISC_ENABLE 0x000008c6
+#define ISC_ERASE 0x0000040e
+#define ISC_PROGRAMDONE 0x0000005e
+#define LSC_CHECKBUSY 0x000000f0
+#define LSC_INITADDRESS 0x00000046
+#define LSC_PROGINCRNV 0x01000070
+#define LSC_REFRESH 0x00000079
+
+#define BUSYFLAG 0x80
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED 66000000
+
+#define MACHXO2_LOW_DELAY 5 /* us */
+#define MACHXO2_HIGH_DELAY 200 /* us */
+
+#define MACHXO2_OP_SIZE sizeof(u32)
+#define MACHXO2_PAGE_SIZE 16
+#define MACHXO2_BUF_SIZE (MACHXO2_OP_SIZE + MACHXO2_PAGE_SIZE)
+
+static int wait_until_not_busy(struct spi_device *spi)
+{
+ u8 rx;
+ u32 checkbusy = LSC_CHECKBUSY;
+ int ret;
+
+ do {
+ ret = spi_write_then_read(spi, &checkbusy, MACHXO2_OP_SIZE,
+ &rx, sizeof(rx));
+ if (ret)
+ return ret;
+ } while (rx & BUSYFLAG);
+
+ return 0;
+}
+
+static enum fpga_mgr_states machxo2_spi_state(struct fpga_manager *mgr)
+{
+ return FPGA_MGR_STATE_UNKNOWN;
+}
+
+static int machxo2_write_init(struct fpga_manager *mgr,
+ struct fpga_image_info *info,
+ const char *buf, size_t count)
+{
+ struct spi_device *spi = mgr->priv;
+ u32 enable = ISC_ENABLE;
+ u32 erase = ISC_ERASE;
+ u32 initaddr = LSC_INITADDRESS;
+ int ret;
+
+ if ((info->flags & FPGA_MGR_PARTIAL_RECONFIG)) {
+ dev_err(&mgr->dev,
+ "Partial reconfiguration is not supported\n");
+ return -ENOTSUPP;
+ }
+
+ ret = spi_write(spi, &enable, MACHXO2_OP_SIZE);
+ if (ret)
+ goto fail;
+
+ udelay(MACHXO2_LOW_DELAY);
+ ret = spi_write(spi, &erase, MACHXO2_OP_SIZE);
+ if (ret)
+ goto fail;
+
+ ret = wait_until_not_busy(spi);
+ if (ret)
+ goto fail;
+
+ ret = spi_write(spi, &initaddr, MACHXO2_OP_SIZE);
+ if (ret)
+ goto fail;
+
+ return 0;
+
+fail:
+ dev_err(&mgr->dev, "Error during FPGA init.\n");
+ return ret;
+}
+
+static int machxo2_write(struct fpga_manager *mgr, const char *buf,
+ size_t count)
+{
+ struct spi_device *spi = mgr->priv;
+ u32 progincr = LSC_PROGINCRNV;
+ u8 payload[MACHXO2_BUF_SIZE];
+ int i, ret;
+
+ if (count % MACHXO2_PAGE_SIZE != 0) {
+ dev_err(&mgr->dev, "Malformed payload.\n");
+ return -EINVAL;
+ }
+
+ memcpy(payload, &progincr, MACHXO2_OP_SIZE);
+ for (i = 0; i < count; i += MACHXO2_PAGE_SIZE) {
+ memcpy(&payload[MACHXO2_OP_SIZE], &buf[i], MACHXO2_PAGE_SIZE);
+ ret = spi_write(spi, payload, MACHXO2_BUF_SIZE);
+ if (ret) {
+ dev_err(&mgr->dev, "Error loading the bitstream.\n");
+ return ret;
+ }
+ udelay(MACHXO2_HIGH_DELAY);
+ }
+
+ return 0;
+}
+
+static int machxo2_write_complete(struct fpga_manager *mgr,
+ struct fpga_image_info *info)
+{
+ struct spi_device *spi = mgr->priv;
+ u32 progdone = ISC_PROGRAMDONE;
+ u32 refresh = LSC_REFRESH;
+ int ret;
+
+ ret = spi_write(spi, &progdone, MACHXO2_OP_SIZE);
+ if (ret)
+ goto fail;
+
+ udelay(MACHXO2_HIGH_DELAY);
+ /* yep, LSC_REFRESH is 3 bytes long actually */
+ ret = spi_write(spi, &refresh, MACHXO2_OP_SIZE - 1);
+ if (ret)
+ goto fail;
+
+ return 0;
+
+fail:
+ dev_err(&mgr->dev, "Refresh failed.\n");
+ return ret;
+}
+
+static const struct fpga_manager_ops machxo2_ops = {
+ .state = machxo2_spi_state,
+ .write_init = machxo2_write_init,
+ .write = machxo2_write,
+ .write_complete = machxo2_write_complete,
+};
+
+static int machxo2_spi_probe(struct spi_device *spi)
+{
+ struct device *dev = &spi->dev;
+
+ if (spi->max_speed_hz > MACHXO2_MAX_SPEED) {
+ dev_err(dev, "Speed is too high\n");
+ return -EINVAL;
+ }
+
+ return fpga_mgr_register(dev, "Lattice MachXO2 SPI FPGA Manager",
+ &machxo2_ops, spi);
+}
+
+static int machxo2_spi_remove(struct spi_device *spi)
+{
+ struct device *dev = &spi->dev;
+
+ fpga_mgr_unregister(dev);
+
+ return 0;
+}
+
+static const struct of_device_id of_match[] = {
+ { .compatible = "lattice,machxo2-slave-spi", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, of_match);
+
+static const struct spi_device_id lattice_ids[] = {
+ { "machxo2-slave-spi", 0 },
+ { },
+};
+MODULE_DEVICE_TABLE(spi, lattice_ids);
+
+static struct spi_driver machxo2_spi_driver = {
+ .driver = {
+ .name = "machxo2-slave-spi",
+ .of_match_table = of_match_ptr(of_match),
+ },
+ .probe = machxo2_spi_probe,
+ .remove = machxo2_spi_remove,
+ .id_table = lattice_ids,
+};
+
+module_spi_driver(machxo2_spi_driver)
+
+MODULE_AUTHOR("Paolo Pisati <p.pisati-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
+MODULE_DESCRIPTION("Load Lattice FPGA firmware over SPI");
+MODULE_LICENSE("GPL v2");
--
2.7.4
--
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^ permalink raw reply related
* [PATCH v2 1/2] dt: bindings: fpga: add lattice machxo2 slave spi binding description
From: Paolo Pisati @ 2017-05-01 13:15 UTC (permalink / raw)
To: Alan Tull, Rob Herring, Mark Rutland, Moritz Fischer
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-fpga-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1493644512-14776-1-git-send-email-p.pisati-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Add dt binding documentation details for Lattice MachXO2 FPGA configuration
over Slave SPI interface.
Signed-off-by: Paolo Pisati <p.pisati-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
.../bindings/fpga/lattice-machxo2-spi.txt | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
diff --git a/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
new file mode 100644
index 0000000..c3ef26bd
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
@@ -0,0 +1,29 @@
+Lattice MachXO2 Slave SPI FPGA Manager
+
+Lattice MachXO2 FPGAs support a method of loading the bitstream over
+'slave SPI' interface.
+
+See 'MachXO2ProgrammingandConfigurationUsageGuide.pdf' on www.latticesemi.com
+
+Required properties:
+- compatible: should contain "lattice,machxo2-slave-spi"
+- reg: spi chip select of the FPGA
+
+Example for full FPGA configuration:
+
+ fpga-region0 {
+ compatible = "fpga-region";
+ fpga-mgr = <&fpga_mgr_spi>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ };
+
+ spi1: spi@2000 {
+ ...
+
+ fpga_mgr_spi: fpga-mgr@0 {
+ compatible = "lattice,machxo2-slave-spi";
+ spi-max-frequency = <60000000>;
+ reg = <0>;
+ };
+ };
--
2.7.4
--
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^ permalink raw reply related
* [PATCH v2 0/2] Lattice MachXO2 Slave SPI FPGA Manager support
From: Paolo Pisati @ 2017-05-01 13:15 UTC (permalink / raw)
To: Alan Tull, Rob Herring, Mark Rutland, Moritz Fischer
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-fpga-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Hi all,
this series adds support for the Lattice MachXO2 FPGA chip, programmed
over Slave SPI.
Tested on my raspberry pi3 + bugblat's pif2 fpga hat.
Changes from v1:
* fixed all the warnings pointed out by 'checkpatch --strict' and
Alan Tull
Paolo Pisati (2):
dt: bindings: fpga: add lattice machxo2 slave spi binding description
fpga: lattice machxo2: Add Lattice MachXO2 support
.../bindings/fpga/lattice-machxo2-spi.txt | 29 +++
drivers/fpga/Kconfig | 7 +
drivers/fpga/Makefile | 1 +
drivers/fpga/machxo2-spi.c | 214 +++++++++++++++++++++
4 files changed, 251 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/lattice-machxo2-spi.txt
create mode 100644 drivers/fpga/machxo2-spi.c
--
2.7.4
--
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^ permalink raw reply
* [PATCH v5 20/20] arm64: defconfig: Enable dwmac-sun8i driver on defconfig
From: Corentin Labbe @ 2017-05-01 12:45 UTC (permalink / raw)
To: robh+dt, mark.rutland, maxime.ripard, wens, linux,
catalin.marinas, will.deacon, peppe.cavallaro, alexandre.torgue
Cc: devicetree, Corentin Labbe, linux-kernel, linux-arm-kernel,
netdev
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie@gmail.com>
Enable the dwmac-sun8i ethernet driver as a module in the ARM64 defconfig.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index ce07285..4575fbb 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -193,6 +193,7 @@ CONFIG_RAVB=y
CONFIG_SMC91X=y
CONFIG_SMSC911X=y
CONFIG_STMMAC_ETH=m
+CONFIG_DWMAC_SUN8I=m
CONFIG_REALTEK_PHY=m
CONFIG_MESON_GXL_PHY=m
CONFIG_MICREL_PHY=y
--
2.10.2
^ permalink raw reply related
* [PATCH v5 19/20] arm: multi_v7: Enable dwmac-sun8i driver on multi_v7_defconfig
From: Corentin Labbe @ 2017-05-01 12:45 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, peppe.cavallaro-qxv4g6HH51o,
alexandre.torgue-qxv4g6HH51o
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Corentin Labbe
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Enable the dwmac-sun8i driver in the multi_v7 default configuration
Signed-off-by: Corentin Labbe <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 2685e03..6da6af8 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -257,6 +257,7 @@ CONFIG_SMSC911X=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
CONFIG_DWMAC_DWC_QOS_ETH=y
+CONFIG_DWMAC_SUN8I=y
CONFIG_TI_CPSW=y
CONFIG_XILINX_EMACLITE=y
CONFIG_AT803X_PHY=y
--
2.10.2
--
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^ permalink raw reply related
* [PATCH v5 18/20] arm: sunxi: Enable dwmac-sun8i driver on sunxi_defconfig
From: Corentin Labbe @ 2017-05-01 12:45 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, peppe.cavallaro-qxv4g6HH51o,
alexandre.torgue-qxv4g6HH51o
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Corentin Labbe
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Enable the dwmac-sun8i driver in the sunxi default configuration
Signed-off-by: Corentin Labbe <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/arm/configs/sunxi_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 5cd5dd70..504e022 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -40,6 +40,7 @@ CONFIG_ATA=y
CONFIG_AHCI_SUNXI=y
CONFIG_NETDEVICES=y
CONFIG_SUN4I_EMAC=y
+CONFIG_DWMAC_SUN8I=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
--
2.10.2
--
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* [PATCH v5 17/20] arm64: allwinner: bananapi-m64: Enable dwmac-sun8i
From: Corentin Labbe @ 2017-05-01 12:45 UTC (permalink / raw)
To: robh+dt, mark.rutland, maxime.ripard, wens, linux,
catalin.marinas, will.deacon, peppe.cavallaro, alexandre.torgue
Cc: devicetree, Corentin Labbe, linux-kernel, linux-arm-kernel,
netdev
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie@gmail.com>
The dwmac-sun8i hardware is present on the BananaPi M64.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 6872135..0d1f026 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -67,6 +67,14 @@
};
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -77,6 +85,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
--
2.10.2
^ permalink raw reply related
* [PATCH v5 16/20] arm64: allwinner: pine64-plus: Enable dwmac-sun8i
From: Corentin Labbe @ 2017-05-01 12:45 UTC (permalink / raw)
To: robh+dt, mark.rutland, maxime.ripard, wens, linux,
catalin.marinas, will.deacon, peppe.cavallaro, alexandre.torgue
Cc: devicetree, Corentin Labbe, linux-kernel, linux-arm-kernel,
netdev
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie@gmail.com>
The dwmac-sun8i hardware is present on the pine64 plus.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
.../arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index 790d14d..24f1aac 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -46,5 +46,20 @@
model = "Pine64+";
compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
- /* TODO: Camera, Ethernet PHY, touchscreen, etc. */
+ /* TODO: Camera, touchscreen, etc. */
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
};
--
2.10.2
^ permalink raw reply related
* [PATCH v5 15/20] arm64: allwinner: pine64: Enable dwmac-sun8i
From: Corentin Labbe @ 2017-05-01 12:45 UTC (permalink / raw)
To: robh+dt, mark.rutland, maxime.ripard, wens, linux,
catalin.marinas, will.deacon, peppe.cavallaro, alexandre.torgue
Cc: devicetree, linux-kernel, netdev, linux-arm-kernel,
Corentin Labbe
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie@gmail.com>
The dwmac-sun8i hardware is present on the pine64
It uses an external PHY via RMII.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index c680ed3..3b491c0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -70,6 +70,15 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&ext_rmii_phy1>;
+ status = "okay";
+
+};
+
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
@@ -80,6 +89,13 @@
bias-pull-up;
};
+&mdio {
+ ext_rmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
--
2.10.2
^ permalink raw reply related
* [PATCH v5 14/20] arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver
From: Corentin Labbe @ 2017-05-01 12:45 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8, peppe.cavallaro-qxv4g6HH51o,
alexandre.torgue-qxv4g6HH51o
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Corentin Labbe
In-Reply-To: <20170501124520.3769-1-clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit
connections. It is very similar to the device found in the Allwinner
H3, but lacks the internal 100 Mbit PHY and its associated control
bits.
This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps
it disabled at this level.
Signed-off-by: Corentin Labbe <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 35 +++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index d7341ba..18b3642 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -287,6 +287,21 @@
bias-pull-up;
};
+ rmii_pins: rmii_pins {
+ pins = "PD10", "PD11", "PD13", "PD14", "PD17",
+ "PD18", "PD19", "PD20", "PD22", "PD23";
+ function = "emac";
+ drive-strength = <40>;
+ };
+
+ rgmii_pins: rgmii_pins {
+ pins = "PD8", "PD9", "PD10", "PD11", "PD12",
+ "PD13", "PD15", "PD16", "PD17", "PD18",
+ "PD19", "PD20", "PD21", "PD22", "PD23";
+ function = "emac";
+ drive-strength = <40>;
+ };
+
uart0_pins_a: uart0@0 {
pins = "PB8", "PB9";
function = "uart0";
@@ -391,6 +406,26 @@
#size-cells = <0>;
};
+ emac: ethernet@1c30000 {
+ compatible = "allwinner,sun50i-a64-emac";
+ syscon = <&syscon>;
+ reg = <0x01c30000 0x100>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
--
2.10.2
--
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