* Re: [PATCH v7 04/13] slimbus: core: Add slim controllers support
From: Vinod Koul @ 2017-11-16 16:42 UTC (permalink / raw)
To: srinivas.kandagatla
Cc: mark.rutland, alsa-devel, michael.opdenacker, poeschel,
andreas.noever, arnd, treding, devicetree, james.hogan,
pawel.moll, linux-arm-msm, sharon.dvir1, robh+dt, sdharia, alan,
bp, mathieu.poirier, gregkh, linux-kernel, broonie, daniel,
jkosina, joe, davem
In-Reply-To: <20171115141043.29202-5-srinivas.kandagatla@linaro.org>
On Wed, Nov 15, 2017 at 02:10:34PM +0000, srinivas.kandagatla@linaro.org wrote:
> +static void slim_dev_release(struct device *dev)
> +{
> + struct slim_device *sbdev = to_slim_device(dev);
> +
> + put_device(sbdev->ctrl->dev);
which device would that be?
> +static int slim_add_device(struct slim_controller *ctrl,
> + struct slim_device *sbdev,
> + struct device_node *node)
> +{
> + sbdev->dev.bus = &slimbus_bus;
> + sbdev->dev.parent = ctrl->dev;
> + sbdev->dev.release = slim_dev_release;
> + sbdev->dev.driver = NULL;
> + sbdev->ctrl = ctrl;
> +
> + dev_set_name(&sbdev->dev, "%x:%x:%x:%x",
> + sbdev->e_addr.manf_id,
> + sbdev->e_addr.prod_code,
> + sbdev->e_addr.dev_index,
> + sbdev->e_addr.instance);
> +
> + get_device(ctrl->dev);
is this controller device and you ensuring it doesnt go away while you have
slaves on it?
> +static struct slim_device *slim_alloc_device(struct slim_controller *ctrl,
> + struct slim_eaddr *eaddr,
> + struct device_node *node)
> +{
> + struct slim_device *sbdev;
> + int ret;
> +
> + sbdev = kzalloc(sizeof(struct slim_device), GFP_KERNEL);
Usual kernel way of doing is kzalloc(*sbdev)
> +void slim_report_absent(struct slim_device *sbdev)
> +{
> + struct slim_controller *ctrl = sbdev->ctrl;
> +
> + if (!ctrl)
> + return;
> +
> + /* invalidate logical addresses */
> + mutex_lock(&ctrl->lock);
> + sbdev->is_laddr_valid = false;
> + mutex_unlock(&ctrl->lock);
> +
> + ida_simple_remove(&ctrl->laddr_ida, sbdev->laddr);
> + slim_device_update_status(sbdev, SLIM_DEVICE_STATUS_DOWN);
> +}
> +EXPORT_SYMBOL_GPL(slim_report_absent);
Do you have APIs for report present too, if so why not add te status in
argument as you may have common handling
> +static int slim_device_alloc_laddr(struct slim_device *sbdev,
> + u8 *laddr, bool report_present)
> +{
> + struct slim_controller *ctrl = sbdev->ctrl;
> + int ret;
> +
> + mutex_lock(&ctrl->lock);
> + if (ctrl->get_laddr) {
> + ret = ctrl->get_laddr(ctrl, &sbdev->e_addr, laddr);
> + if (ret < 0)
> + goto err;
> + } else if (report_present) {
> + ret = ida_simple_get(&ctrl->laddr_ida,
> + 0, SLIM_LA_MANAGER - 1, GFP_KERNEL);
> + if (ret < 0)
> + goto err;
> +
> + *laddr = ret;
> + } else {
> + ret = -EINVAL;
> + goto err;
> + }
> +
> + if (ctrl->set_laddr) {
> + ret = ctrl->set_laddr(ctrl, &sbdev->e_addr, *laddr);
> + if (ret) {
> + ret = -EINVAL;
> + goto err;
> + }
> + }
> +
> + sbdev->laddr = *laddr;
if you have this in sbdev, then why have this as an arg also?
> + sbdev->is_laddr_valid = true;
shouldn't non-zero value signify that?
--
~Vinod
^ permalink raw reply
* Re: [alsa-devel] [PATCH v7 03/13] slimbus: Add SLIMbus bus type
From: Vinod Koul @ 2017-11-16 16:14 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
broonie-DgEjT+Ai2ygdnm+yROfE0A, alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw,
mark.rutland-5wv7dgnIgG8,
michael.opdenacker-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
poeschel-Xtl8qvBWbHwb1SvskN2V4Q,
andreas.noever-Re5JQEeQqe8AvxtiuMwx3w, arnd-r2nGTMty4D4,
bp-l3A5Bk7waGM, devicetree-u79uwXL29TY76Z2rM5mHXA,
james.hogan-1AXoQHu6uovQT0dZR+AlfA, pawel.moll-5wv7dgnIgG8,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
sharon.dvir1-MQgwKvJRKlGYZoqfULhbRA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, sdharia-sgV2jX0FEOL9JmXXK+q4OQ,
alan-VuQAYsv1563Yd54FQh9/CA, treding-DDmLM1+adcrQT0dZR+AlfA,
mathieu.poirier-QSEj5FYQhm4dnm+yROfE0A, jkosina-AlSwsSmVLrQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, daniel-/w4YWyX8dFk,
joe-6d6DIl74uiNBDgjK7y7TUQ, davem-fT/PcQaiUtIeIZ0/mPfg9Q
In-Reply-To: <e2fa6b56-965d-74e7-af2f-77baf0f50901-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
On Thu, Nov 16, 2017 at 01:40:05PM +0000, Srinivas Kandagatla wrote:
> On 16/11/17 13:18, Vinod Koul wrote:
> >On Wed, Nov 15, 2017 at 02:10:33PM +0000, srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org wrote:
> >
> >>+menuconfig SLIMBUS
> >>+ tristate "Slimbus support"
> >>+ help
> >>+ Slimbus is standard interface between System-on-Chip and audio codec,
> >>+ and other peripheral components in typical embedded systems.
> >>+
> >>+ If unsure, choose N.
> >>+
> >>+if SLIMBUS
> >>+
> >>+# SlIMbus controllers
> >
> >Slimbus perhaps?
> >
> slimbus is specified as "SLIMbus" in the mipi specs, so I should probably
> stay with it and make it consistent across the patchset.
Yeah this I though was a first use, so I though this was a typo. I think
Documentation should use the spec term (like SoundWire) and code should pick
anyone and just be consistent on it.
> >>+static int slim_device_match(struct device *dev, struct device_driver *drv)
> >>+{
> >>+ struct slim_device *sbdev = to_slim_device(dev);
> >>+ struct slim_driver *sbdrv = to_slim_driver(drv);
> >>+
> >>+ return slim_match(sbdrv->id_table, sbdev) != NULL;
> >
> >return !!slim_match() ?
I guess you missed this one..
> >>+struct slim_device_id {
> >>+ __u16 manf_id, prod_code;
> >>+ __u8 dev_index, instance;
> >>+
> >>+ /* Data private to the driver */
> >>+ kernel_ulong_t driver_data;
> >
> >As Takashi pointed out in SDW patches, this needs to be aligned.
> >
> Okay, I will make sure that driver_data is aligned.
You may want to look at comments and disucssion on the SoundWire patches
--
~Vinod
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^ permalink raw reply
* Re: [PATCH v7 03/13] slimbus: Add SLIMbus bus type
From: Srinivas Kandagatla @ 2017-11-16 16:13 UTC (permalink / raw)
To: Vinod Koul
Cc: mark.rutland, alsa-devel, michael.opdenacker, poeschel,
andreas.noever, arnd, treding, devicetree, james.hogan,
pawel.moll, linux-arm-msm, sharon.dvir1, robh+dt, sdharia, alan,
bp, mathieu.poirier, jkosina, linux-kernel, broonie, daniel,
gregkh, joe, davem
In-Reply-To: <20171116161426.GA3187@localhost>
On 16/11/17 16:14, Vinod Koul wrote:
>>>> +static int slim_device_match(struct device *dev, struct device_driver *drv)
>>>> +{
>>>> + struct slim_device *sbdev = to_slim_device(dev);
>>>> + struct slim_driver *sbdrv = to_slim_driver(drv);
>>>> +
>>>> + return slim_match(sbdrv->id_table, sbdev) != NULL;
>>> return !!slim_match() ?
> I guess you missed this one..
Opps, It makes sense I will change it.
>
^ permalink raw reply
* Re: [PATCH 0/8] USB: add device-tree support for interfaces
From: Johan Hovold @ 2017-11-16 16:12 UTC (permalink / raw)
To: Rob Herring
Cc: Johan Hovold, Greg Kroah-Hartman, Mark Rutland, Arnd Bergmann,
Alan Stern, Peter Chen, linux-usb-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rafał Miłecki,
Florian Fainelli
In-Reply-To: <20171116144321.hlp6em77t56e5nly@rob-hp-laptop>
On Thu, Nov 16, 2017 at 08:43:21AM -0600, Rob Herring wrote:
> On Thu, Nov 09, 2017 at 06:07:15PM +0100, Johan Hovold wrote:
> > This series adds support for representing USB interfaces in device tree
> > by implementing support for "interface nodes" and "combined nodes" from
> > the OF specification.
> >
> > This is needed to be able to describe non-discoverable properties of
> > permanently attached USB devices and their interfaces such as any
> > i2c-clients connected to a USB-i2c bridge (e.g. the dln2 mfd) or,
> > eventually, devices connected to usb-serial converters (to be used with
> > serdev).
>
> In the original OF binding, the firmware dynamically generated the tree
> for the active configuration AIUI. That doesn't really fit for the
> (mostly) static FDT usage and why we stopped at the device level. So how
> do we handle multiple configs? Or can we assume that if say the I2C bus
> is used, then there's only one config and interface that can use it?
Multiple configuration can be used to implement different sets of
functionality. A hypothetical device could have one i2c controller in
one configuration and two in another. Most devices will only have one
configuration though.
A USB interface implements some functionality of the device (and this is
what Linux USB drivers bind to). So even for single-configuration
devices, you need to be able to say which i2c controller (bus) you are
describing.
[ And as a simplification, the combined nodes can be used for most cases
were we only have one configuration with a single interface. ]
Note that a new set of interfaces (in the kernel device model) is
created when a new USB device configuration is selected. These new
interfaces will be associated with any matching device-tree interface
nodes and that these would be distinct from any nodes that matches
another configuration.
So I don't think there's any problem with dealing with the rare cases of
multi-configuration devices.
Johan
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^ permalink raw reply
* Re: [PATCH v2 1/4] omapdrm: fix compatible string for td028ttec1
From: H. Nikolaus Schaller @ 2017-11-16 16:10 UTC (permalink / raw)
To: Andrew F. Davis
Cc: Mark Rutland, devicetree, Julia Lawall, letux-kernel,
Bartlomiej Zolnierkiewicz, David Airlie, dri-devel, Russell King,
Rob Herring, linux-kernel, Tony Lindgren, linux-fbdev,
Tomi Valkeinen, Thierry Reding, Laurent Pinchart,
Benoît Cousson, kernel, Sean Paul, linux-omap,
linux-arm-kernel
In-Reply-To: <d90ee1ee-8a33-de04-bb8b-2f10e0a80a61@ti.com>
Hi Andrew,
> Am 16.11.2017 um 16:53 schrieb Andrew F. Davis <afd@ti.com>:
>
> On 11/16/2017 07:43 AM, H. Nikolaus Schaller wrote:
>>
>>> Am 16.11.2017 um 13:32 schrieb Tomi Valkeinen <tomi.valkeinen@ti.com>:
>>>
>>> On 16/11/17 10:50, H. Nikolaus Schaller wrote:
>>>> The vendor name was "toppoly" but other panels and the vendor list
>>>> have defined it as "tpo". So let's fix it in driver and bindings.
>>>>
>>>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>>>> ---
>>>
>>>
>>>> -MODULE_ALIAS("spi:toppoly,td028ttec1");
>>>> +MODULE_ALIAS("spi:tpo,td028ttec1");
>>>
>>> Doesn't this mean that the module won't load if you have old bindings?
>>
>> Hm.
>>
>> Well, I think it can load but doesn't automatically from DT strings which might
>> be unexpected.
>>
>>> Can't we have two module aliases?
>>
>> I think we can. Just a random example:
>> https://elixir.free-electrons.com/linux/latest/source/drivers/w1/slaves/w1_therm.c#L754
>>
>> So we should keep both.
>
> Even better would be to drop both MODULE_ALIAS and let the
> MODULE_DEVICE_TABLE macro define them for your from the SPI id table.
Why would that be better?
As far as I see it will need more code and changes than adding one line of
MODULE_ALIAS.
> Although it doesn't look like this driver has an SPI id table, you
> should probably add one, I be interested to see if this module is always
> being matched through the "spi" or the "of" alias..
Could you please propose how that code should look like, so that I can test?
BR and thanks,
Nikolaus Schaller
>
>>
>> Should I submit a new version?
>>
>> BR,
>> Nikolaus
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
^ permalink raw reply
* Re: [PATCH] dt-bindings: remove file that was added accidentally
From: Rob Herring @ 2017-11-16 16:07 UTC (permalink / raw)
To: Rob Clark
Cc: Mark Rutland, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, dri-devel
In-Reply-To: <20171116140620.15526-1-robdclark@gmail.com>
On Thu, Nov 16, 2017 at 8:05 AM, Rob Clark <robdclark@gmail.com> wrote:
> I think this snuck in when I applied the patch for f97decac5f4c (didn't
> apply cleanly, required some manual applying + git-add). It is unused
> and shouldn't be here. My bad.
>
> Fixes: f97decac5f4c "drm/msm: Support multiple ringbuffers"
> Signed-off-by: Rob Clark <robdclark@gmail.com>
> ---
> include/dt-bindings/msm/msm-bus-ids.h | 887 ----------------------------------
> 1 file changed, 887 deletions(-)
> delete mode 100644 include/dt-bindings/msm/msm-bus-ids.h
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply
* Re: [PATCH v3 1/2] dt: bindings: lm3692x: Add bindings for lm3692x LED driver
From: Rob Herring @ 2017-11-16 15:58 UTC (permalink / raw)
To: Dan Murphy
Cc: Mark Rutland, Richard Purdie, Jacek Anaszewski, Pavel Machek,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Linux LED Subsystem
In-Reply-To: <d3483e49-650d-1d68-bec6-eeb84d8ac48a-l0cyMroinI0@public.gmane.org>
On Thu, Nov 16, 2017 at 9:45 AM, Dan Murphy <dmurphy-l0cyMroinI0@public.gmane.org> wrote:
> Rob
>
> Thanks for the review
>
> On 11/16/2017 09:41 AM, Rob Herring wrote:
>> On Wed, Nov 15, 2017 at 01:42:02PM -0600, Dan Murphy wrote:
>>> This adds the devicetree bindings for the LM3692x
>>> I2C LED string driver.
>>>
>>> Acked-by: Pavel Machek <pavel-+ZI9xUNit7I@public.gmane.org>
>>> Signed-off-by: Dan Murphy <dmurphy-l0cyMroinI0@public.gmane.org>
>>> ---
>>>
>>> v3 - No changes
>>> v2 - No changes - https://patchwork.kernel.org/patch/10056677/
>>>
>>> .../devicetree/bindings/leds/leds-lm3692x.txt | 28 ++++++++++++++++++++++
>>> 1 file changed, 28 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/leds/leds-lm3692x.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/leds/leds-lm3692x.txt b/Documentation/devicetree/bindings/leds/leds-lm3692x.txt
>>> new file mode 100644
>>> index 000000000000..cfef67bd4100
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/leds/leds-lm3692x.txt
>>> @@ -0,0 +1,28 @@
>>> +* Texas Instruments - LM3692x Highly Efficient Dual-String White LED Driver
>>> +
>>> +The LM36922 is an ultra-compact, highly efficient,
>>> +two string white-LED driver designed for LCD display
>>> +backlighting.
>>> +
>>> +Required properties:
>>> + - compatible:
>>> + "ti,lm3692x"
>>
>> Don't use wildcards in compatible strings.
>
> Do you mean to remove the x? How do we denote a family of parts then?
Yes. With a compatible string for each one. You can have multiple
compatible strings if some are a superset of others.
Rob
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^ permalink raw reply
* Re: [PATCH v2 1/4] omapdrm: fix compatible string for td028ttec1
From: Andrew F. Davis @ 2017-11-16 15:53 UTC (permalink / raw)
To: H. Nikolaus Schaller, Tomi Valkeinen
Cc: Mark Rutland, devicetree, Julia Lawall, letux-kernel,
Bartlomiej Zolnierkiewicz, David Airlie, dri-devel, Russell King,
Rob Herring, linux-kernel, Tony Lindgren, linux-fbdev,
Thierry Reding, Sean Paul, Laurent Pinchart, Benoît Cousson,
kernel, linux-omap, linux-arm-kernel
In-Reply-To: <130D3B71-C0CE-4755-BF06-971681F630BC@goldelico.com>
On 11/16/2017 07:43 AM, H. Nikolaus Schaller wrote:
>
>> Am 16.11.2017 um 13:32 schrieb Tomi Valkeinen <tomi.valkeinen@ti.com>:
>>
>> On 16/11/17 10:50, H. Nikolaus Schaller wrote:
>>> The vendor name was "toppoly" but other panels and the vendor list
>>> have defined it as "tpo". So let's fix it in driver and bindings.
>>>
>>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>>> ---
>>
>>
>>> -MODULE_ALIAS("spi:toppoly,td028ttec1");
>>> +MODULE_ALIAS("spi:tpo,td028ttec1");
>>
>> Doesn't this mean that the module won't load if you have old bindings?
>
> Hm.
>
> Well, I think it can load but doesn't automatically from DT strings which might
> be unexpected.
>
>> Can't we have two module aliases?
>
> I think we can. Just a random example:
> https://elixir.free-electrons.com/linux/latest/source/drivers/w1/slaves/w1_therm.c#L754
>
> So we should keep both.
Even better would be to drop both MODULE_ALIAS and let the
MODULE_DEVICE_TABLE macro define them for your from the SPI id table.
Although it doesn't look like this driver has an SPI id table, you
should probably add one, I be interested to see if this module is always
being matched through the "spi" or the "of" alias..
>
> Should I submit a new version?
>
> BR,
> Nikolaus
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH v3 1/2] dt: bindings: lm3692x: Add bindings for lm3692x LED driver
From: Dan Murphy @ 2017-11-16 15:45 UTC (permalink / raw)
To: Rob Herring
Cc: mark.rutland, rpurdie, jacek.anaszewski, pavel, devicetree,
linux-kernel, linux-leds
In-Reply-To: <20171116154139.wed7qmpmv2ffyzv2@rob-hp-laptop>
Rob
Thanks for the review
On 11/16/2017 09:41 AM, Rob Herring wrote:
> On Wed, Nov 15, 2017 at 01:42:02PM -0600, Dan Murphy wrote:
>> This adds the devicetree bindings for the LM3692x
>> I2C LED string driver.
>>
>> Acked-by: Pavel Machek <pavel@ucw.cz>
>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>> ---
>>
>> v3 - No changes
>> v2 - No changes - https://patchwork.kernel.org/patch/10056677/
>>
>> .../devicetree/bindings/leds/leds-lm3692x.txt | 28 ++++++++++++++++++++++
>> 1 file changed, 28 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/leds/leds-lm3692x.txt
>>
>> diff --git a/Documentation/devicetree/bindings/leds/leds-lm3692x.txt b/Documentation/devicetree/bindings/leds/leds-lm3692x.txt
>> new file mode 100644
>> index 000000000000..cfef67bd4100
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/leds/leds-lm3692x.txt
>> @@ -0,0 +1,28 @@
>> +* Texas Instruments - LM3692x Highly Efficient Dual-String White LED Driver
>> +
>> +The LM36922 is an ultra-compact, highly efficient,
>> +two string white-LED driver designed for LCD display
>> +backlighting.
>> +
>> +Required properties:
>> + - compatible:
>> + "ti,lm3692x"
>
> Don't use wildcards in compatible strings.
Do you mean to remove the x? How do we denote a family of parts then?
>
>> + - reg - I2C slave address
>> +
>> +Optional properties:
>> + - label - Used for naming LEDs
>> + - enable-gpio - gpio pin to enable/disable the device.
>
> enable-gpios is the preferred form.
ack
>
>> + - supply - "vled" - LED supply
>
> vled-supply - ...
>
ack
>> +
>> +Example:
>> +
>> +leds: leds@6 {
>> + compatible = "ti,lm3692x";
>> + reg = <0x36>;
>> + label = "backlight_cluster";
>> + enable-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
>> + vled-supply = <&vbatt>;
>> +}
>> +
>> +For more product information please see the link below:
>> +http://www.ti.com/lit/ds/snvsa29/snvsa29.pdf
>> --
>> 2.15.0.124.g7668cbc60
>>
--
------------------
Dan Murphy
^ permalink raw reply
* Re: [PATCH v3 1/2] dt: bindings: lm3692x: Add bindings for lm3692x LED driver
From: Rob Herring @ 2017-11-16 15:41 UTC (permalink / raw)
To: Dan Murphy
Cc: mark.rutland-5wv7dgnIgG8, rpurdie-Fm38FmjxZ/leoWH0uzbU5w,
jacek.anaszewski-Re5JQEeQqe8AvxtiuMwx3w, pavel-+ZI9xUNit7I,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-leds-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171115194203.13572-1-dmurphy-l0cyMroinI0@public.gmane.org>
On Wed, Nov 15, 2017 at 01:42:02PM -0600, Dan Murphy wrote:
> This adds the devicetree bindings for the LM3692x
> I2C LED string driver.
>
> Acked-by: Pavel Machek <pavel-+ZI9xUNit7I@public.gmane.org>
> Signed-off-by: Dan Murphy <dmurphy-l0cyMroinI0@public.gmane.org>
> ---
>
> v3 - No changes
> v2 - No changes - https://patchwork.kernel.org/patch/10056677/
>
> .../devicetree/bindings/leds/leds-lm3692x.txt | 28 ++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/leds/leds-lm3692x.txt
>
> diff --git a/Documentation/devicetree/bindings/leds/leds-lm3692x.txt b/Documentation/devicetree/bindings/leds/leds-lm3692x.txt
> new file mode 100644
> index 000000000000..cfef67bd4100
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/leds-lm3692x.txt
> @@ -0,0 +1,28 @@
> +* Texas Instruments - LM3692x Highly Efficient Dual-String White LED Driver
> +
> +The LM36922 is an ultra-compact, highly efficient,
> +two string white-LED driver designed for LCD display
> +backlighting.
> +
> +Required properties:
> + - compatible:
> + "ti,lm3692x"
Don't use wildcards in compatible strings.
> + - reg - I2C slave address
> +
> +Optional properties:
> + - label - Used for naming LEDs
> + - enable-gpio - gpio pin to enable/disable the device.
enable-gpios is the preferred form.
> + - supply - "vled" - LED supply
vled-supply - ...
> +
> +Example:
> +
> +leds: leds@6 {
> + compatible = "ti,lm3692x";
> + reg = <0x36>;
> + label = "backlight_cluster";
> + enable-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
> + vled-supply = <&vbatt>;
> +}
> +
> +For more product information please see the link below:
> +http://www.ti.com/lit/ds/snvsa29/snvsa29.pdf
> --
> 2.15.0.124.g7668cbc60
>
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^ permalink raw reply
* Re: [RFCv2 PATCH 31/36] iommu/arm-smmu-v3: Add support for PCI ATS
From: Jean-Philippe Brucker @ 2017-11-16 15:03 UTC (permalink / raw)
To: Bharat Kumar Gogada,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-acpi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: Mark Rutland,
gabriele.paoloni-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
Catalin Marinas, Will Deacon,
okaya-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
rfranz-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org,
lenb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
rjw-LthD3rsA81gm4RdzfppkhA@public.gmane.org, Sudeep Holla
In-Reply-To: <BLUPR0201MB150565029F9260A528739ACBA52E0-hRBPhS1iNj/g9tdZWAsUFxrHTHEw16jenBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
Hi Bharat,
On 16/11/17 14:19, Bharat Kumar Gogada wrote:
> Hi Jean,
>
> +static size_t
> +arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, int ssid,
> + unsigned long iova, size_t size)
> +{
> + unsigned long flags;
> + struct arm_smmu_cmdq_ent cmd;
> + struct arm_smmu_master_data *master;
> +
> + arm_smmu_atc_inv_to_cmd(ssid, iova, size, &cmd);
> +
> + spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> + list_for_each_entry(master, &smmu_domain->devices, list)
> + arm_smmu_atc_inv_master(master, &cmd);
> + spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
> +
> + return size;
> +}
> +
> /* IOMMU API */
> static bool arm_smmu_capable(enum iommu_cap cap) { @@ -2361,6 +2506,8 @@ static void arm_smmu_detach_dev(struct device *dev)
> __iommu_process_unbind_dev_all(&smmu_domain->domain, dev);
>
> if (smmu_domain) {
> + arm_smmu_atc_inv_master_all(master, 0);
> +
> In BIND flow, when VFIO_IOMMU_UNBIND is invoked invalidation is sent on allocated PASID for this application.
> When vfio group fd is closed after UNBIND, arm_smmu_detach_dev is invoked now invalidation is being sent on ssid zero.
> Why invalidation needs to be sent on ssid zero ?
It's possible to use bind/unbind and map/unmap APIs at the same time on a
domain. map/unmap modifies non-ssid mappings as usual, for context
descriptor 0. Note that SSID 0 is converted to "no SSID" by
arm_smmu_atc_inv_to_cmd.
That said, I think VFIO cleans all DMA mappings when the VFIO group fd is
closed, which will send individual ATC invalidation for each mapping. But
VFIO may not be the only user of this API, and future users may be less
careful. It's safer to send this global invalidation whenever we detach
the domain, to ensure we're not leaving stale ATC entries for the next user.
Thanks,
Jean
^ permalink raw reply
* [PATCH] arm, ls1021a: add support for Moxa UC-8410A open platform
From: SZ Lin @ 2017-11-16 14:58 UTC (permalink / raw)
Cc: shawnguo-DgEjT+Ai2ygdnm+yROfE0A, SZ Lin, Jimmy Chen,
Harry YJ Jhou, Rob Herring, Mark Rutland, Russell King,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Add support for Moxa UC-8410A open platform
The UC-8410A computing platform is designed
for embedded communication-centric industrial applications
The features of UC-8410A are:
* QSPI flash
* SD slot
* 3x LAN
* 8x RS-232/422/485 ports, software-selectable
* Mini PCIe form factor with PCIe/USB signal
* 2x USB host
* TPM
* Watchdog
* RTC
* User LEDs
* Beeper
Signed-off-by: Jimmy Chen <jimmy.chen-D4fb9hXD9d4@public.gmane.org>
Signed-off-by: Harry YJ Jhou <harryyj.jhou-D4fb9hXD9d4@public.gmane.org>
Signed-off-by: SZ Lin <sz.lin-D4fb9hXD9d4@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts | 230 ++++++++++++++++++++++++++++
2 files changed, 231 insertions(+)
create mode 100644 arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index eff87a344566..0165fbcb1d10 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -495,6 +495,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7s-colibri-eval-v3.dtb \
imx7s-warp.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
+ ls1021a-moxa-uc-8410a.dtb \
ls1021a-qds.dtb \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
diff --git a/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts b/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
new file mode 100644
index 000000000000..4896b551505b
--- /dev/null
+++ b/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
@@ -0,0 +1,230 @@
+/*
+ * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
+ *
+ * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou-D4fb9hXD9d4@public.gmane.org>
+ * Jimmy Chen (陳永達) <jimmy.chen-D4fb9hXD9d4@public.gmane.org>
+ * SZ Lin (林上智) <sz.lin-D4fb9hXD9d4@public.gmane.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "ls1021a.dtsi"
+
+/ {
+ model = "Moxa UC-8410A";
+
+ aliases {
+ enet0_rgmii_phy = &rgmii_phy0;
+ enet1_rgmii_phy = &rgmii_phy1;
+ enet2_rgmii_phy = &rgmii_phy2;
+ };
+
+ sys_mclk: clock-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg_3p3v: regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0>;
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ cel_pwr {
+ label = "UC8410A:CEL_PWR";
+ gpios = <&gpio3 23 1>;
+ default-state = "off";
+ };
+
+ cel_reset {
+ label = "UC8410A:CEL_RESET";
+ gpios = <&gpio3 24 1>;
+ default-state = "off";
+ };
+
+ str_led {
+ label = "UC8410A:RED:PROG";
+ gpios = <&gpio0 16 0>;
+ linux,default-trigger = "mmc0";
+ };
+
+ sw_ready {
+ label = "UC8410A:GREEN:SWRDY";
+ gpios = <&gpio0 18 0>;
+ default-state = "on";
+ };
+
+ beeper {
+ label = "UC8410A:BEEP";
+ gpios = <&gpio0 20 0>;
+ default-state = "off";
+ };
+
+ prog_led0 {
+ label = "UC8410A:GREEN:PROG2";
+ gpios = <&gpio3 14 0>;
+ default-state = "off";
+ };
+
+ prog_led1 {
+ label = "UC8410A:GREEN:PROG1";
+ gpios = <&gpio3 15 0>;
+ default-state = "off";
+ };
+
+ prog_led2 {
+ label = "UC8410A:GREEN:PROG0";
+ gpios = <&gpio3 16 0>;
+ default-state = "off";
+ };
+
+ wifi_signal0 {
+ label = "UC8410A:GREEN:CEL2";
+ gpios = <&gpio3 17 0>;
+ default-state = "off";
+ };
+
+ wifi_signal1 {
+ label = "UC8410A:GREEN:CEL1";
+ gpios = <&gpio3 18 0>;
+ default-state = "off";
+ };
+
+ wifi_signal2 {
+ label = "UC8410A:GREEN:CEL0";
+ gpios = <&gpio3 19 0>;
+ default-state = "off";
+ };
+
+ cpu_diag_red {
+ label = "UC8410A:RED:DIA";
+ gpios = <&gpio3 20 0>;
+ default-state = "off";
+ };
+
+ cpu_diag_green {
+ label = "UC8410A:GREEN:DIA";
+ gpios = <&gpio3 21 0>;
+ default-state = "off";
+ };
+
+ cpu_diag_yellow {
+ label = "UC8410A:YELLOW:DIA";
+ gpios = <&gpio3 22 0>;
+ default-state = "off";
+ };
+ };
+};
+
+&enet0 {
+ phy-handle = <&rgmii_phy0>;
+ phy-connection-type = "rgmii-id";
+ status = "okay";
+};
+
+&enet1 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+ status = "okay";
+};
+
+&enet2 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii-id";
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <100000>;
+
+ rtc: rtc@68 {
+ compatible = "dallas,ds1374";
+ reg = <0x68>;
+ };
+
+ tpm: tpm@20 {
+ compatible = "infineon,slb9635tt";
+ reg = <0x20>;
+ };
+};
+
+&lpuart0 {
+ status = "okay";
+};
+
+&mdio0 {
+ rgmii_phy0: ethernet-phy@0 {
+ compatible = "marvell,88e1118";
+ reg = <0x0>;
+ marvell,reg-init =
+ <3 0x11 0 0x4415>, /* Reg 3,17 */
+ <3 0x10 0 0x77>; /* Reg 3,16 */
+ };
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "marvell,88e1118";
+ reg = <0x1>;
+ marvell,reg-init =
+ <3 0x11 0 0x4415>, /* Reg 3,17 */
+ <3 0x10 0 0x77>; /* Reg 3,16 */
+ };
+ rgmii_phy2: ethernet-phy@2 {
+ compatible = "marvell,88e1118";
+ reg = <0x2>;
+ marvell,reg-init =
+ <3 0x11 0 0x4415>, /* Reg 3,17 */
+ <3 0x10 0 0x77>; /* Reg 3,16 */
+ };
+};
+
+&qspi {
+ status = "okay";
+ bus-num = <0>;
+ fsl,spi-num-chipselects = <2>;
+ fsl,spi-flash-chipselects = <0>;
+ fsl,qspi-has-second-chip;
+ flash: flash@0 {
+ compatible = "spansion,s25fl064l", "spansion,s25fl164k";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+
+ partitions@0 {
+ label = "U-Boot";
+ reg = <0x0 0x180000>;
+ };
+ partitions@1 {
+ label = "U-Boot Env";
+ reg = <0x180000 0x680000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
--
2.15.0
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^ permalink raw reply related
* Re: [PATCH 0/8] USB: add device-tree support for interfaces
From: Rob Herring @ 2017-11-16 14:43 UTC (permalink / raw)
To: Johan Hovold
Cc: Greg Kroah-Hartman, Mark Rutland, Arnd Bergmann, Alan Stern,
Peter Chen, linux-usb-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Rafał Miłecki,
Florian Fainelli
In-Reply-To: <20171109170723.10960-1-johan-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On Thu, Nov 09, 2017 at 06:07:15PM +0100, Johan Hovold wrote:
> This series adds support for representing USB interfaces in device tree
> by implementing support for "interface nodes" and "combined nodes" from
> the OF specification.
>
> This is needed to be able to describe non-discoverable properties of
> permanently attached USB devices and their interfaces such as any
> i2c-clients connected to a USB-i2c bridge (e.g. the dln2 mfd) or,
> eventually, devices connected to usb-serial converters (to be used with
> serdev).
In the original OF binding, the firmware dynamically generated the tree
for the active configuration AIUI. That doesn't really fit for the
(mostly) static FDT usage and why we stopped at the device level. So how
do we handle multiple configs? Or can we assume that if say the I2C bus
is used, then there's only one config and interface that can use it?
Rob
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^ permalink raw reply
* Re: [PATCH 4/8] dt-bindings: usb: document hub and host-controller properties
From: Rob Herring @ 2017-11-16 14:32 UTC (permalink / raw)
To: Johan Hovold
Cc: Greg Kroah-Hartman, Mark Rutland, Arnd Bergmann, Alan Stern,
Peter Chen, linux-usb-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171116084540.GH11226@localhost>
On Thu, Nov 16, 2017 at 09:45:40AM +0100, Johan Hovold wrote:
> On Wed, Nov 15, 2017 at 09:46:55AM -0600, Rob Herring wrote:
> > On Thu, Nov 09, 2017 at 06:07:19PM +0100, Johan Hovold wrote:
> > > Hub nodes and host-controller nodes with child nodes must specify values
> > > for #address-cells (1) and #size-cells (0).
> > >
> > > Also make the definition of the related reg property a bit more
> > > stringent, and add comments to the example source.
> > >
> > > Signed-off-by: Johan Hovold <johan-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > > ---
> > > Documentation/devicetree/bindings/usb/usb-device.txt | 20 ++++++++++++++++----
> > > 1 file changed, 16 insertions(+), 4 deletions(-)
> >
> > I'm happy to apply patches 1-4 for 4.15 if you want.
>
> Sure, that would be great. Greg will probably base usb-next on 4.15-rc2,
> and otherwise the rest of the binding updates can just go through your
> tree instead.
1-4 applied.
Rob
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^ permalink raw reply
* Re: [PATCH 2/3] libnvdimm: Add a device-tree interface
From: Rob Herring @ 2017-11-16 14:29 UTC (permalink / raw)
To: Oliver O'Halloran
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-nvdimm-hn68Rpc1hR1g9hUCZPvPmw
In-Reply-To: <20171115175131.23631-2-oohall-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Thu, Nov 16, 2017 at 04:51:30AM +1100, Oliver O'Halloran wrote:
> A fairly bare-bones set of device-tree bindings so libnvdimm can be used
> on powerpc and other device-tree based platforms.
>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Oliver O'Halloran <oohall-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> .../devicetree/bindings/nvdimm/nvdimm-bus.txt | 69 +++++++
Also, please split bindings to a separate patch.
> MAINTAINERS | 8 +
> drivers/nvdimm/Kconfig | 10 +
> drivers/nvdimm/Makefile | 1 +
> drivers/nvdimm/of_nvdimm.c | 202 +++++++++++++++++++++
> 5 files changed, 290 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/nvdimm/nvdimm-bus.txt
> create mode 100644 drivers/nvdimm/of_nvdimm.c
^ permalink raw reply
* Re: [PATCH 2/3] libnvdimm: Add a device-tree interface
From: Rob Herring @ 2017-11-16 14:28 UTC (permalink / raw)
To: Oliver O'Halloran
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-nvdimm-hn68Rpc1hR1g9hUCZPvPmw
In-Reply-To: <20171115175131.23631-2-oohall-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Thu, Nov 16, 2017 at 04:51:30AM +1100, Oliver O'Halloran wrote:
> A fairly bare-bones set of device-tree bindings so libnvdimm can be used
> on powerpc and other device-tree based platforms.
>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Oliver O'Halloran <oohall-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> .../devicetree/bindings/nvdimm/nvdimm-bus.txt | 69 +++++++
> MAINTAINERS | 8 +
> drivers/nvdimm/Kconfig | 10 +
> drivers/nvdimm/Makefile | 1 +
> drivers/nvdimm/of_nvdimm.c | 202 +++++++++++++++++++++
> 5 files changed, 290 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/nvdimm/nvdimm-bus.txt
> create mode 100644 drivers/nvdimm/of_nvdimm.c
>
> diff --git a/Documentation/devicetree/bindings/nvdimm/nvdimm-bus.txt b/Documentation/devicetree/bindings/nvdimm/nvdimm-bus.txt
> new file mode 100644
> index 000000000000..491e7c4900ed
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvdimm/nvdimm-bus.txt
> @@ -0,0 +1,69 @@
> +Device-tree bindings for nonvolatile-memory / NVDIMMs
> +-----------------------------------------------------
> +
> +Non-volatile DIMMs are memory modules used to provide (cacheable) main memory that
> +retains its contents across power cycles. In more practical terms, they are kind
> +of storage device where the contents can be accessed by the CPU directly,
> +rather than indirectly via a storage controller or similar. This can provide
> +substantial performance improvements for applications designed to take
> +advantage of in-memory storage.
> +
> +This binding provides a way to describe memory regions that should be managed
> +by an NVDIMM storage driver (libNVDIMM in Linux) and some of the associated
> +metadata. The binding itself is split into two main parts: A container bus and
> +its sub-nodes which describe which memory address ranges corresponding to
> +NVDIMM backed memory.
> +
> +Bindings for the container bus:
> +------------------------------
> +
> +Required properties:
> + - compatible = "nvdimm-bus";
> + - ranges;
> + A blank ranges property is required because the sub-nodes have
> + addresses in the system's physical address space.
> +
> +The use of a container bus is mainly to handle future expansion of the binding. For
> +comparison the ACPI equivalent of this binding (NFIT) describes: Memory regions, DIMM
> +control structures, Block mode DIMM control structures, interleave sets, and more. Some
> +of these structures cross reference each other so everyone should be happier if we keep
> +it relatively self contained.
Will adding any of these things need unit addresses and colide with the
existing nodes below? IOW, at one level there's only 1 number space.
> +
> +Bindings for the region nodes:
> +-----------------------------
> +
> +Required properties:
> + - compatible = "nvdimm-persistent" or "nvdimm-volatile"
> +
> + The "nvdimm-persistent" region type indicates that this memory region
> + is actually a persistent region. The volatile type is mainly useful
> + for testing and RAM disks that can persist across kexec.
> +
> + - reg = <base, size>;
> + The reg property should only contain one address range.
> +
> +Optional properties:
> + - Any relevant NUMA assocativity properties for the target platform.
> +
> +A complete example:
> +--------------------
> +
> +/ {
> + #size-cells = <1>;
> + #address-cells = <1>;
> +
> + nonvolatile-memory {
> + compatible = "nonvolatile-memory";
> + ranges;
> +
> + region@5000 {
> + compatible = "nvdimm-persistent";
> + reg = <0x5000 0x1000>;
> + };
> +
> + region@6000 {
> + compatible = "nvdimm-volatile";
> + reg = <0x6000 0x1000>;
> + };
> + };
> +};
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 65eff7857ec3..0350bf5a94d2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -7875,6 +7875,14 @@ Q: https://patchwork.kernel.org/project/linux-nvdimm/list/
> S: Supported
> F: drivers/nvdimm/pmem*
>
> +LIBNVDIMM: DEVICETREE BINDINGS
> +M: Oliver O'Halloran <oohall-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> +L: linux-nvdimm-hn68Rpc1hR1g9hUCZPvPmw@public.gmane.org
> +Q: https://patchwork.kernel.org/project/linux-nvdimm/list/
> +S: Supported
> +F: drivers/nvdimm/of_nvdimm.c
> +F: Documentation/devicetree/bindings/nvdimm/nvdimm-bus.txt
> +
> LIBNVDIMM: NON-VOLATILE MEMORY DEVICE SUBSYSTEM
> M: Dan Williams <dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
> L: linux-nvdimm-hn68Rpc1hR1g9hUCZPvPmw@public.gmane.org
> diff --git a/drivers/nvdimm/Kconfig b/drivers/nvdimm/Kconfig
> index 5bdd499b5f4f..72d147b55596 100644
> --- a/drivers/nvdimm/Kconfig
> +++ b/drivers/nvdimm/Kconfig
> @@ -102,4 +102,14 @@ config NVDIMM_DAX
>
> Select Y if unsure
>
> +config OF_NVDIMM
> + tristate "Device-tree support for NVDIMMs"
> + depends on OF
> + default LIBNVDIMM
> + help
> + Allows byte addressable persistent memory regions to be described in the
> + device-tree.
> +
> + Select Y if unsure.
> +
> endif
> diff --git a/drivers/nvdimm/Makefile b/drivers/nvdimm/Makefile
> index ca6d325438a3..9029511a8486 100644
> --- a/drivers/nvdimm/Makefile
> +++ b/drivers/nvdimm/Makefile
> @@ -3,6 +3,7 @@ obj-$(CONFIG_BLK_DEV_PMEM) += nd_pmem.o
> obj-$(CONFIG_ND_BTT) += nd_btt.o
> obj-$(CONFIG_ND_BLK) += nd_blk.o
> obj-$(CONFIG_X86_PMEM_LEGACY) += nd_e820.o
> +obj-$(CONFIG_OF_NVDIMM) += of_nvdimm.o
>
> nd_pmem-y := pmem.o
>
> diff --git a/drivers/nvdimm/of_nvdimm.c b/drivers/nvdimm/of_nvdimm.c
> new file mode 100644
> index 000000000000..765cbbae8bcb
> --- /dev/null
> +++ b/drivers/nvdimm/of_nvdimm.c
> @@ -0,0 +1,202 @@
> +/*
> + * Copyright 2017, IBM Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, you can access it online at
> + * http://www.gnu.org/licenses/gpl-2.0.html.
This can be SPDX tag.
> + */
> +
> +#define pr_fmt(fmt) "of_nvdimm: " fmt
> +
> +#include <linux/of_platform.h>
> +#include <linux/of_address.h>
> +#include <linux/libnvdimm.h>
> +#include <linux/module.h>
> +#include <linux/ioport.h>
> +#include <linux/slab.h>
> +
> +static const struct attribute_group *region_attr_groups[] = {
> + &nd_region_attribute_group,
> + &nd_device_attribute_group,
> + NULL,
> +};
> +
> +static int of_nvdimm_add_byte(struct nvdimm_bus *bus, struct device_node *np)
_add_byte_region() would be more clear.
> +{
> + struct nd_region_desc ndr_desc;
> + struct resource temp_res;
> + struct nd_region *region;
> +
> + /*
> + * byte regions should only have one address range
> + */
> + if (of_address_to_resource(np, 0, &temp_res)) {
> + pr_warn("Unable to parse reg[0] for %pOF\n", np);
> + return -ENXIO;
> + }
> +
> + pr_debug("Found %pR for %pOF\n", &temp_res, np);
> +
> + memset(&ndr_desc, 0, sizeof(ndr_desc));
> + ndr_desc.res = &temp_res;
> + ndr_desc.of_node = np;
> + ndr_desc.attr_groups = region_attr_groups;
> +#ifdef CONFIG_NUMA
I believe of_node_to_nid will do the right thing for !CONFIG_NUMA and
this can be dropped.
> + ndr_desc.numa_node = of_node_to_nid(np);
> +#endif
> + set_bit(ND_REGION_PAGEMAP, &ndr_desc.flags);
> +
> + if (of_device_is_compatible(np, "nvdimm-volatile"))
You've already matched the node once with of_match_node, don't do it
again.
> + region = nvdimm_volatile_region_create(bus, &ndr_desc);
> + else
> + region = nvdimm_pmem_region_create(bus, &ndr_desc);
> +
> + if (!region)
> + return -ENXIO;
> +
> + return 0;
> +}
> +
> +static const struct of_device_id of_nvdimm_dev_types[] = {
> + { .compatible = "nvdimm-persistent", .data = of_nvdimm_add_byte },
> + { .compatible = "nvdimm-volatile", .data = of_nvdimm_add_byte },
> + { },
> +};
> +
> +static void of_nvdimm_parse_one(struct nvdimm_bus *bus,
> + struct device_node *node)
> +{
> + int (*parse_node)(struct nvdimm_bus *, struct device_node *);
> + const struct of_device_id *match;
> + int rc;
> +
> + if (of_node_test_and_set_flag(node, OF_POPULATED)) {
Why not make the regions platform devices too? Then you don't need your
own populate code.
> + pr_debug("%pOF already parsed, skipping\n", node);
> + return;
> + }
> +
> + match = of_match_node(of_nvdimm_dev_types, node);
> + if (!match) {
> + pr_info("No compatible match for '%pOF'\n", node);
> + of_node_clear_flag(node, OF_POPULATED);
> + return;
> + }
> +
> + of_node_get(node);
> + parse_node = match->data;
This makes no sense. I assume you plan to add some other region type
later?
> + rc = parse_node(bus, node);
> +
> + if (rc) {
> + of_node_clear_flag(node, OF_POPULATED);
> + of_node_put(node);
> + }
> +
> + pr_debug("Parsed %pOF, rc = %d\n", node, rc);
> +
> + return;
> +}
> +
> +/*
> + * The nvdimm core refers to the bus descriptor structure at runtime
> + * so we need to keep it around. Note that that this is different to
> + * the other nd_*_desc types which are essentially containers for extra
> + * function parameters.
> + */
> +struct of_nd_private {
> + struct nvdimm_bus_descriptor desc;
> + struct nvdimm_bus *bus;
> +};
> +
> +static const struct attribute_group *bus_attr_groups[] = {
> + &nvdimm_bus_attribute_group,
> + NULL,
> +};
> +
> +static int of_nvdimm_probe(struct platform_device *pdev)
> +{
> + struct device_node *node, *child;
> + struct of_nd_private *priv;
> +
> + node = dev_of_node(&pdev->dev);
> + if (!node)
> + return -ENXIO;
> +
> + priv = kzalloc(sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->desc.attr_groups = bus_attr_groups;
> + priv->desc.provider_name = "of_nvdimm";
> + priv->desc.module = THIS_MODULE;
> + priv->desc.of_node = node;
> +
> + priv->bus = nvdimm_bus_register(&pdev->dev, &priv->desc);
> + if (!priv->bus)
> + goto err;
> +
> + platform_set_drvdata(pdev, priv);
> +
> + /* now walk the node bus and setup regions, etc */
> + for_each_available_child_of_node(node, child)
> + of_nvdimm_parse_one(priv->bus, child);
> +
> + return 0;
> +
> +err:
> + nvdimm_bus_unregister(priv->bus);
> + kfree(priv);
> + return -ENXIO;
> +}
> +
> +static int of_nvdimm_remove(struct platform_device *pdev)
> +{
> + struct of_nd_private *priv = platform_get_drvdata(pdev);
> + struct device_node *node;
> +
> + if (!priv)
> + return 0; /* possible? */
> +
> + for_each_available_child_of_node(pdev->dev.of_node, node) {
> + if (!of_node_check_flag(node, OF_POPULATED))
> + continue;
> +
> + of_node_clear_flag(node, OF_POPULATED);
> + of_node_put(node);
> + pr_debug("de-populating %s\n", node->full_name);
> + }
> +
> + nvdimm_bus_unregister(priv->bus);
> + kfree(priv);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id of_nvdimm_bus_match[] = {
> + { .compatible = "nvdimm-bus" },
> + { },
> +};
> +
> +static const struct platform_driver of_nvdimm_driver = {
> + .probe = of_nvdimm_probe,
> + .remove = of_nvdimm_remove,
> + .driver = {
> + .name = "of_nvdimm",
> + .owner = THIS_MODULE,
> + .of_match_table = of_nvdimm_bus_match,
> + },
> +};
> +
> +module_platform_driver(of_nvdimm_driver);
> +MODULE_DEVICE_TABLE(of, of_nvdimm_bus_match);
> +MODULE_LICENSE("GPL v2");
> +MODULE_AUTHOR("IBM Corporation");
> --
> 2.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* RE: [PATCH] arm64: dts: ls1088a: add fsl-mc hardware resource manager node
From: Ioana Ciornei @ 2017-11-16 14:24 UTC (permalink / raw)
To: Shawn Guo
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
In-Reply-To: <20171116083920.GK25384@dragon>
See comments inline.
>
> On Wed, Nov 08, 2017 at 03:30:05PM +0200, Ioana Ciornei wrote:
> > Add the fsl-mc node in the LS1088A device tree.
> >
> > Signed-off-by: Ioana Ciornei <ioana.ciornei-3arQi8VN3Tc@public.gmane.org>
> > ---
> > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 62
> ++++++++++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > index bd80e9a..aa37ffe 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > @@ -166,6 +166,68 @@
> > <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
> > };
> >
> > + fsl_mc: fsl-mc@80c000000 {
>
> The unit-address of the node should be somehow related to 'reg'
> property. Can you please help me understand how they are related?
The unit-address of the fsl-mc node is the base address of the MC portal described in the first region of the 'reg' property and formed using the 2 address cells.
Hope this helps.
>
> > + compatible = "fsl,qoriq-mc";
> > + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
> > + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
> > + msi-parent = <&its>;
> > + #address-cells = <3>;
> > + #size-cells = <1>;
> > +
> > + /*
> > + * Region type 0x0 - MC portals
> > + * Region type 0x1 - QBMAN portals
> > + */
> > + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
> > + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
> > +
> > + dpmacs {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + dpmac1: dpmac@1 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <1>;
> > + };
>
> Please have a newline in between nodes.
Will do.
Should I send a rework of this patch right away or better to wait for the merge window to close?
Ioana
>
> Shawn
>
> > + dpmac2: dpmac@2 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <2>;
> > + };
> > + dpmac3: dpmac@3 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <3>;
> > + };
> > + dpmac4: dpmac@4 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <4>;
> > + };
> > + dpmac5: dpmac@5 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <5>;
> > + };
> > + dpmac6: dpmac@6 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <6>;
> > + };
> > + dpmac7: dpmac@7 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <7>;
> > + };
> > + dpmac8: dpmac@8 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <8>;
> > + };
> > + dpmac9: dpmac@9 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <9>;
> > + };
> > + dpmac10: dpmac@10 {
> > + compatible = "fsl,qoriq-mc-dpmac";
> > + reg = <0xa>;
> > + };
> > + };
> > + };
> > +
> > psci {
> > compatible = "arm,psci-0.2";
> > method = "smc";
> > --
> > 1.9.1
> >
> >
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^ permalink raw reply
* RE: [RFCv2 PATCH 31/36] iommu/arm-smmu-v3: Add support for PCI ATS
From: Bharat Kumar Gogada @ 2017-11-16 14:19 UTC (permalink / raw)
To: Jean-Philippe Brucker, linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org,
devicetree@vger.kernel.org, iommu@lists.linux-foundation.org
Cc: joro@8bytes.org, robh+dt@kernel.org, mark.rutland@arm.com,
catalin.marinas@arm.com, will.deacon@arm.com,
lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org,
sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org,
robin.murphy@arm.com, bhelgaas@google.com,
alex.williamson@redhat.com, tn@semihalf.com, liubo95@huawei.com,
thunder.leizhen@huawei.com, xieyisheng1
In-Reply-To: <20171006133203.22803-32-jean-philippe.brucker@arm.com>
Hi Jean,
+static size_t
+arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, int ssid,
+ unsigned long iova, size_t size)
+{
+ unsigned long flags;
+ struct arm_smmu_cmdq_ent cmd;
+ struct arm_smmu_master_data *master;
+
+ arm_smmu_atc_inv_to_cmd(ssid, iova, size, &cmd);
+
+ spin_lock_irqsave(&smmu_domain->devices_lock, flags);
+ list_for_each_entry(master, &smmu_domain->devices, list)
+ arm_smmu_atc_inv_master(master, &cmd);
+ spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
+
+ return size;
+}
+
/* IOMMU API */
static bool arm_smmu_capable(enum iommu_cap cap) { @@ -2361,6 +2506,8 @@ static void arm_smmu_detach_dev(struct device *dev)
__iommu_process_unbind_dev_all(&smmu_domain->domain, dev);
if (smmu_domain) {
+ arm_smmu_atc_inv_master_all(master, 0);
+
In BIND flow, when VFIO_IOMMU_UNBIND is invoked invalidation is sent on allocated PASID for this application.
When vfio group fd is closed after UNBIND, arm_smmu_detach_dev is invoked now invalidation is being sent on ssid zero.
Why invalidation needs to be sent on ssid zero ?
Regards,
Bharat
^ permalink raw reply
* Re: [PATCH v2 8/8] arm64: dts: actions: Add S700 SPS node
From: Andreas Färber @ 2017-11-16 14:16 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Cc: Mark Rutland, 张天益, 梅利,
Catalin Marinas, Will Deacon, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
Thomas Liau, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
张东风, 刘炜, Jeff Chen
In-Reply-To: <20171113233427.5386-9-afaerber-l3A5Bk7waGM@public.gmane.org>
Am 14.11.2017 um 00:34 schrieb Andreas Färber:
> Add a node to the S700 Device Tree for the Smart Power System (SPS).
>
> Signed-off-by: Andreas Färber <afaerber-l3A5Bk7waGM@public.gmane.org>
> ---
> v2: New
>
> To be squashed into 5/8 if binding gets acked.
>
> arch/arm64/boot/dts/actions/s700.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
Squashed (on bg96-next work branch).
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
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^ permalink raw reply
* [RFC v2 2/2] backlight: pwm_bl: compute brightness of LED linearly to human eye.
From: Enric Balletbo i Serra @ 2017-11-16 14:11 UTC (permalink / raw)
To: Daniel Thompson
Cc: Jingoo Han, Richard Purdie, Jacek Anaszewski, Pavel Machek,
Rob Herring, Doug Anderson, Brian Norris, Guenter Roeck,
Lee Jones, Alexandru Stan, linux-leds-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171116141151.21171-1-enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
When you want to change the brightness using a PWM signal, one thing you
need to consider is how human perceive the brightness. Human perceive the
brightness change non-linearly, we have better sensitivity at low
luminance than high luminance, so to achieve perceived linear dimming, the
brightness must be matches to the way our eyes behave. The CIE 1931
lightness formula is what actually describes how we perceive light.
This patch adds support to compute the brightness levels based on a static
table filled with the numbers provided by the CIE 1931 algorithm, for now
it only supports PWM resolutions up to 65535 (16 bits) with 1024 steps.
Lower PWM resolutions are implemented using the same curve but with less
steps, e.g. For a PWM resolution of 256 (8 bits) we have 37 steps.
The calculation of the duty cycle using the CIE 1931 algorithm is enabled by
default when you do not define the 'brightness-levels' propriety in your
device tree.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
---
drivers/video/backlight/pwm_bl.c | 160 +++++++++++++++++++++++++++++++++++----
include/linux/pwm_backlight.h | 1 +
2 files changed, 147 insertions(+), 14 deletions(-)
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 59b1bfb..ea96358 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -26,6 +26,112 @@
#define NSTEPS 256
+/*
+ * CIE lightness to PWM conversion table. The CIE 1931 lightness formula is what
+ * actually describes how we perceive light:
+ *
+ * Y = (L* / 902.3) if L* ≤ 0.08856
+ * Y = ((L* + 16) / 116)^3 if L* > 0.08856
+ *
+ * Where Y is the luminance (output) between 0.0 and 1.0, and L* is the
+ * lightness (input) between 0 and 100.
+ */
+const unsigned int cie1931_table[1024] = {
+ 0, 7, 14, 21, 28, 35, 43, 50, 57, 64, 71, 78, 85, 92, 99, 106, 114, 121,
+ 128, 135, 142, 149, 156, 163, 170, 177, 185, 192, 199, 206, 213, 220,
+ 227, 234, 241, 248, 256, 263, 270, 277, 284, 291, 298, 305, 312, 319,
+ 327, 334, 341, 348, 355, 362, 369, 376, 383, 390, 398, 405, 412, 419,
+ 426, 433, 440, 447, 454, 461, 469, 476, 483, 490, 497, 504, 511, 518,
+ 525, 532, 540, 547, 554, 561, 568, 575, 582, 589, 596, 603, 610, 618,
+ 625, 633, 640, 648, 655, 663, 671, 679, 687, 695, 703, 711, 719, 727,
+ 735, 744, 752, 761, 769, 778, 786, 795, 804, 813, 822, 831, 840, 849,
+ 858, 867, 876, 886, 895, 905, 914, 924, 934, 943, 953, 963, 973, 983,
+ 993, 1004, 1014, 1024, 1034, 1045, 1055, 1066, 1077, 1087, 1098, 1109,
+ 1120, 1131, 1142, 1153, 1165, 1176, 1187, 1199, 1210, 1222, 1234, 1245,
+ 1257, 1269, 1281, 1293, 1305, 1318, 1330, 1342, 1355, 1367, 1380, 1392,
+ 1405, 1418, 1431, 1444, 1457, 1470, 1483, 1497, 1510, 1523, 1537, 1551,
+ 1564, 1578, 1592, 1606, 1620, 1634, 1648, 1662, 1677, 1691, 1706, 1720,
+ 1735, 1750, 1765, 1780, 1795, 1810, 1825, 1840, 1855, 1871, 1886, 1902,
+ 1918, 1933, 1949, 1965, 1981, 1997, 2014, 2030, 2046, 2063, 2079, 2096,
+ 2113, 2130, 2146, 2163, 2181, 2198, 2215, 2232, 2250, 2267, 2285, 2303,
+ 2321, 2338, 2356, 2375, 2393, 2411, 2429, 2448, 2466, 2485, 2504, 2523,
+ 2542, 2561, 2580, 2599, 2618, 2638, 2657, 2677, 2697, 2716, 2736, 2756,
+ 2776, 2796, 2817, 2837, 2858, 2878, 2899, 2920, 2941, 2961, 2983, 3004,
+ 3025, 3046, 3068, 3089, 3111, 3133, 3155, 3177, 3199, 3221, 3243, 3266,
+ 3288, 3311, 3333, 3356, 3379, 3402, 3425, 3448, 3472, 3495, 3519, 3542,
+ 3566, 3590, 3614, 3638, 3662, 3686, 3711, 3735, 3760, 3784, 3809, 3834,
+ 3859, 3884, 3910, 3935, 3960, 3986, 4012, 4037, 4063, 4089, 4115, 4142,
+ 4168, 4194, 4221, 4248, 4274, 4301, 4328, 4356, 4383, 4410, 4438, 4465,
+ 4493, 4521, 4549, 4577, 4605, 4633, 4661, 4690, 4719, 4747, 4776, 4805,
+ 4834, 4863, 4893, 4922, 4952, 4981, 5011, 5041, 5071, 5101, 5131, 5162,
+ 5192, 5223, 5254, 5285, 5316, 5347, 5378, 5409, 5441, 5472, 5504, 5536,
+ 5568, 5600, 5632, 5664, 5697, 5729, 5762, 5795, 5828, 5861, 5894, 5928,
+ 5961, 5995, 6028, 6062, 6096, 6130, 6164, 6199, 6233, 6268, 6302, 6337,
+ 6372, 6407, 6442, 6478, 6513, 6549, 6585, 6621, 6657, 6693, 6729, 6765,
+ 6802, 6839, 6875, 6912, 6949, 6986, 7024, 7061, 7099, 7137, 7174, 7212,
+ 7250, 7289, 7327, 7366, 7404, 7443, 7482, 7521, 7560, 7600, 7639, 7679,
+ 7718, 7758, 7798, 7838, 7879, 7919, 7960, 8000, 8041, 8082, 8123, 8165,
+ 8206, 8248, 8289, 8331, 8373, 8415, 8457, 8500, 8542, 8585, 8628, 8671,
+ 8714, 8757, 8800, 8844, 8887, 8931, 8975, 9019, 9064, 9108, 9152, 9197,
+ 9242, 9287, 9332, 9377, 9423, 9468, 9514, 9560, 9606, 9652, 9698, 9745,
+ 9791, 9838, 9885, 9932, 9979, 10026, 10074, 10121, 10169, 10217, 10265,
+ 10313, 10362, 10410, 10459, 10508, 10557, 10606, 10655, 10704, 10754,
+ 10804, 10854, 10904, 10954, 11004, 11055, 11105, 11156, 11207, 11258,
+ 11310, 11361, 11413, 11464, 11516, 11568, 11620, 11673, 11725, 11778,
+ 11831, 11884, 11937, 11990, 12044, 12097, 12151, 12205, 12259, 12314,
+ 12368, 12423, 12477, 12532, 12587, 12643, 12698, 12754, 12809, 12865,
+ 12921, 12977, 13034, 13090, 13147, 13204, 13261, 13318, 13375, 13433,
+ 13491, 13548, 13606, 13665, 13723, 13781, 13840, 13899, 13958, 14017,
+ 14077, 14136, 14196, 14256, 14316, 14376, 14436, 14497, 14557, 14618,
+ 14679, 14740, 14802, 14863, 14925, 14987, 15049, 15111, 15173, 15236,
+ 15299, 15362, 15425, 15488, 15551, 15615, 15679, 15743, 15807, 15871,
+ 15935, 16000, 16065, 16130, 16195, 16260, 16326, 16392, 16457, 16523,
+ 16590, 16656, 16723, 16789, 16856, 16923, 16991, 17058, 17126, 17194,
+ 17261, 17330, 17398, 17467, 17535, 17604, 17673, 17742, 17812, 17881,
+ 17951, 18021, 18091, 18162, 18232, 18303, 18374, 18445, 18516, 18588,
+ 18659, 18731, 18803, 18875, 18947, 19020, 19093, 19166, 19239, 19312,
+ 19385, 19459, 19533, 19607, 19681, 19755, 19830, 19905, 19980, 20055,
+ 20130, 20206, 20281, 20357, 20433, 20510, 20586, 20663, 20740, 20817,
+ 20894, 20971, 21049, 21127, 21205, 21283, 21361, 21440, 21519, 21598,
+ 21677, 21756, 21836, 21915, 21995, 22075, 22156, 22236, 22317, 22398,
+ 22479, 22560, 22642, 22723, 22805, 22887, 22969, 23052, 23135, 23217,
+ 23300, 23384, 23467, 23551, 23635, 23719, 23803, 23887, 23972, 24057,
+ 24142, 24227, 24313, 24398, 24484, 24570, 24656, 24743, 24829, 24916,
+ 25003, 25091, 25178, 25266, 25354, 25442, 25530, 25618, 25707, 25796,
+ 25885, 25974, 26064, 26153, 26243, 26334, 26424, 26514, 26605, 26696,
+ 26787, 26879, 26970, 27062, 27154, 27246, 27338, 27431, 27524, 27617,
+ 27710, 27804, 27897, 27991, 28085, 28179, 28274, 28369, 28463, 28559,
+ 28654, 28749, 28845, 28941, 29037, 29134, 29230, 29327, 29424, 29521,
+ 29619, 29717, 29815, 29913, 30011, 30110, 30208, 30307, 30406, 30506,
+ 30605, 30705, 30805, 30906, 31006, 31107, 31208, 31309, 31410, 31512,
+ 31614, 31716, 31818, 31920, 32023, 32126, 32229, 32332, 32436, 32540,
+ 32644, 32748, 32852, 32957, 33062, 33167, 33272, 33378, 33484, 33590,
+ 33696, 33802, 33909, 34016, 34123, 34230, 34338, 34446, 34554, 34662,
+ 34770, 34879, 34988, 35097, 35206, 35316, 35426, 35536, 35646, 35757,
+ 35867, 35978, 36090, 36201, 36313, 36425, 36537, 36649, 36762, 36874,
+ 36987, 37101, 37214, 37328, 37442, 37556, 37671, 37785, 37900, 38015,
+ 38131, 38246, 38362, 38478, 38594, 38711, 38828, 38945, 39062, 39179,
+ 39297, 39415, 39533, 39651, 39770, 39889, 40008, 40127, 40247, 40367,
+ 40487, 40607, 40728, 40848, 40969, 41091, 41212, 41334, 41456, 41578,
+ 41700, 41823, 41946, 42069, 42193, 42316, 42440, 42564, 42689, 42813,
+ 42938, 43063, 43189, 43314, 43440, 43566, 43692, 43819, 43946, 44073,
+ 44200, 44328, 44456, 44584, 44712, 44840, 44969, 45098, 45227, 45357,
+ 45487, 45617, 45747, 45877, 46008, 46139, 46270, 46402, 46534, 46666,
+ 46798, 46930, 47063, 47196, 47329, 47463, 47596, 47730, 47865, 47999,
+ 48134, 48269, 48404, 48540, 48675, 48811, 48948, 49084, 49221, 49358,
+ 49495, 49633, 49771, 49909, 50047, 50185, 50324, 50463, 50603, 50742,
+ 50882, 51022, 51162, 51303, 51444, 51585, 51726, 51868, 52010, 52152,
+ 52294, 52437, 52580, 52723, 52867, 53010, 53154, 53299, 53443, 53588,
+ 53733, 53878, 54024, 54169, 54315, 54462, 54608, 54755, 54902, 55050,
+ 55197, 55345, 55493, 55642, 55790, 55939, 56089, 56238, 56388, 56538,
+ 56688, 56839, 56989, 57140, 57292, 57443, 57595, 57747, 57900, 58053,
+ 58205, 58359, 58512, 58666, 58820, 58974, 59129, 59284, 59439, 59594,
+ 59750, 59906, 60062, 60218, 60375, 60532, 60689, 60847, 61005, 61163,
+ 61321, 61480, 61639, 61798, 61957, 62117, 62277, 62437, 62598, 62759,
+ 62920, 63081, 63243, 63405, 63567, 63729, 63892, 64055, 64219, 64382,
+ 64546, 64710, 64875, 65039, 65204, 65369, 65535,
+};
+
struct pwm_bl_data {
struct pwm_device *pwm;
struct device *dev;
@@ -38,6 +144,7 @@ struct pwm_bl_data {
unsigned int scale;
bool legacy;
bool piecewise;
+ bool use_lth_table;
int (*notify)(struct device *,
int brightness);
void (*notify_after)(struct device *,
@@ -104,6 +211,8 @@ static int compute_duty_cycle(struct pwm_bl_data *pb, int brightness)
} else {
duty_cycle = scale(pb, pb->levels[brightness]);
}
+ } else if (pb->use_lth_table) {
+ duty_cycle = cie1931_table[brightness];
} else {
duty_cycle = scale(pb, brightness);
}
@@ -169,9 +278,9 @@ static int pwm_backlight_parse_dt(struct device *dev,
/* determine the number of brightness levels */
prop = of_find_property(node, "brightness-levels", &length);
if (!prop)
- return -EINVAL;
-
- data->levels_count = length / sizeof(u32);
+ data->use_lth_table = true;
+ else
+ data->levels_count = length / sizeof(u32);
/* read brightness levels from DT property */
if (data->levels_count > 0) {
@@ -181,24 +290,28 @@ static int pwm_backlight_parse_dt(struct device *dev,
if (!data->levels)
return -ENOMEM;
- ret = of_property_read_u32_array(node, "brightness-levels",
- data->levels,
- data->levels_count);
- if (ret < 0)
- return ret;
-
- ret = of_property_read_u32(node, "default-brightness-level",
- &value);
- if (ret < 0)
- return ret;
+ if (prop) {
+ ret = of_property_read_u32_array(node,
+ "brightness-levels",
+ data->levels,
+ data->levels_count);
+ if (ret < 0)
+ return ret;
+ }
data->piecewise = of_property_read_bool(node,
"use-linear-interpolation");
- data->dft_brightness = value;
data->levels_count--;
}
+ ret = of_property_read_u32(node, "default-brightness-level",
+ &value);
+ if (ret < 0)
+ return ret;
+
+ data->dft_brightness = value;
+
if (data->piecewise)
data->max_brightness = data->levels_count * NSTEPS;
else
@@ -260,8 +373,10 @@ static int pwm_backlight_probe(struct platform_device *pdev)
struct backlight_device *bl;
struct device_node *node = pdev->dev.of_node;
struct pwm_bl_data *pb;
+ struct pwm_state state;
struct pwm_args pargs;
int ret;
+ int i;
if (!data) {
ret = pwm_backlight_parse_dt(&pdev->dev, &defdata);
@@ -303,6 +418,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
pb->dev = &pdev->dev;
pb->enabled = false;
pb->piecewise = data->piecewise;
+ pb->use_lth_table = data->use_lth_table;
pb->enable_gpio = devm_gpiod_get_optional(&pdev->dev, "enable",
GPIOD_ASIS);
@@ -361,6 +477,22 @@ static int pwm_backlight_probe(struct platform_device *pdev)
dev_dbg(&pdev->dev, "got pwm for backlight\n");
+ if (pb->use_lth_table) {
+ /* Get PWM resolution */
+ pwm_get_state(pb->pwm, &state);
+ if (state.period > 65535) {
+ dev_err(&pdev->dev, "PWM resolution not supported\n");
+ goto err_alloc;
+ }
+ /* Find the number of steps based on the PWM resolution */
+ for (i = 0; i < ARRAY_SIZE(cie1931_table); i++)
+ if (cie1931_table[i] >= state.period) {
+ data->max_brightness = i;
+ break;
+ }
+ pb->scale = data->max_brightness;
+ }
+
/*
* FIXME: pwm_apply_args() should be removed when switching to
* the atomic PWM API.
diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h
index 444a91b..4ec3b0d 100644
--- a/include/linux/pwm_backlight.h
+++ b/include/linux/pwm_backlight.h
@@ -15,6 +15,7 @@ struct platform_pwm_backlight_data {
unsigned int pwm_period_ns;
unsigned int *levels;
unsigned int levels_count;
+ bool use_lth_table;
bool piecewise;
/* TODO remove once all users are switched to gpiod_* API */
int enable_gpio;
--
2.9.3
--
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^ permalink raw reply related
* [RFC v2 1/2] backlight: pwm_bl: linear interpolation between values of brightness-levels
From: Enric Balletbo i Serra @ 2017-11-16 14:11 UTC (permalink / raw)
To: Daniel Thompson
Cc: Jingoo Han, Richard Purdie, Jacek Anaszewski, Pavel Machek,
Rob Herring, Doug Anderson, Brian Norris, Guenter Roeck,
Lee Jones, Alexandru Stan, linux-leds, devicetree, linux-kernel
In-Reply-To: <20171116141151.21171-1-enric.balletbo@collabora.com>
Setting use-linear-interpolation in the dts will allow you to have linear
interpolation between values of brightness-levels.
There are now 256 between each of the values of brightness-levels. If
something is requested halfway between 2 values, we'll use linear
interpolation.
This way a high resolution pwm duty cycle can be used without having to
list out every possible value in the dts. This system also allows for
gamma corrected values (eg: "brightness-levels = <0 2 4 8 16 32>;").
Patch based on the Alexandru M Stan work done for ChromeOS kernels.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
.../bindings/leds/backlight/pwm-backlight.txt | 2 +
drivers/video/backlight/pwm_bl.c | 55 +++++++++++++++++-----
include/linux/pwm_backlight.h | 2 +
3 files changed, 47 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt b/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
index 764db86..7c48f20 100644
--- a/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
+++ b/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
@@ -17,6 +17,8 @@ Optional properties:
"pwms" property (see PWM binding[0])
- enable-gpios: contains a single GPIO specifier for the GPIO which enables
and disables the backlight (see GPIO binding[1])
+ - use-linear-interpolation: set this propriety to enable linear interpolation
+ between each of the values of brightness-levels.
[0]: Documentation/devicetree/bindings/pwm/pwm.txt
[1]: Documentation/devicetree/bindings/gpio/gpio.txt
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 9bd1768..59b1bfb 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -24,6 +24,8 @@
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
+#define NSTEPS 256
+
struct pwm_bl_data {
struct pwm_device *pwm;
struct device *dev;
@@ -35,6 +37,7 @@ struct pwm_bl_data {
struct gpio_desc *enable_gpio;
unsigned int scale;
bool legacy;
+ bool piecewise;
int (*notify)(struct device *,
int brightness);
void (*notify_after)(struct device *,
@@ -76,17 +79,36 @@ static void pwm_backlight_power_off(struct pwm_bl_data *pb)
pb->enabled = false;
}
-static int compute_duty_cycle(struct pwm_bl_data *pb, int brightness)
+static int scale(struct pwm_bl_data *pb, int x)
{
unsigned int lth = pb->lth_brightness;
+
+ return (x * (pb->period - lth) / pb->scale) + lth;
+}
+
+static int compute_duty_cycle(struct pwm_bl_data *pb, int brightness)
+{
+ int coarse = brightness / NSTEPS;
+ int fine = brightness % NSTEPS;
int duty_cycle;
- if (pb->levels)
- duty_cycle = pb->levels[brightness];
- else
- duty_cycle = brightness;
+ if (pb->levels) {
+ if (pb->piecewise) {
+ duty_cycle = scale(pb, pb->levels[coarse]);
+ if (fine > 0)
+ duty_cycle += (scale(pb, pb->levels[coarse + 1])
+ - scale(pb, pb->levels[coarse]))
+ * fine / NSTEPS;
+ dev_dbg(pb->dev, "brightness=%d coarse=%d fine=%d\n",
+ brightness, coarse, fine);
+ } else {
+ duty_cycle = scale(pb, pb->levels[brightness]);
+ }
+ } else {
+ duty_cycle = scale(pb, brightness);
+ }
- return (duty_cycle * (pb->period - lth) / pb->scale) + lth;
+ return duty_cycle;
}
static int pwm_backlight_update_status(struct backlight_device *bl)
@@ -149,11 +171,11 @@ static int pwm_backlight_parse_dt(struct device *dev,
if (!prop)
return -EINVAL;
- data->max_brightness = length / sizeof(u32);
+ data->levels_count = length / sizeof(u32);
/* read brightness levels from DT property */
- if (data->max_brightness > 0) {
- size_t size = sizeof(*data->levels) * data->max_brightness;
+ if (data->levels_count > 0) {
+ size_t size = sizeof(*data->levels) * data->levels_count;
data->levels = devm_kzalloc(dev, size, GFP_KERNEL);
if (!data->levels)
@@ -161,7 +183,7 @@ static int pwm_backlight_parse_dt(struct device *dev,
ret = of_property_read_u32_array(node, "brightness-levels",
data->levels,
- data->max_brightness);
+ data->levels_count);
if (ret < 0)
return ret;
@@ -170,10 +192,18 @@ static int pwm_backlight_parse_dt(struct device *dev,
if (ret < 0)
return ret;
+ data->piecewise = of_property_read_bool(node,
+ "use-linear-interpolation");
+
data->dft_brightness = value;
- data->max_brightness--;
+ data->levels_count--;
}
+ if (data->piecewise)
+ data->max_brightness = data->levels_count * NSTEPS;
+ else
+ data->max_brightness = data->levels_count;
+
data->enable_gpio = -EINVAL;
return 0;
}
@@ -258,7 +288,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
if (data->levels) {
unsigned int i;
- for (i = 0; i <= data->max_brightness; i++)
+ for (i = 0; i <= data->levels_count; i++)
if (data->levels[i] > pb->scale)
pb->scale = data->levels[i];
@@ -272,6 +302,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
pb->exit = data->exit;
pb->dev = &pdev->dev;
pb->enabled = false;
+ pb->piecewise = data->piecewise;
pb->enable_gpio = devm_gpiod_get_optional(&pdev->dev, "enable",
GPIOD_ASIS);
diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h
index e8afbd7..444a91b 100644
--- a/include/linux/pwm_backlight.h
+++ b/include/linux/pwm_backlight.h
@@ -14,6 +14,8 @@ struct platform_pwm_backlight_data {
unsigned int lth_brightness;
unsigned int pwm_period_ns;
unsigned int *levels;
+ unsigned int levels_count;
+ bool piecewise;
/* TODO remove once all users are switched to gpiod_* API */
int enable_gpio;
int (*init)(struct device *dev);
--
2.9.3
^ permalink raw reply related
* [RFC v2 0/2] backlight: pwm_bl: support linear brightness to human eye
From: Enric Balletbo i Serra @ 2017-11-16 14:11 UTC (permalink / raw)
To: Daniel Thompson
Cc: Jingoo Han, Richard Purdie, Jacek Anaszewski, Pavel Machek,
Rob Herring, Doug Anderson, Brian Norris, Guenter Roeck,
Lee Jones, Alexandru Stan, linux-leds, devicetree, linux-kernel
Dear all,
This patch series is a second RFC to know your opinion about the way to
solve the problems exposed in the first RFC [1]
The first patch what tries to solve is the problem of granularity for high
resolution PWMs. The idea is simple interpolate between 2 brightness values
so we can have a high PWM duty cycle (a 16 bits PWM is up to 65535 possible
steps) without having to list out every possible value in the dts. I think
that this patch is required to not break backward compability, to be more
flexible and also extend the functionality to be able to use high resolution
PWM with enough steps to have a good UI experience in userspace.
The second patch is a bit more ambicious, the idea is let decide the driver
the brightness-levels required in function of the PWM resolution. To do this
we use a static table filled with the CIE 1931 algorithm values to convert
brightness to PWM duty cycle.
More detailed info is available in the commit message of every patch.
A couple of questions come to my mind:
- What's the amoung of steps we really need? Currently there is 1024 steps
for a resolution of 16 bits, and 37 steps for a PWM with 8 bits of
resolution. That seems to work well with both 16 bits and 8 bits. Tested
on a Samsung Chromebook Plus (16 bits) and a SL50 device (8 bits)
- What about 32 bits or greather resolutions? We need to support it?
I did a quick look and seems nobody requires it, but I don't really know.
For now if we set more than 16 bits of resolution the driver triggers
an error.
Waiting for your feedback.
Chances since v1:
- Add linear interpolation for high resolution PWM.
- Get rid of fixed point calculations and use a table instead.
[1] http://www.spinics.net/lists/devicetree/msg193262.html
Best regards,
Enric Balletbo i Serra (2):
backlight: pwm_bl: linear interpolation between values of
brightness-levels
backlight: pwm_bl: compute brightness of LED linearly to human eye.
.../bindings/leds/backlight/pwm-backlight.txt | 2 +
drivers/video/backlight/pwm_bl.c | 209 ++++++++++++++++++---
include/linux/pwm_backlight.h | 3 +
3 files changed, 191 insertions(+), 23 deletions(-)
--
2.9.3
^ permalink raw reply
* [PATCH] dt-bindings: remove file that was added accidentally
From: Rob Clark @ 2017-11-16 14:05 UTC (permalink / raw)
To: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Dave Airlie, Jordan Crouse, Rob Herring, Rob Clark, Rob Herring,
Mark Rutland, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
I think this snuck in when I applied the patch for f97decac5f4c (didn't
apply cleanly, required some manual applying + git-add). It is unused
and shouldn't be here. My bad.
Fixes: f97decac5f4c "drm/msm: Support multiple ringbuffers"
Signed-off-by: Rob Clark <robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
include/dt-bindings/msm/msm-bus-ids.h | 887 ----------------------------------
1 file changed, 887 deletions(-)
delete mode 100644 include/dt-bindings/msm/msm-bus-ids.h
diff --git a/include/dt-bindings/msm/msm-bus-ids.h b/include/dt-bindings/msm/msm-bus-ids.h
deleted file mode 100644
index a75d304473d5..000000000000
--- a/include/dt-bindings/msm/msm-bus-ids.h
+++ /dev/null
@@ -1,887 +0,0 @@
-/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __MSM_BUS_IDS_H
-#define __MSM_BUS_IDS_H
-
-/* Aggregation types */
-#define AGG_SCHEME_NONE 0
-#define AGG_SCHEME_LEG 1
-#define AGG_SCHEME_1 2
-
-/* Topology related enums */
-#define MSM_BUS_FAB_DEFAULT 0
-#define MSM_BUS_FAB_APPSS 0
-#define MSM_BUS_FAB_SYSTEM 1024
-#define MSM_BUS_FAB_MMSS 2048
-#define MSM_BUS_FAB_SYSTEM_FPB 3072
-#define MSM_BUS_FAB_CPSS_FPB 4096
-
-#define MSM_BUS_FAB_BIMC 0
-#define MSM_BUS_FAB_SYS_NOC 1024
-#define MSM_BUS_FAB_MMSS_NOC 2048
-#define MSM_BUS_FAB_OCMEM_NOC 3072
-#define MSM_BUS_FAB_PERIPH_NOC 4096
-#define MSM_BUS_FAB_CONFIG_NOC 5120
-#define MSM_BUS_FAB_OCMEM_VNOC 6144
-#define MSM_BUS_FAB_MMSS_AHB 2049
-#define MSM_BUS_FAB_A0_NOC 6145
-#define MSM_BUS_FAB_A1_NOC 6146
-#define MSM_BUS_FAB_A2_NOC 6147
-#define MSM_BUS_FAB_GNOC 6148
-#define MSM_BUS_FAB_CR_VIRT 6149
-
-#define MSM_BUS_MASTER_FIRST 1
-#define MSM_BUS_MASTER_AMPSS_M0 1
-#define MSM_BUS_MASTER_AMPSS_M1 2
-#define MSM_BUS_APPSS_MASTER_FAB_MMSS 3
-#define MSM_BUS_APPSS_MASTER_FAB_SYSTEM 4
-#define MSM_BUS_SYSTEM_MASTER_FAB_APPSS 5
-#define MSM_BUS_MASTER_SPS 6
-#define MSM_BUS_MASTER_ADM_PORT0 7
-#define MSM_BUS_MASTER_ADM_PORT1 8
-#define MSM_BUS_SYSTEM_MASTER_ADM1_PORT0 9
-#define MSM_BUS_MASTER_ADM1_PORT1 10
-#define MSM_BUS_MASTER_LPASS_PROC 11
-#define MSM_BUS_MASTER_MSS_PROCI 12
-#define MSM_BUS_MASTER_MSS_PROCD 13
-#define MSM_BUS_MASTER_MSS_MDM_PORT0 14
-#define MSM_BUS_MASTER_LPASS 15
-#define MSM_BUS_SYSTEM_MASTER_CPSS_FPB 16
-#define MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB 17
-#define MSM_BUS_SYSTEM_MASTER_MMSS_FPB 18
-#define MSM_BUS_MASTER_ADM1_CI 19
-#define MSM_BUS_MASTER_ADM0_CI 20
-#define MSM_BUS_MASTER_MSS_MDM_PORT1 21
-#define MSM_BUS_MASTER_MDP_PORT0 22
-#define MSM_BUS_MASTER_MDP_PORT1 23
-#define MSM_BUS_MMSS_MASTER_ADM1_PORT0 24
-#define MSM_BUS_MASTER_ROTATOR 25
-#define MSM_BUS_MASTER_GRAPHICS_3D 26
-#define MSM_BUS_MASTER_JPEG_DEC 27
-#define MSM_BUS_MASTER_GRAPHICS_2D_CORE0 28
-#define MSM_BUS_MASTER_VFE 29
-#define MSM_BUS_MASTER_VFE0 MSM_BUS_MASTER_VFE
-#define MSM_BUS_MASTER_VPE 30
-#define MSM_BUS_MASTER_JPEG_ENC 31
-#define MSM_BUS_MASTER_GRAPHICS_2D_CORE1 32
-#define MSM_BUS_MMSS_MASTER_APPS_FAB 33
-#define MSM_BUS_MASTER_HD_CODEC_PORT0 34
-#define MSM_BUS_MASTER_HD_CODEC_PORT1 35
-#define MSM_BUS_MASTER_SPDM 36
-#define MSM_BUS_MASTER_RPM 37
-#define MSM_BUS_MASTER_MSS 38
-#define MSM_BUS_MASTER_RIVA 39
-#define MSM_BUS_MASTER_SNOC_VMEM 40
-#define MSM_BUS_MASTER_MSS_SW_PROC 41
-#define MSM_BUS_MASTER_MSS_FW_PROC 42
-#define MSM_BUS_MASTER_HMSS 43
-#define MSM_BUS_MASTER_GSS_NAV 44
-#define MSM_BUS_MASTER_PCIE 45
-#define MSM_BUS_MASTER_SATA 46
-#define MSM_BUS_MASTER_CRYPTO 47
-#define MSM_BUS_MASTER_VIDEO_CAP 48
-#define MSM_BUS_MASTER_GRAPHICS_3D_PORT1 49
-#define MSM_BUS_MASTER_VIDEO_ENC 50
-#define MSM_BUS_MASTER_VIDEO_DEC 51
-#define MSM_BUS_MASTER_LPASS_AHB 52
-#define MSM_BUS_MASTER_QDSS_BAM 53
-#define MSM_BUS_MASTER_SNOC_CFG 54
-#define MSM_BUS_MASTER_CRYPTO_CORE0 55
-#define MSM_BUS_MASTER_CRYPTO_CORE1 56
-#define MSM_BUS_MASTER_MSS_NAV 57
-#define MSM_BUS_MASTER_OCMEM_DMA 58
-#define MSM_BUS_MASTER_WCSS 59
-#define MSM_BUS_MASTER_QDSS_ETR 60
-#define MSM_BUS_MASTER_USB3 61
-#define MSM_BUS_MASTER_JPEG 62
-#define MSM_BUS_MASTER_VIDEO_P0 63
-#define MSM_BUS_MASTER_VIDEO_P1 64
-#define MSM_BUS_MASTER_MSS_PROC 65
-#define MSM_BUS_MASTER_JPEG_OCMEM 66
-#define MSM_BUS_MASTER_MDP_OCMEM 67
-#define MSM_BUS_MASTER_VIDEO_P0_OCMEM 68
-#define MSM_BUS_MASTER_VIDEO_P1_OCMEM 69
-#define MSM_BUS_MASTER_VFE_OCMEM 70
-#define MSM_BUS_MASTER_CNOC_ONOC_CFG 71
-#define MSM_BUS_MASTER_RPM_INST 72
-#define MSM_BUS_MASTER_RPM_DATA 73
-#define MSM_BUS_MASTER_RPM_SYS 74
-#define MSM_BUS_MASTER_DEHR 75
-#define MSM_BUS_MASTER_QDSS_DAP 76
-#define MSM_BUS_MASTER_TIC 77
-#define MSM_BUS_MASTER_SDCC_1 78
-#define MSM_BUS_MASTER_SDCC_3 79
-#define MSM_BUS_MASTER_SDCC_4 80
-#define MSM_BUS_MASTER_SDCC_2 81
-#define MSM_BUS_MASTER_TSIF 82
-#define MSM_BUS_MASTER_BAM_DMA 83
-#define MSM_BUS_MASTER_BLSP_2 84
-#define MSM_BUS_MASTER_USB_HSIC 85
-#define MSM_BUS_MASTER_BLSP_1 86
-#define MSM_BUS_MASTER_USB_HS 87
-#define MSM_BUS_MASTER_PNOC_CFG 88
-#define MSM_BUS_MASTER_V_OCMEM_GFX3D 89
-#define MSM_BUS_MASTER_IPA 90
-#define MSM_BUS_MASTER_QPIC 91
-#define MSM_BUS_MASTER_MDPE 92
-#define MSM_BUS_MASTER_USB_HS2 93
-#define MSM_BUS_MASTER_VPU 94
-#define MSM_BUS_MASTER_UFS 95
-#define MSM_BUS_MASTER_BCAST 96
-#define MSM_BUS_MASTER_CRYPTO_CORE2 97
-#define MSM_BUS_MASTER_EMAC 98
-#define MSM_BUS_MASTER_VPU_1 99
-#define MSM_BUS_MASTER_PCIE_1 100
-#define MSM_BUS_MASTER_USB3_1 101
-#define MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG 102
-#define MSM_BUS_MASTER_CNOC_MNOC_CFG 103
-#define MSM_BUS_MASTER_TCU_0 104
-#define MSM_BUS_MASTER_TCU_1 105
-#define MSM_BUS_MASTER_CPP 106
-#define MSM_BUS_MASTER_AUDIO 107
-#define MSM_BUS_MASTER_PCIE_2 108
-#define MSM_BUS_MASTER_VFE1 109
-#define MSM_BUS_MASTER_XM_USB_HS1 110
-#define MSM_BUS_MASTER_PCNOC_BIMC_1 111
-#define MSM_BUS_MASTER_BIMC_PCNOC 112
-#define MSM_BUS_MASTER_XI_USB_HSIC 113
-#define MSM_BUS_MASTER_SGMII 114
-#define MSM_BUS_SPMI_FETCHER 115
-#define MSM_BUS_MASTER_GNOC_BIMC 116
-#define MSM_BUS_MASTER_CRVIRT_A2NOC 117
-#define MSM_BUS_MASTER_CNOC_A2NOC 118
-#define MSM_BUS_MASTER_WLAN 119
-#define MSM_BUS_MASTER_MSS_CE 120
-#define MSM_BUS_MASTER_CDSP_PROC 121
-#define MSM_BUS_MASTER_GNOC_SNOC 122
-#define MSM_BUS_MASTER_PIMEM 123
-#define MSM_BUS_MASTER_MASTER_LAST 124
-
-#define MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB
-#define MSM_BUS_CPSS_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_CPSS_FPB
-
-#define MSM_BUS_SNOC_MM_INT_0 10000
-#define MSM_BUS_SNOC_MM_INT_1 10001
-#define MSM_BUS_SNOC_MM_INT_2 10002
-#define MSM_BUS_SNOC_MM_INT_BIMC 10003
-#define MSM_BUS_SNOC_INT_0 10004
-#define MSM_BUS_SNOC_INT_1 10005
-#define MSM_BUS_SNOC_INT_BIMC 10006
-#define MSM_BUS_SNOC_BIMC_0_MAS 10007
-#define MSM_BUS_SNOC_BIMC_1_MAS 10008
-#define MSM_BUS_SNOC_QDSS_INT 10009
-#define MSM_BUS_PNOC_SNOC_MAS 10010
-#define MSM_BUS_PNOC_SNOC_SLV 10011
-#define MSM_BUS_PNOC_INT_0 10012
-#define MSM_BUS_PNOC_INT_1 10013
-#define MSM_BUS_PNOC_M_0 10014
-#define MSM_BUS_PNOC_M_1 10015
-#define MSM_BUS_BIMC_SNOC_MAS 10016
-#define MSM_BUS_BIMC_SNOC_SLV 10017
-#define MSM_BUS_PNOC_SLV_0 10018
-#define MSM_BUS_PNOC_SLV_1 10019
-#define MSM_BUS_PNOC_SLV_2 10020
-#define MSM_BUS_PNOC_SLV_3 10021
-#define MSM_BUS_PNOC_SLV_4 10022
-#define MSM_BUS_PNOC_SLV_8 10023
-#define MSM_BUS_PNOC_SLV_9 10024
-#define MSM_BUS_SNOC_BIMC_0_SLV 10025
-#define MSM_BUS_SNOC_BIMC_1_SLV 10026
-#define MSM_BUS_MNOC_BIMC_MAS 10027
-#define MSM_BUS_MNOC_BIMC_SLV 10028
-#define MSM_BUS_BIMC_MNOC_MAS 10029
-#define MSM_BUS_BIMC_MNOC_SLV 10030
-#define MSM_BUS_SNOC_BIMC_MAS 10031
-#define MSM_BUS_SNOC_BIMC_SLV 10032
-#define MSM_BUS_CNOC_SNOC_MAS 10033
-#define MSM_BUS_CNOC_SNOC_SLV 10034
-#define MSM_BUS_SNOC_CNOC_MAS 10035
-#define MSM_BUS_SNOC_CNOC_SLV 10036
-#define MSM_BUS_OVNOC_SNOC_MAS 10037
-#define MSM_BUS_OVNOC_SNOC_SLV 10038
-#define MSM_BUS_SNOC_OVNOC_MAS 10039
-#define MSM_BUS_SNOC_OVNOC_SLV 10040
-#define MSM_BUS_SNOC_PNOC_MAS 10041
-#define MSM_BUS_SNOC_PNOC_SLV 10042
-#define MSM_BUS_BIMC_INT_APPS_EBI 10043
-#define MSM_BUS_BIMC_INT_APPS_SNOC 10044
-#define MSM_BUS_SNOC_BIMC_2_MAS 10045
-#define MSM_BUS_SNOC_BIMC_2_SLV 10046
-#define MSM_BUS_PNOC_SLV_5 10047
-#define MSM_BUS_PNOC_SLV_7 10048
-#define MSM_BUS_PNOC_INT_2 10049
-#define MSM_BUS_PNOC_INT_3 10050
-#define MSM_BUS_PNOC_INT_4 10051
-#define MSM_BUS_PNOC_INT_5 10052
-#define MSM_BUS_PNOC_INT_6 10053
-#define MSM_BUS_PNOC_INT_7 10054
-#define MSM_BUS_BIMC_SNOC_1_MAS 10055
-#define MSM_BUS_BIMC_SNOC_1_SLV 10056
-#define MSM_BUS_PNOC_A1NOC_MAS 10057
-#define MSM_BUS_PNOC_A1NOC_SLV 10058
-#define MSM_BUS_CNOC_A1NOC_MAS 10059
-#define MSM_BUS_A0NOC_SNOC_MAS 10060
-#define MSM_BUS_A0NOC_SNOC_SLV 10061
-#define MSM_BUS_A1NOC_SNOC_SLV 10062
-#define MSM_BUS_A1NOC_SNOC_MAS 10063
-#define MSM_BUS_A2NOC_SNOC_MAS 10064
-#define MSM_BUS_A2NOC_SNOC_SLV 10065
-#define MSM_BUS_SNOC_INT_2 10066
-#define MSM_BUS_A0NOC_QDSS_INT 10067
-#define MSM_BUS_INT_LAST 10068
-
-#define MSM_BUS_INT_TEST_ID 20000
-#define MSM_BUS_INT_TEST_LAST 20050
-
-#define MSM_BUS_SLAVE_FIRST 512
-#define MSM_BUS_SLAVE_EBI_CH0 512
-#define MSM_BUS_SLAVE_EBI_CH1 513
-#define MSM_BUS_SLAVE_AMPSS_L2 514
-#define MSM_BUS_APPSS_SLAVE_FAB_MMSS 515
-#define MSM_BUS_APPSS_SLAVE_FAB_SYSTEM 516
-#define MSM_BUS_SYSTEM_SLAVE_FAB_APPS 517
-#define MSM_BUS_SLAVE_SPS 518
-#define MSM_BUS_SLAVE_SYSTEM_IMEM 519
-#define MSM_BUS_SLAVE_AMPSS 520
-#define MSM_BUS_SLAVE_MSS 521
-#define MSM_BUS_SLAVE_LPASS 522
-#define MSM_BUS_SYSTEM_SLAVE_CPSS_FPB 523
-#define MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB 524
-#define MSM_BUS_SYSTEM_SLAVE_MMSS_FPB 525
-#define MSM_BUS_SLAVE_CORESIGHT 526
-#define MSM_BUS_SLAVE_RIVA 527
-#define MSM_BUS_SLAVE_SMI 528
-#define MSM_BUS_MMSS_SLAVE_FAB_APPS 529
-#define MSM_BUS_MMSS_SLAVE_FAB_APPS_1 530
-#define MSM_BUS_SLAVE_MM_IMEM 531
-#define MSM_BUS_SLAVE_CRYPTO 532
-#define MSM_BUS_SLAVE_SPDM 533
-#define MSM_BUS_SLAVE_RPM 534
-#define MSM_BUS_SLAVE_RPM_MSG_RAM 535
-#define MSM_BUS_SLAVE_MPM 536
-#define MSM_BUS_SLAVE_PMIC1_SSBI1_A 537
-#define MSM_BUS_SLAVE_PMIC1_SSBI1_B 538
-#define MSM_BUS_SLAVE_PMIC1_SSBI1_C 539
-#define MSM_BUS_SLAVE_PMIC2_SSBI2_A 540
-#define MSM_BUS_SLAVE_PMIC2_SSBI2_B 541
-#define MSM_BUS_SLAVE_GSBI1_UART 542
-#define MSM_BUS_SLAVE_GSBI2_UART 543
-#define MSM_BUS_SLAVE_GSBI3_UART 544
-#define MSM_BUS_SLAVE_GSBI4_UART 545
-#define MSM_BUS_SLAVE_GSBI5_UART 546
-#define MSM_BUS_SLAVE_GSBI6_UART 547
-#define MSM_BUS_SLAVE_GSBI7_UART 548
-#define MSM_BUS_SLAVE_GSBI8_UART 549
-#define MSM_BUS_SLAVE_GSBI9_UART 550
-#define MSM_BUS_SLAVE_GSBI10_UART 551
-#define MSM_BUS_SLAVE_GSBI11_UART 552
-#define MSM_BUS_SLAVE_GSBI12_UART 553
-#define MSM_BUS_SLAVE_GSBI1_QUP 554
-#define MSM_BUS_SLAVE_GSBI2_QUP 555
-#define MSM_BUS_SLAVE_GSBI3_QUP 556
-#define MSM_BUS_SLAVE_GSBI4_QUP 557
-#define MSM_BUS_SLAVE_GSBI5_QUP 558
-#define MSM_BUS_SLAVE_GSBI6_QUP 559
-#define MSM_BUS_SLAVE_GSBI7_QUP 560
-#define MSM_BUS_SLAVE_GSBI8_QUP 561
-#define MSM_BUS_SLAVE_GSBI9_QUP 562
-#define MSM_BUS_SLAVE_GSBI10_QUP 563
-#define MSM_BUS_SLAVE_GSBI11_QUP 564
-#define MSM_BUS_SLAVE_GSBI12_QUP 565
-#define MSM_BUS_SLAVE_EBI2_NAND 566
-#define MSM_BUS_SLAVE_EBI2_CS0 567
-#define MSM_BUS_SLAVE_EBI2_CS1 568
-#define MSM_BUS_SLAVE_EBI2_CS2 569
-#define MSM_BUS_SLAVE_EBI2_CS3 570
-#define MSM_BUS_SLAVE_EBI2_CS4 571
-#define MSM_BUS_SLAVE_EBI2_CS5 572
-#define MSM_BUS_SLAVE_USB_FS1 573
-#define MSM_BUS_SLAVE_USB_FS2 574
-#define MSM_BUS_SLAVE_TSIF 575
-#define MSM_BUS_SLAVE_MSM_TSSC 576
-#define MSM_BUS_SLAVE_MSM_PDM 577
-#define MSM_BUS_SLAVE_MSM_DIMEM 578
-#define MSM_BUS_SLAVE_MSM_TCSR 579
-#define MSM_BUS_SLAVE_MSM_PRNG 580
-#define MSM_BUS_SLAVE_GSS 581
-#define MSM_BUS_SLAVE_SATA 582
-#define MSM_BUS_SLAVE_USB3 583
-#define MSM_BUS_SLAVE_WCSS 584
-#define MSM_BUS_SLAVE_OCIMEM 585
-#define MSM_BUS_SLAVE_SNOC_OCMEM 586
-#define MSM_BUS_SLAVE_SERVICE_SNOC 587
-#define MSM_BUS_SLAVE_QDSS_STM 588
-#define MSM_BUS_SLAVE_CAMERA_CFG 589
-#define MSM_BUS_SLAVE_DISPLAY_CFG 590
-#define MSM_BUS_SLAVE_OCMEM_CFG 591
-#define MSM_BUS_SLAVE_CPR_CFG 592
-#define MSM_BUS_SLAVE_CPR_XPU_CFG 593
-#define MSM_BUS_SLAVE_MISC_CFG 594
-#define MSM_BUS_SLAVE_MISC_XPU_CFG 595
-#define MSM_BUS_SLAVE_VENUS_CFG 596
-#define MSM_BUS_SLAVE_MISC_VENUS_CFG 597
-#define MSM_BUS_SLAVE_GRAPHICS_3D_CFG 598
-#define MSM_BUS_SLAVE_MMSS_CLK_CFG 599
-#define MSM_BUS_SLAVE_MMSS_CLK_XPU_CFG 600
-#define MSM_BUS_SLAVE_MNOC_MPU_CFG 601
-#define MSM_BUS_SLAVE_ONOC_MPU_CFG 602
-#define MSM_BUS_SLAVE_SERVICE_MNOC 603
-#define MSM_BUS_SLAVE_OCMEM 604
-#define MSM_BUS_SLAVE_SERVICE_ONOC 605
-#define MSM_BUS_SLAVE_SDCC_1 606
-#define MSM_BUS_SLAVE_SDCC_3 607
-#define MSM_BUS_SLAVE_SDCC_2 608
-#define MSM_BUS_SLAVE_SDCC_4 609
-#define MSM_BUS_SLAVE_BAM_DMA 610
-#define MSM_BUS_SLAVE_BLSP_2 611
-#define MSM_BUS_SLAVE_USB_HSIC 612
-#define MSM_BUS_SLAVE_BLSP_1 613
-#define MSM_BUS_SLAVE_USB_HS 614
-#define MSM_BUS_SLAVE_PDM 615
-#define MSM_BUS_SLAVE_PERIPH_APU_CFG 616
-#define MSM_BUS_SLAVE_PNOC_MPU_CFG 617
-#define MSM_BUS_SLAVE_PRNG 618
-#define MSM_BUS_SLAVE_SERVICE_PNOC 619
-#define MSM_BUS_SLAVE_CLK_CTL 620
-#define MSM_BUS_SLAVE_CNOC_MSS 621
-#define MSM_BUS_SLAVE_SECURITY 622
-#define MSM_BUS_SLAVE_TCSR 623
-#define MSM_BUS_SLAVE_TLMM 624
-#define MSM_BUS_SLAVE_CRYPTO_0_CFG 625
-#define MSM_BUS_SLAVE_CRYPTO_1_CFG 626
-#define MSM_BUS_SLAVE_IMEM_CFG 627
-#define MSM_BUS_SLAVE_MESSAGE_RAM 628
-#define MSM_BUS_SLAVE_BIMC_CFG 629
-#define MSM_BUS_SLAVE_BOOT_ROM 630
-#define MSM_BUS_SLAVE_CNOC_MNOC_MMSS_CFG 631
-#define MSM_BUS_SLAVE_PMIC_ARB 632
-#define MSM_BUS_SLAVE_SPDM_WRAPPER 633
-#define MSM_BUS_SLAVE_DEHR_CFG 634
-#define MSM_BUS_SLAVE_QDSS_CFG 635
-#define MSM_BUS_SLAVE_RBCPR_CFG 636
-#define MSM_BUS_SLAVE_RBCPR_QDSS_APU_CFG 637
-#define MSM_BUS_SLAVE_SNOC_MPU_CFG 638
-#define MSM_BUS_SLAVE_CNOC_ONOC_CFG 639
-#define MSM_BUS_SLAVE_CNOC_MNOC_CFG 640
-#define MSM_BUS_SLAVE_PNOC_CFG 641
-#define MSM_BUS_SLAVE_SNOC_CFG 642
-#define MSM_BUS_SLAVE_EBI1_DLL_CFG 643
-#define MSM_BUS_SLAVE_PHY_APU_CFG 644
-#define MSM_BUS_SLAVE_EBI1_PHY_CFG 645
-#define MSM_BUS_SLAVE_SERVICE_CNOC 646
-#define MSM_BUS_SLAVE_IPS_CFG 647
-#define MSM_BUS_SLAVE_QPIC 648
-#define MSM_BUS_SLAVE_DSI_CFG 649
-#define MSM_BUS_SLAVE_UFS_CFG 650
-#define MSM_BUS_SLAVE_RBCPR_CX_CFG 651
-#define MSM_BUS_SLAVE_RBCPR_MX_CFG 652
-#define MSM_BUS_SLAVE_PCIE_CFG 653
-#define MSM_BUS_SLAVE_USB_PHYS_CFG 654
-#define MSM_BUS_SLAVE_VIDEO_CAP_CFG 655
-#define MSM_BUS_SLAVE_AVSYNC_CFG 656
-#define MSM_BUS_SLAVE_CRYPTO_2_CFG 657
-#define MSM_BUS_SLAVE_VPU_CFG 658
-#define MSM_BUS_SLAVE_BCAST_CFG 659
-#define MSM_BUS_SLAVE_KLM_CFG 660
-#define MSM_BUS_SLAVE_GENI_IR_CFG 661
-#define MSM_BUS_SLAVE_OCMEM_GFX 662
-#define MSM_BUS_SLAVE_CATS_128 663
-#define MSM_BUS_SLAVE_OCMEM_64 664
-#define MSM_BUS_SLAVE_PCIE_0 665
-#define MSM_BUS_SLAVE_PCIE_1 666
-#define MSM_BUS_SLAVE_PCIE_0_CFG 667
-#define MSM_BUS_SLAVE_PCIE_1_CFG 668
-#define MSM_BUS_SLAVE_SRVC_MNOC 669
-#define MSM_BUS_SLAVE_USB_HS2 670
-#define MSM_BUS_SLAVE_AUDIO 671
-#define MSM_BUS_SLAVE_TCU 672
-#define MSM_BUS_SLAVE_APPSS 673
-#define MSM_BUS_SLAVE_PCIE_PARF 674
-#define MSM_BUS_SLAVE_USB3_PHY_CFG 675
-#define MSM_BUS_SLAVE_IPA_CFG 676
-#define MSM_BUS_SLAVE_A0NOC_SNOC 677
-#define MSM_BUS_SLAVE_A1NOC_SNOC 678
-#define MSM_BUS_SLAVE_A2NOC_SNOC 679
-#define MSM_BUS_SLAVE_HMSS_L3 680
-#define MSM_BUS_SLAVE_PIMEM_CFG 681
-#define MSM_BUS_SLAVE_DCC_CFG 682
-#define MSM_BUS_SLAVE_QDSS_RBCPR_APU_CFG 683
-#define MSM_BUS_SLAVE_PCIE_2_CFG 684
-#define MSM_BUS_SLAVE_PCIE20_AHB2PHY 685
-#define MSM_BUS_SLAVE_A0NOC_CFG 686
-#define MSM_BUS_SLAVE_A1NOC_CFG 687
-#define MSM_BUS_SLAVE_A2NOC_CFG 688
-#define MSM_BUS_SLAVE_A1NOC_MPU_CFG 689
-#define MSM_BUS_SLAVE_A2NOC_MPU_CFG 690
-#define MSM_BUS_SLAVE_A0NOC_SMMU_CFG 691
-#define MSM_BUS_SLAVE_A1NOC_SMMU_CFG 692
-#define MSM_BUS_SLAVE_A2NOC_SMMU_CFG 693
-#define MSM_BUS_SLAVE_LPASS_SMMU_CFG 694
-#define MSM_BUS_SLAVE_MMAGIC_CFG 695
-#define MSM_BUS_SLAVE_VENUS_THROTTLE_CFG 696
-#define MSM_BUS_SLAVE_SSC_CFG 697
-#define MSM_BUS_SLAVE_DSA_CFG 698
-#define MSM_BUS_SLAVE_DSA_MPU_CFG 699
-#define MSM_BUS_SLAVE_DISPLAY_THROTTLE_CFG 700
-#define MSM_BUS_SLAVE_SMMU_CPP_CFG 701
-#define MSM_BUS_SLAVE_SMMU_JPEG_CFG 702
-#define MSM_BUS_SLAVE_SMMU_MDP_CFG 703
-#define MSM_BUS_SLAVE_SMMU_ROTATOR_CFG 704
-#define MSM_BUS_SLAVE_SMMU_VENUS_CFG 705
-#define MSM_BUS_SLAVE_SMMU_VFE_CFG 706
-#define MSM_BUS_SLAVE_A0NOC_MPU_CFG 707
-#define MSM_BUS_SLAVE_VMEM_CFG 708
-#define MSM_BUS_SLAVE_CAMERA_THROTTLE_CFG 709
-#define MSM_BUS_SLAVE_VMEM 710
-#define MSM_BUS_SLAVE_AHB2PHY 711
-#define MSM_BUS_SLAVE_PIMEM 712
-#define MSM_BUS_SLAVE_SNOC_VMEM 713
-#define MSM_BUS_SLAVE_PCIE_2 714
-#define MSM_BUS_SLAVE_RBCPR_MX 715
-#define MSM_BUS_SLAVE_RBCPR_CX 716
-#define MSM_BUS_SLAVE_BIMC_PCNOC 717
-#define MSM_BUS_SLAVE_PCNOC_BIMC_1 718
-#define MSM_BUS_SLAVE_SGMII 719
-#define MSM_BUS_SLAVE_SPMI_FETCHER 720
-#define MSM_BUS_PNOC_SLV_6 721
-#define MSM_BUS_SLAVE_MMSS_SMMU_CFG 722
-#define MSM_BUS_SLAVE_WLAN 723
-#define MSM_BUS_SLAVE_CRVIRT_A2NOC 724
-#define MSM_BUS_SLAVE_CNOC_A2NOC 725
-#define MSM_BUS_SLAVE_GLM 726
-#define MSM_BUS_SLAVE_GNOC_BIMC 727
-#define MSM_BUS_SLAVE_GNOC_SNOC 728
-#define MSM_BUS_SLAVE_QM_CFG 729
-#define MSM_BUS_SLAVE_TLMM_EAST 730
-#define MSM_BUS_SLAVE_TLMM_NORTH 731
-#define MSM_BUS_SLAVE_TLMM_WEST 732
-#define MSM_BUS_SLAVE_SKL 733
-#define MSM_BUS_SLAVE_LPASS_TCM 734
-#define MSM_BUS_SLAVE_TLMM_SOUTH 735
-#define MSM_BUS_SLAVE_TLMM_CENTER 736
-#define MSM_BUS_MSS_NAV_CE_MPU_CFG 737
-#define MSM_BUS_SLAVE_A2NOC_THROTTLE_CFG 738
-#define MSM_BUS_SLAVE_CDSP 739
-#define MSM_BUS_SLAVE_CDSP_SMMU_CFG 740
-#define MSM_BUS_SLAVE_LPASS_MPU_CFG 741
-#define MSM_BUS_SLAVE_CSI_PHY_CFG 742
-#define MSM_BUS_SLAVE_LAST 743
-
-#define MSM_BUS_SYSTEM_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB
-#define MSM_BUS_CPSS_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_CPSS_FPB
-
-/*
- * ID's used in RPM messages
- */
-#define ICBID_MASTER_APPSS_PROC 0
-#define ICBID_MASTER_MSS_PROC 1
-#define ICBID_MASTER_MNOC_BIMC 2
-#define ICBID_MASTER_SNOC_BIMC 3
-#define ICBID_MASTER_SNOC_BIMC_0 ICBID_MASTER_SNOC_BIMC
-#define ICBID_MASTER_CNOC_MNOC_MMSS_CFG 4
-#define ICBID_MASTER_CNOC_MNOC_CFG 5
-#define ICBID_MASTER_GFX3D 6
-#define ICBID_MASTER_JPEG 7
-#define ICBID_MASTER_MDP 8
-#define ICBID_MASTER_MDP0 ICBID_MASTER_MDP
-#define ICBID_MASTER_MDPS ICBID_MASTER_MDP
-#define ICBID_MASTER_VIDEO 9
-#define ICBID_MASTER_VIDEO_P0 ICBID_MASTER_VIDEO
-#define ICBID_MASTER_VIDEO_P1 10
-#define ICBID_MASTER_VFE 11
-#define ICBID_MASTER_VFE0 ICBID_MASTER_VFE
-#define ICBID_MASTER_CNOC_ONOC_CFG 12
-#define ICBID_MASTER_JPEG_OCMEM 13
-#define ICBID_MASTER_MDP_OCMEM 14
-#define ICBID_MASTER_VIDEO_P0_OCMEM 15
-#define ICBID_MASTER_VIDEO_P1_OCMEM 16
-#define ICBID_MASTER_VFE_OCMEM 17
-#define ICBID_MASTER_LPASS_AHB 18
-#define ICBID_MASTER_QDSS_BAM 19
-#define ICBID_MASTER_SNOC_CFG 20
-#define ICBID_MASTER_BIMC_SNOC 21
-#define ICBID_MASTER_BIMC_SNOC_0 ICBID_MASTER_BIMC_SNOC
-#define ICBID_MASTER_CNOC_SNOC 22
-#define ICBID_MASTER_CRYPTO 23
-#define ICBID_MASTER_CRYPTO_CORE0 ICBID_MASTER_CRYPTO
-#define ICBID_MASTER_CRYPTO_CORE1 24
-#define ICBID_MASTER_LPASS_PROC 25
-#define ICBID_MASTER_MSS 26
-#define ICBID_MASTER_MSS_NAV 27
-#define ICBID_MASTER_OCMEM_DMA 28
-#define ICBID_MASTER_PNOC_SNOC 29
-#define ICBID_MASTER_WCSS 30
-#define ICBID_MASTER_QDSS_ETR 31
-#define ICBID_MASTER_USB3 32
-#define ICBID_MASTER_USB3_0 ICBID_MASTER_USB3
-#define ICBID_MASTER_SDCC_1 33
-#define ICBID_MASTER_SDCC_3 34
-#define ICBID_MASTER_SDCC_2 35
-#define ICBID_MASTER_SDCC_4 36
-#define ICBID_MASTER_TSIF 37
-#define ICBID_MASTER_BAM_DMA 38
-#define ICBID_MASTER_BLSP_2 39
-#define ICBID_MASTER_USB_HSIC 40
-#define ICBID_MASTER_BLSP_1 41
-#define ICBID_MASTER_USB_HS 42
-#define ICBID_MASTER_USB_HS1 ICBID_MASTER_USB_HS
-#define ICBID_MASTER_PNOC_CFG 43
-#define ICBID_MASTER_SNOC_PNOC 44
-#define ICBID_MASTER_RPM_INST 45
-#define ICBID_MASTER_RPM_DATA 46
-#define ICBID_MASTER_RPM_SYS 47
-#define ICBID_MASTER_DEHR 48
-#define ICBID_MASTER_QDSS_DAP 49
-#define ICBID_MASTER_SPDM 50
-#define ICBID_MASTER_TIC 51
-#define ICBID_MASTER_SNOC_CNOC 52
-#define ICBID_MASTER_GFX3D_OCMEM 53
-#define ICBID_MASTER_GFX3D_GMEM ICBID_MASTER_GFX3D_OCMEM
-#define ICBID_MASTER_OVIRT_SNOC 54
-#define ICBID_MASTER_SNOC_OVIRT 55
-#define ICBID_MASTER_SNOC_GVIRT ICBID_MASTER_SNOC_OVIRT
-#define ICBID_MASTER_ONOC_OVIRT 56
-#define ICBID_MASTER_USB_HS2 57
-#define ICBID_MASTER_QPIC 58
-#define ICBID_MASTER_IPA 59
-#define ICBID_MASTER_DSI 60
-#define ICBID_MASTER_MDP1 61
-#define ICBID_MASTER_MDPE ICBID_MASTER_MDP1
-#define ICBID_MASTER_VPU_PROC 62
-#define ICBID_MASTER_VPU 63
-#define ICBID_MASTER_VPU0 ICBID_MASTER_VPU
-#define ICBID_MASTER_CRYPTO_CORE2 64
-#define ICBID_MASTER_PCIE_0 65
-#define ICBID_MASTER_PCIE_1 66
-#define ICBID_MASTER_SATA 67
-#define ICBID_MASTER_UFS 68
-#define ICBID_MASTER_USB3_1 69
-#define ICBID_MASTER_VIDEO_OCMEM 70
-#define ICBID_MASTER_VPU1 71
-#define ICBID_MASTER_VCAP 72
-#define ICBID_MASTER_EMAC 73
-#define ICBID_MASTER_BCAST 74
-#define ICBID_MASTER_MMSS_PROC 75
-#define ICBID_MASTER_SNOC_BIMC_1 76
-#define ICBID_MASTER_SNOC_PCNOC 77
-#define ICBID_MASTER_AUDIO 78
-#define ICBID_MASTER_MM_INT_0 79
-#define ICBID_MASTER_MM_INT_1 80
-#define ICBID_MASTER_MM_INT_2 81
-#define ICBID_MASTER_MM_INT_BIMC 82
-#define ICBID_MASTER_MSS_INT 83
-#define ICBID_MASTER_PCNOC_CFG 84
-#define ICBID_MASTER_PCNOC_INT_0 85
-#define ICBID_MASTER_PCNOC_INT_1 86
-#define ICBID_MASTER_PCNOC_M_0 87
-#define ICBID_MASTER_PCNOC_M_1 88
-#define ICBID_MASTER_PCNOC_S_0 89
-#define ICBID_MASTER_PCNOC_S_1 90
-#define ICBID_MASTER_PCNOC_S_2 91
-#define ICBID_MASTER_PCNOC_S_3 92
-#define ICBID_MASTER_PCNOC_S_4 93
-#define ICBID_MASTER_PCNOC_S_6 94
-#define ICBID_MASTER_PCNOC_S_7 95
-#define ICBID_MASTER_PCNOC_S_8 96
-#define ICBID_MASTER_PCNOC_S_9 97
-#define ICBID_MASTER_QDSS_INT 98
-#define ICBID_MASTER_SNOC_INT_0 99
-#define ICBID_MASTER_SNOC_INT_1 100
-#define ICBID_MASTER_SNOC_INT_BIMC 101
-#define ICBID_MASTER_TCU_0 102
-#define ICBID_MASTER_TCU_1 103
-#define ICBID_MASTER_BIMC_INT_0 104
-#define ICBID_MASTER_BIMC_INT_1 105
-#define ICBID_MASTER_CAMERA 106
-#define ICBID_MASTER_RICA 107
-#define ICBID_MASTER_SNOC_BIMC_2 108
-#define ICBID_MASTER_BIMC_SNOC_1 109
-#define ICBID_MASTER_A0NOC_SNOC 110
-#define ICBID_MASTER_A1NOC_SNOC 111
-#define ICBID_MASTER_A2NOC_SNOC 112
-#define ICBID_MASTER_PIMEM 113
-#define ICBID_MASTER_SNOC_VMEM 114
-#define ICBID_MASTER_CPP 115
-#define ICBID_MASTER_CNOC_A1NOC 116
-#define ICBID_MASTER_PNOC_A1NOC 117
-#define ICBID_MASTER_HMSS 118
-#define ICBID_MASTER_PCIE_2 119
-#define ICBID_MASTER_ROTATOR 120
-#define ICBID_MASTER_VENUS_VMEM 121
-#define ICBID_MASTER_DCC 122
-#define ICBID_MASTER_MCDMA 123
-#define ICBID_MASTER_PCNOC_INT_2 124
-#define ICBID_MASTER_PCNOC_INT_3 125
-#define ICBID_MASTER_PCNOC_INT_4 126
-#define ICBID_MASTER_PCNOC_INT_5 127
-#define ICBID_MASTER_PCNOC_INT_6 128
-#define ICBID_MASTER_PCNOC_S_5 129
-#define ICBID_MASTER_SENSORS_AHB 130
-#define ICBID_MASTER_SENSORS_PROC 131
-#define ICBID_MASTER_QSPI 132
-#define ICBID_MASTER_VFE1 133
-#define ICBID_MASTER_SNOC_INT_2 134
-#define ICBID_MASTER_SMMNOC_BIMC 135
-#define ICBID_MASTER_CRVIRT_A1NOC 136
-#define ICBID_MASTER_XM_USB_HS1 137
-#define ICBID_MASTER_XI_USB_HS1 138
-#define ICBID_MASTER_PCNOC_BIMC_1 139
-#define ICBID_MASTER_BIMC_PCNOC 140
-#define ICBID_MASTER_XI_HSIC 141
-#define ICBID_MASTER_SGMII 142
-#define ICBID_MASTER_SPMI_FETCHER 143
-#define ICBID_MASTER_GNOC_BIMC 144
-#define ICBID_MASTER_CRVIRT_A2NOC 145
-#define ICBID_MASTER_CNOC_A2NOC 146
-#define ICBID_MASTER_WLAN 147
-#define ICBID_MASTER_MSS_CE 148
-#define ICBID_MASTER_CDSP_PROC 149
-#define ICBID_MASTER_GNOC_SNOC 150
-
-#define ICBID_SLAVE_EBI1 0
-#define ICBID_SLAVE_APPSS_L2 1
-#define ICBID_SLAVE_BIMC_SNOC 2
-#define ICBID_SLAVE_BIMC_SNOC_0 ICBID_SLAVE_BIMC_SNOC
-#define ICBID_SLAVE_CAMERA_CFG 3
-#define ICBID_SLAVE_DISPLAY_CFG 4
-#define ICBID_SLAVE_OCMEM_CFG 5
-#define ICBID_SLAVE_CPR_CFG 6
-#define ICBID_SLAVE_CPR_XPU_CFG 7
-#define ICBID_SLAVE_MISC_CFG 8
-#define ICBID_SLAVE_MISC_XPU_CFG 9
-#define ICBID_SLAVE_VENUS_CFG 10
-#define ICBID_SLAVE_GFX3D_CFG 11
-#define ICBID_SLAVE_MMSS_CLK_CFG 12
-#define ICBID_SLAVE_MMSS_CLK_XPU_CFG 13
-#define ICBID_SLAVE_MNOC_MPU_CFG 14
-#define ICBID_SLAVE_ONOC_MPU_CFG 15
-#define ICBID_SLAVE_MNOC_BIMC 16
-#define ICBID_SLAVE_SERVICE_MNOC 17
-#define ICBID_SLAVE_OCMEM 18
-#define ICBID_SLAVE_GMEM ICBID_SLAVE_OCMEM
-#define ICBID_SLAVE_SERVICE_ONOC 19
-#define ICBID_SLAVE_APPSS 20
-#define ICBID_SLAVE_LPASS 21
-#define ICBID_SLAVE_USB3 22
-#define ICBID_SLAVE_USB3_0 ICBID_SLAVE_USB3
-#define ICBID_SLAVE_WCSS 23
-#define ICBID_SLAVE_SNOC_BIMC 24
-#define ICBID_SLAVE_SNOC_BIMC_0 ICBID_SLAVE_SNOC_BIMC
-#define ICBID_SLAVE_SNOC_CNOC 25
-#define ICBID_SLAVE_IMEM 26
-#define ICBID_SLAVE_OCIMEM ICBID_SLAVE_IMEM
-#define ICBID_SLAVE_SNOC_OVIRT 27
-#define ICBID_SLAVE_SNOC_GVIRT ICBID_SLAVE_SNOC_OVIRT
-#define ICBID_SLAVE_SNOC_PNOC 28
-#define ICBID_SLAVE_SNOC_PCNOC ICBID_SLAVE_SNOC_PNOC
-#define ICBID_SLAVE_SERVICE_SNOC 29
-#define ICBID_SLAVE_QDSS_STM 30
-#define ICBID_SLAVE_SDCC_1 31
-#define ICBID_SLAVE_SDCC_3 32
-#define ICBID_SLAVE_SDCC_2 33
-#define ICBID_SLAVE_SDCC_4 34
-#define ICBID_SLAVE_TSIF 35
-#define ICBID_SLAVE_BAM_DMA 36
-#define ICBID_SLAVE_BLSP_2 37
-#define ICBID_SLAVE_USB_HSIC 38
-#define ICBID_SLAVE_BLSP_1 39
-#define ICBID_SLAVE_USB_HS 40
-#define ICBID_SLAVE_USB_HS1 ICBID_SLAVE_USB_HS
-#define ICBID_SLAVE_PDM 41
-#define ICBID_SLAVE_PERIPH_APU_CFG 42
-#define ICBID_SLAVE_PNOC_MPU_CFG 43
-#define ICBID_SLAVE_PRNG 44
-#define ICBID_SLAVE_PNOC_SNOC 45
-#define ICBID_SLAVE_PCNOC_SNOC ICBID_SLAVE_PNOC_SNOC
-#define ICBID_SLAVE_SERVICE_PNOC 46
-#define ICBID_SLAVE_CLK_CTL 47
-#define ICBID_SLAVE_CNOC_MSS 48
-#define ICBID_SLAVE_PCNOC_MSS ICBID_SLAVE_CNOC_MSS
-#define ICBID_SLAVE_SECURITY 49
-#define ICBID_SLAVE_TCSR 50
-#define ICBID_SLAVE_TLMM 51
-#define ICBID_SLAVE_CRYPTO_0_CFG 52
-#define ICBID_SLAVE_CRYPTO_1_CFG 53
-#define ICBID_SLAVE_IMEM_CFG 54
-#define ICBID_SLAVE_MESSAGE_RAM 55
-#define ICBID_SLAVE_BIMC_CFG 56
-#define ICBID_SLAVE_BOOT_ROM 57
-#define ICBID_SLAVE_CNOC_MNOC_MMSS_CFG 58
-#define ICBID_SLAVE_PMIC_ARB 59
-#define ICBID_SLAVE_SPDM_WRAPPER 60
-#define ICBID_SLAVE_DEHR_CFG 61
-#define ICBID_SLAVE_MPM 62
-#define ICBID_SLAVE_QDSS_CFG 63
-#define ICBID_SLAVE_RBCPR_CFG 64
-#define ICBID_SLAVE_RBCPR_CX_CFG ICBID_SLAVE_RBCPR_CFG
-#define ICBID_SLAVE_RBCPR_QDSS_APU_CFG 65
-#define ICBID_SLAVE_CNOC_MNOC_CFG 66
-#define ICBID_SLAVE_SNOC_MPU_CFG 67
-#define ICBID_SLAVE_CNOC_ONOC_CFG 68
-#define ICBID_SLAVE_PNOC_CFG 69
-#define ICBID_SLAVE_SNOC_CFG 70
-#define ICBID_SLAVE_EBI1_DLL_CFG 71
-#define ICBID_SLAVE_PHY_APU_CFG 72
-#define ICBID_SLAVE_EBI1_PHY_CFG 73
-#define ICBID_SLAVE_RPM 74
-#define ICBID_SLAVE_CNOC_SNOC 75
-#define ICBID_SLAVE_SERVICE_CNOC 76
-#define ICBID_SLAVE_OVIRT_SNOC 77
-#define ICBID_SLAVE_OVIRT_OCMEM 78
-#define ICBID_SLAVE_USB_HS2 79
-#define ICBID_SLAVE_QPIC 80
-#define ICBID_SLAVE_IPS_CFG 81
-#define ICBID_SLAVE_DSI_CFG 82
-#define ICBID_SLAVE_USB3_1 83
-#define ICBID_SLAVE_PCIE_0 84
-#define ICBID_SLAVE_PCIE_1 85
-#define ICBID_SLAVE_PSS_SMMU_CFG 86
-#define ICBID_SLAVE_CRYPTO_2_CFG 87
-#define ICBID_SLAVE_PCIE_0_CFG 88
-#define ICBID_SLAVE_PCIE_1_CFG 89
-#define ICBID_SLAVE_SATA_CFG 90
-#define ICBID_SLAVE_SPSS_GENI_IR 91
-#define ICBID_SLAVE_UFS_CFG 92
-#define ICBID_SLAVE_AVSYNC_CFG 93
-#define ICBID_SLAVE_VPU_CFG 94
-#define ICBID_SLAVE_USB_PHY_CFG 95
-#define ICBID_SLAVE_RBCPR_MX_CFG 96
-#define ICBID_SLAVE_PCIE_PARF 97
-#define ICBID_SLAVE_VCAP_CFG 98
-#define ICBID_SLAVE_EMAC_CFG 99
-#define ICBID_SLAVE_BCAST_CFG 100
-#define ICBID_SLAVE_KLM_CFG 101
-#define ICBID_SLAVE_DISPLAY_PWM 102
-#define ICBID_SLAVE_GENI 103
-#define ICBID_SLAVE_SNOC_BIMC_1 104
-#define ICBID_SLAVE_AUDIO 105
-#define ICBID_SLAVE_CATS_0 106
-#define ICBID_SLAVE_CATS_1 107
-#define ICBID_SLAVE_MM_INT_0 108
-#define ICBID_SLAVE_MM_INT_1 109
-#define ICBID_SLAVE_MM_INT_2 110
-#define ICBID_SLAVE_MM_INT_BIMC 111
-#define ICBID_SLAVE_MMU_MODEM_XPU_CFG 112
-#define ICBID_SLAVE_MSS_INT 113
-#define ICBID_SLAVE_PCNOC_INT_0 114
-#define ICBID_SLAVE_PCNOC_INT_1 115
-#define ICBID_SLAVE_PCNOC_M_0 116
-#define ICBID_SLAVE_PCNOC_M_1 117
-#define ICBID_SLAVE_PCNOC_S_0 118
-#define ICBID_SLAVE_PCNOC_S_1 119
-#define ICBID_SLAVE_PCNOC_S_2 120
-#define ICBID_SLAVE_PCNOC_S_3 121
-#define ICBID_SLAVE_PCNOC_S_4 122
-#define ICBID_SLAVE_PCNOC_S_6 123
-#define ICBID_SLAVE_PCNOC_S_7 124
-#define ICBID_SLAVE_PCNOC_S_8 125
-#define ICBID_SLAVE_PCNOC_S_9 126
-#define ICBID_SLAVE_PRNG_XPU_CFG 127
-#define ICBID_SLAVE_QDSS_INT 128
-#define ICBID_SLAVE_RPM_XPU_CFG 129
-#define ICBID_SLAVE_SNOC_INT_0 130
-#define ICBID_SLAVE_SNOC_INT_1 131
-#define ICBID_SLAVE_SNOC_INT_BIMC 132
-#define ICBID_SLAVE_TCU 133
-#define ICBID_SLAVE_BIMC_INT_0 134
-#define ICBID_SLAVE_BIMC_INT_1 135
-#define ICBID_SLAVE_RICA_CFG 136
-#define ICBID_SLAVE_SNOC_BIMC_2 137
-#define ICBID_SLAVE_BIMC_SNOC_1 138
-#define ICBID_SLAVE_PNOC_A1NOC 139
-#define ICBID_SLAVE_SNOC_VMEM 140
-#define ICBID_SLAVE_A0NOC_SNOC 141
-#define ICBID_SLAVE_A1NOC_SNOC 142
-#define ICBID_SLAVE_A2NOC_SNOC 143
-#define ICBID_SLAVE_A0NOC_CFG 144
-#define ICBID_SLAVE_A0NOC_MPU_CFG 145
-#define ICBID_SLAVE_A0NOC_SMMU_CFG 146
-#define ICBID_SLAVE_A1NOC_CFG 147
-#define ICBID_SLAVE_A1NOC_MPU_CFG 148
-#define ICBID_SLAVE_A1NOC_SMMU_CFG 149
-#define ICBID_SLAVE_A2NOC_CFG 150
-#define ICBID_SLAVE_A2NOC_MPU_CFG 151
-#define ICBID_SLAVE_A2NOC_SMMU_CFG 152
-#define ICBID_SLAVE_AHB2PHY 153
-#define ICBID_SLAVE_CAMERA_THROTTLE_CFG 154
-#define ICBID_SLAVE_DCC_CFG 155
-#define ICBID_SLAVE_DISPLAY_THROTTLE_CFG 156
-#define ICBID_SLAVE_DSA_CFG 157
-#define ICBID_SLAVE_DSA_MPU_CFG 158
-#define ICBID_SLAVE_SSC_MPU_CFG 159
-#define ICBID_SLAVE_HMSS_L3 160
-#define ICBID_SLAVE_LPASS_SMMU_CFG 161
-#define ICBID_SLAVE_MMAGIC_CFG 162
-#define ICBID_SLAVE_PCIE20_AHB2PHY 163
-#define ICBID_SLAVE_PCIE_2 164
-#define ICBID_SLAVE_PCIE_2_CFG 165
-#define ICBID_SLAVE_PIMEM 166
-#define ICBID_SLAVE_PIMEM_CFG 167
-#define ICBID_SLAVE_QDSS_RBCPR_APU_CFG 168
-#define ICBID_SLAVE_RBCPR_CX 169
-#define ICBID_SLAVE_RBCPR_MX 170
-#define ICBID_SLAVE_SMMU_CPP_CFG 171
-#define ICBID_SLAVE_SMMU_JPEG_CFG 172
-#define ICBID_SLAVE_SMMU_MDP_CFG 173
-#define ICBID_SLAVE_SMMU_ROTATOR_CFG 174
-#define ICBID_SLAVE_SMMU_VENUS_CFG 175
-#define ICBID_SLAVE_SMMU_VFE_CFG 176
-#define ICBID_SLAVE_SSC_CFG 177
-#define ICBID_SLAVE_VENUS_THROTTLE_CFG 178
-#define ICBID_SLAVE_VMEM 179
-#define ICBID_SLAVE_VMEM_CFG 180
-#define ICBID_SLAVE_QDSS_MPU_CFG 181
-#define ICBID_SLAVE_USB3_PHY_CFG 182
-#define ICBID_SLAVE_IPA_CFG 183
-#define ICBID_SLAVE_PCNOC_INT_2 184
-#define ICBID_SLAVE_PCNOC_INT_3 185
-#define ICBID_SLAVE_PCNOC_INT_4 186
-#define ICBID_SLAVE_PCNOC_INT_5 187
-#define ICBID_SLAVE_PCNOC_INT_6 188
-#define ICBID_SLAVE_PCNOC_S_5 189
-#define ICBID_SLAVE_QSPI 190
-#define ICBID_SLAVE_A1NOC_MS_MPU_CFG 191
-#define ICBID_SLAVE_A2NOC_MS_MPU_CFG 192
-#define ICBID_SLAVE_MODEM_Q6_SMMU_CFG 193
-#define ICBID_SLAVE_MSS_MPU_CFG 194
-#define ICBID_SLAVE_MSS_PROC_MS_MPU_CFG 195
-#define ICBID_SLAVE_SKL 196
-#define ICBID_SLAVE_SNOC_INT_2 197
-#define ICBID_SLAVE_SMMNOC_BIMC 198
-#define ICBID_SLAVE_CRVIRT_A1NOC 199
-#define ICBID_SLAVE_SGMII 200
-#define ICBID_SLAVE_QHS4_APPS 201
-#define ICBID_SLAVE_BIMC_PCNOC 202
-#define ICBID_SLAVE_PCNOC_BIMC_1 203
-#define ICBID_SLAVE_SPMI_FETCHER 204
-#define ICBID_SLAVE_MMSS_SMMU_CFG 205
-#define ICBID_SLAVE_WLAN 206
-#define ICBID_SLAVE_CRVIRT_A2NOC 207
-#define ICBID_SLAVE_CNOC_A2NOC 208
-#define ICBID_SLAVE_GLM 209
-#define ICBID_SLAVE_GNOC_BIMC 210
-#define ICBID_SLAVE_GNOC_SNOC 211
-#define ICBID_SLAVE_QM_CFG 212
-#define ICBID_SLAVE_TLMM_EAST 213
-#define ICBID_SLAVE_TLMM_NORTH 214
-#define ICBID_SLAVE_TLMM_WEST 215
-#define ICBID_SLAVE_LPASS_TCM 216
-#define ICBID_SLAVE_TLMM_SOUTH 217
-#define ICBID_SLAVE_TLMM_CENTER 218
-#define ICBID_SLAVE_MSS_NAV_CE_MPU_CFG 219
-#define ICBID_SLAVE_A2NOC_THROTTLE_CFG 220
-#define ICBID_SLAVE_CDSP 221
-#define ICBID_SLAVE_CDSP_SMMU_CFG 222
-#define ICBID_SLAVE_LPASS_MPU_CFG 223
-#define ICBID_SLAVE_CSI_PHY_CFG 224
-#endif
--
2.13.6
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* Re: [PATCH v2 1/8] dt-bindings: arm: actions: Add S700 and CubieBoard7
From: Andreas Färber @ 2017-11-16 14:03 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, 张天益, 梅利,
linux-kernel, Thomas Liau, devicetree, Rob Herring,
张东风, 刘炜, Jeff Chen
In-Reply-To: <20171113233427.5386-2-afaerber@suse.de>
Am 14.11.2017 um 00:34 schrieb Andreas Färber:
> Document the Actions Semi S700 SoC and the Cubietech CubieBoard7.
>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
> v1 -> v2: Unchanged
>
> Documentation/devicetree/bindings/arm/actions.txt | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
Queued on v4.16/dt64:
https://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions.git/log/?h=v4.16/dt64
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: media: rcar_vin: add device tree support for r8a774[35]
From: Geert Uytterhoeven @ 2017-11-16 13:53 UTC (permalink / raw)
To: Fabrizio Castro
Cc: Mauro Carvalho Chehab, Mark Rutland, Rob Herring,
Niklas Söderlund, Linux Media Mailing List, Linux-Renesas,
devicetree@vger.kernel.org, Simon Horman, Chris Paterson,
Biju Das
In-Reply-To: <TY1PR06MB089529F042099069AD960093C02E0@TY1PR06MB0895.apcprd06.prod.outlook.com>
Hi Fabrizio,
On Thu, Nov 16, 2017 at 2:45 PM, Fabrizio Castro
<fabrizio.castro@bp.renesas.com> wrote:
>> Subject: Re: [PATCH 1/2] dt-bindings: media: rcar_vin: add device tree support for r8a774[35]
>>
>> On Thu, Nov 16, 2017 at 1:11 PM, Fabrizio Castro
>> <fabrizio.castro@bp.renesas.com> wrote:
>> > --- a/Documentation/devicetree/bindings/media/rcar_vin.txt
>> > +++ b/Documentation/devicetree/bindings/media/rcar_vin.txt
>> > @@ -14,7 +14,10 @@ channel which can be either RGB, YUYV or BT656.
>> > - "renesas,vin-r8a7790" for the R8A7790 device
>> > - "renesas,vin-r8a7779" for the R8A7779 device
>> > - "renesas,vin-r8a7778" for the R8A7778 device
>> > - - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 compatible device.
>> > + - "renesas,vin-r8a7745" for the R8A7745 device
>> > + - "renesas,vin-r8a7743" for the R8A7743 device
>>
>> Please keep the list sorted by SoC part number.
>
> It is sorted, just in descending order. Do you want me to re-order the full list in ascending order?
That may be a good idea, given the current order is non-standard and
counter-intuitive.
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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