* [PATCH net-next v4 1/4] phylib: Add device reset delay support
From: Richard Leitner @ 2017-12-07 14:43 UTC (permalink / raw)
To: robh+dt, mark.rutland, fugang.duan, andrew, f.fainelli,
frowand.list
Cc: davem, geert+renesas, sergei.shtylyov, baruch, david.wu, lukma,
netdev, devicetree, linux-kernel, richard.leitner
In-Reply-To: <20171207144358.3351-1-dev@g0hl1n.net>
From: Richard Leitner <richard.leitner@skidata.com>
Some PHYs need a minimum time after the reset gpio was asserted and/or
deasserted. To ensure we meet these timing requirements add two new
optional devicetree parameters for the phy: reset-delay-us and
reset-post-delay-us.
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Documentation/devicetree/bindings/net/phy.txt | 10 ++++++++++
drivers/net/phy/mdio_device.c | 13 +++++++++++--
drivers/of/of_mdio.c | 4 ++++
include/linux/mdio.h | 2 ++
4 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/phy.txt b/Documentation/devicetree/bindings/net/phy.txt
index c05479f5ac7c..72860ce7f610 100644
--- a/Documentation/devicetree/bindings/net/phy.txt
+++ b/Documentation/devicetree/bindings/net/phy.txt
@@ -55,6 +55,12 @@ Optional Properties:
- reset-gpios: The GPIO phandle and specifier for the PHY reset signal.
+- reset-delay-us: Delay after the reset was asserted in microseconds.
+ If this property is missing the delay will be skipped.
+
+- reset-post-delay-us: Delay after the reset was deasserted in microseconds.
+ If this property is missing the delay will be skipped.
+
Example:
ethernet-phy@0 {
@@ -62,4 +68,8 @@ ethernet-phy@0 {
interrupt-parent = <&PIC>;
interrupts = <35 IRQ_TYPE_EDGE_RISING>;
reg = <0>;
+
+ reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <1000>;
+ reset-post-delay-us = <2000>;
};
diff --git a/drivers/net/phy/mdio_device.c b/drivers/net/phy/mdio_device.c
index 75d97dd9fb28..0423280c88fe 100644
--- a/drivers/net/phy/mdio_device.c
+++ b/drivers/net/phy/mdio_device.c
@@ -24,6 +24,7 @@
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/unistd.h>
+#include <linux/delay.h>
void mdio_device_free(struct mdio_device *mdiodev)
{
@@ -118,8 +119,16 @@ EXPORT_SYMBOL(mdio_device_remove);
void mdio_device_reset(struct mdio_device *mdiodev, int value)
{
- if (mdiodev->reset)
- gpiod_set_value(mdiodev->reset, value);
+ unsigned int d;
+
+ if (!mdiodev->reset)
+ return;
+
+ gpiod_set_value(mdiodev->reset, value);
+
+ d = value ? mdiodev->reset_delay : mdiodev->reset_post_delay;
+ if (d)
+ usleep_range(d, d + min_t(unsigned int, d / 10, 100));
}
EXPORT_SYMBOL(mdio_device_reset);
diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
index 98258583abb0..7c8767176315 100644
--- a/drivers/of/of_mdio.c
+++ b/drivers/of/of_mdio.c
@@ -77,6 +77,10 @@ static int of_mdiobus_register_phy(struct mii_bus *mdio,
if (of_property_read_bool(child, "broken-turn-around"))
mdio->phy_ignore_ta_mask |= 1 << addr;
+ of_property_read_u32(child, "reset-delay-us", &phy->mdio.reset_delay);
+ of_property_read_u32(child, "reset-post-delay-us",
+ &phy->mdio.reset_post_delay);
+
/* Associate the OF node with the device structure so it
* can be looked up later */
of_node_get(child);
diff --git a/include/linux/mdio.h b/include/linux/mdio.h
index 92d4e55ffe67..e37c21d8eb19 100644
--- a/include/linux/mdio.h
+++ b/include/linux/mdio.h
@@ -41,6 +41,8 @@ struct mdio_device {
int addr;
int flags;
struct gpio_desc *reset;
+ unsigned int reset_delay;
+ unsigned int reset_post_delay;
};
#define to_mdio_device(d) container_of(d, struct mdio_device, dev)
--
2.11.0
^ permalink raw reply related
* [PATCH net-next v4 2/4] phylib: add reset after clk enable support
From: Richard Leitner @ 2017-12-07 14:43 UTC (permalink / raw)
To: robh+dt, mark.rutland, fugang.duan, andrew, f.fainelli,
frowand.list
Cc: davem, geert+renesas, sergei.shtylyov, baruch, david.wu, lukma,
netdev, devicetree, linux-kernel, richard.leitner
In-Reply-To: <20171207144358.3351-1-dev@g0hl1n.net>
From: Richard Leitner <richard.leitner@skidata.com>
Some PHYs need the refclk to be a continuous clock. Therefore they don't
allow turning it off and on again during operation. Nonetheless such a
clock switching is performed by some ETH drivers (namely FEC [1]) for
power saving reasons. An example for an affected PHY is the
SMSC/Microchip LAN8720 in "REF_CLK In Mode".
In order to provide a uniform method to overcome this problem this patch
adds a new phy_driver flag (PHY_RST_AFTER_CLK_EN) and corresponding
function phy_reset_after_clk_enable() to the phylib. These should be
used to trigger reset of the PHY after the refclk is switched on again.
[1] commit e8fcfcd5684a ("net: fec: optimize the clock management to save power")
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/phy/phy_device.c | 24 ++++++++++++++++++++++++
include/linux/phy.h | 2 ++
2 files changed, 26 insertions(+)
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 1de5e242b8b4..462c17ed87b8 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1218,6 +1218,30 @@ int phy_loopback(struct phy_device *phydev, bool enable)
}
EXPORT_SYMBOL(phy_loopback);
+/**
+ * phy_reset_after_clk_enable - perform a PHY reset if needed
+ * @phydev: target phy_device struct
+ *
+ * Description: Some PHYs are known to need a reset after their refclk was
+ * enabled. This function evaluates the flags and perform the reset if it's
+ * needed. Returns < 0 on error, 0 if the phy wasn't reset and 1 if the phy
+ * was reset.
+ */
+int phy_reset_after_clk_enable(struct phy_device *phydev)
+{
+ if (!phydev || !phydev->drv)
+ return -ENODEV;
+
+ if (phydev->drv->flags & PHY_RST_AFTER_CLK_EN) {
+ phy_device_reset(phydev, 1);
+ phy_device_reset(phydev, 0);
+ return 1;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(phy_reset_after_clk_enable);
+
/* Generic PHY support and helper functions */
/**
diff --git a/include/linux/phy.h b/include/linux/phy.h
index d3037e2ffbc4..c4b4715caa21 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -59,6 +59,7 @@
#define PHY_HAS_INTERRUPT 0x00000001
#define PHY_IS_INTERNAL 0x00000002
+#define PHY_RST_AFTER_CLK_EN 0x00000004
#define MDIO_DEVICE_IS_PHY 0x80000000
/* Interface Mode definitions */
@@ -853,6 +854,7 @@ int phy_aneg_done(struct phy_device *phydev);
int phy_stop_interrupts(struct phy_device *phydev);
int phy_restart_aneg(struct phy_device *phydev);
+int phy_reset_after_clk_enable(struct phy_device *phydev);
static inline void phy_device_reset(struct phy_device *phydev, int value)
{
--
2.11.0
^ permalink raw reply related
* [PATCH net-next v4 3/4] net: phy: smsc: LAN8710/20: add PHY_RST_AFTER_CLK_EN flag
From: Richard Leitner @ 2017-12-07 14:43 UTC (permalink / raw)
To: robh+dt, mark.rutland, fugang.duan, andrew, f.fainelli,
frowand.list
Cc: davem, geert+renesas, sergei.shtylyov, baruch, david.wu, lukma,
netdev, devicetree, linux-kernel, richard.leitner
In-Reply-To: <20171207144358.3351-1-dev@g0hl1n.net>
From: Richard Leitner <richard.leitner@skidata.com>
The Microchip/SMSC LAN8710/LAN8720 PHYs need (according to their
datasheet [1]) a continuous REF_CLK when configured to "REF_CLK In Mode".
Therefore set the PHY_RST_AFTER_CLK_EN flag for those PHYs to let the
ETH driver reset them after the REF_CLK is enabled.
[1] http://ww1.microchip.com/downloads/en/DeviceDoc/00002165B.pdf
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/phy/smsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c
index a1961ba87e2b..be399d645224 100644
--- a/drivers/net/phy/smsc.c
+++ b/drivers/net/phy/smsc.c
@@ -312,7 +312,7 @@ static struct phy_driver smsc_phy_driver[] = {
.name = "SMSC LAN8710/LAN8720",
.features = PHY_BASIC_FEATURES,
- .flags = PHY_HAS_INTERRUPT,
+ .flags = PHY_HAS_INTERRUPT | PHY_RST_AFTER_CLK_EN,
.probe = smsc_phy_probe,
--
2.11.0
^ permalink raw reply related
* [PATCH net-next v4 4/4] net: fec: add phy_reset_after_clk_enable() support
From: Richard Leitner @ 2017-12-07 14:43 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
fugang.duan-3arQi8VN3Tc, andrew-g2DYL2Zd6BY,
f.fainelli-Re5JQEeQqe8AvxtiuMwx3w,
frowand.list-Re5JQEeQqe8AvxtiuMwx3w
Cc: davem-fT/PcQaiUtIeIZ0/mPfg9Q,
geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ,
sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8,
baruch-NswTu9S1W3P6gbPvEgmw2w, david.wu-TNX95d0MmH7DzftRWevZcw,
lukma-ynQEQJNshbs, netdev-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
richard.leitner-WcANXNA0UjBBDgjK7y7TUQ
In-Reply-To: <20171207144358.3351-1-dev-M/VWbR8SM2SsTnJN9+BGXg@public.gmane.org>
From: Richard Leitner <richard.leitner-WcANXNA0UjBBDgjK7y7TUQ@public.gmane.org>
Some PHYs (for example the SMSC LAN8710/LAN8720) doesn't allow turning
the refclk on and off again during operation (according to their
datasheet). Nonetheless exactly this behaviour was introduced for power
saving reasons by commit e8fcfcd5684a ("net: fec: optimize the clock management to save power").
Therefore add support for the phy_reset_after_clk_enable function from
phylib to mitigate this issue.
Generally speaking this issue is only relevant if the ref clk for the
PHY is generated by the SoC and therefore the PHY is configured to
"REF_CLK In Mode". In our specific case (PCB) this problem does occur at
about every 10th to 50th POR of an LAN8710 connected to an i.MX6SOLO
SoC. The typical symptom of this problem is a "swinging" ethernet link.
Similar issues were reported by users of the NXP forum:
https://community.nxp.com/thread/389902
https://community.nxp.com/message/309354
With this patch applied the issue didn't occur for at least a few
hundret PORs of our board.
Fixes: e8fcfcd5684a ("net: fec: optimize the clock management to save power")
Signed-off-by: Richard Leitner <richard.leitner-WcANXNA0UjBBDgjK7y7TUQ@public.gmane.org>
---
drivers/net/ethernet/freescale/fec_main.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
index 610573855213..2d1b06579c1a 100644
--- a/drivers/net/ethernet/freescale/fec_main.c
+++ b/drivers/net/ethernet/freescale/fec_main.c
@@ -1862,6 +1862,8 @@ static int fec_enet_clk_enable(struct net_device *ndev, bool enable)
ret = clk_prepare_enable(fep->clk_ref);
if (ret)
goto failed_clk_ref;
+
+ phy_reset_after_clk_enable(ndev->phydev);
} else {
clk_disable_unprepare(fep->clk_ahb);
clk_disable_unprepare(fep->clk_enet_out);
@@ -2834,6 +2836,7 @@ fec_enet_open(struct net_device *ndev)
{
struct fec_enet_private *fep = netdev_priv(ndev);
int ret;
+ bool reset_again;
ret = pm_runtime_get_sync(&fep->pdev->dev);
if (ret < 0)
@@ -2844,6 +2847,17 @@ fec_enet_open(struct net_device *ndev)
if (ret)
goto clk_enable;
+ /* During the first fec_enet_open call the PHY isn't probed at this
+ * point. Therefore the phy_reset_after_clk_enable() call within
+ * fec_enet_clk_enable() fails. As we need this reset in order to be
+ * sure the PHY is working correctly we check if we need to reset again
+ * later when the PHY is probed
+ */
+ if (ndev->phydev && ndev->phydev->drv)
+ reset_again = false;
+ else
+ reset_again = true;
+
/* I should reset the ring buffers here, but I don't yet know
* a simple way to do that.
*/
@@ -2860,6 +2874,12 @@ fec_enet_open(struct net_device *ndev)
if (ret)
goto err_enet_mii_probe;
+ /* Call phy_reset_after_clk_enable() again if it failed during
+ * phy_reset_after_clk_enable() before because the PHY wasn't probed.
+ */
+ if (reset_again)
+ phy_reset_after_clk_enable(ndev->phydev);
+
if (fep->quirks & FEC_QUIRK_ERR006687)
imx6q_cpuidle_fec_irqs_used();
--
2.11.0
--
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^ permalink raw reply related
* Re: [PATCH 4/6] arm: dts: nspire: Add missing #phy-cells to usb-nop-xceiv
From: Arnd Bergmann @ 2017-12-07 14:44 UTC (permalink / raw)
To: Rob Herring; +Cc: DTML, Linux ARM, arm-soc
In-Reply-To: <20171109222614.5719-4-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
On Thu, Nov 9, 2017 at 11:26 PM, Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> "usb-nop-xceiv" is using the phy binding, but is missing #phy-cells
> property. This is probably because the binding was the precursor to the phy
> binding.
>
> Fixes the following warning in nspire dts files:
>
> Warning (phys_property): Missing property '#phy-cells' in node ...
>
> Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> ---
> Doesn't seem to be a maintainer for nspire. Arnd, please apply.
Applied to fixes, thanks!
Arnd
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^ permalink raw reply
* Re: [PATCH V6 4/7] OF: properties: Implement get_match_data() callback
From: Sinan Kaya @ 2017-12-07 14:45 UTC (permalink / raw)
To: Lothar Waßmann
Cc: dmaengine, timur, devicetree, linux-acpi, linux-arm-msm,
open list, Rob Herring, Frank Rowand, linux-arm-kernel
In-Reply-To: <20171207141029.575c0a03@karo-electronics.de>
On 12/7/2017 8:10 AM, Lothar Waßmann wrote:
>> +void *of_fwnode_get_match_data(const struct fwnode_handle *fwnode,
>> + struct device *dev)
> Shouldn't this be 'const void *of_fwnode_get_match_data
OF keeps the driver data as a (const void*) internally. ACPI keeps the
driver data as kernel_ulong_t in struct acpi_device_id.
I tried to find the middle ground here by converting output to void*
but not keeping const.
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
^ permalink raw reply
* [PATCH v2 0/2] uio: Allow to take irq bottom-half into irq_handler with additional dt-binding
From: Andrey Zhizhikin @ 2017-12-07 14:46 UTC (permalink / raw)
To: gregkh, robh+dt, mark.rutland; +Cc: devicetree, linux-kernel, Andrey Zhizhikin
In-Reply-To: <1512572140-48009-1-git-send-email-andrey.z@gmail.com>
This patch series aimed to introduce additional feature for UIO driver with
generic interrupt handler to allow IRQ bottom half to be executed in
irq_handler context rather than as threaded IRQ.
Andrey Zhizhikin (2):
uio: Allow to take irq bottom-half into irq_handler with additional
dt-binding
uio: Introduce UIO driver dt-binding documentation
.../devicetree/bindings/uio/uio-pdrv-genirq.txt | 46 ++++++++++++++++++++++
drivers/uio/uio_pdrv_genirq.c | 15 +++++++
2 files changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/uio/uio-pdrv-genirq.txt
--
2.7.4
^ permalink raw reply
* [PATCH v2 1/2] uio: Allow to take irq bottom-half into irq_handler with additional dt-binding
From: Andrey Zhizhikin @ 2017-12-07 14:46 UTC (permalink / raw)
To: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Andrey Zhizhikin
In-Reply-To: <1512658019-30279-1-git-send-email-andrey.z-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Certain Kernel preemption models are using threaded interrupt handlers,
which is in general quite beneficial. However, threaded handlers
introducing additional scheduler overhead, when the bottom-half thread
should be woken up and scheduled for execution. This can result is
additional latency, which in certain cases is not desired.
UIO driver with Generic IRQ handler, that wraps a HW block might suffer
a small degradation when it's bottom half is executed, since it needs
its bottom half to be woken up by the scheduler every time INT is
delivered. For high rate INT signals, this also bring additional
undesired load on the scheduler itself.
Since the actual ACK is performed in the top-half, and bottom-half of
the UIO driver with Generic IRQ handler is relatively slick (only flag
is set based on the INT reception), it might be beneficial to move this
bottom-half to the irq_handler itself, rather than to have a separate
thread to service it.
This patch aims to address the task above by supplying IRQF_NO_THREAD to
request_irq(), based on dt-binding which could be configured on a per-node
basis. That means developers utilizing the UIO driver could decide which
UIO instance is critical in terms of interrupt processing, and move their
corresponding bottom-halves to the irq_handler to fight additional
scheduling latency. When additional property is not found in corresponding
dt-node, then instance behavior is not amended and overall system stays
with default configuration for threaded IRQ (depending on how they are
configured by Preemption model).
Patch was originated on the ARM-based system with Kernel configuration
CONFIG_PREEMPT_RT_FULL set, which effectively promotes all bottom-halves
to threaded interrupt handlers. Once this patch has been enabled on 2
individual uio device nodes (out of around 20 registered in the system),
no additional negative impact has been noted on the system overall.
Having this patch enabled for individual UIO node allowed to have a
latency reduction of around 20-30 usec from INT trigger to the user space
IRQ handler. Those results can vary based on the platform and CPU
architecture, but could be quite beneficial if above gain in comparable
to the worst-case latency figures.
This modification also brings several additional benefits:
- It eliminates few re-scheduling operations, making INT ACK code more
robust and relieves the pressure from the scheduler when HW interrupt
for this IRQ is signaled at a high-enough frequency;
- It makes top and bottom half to be executed back-to-back with IRQ
OFF, making operation pseudo-atomic;
- Above gain might be significant when average latency times for the
systems are comparable
Signed-off-by: Andrey Zhizhikin <andrey.z-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c
index f598ecd..86427a4 100644
--- a/drivers/uio/uio_pdrv_genirq.c
+++ b/drivers/uio/uio_pdrv_genirq.c
@@ -108,6 +108,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev)
struct uio_pdrv_genirq_platdata *priv;
struct uio_mem *uiomem;
int ret = -EINVAL;
+ int no_threaded_irq = 0;
int i;
if (pdev->dev.of_node) {
@@ -121,6 +122,14 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev)
uioinfo->name = pdev->dev.of_node->name;
uioinfo->version = "devicetree";
/* Multiple IRQs are not supported */
+
+ /* read additional property (if exists) and decide whether
+ * to have IRQ bottom half to be executed in a separate
+ * thread, or to have it executed in the irq_handler
+ * context
+ */
+ if (of_property_read_bool(pdev->dev.of_node, "no-threaded-irq"))
+ no_threaded_irq = 1;
}
if (!uioinfo || !uioinfo->name || !uioinfo->version) {
@@ -134,6 +143,12 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev)
return ret;
}
+ /* execute BH in irq_handler if property set in FDT */
+ if ((no_threaded_irq > 0) && !(uioinfo->irq_flags & IRQF_NO_THREAD)) {
+ dev_info(&pdev->dev, "promoting INT with IRQF_NO_THREAD\n");
+ uioinfo->irq_flags |= IRQF_NO_THREAD;
+ }
+
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv) {
dev_err(&pdev->dev, "unable to kmalloc\n");
--
2.7.4
--
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^ permalink raw reply related
* [PATCH v2 2/2] uio: Introduce UIO driver dt-binding documentation
From: Andrey Zhizhikin @ 2017-12-07 14:46 UTC (permalink / raw)
To: gregkh, robh+dt, mark.rutland; +Cc: devicetree, linux-kernel, Andrey Zhizhikin
In-Reply-To: <1512658019-30279-1-git-send-email-andrey.z@gmail.com>
Create Documentation portion of UIO driver with Generic Interrupt Handler.
This patch creates a dt-binding documentation portion of the UIO Driver.
In addition to definition of standard required properties, new optional
property defined:
- no-threaded-irq: when present, request_irq() is called with
IRQF_NO_THREAD flag set, effectively skipping threaded interrupt
handler and taking bottom-half into irq_handler
Signed-off-by: Andrey Zhizhikin <andrey.z@gmail.com>
diff --git a/Documentation/devicetree/bindings/uio/uio-pdrv-genirq.txt b/Documentation/devicetree/bindings/uio/uio-pdrv-genirq.txt
new file mode 100644
index 0000000..dfcc362
--- /dev/null
+++ b/Documentation/devicetree/bindings/uio/uio-pdrv-genirq.txt
@@ -0,0 +1,46 @@
+* Userspace I/O platform driver with generic IRQ handling code.
+
+Platform driver for User-space IO handling with generic IRQ code.
+This driver is very similar to the regular UIO platform driver, but is
+only suitable for devices that are connected to the interrupt
+controller using unique interrupt lines.
+
+Required properties:
+- compatible: Driver compatible string. For UIO device with generic IRQ
+ handling code this property is defined in device tree to any desired
+ name, and then set via module parameters passed to Kernel command line
+ in a form:
+ uio_pdrv_genirq.of_id=<your name>
+
+- reg: Physical base address and size for memory mapped region to be accessed
+ via UIO driver.
+
+- interrupts: Platform IRQ standard definition. For details on defining this
+ property, see interrupt-controller/interrupts.txt
+
+- interrupt-parent: Parent interrupt controller node.
+ For details, see interrupt-controller/interrupts.txt
+
+Optional properties:
+- no-threaded-irq: when present, request_irq() is called with IRQF_NO_THREAD
+ flag set, effectively skipping threaded interrupt handler and taking
+ bottom-half into irq_handler
+
+
+Examples:
+
+base-uio {
+ compatible = "platform-uio";
+ reg = < 0xC0000000 0x00020000 >;
+ interrupts = < 0 10 1 >;
+ interrupt-parent = <&intc>;
+};
+
+nothreaded-uio {
+ compatible = "platform-uio";
+ reg = < 0xC0040000 0x00020000 >;
+ interrupts = < 0 27 1 >;
+ interrupt-parent = <&intc>;
+ no-threaded-irq;
+};
+
--
2.7.4
^ permalink raw reply related
* Re: [PATCH net-next v4 1/4] phylib: Add device reset delay support
From: Geert Uytterhoeven @ 2017-12-07 14:52 UTC (permalink / raw)
To: Richard Leitner
Cc: Rob Herring, Mark Rutland, Fugang Duan, Andrew Lunn,
Florian Fainelli, Frank Rowand, David S. Miller,
Geert Uytterhoeven, Sergei Shtylyov, Baruch Siach, David Wu,
lukma, netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Richard Leitner
In-Reply-To: <20171207144358.3351-2-dev@g0hl1n.net>
Hi Richard,
On Thu, Dec 7, 2017 at 3:43 PM, Richard Leitner <dev@g0hl1n.net> wrote:
> --- a/drivers/net/phy/mdio_device.c
> +++ b/drivers/net/phy/mdio_device.c
> @@ -24,6 +24,7 @@
> #include <linux/slab.h>
> #include <linux/string.h>
> #include <linux/unistd.h>
> +#include <linux/delay.h>
>
> void mdio_device_free(struct mdio_device *mdiodev)
> {
> @@ -118,8 +119,16 @@ EXPORT_SYMBOL(mdio_device_remove);
>
> void mdio_device_reset(struct mdio_device *mdiodev, int value)
> {
> - if (mdiodev->reset)
> - gpiod_set_value(mdiodev->reset, value);
> + unsigned int d;
> +
> + if (!mdiodev->reset)
> + return;
> +
> + gpiod_set_value(mdiodev->reset, value);
> +
> + d = value ? mdiodev->reset_delay : mdiodev->reset_post_delay;
> + if (d)
> + usleep_range(d, d + min_t(unsigned int, d / 10, 100));
Oops, I meant "max_t", not "min_t", else the upper limit can be "d + 0",
which is not what we want.
Sorry, my fault.
Gr{oetje,eeting}s,
Geert
^ permalink raw reply
* Re: [PATCH] arm: dts: qcom: fix missing #phy-cells for apq8064
From: Arnd Bergmann @ 2017-12-07 14:53 UTC (permalink / raw)
To: Rob Herring
Cc: Andy Gross, DTML, Linux ARM, David Brown,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <CAK8P3a3wupYd7XiJrYsFafbmdpiw_zFVd42E8Ucm9oNXtwzWSQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Thu, Dec 7, 2017 at 3:43 PM, Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org> wrote:
> On Thu, Nov 9, 2017 at 11:54 PM, Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
>> Fix dtc warnings for missing #phy-cells for apq8064:
>>
>> Warning (phys_property): Missing property '#phy-cells' in node /soc/dsi-phy@4700200 or bad phandle (referred from /soc/mdss_dsi@4700000:phys[0])
>> Warning (phys_property): Missing property '#phy-cells' in node /soc/hdmi-phy@4a00400 or bad phandle (referred from /soc/hdmi-tx@4a00000:phys[0])
>>
>> Cc: Andy Gross <andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> Cc: David Brown <david.brown-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
>> Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
>> Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
>
> Applied to fixes, thanks!
This was apparently already there, I took it out again, as applying it
twice resulted in build failure :(
Arnd
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^ permalink raw reply
* Re: [PATCH net-next v4 1/4] phylib: Add device reset delay support
From: Richard Leitner @ 2017-12-07 15:01 UTC (permalink / raw)
To: Geert Uytterhoeven, Richard Leitner
Cc: Rob Herring, Mark Rutland, Fugang Duan, Andrew Lunn,
Florian Fainelli, Frank Rowand, David S. Miller,
Geert Uytterhoeven, Sergei Shtylyov, Baruch Siach, David Wu,
lukma-ynQEQJNshbs, netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <CAMuHMdVgWif=1K-S2j1Y39B9yDNvV12sUm7nrFLOP-=ndSYtVA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Hi Geert,
On 12/07/2017 03:52 PM, Geert Uytterhoeven wrote:
> Hi Richard,
>
> On Thu, Dec 7, 2017 at 3:43 PM, Richard Leitner <dev-M/VWbR8SM2SsTnJN9+BGXg@public.gmane.org> wrote:
>> --- a/drivers/net/phy/mdio_device.c
>> +++ b/drivers/net/phy/mdio_device.c
>> @@ -24,6 +24,7 @@
>> #include <linux/slab.h>
>> #include <linux/string.h>
>> #include <linux/unistd.h>
>> +#include <linux/delay.h>
>>
>> void mdio_device_free(struct mdio_device *mdiodev)
>> {
>> @@ -118,8 +119,16 @@ EXPORT_SYMBOL(mdio_device_remove);
>>
>> void mdio_device_reset(struct mdio_device *mdiodev, int value)
>> {
>> - if (mdiodev->reset)
>> - gpiod_set_value(mdiodev->reset, value);
>> + unsigned int d;
>> +
>> + if (!mdiodev->reset)
>> + return;
>> +
>> + gpiod_set_value(mdiodev->reset, value);
>> +
>> + d = value ? mdiodev->reset_delay : mdiodev->reset_post_delay;
>> + if (d)
>> + usleep_range(d, d + min_t(unsigned int, d / 10, 100));
>
> Oops, I meant "max_t", not "min_t", else the upper limit can be "d + 0",
> which is not what we want.
You're right...
> Sorry, my fault.
I just copied it over from you suggestion without thinking about it...
So it's definitely my fault too ;-)
I'll wait for some more comments and send a new version next week.
regards;Richard.L
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^ permalink raw reply
* Re: [RFC 1/2] dt-bindings: mipi-dsi: Add info about peripherals with non-DSI control bus
From: Archit Taneja @ 2017-12-07 15:12 UTC (permalink / raw)
To: Rob Herring
Cc: tomi.valkeinen, eric, philippe.cornu, laurent.pinchart,
thierry.reding, nickey.yang, dri-devel, p.zabel, devicetree,
linux-arm-msm, seanpaul, briannorris, maxime.ripard,
boris.brezillon, a.hajda
In-Reply-To: <20171206213936.devr3d4fyhtbld4w@rob-hp-laptop>
On 12/07/2017 03:09 AM, Rob Herring wrote:
> On Tue, Dec 05, 2017 at 04:03:55PM +0530, Archit Taneja wrote:
>> Add a section that describes dt-bindings for peripherals that support
>> MIPI DSI, but have a different bus as the primary control bus. Add an
>> example for such peripherals.
>>
>> Signed-off-by: Archit Taneja <architt@codeaurora.org>
>> ---
>> .../devicetree/bindings/display/mipi-dsi-bus.txt | 75 ++++++++++++++++++++--
>> 1 file changed, 68 insertions(+), 7 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/mipi-dsi-bus.txt b/Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
>> index 973c27273772..77a7cec15f5b 100644
>> --- a/Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
>> +++ b/Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
>> @@ -16,7 +16,7 @@ The following assumes that only a single peripheral is connected to a DSI
>> host. Experience shows that this is true for the large majority of setups.
>>
>> DSI host
>> ---------
>> +========
>>
>> In addition to the standard properties and those defined by the parent bus of
>> a DSI host, the following properties apply to a node representing a DSI host.
>> @@ -30,11 +30,15 @@ Required properties:
>> different value here. See below.
>>
>> DSI peripheral
>> ---------------
>> +==============
>>
>> -Peripherals are represented as child nodes of the DSI host's node. Properties
>> -described here apply to all DSI peripherals, but individual bindings may want
>> -to define additional, device-specific properties.
>> +Peripherals with DSI as control bus
>> +------------------------------------
>> +
>> +Peripherals with the DSI bus as the primary control path are represented as
>> +child nodes of the DSI host's node. Properties described here apply to all DSI
>> +peripherals, but individual bindings may want to define additional,
>> +device-specific properties.
>
> Are there any panels with no control bus? I've never seen one, but it
> should be possible if LVDS panels can power on without commands.
DSI panels generally require sending at least a couple of DCS commands to be
exit sleep mode and get powered on. I guess I can rewrite the above paragraph
to include peripherals which have no control bus at all.
>
>> Required properties:
>> - reg: The virtual channel number of a DSI peripheral. Must be in the range
>> @@ -49,9 +53,25 @@ case two alternative representations can be chosen:
>> property is the number of the first virtual channel and the second cell is
>> the number of consecutive virtual channels.
>>
>> -Example
>> --------
>> +Peripherals with a different control bus
>> +----------------------------------------
>> +
>> +There are peripherals that have I2C/SPI (or some other non-DSI bus) as the
>> +primary control bus, but are also connected to a DSI bus (mostly for the data
>> +path). Connections between such peripherals and a DSI host can be represented
>> +using the graph bindings [1], [2].
>> +
>> +[1] Documentation/devicetree/bindings/graph.txt
>> +[2] Documentation/devicetree/bindings/media/video-interfaces.txt
>>
>> +Examples
>> +========
>> +- (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus
>> + with different virtual channel configurations.
>> +- (4) is an example of a peripheral on a I2C control bus connected with to
>> + a DSI host using of-graph bindings.
>> +
>> +1)
>> dsi-host {
>> ...
>>
>> @@ -67,6 +87,7 @@ Example
>> ...
>> };
>>
>> +2)
>> dsi-host {
>> ...
>>
>> @@ -82,6 +103,7 @@ Example
>> ...
>> };
>>
>> +3)
>> dsi-host {
>> ...
>>
>> @@ -96,3 +118,42 @@ Example
>>
>> ...
>> };
>> +
>> +4)
>> + i2c-host {
>> + ...
>> +
>> + dsi-bridge@35 {
>> + compatible = "...";
>> + reg = <0x35>;
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + ...
>> +
>> + port@0 {
>
> Drop unit-address and #*-cells.
>
>> + bridge_mipi_in: endpoint {
>> + remote-endpoint = <&host_mipi_out>;
>> + };
>> + };
>> + };
>> + };
>> + };
>> +
>> + dsi-host {
>> + ...
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + ...
>> +
>> + port@0 {
>
> Drop unit-address and #*-cells.
Thanks, I'll fix these and the similar comments in the second patch.
Archit
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v2 00/10] arm64: dts: qcom: dts improvements
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon, kernel, Damien Riegel
The goal of this series was to add missing I2C bindings for BLSP_I2C1,
BLSP_I2C3, and BLSP_I2C5. But while working on this, I noticed some
styling issues and decided to tackle them in the same patchset, mostly
because they touch the same files and the same people will be involved
for the review.
In this second version, I followed the recommandation of Bjorn Andersson
and splitted pinmuxing and pinconf. The reason behind that is that the
pinmuxing is common as functions cannot be routed to other pins, but
pinconfs are board-specific.
Damien Riegel (10):
arm64: dts: qcom: pm8916: fix wcd_codec indentation
arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable
arm64: dts: qcom: msm8916-pins: keep cdc_dmic pins in suspend mode
arm64: dts: qcom: msm8916: drop unused board-specific nodes
arm64: dts: qcom: apq8016-sbc: sort nodes alphabetically
arm64: dts: qcom: msm8916: move pinconfs to board files
arm64: dts: qcom: msm8916: drop remaining unused pinconfs
arm64: dts: qcom: msm8916-pins: move sdhc2 cd node with its siblings
arm64: dts: qcom: msm8916: normalize I2C and SPI nodes
arm64: dts: qcom: msm8916: add nodes for i2c1, i2c3, i2c5
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 446 ++++++++++++++++++++++++++++-
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 17 ++
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 393 ++++---------------------
arch/arm64/boot/dts/qcom/msm8916.dtsi | 69 ++++-
arch/arm64/boot/dts/qcom/pm8916.dtsi | 82 +++---
5 files changed, 604 insertions(+), 403 deletions(-)
--
2.15.0
^ permalink raw reply
* [PATCH v2 01/10] arm64: dts: qcom: pm8916: fix wcd_codec indentation
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Mark Rutland, Damien Riegel, Catalin Marinas, Will Deacon,
Bjorn Andersson, David Brown, Rob Herring, kernel, Andy Gross
In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com>
Indentation did not respect kernel standards, so fix that for the usual
indent with tabs, align with spaces. While at it, remove some empty
lines before and after the closing parenthesis of this block.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes in v2:
- Added Reviewed-by Bjorn Andersson
arch/arm64/boot/dts/qcom/pm8916.dtsi | 82 ++++++++++++++++++------------------
1 file changed, 40 insertions(+), 42 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
index 53deebf9f515..d19f4cb9a5f3 100644
--- a/arch/arm64/boot/dts/qcom/pm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -96,47 +96,45 @@
#address-cells = <1>;
#size-cells = <0>;
- wcd_codec: codec@f000 {
- compatible = "qcom,pm8916-wcd-analog-codec";
- reg = <0xf000 0x200>;
- reg-names = "pmic-codec-core";
- clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
- clock-names = "mclk";
- interrupt-parent = <&spmi_bus>;
- interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
- interrupt-names = "cdc_spk_cnp_int",
- "cdc_spk_clip_int",
- "cdc_spk_ocp_int",
- "mbhc_ins_rem_det1",
- "mbhc_but_rel_det",
- "mbhc_but_press_det",
- "mbhc_ins_rem_det",
- "mbhc_switch_int",
- "cdc_ear_ocp_int",
- "cdc_hphr_ocp_int",
- "cdc_hphl_ocp_det",
- "cdc_ear_cnp_int",
- "cdc_hphr_cnp_int",
- "cdc_hphl_cnp_int";
- vdd-cdc-io-supply = <&pm8916_l5>;
- vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
- vdd-micbias-supply = <&pm8916_l13>;
- #sound-dai-cells = <1>;
-
- };
-
+ wcd_codec: codec@f000 {
+ compatible = "qcom,pm8916-wcd-analog-codec";
+ reg = <0xf000 0x200>;
+ reg-names = "pmic-codec-core";
+ clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
+ clock-names = "mclk";
+ interrupt-parent = <&spmi_bus>;
+ interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
+ interrupt-names = "cdc_spk_cnp_int",
+ "cdc_spk_clip_int",
+ "cdc_spk_ocp_int",
+ "mbhc_ins_rem_det1",
+ "mbhc_but_rel_det",
+ "mbhc_but_press_det",
+ "mbhc_ins_rem_det",
+ "mbhc_switch_int",
+ "cdc_ear_ocp_int",
+ "cdc_hphr_ocp_int",
+ "cdc_hphl_ocp_det",
+ "cdc_ear_cnp_int",
+ "cdc_hphr_cnp_int",
+ "cdc_hphl_cnp_int";
+ vdd-cdc-io-supply = <&pm8916_l5>;
+ vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
+ vdd-micbias-supply = <&pm8916_l13>;
+ #sound-dai-cells = <1>;
+ };
};
};
--
2.15.0
^ permalink raw reply related
* [PATCH v2 02/10] arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon, kernel, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com>
Drop assignments to bias-disable as the documentation [1] states that
this property doesn't take a value. Other occurrences of this property
respect that.
[1] Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes in v2:
- Added Reviewed-by Bjorn Andersson
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 4cb0b5834143..c67ad8ed8b60 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -278,7 +278,7 @@
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -290,7 +290,7 @@
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -302,7 +302,7 @@
pinconf {
pins = "gpio14", "gpio15";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -314,7 +314,7 @@
pinconf {
pins = "gpio14", "gpio15";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -326,7 +326,7 @@
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -338,7 +338,7 @@
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
--
2.15.0
^ permalink raw reply related
* [PATCH v2 03/10] arm64: dts: qcom: msm8916-pins: keep cdc_dmic pins in suspend mode
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Mark Rutland, Damien Riegel, Catalin Marinas, Will Deacon,
Bjorn Andersson, David Brown, Rob Herring, kernel, Andy Gross
In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com>
This node was the only one that didn't have the same set of pins in
active and suspend mode.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index c67ad8ed8b60..10fc1fc90682 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -687,6 +687,14 @@
};
};
cdc_dmic_lines_sus: dmic_lines_off {
+ pinmux_dmic0_clk {
+ function = "dmic0_clk";
+ pins = "gpio0";
+ };
+ pinmux_dmic0_data {
+ function = "dmic0_data";
+ pins = "gpio1";
+ };
pinconf {
pins = "gpio0", "gpio1";
drive-strength = <2>;
--
2.15.0
^ permalink raw reply related
* [PATCH v2 04/10] arm64: dts: qcom: msm8916: drop unused board-specific nodes
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon, kernel, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com>
These nodes reserve and configure some pins as GPIOs. They are not
generic pinctrls, they actually belong to board files but they are not
used by any other node, so just drop them altogether.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 52 ------------------------------
1 file changed, 52 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 10fc1fc90682..21f144c55638 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -505,32 +505,6 @@
};
};
- ext-codec-lines {
- ext_codec_lines_act: lines_on {
- pinmux {
- function = "gpio";
- pins = "gpio67";
- };
- pinconf {
- pins = "gpio67";
- drive-strength = <8>;
- bias-disable;
- output-high;
- };
- };
- ext_codec_lines_sus: lines_off {
- pinmux {
- function = "gpio";
- pins = "gpio67";
- };
- pinconf {
- pins = "gpio67";
- drive-strength = <2>;
- bias-disable;
- };
- };
- };
-
cdc-pdm-lines {
cdc_pdm_lines_act: pdm_lines_on {
pinmux {
@@ -703,32 +677,6 @@
};
};
- cross-conn-det {
- cross_conn_det_act: lines_on {
- pinmux {
- function = "gpio";
- pins = "gpio120";
- };
- pinconf {
- pins = "gpio120";
- drive-strength = <8>;
- output-low;
- bias-pull-down;
- };
- };
- cross_conn_det_sus: lines_off {
- pinmux {
- function = "gpio";
- pins = "gpio120";
- };
- pinconf {
- pins = "gpio120";
- drive-strength = <2>;
- bias-disable;
- };
- };
- };
-
wcnss_pin_a: wcnss-active {
pinmux {
pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
--
2.15.0
^ permalink raw reply related
* [PATCH v2 05/10] arm64: dts: qcom: apq8016-sbc: sort nodes alphabetically
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
linux-soc-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon,
kernel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/@public.gmane.org>
Also, it was using whitespaces for indentation on some lines, fix that
while moving it.
Signed-off-by: Damien Riegel <damien.riegel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/@public.gmane.org>
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index d4b35d81a282..981450f50e10 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -544,14 +544,6 @@
};
};
-&wcd_codec {
- status = "okay";
- clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
- clock-names = "mclk";
- qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
- qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
-};
-
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l5-supply = <&pm8916_s3>;
@@ -671,3 +663,11 @@
regulator-max-microvolt = <3337000>;
};
};
+
+&wcd_codec {
+ status = "okay";
+ clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
+ clock-names = "mclk";
+ qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
+ qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
+};
--
2.15.0
--
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More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH v2 06/10] arm64: dts: qcom: msm8916: move pinconfs to board files
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
linux-soc-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon,
kernel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/@public.gmane.org>
Following a suggestion from Bjorn Andersson [1], this commit moves
electrical specifications which were defined in mms8916-pins.dtsi to
board files, where they actually belong.
Pinmuxing is kept in the platform file because there are no alternative
pins on which all these functions could be routed, so this part is
indeed common to all boards using this SoC.
[1] https://www.spinics.net/lists/devicetree/msg201764.html
Signed-off-by: Damien Riegel <damien.riegel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/@public.gmane.org>
Suggested-by: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 386 +++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi | 17 ++
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 258 -------------------
3 files changed, 403 insertions(+), 258 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 981450f50e10..53c1ddd281a4 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -544,6 +544,384 @@
};
};
+&blsp1_uart1_default {
+ pinconf {
+ pins = "gpio0", "gpio1",
+ "gpio2", "gpio3";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&blsp1_uart1_sleep {
+ pinconf {
+ pins = "gpio0", "gpio1",
+ "gpio2", "gpio3";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&blsp1_uart2_default {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&blsp1_uart2_sleep {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&cdc_pdm_lines_act {
+ pinconf {
+ pins = "gpio63", "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68";
+ drive-strength = <8>;
+ bias-pull-none;
+ };
+};
+
+&cdc_pdm_lines_sus {
+ pinconf {
+ pins = "gpio63", "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&ext_mclk_tlmm_lines_act {
+ pinconf {
+ pins = "gpio116";
+ drive-strength = <8>;
+ bias-pull-none;
+ };
+};
+
+&ext_mclk_tlmm_lines_sus {
+ pinconf {
+ pins = "gpio116";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&ext_sec_tlmm_lines_act {
+ pinconf {
+ pins = "gpio112", "gpio117", "gpio118",
+ "gpio119";
+ drive-strength = <8>;
+ bias-pull-none;
+ };
+};
+
+&ext_sec_tlmm_lines_sus {
+ pinconf {
+ pins = "gpio112", "gpio117", "gpio118",
+ "gpio119";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&i2c2_default {
+ pinconf {
+ pins = "gpio6", "gpio7";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c2_sleep {
+ pinconf {
+ pins = "gpio6", "gpio7";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&i2c4_default {
+ pinconf {
+ pins = "gpio14", "gpio15";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c4_sleep {
+ pinconf {
+ pins = "gpio14", "gpio15";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&i2c6_default {
+ pinconf {
+ pins = "gpio22", "gpio23";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c6_sleep {
+ pinconf {
+ pins = "gpio22", "gpio23";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&sdc1_clk_on {
+ pinconf {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+};
+
+&sdc1_clk_off {
+ pinconf {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+};
+
+&sdc1_cmd_on {
+ pinconf {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc1_cmd_off {
+ pinconf {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc1_data_on {
+ pinconf {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc1_data_off {
+ pinconf {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_clk_on {
+ pinconf {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+};
+
+&sdc2_clk_off {
+ pinconf {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_cmd_on {
+ pinconf {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc2_cmd_off {
+ pinconf {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_data_on {
+ pinconf {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+};
+
+&sdc2_data_off {
+ pinconf {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+};
+
+&sdc2_cd_on {
+ pinconf {
+ pins = "gpio38";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+};
+
+&sdc2_cd_off {
+ pinconf {
+ pins = "gpio38";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
+&spi1_default {
+ pinconf {
+ pins = "gpio0", "gpio1", "gpio3";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio2";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi1_sleep {
+ pinconf {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi2_default {
+ pinconf {
+ pins = "gpio4", "gpio5", "gpio7";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio6";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi2_sleep {
+ pinconf {
+ pins = "gpio4", "gpio5", "gpio6", "gpio7";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi3_default {
+ pinconf {
+ pins = "gpio8", "gpio9", "gpio11";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio10";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi3_sleep {
+ pinconf {
+ pins = "gpio8", "gpio9", "gpio10", "gpio11";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi4_default {
+ pinconf {
+ pins = "gpio12", "gpio13", "gpio15";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio14";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi4_sleep {
+ pinconf {
+ pins = "gpio12", "gpio13", "gpio14", "gpio15";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi5_default {
+ pinconf {
+ pins = "gpio16", "gpio17", "gpio19";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio18";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi5_sleep {
+ pinconf {
+ pins = "gpio16", "gpio17", "gpio18", "gpio19";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
+&spi6_default {
+ pinconf {
+ pins = "gpio20", "gpio21", "gpio23";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio22";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+};
+
+&spi6_sleep {
+ pinconf {
+ pins = "gpio20", "gpio21", "gpio22", "gpio23";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l5-supply = <&pm8916_s3>;
@@ -671,3 +1049,11 @@
qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
};
+
+&wcnss_pin_a {
+ pinconf {
+ pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <6>;
+ bias-pull-up;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
index ceeb8a6feed6..9f15148f8a03 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
@@ -33,3 +33,20 @@
};
};
};
+
+&blsp1_uart2_default {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&blsp1_uart2_sleep {
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+};
+
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 21f144c55638..0790232c4654 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -20,12 +20,6 @@
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
};
- pinconf {
- pins = "gpio0", "gpio1",
- "gpio2", "gpio3";
- drive-strength = <16>;
- bias-disable;
- };
};
blsp1_uart1_sleep: blsp1_uart1_sleep {
@@ -34,12 +28,6 @@
pins = "gpio0", "gpio1",
"gpio2", "gpio3";
};
- pinconf {
- pins = "gpio0", "gpio1",
- "gpio2", "gpio3";
- drive-strength = <2>;
- bias-pull-down;
- };
};
blsp1_uart2_default: blsp1_uart2_default {
@@ -47,11 +35,6 @@
function = "blsp_uart2";
pins = "gpio4", "gpio5";
};
- pinconf {
- pins = "gpio4", "gpio5";
- drive-strength = <16>;
- bias-disable;
- };
};
blsp1_uart2_sleep: blsp1_uart2_sleep {
@@ -59,11 +42,6 @@
function = "gpio";
pins = "gpio4", "gpio5";
};
- pinconf {
- pins = "gpio4", "gpio5";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi1_default: spi1_default {
@@ -75,17 +53,6 @@
function = "gpio";
pins = "gpio2";
};
- pinconf {
- pins = "gpio0", "gpio1", "gpio3";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio2";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi1_sleep: spi1_sleep {
@@ -93,11 +60,6 @@
function = "gpio";
pins = "gpio0", "gpio1", "gpio2", "gpio3";
};
- pinconf {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi2_default: spi2_default {
@@ -109,17 +71,6 @@
function = "gpio";
pins = "gpio6";
};
- pinconf {
- pins = "gpio4", "gpio5", "gpio7";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio6";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi2_sleep: spi2_sleep {
@@ -127,11 +78,6 @@
function = "gpio";
pins = "gpio4", "gpio5", "gpio6", "gpio7";
};
- pinconf {
- pins = "gpio4", "gpio5", "gpio6", "gpio7";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi3_default: spi3_default {
@@ -143,17 +89,6 @@
function = "gpio";
pins = "gpio10";
};
- pinconf {
- pins = "gpio8", "gpio9", "gpio11";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio10";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi3_sleep: spi3_sleep {
@@ -161,11 +96,6 @@
function = "gpio";
pins = "gpio8", "gpio9", "gpio10", "gpio11";
};
- pinconf {
- pins = "gpio8", "gpio9", "gpio10", "gpio11";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi4_default: spi4_default {
@@ -177,17 +107,6 @@
function = "gpio";
pins = "gpio14";
};
- pinconf {
- pins = "gpio12", "gpio13", "gpio15";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio14";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi4_sleep: spi4_sleep {
@@ -195,11 +114,6 @@
function = "gpio";
pins = "gpio12", "gpio13", "gpio14", "gpio15";
};
- pinconf {
- pins = "gpio12", "gpio13", "gpio14", "gpio15";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi5_default: spi5_default {
@@ -211,17 +125,6 @@
function = "gpio";
pins = "gpio18";
};
- pinconf {
- pins = "gpio16", "gpio17", "gpio19";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio18";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi5_sleep: spi5_sleep {
@@ -229,11 +132,6 @@
function = "gpio";
pins = "gpio16", "gpio17", "gpio18", "gpio19";
};
- pinconf {
- pins = "gpio16", "gpio17", "gpio18", "gpio19";
- drive-strength = <2>;
- bias-pull-down;
- };
};
spi6_default: spi6_default {
@@ -245,17 +143,6 @@
function = "gpio";
pins = "gpio22";
};
- pinconf {
- pins = "gpio20", "gpio21", "gpio23";
- drive-strength = <12>;
- bias-disable;
- };
- pinconf_cs {
- pins = "gpio22";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
};
spi6_sleep: spi6_sleep {
@@ -263,11 +150,6 @@
function = "gpio";
pins = "gpio20", "gpio21", "gpio22", "gpio23";
};
- pinconf {
- pins = "gpio20", "gpio21", "gpio22", "gpio23";
- drive-strength = <2>;
- bias-pull-down;
- };
};
i2c2_default: i2c2_default {
@@ -275,11 +157,6 @@
function = "blsp_i2c2";
pins = "gpio6", "gpio7";
};
- pinconf {
- pins = "gpio6", "gpio7";
- drive-strength = <16>;
- bias-disable;
- };
};
i2c2_sleep: i2c2_sleep {
@@ -287,11 +164,6 @@
function = "gpio";
pins = "gpio6", "gpio7";
};
- pinconf {
- pins = "gpio6", "gpio7";
- drive-strength = <2>;
- bias-disable;
- };
};
i2c4_default: i2c4_default {
@@ -299,11 +171,6 @@
function = "blsp_i2c4";
pins = "gpio14", "gpio15";
};
- pinconf {
- pins = "gpio14", "gpio15";
- drive-strength = <16>;
- bias-disable;
- };
};
i2c4_sleep: i2c4_sleep {
@@ -311,11 +178,6 @@
function = "gpio";
pins = "gpio14", "gpio15";
};
- pinconf {
- pins = "gpio14", "gpio15";
- drive-strength = <2>;
- bias-disable;
- };
};
i2c6_default: i2c6_default {
@@ -323,11 +185,6 @@
function = "blsp_i2c6";
pins = "gpio22", "gpio23";
};
- pinconf {
- pins = "gpio22", "gpio23";
- drive-strength = <16>;
- bias-disable;
- };
};
i2c6_sleep: i2c6_sleep {
@@ -335,11 +192,6 @@
function = "gpio";
pins = "gpio22", "gpio23";
};
- pinconf {
- pins = "gpio22", "gpio23";
- drive-strength = <2>;
- bias-disable;
- };
};
sdhc2_cd_pin {
@@ -348,22 +200,12 @@
function = "gpio";
pins = "gpio38";
};
- pinconf {
- pins = "gpio38";
- drive-strength = <2>;
- bias-pull-up;
- };
};
sdc2_cd_off: cd_off {
pinmux {
function = "gpio";
pins = "gpio38";
};
- pinconf {
- pins = "gpio38";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -372,21 +214,11 @@
pinmux {
pins = "sdc1_clk";
};
- pinconf {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <16>;
- };
};
sdc1_clk_off: clk_off {
pinmux {
pins = "sdc1_clk";
};
- pinconf {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <2>;
- };
};
};
@@ -395,21 +227,11 @@
pinmux {
pins = "sdc1_cmd";
};
- pinconf {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc1_cmd_off: cmd_off {
pinmux {
pins = "sdc1_cmd";
};
- pinconf {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -418,21 +240,11 @@
pinmux {
pins = "sdc1_data";
};
- pinconf {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc1_data_off: data_off {
pinmux {
pins = "sdc1_data";
};
- pinconf {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -441,21 +253,11 @@
pinmux {
pins = "sdc2_clk";
};
- pinconf {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <16>;
- };
};
sdc2_clk_off: clk_off {
pinmux {
pins = "sdc2_clk";
};
- pinconf {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <2>;
- };
};
};
@@ -464,21 +266,11 @@
pinmux {
pins = "sdc2_cmd";
};
- pinconf {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc2_cmd_off: cmd_off {
pinmux {
pins = "sdc2_cmd";
};
- pinconf {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -487,21 +279,11 @@
pinmux {
pins = "sdc2_data";
};
- pinconf {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <10>;
- };
};
sdc2_data_off: data_off {
pinmux {
pins = "sdc2_data";
};
- pinconf {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <2>;
- };
};
};
@@ -512,12 +294,6 @@
pins = "gpio63", "gpio64", "gpio65", "gpio66",
"gpio67", "gpio68";
};
- pinconf {
- pins = "gpio63", "gpio64", "gpio65", "gpio66",
- "gpio67", "gpio68";
- drive-strength = <8>;
- bias-pull-none;
- };
};
cdc_pdm_lines_sus: pdm_lines_off {
pinmux {
@@ -525,12 +301,6 @@
pins = "gpio63", "gpio64", "gpio65", "gpio66",
"gpio67", "gpio68";
};
- pinconf {
- pins = "gpio63", "gpio64", "gpio65", "gpio66",
- "gpio67", "gpio68";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -596,22 +366,12 @@
function = "pri_mi2s";
pins = "gpio116";
};
- pinconf {
- pins = "gpio116";
- drive-strength = <8>;
- bias-pull-none;
- };
};
ext_mclk_tlmm_lines_sus: mclk_lines_off {
pinmux {
function = "pri_mi2s";
pins = "gpio116";
};
- pinconf {
- pins = "gpio116";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -623,12 +383,6 @@
pins = "gpio112", "gpio117", "gpio118",
"gpio119";
};
- pinconf {
- pins = "gpio112", "gpio117", "gpio118",
- "gpio119";
- drive-strength = <8>;
- bias-pull-none;
- };
};
ext_sec_tlmm_lines_sus: tlmm_lines_off {
pinmux {
@@ -636,12 +390,6 @@
pins = "gpio112", "gpio117", "gpio118",
"gpio119";
};
- pinconf {
- pins = "gpio112", "gpio117", "gpio118",
- "gpio119";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -682,11 +430,5 @@
pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
function = "wcss_wlan";
};
-
- pinconf {
- pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
- drive-strength = <6>;
- bias-pull-up;
- };
};
};
--
2.15.0
--
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^ permalink raw reply related
* [PATCH v2 07/10] arm64: dts: qcom: msm8916: drop remaining unused pinconfs
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon, kernel, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com>
This commit drops pin configs that cannot be moved to board files as
no boards use them.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 33 ------------------------------
1 file changed, 33 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 0790232c4654..c79301f204b7 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -311,26 +311,13 @@
pins = "gpio113", "gpio114", "gpio115",
"gpio116";
};
- pinconf {
- pins = "gpio113", "gpio114", "gpio115",
- "gpio116";
- drive-strength = <8>;
- bias-pull-none;
- };
};
-
ext_pri_tlmm_lines_sus: ext_pa_off {
pinmux {
function = "pri_mi2s";
pins = "gpio113", "gpio114", "gpio115",
"gpio116";
};
- pinconf {
- pins = "gpio113", "gpio114", "gpio115",
- "gpio116";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -340,23 +327,12 @@
function = "pri_mi2s_ws";
pins = "gpio110";
};
- pinconf {
- pins = "gpio110";
- drive-strength = <8>;
- bias-pull-none;
- };
};
-
ext_pri_ws_sus: ext_pa_off {
pinmux {
function = "pri_mi2s_ws";
pins = "gpio110";
};
- pinconf {
- pins = "gpio110";
- drive-strength = <2>;
- bias-disable;
- };
};
};
@@ -403,10 +379,6 @@
function = "dmic0_data";
pins = "gpio1";
};
- pinconf {
- pins = "gpio0", "gpio1";
- drive-strength = <8>;
- };
};
cdc_dmic_lines_sus: dmic_lines_off {
pinmux_dmic0_clk {
@@ -417,11 +389,6 @@
function = "dmic0_data";
pins = "gpio1";
};
- pinconf {
- pins = "gpio0", "gpio1";
- drive-strength = <2>;
- bias-disable;
- };
};
};
--
2.15.0
^ permalink raw reply related
* [PATCH v2 08/10] arm64: dts: qcom: msm8916-pins: move sdhc2 cd node with its siblings
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
linux-soc-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon,
kernel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/@public.gmane.org>
Nodes relative to the first sdhc node were interlaced with node of the
second sdhc. Move sdhc2_cd_pin with its siblings to prevent that. Also
rename the grouping node from sdhc2_cd_pin to pmx_sdc2_cd_pin, as
"pmx_sdc" is the prefix used by other nodes.
Signed-off-by: Damien Riegel <damien.riegel-4ysUXcep3aM1wj+D4I0NRVaTQe2KTcn/@public.gmane.org>
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index c79301f204b7..7704ddecb6c4 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -194,21 +194,6 @@
};
};
- sdhc2_cd_pin {
- sdc2_cd_on: cd_on {
- pinmux {
- function = "gpio";
- pins = "gpio38";
- };
- };
- sdc2_cd_off: cd_off {
- pinmux {
- function = "gpio";
- pins = "gpio38";
- };
- };
- };
-
pmx_sdc1_clk {
sdc1_clk_on: clk_on {
pinmux {
@@ -287,6 +272,21 @@
};
};
+ pmx_sdc2_cd_pin {
+ sdc2_cd_on: cd_on {
+ pinmux {
+ function = "gpio";
+ pins = "gpio38";
+ };
+ };
+ sdc2_cd_off: cd_off {
+ pinmux {
+ function = "gpio";
+ pins = "gpio38";
+ };
+ };
+ };
+
cdc-pdm-lines {
cdc_pdm_lines_act: pdm_lines_on {
pinmux {
--
2.15.0
--
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^ permalink raw reply related
* [PATCH v2 09/10] arm64: dts: qcom: msm8916: normalize I2C and SPI nodes
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon, kernel, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com>
The QUP core can be used either for I2C or SPI, so the same IP is mapped
by a driver or the other. SPI bindings use a leading 0 for the start
address and a size of 0x600, I2C bindings don't have the leading 0 and
have a size 0x1000.
To make them more similar, add the leading 0 to I2C bindings and changes
the size to 0x500 for all of them, as this is the actual size of these
blocks. Also align the second entry of the clocks array.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
Changes in v2:
- Set size to 0x500
arch/arm64/boot/dts/qcom/msm8916.dtsi | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index e16ba8334518..ac440f287633 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -355,7 +355,7 @@
blsp_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b5000 0x600>;
+ reg = <0x078b5000 0x500>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -372,7 +372,7 @@
blsp_spi2: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b6000 0x600>;
+ reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -389,7 +389,7 @@
blsp_spi3: spi@78b7000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b7000 0x600>;
+ reg = <0x078b7000 0x500>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -406,7 +406,7 @@
blsp_spi4: spi@78b8000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b8000 0x600>;
+ reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -423,7 +423,7 @@
blsp_spi5: spi@78b9000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b9000 0x600>;
+ reg = <0x078b9000 0x500>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -440,7 +440,7 @@
blsp_spi6: spi@78ba000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078ba000 0x600>;
+ reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -457,10 +457,10 @@
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b6000 0x1000>;
+ reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
@@ -472,10 +472,10 @@
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b8000 0x1000>;
+ reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_default>;
@@ -487,10 +487,10 @@
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78ba000 0x1000>;
+ reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c6_default>;
--
2.15.0
^ permalink raw reply related
* [PATCH v2 10/10] arm64: dts: qcom: msm8916: add nodes for i2c1, i2c3, i2c5
From: Damien Riegel @ 2017-12-07 15:19 UTC (permalink / raw)
To: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
Cc: Bjorn Andersson, Andy Gross, David Brown, Rob Herring,
Mark Rutland, Catalin Marinas, Will Deacon, kernel, Damien Riegel
In-Reply-To: <20171207151942.5805-1-damien.riegel@savoirfairelinux.com>
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
Changes in v2:
- Reworded commit title
- Changed size to 0x500
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 48 ++++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 42 ++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/msm8916.dtsi | 45 ++++++++++++++++++++++++++++
3 files changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 53c1ddd281a4..11305015ba0b 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -630,6 +630,22 @@
};
};
+&i2c1_default {
+ pinconf {
+ pins = "gpio2", "gpio3";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c1_sleep {
+ pinconf {
+ pins = "gpio2", "gpio3";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
&i2c2_default {
pinconf {
pins = "gpio6", "gpio7";
@@ -646,6 +662,22 @@
};
};
+&i2c3_default {
+ pinconf {
+ pins = "gpio10", "gpio11";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c3_sleep {
+ pinconf {
+ pins = "gpio10", "gpio11";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
&i2c4_default {
pinconf {
pins = "gpio14", "gpio15";
@@ -662,6 +694,22 @@
};
};
+&i2c5_default {
+ pinconf {
+ pins = "gpio18", "gpio19";
+ drive-strength = <16>;
+ bias-disable;
+ };
+};
+
+&i2c5_sleep {
+ pinconf {
+ pins = "gpio18", "gpio19";
+ drive-strength = <2>;
+ bias-disable;
+ };
+};
+
&i2c6_default {
pinconf {
pins = "gpio22", "gpio23";
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 7704ddecb6c4..44e68860fc8c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -152,6 +152,20 @@
};
};
+ i2c1_default: i2c1_default {
+ pinmux {
+ function = "blsp_i2c1";
+ pins = "gpio2", "gpio3";
+ };
+ };
+
+ i2c1_sleep: i2c1_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio2", "gpio3";
+ };
+ };
+
i2c2_default: i2c2_default {
pinmux {
function = "blsp_i2c2";
@@ -166,6 +180,20 @@
};
};
+ i2c3_default: i2c3_default {
+ pinmux {
+ function = "blsp_i2c3";
+ pins = "gpio10", "gpio11";
+ };
+ };
+
+ i2c3_sleep: i2c3_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio10", "gpio11";
+ };
+ };
+
i2c4_default: i2c4_default {
pinmux {
function = "blsp_i2c4";
@@ -180,6 +208,20 @@
};
};
+ i2c5_default: i2c5_default {
+ pinmux {
+ function = "blsp_i2c5";
+ pins = "gpio18", "gpio19";
+ };
+ };
+
+ i2c5_sleep: i2c5_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio18", "gpio19";
+ };
+ };
+
i2c6_default: i2c6_default {
pinmux {
function = "blsp_i2c6";
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index ac440f287633..7478c7337995 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -455,6 +455,21 @@
status = "disabled";
};
+ blsp_i2c1: i2c@78b5000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x078b5000 0x500>;
+ interrupts = <GIC_SPI 95 0>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c1_default>;
+ pinctrl-1 = <&i2c1_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b6000 0x500>;
@@ -470,6 +485,21 @@
status = "disabled";
};
+ blsp_i2c3: i2c@78b7000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x078b7000 0x500>;
+ interrupts = <GIC_SPI 97 0>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c3_default>;
+ pinctrl-1 = <&i2c3_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078b8000 0x500>;
@@ -485,6 +515,21 @@
status = "disabled";
};
+ blsp_i2c5: i2c@78b9000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x078b9000 0x500>;
+ interrupts = <GIC_SPI 99 0>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c5_default>;
+ pinctrl-1 = <&i2c5_sleep>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x078ba000 0x500>;
--
2.15.0
^ permalink raw reply related
* Re: [PATCH V6 4/7] OF: properties: Implement get_match_data() callback
From: Lothar Waßmann @ 2017-12-07 15:20 UTC (permalink / raw)
To: Sinan Kaya
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
timur-sgV2jX0FEOL9JmXXK+q4OQ, open list,
linux-acpi-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
dmaengine-u79uwXL29TY76Z2rM5mHXA, Frank Rowand,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <def8e351-bc2d-7adc-fdc5-362b365302a8-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Hi,
On Thu, 7 Dec 2017 09:45:31 -0500 Sinan Kaya wrote:
> On 12/7/2017 8:10 AM, Lothar Waßmann wrote:
> >> +void *of_fwnode_get_match_data(const struct fwnode_handle *fwnode,
> >> + struct device *dev)
> > Shouldn't this be 'const void *of_fwnode_get_match_data
>
> OF keeps the driver data as a (const void*) internally. ACPI keeps the
> driver data as kernel_ulong_t in struct acpi_device_id.
>
> I tried to find the middle ground here by converting output to void*
> but not keeping const.
>
It should be no problem to cast a (const void *) to an unsigned long
data type (without const qualifier).
Lothar Waßmann
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^ permalink raw reply
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