* Re: [PATCH v14 0/5] ZII RAVE platform driver
From: Guenter Roeck @ 2017-12-17 0:42 UTC (permalink / raw)
To: Andrey Smirnov, Lee Jones
Cc: Pavel Machek, Greg Kroah-Hartman, cphealy-Re5JQEeQqe8AvxtiuMwx3w,
Andy Shevchenko, Lucas Stach, Nikita Yushchenko, Rob Herring,
Mark Rutland, Johan Hovold, devicetree-u79uwXL29TY76Z2rM5mHXA,
Sebastian Reichel, Andrew Morton
In-Reply-To: <20171207162735.25873-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 12/07/2017 08:27 AM, Andrey Smirnov wrote:
> Lee:
>
> This patch set has been marinating out there for a while now and
> yours, I belive, is that last signature I need to start pushing it for
> inclusion. I'd really appreciate if you could spare some of your time
> to give it a look. Thanks!
>
> Everyone:
>
> This patch series is v14 of the driver for supervisory processor found
> on RAVE series of devices from ZII. Supervisory processor is a PIC
> microcontroller connected to various electrical subsystems on RAVE
> devices whose firmware implements protocol to command/qery them.
>
> NOTE:
>
> * This driver dependends on crc_ccitt_false(), added by
> 2da9378d531f8cc6670c7497f20d936b706ab80b in 'linux-next', the patch
> was pulled in by Andrew Morton and is currently avaiting users, so
> this series might have to go in through Andrew's tree
>
Strictly speaking, the solution would be for Andrew to provide an immutable
branch with the above, for Rob to provide an immutable branch based on Andrew's
branch, adding the serdev drivers, for Lee to provide yet another immutable
branch with all those plus the mfd driver, and for Wim to pick it all up
into the watchdog tree.
That seems to be a bit complicated. I would suggest for Lee to pick it all up.
If Lee is busy and ok with it, I'll be happy to pick it all up and submit to
Linus as a separate pull request during the next commit window.
Lee, Andrew, any thoughts/comments ?
Thanks,
Guenter
> Changes since [v13]:
>
> - Fixed incorrect MFD driver menuconfig entry placement
>
> Changes since [v12]:
>
> - Minor comment inconsistencies fixes in rave-sp.c
>
> Changes since [v11]:
>
> - Fix incorrect include in rave-sp-wdt.c as uncovered by kernel
> test robot
>
> Changes since [v10]:
>
> - Collected Acked-by from Rob and Reviewed-by from Guenter
>
> - Incorporated watchdog driver feedback from Gunter and Johan
>
> - Incorporated Johan's feedback for the rest of the code
>
> Changes since [v9]:
>
> - Converted watchdog driver to use watchdog_active() instead of
> watchdog_hw_running() and replaced WARN_ON with a regular error
> message as per feedback from Guenter
>
> - Changed rave_sp_wdt_start() to set WDOG_HW_RUNNING only if
> communicating with hardware was sucessful
>
> - Collected Reviewd-by from Sebastian (for serdev related patches)
>
> - Collected Acked-by from Rob (for watchdog DT bindings)
>
> Changes since [v8]:
>
> - Driver moved from drivers/platform to drivers/mfd
>
> - Collected Reviewed-by from Guenter (for patches 1, 2 and 3)
>
> - Incorporated feedback from Guenter into watchdog driver
>
> - Incorporated feedback from Rob into watchdog DT bindings
>
> - Removed struct rave_sp_rsp_status, which was a leftover from v5
> -> v6 code removal.
>
> - Fixed minor problems reported by checkpatch
>
> Changes since [v7]:
>
> - Added watchdog driver to the patchset, so it would be easier to
> understand how parent/children drivers are tied together
>
> - Added serdev patches to implement devm_serdev_device_open() and make .remove optional
>
> - "Added" missing serdev_device_close() by converting the driver
> to use devm_serdev_device_open()
>
> - Converted the driver to use devm_of_platform_populate()
>
> - Removed needless dependency on MFD_CORE
>
> - Removed dependency on SERIAL_DEV_CTRL_TTYPORT
>
> Changes since [v6]:
>
> - Patch 2/2 has been applied by Lee so it is no longer a part of the series
>
> - Removed all sysfs and debugfs attribute to reduce the scope of
> the driver propsed for inclusion. This is not a critical to have
> feature and can be added/discussed later.
>
> Changes since [v5]:
>
> - Fixed a build break, introduced by a last minute change in [v5]
>
> - Moved majority of attributes that were exposed over sysfs to debugfs
>
> - Document remaining sysfs attributes in Documentation/ABI/testing/sysfs-platform-rave-sp
>
> Changes since [v4]:
>
> - Replaced usage of DEVICE_ATTR with DEVICE_ATTR_RW
>
> - Fixed a number of warnings produces by sparse tool
>
> - Incorporated event more feedback from Andy Shevchenko
>
> - Collected Reviewed-by from Andy
>
> Changes since [v3]:
>
> - Re-collected lost Acked-by from Rob
>
> - Incorporated further feedback from Andy Shevchenko
>
> - Dropped useless change (stray newline) to drivers/mfd/Makefile
>
> Changes since [v2]:
>
> - Fixed swapped command codes in rave_sp_common_get_boot_source()
> and rave_sp_common_set_boot_source() revealed by further testing
> of the code
>
> - Incorporated feedback from Andy Shevchenko
>
> Changes since [v1]:
>
> - Updated wording in DT-bindings as per Rob's request.
>
> - Collected Rob's Acked-by for patch 2/2
>
> Feedback is greatly appreciated!
>
> Thanks,
> Andrey Smirnov
>
> [v13] lkml.kernel.org/r/20171204161118.19558-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v12] lkml.kernel.org/r/20171109160556.17018-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v11] lkml.kernel.org/r/20171106152935.16920-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v10] lkml.kernel.org/r/20171031163656.24552-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v9] lkml.kernel.org/r/20171025190421.18415-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v8] lkml.kernel.org/r/20171018170136.12347-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v7] lkml.kernel.org/r/20171013061321.31252-2-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v6] lkml.kernel.org/r/20170828163131.24815-2-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v5] lkml.kernel.org/r/20170728142704.11156-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v4] lkml.kernel.org/r/20170725184450.13171-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v3] lkml.kernel.org/r/20170724150915.4824-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v2] lkml.kernel.org/r/20170718175604.11735-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
> [v1] lkml.kernel.org/r/20170710170449.4544-1-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
>
> Andrey Smirnov (5):
> serdev: Make .remove in struct serdev_device_driver optional
> serdev: Introduce devm_serdev_device_open()
> mfd: Add driver for RAVE Supervisory Processor
> watchdog: Add RAVE SP watchdog driver
> dt-bindings: watchdog: Add bindings for RAVE SP watchdog driver
>
> .../bindings/watchdog/zii,rave-sp-wdt.txt | 39 ++
> Documentation/driver-model/devres.txt | 3 +
> drivers/mfd/Kconfig | 8 +
> drivers/mfd/Makefile | 2 +
> drivers/mfd/rave-sp.c | 660 +++++++++++++++++++++
> drivers/tty/serdev/core.c | 31 +-
> drivers/watchdog/Kconfig | 7 +
> drivers/watchdog/Makefile | 1 +
> drivers/watchdog/rave-sp-wdt.c | 357 +++++++++++
> include/linux/mfd/rave-sp.h | 56 ++
> include/linux/serdev.h | 1 +
> 11 files changed, 1163 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/watchdog/zii,rave-sp-wdt.txt
> create mode 100644 drivers/mfd/rave-sp.c
> create mode 100644 drivers/watchdog/rave-sp-wdt.c
> create mode 100644 include/linux/mfd/rave-sp.h
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH V2 0/8] ARM: dts: keystone*: Stage 1 cleanup for W=1
From: santosh.shilimkar-QHcLZuEGTsvQT0dZR+AlfA @ 2017-12-16 22:39 UTC (permalink / raw)
To: Nishanth Menon, Russell King, Mark Rutland, Rob Herring,
Santosh Shilimkar
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
afd-l0cyMroinI0
In-Reply-To: <20171216204040.18017-1-nm-l0cyMroinI0@public.gmane.org>
On 12/16/17 12:40 PM, Nishanth Menon wrote:
> Hi,
> The following changes have been done in the updated series:
> * Updates for couple few typo errors in commit messages
> * copyrights are now always behind description
> * rebased to maintainer branch (was previously against master)
>
> Rebased to:
> git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
> for_4.16/keystone-dts : 7fbec17465fc ARM: dts: k2g-evm: Enable UART 2
>
Thanks Nishant. Applied and should show up in next soon.
Regards,
Santosh
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v3 05/11] thermal: armada: Add support for Armada AP806
From: Baruch Siach @ 2017-12-16 22:22 UTC (permalink / raw)
To: Miquel Raynal
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Mark Rutland,
Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Catalin Marinas, Will Deacon, linux-pm, devicetree,
linux-arm-kernel, Thomas Petazzoni, Antoine Tenart, Nadav Haklai,
David Sniatkiwicz
In-Reply-To: <20171214103011.24713-6-miquel.raynal@free-electrons.com>
Hi Miquèl,
On Thu, Dec 14, 2017 at 11:30:05AM +0100, Miquel Raynal wrote:
> From: Baruch Siach <baruch@tkos.co.il>
>
> The AP806 component is integrated in the Armada 8k and 7k lines of
> processors.
>
> The thermal sensor sample field on the status register is a signed
> value. Extend armada_get_temp() to handle signed values.
>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> ---
[...]
> +static void armada_ap806_init_sensor(struct platform_device *pdev,
> + struct armada_thermal_priv *priv)
> +{
> + u32 reg;
> +
> + if (!priv->control0) {
> + dev_err(&pdev->dev,
> + "Cannot access to control0 (control LSB) register\n");
> + return;
> + }
With the probe time control area size validation this check would not be
needed.
baruch
> +
> + reg = readl_relaxed(priv->control0);
> + reg &= ~CONTROL0_TSEN_RESET;
> + reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
> + writel(reg, priv->control0);
> + msleep(10);
> +}
--
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
- baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -
^ permalink raw reply
* Re: [PATCH v3 04/11] thermal: armada: Rationalize register accesses
From: Baruch Siach @ 2017-12-16 22:18 UTC (permalink / raw)
To: Miquel Raynal
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Mark Rutland,
Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Catalin Marinas, Will Deacon, linux-pm-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Thomas Petazzoni, Antoine Tenart, Nadav Haklai, David Sniatkiwicz
In-Reply-To: <20171214103011.24713-5-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hi Miquèl,
On Thu, Dec 14, 2017 at 11:30:04AM +0100, Miquel Raynal wrote:
> Bindings were incomplete for a long time by only exposing one of the two
> available control registers. To ease the migration to the full bindings
> (already in use for the Armada 375 SoC), rename the pointers for
> clarification. This way, it will only be needed to add another pointer
> to access the other control register when the time comes.
>
> This avoids dangerous situations where the offset 0 of the control
> area can be either one register or the other depending on the bindings
> used. After this change, device trees of other SoCs could be migrated to
> the "full" bindings if they may benefit from features from the
> unaccessible register, without any change in the driver.
>
> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
[...]
> + /*
> + * Legacy DT bindings only described "control1" register (also referred
> + * as "control MSB" on old documentation). New bindings cover
> + * "control0/control LSB" and "control1/control MSB" registers within
> + * the same resource, which is then of size 8 instead of 4.
> + */
> + if ((res->end - res->start) == LEGACY_CONTROL_MEM_LEN) {
> + /* ->control0 unavailable in this configuration */
> + priv->control1 = control + LEGACY_CONTROL1_OFFSET;
> + } else {
> + priv->control0 = control + CONTROL0_OFFSET;
> + priv->control1 = control + CONTROL1_OFFSET;
> + }
I think we need to add a check here that the control registers area size
matches the expected value given the compatible string. In case of mismatch
probe should fail.
> priv->data = (struct armada_thermal_data *)match->data;
> priv->data->init_sensor(pdev, priv);
baruch
--
http://baruch.siach.name/blog/ ~. .~ Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
- baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org - tel: +972.52.368.4656, http://www.tkos.co.il -
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v4 2/2] misc: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
From: Randy Dunlap @ 2017-12-16 22:18 UTC (permalink / raw)
To: Dhaval Shah, arnd-r2nGTMty4D4,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
michal.simek-gjFFaj9aHVfQT0dZR+AlfA, hyunk-gjFFaj9aHVfQT0dZR+AlfA,
Dhaval Shah
In-Reply-To: <1513322656-4571-3-git-send-email-dshah-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
On 12/14/2017 11:24 PM, Dhaval Shah wrote:
> Xilinx ZYNQMP logicoreIP Init driver is based on the new
> LogiCoreIP design created. This driver provides the processing system
> and programmable logic isolation. Set the frequency based on the clock
> information get from the logicoreIP register set.
>
> It is put in drivers/misc as there is no subsystem for this logicoreIP.
>
> Signed-off-by: Dhaval Shah <dshah-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
> ---
>
> drivers/misc/Kconfig | 15 ++
> drivers/misc/Makefile | 1 +
> drivers/misc/xlnx_vcu.c | 631 ++++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 647 insertions(+)
> create mode 100644 drivers/misc/xlnx_vcu.c
> diff --git a/drivers/misc/xlnx_vcu.c b/drivers/misc/xlnx_vcu.c
> new file mode 100644
> index 0000000..f489d34
> --- /dev/null
> +++ b/drivers/misc/xlnx_vcu.c
> @@ -0,0 +1,631 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Xilinx VCU Init
> + *
> + * Copyright (C) 2016 - 2017 Xilinx, Inc.
> + *
> + * Contacts Dhaval Shah <dshah-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
> + */
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/errno.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
[snip]
> +/**
> + * xvcu_set_vcu_pll_info - Set the VCU PLL info
> + * @xvcu: Pointer to the xvcu_device structure
> + *
> + * Programming the VCU PLL based on the user configuration
> + * (ref clock freq, core clock freq, mcu clock freq).
> + * Core clock frequency has higher priority than mcu clock frequency
> + * Errors in following cases
> + * - When mcu or clock clock get from logicoreIP is 0
> + * - When VCU PLL DIV related bits value other than 1
> + * - When proper data not found for given data
> + * - When sis570_1 clocksource related operation failed
> + *
> + * Return: Returns status, either success or error+reason
> + */
> +static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu)
> +{
> + u32 refclk, coreclk, mcuclk, inte, deci;
> + u32 divisor_mcu, divisor_core, fvco;
> + u32 clkoutdiv, vcu_pll_ctrl, pll_clk;
> + u32 cfg_val, mod, ctrl;
> + int ret;
> + unsigned int i;
> + const struct xvcu_pll_cfg *found = NULL;
> +
> + inte = xvcu_read(xvcu->logicore_reg_ba, VCU_PLL_CLK);
> + deci = xvcu_read(xvcu->logicore_reg_ba, VCU_PLL_CLK_DEC);
> + coreclk = xvcu_read(xvcu->logicore_reg_ba, VCU_CORE_CLK) * MHZ;
> + mcuclk = xvcu_read(xvcu->logicore_reg_ba, VCU_MCU_CLK) * MHZ;
> + if (!mcuclk || !coreclk) {
> + dev_err(xvcu->dev, "Invalid mcu and core clock data\n");
> + return -EINVAL;
> + }
> +
> + refclk = (inte * MHZ) + (deci * (MHZ / FRAC));
> + dev_dbg(xvcu->dev, "Ref clock from logicoreIP is %uHz\n", refclk);
> + dev_dbg(xvcu->dev, "Core clock from logicoreIP is %uHz\n", coreclk);
> + dev_dbg(xvcu->dev, "Mcu clock from logicoreIP is %uHz\n", mcuclk);
> +
> + clk_disable_unprepare(xvcu->pll_ref);
> + ret = clk_set_rate(xvcu->pll_ref, refclk);
> + if (ret)
> + dev_warn(xvcu->dev, "failed to set logicoreIP refclk rate\n");
> +
> + ret = clk_prepare_enable(xvcu->pll_ref);
> + if (ret) {
> + dev_err(xvcu->dev, "failed to enable pll_ref clock source\n");
> + return ret;
> + }
> +
> + refclk = clk_get_rate(xvcu->pll_ref);
> +
> + /*
> + * The divide-by-2 should be always enabled (==1)
> + * to meet the timing in the design.
> + * Otherwise, it's an error
> + */
> + vcu_pll_ctrl = xvcu_read(xvcu->vcu_slcr_ba, VCU_PLL_CTRL);
> + clkoutdiv = vcu_pll_ctrl >> VCU_PLL_CTRL_CLKOUTDIV_SHIFT;
> + clkoutdiv = clkoutdiv && VCU_PLL_CTRL_CLKOUTDIV_MASK;
> + if (clkoutdiv != 1) {
> + dev_err(xvcu->dev, "clkoutdiv value is invalid\n");
> + return -EINVAL;
> + }
> +
> + for (i = ARRAY_SIZE(xvcu_pll_cfg) - 1; i > 0; i--) {
When does that for loop terminate?
> + const struct xvcu_pll_cfg *cfg = &xvcu_pll_cfg[i];
> +
> + fvco = cfg->fbdiv * refclk;
> + if (fvco >= FVCO_MIN && fvco <= FVCO_MAX) {
> + pll_clk = fvco / VCU_PLL_DIV2;
> + if (fvco % VCU_PLL_DIV2 != 0)
> + pll_clk++;
> + mod = pll_clk % coreclk;
> + if (mod < LIMIT) {
> + divisor_core = pll_clk / coreclk;
> + } else if (coreclk - mod < LIMIT) {
> + divisor_core = pll_clk / coreclk;
> + divisor_core++;
> + } else {
> + continue;
> + }
> + if (divisor_core >= DIVISOR_MIN &&
> + divisor_core <= DIVISOR_MAX) {
> + found = cfg;
> + divisor_mcu = pll_clk / mcuclk;
> + mod = pll_clk % mcuclk;
> + if (mcuclk - mod < LIMIT)
> + divisor_mcu++;
> + break;
> + }
> + }
> + }
> +
> + if (!found) {
> + dev_err(xvcu->dev, "Invalid clock combination.\n");
> + return -EINVAL;
> + }
[snip]
--
~Randy
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH 19/25] arm: mt7: dts: Remove leading 0x and 0s from bindings notation
From: Matthias Brugger @ 2017-12-16 21:12 UTC (permalink / raw)
To: Mathieu Malaterre, Rob Herring
Cc: Mark Rutland, Russell King,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171215124652.30852-1-malat-8fiUuRrzOP0dnm+yROfE0A@public.gmane.org>
On 12/15/2017 01:46 PM, Mathieu Malaterre wrote:
> Improve the DTS files by removing all the leading "0x" and zeros to fix the
> following dtc warnings:
>
> Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
>
> and
>
> Warning (unit_address_format): Node /XXX unit name should not have leading 0s
>
> Converted using the following command:
>
> find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
>
> For simplicity, two sed expressions were used to solve each warnings separately.
>
> To make the regex expression more robust a few other issues were resolved,
> namely setting unit-address to lower case, and adding a whitespace before the
> the opening curly brace:
>
> https://elinux.org/Device_Tree_Linux#Linux_conventions
>
> This will solve as a side effect warning:
>
> Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
>
> This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
>
> Reported-by: David Daney <ddaney-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
> Suggested-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Mathieu Malaterre <malat-8fiUuRrzOP0dnm+yROfE0A@public.gmane.org>
> ---
> arch/arm/boot/dts/mt7623n-rfb-nand.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Pushed to v4.15-next/dts32
Thanks a lot,
Matthias
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH] ARM: dts: sun9i: Enable USB support on Cubieboard4
From: Mark Kettenis @ 2017-12-16 20:58 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
Cc: Mark Kettenis
On the Cubieboard4 HCI0 is directly connected to a USB connector,
and HCI2 is connected to a USB hub on the board. HCI1 is available
with HSIC throug 2 pins on the GPIO expansion header, but left
disabled just like on the Optimus board.
This patch also adds the VBUS regulators.
Signed-off-by: Mark Kettenis <kettenis-7YlrpqBBQ3VAfugRpC6u6w@public.gmane.org>
---
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 36 +++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 4024639aa005..e38623265695 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -74,6 +74,24 @@
};
};
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb2-drvbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
+ };
+
+ reg_usb3_vbus: usb3-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-drvbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&pio 7 14 GPIO_ACTIVE_HIGH>; /* PH14 */
+ };
+
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
@@ -83,6 +101,14 @@
};
};
+&ehci0 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
@@ -408,3 +434,13 @@
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
+
+&usbphy1 {
+ phy-supply = <®_usb1_vbus>;
+ status = "okay";
+};
+
+&usbphy3 {
+ phy-supply = <®_usb3_vbus>;
+ status = "okay";
+};
--
2.15.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH V2 8/8] ARM: dts: keystone-k2l-clocks: Add missing unit name to clock nodes that have regs
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel, devicetree, linux-arm-kernel, afd, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm@ti.com>
Add the control register as the base for the clock nodes which are
missing them. This squashes some 22 warnings of the effect when built
with W=1.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since V1: rebase
V1: https://patchwork.kernel.org/patch/10115123/
arch/arm/boot/dts/keystone-k2l-clocks.dtsi | 44 +++++++++++++++---------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2l-clocks.dtsi b/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
index b3f82040a722..635528064dea 100644
--- a/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
@@ -41,7 +41,7 @@ clocks {
reg-names = "control";
};
- clkdfeiqnsys: clkdfeiqnsys {
+ clkdfeiqnsys: clkdfeiqnsys@2350004 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -51,7 +51,7 @@ clocks {
domain-id = <0>;
};
- clkpcie1: clkpcie1 {
+ clkpcie1: clkpcie1@235002c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -61,7 +61,7 @@ clocks {
domain-id = <4>;
};
- clkgem1: clkgem1 {
+ clkgem1: clkgem1@2350040 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -71,7 +71,7 @@ clocks {
domain-id = <9>;
};
- clkgem2: clkgem2 {
+ clkgem2: clkgem2@2350044 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -81,7 +81,7 @@ clocks {
domain-id = <10>;
};
- clkgem3: clkgem3 {
+ clkgem3: clkgem3@2350048 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -91,7 +91,7 @@ clocks {
domain-id = <11>;
};
- clktac: clktac {
+ clktac: clktac@2350064 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -101,7 +101,7 @@ clocks {
domain-id = <17>;
};
- clkrac: clkrac {
+ clkrac: clkrac@2350068 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -111,7 +111,7 @@ clocks {
domain-id = <17>;
};
- clkdfepd0: clkdfepd0 {
+ clkdfepd0: clkdfepd0@235006c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -121,7 +121,7 @@ clocks {
domain-id = <18>;
};
- clkfftc0: clkfftc0 {
+ clkfftc0: clkfftc0@2350070 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -131,7 +131,7 @@ clocks {
domain-id = <19>;
};
- clkosr: clkosr {
+ clkosr: clkosr@2350088 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -141,7 +141,7 @@ clocks {
domain-id = <21>;
};
- clktcp3d0: clktcp3d0 {
+ clktcp3d0: clktcp3d0@235008c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -151,7 +151,7 @@ clocks {
domain-id = <22>;
};
- clktcp3d1: clktcp3d1 {
+ clktcp3d1: clktcp3d1@2350094 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -161,7 +161,7 @@ clocks {
domain-id = <23>;
};
- clkvcp0: clkvcp0 {
+ clkvcp0: clkvcp0@235009c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -171,7 +171,7 @@ clocks {
domain-id = <24>;
};
- clkvcp1: clkvcp1 {
+ clkvcp1: clkvcp1@23500a0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -181,7 +181,7 @@ clocks {
domain-id = <24>;
};
- clkvcp2: clkvcp2 {
+ clkvcp2: clkvcp2@23500a4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -191,7 +191,7 @@ clocks {
domain-id = <24>;
};
- clkvcp3: clkvcp3 {
+ clkvcp3: clkvcp3@23500a8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -201,7 +201,7 @@ clocks {
domain-id = <24>;
};
- clkbcp: clkbcp {
+ clkbcp: clkbcp@23500bc {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -211,7 +211,7 @@ clocks {
domain-id = <26>;
};
- clkdfepd1: clkdfepd1 {
+ clkdfepd1: clkdfepd1@23500c0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -221,7 +221,7 @@ clocks {
domain-id = <27>;
};
- clkfftc1: clkfftc1 {
+ clkfftc1: clkfftc1@23500c4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -231,7 +231,7 @@ clocks {
domain-id = <28>;
};
- clkiqnail: clkiqnail {
+ clkiqnail: clkiqnail@23500c8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -241,7 +241,7 @@ clocks {
domain-id = <29>;
};
- clkuart2: clkuart2 {
+ clkuart2: clkuart2@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -251,7 +251,7 @@ clocks {
domain-id = <0>;
};
- clkuart3: clkuart3 {
+ clkuart3: clkuart3@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
--
2.14.1
^ permalink raw reply related
* [PATCH V2 7/8] ARM: dts: keystone-k2e-clocks: Add missing unit name to clock nodes that have regs
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
afd-l0cyMroinI0, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm-l0cyMroinI0@public.gmane.org>
Add the control register as the base for the clock nodes which are
missing them. This squashes the following warnings of the effect when built
with W=1:
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkusb1 has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkhyperlink0 has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkpcie1 has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc@0/clocks/clkxge has a reg or ranges property, but no unit name
Reported-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Signed-off-by: Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>
---
Changes since V1: rebase
V1: https://patchwork.kernel.org/patch/10115125/
arch/arm/boot/dts/keystone-k2e-clocks.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2e-clocks.dtsi b/arch/arm/boot/dts/keystone-k2e-clocks.dtsi
index 915a99d5bc5e..5e0e7d232161 100644
--- a/arch/arm/boot/dts/keystone-k2e-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e-clocks.dtsi
@@ -32,7 +32,7 @@ clocks {
reg-names = "control";
};
- clkusb1: clkusb1 {
+ clkusb1: clkusb1@2350004 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@@ -42,7 +42,7 @@ clocks {
domain-id = <0>;
};
- clkhyperlink0: clkhyperlink0 {
+ clkhyperlink0: clkhyperlink02350030 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -52,7 +52,7 @@ clocks {
domain-id = <5>;
};
- clkpcie1: clkpcie1 {
+ clkpcie1: clkpcie1@235006c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -62,7 +62,7 @@ clocks {
domain-id = <18>;
};
- clkxge: clkxge {
+ clkxge: clkxge@23500c8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
--
2.14.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH V2 6/8] ARM: dts: keystone-hk-clocks: Add missing unit name to clock nodes that have regs
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel, devicetree, linux-arm-kernel, afd, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm@ti.com>
Add the control register as the base for the clock nodes which are
missing them. This squashes some 36 warnings of the effect when built
with W=1.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since V1: rebase
V1: https://patchwork.kernel.org/patch/10115121/
arch/arm/boot/dts/keystone-k2hk-clocks.dtsi | 74 ++++++++++++++---------------
1 file changed, 37 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi b/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi
index 560475346fda..4ba6912176ef 100644
--- a/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi
@@ -50,7 +50,7 @@ clocks {
reg-names = "control";
};
- clktsip: clktsip {
+ clktsip: clktsip@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@@ -60,7 +60,7 @@ clocks {
domain-id = <0>;
};
- clksrio: clksrio {
+ clksrio: clksrio@235002c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1rstiso13>;
@@ -70,7 +70,7 @@ clocks {
domain-id = <4>;
};
- clkhyperlink0: clkhyperlink0 {
+ clkhyperlink0: clkhyperlink0@2350030 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -80,7 +80,7 @@ clocks {
domain-id = <5>;
};
- clkgem1: clkgem1 {
+ clkgem1: clkgem1@2350040 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -90,7 +90,7 @@ clocks {
domain-id = <9>;
};
- clkgem2: clkgem2 {
+ clkgem2: clkgem2@2350044 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -100,7 +100,7 @@ clocks {
domain-id = <10>;
};
- clkgem3: clkgem3 {
+ clkgem3: clkgem3@2350048 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -110,7 +110,7 @@ clocks {
domain-id = <11>;
};
- clkgem4: clkgem4 {
+ clkgem4: clkgem4@235004c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -120,7 +120,7 @@ clocks {
domain-id = <12>;
};
- clkgem5: clkgem5 {
+ clkgem5: clkgem5@2350050 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -130,7 +130,7 @@ clocks {
domain-id = <13>;
};
- clkgem6: clkgem6 {
+ clkgem6: clkgem6@2350054 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -140,7 +140,7 @@ clocks {
domain-id = <14>;
};
- clkgem7: clkgem7 {
+ clkgem7: clkgem7@2350058 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -150,7 +150,7 @@ clocks {
domain-id = <15>;
};
- clkddr31: clkddr31 {
+ clkddr31: clkddr31@2350060 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -160,7 +160,7 @@ clocks {
domain-id = <16>;
};
- clktac: clktac {
+ clktac: clktac@2350064 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -170,7 +170,7 @@ clocks {
domain-id = <17>;
};
- clkrac01: clkrac01 {
+ clkrac01: clkrac01@2350068 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -180,7 +180,7 @@ clocks {
domain-id = <17>;
};
- clkrac23: clkrac23 {
+ clkrac23: clkrac23@235006c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -190,7 +190,7 @@ clocks {
domain-id = <18>;
};
- clkfftc0: clkfftc0 {
+ clkfftc0: clkfftc0@2350070 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -200,7 +200,7 @@ clocks {
domain-id = <19>;
};
- clkfftc1: clkfftc1 {
+ clkfftc1: clkfftc1@2350074 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -210,7 +210,7 @@ clocks {
domain-id = <19>;
};
- clkfftc2: clkfftc2 {
+ clkfftc2: clkfftc2@2350078 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -220,7 +220,7 @@ clocks {
domain-id = <20>;
};
- clkfftc3: clkfftc3 {
+ clkfftc3: clkfftc3@235007c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -230,7 +230,7 @@ clocks {
domain-id = <20>;
};
- clkfftc4: clkfftc4 {
+ clkfftc4: clkfftc4@2350080 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -240,7 +240,7 @@ clocks {
domain-id = <20>;
};
- clkfftc5: clkfftc5 {
+ clkfftc5: clkfftc5@2350084 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -250,7 +250,7 @@ clocks {
domain-id = <20>;
};
- clkaif: clkaif {
+ clkaif: clkaif@2350088 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -260,7 +260,7 @@ clocks {
domain-id = <21>;
};
- clktcp3d0: clktcp3d0 {
+ clktcp3d0: clktcp3d0@235008c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -270,7 +270,7 @@ clocks {
domain-id = <22>;
};
- clktcp3d1: clktcp3d1 {
+ clktcp3d1: clktcp3d1@2350090 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -280,7 +280,7 @@ clocks {
domain-id = <22>;
};
- clktcp3d2: clktcp3d2 {
+ clktcp3d2: clktcp3d2@2350094 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -290,7 +290,7 @@ clocks {
domain-id = <23>;
};
- clktcp3d3: clktcp3d3 {
+ clktcp3d3: clktcp3d3@2350098 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -300,7 +300,7 @@ clocks {
domain-id = <23>;
};
- clkvcp0: clkvcp0 {
+ clkvcp0: clkvcp0@235009c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -310,7 +310,7 @@ clocks {
domain-id = <24>;
};
- clkvcp1: clkvcp1 {
+ clkvcp1: clkvcp1@23500a0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -320,7 +320,7 @@ clocks {
domain-id = <24>;
};
- clkvcp2: clkvcp2 {
+ clkvcp2: clkvcp2@23500a4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -330,7 +330,7 @@ clocks {
domain-id = <24>;
};
- clkvcp3: clkvcp3 {
+ clkvcp3: clkvcp3@23500a8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -340,7 +340,7 @@ clocks {
domain-id = <24>;
};
- clkvcp4: clkvcp4 {
+ clkvcp4: clkvcp4@23500ac {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -350,7 +350,7 @@ clocks {
domain-id = <25>;
};
- clkvcp5: clkvcp5 {
+ clkvcp5: clkvcp5@23500b0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -360,7 +360,7 @@ clocks {
domain-id = <25>;
};
- clkvcp6: clkvcp6 {
+ clkvcp6: clkvcp6@23500b4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -370,7 +370,7 @@ clocks {
domain-id = <25>;
};
- clkvcp7: clkvcp7 {
+ clkvcp7: clkvcp7@23500b8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -380,7 +380,7 @@ clocks {
domain-id = <25>;
};
- clkbcp: clkbcp {
+ clkbcp: clkbcp@23500bc {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -390,7 +390,7 @@ clocks {
domain-id = <26>;
};
- clkdxb: clkdxb {
+ clkdxb: clkdxb@23500c0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -400,7 +400,7 @@ clocks {
domain-id = <27>;
};
- clkhyperlink1: clkhyperlink1 {
+ clkhyperlink1: clkhyperlink1@23500c4 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -410,7 +410,7 @@ clocks {
domain-id = <28>;
};
- clkxge: clkxge {
+ clkxge: clkxge@23500c8 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
--
2.14.1
^ permalink raw reply related
* [PATCH V2 5/8] ARM: dts: keystone-clocks: Add missing unit name to clock nodes that have regs
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel, devicetree, linux-arm-kernel, afd, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm@ti.com>
Add the control register as the base for the clock nodes which are
missing them. This squashes some 78 warnings of the effect when built
with W=1.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since V1: rebase
V1: https://patchwork.kernel.org/patch/10115129/
arch/arm/boot/dts/keystone-clocks.dtsi | 52 +++++++++++++++++-----------------
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi
index f23147093fd8..457515b0736a 100644
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -48,7 +48,7 @@ clocks {
clock-output-names = "gemtraceclk";
};
- chipstmxptclk: chipstmxptclk {
+ chipstmxptclk: chipstmxptclk@2310164 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-divider-clock";
clocks = <&mainmuxclk>;
@@ -157,7 +157,7 @@ clocks {
clock-output-names = "chipclk1rstiso112";
};
- clkmodrst0: clkmodrst0 {
+ clkmodrst0: clkmodrst0@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@@ -168,7 +168,7 @@ clocks {
};
- clkusb: clkusb {
+ clkusb: clkusb@2350008 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@@ -178,7 +178,7 @@ clocks {
domain-id = <0>;
};
- clkaemifspi: clkaemifspi {
+ clkaemifspi: clkaemifspi@235000c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
@@ -189,7 +189,7 @@ clocks {
};
- clkdebugsstrc: clkdebugsstrc {
+ clkdebugsstrc: clkdebugsstrc@2350014 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -199,7 +199,7 @@ clocks {
domain-id = <1>;
};
- clktetbtrc: clktetbtrc {
+ clktetbtrc: clktetbtrc@2350018 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
@@ -209,7 +209,7 @@ clocks {
domain-id = <1>;
};
- clkpa: clkpa {
+ clkpa: clkpa@235001c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&paclk13>;
@@ -219,7 +219,7 @@ clocks {
domain-id = <2>;
};
- clkcpgmac: clkcpgmac {
+ clkcpgmac: clkcpgmac@2350020 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkpa>;
@@ -229,7 +229,7 @@ clocks {
domain-id = <2>;
};
- clksa: clksa {
+ clksa: clksa@2350024 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkpa>;
@@ -239,7 +239,7 @@ clocks {
domain-id = <2>;
};
- clkpcie: clkpcie {
+ clkpcie: clkpcie@2350028 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -249,7 +249,7 @@ clocks {
domain-id = <3>;
};
- clksr: clksr {
+ clksr: clksr@2350034 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1rstiso112>;
@@ -259,7 +259,7 @@ clocks {
domain-id = <6>;
};
- clkgem0: clkgem0 {
+ clkgem0: clkgem0@235003c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>;
@@ -269,7 +269,7 @@ clocks {
domain-id = <8>;
};
- clkddr30: clkddr30 {
+ clkddr30: clkddr30@235005c {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
@@ -279,7 +279,7 @@ clocks {
domain-id = <16>;
};
- clkwdtimer0: clkwdtimer0 {
+ clkwdtimer0: clkwdtimer0@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -289,7 +289,7 @@ clocks {
domain-id = <0>;
};
- clkwdtimer1: clkwdtimer1 {
+ clkwdtimer1: clkwdtimer1@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -299,7 +299,7 @@ clocks {
domain-id = <0>;
};
- clkwdtimer2: clkwdtimer2 {
+ clkwdtimer2: clkwdtimer2@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -309,7 +309,7 @@ clocks {
domain-id = <0>;
};
- clkwdtimer3: clkwdtimer3 {
+ clkwdtimer3: clkwdtimer3@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -319,7 +319,7 @@ clocks {
domain-id = <0>;
};
- clktimer15: clktimer15 {
+ clktimer15: clktimer15@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -329,7 +329,7 @@ clocks {
domain-id = <0>;
};
- clkuart0: clkuart0 {
+ clkuart0: clkuart0@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -339,7 +339,7 @@ clocks {
domain-id = <0>;
};
- clkuart1: clkuart1 {
+ clkuart1: clkuart1@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -349,7 +349,7 @@ clocks {
domain-id = <0>;
};
- clkaemif: clkaemif {
+ clkaemif: clkaemif@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkaemifspi>;
@@ -359,7 +359,7 @@ clocks {
domain-id = <0>;
};
- clkusim: clkusim {
+ clkusim: clkusim@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -369,7 +369,7 @@ clocks {
domain-id = <0>;
};
- clki2c: clki2c {
+ clki2c: clki2c@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -379,7 +379,7 @@ clocks {
domain-id = <0>;
};
- clkspi: clkspi {
+ clkspi: clkspi@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkaemifspi>;
@@ -389,7 +389,7 @@ clocks {
domain-id = <0>;
};
- clkgpio: clkgpio {
+ clkgpio: clkgpio@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
@@ -399,7 +399,7 @@ clocks {
domain-id = <0>;
};
- clkkeymgr: clkkeymgr {
+ clkkeymgr: clkkeymgr@2350000 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>;
--
2.14.1
^ permalink raw reply related
* [PATCH V2 4/8] ARM: dts: keystone: Add missing unit name to interrupt controller
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel, devicetree, linux-arm-kernel, afd, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm@ti.com>
Add base address for GIC as unit address. This also squashes the
following warnings when built with W=1:
arch/arm/boot/dts/keystone-k2hk-evm.dtb: Warning (unit_address_vs_reg): Node /interrupt-controller has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2l-evm.dtb: Warning (unit_address_vs_reg): Node /interrupt-controller has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /interrupt-controller has a reg or ranges property, but no unit name
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since V1: rebase
V1: https://patchwork.kernel.org/patch/10115099/
arch/arm/boot/dts/keystone.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 01496910587a..93ea5c69ea77 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -27,7 +27,7 @@
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};
- gic: interrupt-controller {
+ gic: interrupt-controller@2561000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
--
2.14.1
^ permalink raw reply related
* [PATCH V2 3/8] ARM: dts: keystone: Get rid of usage of skeleton.dtsi
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
afd-l0cyMroinI0, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm-l0cyMroinI0@public.gmane.org>
skeleton.dtsi doesn't offer us any real benefits with most of the
parameters being overridden. So, just drop the same entirely and
introduce appropriate changes for chosen node and memory back to
our top level definition.
This also squashes the following warnings with W=1:
arch/arm/boot/dts/keystone-k2hk-evm.dtb: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2l-evm.dtb: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Reported-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Signed-off-by: Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>
---
Changes since v1: Typo fixes in commit message
v1: https://patchwork.kernel.org/patch/10115097/
arch/arm/boot/dts/keystone.dtsi | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 0e8d094515cc..01496910587a 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -6,8 +6,6 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
-#include "skeleton.dtsi"
-
/ {
compatible = "ti,keystone";
model = "Texas Instruments Keystone 2 SoC";
@@ -22,7 +20,10 @@
spi2 = &spi2;
};
- memory {
+ chosen { };
+
+ memory: memory@80000000 {
+ device_type = "memory";
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};
--
2.14.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH V2 2/8] ARM: dts: keystone*: Use a single soc0 instance
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel, devicetree, linux-arm-kernel, afd, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm@ti.com>
Provide a soc0 node and reference the same to simplify dts. This also
resolves the following warnings when built with W=1:
arch/arm/boot/dts/keystone-k2hk-evm.dtb: Warning (unit_address_vs_reg): Node /soc has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2l-evm.dtb: Warning (unit_address_vs_reg): Node /soc has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2e-evm.dtb: Warning (unit_address_vs_reg): Node /soc has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2g-evm.dtb: Warning (unit_address_vs_reg): Node /soc has a reg or ranges property, but no unit name
arch/arm/boot/dts/keystone-k2g-ice.dtb: Warning (unit_address_vs_reg): Node /soc has a reg or ranges property, but no unit name
NOTE: Though we can reformat files by reducing 1 level of indent due to
the use of soc0 phandle, we omit that change to prevent un-necessary
churn in code base.
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since V1: typo fixes in commit message.
v1: https://patchwork.kernel.org/patch/10115101/
arch/arm/boot/dts/keystone-k2e-evm.dts | 4 +--
arch/arm/boot/dts/keystone-k2e.dtsi | 4 +--
arch/arm/boot/dts/keystone-k2g.dtsi | 2 +-
arch/arm/boot/dts/keystone-k2hk-evm.dts | 50 ++++++++++++++++-----------------
arch/arm/boot/dts/keystone-k2hk.dtsi | 4 +--
arch/arm/boot/dts/keystone-k2l-evm.dts | 4 +--
arch/arm/boot/dts/keystone-k2l.dtsi | 4 +--
arch/arm/boot/dts/keystone.dtsi | 2 +-
8 files changed, 37 insertions(+), 37 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2e-evm.dts b/arch/arm/boot/dts/keystone-k2e-evm.dts
index 5378b858fb6f..66fec5f5d081 100644
--- a/arch/arm/boot/dts/keystone-k2e-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2e-evm.dts
@@ -25,8 +25,9 @@
status = "okay";
};
};
+};
- soc {
+&soc0 {
clocks {
refclksys: refclksys {
@@ -50,7 +51,6 @@
clock-output-names = "refclk-ddr3a";
};
};
- };
};
&usb_phy {
diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index db4560b929f1..0bcd3f8a9c45 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -45,8 +45,9 @@
aliases {
rproc0 = &dsp0;
};
+};
- soc {
+&soc0 {
/include/ "keystone-k2e-clocks.dtsi"
usb: usb@2680000 {
@@ -191,5 +192,4 @@
bus_freq = <2500000>;
};
/include/ "keystone-k2e-netcp.dtsi"
- };
};
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index 8b04652b703f..fd061718dc0a 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -69,7 +69,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
};
- soc {
+ soc0: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
#pinctrl-cells = <1>;
diff --git a/arch/arm/boot/dts/keystone-k2hk-evm.dts b/arch/arm/boot/dts/keystone-k2hk-evm.dts
index 8ea5a584e828..ad4e22afe133 100644
--- a/arch/arm/boot/dts/keystone-k2hk-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2hk-evm.dts
@@ -26,7 +26,31 @@
};
};
- soc {
+ leds {
+ compatible = "gpio-leds";
+ debug1_1 {
+ label = "keystone:green:debug1";
+ gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
+ };
+
+ debug1_2 {
+ label = "keystone:red:debug1";
+ gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
+ };
+
+ debug2 {
+ label = "keystone:blue:debug2";
+ gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
+ };
+
+ debug3 {
+ label = "keystone:blue:debug3";
+ gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
+ };
+ };
+};
+
+&soc0 {
clocks {
refclksys: refclksys {
#clock-cells = <0>;
@@ -63,30 +87,6 @@
clock-output-names = "refclk-ddr3b";
};
};
- };
-
- leds {
- compatible = "gpio-leds";
- debug1_1 {
- label = "keystone:green:debug1";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
- };
-
- debug1_2 {
- label = "keystone:red:debug1";
- gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
- };
-
- debug2 {
- label = "keystone:blue:debug2";
- gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
- };
-
- debug3 {
- label = "keystone:blue:debug3";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
- };
- };
};
&usb_phy {
diff --git a/arch/arm/boot/dts/keystone-k2hk.dtsi b/arch/arm/boot/dts/keystone-k2hk.dtsi
index 71c1dcf4159f..ed59474522cb 100644
--- a/arch/arm/boot/dts/keystone-k2hk.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk.dtsi
@@ -52,8 +52,9 @@
rproc6 = &dsp6;
rproc7 = &dsp7;
};
+};
- soc {
+&soc0 {
/include/ "keystone-k2hk-clocks.dtsi"
msm_ram: msmram@c000000 {
@@ -281,5 +282,4 @@
bus_freq = <2500000>;
};
/include/ "keystone-k2hk-netcp.dtsi"
- };
};
diff --git a/arch/arm/boot/dts/keystone-k2l-evm.dts b/arch/arm/boot/dts/keystone-k2l-evm.dts
index 61f63437b886..e200533d26a4 100644
--- a/arch/arm/boot/dts/keystone-k2l-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2l-evm.dts
@@ -25,8 +25,9 @@
status = "okay";
};
};
+};
- soc {
+&soc0 {
clocks {
refclksys: refclksys {
#clock-cells = <0>;
@@ -35,7 +36,6 @@
clock-output-names = "refclk-sys";
};
};
- };
};
&usb_phy {
diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi
index 85b5481213d0..b61a830f4a4d 100644
--- a/arch/arm/boot/dts/keystone-k2l.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l.dtsi
@@ -36,8 +36,9 @@
rproc2 = &dsp2;
rproc3 = &dsp3;
};
+};
- soc {
+&soc0 {
/include/ "keystone-k2l-clocks.dtsi"
uart2: serial@2348400 {
@@ -391,7 +392,6 @@
bus_freq = <2500000>;
};
/include/ "keystone-k2l-netcp.dtsi"
- };
};
&spi0 {
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index ca2cc5d8e3b5..0e8d094515cc 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -67,7 +67,7 @@
cpu_on = <0x84000003>;
};
- soc {
+ soc0: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,keystone","simple-bus";
--
2.14.1
^ permalink raw reply related
* [PATCH V2 1/8] ARM: dts: keystone*: Standardize license with SPDX tag
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
afd-l0cyMroinI0, Nishanth Menon
In-Reply-To: <20171216204040.18017-1-nm-l0cyMroinI0@public.gmane.org>
Standardize the licenses with SPDX license tag and standardize TI's
copyright statement to be consistently after file description.
Signed-off-by: Nishanth Menon <nm-l0cyMroinI0@public.gmane.org>
---
Changes since V1:
* Moved copyrights just after description in a few files to standardize them.
v1: https://patchwork.kernel.org/patch/10115109/
arch/arm/boot/dts/keystone-clocks.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2e-clocks.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2e-evm.dts | 7 ++-----
arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2e.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2g-evm.dts | 12 ++----------
arch/arm/boot/dts/keystone-k2g-ice.dts | 3 +--
arch/arm/boot/dts/keystone-k2g.dtsi | 12 ++----------
arch/arm/boot/dts/keystone-k2hk-clocks.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2hk-evm.dts | 7 ++-----
arch/arm/boot/dts/keystone-k2hk-netcp.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2hk.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2l-clocks.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2l-evm.dts | 7 ++-----
arch/arm/boot/dts/keystone-k2l-netcp.dtsi | 7 ++-----
arch/arm/boot/dts/keystone-k2l.dtsi | 7 ++-----
arch/arm/boot/dts/keystone.dtsi | 7 ++-----
17 files changed, 33 insertions(+), 92 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi
index 0c334b25781e..f23147093fd8 100644
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 clock tree
*
- * Copyright (C) 2013 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
diff --git a/arch/arm/boot/dts/keystone-k2e-clocks.dtsi b/arch/arm/boot/dts/keystone-k2e-clocks.dtsi
index d56d68fe7ffc..915a99d5bc5e 100644
--- a/arch/arm/boot/dts/keystone-k2e-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e-clocks.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2014 Texas Instruments, Inc.
- *
* Keystone 2 Edison SoC specific device tree
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
diff --git a/arch/arm/boot/dts/keystone-k2e-evm.dts b/arch/arm/boot/dts/keystone-k2e-evm.dts
index 2c59f4cb3b44..5378b858fb6f 100644
--- a/arch/arm/boot/dts/keystone-k2e-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2e-evm.dts
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2013-2014 Texas Instruments, Inc.
- *
* Keystone 2 Edison EVM device tree
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
index ba828cb59587..a17311c602aa 100644
--- a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 Edison Netcp driver
*
- * Copyright 2015 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
qmss: qmss@2a40000 {
diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi
index 6b796b52ff4f..db4560b929f1 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2013-2014 Texas Instruments, Inc.
- *
* Keystone 2 Edison soc device tree
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/reset/ti-syscon.h>
diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts b/arch/arm/boot/dts/keystone-k2g-evm.dts
index 9737730ddc21..6a4657799b99 100644
--- a/arch/arm/boot/dts/keystone-k2g-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2g-evm.dts
@@ -1,16 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for K2G EVM
*
- * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/keystone-k2g-ice.dts b/arch/arm/boot/dts/keystone-k2g-ice.dts
index 1736eb53ad83..d820ed2474bb 100644
--- a/arch/arm/boot/dts/keystone-k2g-ice.dts
+++ b/arch/arm/boot/dts/keystone-k2g-ice.dts
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for K2G Industrial Communication Engine EVM
*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
- *
- * SPDX-License-Identifier: GPL-2.0
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index 3c48a9f5c882..8b04652b703f 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -1,16 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for K2G SOC
*
- * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
diff --git a/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi b/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi
index af9b7190533a..560475346fda 100644
--- a/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk-clocks.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2013-2014 Texas Instruments, Inc.
- *
* Keystone 2 Kepler/Hawking SoC clock nodes
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
diff --git a/arch/arm/boot/dts/keystone-k2hk-evm.dts b/arch/arm/boot/dts/keystone-k2hk-evm.dts
index 13759db99d81..8ea5a584e828 100644
--- a/arch/arm/boot/dts/keystone-k2hk-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2hk-evm.dts
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2013-2014 Texas Instruments, Inc.
- *
* Keystone 2 Kepler/Hawking EVM device tree
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
index a5ac845464bf..b88c0689c285 100644
--- a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 Hawking Netcp driver
*
- * Copyright 2015 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
qmss: qmss@2a40000 {
diff --git a/arch/arm/boot/dts/keystone-k2hk.dtsi b/arch/arm/boot/dts/keystone-k2hk.dtsi
index 7c486d9dc90e..71c1dcf4159f 100644
--- a/arch/arm/boot/dts/keystone-k2hk.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2013-2014 Texas Instruments, Inc.
- *
* Keystone 2 Kepler/Hawking soc specific device tree
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/reset/ti-syscon.h>
diff --git a/arch/arm/boot/dts/keystone-k2l-clocks.dtsi b/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
index ef8464bb11ff..b3f82040a722 100644
--- a/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l-clocks.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2013-2014 Texas Instruments, Inc.
- *
* Keystone 2 lamarr SoC clock nodes
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
clocks {
diff --git a/arch/arm/boot/dts/keystone-k2l-evm.dts b/arch/arm/boot/dts/keystone-k2l-evm.dts
index e6de1ae33c73..61f63437b886 100644
--- a/arch/arm/boot/dts/keystone-k2l-evm.dts
+++ b/arch/arm/boot/dts/keystone-k2l-evm.dts
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2014 Texas Instruments, Inc.
- *
* Keystone 2 Lamarr EVM device tree
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
diff --git a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
index 66f615a74118..9ec84228bc16 100644
--- a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Keystone 2 Lamarr Netcp driver
*
- * Copyright 2015 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
qmss: qmss@2a40000 {
diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi
index cc771139c9ce..85b5481213d0 100644
--- a/arch/arm/boot/dts/keystone-k2l.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2014 Texas Instruments, Inc.
- *
* Keystone 2 Lamarr SoC specific device tree
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/reset/ti-syscon.h>
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 06e10544f9b1..ca2cc5d8e3b5 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright 2013 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
--
2.14.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH V2 0/8] ARM: dts: keystone*: Stage 1 cleanup for W=1
From: Nishanth Menon @ 2017-12-16 20:40 UTC (permalink / raw)
To: Russell King, Mark Rutland, Rob Herring, Santosh Shilimkar
Cc: linux-kernel, devicetree, linux-arm-kernel, afd, Nishanth Menon
In-Reply-To: <20171215132102.435-1-nm@ti.com>
Hi,
The following changes have been done in the updated series:
* Updates for couple few typo errors in commit messages
* copyrights are now always behind description
* rebased to maintainer branch (was previously against master)
Rebased to:
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
for_4.16/keystone-dts : 7fbec17465fc ARM: dts: k2g-evm: Enable UART 2
Warnings in the baseline: http://pastebin.ubuntu.com/26196712/ (247)
After this series: http://pastebin.ubuntu.com/26196713/ (96)
Other related patches:
https://patchwork.kernel.org/patch/10114913/ from Mathieu
NOTE: There is yet another follow on series squashing another 33 or so warnings
from Andrew Davis which is pending some internal reviews - hopefully
should be out around early next week.
V1: https://marc.info/?l=devicetree&m=151334424726964&w=2
Nishanth Menon (8):
ARM: dts: keystone*: Standardize license with SPDX tag
ARM: dts: keystone*: Use a single soc0 instance
ARM: dts: keystone: Get rid of usage of skeleton.dtsi
ARM: dts: keystone: Add missing unit name to interrupt controller
ARM: dts: keystone-clocks: Add missing unit name to clock nodes that
have regs
ARM: dts: keystone-hk-clocks: Add missing unit name to clock nodes
that have regs
ARM: dts: keystone-k2e-clocks: Add missing unit name to clock nodes
that have regs
ARM: dts: keystone-k2l-clocks: Add missing unit name to clock nodes
that have regs
arch/arm/boot/dts/keystone-clocks.dtsi | 59 ++++++++++-----------
arch/arm/boot/dts/keystone-k2e-clocks.dtsi | 15 +++---
arch/arm/boot/dts/keystone-k2e-evm.dts | 11 ++--
arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 7 +--
arch/arm/boot/dts/keystone-k2e.dtsi | 11 ++--
arch/arm/boot/dts/keystone-k2g-evm.dts | 12 +----
arch/arm/boot/dts/keystone-k2g-ice.dts | 3 +-
arch/arm/boot/dts/keystone-k2g.dtsi | 14 ++---
arch/arm/boot/dts/keystone-k2hk-clocks.dtsi | 81 ++++++++++++++---------------
arch/arm/boot/dts/keystone-k2hk-evm.dts | 57 ++++++++++----------
arch/arm/boot/dts/keystone-k2hk-netcp.dtsi | 7 +--
arch/arm/boot/dts/keystone-k2hk.dtsi | 11 ++--
arch/arm/boot/dts/keystone-k2l-clocks.dtsi | 51 +++++++++---------
arch/arm/boot/dts/keystone-k2l-evm.dts | 11 ++--
arch/arm/boot/dts/keystone-k2l-netcp.dtsi | 7 +--
arch/arm/boot/dts/keystone-k2l.dtsi | 11 ++--
arch/arm/boot/dts/keystone.dtsi | 18 +++----
17 files changed, 164 insertions(+), 222 deletions(-)
--
2.14.1
^ permalink raw reply
* Re: [PATCH v2] ARM: dts: add reset property for rk3066a-rayeager emac phy
From: Heiko Stuebner @ 2017-12-16 20:11 UTC (permalink / raw)
To: Chris Zhong
Cc: Mark Rutland, devicetree, Russell King, linux-kernel,
linux-rockchip, Rob Herring, linux-arm-kernel
In-Reply-To: <1510134642-18797-1-git-send-email-zyw@rock-chips.com>
Hi Chris,
Am Mittwoch, 8. November 2017, 17:50:41 CET schrieb Chris Zhong:
> The ethernet phy of rk3066a-rayeager has a reset pin, it controlled by
> GPIO1_D6, this pin should be pull down then pull up to reset the phy.
> Add a reset-gpios property in phy0, make the phy can be reset when emac
> power on.
>
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> ---
>
> Changes in v2:
> use a generic property for reset, and this patch follow these 2 pathes
> from Geert Uytterhoeven <geert+renesas@glider.be>
> http://patchwork.ozlabs.org/patch/828499/
> http://patchwork.ozlabs.org/patch/828505/
looks like the phylib-patches were accepted some days ago,
so I've now also applied this patch for 4.16, after fixing the subject
by adding the "rockchip:" to "ARM: dts: rockchip": :-)
Heiko
^ permalink raw reply
* Re: [PATCH 2/9] ARM: dts: Add generic ti, sysc compatible in addition to the custom ones
From: Tony Lindgren @ 2017-12-16 19:54 UTC (permalink / raw)
To: Rob Herring
Cc: linux-omap, Nishanth Menon, devicetree, Paul Walmsley,
Dave Gerlach, linux-kernel, Tero Kristo, Benoît Cousson,
linux-arm-kernel
In-Reply-To: <20171216183414.24ycqj7q2beehiiq@rob-hp-laptop>
* Rob Herring <robh@kernel.org> [171216 18:36]:
> On Fri, Dec 15, 2017 at 10:08:53AM -0800, Tony Lindgren wrote:
> > Otherwise we cannot use generic OF_DEV_AUXDATA match without listing
> > all the compatibles separately for OF_DEV_AUXDATA. Let's also update the
> > binding accordingly.
>
> Your subject has a space in "ti,sysc".
Oops thanks for noticing, will fix.
> > Let's also fix omap4.dtsi to use "ti,sysc-omap4-sr" compatible as we
> > have documented in the binding. This was not noticed earlier as we're
> > still probing SmartReflex driver with platform data.
> >
> > Signed-off-by: Tony Lindgren <tony@atomide.com>
> > ---
> > Documentation/devicetree/bindings/bus/ti-sysc.txt | 1 +
> > arch/arm/boot/dts/dra7.dtsi | 4 ++--
> > arch/arm/boot/dts/omap4.dtsi | 20 ++++++++++----------
> > 3 files changed, 13 insertions(+), 12 deletions(-)
>
> Otherwise,
>
> Reviewed-by: Rob Herring <robh@kernel.org>
Thanks for looking,
Tony
^ permalink raw reply
* [PATCH net-next 1/2 v9] net: ethernet: Add DT bindings for the Gemini ethernet
From: Linus Walleij @ 2017-12-16 19:39 UTC (permalink / raw)
To: netdev-u79uwXL29TY76Z2rM5mHXA, David S . Miller,
Michał Mirosław
Cc: Janos Laube, Paulius Zaleckas,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Hans Ulli Kroll, Florian Fainelli, Linus Walleij,
devicetree-u79uwXL29TY76Z2rM5mHXA, Tobias Waldvogel
This adds the device tree bindings for the Gemini ethernet
controller. It is pretty straight-forward, using standard
bindings and modelling the two child ports as child devices
under the parent ethernet controller device.
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Tobias Waldvogel <tobias.waldvogel-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Michał Mirosław <mirq-linux-CoA6ZxLDdyEEUmgCuDUIdw@public.gmane.org>
Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Signed-off-by: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
---
ChangeLog v8->v9:
- Collect Rob's ACK.
ChangeLog v7->v8:
- Use ethernet-port@0 and ethernet-port@1 with unit names
and following OF graph requirements.
---
.../bindings/net/cortina,gemini-ethernet.txt | 92 ++++++++++++++++++++++
1 file changed, 92 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
diff --git a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
new file mode 100644
index 000000000000..6c559981d110
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
@@ -0,0 +1,92 @@
+Cortina Systems Gemini Ethernet Controller
+==========================================
+
+This ethernet controller is found in the Gemini SoC family:
+StorLink SL3512 and SL3516, also known as Cortina Systems
+CS3512 and CS3516.
+
+Required properties:
+- compatible: must be "cortina,gemini-ethernet"
+- reg: must contain the global registers and the V-bit and A-bit
+ memory areas, in total three register sets.
+- syscon: a phandle to the system controller
+- #address-cells: must be specified, must be <1>
+- #size-cells: must be specified, must be <1>
+- ranges: should be state like this giving a 1:1 address translation
+ for the subnodes
+
+The subnodes represents the two ethernet ports in this device.
+They are not independent of each other since they share resources
+in the parent node, and are thus children.
+
+Required subnodes:
+- port0: contains the resources for ethernet port 0
+- port1: contains the resources for ethernet port 1
+
+Required subnode properties:
+- compatible: must be "cortina,gemini-ethernet-port"
+- reg: must contain two register areas: the DMA/TOE memory and
+ the GMAC memory area of the port
+- interrupts: should contain the interrupt line of the port.
+ this is nominally a level interrupt active high.
+- resets: this must provide an SoC-integrated reset line for
+ the port.
+- clocks: this should contain a handle to the PCLK clock for
+ clocking the silicon in this port
+- clock-names: must be "PCLK"
+
+Optional subnode properties:
+- phy-mode: see ethernet.txt
+- phy-handle: see ethernet.txt
+
+Example:
+
+mdio-bus {
+ (...)
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy1: ethernet-phy@3 {
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+};
+
+
+ethernet@60000000 {
+ compatible = "cortina,gemini-ethernet";
+ reg = <0x60000000 0x4000>, /* Global registers, queue */
+ <0x60004000 0x2000>, /* V-bit */
+ <0x60006000 0x2000>; /* A-bit */
+ syscon = <&syscon>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gmac0: ethernet-port@0 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
+ <0x6000a000 0x2000>; /* Port 0 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC0>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC0>;
+ clock-names = "PCLK";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+
+ gmac1: ethernet-port@1 {
+ compatible = "cortina,gemini-ethernet-port";
+ reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
+ <0x6000e000 0x2000>; /* Port 1 GMAC */
+ interrupt-parent = <&intcon>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&syscon GEMINI_RESET_GMAC1>;
+ clocks = <&syscon GEMINI_CLK_GATE_GMAC1>;
+ clock-names = "PCLK";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+};
--
2.14.3
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* Re: [PATCH 3/5] media: i2c: Add TDA1997x HDMI receiver driver
From: Fabio Estevam @ 2017-12-16 19:32 UTC (permalink / raw)
To: Tim Harvey
Cc: devicetree, alsa-devel, Shawn Guo, linux-kernel, Hans Verkuil,
Mauro Carvalho Chehab, Philipp Zabel, Steve Longerbeam,
Hans Verkuil, linux-media
In-Reply-To: <1510253136-14153-4-git-send-email-tharvey@gateworks.com>
Hi Tim,
On Thu, Nov 9, 2017 at 4:45 PM, Tim Harvey <tharvey@gateworks.com> wrote:
> +static int tda1997x_set_power(struct tda1997x_state *state, bool on)
> +{
> + int ret = 0;
> +
> + if (on) {
> + ret = regulator_bulk_enable(TDA1997X_NUM_SUPPLIES,
> + state->supplies);
> + msleep(300);
Didn't you miss a 'return ret' here?
Otherwise regulator_bulk_disable() will always be called below.
> + }
> +
> + ret = regulator_bulk_disable(TDA1997X_NUM_SUPPLIES,
> + state->supplies);
> + return ret;
> +}
^ permalink raw reply
* Re: [PATCH 1/9] dt-bindings: ti-sysc: Update binding for timers and capabilities
From: Tony Lindgren @ 2017-12-16 19:22 UTC (permalink / raw)
To: Rob Herring
Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA, Nishanth Menon,
devicetree-u79uwXL29TY76Z2rM5mHXA, Paul Walmsley, Dave Gerlach,
Tomi Valkeinen, Matthijs van Duin,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Liam Girdwood, Tero Kristo,
Mark Brown, Sakari Ailus, Laurent Pinchart, Benoît Cousson,
Mark Rutland, Mauro Carvalho Chehab,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20171216183059.ipsftfnvsyamv6fd@rob-hp-laptop>
* Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> [171216 18:33]:
> > Optional properties:
> >
> > +- ti,sysc-mask shall contain mask of supported register bits for the
> > + SYSCONFIG register as documented in the Technical Reference
> > + Manual (TRM) for the interconnect target module
> > +
> > +- ti,sysc-midle list of master idle modes supported by the interconnect
> > + target module as documented in the TRM for SYSCONFIG
> > + register MIDLEMODE bits
> > +
> > +- ti,sysc-sidle list of slave idle modes supported by the interconnect
> > + target module as documented in the TRM for SYSCONFIG
> > + register SIDLEMODE bits
> > +
> > +- ti,sysc-delay-us delay needed after OCP softreset before accssing
> > + SYSCONFIG register again
> > +
> > +- ti,syss-mask optional mask of reset done status bits as described in the
> > + TRM for SYSSTATUS registers, typically 1 with some devices
> > + having separate reset done bits for children like OHCI and
> > + EHCI
> > +
>
> Seems like a lot of this should be implied by specific compatible
> strings.
Unfortunately that would still explode the permutations to almost
one compatible per module especially for types "ti,sysc-omap2" and
"ti,sysc-omap4". And the features and idle modes supported by the
module are all over the place for "ti,sysc-mask", "ti,sysc-midle",
"ti,sysc-sidle" and "ti,syss-mask"..
I was planning to have "ti,sysc-delay-us" only in the driver, but
the same IP needs it set on dm814x while not on omap4 for OTG
for example. I could add SoC specific quirks to the driver
for that one if you prefer that instead?
I do have a patch also I'm testing to use the revision register
value for handling further quirks, but unfortunately that
register is not populated or updated for many modules. And it's
only usable after the module is already configured to accessible :)
> Are the bits you've defined all of them or there's more?
That's it, with this binding I've allocated the data from dts
for the tests I've done. So that should allow us to replace the
static data to start with as seen with the following command:
$ git grep -A10 "struct omap_hwmod_class_sysconfig" \
arch/arm/*hwmod*data*.c
...
So that's to configure a big pile of different module
configurations we currently have as can be seen with:
$ git grep "struct omap_hwmod_class_sysconfig" \
arch/arm/*hwmod*data*.c | wc -l
194
I'm sure there's still few duplicates there though..
The only pending binding change I'm aware of is the optional
extra clocks, but that still pending and just uses the
standard clock binding.
Regards,
Tony
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v2] drm/panel: Add support for AUO G104SN02 V2 panel
From: Rob Herring @ 2017-12-16 18:39 UTC (permalink / raw)
To: Christoph Fritz
Cc: Thierry Reding, David Airlie, Mark Rutland,
Stefan Riedmüller,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <1513430016.1930.4.camel-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
On Sat, Dec 16, 2017 at 02:13:36PM +0100, Christoph Fritz wrote:
> This patch adds support for AUO G104SN02 V2 800x600 10.4" panel to DRM
> simple panel driver.
>
> Signed-off-by: Christoph Fritz <chf.fritz-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
> Signed-off-by: Stefan Riedmueller <s.riedmueller-guT5V/WYfQezQB+pC5nmwQ@public.gmane.org>
> ---
> Changes since v1:
> - be explicit as to which properties apply
> - adapt indenting
>
> .../bindings/display/panel/auo,g104sn02.txt | 12 ++++++++++
> drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++
> 2 files changed, 38 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt
Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH for v4.15] dt-bindings/media/cec-gpio.txt: mention the CEC/HPD max voltages
From: Rob Herring @ 2017-12-16 18:38 UTC (permalink / raw)
To: Hans Verkuil; +Cc: Linux Media Mailing List, linux-devicetree
In-Reply-To: <064113a5-f8be-5b10-091f-a89b87baa5a3-qWit8jRvyhVmR6Xm/wNWPw@public.gmane.org>
On Sat, Dec 16, 2017 at 11:44:13AM +0100, Hans Verkuil wrote:
> Mention the maximum voltages of the CEC and HPD lines. Since in the example
> these lines are connected to a Raspberry Pi and the Rpi GPIO lines are 3.3V
> it is a good idea to warn against directly connecting the HPD to the Raspberry
> Pi's GPIO line.
>
> Signed-off-by: Hans Verkuil <hans.verkuil-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org>
Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [RFC 2/5] [media] dt: bindings: Update binding documentation for sunxi IR controller
From: Rob Herring @ 2017-12-16 18:36 UTC (permalink / raw)
To: Philipp Rossak
Cc: mchehab-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
linux-I+IVW8TIWO2tmTQ+vhA3Yw, sean-hENCXIMQXOg,
p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ, andi.shyti-Sze3O3UU22JBDgjK7y7TUQ,
linux-media-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20171216024914.7550-3-embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
gOn Sat, Dec 16, 2017 at 03:49:11AM +0100, Philipp Rossak wrote:
> This patch updates documentation for Device-Tree bindings for sunxi IR
> controller and adds the new requiered property for the base clock frequency.
>
> Signed-off-by: Philipp Rossak <embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> Documentation/devicetree/bindings/media/sunxi-ir.txt | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt b/Documentation/devicetree/bindings/media/sunxi-ir.txt
> index 91648c569b1e..5f4960c61245 100644
> --- a/Documentation/devicetree/bindings/media/sunxi-ir.txt
> +++ b/Documentation/devicetree/bindings/media/sunxi-ir.txt
> @@ -1,12 +1,13 @@
> Device-Tree bindings for SUNXI IR controller found in sunXi SoC family
>
> Required properties:
> -- compatible : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir"
> -- clocks : list of clock specifiers, corresponding to
> - entries in clock-names property;
> -- clock-names : should contain "apb" and "ir" entries;
> -- interrupts : should contain IR IRQ number;
> -- reg : should contain IO map address for IR.
> +- compatible : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir"
> +- clocks : list of clock specifiers, corresponding to
> + entries in clock-names property;
> +- clock-names : should contain "apb" and "ir" entries;
> +- interrupts : should contain IR IRQ number;
> +- reg : should contain IO map address for IR.
> +- base-clk-frequency : should contain the base clock frequency
Use clock-frequency or assigned-clocks.
Rob
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH v2 5/7] dt-bindings: i3c: Document core bindings
From: Boris Brezillon @ 2017-12-16 18:35 UTC (permalink / raw)
To: Rob Herring
Cc: Wolfram Sang, linux-i2c-u79uwXL29TY76Z2rM5mHXA, Jonathan Corbet,
linux-doc-u79uwXL29TY76Z2rM5mHXA, Greg Kroah-Hartman,
Arnd Bergmann, Przemyslaw Sroka, Arkadiusz Golec, Alan Douglas,
Bartosz Folta, Damian Kos, Alicja Jurasik-Urbaniak,
Cyprian Wronka, Suresh Punnoose, Thomas Petazzoni, Nishanth Menon,
Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171216172040.jcaezouqkeb7zrqy@rob-hp-laptop>
On Sat, 16 Dec 2017 11:20:40 -0600
Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Thu, Dec 14, 2017 at 04:16:08PM +0100, Boris Brezillon wrote:
> > A new I3C subsystem has been added and a generic description has been
> > created to represent the I3C bus and the devices connected on it.
> >
> > Document this generic representation.
> >
> > Signed-off-by: Boris Brezillon <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> > ---
> > Changes in v2:
> > - Define how to describe I3C devices in the DT and when it should be
> > used. Note that the parsing of I3C devices is not yet implemented in
> > the framework. Will be added when someone really needs it.
> > ---
> > Documentation/devicetree/bindings/i3c/i3c.txt | 128 ++++++++++++++++++++++++++
> > 1 file changed, 128 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/i3c/i3c.txt
> >
> > diff --git a/Documentation/devicetree/bindings/i3c/i3c.txt b/Documentation/devicetree/bindings/i3c/i3c.txt
> > new file mode 100644
> > index 000000000000..79a214dee025
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/i3c/i3c.txt
> > @@ -0,0 +1,128 @@
> > +Generic device tree bindings for I3C busses
> > +===========================================
> > +
> > +This document describes generic bindings that should be used to describe I3C
> > +busses in a device tree.
> > +
> > +Required properties
> > +-------------------
> > +
> > +- #address-cells - should be <1>. Read more about addresses below.
> > +- #size-cells - should be <0>.
> > +- compatible - name of I3C bus controller following generic names
> > + recommended practice.
>
> generic names isn't anything recommended.
Hm, I agree. Don't even know what I wanted to say (it's probably been
copied from somewhere else).
>
> One problem we have with i2c buses is we can't identify them in the DT
> other than with a list of all controller's compatible strings. We can
> fix this by defining the controller node name.
I'm fine with that.
> So please define the node
> name to be "i3c-controller". That's more inline with other node names
> than i3c-master that you used below.
Hm, not sure i3c-controller is appropriate though, because you can have
slave controllers. Maybe i3c-host, but I'd prefer to keep the term
master since it's employed everywhere in the spec. I can also be
i3c-master-controller if you prefer.
>
> > +
> > +For other required properties e.g. to describe register sets,
> > +clocks, etc. check the binding documentation of the specific driver.
> > +
> > +Optional properties
> > +-------------------
> > +
> > +These properties may not be supported by all I3C master drivers. Each I3C
> > +master bindings should specify which of them are supported.
> > +
> > +- i3c-scl-frequency: frequency (in Hz) of the SCL signal used for I3C
> > + transfers. When undefined the core set it to 12.5MHz.
> > +
> > +- i2c-scl-frequency: frequency (in Hz) of the SCL signal used for I2C
> > + transfers. When undefined, the core looks at LVR values
> > + of I2C devices described in the device tree to determine
> > + the maximum I2C frequency.
>
> Add '-hz' suffix. You could drop 'frequency' as that would be implied by
> Hz.
Okay.
>
> > +
> > +I2C devices
> > +===========
> > +
> > +Each I2C device connected to the bus should be described in a subnode with
> > +the following properties:
> > +
> > +All properties described in Documentation/devicetree/bindings/i2c/i2c.txt are
> > +valid here.
> > +
> > +New required properties:
> > +------------------------
> > +- i3c-lvr: 32 bits integer property (only the lowest 8 bits are meaningful)
> > + describing device capabilities as described in the I3C
> > + specification.
> > +
> > + bit[31:8]: unused
> > + bit[7:5]: I2C device index. Possible values
> > + * 0: I2C device has a 50 ns spike filter
> > + * 1: I2C device does not have a 50 ns spike filter but supports high
> > + frequency on SCL
> > + * 2: I2C device does not have a 50 ns spike filter and is not
> > + tolerant to high frequencies
> > + * 3-7: reserved
> > +
> > + bit[4]: tell whether the device operates in FM or FM+ mode
> > + * 0: FM+ mode
> > + * 1: FM mode
> > +
> > + bit[3:0]: device type
> > + * 0-15: reserved
> > +
> > +I3C devices
> > +===========
> > +
> > +All I3C devices are supposed to support DAA (Dynamic Address Assignment), and
> > +are thus discoverable. So, by default, I3C devices do not have to be described
> > +in the device tree.
> > +This being said, one might want to attach extra resources to these devices,
> > +and those resources may have to be described in the device tree, which in turn
> > +means we have to describe I3C devices.
> > +
> > +Another use case for describing an I3C device in the device tree is when this
> > +I3C device has a static address and we want to assign it a specific dynamic
> > +address before the DAA takes place (so that other devices on the bus can't
> > +take this dynamic address).
> > +
> > +Required properties
> > +-------------------
> > +- i3c-pid: PID (Provisional ID). 64-bit property which is used to match a
> > + device discovered during DAA with its device tree definition. The
> > + PID is supposed to be unique on a given bus, which guarantees a 1:1
> > + match. This property becomes optional if a reg property is defined,
> > + meaning that the device has a static address.
>
> What determines this number?
Part of it is fixed (manufacturer and part id) and the last few bits
represent the device instance on the bus (so you can have several
identical devices on the same bus). The manufacturer and part ids
should be statically assigned during production, instance id is usually
configurable through extra pins that you drive high or low at reset
time.
>
> > +
> > +Optional properties
> > +-------------------
> > +- reg: static address. Only valid is the device has a static address.
> > +- i3c-dynamic-address: dynamic address to be assigned to this device. This
> > + property depends on the reg property.
>
> Perhaps "assigned-address" property would be appropriate. I'm not all
> that familiar with it though.
Again, the spec use the term "dynamic address" everywhere, and I'd like
to stay as close as possible to the spec.
>
> > +
> > +Example:
> > +
> > + i3c-master@0d040000 {
>
> Drop leading 0.
Yep, already mentioned by Peter, I'll fix that.
>
> > + compatible = "cdns,i3c-master";
> > + clocks = <&coreclock>, <&i3csysclock>;
> > + clock-names = "pclk", "sysclk";
> > + interrupts = <3 0>;
> > + reg = <0x0d040000 0x1000>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + status = "okay";
> > + i2c-scl-frequency = <100000>;
> > +
> > + /* I2C device. */
> > + nunchuk: nunchuk@52 {
> > + compatible = "nintendo,nunchuk";
> > + reg = <0x52>;
> > + i3c-lvr = <0x10>;
> > + };
> > +
> > + /* I3C device with a static address. */
> > + thermal_sensor: sensor@68 {
> > + reg = <0x68>;
> > + i3c-dynamic-address = <0xa>;
> > + };
> > +
> > + /*
> > + * I3C device without a static address but requiring resources
> > + * described in the DT.
> > + */
> > + sensor2 {
>
> It's not great that we can't follow using generic node names. Maybe the
> PID can be used as the address? In USB for example, we use hub ports for
> DT addresses rather than USB addresses since those are dynamic.
Hm, the problem is, we may have 2 numbering schemes here: one where reg
is used (reg representing the I2C/static address), and another one
where the PID is used.
If you're okay with mixing those 2 schemes, then I'm fine with that too.
>
> > + i3c-pid = /bits/ 64 <0x39200144004>;
> > + clocks = <&clock_provider 0>;
> > + };
> > + };
> > +
> > --
> > 2.11.0
> >
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox