* [PATCH v3] ARM: dts: ls1021a: add support for Moxa UC-8410A open platform
From: SZ Lin @ 2017-12-26 4:54 UTC (permalink / raw)
Cc: shawnguo, SZ Lin, Jimmy Chen, Harry YJ Jhou, Rob Herring,
Mark Rutland, Russell King, devicetree, linux-arm-kernel,
linux-kernel
Add support for Moxa UC-8410A open platform
The UC-8410A computing platform is designed
for embedded communication-centric industrial applications
The features of UC-8410A are:
* QSPI flash
* SD slot
* 3x LAN
* 8x RS-232/422/485 ports, software-selectable
* Mini PCIe form factor with PCIe/USB signal
* 2x USB host
* TPM
* Watchdog
* RTC
* User LEDs
* Beeper
* Push button
Signed-off-by: Jimmy Chen <jimmy.chen@moxa.com>
Signed-off-by: Harry YJ Jhou <harryyj.jhou@moxa.com>
Signed-off-by: SZ Lin <sz.lin@moxa.com>
---
Changes from v2:
- Replace underscore with hyphen in node name
- Add unit address after nodes with 'reg' property
- Sort nodes with unit-address in order of the address
- Fix up unit-address in partitions node
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts | 241 ++++++++++++++++++++++++++++
2 files changed, 242 insertions(+)
create mode 100644 arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d0381e9caf21..62ce9b27ad30 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -520,6 +520,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7s-colibri-eval-v3.dtb \
imx7s-warp.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
+ ls1021a-moxa-uc-8410a.dtb \
ls1021a-qds.dtb \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
diff --git a/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts b/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
new file mode 100644
index 000000000000..d01f64b252b1
--- /dev/null
+++ b/arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts
@@ -0,0 +1,241 @@
+/*
+ * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
+ *
+ * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com>
+ * Jimmy Chen (陳永達) <jimmy.chen@moxa.com>
+ * SZ Lin (林上智) <sz.lin@moxa.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "ls1021a.dtsi"
+
+/ {
+ model = "Moxa UC-8410A";
+
+ aliases {
+ enet0_rgmii_phy = &rgmii_phy0;
+ enet1_rgmii_phy = &rgmii_phy1;
+ enet2_rgmii_phy = &rgmii_phy2;
+ };
+
+ sys_mclk: clock-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ cel-pwr {
+ label = "UC8410A:CEL-PWR";
+ gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ cel-reset {
+ label = "UC8410A:CEL-RESET";
+ gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ str-led {
+ label = "UC8410A:RED:PROG";
+ gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ };
+
+ sw-ready {
+ label = "UC8410A:GREEN:SWRDY";
+ gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ beeper {
+ label = "UC8410A:BEEP";
+ gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ prog-led0 {
+ label = "UC8410A:GREEN:PROG2";
+ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ prog-led1 {
+ label = "UC8410A:GREEN:PROG1";
+ gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ prog-led2 {
+ label = "UC8410A:GREEN:PROG0";
+ gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ wifi-signal0 {
+ label = "UC8410A:GREEN:CEL2";
+ gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ wifi-signal1 {
+ label = "UC8410A:GREEN:CEL1";
+ gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ wifi-signal2 {
+ label = "UC8410A:GREEN:CEL0";
+ gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ cpu-diag-red {
+ label = "UC8410A:RED:DIA";
+ gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ cpu-diag-green {
+ label = "UC8410A:GREEN:DIA";
+ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ cpu-diag-yellow {
+ label = "UC8410A:YELLOW:DIA";
+ gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ pushbtn-key {
+ label = "push button key";
+ gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
+ linux,code = <BTN_MISC>;
+ default-state = "on";
+ };
+ };
+};
+
+&enet0 {
+ phy-handle = <&rgmii_phy0>;
+ phy-connection-type = "rgmii-id";
+ status = "okay";
+};
+
+&enet1 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+ status = "okay";
+};
+
+&enet2 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii-id";
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ tpm@20 {
+ compatible = "infineon,slb9635tt";
+ reg = <0x20>;
+ };
+
+ rtc@68 {
+ compatible = "dallas,ds1374";
+ reg = <0x68>;
+ };
+};
+
+&lpuart0 {
+ status = "okay";
+};
+
+&mdio0 {
+ rgmii_phy0: ethernet-phy@0 {
+ compatible = "marvell,88e1118";
+ reg = <0x0>;
+ marvell,reg-init =
+ <3 0x11 0 0x4415>, /* Reg 3,17 */
+ <3 0x10 0 0x77>; /* Reg 3,16 */
+ };
+
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "marvell,88e1118";
+ reg = <0x1>;
+ marvell,reg-init =
+ <3 0x11 0 0x4415>, /* Reg 3,17 */
+ <3 0x10 0 0x77>; /* Reg 3,16 */
+ };
+
+ rgmii_phy2: ethernet-phy@2 {
+ compatible = "marvell,88e1118";
+ reg = <0x2>;
+ marvell,reg-init =
+ <3 0x11 0 0x4415>, /* Reg 3,17 */
+ <3 0x10 0 0x77>; /* Reg 3,16 */
+ };
+};
+
+&qspi {
+ bus-num = <0>;
+ fsl,spi-num-chipselects = <2>;
+ fsl,spi-flash-chipselects = <0>;
+ fsl,qspi-has-second-chip;
+ status = "okay";
+
+ flash: flash@0 {
+ compatible = "spansion,s25fl064l", "spansion,s25fl164k";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+
+ partitions@0 {
+ label = "U-Boot";
+ reg = <0x0 0x180000>;
+ };
+
+ partitions@180000 {
+ label = "U-Boot Env";
+ reg = <0x180000 0x680000>;
+ };
+ };
+};
+
+&sata {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
--
2.15.1
^ permalink raw reply related
* Re: [PATCH 1/4] media: ov5695: add support for OV5695 sensor
From: kbuild test robot @ 2017-12-26 5:34 UTC (permalink / raw)
Cc: kbuild-all, mchehab, robh+dt, mark.rutland, linux-media,
devicetree, ddl, tfiga, Shunqian Zheng
In-Reply-To: <1514211086-13440-1-git-send-email-zhengsq@rock-chips.com>
Hi Shunqian,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on v4.15-rc5 next-20171222]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Shunqian-Zheng/media-ov5695-add-support-for-OV5695-sensor/20171226-110821
base: git://linuxtv.org/media_tree.git master
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
vim +713 drivers/media/i2c/ov5695.c
697
698 /* Write registers up to 4 at a time */
699 static int ov5695_write_reg(struct i2c_client *client, u16 reg,
700 unsigned int len, u32 val)
701 {
702 int buf_i;
703 int val_i;
704 u8 buf[6];
705 u8 *val_p;
706
707 if (len > 4)
708 return -EINVAL;
709
710 buf[0] = reg >> 8;
711 buf[1] = reg & 0xff;
712
> 713 val = cpu_to_be32(val);
714 val_p = (u8 *)&val;
715 buf_i = 2;
716 val_i = 4 - len;
717
718 while (val_i < 4)
719 buf[buf_i++] = val_p[val_i++];
720
721 if (i2c_master_send(client, buf, len + 2) != len + 2)
722 return -EIO;
723
724 return 0;
725 }
726
727 static int ov5695_write_array(struct i2c_client *client,
728 const struct regval *regs)
729 {
730 int i, ret = 0;
731
732 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
733 ret = ov5695_write_reg(client, regs[i].addr,
734 OV5695_REG_VALUE_08BIT, regs[i].val);
735
736 return ret;
737 }
738
739 /* Read registers up to 4 at a time */
740 static int ov5695_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
741 u32 *val)
742 {
743 struct i2c_msg msgs[2];
744 u8 *data_be_p;
745 u32 data_be = 0;
> 746 u16 reg_addr_be = cpu_to_be16(reg);
747 int ret;
748
749 if (len > 4)
750 return -EINVAL;
751
752 data_be_p = (u8 *)&data_be;
753 /* Write register address */
754 msgs[0].addr = client->addr;
755 msgs[0].flags = 0;
756 msgs[0].len = 2;
757 msgs[0].buf = (u8 *)®_addr_be;
758
759 /* Read data from register */
760 msgs[1].addr = client->addr;
761 msgs[1].flags = I2C_M_RD;
762 msgs[1].len = len;
763 msgs[1].buf = &data_be_p[4 - len];
764
765 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
766 if (ret != ARRAY_SIZE(msgs))
767 return -EIO;
768
> 769 *val = be32_to_cpu(data_be);
770
771 return 0;
772 }
773
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
^ permalink raw reply
* [V2 3/6] dt-bindings: fsl-qdma: add device tree for qDMA driver
From: Wen He @ 2017-12-26 5:47 UTC (permalink / raw)
To: vinod.koul-ral2JQCrhuEAvxtiuMwx3w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
dmaengine-u79uwXL29TY76Z2rM5mHXA, leoyang.li-3arQi8VN3Tc,
jiafei.pan-3arQi8VN3Tc, jiaheng.fan-3arQi8VN3Tc, Wen He
add NXP Layerscape queue direct memory access controller(qDMA) support.
This module can be found on NXP QorIQ Layerscape Socs.
Signed-off-by: Wen He <wen.he_1-3arQi8VN3Tc@public.gmane.org>
---
change in v2:
- Remove indentation
- Add "Should be" before 'fsl,ls1021a-qdma'
- Replace 'channels' by 'dma-channels'
- Replace 'qdma@8390000' by 'dma-controller@8390000'
Documentation/devicetree/bindings/dma/fsl-qdma.txt | 40 ++++++++++++++++++++
1 files changed, 40 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-qdma.txt
diff --git a/Documentation/devicetree/bindings/dma/fsl-qdma.txt b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
new file mode 100644
index 0000000..000472b
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-qdma.txt
@@ -0,0 +1,40 @@
+* NXP Layerscape queue Direct Memory Access Controller(qDMA) Controller
+
+The qDMA controller transfers blocks of data between one source and one or more
+destinations. The blocks of data transferred can be represented in memory as contiguous
+or non-contiguous using scatter/gather table(s). Channel virtualization is supported
+through enqueuing of DMA jobs to, or dequeuing DMA jobs from, different work
+queues.
+
+* qDMA Controller
+Required properties:
+- compatible : Should be "fsl,ls1021a-qdma" or "fsl,ls1043a-qdma", "fsl,ls1021a-qdma"
+- reg : Specifies base physical address(s) and size of the qDMA registers.
+ The region is qDMA control register's address and size.
+- interrupts : A list of interrupt-specifiers, one for each entry in
+ interrupt-names.
+- interrupt-names : Should contain:
+ "qdma-error" - the error interrupt
+ "qdma-queue" - the queue interrupt
+- dma-channels : Number of DMA channels supported by the controller
+- queues : Number of queues supported by driver
+
+Optional properties:
+- big-endian: If present registers and hardware scatter/gather descriptors
+ of the qDMA are implemented in big endian mode, otherwise in little
+ mode.
+
+
+Examples:
+
+ qdma: dma-controller@8390000 {
+ compatible = "fsl,ls1021a-qdma";
+ reg = <0x0 0x8398000 0x0 0x2000 /* Controller registers */
+ 0x0 0x839a000 0x0 0x2000>; /* Block registers */
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue";
+ dma-channels = <8>;
+ queues = <2>;
+ big-endian;
+ };
--
1.7.1
--
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^ permalink raw reply related
* [V2 4/6] arm64: dts: ls1043a: add qdma device tree nodes
From: Wen He @ 2017-12-26 5:47 UTC (permalink / raw)
To: vinod.koul-ral2JQCrhuEAvxtiuMwx3w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
dmaengine-u79uwXL29TY76Z2rM5mHXA, leoyang.li-3arQi8VN3Tc,
jiafei.pan-3arQi8VN3Tc, jiaheng.fan-3arQi8VN3Tc, Wen He
In-Reply-To: <20171226054754.14969-1-wen.he_1-3arQi8VN3Tc@public.gmane.org>
add the qDMA device tree nodes for LS1043A devices.
Signed-off-by: Wen He <wen.he_1-3arQi8VN3Tc@public.gmane.org>
---
change in v2:
- Add commits messages
- Replace 'channels' by 'dma-channels'
- Replace 'qdma@8380000' by 'dma-controller@8380000'
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 380e7c7..c4bbaa4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -652,6 +652,21 @@
dma-coherent;
};
+ qdma: dma-controller@8380000 {
+ compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue";
+ dma-channels = <8>;
+ queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
msi1: msi-controller1@1571000 {
compatible = "fsl,ls1043a-msi";
reg = <0x0 0x1571000 0x0 0x8>;
--
1.7.1
--
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^ permalink raw reply related
* [V2 5/6] arm64: dts: ls1046a: add qdma device tree nodes
From: Wen He @ 2017-12-26 5:47 UTC (permalink / raw)
To: vinod.koul-ral2JQCrhuEAvxtiuMwx3w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
dmaengine-u79uwXL29TY76Z2rM5mHXA, leoyang.li-3arQi8VN3Tc,
jiafei.pan-3arQi8VN3Tc, jiaheng.fan-3arQi8VN3Tc, Wen He
In-Reply-To: <20171226054754.14969-1-wen.he_1-3arQi8VN3Tc@public.gmane.org>
add the qDMA device tree nodes for LS1046A devices.
Signed-off-by: Wen He <wen.he_1-3arQi8VN3Tc@public.gmane.org>
---
change in v2:
- Add commits messages
- Replace 'channels' by 'dma-channels'
- Replace 'qdma@8380000' by 'dma-controller@8380000'
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 06b5e12..b4a0800 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -595,6 +595,21 @@
<&clockgen 4 1>;
};
+ qdma: dma-controller@8380000 {
+ compatible = "fsl,ls1021a-qdma", "fsl,ls1046a-qdma";
+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue";
+ dma-channels = <8>;
+ queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
usb0: usb@2f00000 {
compatible = "snps,dwc3";
reg = <0x0 0x2f00000 0x0 0x10000>;
--
1.7.1
--
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^ permalink raw reply related
* [V2 6/6] arm: dts: ls1021a: add qdma device tree nodes
From: Wen He @ 2017-12-26 5:47 UTC (permalink / raw)
To: vinod.koul-ral2JQCrhuEAvxtiuMwx3w, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
dmaengine-u79uwXL29TY76Z2rM5mHXA, leoyang.li-3arQi8VN3Tc,
jiafei.pan-3arQi8VN3Tc, jiaheng.fan-3arQi8VN3Tc, Wen He
In-Reply-To: <20171226054754.14969-1-wen.he_1-3arQi8VN3Tc@public.gmane.org>
add the qDMA device tree nodes for LS1021A devices.
Signed-off-by: Wen He <wen.he_1-3arQi8VN3Tc@public.gmane.org>
---
change in v2:
- Add commits messages
- Replace 'channels' by 'dma-channels'
- Replace 'qdma@8390000' by 'dma-controller@8390000'
arch/arm/boot/dts/ls1021a.dtsi | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 9319e1f..33f7b5c 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -549,6 +549,21 @@
<&clockgen 4 1>;
};
+ qdma: dma-controller@8390000 {
+ compatible = "fsl,ls1021a-qdma";
+ reg = <0x0 0x8398000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8399000 0x0 0x1000>, /* Status regs */
+ <0x0 0x839a000 0x0 0x2000>; /* Block regs */
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue";
+ dma-channels = <8>;
+ queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ big-endian;
+ };
+
dcu: dcu@2ce0000 {
compatible = "fsl,ls1021a-dcu";
reg = <0x0 0x2ce0000 0x0 0x10000>;
--
1.7.1
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^ permalink raw reply related
* Re: [PATCH 3/4] media: ov2685: add support for OV2685 sensor
From: kbuild test robot @ 2017-12-26 6:22 UTC (permalink / raw)
Cc: kbuild-all-JC7UmRfGjtg, mchehab-DgEjT+Ai2ygdnm+yROfE0A,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
linux-media-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, ddl-TNX95d0MmH7DzftRWevZcw,
tfiga-F7+t8E8rja9g9hUCZPvPmw, Shunqian Zheng
In-Reply-To: <1514211086-13440-3-git-send-email-zhengsq-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Hi Shunqian,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on v4.15-rc5 next-20171222]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Shunqian-Zheng/media-ov5695-add-support-for-OV5695-sensor/20171226-110821
base: git://linuxtv.org/media_tree.git master
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
vim +248 drivers/media/i2c/ov2685.c
232
233 /* Write registers up to 4 at a time */
234 static int ov2685_write_reg(struct i2c_client *client, u16 reg,
235 unsigned int len, u32 val)
236 {
237 int buf_i;
238 int val_i;
239 u8 buf[6];
240 u8 *val_p;
241
242 if (len > 4)
243 return -EINVAL;
244
245 buf[0] = reg >> 8;
246 buf[1] = reg & 0xff;
247
> 248 val = cpu_to_be32(val);
249 val_p = (u8 *)&val;
250 buf_i = 2;
251 val_i = 4 - len;
252
253 while (val_i < 4)
254 buf[buf_i++] = val_p[val_i++];
255
256 if (i2c_master_send(client, buf, len + 2) != len + 2)
257 return -EIO;
258
259 return 0;
260 }
261
262 static int ov2685_write_array(struct i2c_client *client,
263 const struct regval *regs)
264 {
265 int i, ret = 0;
266
267 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
268 ret = ov2685_write_reg(client, regs[i].addr,
269 OV2685_REG_VALUE_08BIT, regs[i].val);
270
271 return ret;
272 }
273
274 /* Read registers up to 4 at a time */
275 static int ov2685_read_reg(struct i2c_client *client, u16 reg,
276 unsigned int len, u32 *val)
277 {
278 struct i2c_msg msgs[2];
279 u8 *data_be_p;
280 u32 data_be = 0;
> 281 u16 reg_addr_be = cpu_to_be16(reg);
282 int ret;
283
284 if (len > 4)
285 return -EINVAL;
286
287 data_be_p = (u8 *)&data_be;
288 /* Write register address */
289 msgs[0].addr = client->addr;
290 msgs[0].flags = 0;
291 msgs[0].len = 2;
292 msgs[0].buf = (u8 *)®_addr_be;
293
294 /* Read data from register */
295 msgs[1].addr = client->addr;
296 msgs[1].flags = I2C_M_RD;
297 msgs[1].len = len;
298 msgs[1].buf = &data_be_p[4 - len];
299
300 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
301 if (ret != ARRAY_SIZE(msgs))
302 return -EIO;
303
> 304 *val = be32_to_cpu(data_be);
305
306 return 0;
307 }
308
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* Re: [PATCH v3] arm: imx: dts: Use lower case for bindings notation
From: Shawn Guo @ 2017-12-26 7:53 UTC (permalink / raw)
To: Mathieu Malaterre
Cc: Rob Herring, Fabio Estevam, Sascha Hauer, Fabio Estevam,
Mark Rutland, Russell King,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171215191930.11410-1-malat-8fiUuRrzOP0dnm+yROfE0A@public.gmane.org>
On Fri, Dec 15, 2017 at 08:19:30PM +0100, Mathieu Malaterre wrote:
> Improve the DTS files using lower case to fix the following dtc warnings:
>
> Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
>
> Converted using the following command:
>
> find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
>
> For simplicity, two sed expressions were used to solve each warnings separately.
>
> To make the regex expression more robust a few other issues were resolved,
> namely setting unit-address to lower case, and adding a whitespace before the
> the opening curly brace:
>
> https://elinux.org/Device_Tree_Linux#Linux_conventions
>
> This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
>
> Reported-by: David Daney <ddaney-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
> Suggested-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Mathieu Malaterre <malat-8fiUuRrzOP0dnm+yROfE0A@public.gmane.org>
Applied, thanks.
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^ permalink raw reply
* Re: [PATCH 16/25] arm: zx: dts: Remove leading 0x and 0s from bindings notation
From: Shawn Guo @ 2017-12-26 8:03 UTC (permalink / raw)
To: Mathieu Malaterre, Arnd Bergmann, Olof Johansson
Cc: Rob Herring, Jun Nie, Baoyou Xie, Mark Rutland, Russell King,
linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20171215124649.30692-1-malat@debian.org>
On Fri, Dec 15, 2017 at 01:46:48PM +0100, Mathieu Malaterre wrote:
> Improve the DTS files by removing all the leading "0x" and zeros to fix the
> following dtc warnings:
>
> Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
>
> and
>
> Warning (unit_address_format): Node /XXX unit name should not have leading 0s
>
> Converted using the following command:
>
> find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
>
> For simplicity, two sed expressions were used to solve each warnings separately.
>
> To make the regex expression more robust a few other issues were resolved,
> namely setting unit-address to lower case, and adding a whitespace before the
> the opening curly brace:
>
> https://elinux.org/Device_Tree_Linux#Linux_conventions
>
> This will solve as a side effect warning:
>
> Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
>
> This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
>
> Reported-by: David Daney <ddaney@caviumnetworks.com>
> Suggested-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Mathieu Malaterre <malat@debian.org>
Hi Arnd, Olof,
I do not have any other ZTE ZX platform patches to send you. Is it okay
to send this one using IMX branch, or can you apply it to arm-soc
directly?
Shawn
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: imx-gpcv2: Fix the unit address
From: Shawn Guo @ 2017-12-26 8:05 UTC (permalink / raw)
To: Fabio Estevam
Cc: andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w,
devicetree-u79uwXL29TY76Z2rM5mHXA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
Fabio Estevam
In-Reply-To: <1513447382-4269-1-git-send-email-festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Sat, Dec 16, 2017 at 04:03:02PM -0200, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>
>
> In the provided example the unit address does not match the 'reg' value,
> as IMX7_POWER_DOMAIN_PCIE_PHY is defined as 1.
>
> Fix the unit address and avoid using defines in reg as per Rob
> Herring's recommendation.
>
> Signed-off-by: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>
Applied, thanks.
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^ permalink raw reply
* Re: [PATCH v4 0/4] rtc: add mxc driver for i.MX53 SRTC
From: Shawn Guo @ 2017-12-26 8:24 UTC (permalink / raw)
To: linux-kernel-dev
Cc: Patrick Bruenn, Alessandro Zummo, Alexandre Belloni, Rob Herring,
Mark Rutland, open list:REAL TIME CLOCK (RTC) SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list, Fabio Estevam, Juergen Borleis, Noel Vellemans,
Sascha Hauer, Russell King,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Philippe Ombredanne
In-Reply-To: <20171218115133.16371-1-linux-kernel-dev@beckhoff.com>
On Mon, Dec 18, 2017 at 12:51:29PM +0100, linux-kernel-dev@beckhoff.com wrote:
> Patrick Bruenn (4):
> dt-bindings: rtc: add bindings for i.MX53 SRTC
> ARM: dts: imx53: add srtc node
> rtc: add mxc driver for i.MX53 SRTC
> ARM: imx_v6_v7_defconfig: enable RTC_DRV_MXC_V2
Applied 2/4 and 4/4, thanks.
^ permalink raw reply
* Re: [patch v15 1/4] drivers: jtag: Add JTAG core driver
From: Jiri Pirko @ 2017-12-26 8:47 UTC (permalink / raw)
To: Florian Fainelli
Cc: Oleksandr Shamray, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
arnd-r2nGTMty4D4, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA, openbmc-uLR06cmDAlY/bJ5BZ2RsiQ,
joel-U3u1mxZcP9KHXe+LvDLADg, jiri-rHqAuBHg3fBzbRFIqnYvSA,
tklauser-93Khv+1bN0NyDzI6CaY1VQ,
linux-serial-u79uwXL29TY76Z2rM5mHXA,
vadimp-VPRAkNaXOzVWk0Htik3J/w,
system-sw-low-level-VPRAkNaXOzVWk0Htik3J/w,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
openocd-devel-owner-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
linux-api-u79uwXL29TY76Z2rM5mHXA, davem-fT/PcQaiUtIeIZ0/mPfg9Q,
mchehab-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <13433849-cb7d-e2c0-4ce9-d91a6012d7d7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Tue, Dec 26, 2017 at 12:09:08AM CET, f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org wrote:
>Le 12/25/17 à 03:53, Oleksandr Shamray a écrit :
[...]
>[snip]
>
>> +
>> +void *jtag_priv(struct jtag *jtag)
>> +{
>> + return jtag->priv;
>> +}
>> +EXPORT_SYMBOL_GPL(jtag_priv);
>
>Can't you just create a static inline function in the public header for
>that? This is usually what subsystems do, I can understand why you would
>not want to expose struct jtag to other parts of the kernel, but still,
>this looks ugly, so maybe consider splitting the header between provider
>and consumer?
Other subsystems expose the struct. Here, it is intentional to don't
expose the struct, that's why we have this helper. What is ugly about
that? :)
^ permalink raw reply
* Re: [PATCH 0/4] vf610-zii-dev updates
From: Shawn Guo @ 2017-12-26 8:48 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Mark Rutland, Rob Herring, Sascha Hauer, Stefan Agner,
Andrew Lunn, Florian Fainelli, Linus Walleij,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20171220231108.GJ10595-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
On Wed, Dec 20, 2017 at 11:11:08PM +0000, Russell King - ARM Linux wrote:
> arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 34 ++++++++++++++++++++++++++++++-
> arch/arm/boot/dts/vf610-zii-dev.dtsi | 4 ++++
> 2 files changed, 37 insertions(+), 1 deletion(-)
Applied 1 - 3, thanks.
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^ permalink raw reply
* Re: [PATCH] ARM: dts: ls1021a: add nodes for on-chip ram
From: Shawn Guo @ 2017-12-26 8:56 UTC (permalink / raw)
To: Rasmus Villemoes
Cc: Rob Herring, Mark Rutland, Russell King,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1513870698-31264-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
On Thu, Dec 21, 2017 at 04:38:18PM +0100, Rasmus Villemoes wrote:
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
Empty commit log is not welcomed.
> ---
> arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index bd6622f10046..6f53e6aefb63 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -748,5 +748,21 @@
> <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
> <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + ocram1: sram@10000000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x10000000 0x0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x10000000 0x10000>;
> + };
> +
> + ocram2: sram@10010000 {
> + compatible = "mmio-sram";
> + reg = <0x0 0x10010000 0x0 0x10000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x0 0x10010000 0x10000>;
> + };
Why split one continuous sram into two nodes?
Shawn
> };
> };
> --
> 2.7.4
>
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^ permalink raw reply
* Re: [PATCH v5] arm64: dts: ls1088a: Add USB support
From: Shawn Guo @ 2017-12-26 8:58 UTC (permalink / raw)
To: yinbo.zhu-3arQi8VN3Tc
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Catalin Marinas ), Will Deacon ), Harninder Rai, Zhang Ying-22455,
Yuantian Tang,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list, Hou Zhiqiang, Prabhakar Kushwaha, Alison Wang,
xiaobo.xie-3arQi8VN3Tc, Ashish Kumar, jerry.huang-3arQi8VN3Tc,
Raghav Dogra
In-Reply-To: <20171222083807.5660-1-yinbo.zhu-3arQi8VN3Tc@public.gmane.org>
On Fri, Dec 22, 2017 at 04:38:07PM +0800, yinbo.zhu-3arQi8VN3Tc@public.gmane.org wrote:
> From: yinbo.zhu <yinbo.zhu-3arQi8VN3Tc@public.gmane.org>
>
> Add USB support on ls1088ardb
>
> Signed-off-by: yinbo zhu <yinbo.zhu-3arQi8VN3Tc@public.gmane.org>
> Signed-off-by: Ran Wang <ran.wang_1-3arQi8VN3Tc@public.gmane.org>
Applied, thanks.
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^ permalink raw reply
* Re: [PATCH] arm64: dts: ls208xa: add power monitor chip node
From: Shawn Guo @ 2017-12-26 9:15 UTC (permalink / raw)
To: Yuantian Tang
Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20171225075723.31080-1-andy.tang-3arQi8VN3Tc@public.gmane.org>
On Mon, Dec 25, 2017 at 03:57:23PM +0800, Yuantian Tang wrote:
> Ina220 chip was used on ls208xardb platform to monitor power
> comsumption. So add ina220 chip node in dts to enable power
> consumption monitor feature.
>
> Signed-off-by: Tang Yuantian <andy.tang-3arQi8VN3Tc@public.gmane.org>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 11 +++++++++++
> 1 files changed, 11 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
> index 9a1d0d2..a75132c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
> @@ -95,6 +95,17 @@
> };
> };
>
> + i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x02>;
We generally have a newline between property list and child node. I
fixed it up and applied the patch.
Shawn
> + ina220@40 {
> + compatible = "ti,ina220";
> + reg = <0x40>;
> + shunt-resistor = <500>;
> + };
> + };
> +
> i2c@3 {
> #address-cells = <1>;
> #size-cells = <0>;
> --
> 1.7.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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^ permalink raw reply
* Re: [PATCH v3] ARM: dts: ls1021a: add support for Moxa UC-8410A open platform
From: Shawn Guo @ 2017-12-26 9:17 UTC (permalink / raw)
To: SZ Lin
Cc: Jimmy Chen, Harry YJ Jhou, Rob Herring, Mark Rutland,
Russell King, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171226045432.14749-1-sz.lin-D4fb9hXD9d4@public.gmane.org>
On Tue, Dec 26, 2017 at 12:54:31PM +0800, SZ Lin wrote:
> Add support for Moxa UC-8410A open platform
>
> The UC-8410A computing platform is designed
> for embedded communication-centric industrial applications
>
> The features of UC-8410A are:
> * QSPI flash
> * SD slot
> * 3x LAN
> * 8x RS-232/422/485 ports, software-selectable
> * Mini PCIe form factor with PCIe/USB signal
> * 2x USB host
> * TPM
> * Watchdog
> * RTC
> * User LEDs
> * Beeper
> * Push button
>
> Signed-off-by: Jimmy Chen <jimmy.chen-D4fb9hXD9d4@public.gmane.org>
> Signed-off-by: Harry YJ Jhou <harryyj.jhou-D4fb9hXD9d4@public.gmane.org>
> Signed-off-by: SZ Lin <sz.lin-D4fb9hXD9d4@public.gmane.org>
Applied, thanks.
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^ permalink raw reply
* Re: [PATCH 1/3] mtd: spi-nor: add optional DMA-safe bounce buffer for data transfer
From: Vignesh R @ 2017-12-26 13:42 UTC (permalink / raw)
To: Cyrille Pitchen, computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ, richard-/L3Ra7n9ekc,
boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
marek.vasut-Re5JQEeQqe8AvxtiuMwx3w,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
broonie-DgEjT+Ai2ygdnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-spi-u79uwXL29TY76Z2rM5mHXA, robh-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
nicolas.ferre-UWL1GkI3JZL3oGB3hsPCZA,
radu.pirea-UWL1GkI3JZL3oGB3hsPCZA
In-Reply-To: <fc2440c6f52877f28286d89691049e5cba10e6a7.1514087323.git.cyrille.pitchen-yU5RGvR974pGWvitb5QawA@public.gmane.org>
Hi Cyrille,
Thanks for doing this series! One comment below.
On 24-Dec-17 10:06 AM, Cyrille Pitchen wrote:
[...]
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 8bafd462f0ae..59f9fbd45234 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -14,8 +14,10 @@
> #include <linux/errno.h>
> #include <linux/module.h>
> #include <linux/device.h>
> +#include <linux/highmem.h>
> #include <linux/mutex.h>
> #include <linux/math64.h>
> +#include <linux/mm.h>
> #include <linux/sizes.h>
> #include <linux/slab.h>
>
> @@ -1232,6 +1234,56 @@ static const struct flash_info spi_nor_ids[] = {
> { },
> };
>
> +static bool spi_nor_is_dma_safe(const void *buf)
> +{
> + if (is_vmalloc_addr(buf))
> + return false;
> +
> +#ifdef CONFIG_HIGHMEM
> + if ((unsigned long)buf >= PKMAP_BASE &&
> + (unsigned long)buf < (PKMAP_BASE + (LAST_PKMAP * PAGE_SIZE)))
> + return false;
> +#endif
> +
> + return true;
> +}
> +
Better way would be to use virt_addr_valid():
static bool spi_nor_is_dma_safe(const void *buf)
{
return virt_addr_valid(buf);
}
Regards
Vignesh
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* Re: [PATCH 1/3] mtd: spi-nor: add optional DMA-safe bounce buffer for data transfer
From: Cyrille Pitchen @ 2017-12-26 13:59 UTC (permalink / raw)
To: Vignesh R, computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ, richard-/L3Ra7n9ekc,
boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
marek.vasut-Re5JQEeQqe8AvxtiuMwx3w,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
broonie-DgEjT+Ai2ygdnm+yROfE0A, linux-I+IVW8TIWO2tmTQ+vhA3Yw
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-spi-u79uwXL29TY76Z2rM5mHXA, robh-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
nicolas.ferre-UWL1GkI3JZL3oGB3hsPCZA,
radu.pirea-UWL1GkI3JZL3oGB3hsPCZA
In-Reply-To: <1126731d-cbf7-8fbf-34ab-8ccf1cc8241f-l0cyMroinI0@public.gmane.org>
Hi Vignesh
Le 26/12/2017 à 14:42, Vignesh R a écrit :
> Hi Cyrille,
>
> Thanks for doing this series! One comment below.
>
> On 24-Dec-17 10:06 AM, Cyrille Pitchen wrote:
> [...]
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 8bafd462f0ae..59f9fbd45234 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -14,8 +14,10 @@
>> #include <linux/errno.h>
>> #include <linux/module.h>
>> #include <linux/device.h>
>> +#include <linux/highmem.h>
>> #include <linux/mutex.h>
>> #include <linux/math64.h>
>> +#include <linux/mm.h>
>> #include <linux/sizes.h>
>> #include <linux/slab.h>
>>
>> @@ -1232,6 +1234,56 @@ static const struct flash_info spi_nor_ids[] = {
>> { },
>> };
>>
>> +static bool spi_nor_is_dma_safe(const void *buf)
>> +{
>> + if (is_vmalloc_addr(buf))
>> + return false;
>> +
>> +#ifdef CONFIG_HIGHMEM
>> + if ((unsigned long)buf >= PKMAP_BASE &&
>> + (unsigned long)buf < (PKMAP_BASE + (LAST_PKMAP * PAGE_SIZE)))
>> + return false;
>> +#endif
>> +
>> + return true;
>> +}
>> +
>
> Better way would be to use virt_addr_valid():
> static bool spi_nor_is_dma_safe(const void *buf)
> {
> return virt_addr_valid(buf);
> }
>
> Regards
> Vignesh
>
Thanks for the advice :)
https://patchwork.kernel.org/patch/9768341/
Maybe I could check both virt_addr_valid() and object_is_on_stack() too ?
Best regards,
Cyrille
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* Re: [RFC PATCH v12 2/5] of/irq: Adjust of_pci_irq parsing for multiple interrupts
From: Rob Herring @ 2017-12-26 15:48 UTC (permalink / raw)
To: Jeffy Chen
Cc: linux-kernel@vger.kernel.org, Bjorn Helgaas, linux-pm,
Tony Lindgren, Shawn Lin, Brian Norris, Rafael J. Wysocki,
Doug Anderson, Frank Rowand,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
In-Reply-To: <20171226023646.17722-3-jeffy.chen@rock-chips.com>
On Mon, Dec 25, 2017 at 8:36 PM, Jeffy Chen <jeffy.chen@rock-chips.com> wrote:
> Currently we are considering the first irq as the PCI interrupt pin,
> but a PCI device may have multiple interrupts(e.g. PCIe WAKE# pin).
>
> Only parse the PCI interrupt pin when the irq is unnamed or named as
> "pci".
>
> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
> ---
>
> Changes in v13: None
> Changes in v12: None
> Changes in v11:
> Address Brian's comments.
>
> Changes in v10: None
> Changes in v9: None
> Changes in v8: None
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v3: None
> Changes in v2: None
>
> drivers/of/of_pci_irq.c | 22 +++++++++++++++++++---
> 1 file changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/of/of_pci_irq.c b/drivers/of/of_pci_irq.c
> index 3a05568f65df..d39565d5477b 100644
> --- a/drivers/of/of_pci_irq.c
> +++ b/drivers/of/of_pci_irq.c
> @@ -27,9 +27,25 @@ int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq
> */
> dn = pci_device_to_OF_node(pdev);
> if (dn) {
> - rc = of_irq_parse_one(dn, 0, out_irq);
> - if (!rc)
> - return rc;
> + struct property *prop;
> + const char *name;
> + int index = 0;
> +
> + of_property_for_each_string(dn, "interrupt-names", prop, name) {
> + if (!strcmp(name, "pci"))
> + break;
> + index++;
> + }
> +
> + /*
> + * Only parse from DT if we have no "interrupt-names",
> + * or if we found an interrupt named "pci".
> + */
> + if (index == 0 || name) {
> + rc = of_irq_parse_one(dn, index, out_irq);
> + if (!rc)
> + return rc;
> + }
As mentioned before, use of_property_match_string. The following should work:
index = of_property_match_string(dn, "interrupt-names", "pci");
if (index == -EINVAL) /* Property doesn't exist */
index = 0;
if (index >= 0) {
rc = of_irq_parse_one(dn, index, out_irq);
if (!rc)
return rc;
}
> }
>
> /* Ok, we don't, time to have fun. Let's start by building up an
> --
> 2.11.0
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH net-next] phylib: rename reset-(post-)delay-us to reset-(de)assert-us
From: Rob Herring @ 2017-12-26 15:49 UTC (permalink / raw)
To: Richard Leitner
Cc: Mark Rutland, Andrew Lunn, Florian Fainelli, Frank Rowand,
David Miller, Richard Leitner, Geert Uytterhoeven,
Lukasz Majewski, Sergei Shtylyov, Martin Blumenstingl, David Wu,
Baruch Siach,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
netdev, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <20171222100809.18826-1-dev-M/VWbR8SM2SsTnJN9+BGXg@public.gmane.org>
On Fri, Dec 22, 2017 at 4:08 AM, Richard Leitner <dev-M/VWbR8SM2SsTnJN9+BGXg@public.gmane.org> wrote:
> From: Richard Leitner <richard.leitner-WcANXNA0UjBBDgjK7y7TUQ@public.gmane.org>
>
> As suggested by Rob Herring [1] rename the previously introduced
> reset-{,post-}delay-us bindings to the clearer reset-{,de}assert-us
>
> [1] https://patchwork.kernel.org/patch/10104905/
>
> Signed-off-by: Richard Leitner <richard.leitner-WcANXNA0UjBBDgjK7y7TUQ@public.gmane.org>
> ---
> Documentation/devicetree/bindings/net/phy.txt | 8 ++++----
> drivers/net/phy/mdio_device.c | 2 +-
> drivers/of/of_mdio.c | 7 ++++---
> include/linux/mdio.h | 4 ++--
> 4 files changed, 11 insertions(+), 10 deletions(-)
Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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^ permalink raw reply
* Re: [PATCH net 1/2] dt-bindings: net: mediatek: add condition to property mediatek,pctl
From: David Miller @ 2017-12-26 17:05 UTC (permalink / raw)
To: sean.wang-NuS5LvNUpcJWk0Htik3J/w
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w, john-Pj+rj9U5foFAfugRpC6u6w,
nbd-p3rKhJxN3npAfugRpC6u6w, nelson.chang-NuS5LvNUpcJWk0Htik3J/w,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
netdev-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <e366efc29985d3292c8a1afb1389b5eac57c9037.1513762066.git.sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
From: <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Date: Wed, 20 Dec 2017 17:47:05 +0800
> From: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
>
> The property "mediatek,pctl" is only required for SoCs such as MT2701 and
> MT7623, so adding a few words for stating the condition.
>
> Signed-off-by: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Applied to net-next.
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^ permalink raw reply
* Re: [PATCH net 2/2] net: mediatek: remove superfluous pin setup for MT7622 SoC
From: David Miller @ 2017-12-26 17:06 UTC (permalink / raw)
To: sean.wang
Cc: robh+dt, mark.rutland, matthias.bgg, john, nbd, nelson.chang,
devicetree, linux-arm-kernel, netdev, linux-kernel,
linux-mediatek
In-Reply-To: <e3bd43a5337df719e791bc9902135a0916a951ff.1513762066.git.sean.wang@mediatek.com>
From: <sean.wang@mediatek.com>
Date: Wed, 20 Dec 2017 17:47:06 +0800
> From: Sean Wang <sean.wang@mediatek.com>
>
> Remove superfluous pin setup to get out of accessing invalid I/O pin
> registers because the way for pin configuring tends to be different from
> various SoCs and thus it should be better being managed and controlled by
> the pinctrl driver which MT7622 already can support.
>
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Applied to net-next.
^ permalink raw reply
* Re: [PATCH v2 4/5] ARM: dts: Add support for emtrion emCON-MX6 series
From: Rob Herring @ 2017-12-26 17:16 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Andreas Färber, Philippe Ombredanne, Türk, Jan,
Mark Rutland, Thierry Reding, David Airlie, Russell King,
Shawn Guo, Sascha Hauer, Fabio Estevam, Kevin Hilman,
Maxime Ripard, SZ Lin, Greg Kroah-Hartman,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
In-Reply-To: <20171222105642.GD18255-m++hUPXGwpdeoWH0uzbU5w@public.gmane.org>
On Fri, Dec 22, 2017 at 4:56 AM, Alexandre Belloni
<alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> + Philippe
>
> On 22/12/2017 at 11:43:33 +0100, Andreas Färber wrote:
>> >> I'll change it for v3 of this patch however it will end up like this:
>> >> //SPDX-License...
>> >
>> > That should be /* SPDX-License */, // is for c files.
>>
>> Got any reference for that? Since we're using the C preprocessor before
>> feeding them to dtc, we can use the same // style for both, builds fine.
>>
>> Only for my private DT overlay files that I use directly with dtc I
>> couldn't adopt that style.
We are well past the point of being able to build most dts files with just dtc.
> The doc states:
>
> If a specific tool cannot handle the standard comment style, then the
> appropriate comment mechanism which the tool accepts shall be used. This
> is the reason for having the "/\* \*/" style comment in C header
> files.
>
> I interpreted that as dtc doesn't handle // comments, use /**/
It's been so long, I'd forgotten that. Perhaps we should fix dtc to
handle // comments.
>
> But I agree it also states:
> .dts{i}: // SPDX-License-Identifier: <SPDX License Expression>
Or we could still change this. The guidelines aren't merged yet.
Rob
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* Re: [v3,1/2] dt-bindings: hwmon: aspeed-pwm-tacho: Add reset node
From: Guenter Roeck @ 2017-12-26 17:24 UTC (permalink / raw)
To: Joel
Cc: Rob Herring, Philipp Zabel, Mykola Kostenok,
Jaghathiswari Rankappagounder Natarajan, Patrick Venture,
Andrew Jeffery, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-hwmon-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171223130528.5346-2-joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
On Sat, Dec 23, 2017 at 11:35:27PM +1030, Joel wrote:
> The device tree bindings are updated to document the resets phandle, and
> the example is updated to match what is expected for both the reset and
> clock phandle.
>
> Note that the bindings should have always had the reset controller, as
> the hardware is unusable without it.
>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Joel Stanley <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
Applied to hwmon-next.
Thanks,
Guenter
> ---
> .../devicetree/bindings/hwmon/aspeed-pwm-tacho.txt | 14 +++++---------
> 1 file changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt b/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt
> index 367c8203213b..3ac02988a1a5 100644
> --- a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt
> +++ b/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt
> @@ -22,8 +22,9 @@ Required properties for pwm-tacho node:
> - compatible : should be "aspeed,ast2400-pwm-tacho" for AST2400 and
> "aspeed,ast2500-pwm-tacho" for AST2500.
>
> -- clocks : a fixed clock providing input clock frequency(PWM
> - and Fan Tach clock)
> +- clocks : phandle to clock provider with the clock number in the second cell
> +
> +- resets : phandle to reset controller with the reset number in the second cell
>
> fan subnode format:
> ===================
> @@ -48,19 +49,14 @@ Required properties for each child node:
>
> Examples:
>
> -pwm_tacho_fixed_clk: fixedclk {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <24000000>;
> -};
> -
> pwm_tacho: pwmtachocontroller@1e786000 {
> #address-cells = <1>;
> #size-cells = <1>;
> #cooling-cells = <2>;
> reg = <0x1E786000 0x1000>;
> compatible = "aspeed,ast2500-pwm-tacho";
> - clocks = <&pwm_tacho_fixed_clk>;
> + clocks = <&syscon ASPEED_CLK_APB>;
> + resets = <&syscon ASPEED_RESET_PWM>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
>
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