* Re: [PATCH v6 2/4] ARM: dts: tegra: Fix unit_address_vs_reg DTC warnings for /memory
From: Krzysztof Kozlowski @ 2018-05-23 11:27 UTC (permalink / raw)
To: Stefan Agner
Cc: Rob Herring, Mark Rutland, Thierry Reding, Jonathan Hunter,
devicetree, linux-tegra, linux-kernel, Marcel Ziswiler,
Lucas Stach
In-Reply-To: <870361d2b9451af2e21cc570c8fca2c2@agner.ch>
On Wed, May 23, 2018 at 1:00 PM, Stefan Agner <stefan@agner.ch> wrote:
> On 23.05.2018 11:56, Krzysztof Kozlowski wrote:
>> Add a generic /memory node in each Tegra DTSI (with empty reg property,
>> to be overidden by each DTS) and set proper unit address for /memory
>> nodes to fix the DTC warnings:
>>
>> arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
>> /memory: node has a reg or ranges property, but no unit name
>>
>> The DTB after the change is the same as before except adding
>> unit-address to /memory node.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>>
>> ---
>>
>> Changes since v5:
>> 1. Split with skeleton.dtsi removal (suggested by Stefan).
>>
>> Changes since v4:
>> 1. None
>> ---
>> arch/arm/boot/dts/tegra114-dalmore.dts | 2 +-
>> arch/arm/boot/dts/tegra114-roth.dts | 2 +-
>> arch/arm/boot/dts/tegra114-tn7.dts | 2 +-
>> arch/arm/boot/dts/tegra114.dtsi | 3 ++-
>> arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +-
>> arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +-
>> arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +-
>> arch/arm/boot/dts/tegra124-nyan.dtsi | 2 +-
>> arch/arm/boot/dts/tegra124-venice2.dts | 2 +-
>> arch/arm/boot/dts/tegra124.dtsi | 3 ++-
>> arch/arm/boot/dts/tegra20-colibri-512.dtsi | 2 +-
>> arch/arm/boot/dts/tegra20-harmony.dts | 2 +-
>> arch/arm/boot/dts/tegra20-paz00.dts | 2 +-
>> arch/arm/boot/dts/tegra20-seaboard.dts | 2 +-
>> arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +-
>> arch/arm/boot/dts/tegra20-trimslice.dts | 2 +-
>> arch/arm/boot/dts/tegra20-ventana.dts | 2 +-
>> arch/arm/boot/dts/tegra20.dtsi | 3 ++-
>> arch/arm/boot/dts/tegra30-apalis.dtsi | 4 ++--
>> arch/arm/boot/dts/tegra30-beaver.dts | 2 +-
>> arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
>> arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
>> arch/arm/boot/dts/tegra30.dtsi | 3 ++-
>> 23 files changed, 28 insertions(+), 24 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
>> b/arch/arm/boot/dts/tegra114-dalmore.dts
>> index eafff16765b4..1788556b4977 100644
>> --- a/arch/arm/boot/dts/tegra114-dalmore.dts
>> +++ b/arch/arm/boot/dts/tegra114-dalmore.dts
>> @@ -23,7 +23,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@80000000 {
>> reg = <0x80000000 0x40000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra114-roth.dts
>> b/arch/arm/boot/dts/tegra114-roth.dts
>> index 7ed7370ee67a..3d3835591cd2 100644
>> --- a/arch/arm/boot/dts/tegra114-roth.dts
>> +++ b/arch/arm/boot/dts/tegra114-roth.dts
>> @@ -28,7 +28,7 @@
>> };
>> };
>>
>> - memory {
>> + memory@80000000 {
>> /* memory >= 0x79600000 is reserved for firmware usage */
>> reg = <0x80000000 0x79600000>;
>> };
>> diff --git a/arch/arm/boot/dts/tegra114-tn7.dts
>> b/arch/arm/boot/dts/tegra114-tn7.dts
>> index 7fc4a8b31e45..bfdd1bf61816 100644
>> --- a/arch/arm/boot/dts/tegra114-tn7.dts
>> +++ b/arch/arm/boot/dts/tegra114-tn7.dts
>> @@ -28,7 +28,7 @@
>> };
>> };
>>
>> - memory {
>> + memory@80000000 {
>> /* memory >= 0x37e00000 is reserved for firmware usage */
>> reg = <0x80000000 0x37e00000>;
>> };
>> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
>> index 27ef515e5640..aff4b8e115bc 100644
>> --- a/arch/arm/boot/dts/tegra114.dtsi
>> +++ b/arch/arm/boot/dts/tegra114.dtsi
>> @@ -11,8 +11,9 @@
>> #address-cells = <1>;
>> #size-cells = <1>;
>>
>> - memory {
>> + memory@80000000 {
>> device_type = "memory";
>> + reg = <0x80000000 0>;
>
> Nit: I'd rather prefer
>
> reg = <0x80000000 0x0>;
Sure.
>> };
>>
>> host1x@50000000 {
>> diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
>> b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
>> index bb67edb016c5..6a7f45651d38 100644
>> --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
>> +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
>> @@ -15,7 +15,7 @@
>> compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
>> "nvidia,tegra124";
>>
>> - memory {
>> + memory@0 {
>> reg = <0x0 0x80000000 0x0 0x80000000>;
>> };
>
> Unit address combines all address cells, so this should be 80000000
> here. See also the device tree spec (v0.2) which has an example in
> chapter 3.4 /memory node.
>
> So this should be:
>
> memory@80000000 {
> ...
>
> Same with all the board files below.
Ah, yes.
>>
>> diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
>> b/arch/arm/boot/dts/tegra124-apalis.dtsi
>> index 65a2161b9b8e..e4625abd0a8a 100644
>> --- a/arch/arm/boot/dts/tegra124-apalis.dtsi
>> +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
>> @@ -50,7 +50,7 @@
>> model = "Toradex Apalis TK1";
>> compatible = "toradex,apalis-tk1", "nvidia,tegra124";
>>
>> - memory {
>> + memory@0 {
>> reg = <0x0 0x80000000 0x0 0x80000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
>> b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
>> index 6dbcf84dafbc..e23b1159e8fd 100644
>> --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
>> +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
>> @@ -24,7 +24,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x0 0x80000000 0x0 0x80000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi
>> b/arch/arm/boot/dts/tegra124-nyan.dtsi
>> index 3609367037a6..f45ac668d88c 100644
>> --- a/arch/arm/boot/dts/tegra124-nyan.dtsi
>> +++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
>> @@ -13,7 +13,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x0 0x80000000 0x0 0x80000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra124-venice2.dts
>> b/arch/arm/boot/dts/tegra124-venice2.dts
>> index 89bcc178994d..44492b48e165 100644
>> --- a/arch/arm/boot/dts/tegra124-venice2.dts
>> +++ b/arch/arm/boot/dts/tegra124-venice2.dts
>> @@ -18,7 +18,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x0 0x80000000 0x0 0x80000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
>> index 951feea784af..ad9c9cd6fa8a 100644
>> --- a/arch/arm/boot/dts/tegra124.dtsi
>> +++ b/arch/arm/boot/dts/tegra124.dtsi
>> @@ -13,8 +13,9 @@
>> #address-cells = <2>;
>> #size-cells = <2>;
>>
>> - memory {
>> + memory@0 {
>> device_type = "memory";
>> + reg = <0 0>;
>> };
>
> This should have two address and two size cells I guess. And DDR for all
> TK1 start at 0x0 0x80000000...
>
> So here with a default length of 0:
>
> memory@80000000 {
> reg = <0x0 0x80000000 0x0 0x0>;
> };
Yes, right.
>>
>> pcie@1003000 {
>> diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
>> b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
>> index 5c202b3e3bb1..5623ff8d128c 100644
>> --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
>> +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
>> @@ -10,7 +10,7 @@
>> rtc1 = "/rtc@7000e000";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x00000000 0x20000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
>> b/arch/arm/boot/dts/tegra20-harmony.dts
>> index 628a55a9318b..1d96d92b72a7 100644
>> --- a/arch/arm/boot/dts/tegra20-harmony.dts
>> +++ b/arch/arm/boot/dts/tegra20-harmony.dts
>> @@ -18,7 +18,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x00000000 0x40000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
>> b/arch/arm/boot/dts/tegra20-paz00.dts
>> index 30436969adc0..ef245291924f 100644
>> --- a/arch/arm/boot/dts/tegra20-paz00.dts
>> +++ b/arch/arm/boot/dts/tegra20-paz00.dts
>> @@ -19,7 +19,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x00000000 0x20000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
>> b/arch/arm/boot/dts/tegra20-seaboard.dts
>> index 284aae351ff2..f91441683aad 100644
>> --- a/arch/arm/boot/dts/tegra20-seaboard.dts
>> +++ b/arch/arm/boot/dts/tegra20-seaboard.dts
>> @@ -18,7 +18,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x00000000 0x40000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi
>> b/arch/arm/boot/dts/tegra20-tamonten.dtsi
>> index 872046d48709..20137fc578b1 100644
>> --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
>> +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
>> @@ -15,7 +15,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x00000000 0x20000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
>> b/arch/arm/boot/dts/tegra20-trimslice.dts
>> index d55c6b240a30..9eb26dc15f6b 100644
>> --- a/arch/arm/boot/dts/tegra20-trimslice.dts
>> +++ b/arch/arm/boot/dts/tegra20-trimslice.dts
>> @@ -18,7 +18,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x00000000 0x40000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra20-ventana.dts
>> b/arch/arm/boot/dts/tegra20-ventana.dts
>> index ee3fbf941e79..f44551e2d9d0 100644
>> --- a/arch/arm/boot/dts/tegra20-ventana.dts
>> +++ b/arch/arm/boot/dts/tegra20-ventana.dts
>> @@ -18,7 +18,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@0 {
>> reg = <0x00000000 0x40000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
>> index 88dd1afb5877..55581c0e5105 100644
>> --- a/arch/arm/boot/dts/tegra20.dtsi
>> +++ b/arch/arm/boot/dts/tegra20.dtsi
>> @@ -13,8 +13,9 @@
>> chosen { };
>> aliases { };
>>
>> - memory {
>> + memory@0 {
>> device_type = "memory";
>> + reg = <0 0>;
>> };
>>
>> iram@40000000 {
>> diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
>> b/arch/arm/boot/dts/tegra30-apalis.dtsi
>> index 6f29cbad6e8a..9465fc592b7b 100644
>> --- a/arch/arm/boot/dts/tegra30-apalis.dtsi
>> +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
>> @@ -10,8 +10,8 @@
>> model = "Toradex Apalis T30";
>> compatible = "toradex,apalis_t30", "nvidia,tegra30";
>>
>> - memory {
>> - reg = <0 0>;
>> + memory@80000000 {
>> + reg = <0x80000000 0x40000000>;
>> };
>>
>> pcie@3000 {
>> diff --git a/arch/arm/boot/dts/tegra30-beaver.dts
>> b/arch/arm/boot/dts/tegra30-beaver.dts
>> index ae52a5039506..1434d50438f9 100644
>> --- a/arch/arm/boot/dts/tegra30-beaver.dts
>> +++ b/arch/arm/boot/dts/tegra30-beaver.dts
>> @@ -17,7 +17,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@80000000 {
>> reg = <0x80000000 0x7ff00000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi
>> b/arch/arm/boot/dts/tegra30-cardhu.dtsi
>> index 92a9740c533f..33b73dca16a3 100644
>> --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
>> +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
>> @@ -40,7 +40,7 @@
>> stdout-path = "serial0:115200n8";
>> };
>>
>> - memory {
>> + memory@80000000 {
>> reg = <0x80000000 0x40000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi
>> b/arch/arm/boot/dts/tegra30-colibri.dtsi
>> index c44d8c40c410..9bf3327665d3 100644
>> --- a/arch/arm/boot/dts/tegra30-colibri.dtsi
>> +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
>> @@ -10,7 +10,7 @@
>> model = "Toradex Colibri T30";
>> compatible = "toradex,colibri_t30", "nvidia,tegra30";
>>
>> - memory {
>> + memory@80000000 {
>> reg = <0x80000000 0x40000000>;
>> };
>>
>> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
>> index 19237c08c166..2b6243b0c6d6 100644
>> --- a/arch/arm/boot/dts/tegra30.dtsi
>> +++ b/arch/arm/boot/dts/tegra30.dtsi
>> @@ -14,8 +14,9 @@
>> chosen { };
>> aliases { };
>>
>> - memory {
>> + memory@80000000 {
>> device_type = "memory";
>> + reg = <0x80000000 0>;
>
> Nit: for consistency sake, 0x0 :-)
Sure, thanks for review!
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH] mfd: dt: Add bindings for DA9063L
From: Marek Vasut @ 2018-05-23 11:26 UTC (permalink / raw)
To: devicetree
Cc: Marek Vasut, Geert Uytterhoeven, Lee Jones, Rob Herring,
Steve Twiss, Wolfram Sang, linux-renesas-soc
Add device tree bindings for the Dialog DA9063L. This is a
variant of the DA9063 chip with smaller package, with less
LDO regulators and without RTC block. The other properties
of the chip are the same, including the content of the chip
ID register.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Steve Twiss <stwiss.opensource@diasemi.com>
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: linux-renesas-soc@vger.kernel.org
---
Documentation/devicetree/bindings/mfd/da9063.txt | 34 +++++++++++++++++-------
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/da9063.txt b/Documentation/devicetree/bindings/mfd/da9063.txt
index 05b21bcb8543..a519cf0f5c8d 100644
--- a/Documentation/devicetree/bindings/mfd/da9063.txt
+++ b/Documentation/devicetree/bindings/mfd/da9063.txt
@@ -1,4 +1,4 @@
-* Dialog DA9063 Power Management Integrated Circuit (PMIC)
+* Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)
DA9093 consists of a large and varied group of sub-devices (I2C Only):
@@ -6,14 +6,14 @@ Device Supply Names Description
------ ------------ -----------
da9063-regulator : : LDOs & BUCKs
da9063-onkey : : On Key
-da9063-rtc : : Real-Time Clock
+da9063-rtc : : Real-Time Clock (DA9063 only)
da9063-watchdog : : Watchdog
======
Required properties:
-- compatible : Should be "dlg,da9063"
+- compatible : Should be "dlg,da9063" or "dlg,da9063l"
- reg : Specifies the I2C slave address (this defaults to 0x58 but it can be
modified to match the chip's OTP settings).
- interrupt-parent : Specifies the reference to the interrupt controller for
@@ -23,8 +23,8 @@ Required properties:
Sub-nodes:
-- regulators : This node defines the settings for the LDOs and BUCKs. The
- DA9063 regulators are bound using their names listed below:
+- regulators : This node defines the settings for the LDOs and BUCKs.
+ The DA9063 regulators are bound using their names listed below:
bcore1 : BUCK CORE1
bcore2 : BUCK CORE2
@@ -44,13 +44,28 @@ Sub-nodes:
ldo10 : LDO_10
ldo11 : LDO_11
+ The DA9063L regulators are bound using their names listed below:
+
+ bcore1 : BUCK CORE1
+ bcore2 : BUCK CORE2
+ bpro : BUCK PRO
+ bmem : BUCK MEM
+ bio : BUCK IO
+ bperi : BUCK PERI
+ ldo3 : LDO_3
+ ldo7 : LDO_7
+ ldo8 : LDO_8
+ ldo9 : LDO_9
+ ldo11 : LDO_11
+
The component follows the standard regulator framework and the bindings
details of individual regulator device can be found in:
Documentation/devicetree/bindings/regulator/regulator.txt
- rtc : This node defines settings for the Real-Time Clock associated with
- the DA9063. There are currently no entries in this binding, however
- compatible = "dlg,da9063-rtc" should be added if a node is created.
+ the DA9063 only. The RTC is not present in DA9063L. There are currently
+ no entries in this binding, however compatible = "dlg,da9063-rtc" should
+ be added if a node is created.
- onkey : This node defines the OnKey settings for controlling the key
functionality of the device. The node should contain the compatible property
@@ -65,8 +80,9 @@ Sub-nodes:
and KEY_SLEEP.
- watchdog : This node defines settings for the Watchdog timer associated
- with the DA9063. There are currently no entries in this binding, however
- compatible = "dlg,da9063-watchdog" should be added if a node is created.
+ with the DA9063 and DA9063L. There are currently no entries in this
+ binding, however compatible = "dlg,da9063-watchdog" should be added
+ if a node is created.
Example:
--
2.16.2
^ permalink raw reply related
* Re: [PATCH] clk: rockchip: remove deprecated gate-clk code and dt-binding
From: Heiko Stübner @ 2018-05-23 11:20 UTC (permalink / raw)
To: mturquette-rdvid1DuHRBWk0Htik3J/w
Cc: mark.rutland-5wv7dgnIgG8, devicetree-u79uwXL29TY76Z2rM5mHXA,
sboyd-DgEjT+Ai2ygdnm+yROfE0A,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, linux-clk-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20180512143038.30447-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Am Samstag, 12. Mai 2018, 16:30:38 CEST schrieb Heiko Stuebner:
> Initially we tried modeling clocks via the devicetree before switching
> to clocks declared in the clock drivers and only exporting specific
> ids to the devicetree.
>
> As the old code was in the kernel for 1-2 releases when the new mode
> of operation was added we kept it for backwards compatibility.
>
> That deprecation notice is in the binding since july 2014, so nearly
> 4 years now and I think it's time to drop the old cruft.
>
> Especially as at the time using the mainline kernel on Rockchip devices
> was not really possible, except for experiments on the really old socs of
> the rk3066 + rk3188 line, so there shouldn't be any devicetrees still
> around that rely on that code.
>
> Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
applied to my Rockchip clock-tree with the 2 received tags.
^ permalink raw reply
* Re: [PATCH v6 4/6] ARM: dts: Renesas RZ/N1 SoC base device tree file
From: Geert Uytterhoeven @ 2018-05-23 11:18 UTC (permalink / raw)
To: M P
Cc: Michel Pollet, Linux-Renesas, Simon Horman, Phil Edworthy,
Michel Pollet, Magnus Damm, Rob Herring, Mark Rutland,
Michael Turquette, Stephen Boyd, Geert Uytterhoeven,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List, linux-clk
In-Reply-To: <CAMMfpEw=6POaZBU9HduKBb8Wk2mH0oAXhCdQo7c+hQWgxka3vA@mail.gmail.com>
Hi Michel,
On Wed, May 23, 2018 at 11:20 AM, M P <buserror@gmail.com> wrote:
> On Wed, 23 May 2018 at 10:12, Geert Uytterhoeven <geert@linux-m68k.org>
> wrote:
>> On Tue, May 22, 2018 at 12:01 PM, Michel Pollet
>> <michel.pollet@bp.renesas.com> wrote:
>> > + #address-cells = <1>;
>> > + #size-cells = <1>;
>> > +
>> > + cpus {
>> > + #address-cells = <1>;
>> > + #size-cells = <0>;
>> > + clocks = <&clock RZN1_DIV_CA7>;
>
>> I think the clocks property should be moved to the individual CPU nodes.
>
> Ah, I had a look around, and I found some instances that are in the cpu
> sub-node, and others that are not -- it seems that having it in the cpu
> sub-node would implies it's core specific... here if that clock is changed
> both cores would change speed...
Assumed the driver code knows to look in the parent node, which I doubt
the cpufreq code does.
> Either way, it's not used by the kernel in any way at the moment -- I had
> hoped cpufreq or something would claim it, but it's not the case.
I guess you have to add your main SoC compatible value to the whitelist
in drivers/cpufreq/cpufreq-dt-platdev.c first.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH v3 07/13] soc: rockchip: power-domain: add power domain support for rk3128
From: Heiko Stübner @ 2018-05-23 11:18 UTC (permalink / raw)
To: Elaine Zhang
Cc: robh+dt, mark.rutland, devicetree, rjw, khilman, ulf.hansson,
linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel, wxt,
xxx, xf, huangtao
In-Reply-To: <1527058270-10412-1-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:51:10 CEST schrieb Elaine Zhang:
> This driver is modified to support RK3128 SoC.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
applied for 4.18 or 4.19 (not sure yet).
Patch 8/13 had the licensing issue Rob pointed out, so while
with your fixed SPDX tag everything should be fine, I'll give
Rob the chance to look it over :-)
Heiko
^ permalink raw reply
* Re: [PATCH v3 06/13] dt-bindings: add binding for rk3128 power domains
From: Heiko Stübner @ 2018-05-23 11:17 UTC (permalink / raw)
To: Elaine Zhang
Cc: robh+dt, mark.rutland, devicetree, rjw, khilman, ulf.hansson,
linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel, wxt,
xxx, xf, huangtao
In-Reply-To: <1527058248-10366-1-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:50:48 CEST schrieb Elaine Zhang:
> Add binding documentation for the power domains
> found on Rockchip RK3128 SoCs.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> Acked-by: Rob Herring <robh@kernel.org>
applied for 4.18 or 4.19 (not sure yet).
^ permalink raw reply
* Re: [PATCH v3 05/13] dt-bindings: power: add RK3128 SoCs header for power-domain
From: Heiko Stübner @ 2018-05-23 11:16 UTC (permalink / raw)
To: Elaine Zhang
Cc: robh+dt, mark.rutland, devicetree, rjw, khilman, ulf.hansson,
linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel, wxt,
xxx, xf, huangtao
In-Reply-To: <1527058231-10319-1-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:50:31 CEST schrieb Elaine Zhang:
> According to a description from TRM, add all the power domains.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
applied for 4.18 or 4.19 (not sure yet) after adding
Rob's Review-tag from v2.
Thanks
Heiko
^ permalink raw reply
* RE: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver
From: ilialin @ 2018-05-23 11:06 UTC (permalink / raw)
To: 'Sudeep Holla'
Cc: vireshk, nm, sboyd, robh, mark.rutland, rjw, linux-pm, devicetree,
linux-kernel
In-Reply-To: <3f1ca60e-7aa8-fccc-ab1c-4b7c37731cce@arm.com>
> -----Original Message-----
> From: Sudeep Holla <sudeep.holla@arm.com>
> Sent: Wednesday, May 23, 2018 13:40
> To: Ilia Lin <ilialin@codeaurora.org>; vireshk@kernel.org; nm@ti.com;
> sboyd@kernel.org; robh@kernel.org; mark.rutland@arm.com;
> rjw@rjwysocki.net; linux-pm@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org
> Cc: Sudeep Holla <sudeep.holla@arm.com>
> Subject: Re: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver
>
>
>
> On 23/05/18 10:40, Ilia Lin wrote:
> > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO
> > processors, the CPU frequency subset and voltage value of each OPP
> > varies based on the silicon variant in use. Qualcomm Process Voltage
> > Scaling Tables defines the voltage and frequency value based on the
> > msm-id in SMEM and speedbin blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
>
> [...]
>
> > + pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
> > + if (!IS_ERR(pdev))
> > + return 0;
> > +
> > + ret = PTR_ERR(pdev);
> > + dev_err(cpu_dev, "Failed to register platform device\n");
> > +
> > +free_opp:
> > + for_each_possible_cpu(cpu) {
> > + if (IS_ERR_OR_NULL(opp_tables[cpu]))
> > + break;
> > + dev_pm_opp_put_supported_hw(opp_tables[cpu]);
> > + }
> > +free_np:
> > + of_node_put(np);
> > +
> > + return ret;
> > +}
> > +late_initcall(qcom_cpufreq_kryo_driver_init);
>
> Any particular reason why this *has* to be late initcall ?
> Please change it to module_initcall otherwise.
The purpose is to give the cpufreq-dt the time to register the driver and only then my driver will add the platform device.
> Also address the of_node comments from Viresh.
>
> Otherwise, it looks good.
> --
> Regards,
> Sudeep
^ permalink raw reply
* Re: [PATCH v6 2/4] ARM: dts: tegra: Fix unit_address_vs_reg DTC warnings for /memory
From: Stefan Agner @ 2018-05-23 11:00 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Mark Rutland, Thierry Reding, Jonathan Hunter,
devicetree, linux-tegra, linux-kernel, Marcel Ziswiler,
Lucas Stach
In-Reply-To: <1527069406-6359-2-git-send-email-krzk@kernel.org>
On 23.05.2018 11:56, Krzysztof Kozlowski wrote:
> Add a generic /memory node in each Tegra DTSI (with empty reg property,
> to be overidden by each DTS) and set proper unit address for /memory
> nodes to fix the DTC warnings:
>
> arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
> /memory: node has a reg or ranges property, but no unit name
>
> The DTB after the change is the same as before except adding
> unit-address to /memory node.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>
> ---
>
> Changes since v5:
> 1. Split with skeleton.dtsi removal (suggested by Stefan).
>
> Changes since v4:
> 1. None
> ---
> arch/arm/boot/dts/tegra114-dalmore.dts | 2 +-
> arch/arm/boot/dts/tegra114-roth.dts | 2 +-
> arch/arm/boot/dts/tegra114-tn7.dts | 2 +-
> arch/arm/boot/dts/tegra114.dtsi | 3 ++-
> arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +-
> arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +-
> arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +-
> arch/arm/boot/dts/tegra124-nyan.dtsi | 2 +-
> arch/arm/boot/dts/tegra124-venice2.dts | 2 +-
> arch/arm/boot/dts/tegra124.dtsi | 3 ++-
> arch/arm/boot/dts/tegra20-colibri-512.dtsi | 2 +-
> arch/arm/boot/dts/tegra20-harmony.dts | 2 +-
> arch/arm/boot/dts/tegra20-paz00.dts | 2 +-
> arch/arm/boot/dts/tegra20-seaboard.dts | 2 +-
> arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +-
> arch/arm/boot/dts/tegra20-trimslice.dts | 2 +-
> arch/arm/boot/dts/tegra20-ventana.dts | 2 +-
> arch/arm/boot/dts/tegra20.dtsi | 3 ++-
> arch/arm/boot/dts/tegra30-apalis.dtsi | 4 ++--
> arch/arm/boot/dts/tegra30-beaver.dts | 2 +-
> arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
> arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
> arch/arm/boot/dts/tegra30.dtsi | 3 ++-
> 23 files changed, 28 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts
> b/arch/arm/boot/dts/tegra114-dalmore.dts
> index eafff16765b4..1788556b4977 100644
> --- a/arch/arm/boot/dts/tegra114-dalmore.dts
> +++ b/arch/arm/boot/dts/tegra114-dalmore.dts
> @@ -23,7 +23,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@80000000 {
> reg = <0x80000000 0x40000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra114-roth.dts
> b/arch/arm/boot/dts/tegra114-roth.dts
> index 7ed7370ee67a..3d3835591cd2 100644
> --- a/arch/arm/boot/dts/tegra114-roth.dts
> +++ b/arch/arm/boot/dts/tegra114-roth.dts
> @@ -28,7 +28,7 @@
> };
> };
>
> - memory {
> + memory@80000000 {
> /* memory >= 0x79600000 is reserved for firmware usage */
> reg = <0x80000000 0x79600000>;
> };
> diff --git a/arch/arm/boot/dts/tegra114-tn7.dts
> b/arch/arm/boot/dts/tegra114-tn7.dts
> index 7fc4a8b31e45..bfdd1bf61816 100644
> --- a/arch/arm/boot/dts/tegra114-tn7.dts
> +++ b/arch/arm/boot/dts/tegra114-tn7.dts
> @@ -28,7 +28,7 @@
> };
> };
>
> - memory {
> + memory@80000000 {
> /* memory >= 0x37e00000 is reserved for firmware usage */
> reg = <0x80000000 0x37e00000>;
> };
> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
> index 27ef515e5640..aff4b8e115bc 100644
> --- a/arch/arm/boot/dts/tegra114.dtsi
> +++ b/arch/arm/boot/dts/tegra114.dtsi
> @@ -11,8 +11,9 @@
> #address-cells = <1>;
> #size-cells = <1>;
>
> - memory {
> + memory@80000000 {
> device_type = "memory";
> + reg = <0x80000000 0>;
Nit: I'd rather prefer
reg = <0x80000000 0x0>;
> };
>
> host1x@50000000 {
> diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> index bb67edb016c5..6a7f45651d38 100644
> --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> @@ -15,7 +15,7 @@
> compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
> "nvidia,tegra124";
>
> - memory {
> + memory@0 {
> reg = <0x0 0x80000000 0x0 0x80000000>;
> };
Unit address combines all address cells, so this should be 80000000
here. See also the device tree spec (v0.2) which has an example in
chapter 3.4 /memory node.
So this should be:
memory@80000000 {
...
Same with all the board files below.
>
> diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
> b/arch/arm/boot/dts/tegra124-apalis.dtsi
> index 65a2161b9b8e..e4625abd0a8a 100644
> --- a/arch/arm/boot/dts/tegra124-apalis.dtsi
> +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
> @@ -50,7 +50,7 @@
> model = "Toradex Apalis TK1";
> compatible = "toradex,apalis-tk1", "nvidia,tegra124";
>
> - memory {
> + memory@0 {
> reg = <0x0 0x80000000 0x0 0x80000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
> b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
> index 6dbcf84dafbc..e23b1159e8fd 100644
> --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
> +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
> @@ -24,7 +24,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x0 0x80000000 0x0 0x80000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi
> b/arch/arm/boot/dts/tegra124-nyan.dtsi
> index 3609367037a6..f45ac668d88c 100644
> --- a/arch/arm/boot/dts/tegra124-nyan.dtsi
> +++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
> @@ -13,7 +13,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x0 0x80000000 0x0 0x80000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra124-venice2.dts
> b/arch/arm/boot/dts/tegra124-venice2.dts
> index 89bcc178994d..44492b48e165 100644
> --- a/arch/arm/boot/dts/tegra124-venice2.dts
> +++ b/arch/arm/boot/dts/tegra124-venice2.dts
> @@ -18,7 +18,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x0 0x80000000 0x0 0x80000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> index 951feea784af..ad9c9cd6fa8a 100644
> --- a/arch/arm/boot/dts/tegra124.dtsi
> +++ b/arch/arm/boot/dts/tegra124.dtsi
> @@ -13,8 +13,9 @@
> #address-cells = <2>;
> #size-cells = <2>;
>
> - memory {
> + memory@0 {
> device_type = "memory";
> + reg = <0 0>;
> };
This should have two address and two size cells I guess. And DDR for all
TK1 start at 0x0 0x80000000...
So here with a default length of 0:
memory@80000000 {
reg = <0x0 0x80000000 0x0 0x0>;
};
>
> pcie@1003000 {
> diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> index 5c202b3e3bb1..5623ff8d128c 100644
> --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
> @@ -10,7 +10,7 @@
> rtc1 = "/rtc@7000e000";
> };
>
> - memory {
> + memory@0 {
> reg = <0x00000000 0x20000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra20-harmony.dts
> b/arch/arm/boot/dts/tegra20-harmony.dts
> index 628a55a9318b..1d96d92b72a7 100644
> --- a/arch/arm/boot/dts/tegra20-harmony.dts
> +++ b/arch/arm/boot/dts/tegra20-harmony.dts
> @@ -18,7 +18,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x00000000 0x40000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra20-paz00.dts
> b/arch/arm/boot/dts/tegra20-paz00.dts
> index 30436969adc0..ef245291924f 100644
> --- a/arch/arm/boot/dts/tegra20-paz00.dts
> +++ b/arch/arm/boot/dts/tegra20-paz00.dts
> @@ -19,7 +19,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x00000000 0x20000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts
> b/arch/arm/boot/dts/tegra20-seaboard.dts
> index 284aae351ff2..f91441683aad 100644
> --- a/arch/arm/boot/dts/tegra20-seaboard.dts
> +++ b/arch/arm/boot/dts/tegra20-seaboard.dts
> @@ -18,7 +18,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x00000000 0x40000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi
> b/arch/arm/boot/dts/tegra20-tamonten.dtsi
> index 872046d48709..20137fc578b1 100644
> --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
> +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
> @@ -15,7 +15,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x00000000 0x20000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts
> b/arch/arm/boot/dts/tegra20-trimslice.dts
> index d55c6b240a30..9eb26dc15f6b 100644
> --- a/arch/arm/boot/dts/tegra20-trimslice.dts
> +++ b/arch/arm/boot/dts/tegra20-trimslice.dts
> @@ -18,7 +18,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x00000000 0x40000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra20-ventana.dts
> b/arch/arm/boot/dts/tegra20-ventana.dts
> index ee3fbf941e79..f44551e2d9d0 100644
> --- a/arch/arm/boot/dts/tegra20-ventana.dts
> +++ b/arch/arm/boot/dts/tegra20-ventana.dts
> @@ -18,7 +18,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@0 {
> reg = <0x00000000 0x40000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
> index 88dd1afb5877..55581c0e5105 100644
> --- a/arch/arm/boot/dts/tegra20.dtsi
> +++ b/arch/arm/boot/dts/tegra20.dtsi
> @@ -13,8 +13,9 @@
> chosen { };
> aliases { };
>
> - memory {
> + memory@0 {
> device_type = "memory";
> + reg = <0 0>;
> };
>
> iram@40000000 {
> diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
> b/arch/arm/boot/dts/tegra30-apalis.dtsi
> index 6f29cbad6e8a..9465fc592b7b 100644
> --- a/arch/arm/boot/dts/tegra30-apalis.dtsi
> +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
> @@ -10,8 +10,8 @@
> model = "Toradex Apalis T30";
> compatible = "toradex,apalis_t30", "nvidia,tegra30";
>
> - memory {
> - reg = <0 0>;
> + memory@80000000 {
> + reg = <0x80000000 0x40000000>;
> };
>
> pcie@3000 {
> diff --git a/arch/arm/boot/dts/tegra30-beaver.dts
> b/arch/arm/boot/dts/tegra30-beaver.dts
> index ae52a5039506..1434d50438f9 100644
> --- a/arch/arm/boot/dts/tegra30-beaver.dts
> +++ b/arch/arm/boot/dts/tegra30-beaver.dts
> @@ -17,7 +17,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@80000000 {
> reg = <0x80000000 0x7ff00000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi
> b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> index 92a9740c533f..33b73dca16a3 100644
> --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
> +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
> @@ -40,7 +40,7 @@
> stdout-path = "serial0:115200n8";
> };
>
> - memory {
> + memory@80000000 {
> reg = <0x80000000 0x40000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi
> b/arch/arm/boot/dts/tegra30-colibri.dtsi
> index c44d8c40c410..9bf3327665d3 100644
> --- a/arch/arm/boot/dts/tegra30-colibri.dtsi
> +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
> @@ -10,7 +10,7 @@
> model = "Toradex Colibri T30";
> compatible = "toradex,colibri_t30", "nvidia,tegra30";
>
> - memory {
> + memory@80000000 {
> reg = <0x80000000 0x40000000>;
> };
>
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> index 19237c08c166..2b6243b0c6d6 100644
> --- a/arch/arm/boot/dts/tegra30.dtsi
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -14,8 +14,9 @@
> chosen { };
> aliases { };
>
> - memory {
> + memory@80000000 {
> device_type = "memory";
> + reg = <0x80000000 0>;
Nit: for consistency sake, 0x0 :-)
--
Stefan
> };
>
> pcie@3000 {
^ permalink raw reply
* Re: [PATCH v3 04/13] soc: rockchip: power-domain: Fix wrong value when power up pd
From: Heiko Stübner @ 2018-05-23 10:57 UTC (permalink / raw)
To: Elaine Zhang
Cc: robh+dt, mark.rutland, devicetree, rjw, khilman, ulf.hansson,
linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel, wxt,
xxx, xf, huangtao, Finley Xiao
In-Reply-To: <1527058129-10260-5-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:48:40 CEST schrieb Elaine Zhang:
> From: Finley Xiao <finley.xiao@rock-chips.com>
>
> Solve the pd could only ever turn off but never turn them on again,
> If the pd registers have the writemask bits.
>
> Fix up the code error for commit:
> commit 79bb17ce8edb3141339b5882e372d0ec7346217c
> Author: Elaine Zhang <zhangqing@rock-chips.com>
> Date: Fri Dec 23 11:47:52 2016 +0800
>
> soc: rockchip: power-domain: Support domain control in hiword-registers
>
> New Rockchips SoCs may have their power-domain control in registers
> using a writemask-based access scheme (upper 16bit being the write
> mask). So add a DOMAIN_M type and handle this case accordingly.
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>
> Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
I've already applied that patch from v2.
Heiko
^ permalink raw reply
* Re: [PATCH 1/5] Documentation: DT: Add optional 'timeout-sec' property for sp805
From: Robin Murphy @ 2018-05-23 10:57 UTC (permalink / raw)
To: Ray Jui, Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Mark Rutland, Frank Rowand, Catalin Marinas, Will Deacon
Cc: devicetree, linux-watchdog, linux-kernel,
bcm-kernel-feedback-list, linux-arm-kernel
In-Reply-To: <1527014840-21236-2-git-send-email-ray.jui@broadcom.com>
On 22/05/18 19:47, Ray Jui wrote:
> Update the SP805 binding document to add optional 'timeout-sec'
> devicetree property
>
> Signed-off-by: Ray Jui <ray.jui@broadcom.com>
> Reviewed-by: Scott Branden <scott.branden@broadcom.com>
> ---
> Documentation/devicetree/bindings/watchdog/sp805-wdt.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt b/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
> index edc4f0e..f898a86 100644
> --- a/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
> +++ b/Documentation/devicetree/bindings/watchdog/sp805-wdt.txt
> @@ -19,6 +19,8 @@ Required properties:
>
> Optional properties:
> - interrupts : Should specify WDT interrupt number.
> +- timeout-sec : Should specify default WDT timeout in seconds. If unset, the
> + default timeout is 30 seconds
According to the SP805 TRM, the default interval is dependent on the
rate of WDOGCLK, but would typically be a lot longer than that :/
On a related note, anyone have any idea why we seem to have two subtly
different SP805 bindings defined?
Robin.
>
> Examples:
>
>
^ permalink raw reply
* Re: [PATCH v3 03/13] Soc: rockchip: power-domain: add power domain support for rk3036
From: Heiko Stübner @ 2018-05-23 10:57 UTC (permalink / raw)
To: Elaine Zhang
Cc: robh+dt, mark.rutland, devicetree, rjw, khilman, ulf.hansson,
linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel, wxt,
xxx, xf, huangtao
In-Reply-To: <1527058129-10260-4-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:48:39 CEST schrieb Elaine Zhang:
> From: Caesar Wang <wxt@rock-chips.com>
>
> This driver is modified to support RK3036 SoC.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> @@ -102,6 +103,14 @@ struct rockchip_pmu {
> .ack_mask = (ack >= 0) ? BIT(ack) : 0, \
> .active_wakeup = wakeup, \
> }
I've added a blank line here, made "Soc" in the subject lower case and
applied it for 4.18 or 4.19 (not sure yet).
Thanks
Heiko
> +#define DOMAIN_RK3036(req, ack, idle, wakeup) \
> +{ \
> + .req_mask = (req >= 0) ? BIT(req) : 0, \
> + .req_w_mask = (req >= 0) ? BIT(req + 16) : 0, \
> + .ack_mask = (ack >= 0) ? BIT(ack) : 0, \
> + .idle_mask = (idle >= 0) ? BIT(idle) : 0, \
> + .active_wakeup = wakeup, \
> +}
^ permalink raw reply
* Re: [PATCH v3 02/13] dt-bindings: add binding for rk3036 power domains
From: Heiko Stübner @ 2018-05-23 10:56 UTC (permalink / raw)
To: Elaine Zhang
Cc: robh+dt, mark.rutland, devicetree, rjw, khilman, ulf.hansson,
linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel, wxt,
xxx, xf, huangtao
In-Reply-To: <1527058129-10260-3-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:48:38 CEST schrieb Elaine Zhang:
> From: Caesar Wang <wxt@rock-chips.com>
>
> Add binding documentation for the power domains
> found on Rockchip RK3036 SoCs.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> Acked-by: Rob Herring <robh@kernel.org>
applied for 4.18 or 4.19 (not sure yet).
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH v3 01/13] dt-bindings: power: add RK3036 SoCs header for power-domain
From: Heiko Stübner @ 2018-05-23 10:55 UTC (permalink / raw)
To: Elaine Zhang
Cc: robh+dt, mark.rutland, devicetree, rjw, khilman, ulf.hansson,
linux-pm, linux-arm-kernel, linux-rockchip, linux-kernel, wxt,
xxx, xf, huangtao
In-Reply-To: <1527058129-10260-2-git-send-email-zhangqing@rock-chips.com>
Am Mittwoch, 23. Mai 2018, 08:48:37 CEST schrieb Elaine Zhang:
> From: Caesar Wang <wxt@rock-chips.com>
>
> According to a description from TRM, add all the power domains.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
applied for 4.18 or 4.19 (not sure yet) after adding
Rob's Review-tag from v2.
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH v6 1/4] ARM: dts: tegra: Remove usage of deprecated skeleton.dtsi
From: Stefan Agner @ 2018-05-23 10:46 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Mark Rutland, Thierry Reding, Jonathan Hunter,
devicetree, linux-tegra, linux-kernel, Marcel Ziswiler,
Lucas Stach
In-Reply-To: <1527069406-6359-1-git-send-email-krzk@kernel.org>
On 23.05.2018 11:56, Krzysztof Kozlowski wrote:
> Remove the usage of skeleton.dtsi because it was deprecated since commit
> 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated").
> It also allows later to fix DTC warnings for missing unit name in
> /memory nodes.
>
> The /chosen and /aliases nodes are added only when dependent DTSes do
> not define them. Compiled DTB is the same as before this commit.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Hm I see, you cannot add unit address here because the board level
device tree do not have it yet... That makes the split indeed a bit less
appealing.
Anyway, now we have it, and I think it is still nice to have a separate
change.
Reviewed-by: Stefan Agner <stefan@agner.ch>
--
Stefan
>
> ---
>
> Changes since v5:
> 1. New patch, split with skeleton.dtsi removal (suggested by Stefan).
> ---
> arch/arm/boot/dts/tegra114.dtsi | 8 ++++++--
> arch/arm/boot/dts/tegra124.dtsi | 6 ++++--
> arch/arm/boot/dts/tegra20.dtsi | 11 +++++++++--
> arch/arm/boot/dts/tegra30-apalis.dtsi | 4 ++++
> arch/arm/boot/dts/tegra30.dtsi | 11 +++++++++--
> 5 files changed, 32 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
> index 0e4a13295d8a..27ef515e5640 100644
> --- a/arch/arm/boot/dts/tegra114.dtsi
> +++ b/arch/arm/boot/dts/tegra114.dtsi
> @@ -5,11 +5,15 @@
> #include <dt-bindings/pinctrl/pinctrl-tegra.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>
> -#include "skeleton.dtsi"
> -
> / {
> compatible = "nvidia,tegra114";
> interrupt-parent = <&lic>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + memory {
> + device_type = "memory";
> + };
>
> host1x@50000000 {
> compatible = "nvidia,tegra114-host1x", "simple-bus";
> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> index 174092bfac90..951feea784af 100644
> --- a/arch/arm/boot/dts/tegra124.dtsi
> +++ b/arch/arm/boot/dts/tegra124.dtsi
> @@ -7,14 +7,16 @@
> #include <dt-bindings/reset/tegra124-car.h>
> #include <dt-bindings/thermal/tegra124-soctherm.h>
>
> -#include "skeleton.dtsi"
> -
> / {
> compatible = "nvidia,tegra124";
> interrupt-parent = <&lic>;
> #address-cells = <2>;
> #size-cells = <2>;
>
> + memory {
> + device_type = "memory";
> + };
> +
> pcie@1003000 {
> compatible = "nvidia,tegra124-pcie";
> device_type = "pci";
> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
> index 0a7136462a1a..88dd1afb5877 100644
> --- a/arch/arm/boot/dts/tegra20.dtsi
> +++ b/arch/arm/boot/dts/tegra20.dtsi
> @@ -4,11 +4,18 @@
> #include <dt-bindings/pinctrl/pinctrl-tegra.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>
> -#include "skeleton.dtsi"
> -
> / {
> compatible = "nvidia,tegra20";
> interrupt-parent = <&lic>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen { };
> + aliases { };
> +
> + memory {
> + device_type = "memory";
> + };
>
> iram@40000000 {
> compatible = "mmio-sram";
> diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi
> b/arch/arm/boot/dts/tegra30-apalis.dtsi
> index d1d21ec2a844..6f29cbad6e8a 100644
> --- a/arch/arm/boot/dts/tegra30-apalis.dtsi
> +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
> @@ -10,6 +10,10 @@
> model = "Toradex Apalis T30";
> compatible = "toradex,apalis_t30", "nvidia,tegra30";
>
> + memory {
> + reg = <0 0>;
> + };
> +
> pcie@3000 {
> avdd-pexa-supply = <&vdd2_reg>;
> vdd-pexa-supply = <&vdd2_reg>;
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> index a110cf84d85f..19237c08c166 100644
> --- a/arch/arm/boot/dts/tegra30.dtsi
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -5,11 +5,18 @@
> #include <dt-bindings/pinctrl/pinctrl-tegra.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>
> -#include "skeleton.dtsi"
> -
> / {
> compatible = "nvidia,tegra30";
> interrupt-parent = <&lic>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen { };
> + aliases { };
> +
> + memory {
> + device_type = "memory";
> + };
>
> pcie@3000 {
> compatible = "nvidia,tegra30-pcie";
^ permalink raw reply
* Re: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver
From: Sudeep Holla @ 2018-05-23 10:39 UTC (permalink / raw)
To: Ilia Lin, vireshk, nm, sboyd, robh, mark.rutland, rjw, linux-pm,
devicetree, linux-kernel
Cc: Sudeep Holla
In-Reply-To: <1527068454-28921-2-git-send-email-ilialin@codeaurora.org>
On 23/05/18 10:40, Ilia Lin wrote:
> In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
> the CPU frequency subset and voltage value of each OPP varies
> based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
> defines the voltage and frequency value based on the msm-id in SMEM
> and speedbin blown in the efuse combination.
> The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
> to provide the OPP framework with required information.
> This is used to determine the voltage and frequency value for each OPP of
> operating-points-v2 table when it is parsed by the OPP framework.
>
> Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
[...]
> + pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
> + if (!IS_ERR(pdev))
> + return 0;
> +
> + ret = PTR_ERR(pdev);
> + dev_err(cpu_dev, "Failed to register platform device\n");
> +
> +free_opp:
> + for_each_possible_cpu(cpu) {
> + if (IS_ERR_OR_NULL(opp_tables[cpu]))
> + break;
> + dev_pm_opp_put_supported_hw(opp_tables[cpu]);
> + }
> +free_np:
> + of_node_put(np);
> +
> + return ret;
> +}
> +late_initcall(qcom_cpufreq_kryo_driver_init);
Any particular reason why this *has* to be late initcall ?
Please change it to module_initcall otherwise.
Also address the of_node comments from Viresh.
Otherwise, it looks good.
--
Regards,
Sudeep
^ permalink raw reply
* Re: [PATCH v3] arm64: allwinner: a64: Add Amarula A64-Relic initial support
From: Jagan Teki @ 2018-05-23 10:27 UTC (permalink / raw)
To: Maxime Ripard
Cc: Chen-Yu Tsai, Michael Trimarchi, Icenowy Zheng, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
In-Reply-To: <20180523081830.4ly6sj34reabbttn@flea>
On Wed, May 23, 2018 at 1:48 PM, Maxime Ripard
<maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> wrote:
> On Wed, May 23, 2018 at 11:44:56AM +0530, Jagan Teki wrote:
>> On Tue, May 22, 2018 at 8:00 PM, Maxime Ripard
>> <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> wrote:
>> > On Tue, May 22, 2018 at 06:52:28PM +0530, Jagan Teki wrote:
>> >> Amarula A64-Relic is Allwinner A64 based IoT device, which support
>> >> - Allwinner A64 Cortex-A53
>> >> - Mali-400MP2 GPU
>> >> - AXP803 PMIC
>> >> - 1GB DDR3 RAM
>> >> - 8GB eMMC
>> >> - AP6330 Wifi/BLE
>> >> - MIPI-DSI
>> >> - CSI: OV5640 sensor
>> >> - USB OTG
>> >
>> > You claim that this is doing OTG...
>> >
>> > [..]
>> >
>> >> +&usb_otg {
>> >> + dr_mode = "peripheral";
>> >> + status = "okay";
>> >> +};
>> >
>> > ... and yet you're setting it as peripheral...
>>
>> Though it claims OTG, board doesn't have any USB ports to operate(not
>> even Mini-AB) the only way to use the board as peripheral to transfer
>> images from host.
>
> I'm not sure what you mean here. If there's no USB connector, why do
> you even enable it?
I'm saying there is no host port on board. Board has connector
header[1] comes with few pins includes USB D+, D-, ID, VBUS, GROUND,
UART0 TX, RX etc. we have to connect wires to these pins to make
pluggable USB to host pc. and here USB pins used for transferring data
from host pc to target board like in peripheral mode.
Hope you understand.
[1] https://www.digikey.com/product-detail/en/molex-llc/5016451420/WM6074-ND/1787775
Jagan.
--
Jagan Teki
Senior Linux Kernel Engineer | Amarula Solutions
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
^ permalink raw reply
* Re: [PATCH v10 1/2] cpufreq: Add Kryo CPU scaling driver
From: Viresh Kumar @ 2018-05-23 10:03 UTC (permalink / raw)
To: Ilia Lin
Cc: vireshk, nm, sboyd, robh, mark.rutland, rjw, linux-pm, devicetree,
linux-kernel
In-Reply-To: <1527068454-28921-2-git-send-email-ilialin@codeaurora.org>
On 23-05-18, 12:40, Ilia Lin wrote:
> In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
> the CPU frequency subset and voltage value of each OPP varies
> based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
> defines the voltage and frequency value based on the msm-id in SMEM
> and speedbin blown in the efuse combination.
> The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
> to provide the OPP framework with required information.
> This is used to determine the voltage and frequency value for each OPP of
> operating-points-v2 table when it is parsed by the OPP framework.
>
> Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Well I gave you an Ack and you should have kept it here :(
> +static int __init qcom_cpufreq_kryo_driver_init(void)
> +{
> + struct opp_table *opp_tables[NR_CPUS] = {0};
> + enum _msm8996_version msm8996_version;
> + struct nvmem_cell *speedbin_nvmem;
> + struct platform_device *pdev;
> + struct device_node *np;
> + struct device *cpu_dev;
> + unsigned cpu;
> + u8 *speedbin;
> + u32 versions;
> + size_t len;
> + int ret;
> +
> + cpu_dev = get_cpu_device(0);
> + if (NULL == cpu_dev)
> + return -ENODEV;
> +
> + msm8996_version = qcom_cpufreq_kryo_get_msm_id();
> + if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
> + dev_err(cpu_dev, "Not Snapdragon 820/821!");
> + return -ENODEV;
> + }
> +
> + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
> + if (IS_ERR(np))
> + return PTR_ERR(np);
> +
> + if (!of_device_is_compatible(np, "operating-points-v2-kryo-cpu")) {
> + ret = -ENOENT;
> + goto free_np;
As Russell pointed out, drop this goto here and write:
of_node_put(np);
return -ENOENT;
}
> + }
> +
> + speedbin_nvmem = of_nvmem_cell_get(np, NULL);
And do the same here unconditionally as you don't need to use np
anymore, i.e.
of_node_put(np);
> + if (IS_ERR(speedbin_nvmem)) {
> + ret = PTR_ERR(speedbin_nvmem);
> + dev_err(cpu_dev, "Could not get nvmem cell: %d\n", ret);
> + goto free_np;
> + }
> +
> + speedbin = nvmem_cell_read(speedbin_nvmem, &len);
> + nvmem_cell_put(speedbin_nvmem);
> +
> + switch (msm8996_version) {
> + case MSM8996_V3:
> + versions = 1 << (unsigned int)(*speedbin);
> + break;
> + case MSM8996_SG:
> + versions = 1 << ((unsigned int)(*speedbin) + 4);
> + break;
> + default:
> + BUG();
> + break;
> + }
> +
> + for_each_possible_cpu(cpu) {
> + cpu_dev = get_cpu_device(cpu);
> + if (NULL == cpu_dev) {
> + ret = -ENODEV;
> + goto free_opp;
> + }
> +
> + opp_tables[cpu] = dev_pm_opp_set_supported_hw(cpu_dev,
> + &versions, 1);
> + if (IS_ERR(opp_tables[cpu])) {
> + ret = PTR_ERR(opp_tables[cpu]);
> + dev_err(cpu_dev, "Failed to set supported hardware\n");
> + goto free_opp;
> + }
> + }
> +
> + pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
> + if (!IS_ERR(pdev))
> + return 0;
> +
> + ret = PTR_ERR(pdev);
> + dev_err(cpu_dev, "Failed to register platform device\n");
> +
> +free_opp:
> + for_each_possible_cpu(cpu) {
> + if (IS_ERR_OR_NULL(opp_tables[cpu]))
> + break;
> + dev_pm_opp_put_supported_hw(opp_tables[cpu]);
> + }
> +free_np:
> + of_node_put(np);
And then you can remove the label and above statement.
> +
> + return ret;
> +}
> +late_initcall(qcom_cpufreq_kryo_driver_init);
> +
> +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Kryo CPUfreq driver");
> +MODULE_LICENSE("GPL v2");
> --
> 1.9.1
--
viresh
^ permalink raw reply
* Re: [PATCH v3 00/13] add power domain support for Rockchip Socs
From: Ulf Hansson @ 2018-05-23 10:02 UTC (permalink / raw)
To: Elaine Zhang
Cc: Heiko Stuebner, Rob Herring, Mark Rutland, devicetree,
Rafael J. Wysocki, Kevin Hilman, Linux PM, Linux ARM,
open list:ARM/Rockchip SoC..., Linux Kernel Mailing List,
Caesar Wang, xxx, Feng Xiao, Tao Huang
In-Reply-To: <1527058129-10260-1-git-send-email-zhangqing@rock-chips.com>
On 23 May 2018 at 08:48, Elaine Zhang <zhangqing@rock-chips.com> wrote:
> add power domain support for RK3036/RK3128/RK3228/PX30 Soc.
> fix up the wrong value when set power domain up.
>
> Change in V2:
> Fix up the commit message description and Assign author.
>
> Change in V3:
> [PATCH 01/13]: The Copyright description use SPDX tag instead.
> [PATCH 05/13]: The Copyright description use SPDX tag instead.
> [PATCH 08/13]: The Copyright description use SPDX tag instead.
> [PATCH 11/13]: The Copyright description use SPDX tag instead.
>
> Caesar Wang (3):
> dt-bindings: power: add RK3036 SoCs header for power-domain
> dt-bindings: add binding for rk3036 power domains
> Soc: rockchip: power-domain: add power domain support for rk3036
>
> Elaine Zhang (6):
> dt-bindings: power: add RK3128 SoCs header for power-domain
> dt-bindings: add binding for rk3128 power domains
> soc: rockchip: power-domain: add power domain support for rk3128
> dt-bindings: power: add RK3228 SoCs header for power-domain
> dt-bindings: add binding for rk3228 power domains
> soc: rockchip: power-domain: add power domain support for rk3228
>
> Finley Xiao (4):
> soc: rockchip: power-domain: Fix wrong value when power up pd
> dt-bindings: power: add PX30 SoCs header for power-domain
> dt-bindings: add binding for px30 power domains
> soc: rockchip: power-domain: add power domain support for px30
>
> .../bindings/soc/rockchip/power_domain.txt | 12 +++
> drivers/soc/rockchip/pm_domains.c | 116 ++++++++++++++++++++-
> include/dt-bindings/power/px30-power.h | 27 +++++
> include/dt-bindings/power/rk3036-power.h | 13 +++
> include/dt-bindings/power/rk3128-power.h | 14 +++
> include/dt-bindings/power/rk3228-power.h | 21 ++++
> 6 files changed, 202 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/power/px30-power.h
> create mode 100644 include/dt-bindings/power/rk3036-power.h
> create mode 100644 include/dt-bindings/power/rk3128-power.h
> create mode 100644 include/dt-bindings/power/rk3228-power.h
>
> --
> 1.9.1
>
>
Seems like the changes in v3 is very small, so feel free to add, for the series:
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Kind regards
Uffe
^ permalink raw reply
* Re: [PATCH] cpufreq: Add Kryo CPU scaling driver
From: Viresh Kumar @ 2018-05-23 9:59 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Ilia Lin, rjw, sudeep.holla, linux-clk, devicetree, linux-kernel,
linux-pm, linux-arm-msm, linux-soc, linux-arm-kernel
In-Reply-To: <20180523094033.GW17671@n2100.armlinux.org.uk>
On 23-05-18, 10:40, Russell King - ARM Linux wrote:
> On Wed, May 23, 2018 at 12:05:24PM +0300, Ilia Lin wrote:
> > + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
> > + if (IS_ERR(np))
> > + return PTR_ERR(np);
> ...
> > +
> > + pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
> > + if (!IS_ERR(pdev))
>
> Do you need to hold a reference to `np' here?
I am starting to feel bad for Ilia now. The problem is that there was
a lot of stuff wrong with the patch and even with so many reviewers it
wasn't easy to notice all the problems it had.
But you are right, this reference needs to be dropped.
--
viresh
^ permalink raw reply
* [PATCH v6 4/4] ARM: dts: tegra: Work safely with 256 MB Colibri-T20 modules
From: Krzysztof Kozlowski @ 2018-05-23 9:56 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Thierry Reding, Jonathan Hunter,
devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Stefan Agner, Lucas Stach, Krzysztof Kozlowski
In-Reply-To: <1527069406-6359-1-git-send-email-krzk@kernel.org>
Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512 MB RAM
(with 1024 MB NAND) flavors. Both of them will use the same DTSI
expecting the bootloader to do the fixup of /memory node. However in
case it does not happen, let's stay on safe side by limiting the memory
to 256 MB for both versions of Colibri-T20.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
RFT:
Not tested on 512 MB module as I have only the 256 MB one.
Changes since v5:
1. Add "colibri" suffix to iris DTS (suggested by Stefan).
Changes since v4:
1. Drop the 512 suffix from file names (suggested by Stefan).
Changes since v3:
1. Reduce the memory in existing DTSI instead of creating a new one
(suggested by Marcel).
Changes since v2:
1. Do not add new compatible but use everywhere existing
"toradex,colibri_t20-512" (suggested by Rob).
Changes since v1:
1. Fix memory size in tegra20-colibri-256.dtsi (was working fine because
my bootloader uses mem= argument).
---
arch/arm/boot/dts/Makefile | 2 +-
.../boot/dts/{tegra20-iris-512.dts => tegra20-colibri-iris.dts} | 4 ++--
.../boot/dts/{tegra20-colibri-512.dtsi => tegra20-colibri.dtsi} | 9 +++++++--
3 files changed, 10 insertions(+), 5 deletions(-)
rename arch/arm/boot/dts/{tegra20-iris-512.dts => tegra20-colibri-iris.dts} (95%)
rename arch/arm/boot/dts/{tegra20-colibri-512.dtsi => tegra20-colibri.dtsi} (98%)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index ec2024ea8b1e..1c8bb55c0948 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1030,7 +1030,7 @@ dtb-$(CONFIG_ARCH_TANGO) += \
tango4-vantage-1172.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
tegra20-harmony.dtb \
- tegra20-iris-512.dtb \
+ tegra20-colibri-iris.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
tegra20-plutux.dtb \
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-colibri-iris.dts
similarity index 95%
rename from arch/arm/boot/dts/tegra20-iris-512.dts
rename to arch/arm/boot/dts/tegra20-colibri-iris.dts
index 40126388946d..57f16c0e9917 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-colibri-iris.dts
@@ -1,10 +1,10 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
-#include "tegra20-colibri-512.dtsi"
+#include "tegra20-colibri.dtsi"
/ {
- model = "Toradex Colibri T20 512MB on Iris";
+ model = "Toradex Colibri T20 256/512 MB on Iris";
compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20";
aliases {
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
similarity index 98%
rename from arch/arm/boot/dts/tegra20-colibri-512.dtsi
rename to arch/arm/boot/dts/tegra20-colibri.dtsi
index 5623ff8d128c..dc06b23183e1 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -2,7 +2,7 @@
#include "tegra20.dtsi"
/ {
- model = "Toradex Colibri T20 512MB";
+ model = "Toradex Colibri T20 256/512 MB";
compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
aliases {
@@ -11,7 +11,12 @@
};
memory@0 {
- reg = <0x00000000 0x20000000>;
+ /*
+ * Set memory to 256 MB to be safe as this could be used on
+ * 256 or 512 MB module. It is expected from bootloader
+ * to fix this up for 512 MB version.
+ */
+ reg = <0x00000000 0x10000000>;
};
host1x@50000000 {
--
2.7.4
^ permalink raw reply related
* [PATCH v6 3/4] ARM: dts: tegra: Fix unit_address_vs_reg and avoid_unnecessary_addr_size DTC warnings
From: Krzysztof Kozlowski @ 2018-05-23 9:56 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Thierry Reding, Jonathan Hunter,
devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Stefan Agner, Lucas Stach, Krzysztof Kozlowski
In-Reply-To: <1527069406-6359-1-git-send-email-krzk@kernel.org>
Remove unneeded address/size cells properties and unit addresses to fix
DTC warnings like:
arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (unit_address_vs_reg):
/i2c@7000d000/stmpe811@41/stmpe_touchscreen@0: node has a unit name, but no reg property
arch/arm/boot/dts/tegra30-apalis-eval.dtb: Warning (avoid_unnecessary_addr_size):
/i2c@7000d000/stmpe811@41: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
---
Changes since v5:
1. Add Stefan's reviewed-by tag.
Changes since v4:
1. None
---
arch/arm/boot/dts/tegra30-apalis.dtsi | 4 +---
arch/arm/boot/dts/tegra30-beaver.dts | 3 ---
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 --
3 files changed, 1 insertion(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 9465fc592b7b..d1a2c0a253c8 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -589,8 +589,6 @@
/* STMPE811 touch screen controller */
stmpe811@41 {
compatible = "st,stmpe811";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0x41>;
interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
@@ -599,7 +597,7 @@
blocks = <0x5>;
irq-trigger = <0x1>;
- stmpe_touchscreen@0 {
+ stmpe_touchscreen {
compatible = "st,stmpe-ts";
/* 3.25 MHz ADC clock speed */
st,adc-freq = <1>;
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 1434d50438f9..b0d40ac8ac6e 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -1790,9 +1790,6 @@
vccio-supply = <&vdd_5v_in_reg>;
regulators {
- #address-cells = <1>;
- #size-cells = <0>;
-
vdd1_reg: vdd1 {
regulator-name = "vddio_ddr_1v2";
regulator-min-microvolt = <1200000>;
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index 9bf3327665d3..526ed71cf7a3 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -351,8 +351,6 @@
/* STMPE811 touch screen controller */
stmpe811@41 {
compatible = "st,stmpe811";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0x41>;
interrupts = <TEGRA_GPIO(V, 0) IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
--
2.7.4
^ permalink raw reply related
* [PATCH v6 2/4] ARM: dts: tegra: Fix unit_address_vs_reg DTC warnings for /memory
From: Krzysztof Kozlowski @ 2018-05-23 9:56 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Thierry Reding, Jonathan Hunter,
devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Stefan Agner, Lucas Stach, Krzysztof Kozlowski
In-Reply-To: <1527069406-6359-1-git-send-email-krzk@kernel.org>
Add a generic /memory node in each Tegra DTSI (with empty reg property,
to be overidden by each DTS) and set proper unit address for /memory
nodes to fix the DTC warnings:
arch/arm/boot/dts/tegra20-harmony.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name
The DTB after the change is the same as before except adding
unit-address to /memory node.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Changes since v5:
1. Split with skeleton.dtsi removal (suggested by Stefan).
Changes since v4:
1. None
---
arch/arm/boot/dts/tegra114-dalmore.dts | 2 +-
arch/arm/boot/dts/tegra114-roth.dts | 2 +-
arch/arm/boot/dts/tegra114-tn7.dts | 2 +-
arch/arm/boot/dts/tegra114.dtsi | 3 ++-
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +-
arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +-
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +-
arch/arm/boot/dts/tegra124-nyan.dtsi | 2 +-
arch/arm/boot/dts/tegra124-venice2.dts | 2 +-
arch/arm/boot/dts/tegra124.dtsi | 3 ++-
arch/arm/boot/dts/tegra20-colibri-512.dtsi | 2 +-
arch/arm/boot/dts/tegra20-harmony.dts | 2 +-
arch/arm/boot/dts/tegra20-paz00.dts | 2 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 2 +-
arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +-
arch/arm/boot/dts/tegra20-trimslice.dts | 2 +-
arch/arm/boot/dts/tegra20-ventana.dts | 2 +-
arch/arm/boot/dts/tegra20.dtsi | 3 ++-
arch/arm/boot/dts/tegra30-apalis.dtsi | 4 ++--
arch/arm/boot/dts/tegra30-beaver.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
arch/arm/boot/dts/tegra30.dtsi | 3 ++-
23 files changed, 28 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index eafff16765b4..1788556b4977 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -23,7 +23,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
reg = <0x80000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts
index 7ed7370ee67a..3d3835591cd2 100644
--- a/arch/arm/boot/dts/tegra114-roth.dts
+++ b/arch/arm/boot/dts/tegra114-roth.dts
@@ -28,7 +28,7 @@
};
};
- memory {
+ memory@80000000 {
/* memory >= 0x79600000 is reserved for firmware usage */
reg = <0x80000000 0x79600000>;
};
diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts
index 7fc4a8b31e45..bfdd1bf61816 100644
--- a/arch/arm/boot/dts/tegra114-tn7.dts
+++ b/arch/arm/boot/dts/tegra114-tn7.dts
@@ -28,7 +28,7 @@
};
};
- memory {
+ memory@80000000 {
/* memory >= 0x37e00000 is reserved for firmware usage */
reg = <0x80000000 0x37e00000>;
};
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 27ef515e5640..aff4b8e115bc 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -11,8 +11,9 @@
#address-cells = <1>;
#size-cells = <1>;
- memory {
+ memory@80000000 {
device_type = "memory";
+ reg = <0x80000000 0>;
};
host1x@50000000 {
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
index bb67edb016c5..6a7f45651d38 100644
--- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
@@ -15,7 +15,7 @@
compatible = "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
"nvidia,tegra124";
- memory {
+ memory@0 {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 65a2161b9b8e..e4625abd0a8a 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -50,7 +50,7 @@
model = "Toradex Apalis TK1";
compatible = "toradex,apalis-tk1", "nvidia,tegra124";
- memory {
+ memory@0 {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index 6dbcf84dafbc..e23b1159e8fd 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -24,7 +24,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index 3609367037a6..f45ac668d88c 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -13,7 +13,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 89bcc178994d..44492b48e165 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 951feea784af..ad9c9cd6fa8a 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -13,8 +13,9 @@
#address-cells = <2>;
#size-cells = <2>;
- memory {
+ memory@0 {
device_type = "memory";
+ reg = <0 0>;
};
pcie@1003000 {
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index 5c202b3e3bb1..5623ff8d128c 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -10,7 +10,7 @@
rtc1 = "/rtc@7000e000";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x20000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 628a55a9318b..1d96d92b72a7 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 30436969adc0..ef245291924f 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -19,7 +19,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x20000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 284aae351ff2..f91441683aad 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 872046d48709..20137fc578b1 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -15,7 +15,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x20000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index d55c6b240a30..9eb26dc15f6b 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index ee3fbf941e79..f44551e2d9d0 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@0 {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 88dd1afb5877..55581c0e5105 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -13,8 +13,9 @@
chosen { };
aliases { };
- memory {
+ memory@0 {
device_type = "memory";
+ reg = <0 0>;
};
iram@40000000 {
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 6f29cbad6e8a..9465fc592b7b 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -10,8 +10,8 @@
model = "Toradex Apalis T30";
compatible = "toradex,apalis_t30", "nvidia,tegra30";
- memory {
- reg = <0 0>;
+ memory@80000000 {
+ reg = <0x80000000 0x40000000>;
};
pcie@3000 {
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index ae52a5039506..1434d50438f9 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -17,7 +17,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
reg = <0x80000000 0x7ff00000>;
};
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 92a9740c533f..33b73dca16a3 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -40,7 +40,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
reg = <0x80000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index c44d8c40c410..9bf3327665d3 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -10,7 +10,7 @@
model = "Toradex Colibri T30";
compatible = "toradex,colibri_t30", "nvidia,tegra30";
- memory {
+ memory@80000000 {
reg = <0x80000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 19237c08c166..2b6243b0c6d6 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -14,8 +14,9 @@
chosen { };
aliases { };
- memory {
+ memory@80000000 {
device_type = "memory";
+ reg = <0x80000000 0>;
};
pcie@3000 {
--
2.7.4
^ permalink raw reply related
* [PATCH v6 1/4] ARM: dts: tegra: Remove usage of deprecated skeleton.dtsi
From: Krzysztof Kozlowski @ 2018-05-23 9:56 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Thierry Reding, Jonathan Hunter,
devicetree, linux-tegra, linux-kernel
Cc: Marcel Ziswiler, Stefan Agner, Lucas Stach, Krzysztof Kozlowski
Remove the usage of skeleton.dtsi because it was deprecated since commit
9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated").
It also allows later to fix DTC warnings for missing unit name in
/memory nodes.
The /chosen and /aliases nodes are added only when dependent DTSes do
not define them. Compiled DTB is the same as before this commit.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Changes since v5:
1. New patch, split with skeleton.dtsi removal (suggested by Stefan).
---
arch/arm/boot/dts/tegra114.dtsi | 8 ++++++--
arch/arm/boot/dts/tegra124.dtsi | 6 ++++--
arch/arm/boot/dts/tegra20.dtsi | 11 +++++++++--
arch/arm/boot/dts/tegra30-apalis.dtsi | 4 ++++
arch/arm/boot/dts/tegra30.dtsi | 11 +++++++++--
5 files changed, 32 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 0e4a13295d8a..27ef515e5640 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -5,11 +5,15 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include "skeleton.dtsi"
-
/ {
compatible = "nvidia,tegra114";
interrupt-parent = <&lic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory {
+ device_type = "memory";
+ };
host1x@50000000 {
compatible = "nvidia,tegra114-host1x", "simple-bus";
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 174092bfac90..951feea784af 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -7,14 +7,16 @@
#include <dt-bindings/reset/tegra124-car.h>
#include <dt-bindings/thermal/tegra124-soctherm.h>
-#include "skeleton.dtsi"
-
/ {
compatible = "nvidia,tegra124";
interrupt-parent = <&lic>;
#address-cells = <2>;
#size-cells = <2>;
+ memory {
+ device_type = "memory";
+ };
+
pcie@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 0a7136462a1a..88dd1afb5877 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -4,11 +4,18 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include "skeleton.dtsi"
-
/ {
compatible = "nvidia,tegra20";
interrupt-parent = <&lic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen { };
+ aliases { };
+
+ memory {
+ device_type = "memory";
+ };
iram@40000000 {
compatible = "mmio-sram";
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index d1d21ec2a844..6f29cbad6e8a 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -10,6 +10,10 @@
model = "Toradex Apalis T30";
compatible = "toradex,apalis_t30", "nvidia,tegra30";
+ memory {
+ reg = <0 0>;
+ };
+
pcie@3000 {
avdd-pexa-supply = <&vdd2_reg>;
vdd-pexa-supply = <&vdd2_reg>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index a110cf84d85f..19237c08c166 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -5,11 +5,18 @@
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include "skeleton.dtsi"
-
/ {
compatible = "nvidia,tegra30";
interrupt-parent = <&lic>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen { };
+ aliases { };
+
+ memory {
+ device_type = "memory";
+ };
pcie@3000 {
compatible = "nvidia,tegra30-pcie";
--
2.7.4
^ permalink raw reply related
* [PATCH 0/4] i2c: imx: Fix and enable DMA support for LS1021A
From: Esben Haabendal @ 2018-05-23 9:56 UTC (permalink / raw)
To: linux-i2c, devicetree; +Cc: Esben Haabendal
From: Esben Haabendal <eha@deif.com>
This patch series fixes two race conditions and minor issues with tracking
the stopped state when something goes wrong.
With that in place, DMA support works with NXP LS1021A, so it is enabled in
the last patch.
Esben Haabendal (4):
i2c: imx: Fix reinit_completion() use
i2c: imx: Fix race condition in dma read
i2c: imx: Simplify stopped state tracking
arm: dts: ls1021a: Enable I2C DMA support
arch/arm/boot/dts/ls1021a.dtsi | 6 ++++++
drivers/i2c/busses/i2c-imx.c | 23 ++++++++++++-----------
2 files changed, 18 insertions(+), 11 deletions(-)
--
2.17.0
^ permalink raw reply
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