* Re: [PATCH v3 1/5] ARM: dts: rockchip: move rk3288-veryon display settings into a separate file
From: Heiko Stuebner @ 2019-07-25 20:45 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Rob Herring, Mark Rutland, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
In-Reply-To: <20190725162642.250709-2-mka@chromium.org>
Am Donnerstag, 25. Juli 2019, 18:26:38 CEST schrieb Matthias Kaehlcke:
> The chromebook .dtsi file contains common settings for veyron
> Chromebooks with eDP displays. Some veyron devices with a display
> aren't Chromebooks (e.g. 'tiger' aka 'AOpen Chromebase Mini'), move
> display related bits from the chromebook .dtsi into a separate file
> to avoid redundant DT settings.
>
> The new file is included from the chromebook .dtsi and can be
> included by non-Chromebook devices with a display.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
applied for 5.4
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH v3 2/5] ARM: dts: rockchip: consolidate veyron panel and backlight settings
From: Heiko Stuebner @ 2019-07-25 20:46 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Rob Herring, Mark Rutland, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Douglas Anderson
In-Reply-To: <20190725162642.250709-3-mka@chromium.org>
Am Donnerstag, 25. Juli 2019, 18:26:39 CEST schrieb Matthias Kaehlcke:
> veyron jaq, jerry, minnie and speedy have mostly redundant regulator
> and pinctrl configurations for the panel/backlight. Consolidate these
> pieces in the eDP .dtsi.
>
> Also change the default power supply for the panel to
> 'panel_regulator', instead of overriding it in all the board files.
> pinky is the only device that uses 'vcc33_lcd' (the prior default),
> so overwrite it in this case. pinky doesn't have a complete display
> configuration, to keep things as they were delete the common nodes
> that didn't exist previously in pinky's board file.
>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
applied for 5.4
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH v3 3/5] dt-bindings: ARM: dts: rockchip: Add bindings for rk3288-veyron-{fievel,tiger}
From: Heiko Stuebner @ 2019-07-25 20:51 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Rob Herring, Mark Rutland, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
In-Reply-To: <20190725162642.250709-4-mka@chromium.org>
Am Donnerstag, 25. Juli 2019, 18:26:40 CEST schrieb Matthias Kaehlcke:
> Fievel is a Chromebox and Tiger a Chromebase with a 10" display and
> touchscreen. Tiger and Fievel are based on the same board.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
applied for 5.4
^ permalink raw reply
* Re: [PATCH v3 4/5] ARM: dts: rockchip: add veyron-fievel board
From: Heiko Stuebner @ 2019-07-25 20:55 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Mark Rutland, devicetree, linux-kernel, linux-rockchip,
Rob Herring, linux-arm-kernel
In-Reply-To: <20190725162642.250709-5-mka@chromium.org>
Am Donnerstag, 25. Juli 2019, 18:26:41 CEST schrieb Matthias Kaehlcke:
> Also known as AOpen Chromebox Mini.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> ---
> Changes in v3:
> - patch added to the series
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/rk3288-veyron-fievel.dts | 299 +++++++++++++++++++++
> 2 files changed, 300 insertions(+)
> create mode 100644 arch/arm/boot/dts/rk3288-veyron-fievel.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 9159fa2cea90..9fd1e075c624 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -919,6 +919,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
> rk3288-tinker.dtb \
> rk3288-tinker-s.dtb \
> rk3288-veyron-brain.dtb \
> + rk3288-veyron-fievel.dtb \
> rk3288-veyron-jaq.dtb \
> rk3288-veyron-jerry.dtb \
> rk3288-veyron-mickey.dtb \
> diff --git a/arch/arm/boot/dts/rk3288-veyron-fievel.dts b/arch/arm/boot/dts/rk3288-veyron-fievel.dts
> new file mode 100644
> index 000000000000..a9716fc3f50a
> --- /dev/null
> +++ b/arch/arm/boot/dts/rk3288-veyron-fievel.dts
> @@ -0,0 +1,299 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Google Veyron Fievel Rev 0+ board device tree source
> + *
> + * Copyright 2016 Google, Inc
> + */
> +
> +/dts-v1/;
> +#include "rk3288-veyron.dtsi"
> +#include "rk3288-veyron-analog-audio.dtsi"
> +
> +/ {
> + model = "Google Fievel";
> + compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
> + "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
> + "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
> + "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
> + "google,veyron-fievel-rev0", "google,veyron-fievel",
> + "google,veyron", "rockchip,rk3288";
> +
> + /delete-node/ bt-activity;
> +
> + ext_gmac: external-gmac-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <125000000>;
> + clock-output-names = "ext_gmac";
> + };
> +
> + /*
> + * vcc33_pmuio and vcc33_io is sourced directly from vcc33_sys,
> + * enabled by vcc_18
> + */
> + vcc33_io: vcc33-io {
> + compatible = "regulator-fixed";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "vcc33_io";
> + };
> +
> + vcc5_host1: vcc5-host1-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio5 RK_PC1 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&hub_usb1_pwr_en>;
> + regulator-name = "vcc5_host1";
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vcc5_host2: vcc5-host2-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio5 RK_PC2 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&hub_usb2_pwr_en>;
> + regulator-name = "vcc5_host2";
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vcc5v_otg: vcc5v-otg-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb_otg_pwr_en>;
> + regulator-name = "vcc5_otg";
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +};
> +
> +&gmac {
> + status = "okay";
> +
> + assigned-clocks = <&cru SCLK_MAC>;
> + assigned-clock-parents = <&ext_gmac>;
> + clock_in_out = "input";
> + phy-handle = <ðphy>;
> + phy-mode = "rgmii";
> + phy-supply = <&vcc33_lan>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
> + resets = <&cru SRST_MAC>;
> + reset-names = "stmmaceth";
> + rx_delay = <0x10>;
> + tx_delay = <0x30>;
> +
> + /* Reset for the RTL8211 PHY which requires a 10-ms reset pulse (low)
> + * with a 30ms settling time. */
> + snps,reset-gpio = <&gpio4 RK_PB0 0>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 10000 30000>;
> + wakeup-source;
> +
> + mdio0 {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy: ethernet-phy@1 {
> + reg = <1>;
> + };
> + };
> +};
> +
> +&rk808 {
> + dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
> + <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
> +
> + vcc6-supply = <&vcc33_sys>;
> + vcc10-supply = <&vcc33_sys>;
> + vcc11-supply = <&vcc_5v>;
> + vcc12-supply = <&vcc33_sys>;
> +
> + regulators {
> + /delete-node/ LDO_REG1;
> +
> + /* According to the schematic, vcc18_lcdt is for
> + * HDMI_AVDD_1V8
> + */
> + vcc18_lcdt: LDO_REG2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vdd18_lcdt";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + /* This is not a pwren anymore, but the real power supply,
> + * vdd10_lcd for HDMI_AVDD_1V0
> + */
> + vdd10_lcd: LDO_REG7 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-name = "vdd10_lcd";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1000000>;
> + };
> +
I've dropped this unnecessary newline
> + };
and applied the result for 5.4
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH v3 5/5] ARM: dts: rockchip: add veyron-tiger board
From: Heiko Stuebner @ 2019-07-25 20:57 UTC (permalink / raw)
To: Matthias Kaehlcke
Cc: Rob Herring, Mark Rutland, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
In-Reply-To: <20190725162642.250709-6-mka@chromium.org>
Am Donnerstag, 25. Juli 2019, 18:26:42 CEST schrieb Matthias Kaehlcke:
> Also known as the AOpen Chromebase Mini.
>
> tiger and fievel are share the same board, tiger has a display and
> touchscreen, fievel not. Use the fievel .dts as base and add the
> extra bits.
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
applied for 5.4
Thanks
Heiko
^ permalink raw reply
* Re: [PATCH v3 2/7] drivers: Introduce device lookup variants by of_node
From: Moritz Fischer @ 2019-07-25 21:01 UTC (permalink / raw)
To: Suzuki K Poulose
Cc: linux-kernel, gregkh, rafael, linux-arm-kernel, Maarten Lankhorst,
Maxime Ripard, dri-devel, David Airlie, Daniel Vetter, devicetree,
Florian Fainelli, Frank Rowand, Heiko Stuebner, Liam Girdwood,
linux-i2c, linux-rockchip, linux-spi, Mathieu Poirier,
Rob Herring, Srinivas Kandagatla, Takashi Iwai, Wolfram Sang
In-Reply-To: <20190723221838.12024-3-suzuki.poulose@arm.com>
On Tue, Jul 23, 2019 at 11:18:33PM +0100, Suzuki K Poulose wrote:
> Introduce wrappers for {bus/driver/class}_find_device() to
> locate devices by its of_node.
>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
> Cc: dri-devel@lists.freedesktop.org
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: devicetree@vger.kernel.org
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: Frank Rowand <frowand.list@gmail.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: linux-i2c@vger.kernel.org
> Cc: linux-rockchip@lists.infradead.org
> Cc: linux-spi@vger.kernel.org
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> Cc: Takashi Iwai <tiwai@suse.com>
> Cc: Wolfram Sang <wsa@the-dreams.de>
> Cc: Alan Tull <atull@kernel.org>
> Cc: Moritz Fischer <mdf@kernel.org>
> Cc: linux-fpga@vger.kernel.org
> Cc: Peter Rosin <peda@axentia.se>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Florian Fainelli <f.fainelli@gmail.com>
> Cc: Heiner Kallweit <hkallweit1@gmail.com>
> Cc: "David S. Miller" <davem@davemloft.net>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Liam Girdwood <lgirdwood@gmail.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Cc: "Rafael J. Wysocki" <rafael@kernel.org>
> Cc: Lee Jones <lee.jones@linaro.org>
> Cc: Thor Thayer <thor.thayer@linux.intel.com>
> Cc: Jiri Slaby <jslaby@suse.com>
> Cc: Mark Brown <broonie@kernel.org>
> Cc: Andrew Lunn <andrew@lunn.ch>
> Cc: Peter Rosin <peda@axentia.se>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Moritz Fischer <mdf@kernel.org> # For FPGA part
> ---
> - Dropped the reviewed-by tags from Thor, Mark, Andrew and Peter as the
> patches are mereged, though there are no functional changes.
> ---
> drivers/amba/tegra-ahb.c | 11 +-------
> drivers/fpga/fpga-bridge.c | 8 +-----
> drivers/fpga/fpga-mgr.c | 8 +-----
> drivers/gpu/drm/drm_mipi_dsi.c | 7 +----
> drivers/i2c/i2c-core-of.c | 7 +----
> drivers/mfd/altera-sysmgr.c | 14 ++--------
> drivers/mux/core.c | 7 +----
> drivers/net/phy/mdio_bus.c | 9 +------
> drivers/nvmem/core.c | 7 +----
> drivers/of/of_mdio.c | 8 +-----
> drivers/of/platform.c | 7 +----
> drivers/regulator/of_regulator.c | 7 +----
> drivers/spi/spi.c | 20 +++------------
> include/linux/device.h | 37 +++++++++++++++++++++++++++
> sound/soc/rockchip/rk3399_gru_sound.c | 9 ++-----
> 15 files changed, 56 insertions(+), 110 deletions(-)
>
> diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c
> index aa64eece77a6..57d3b2e2d007 100644
> --- a/drivers/amba/tegra-ahb.c
> +++ b/drivers/amba/tegra-ahb.c
> @@ -134,22 +134,13 @@ static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset)
> }
>
> #ifdef CONFIG_TEGRA_IOMMU_SMMU
> -static int tegra_ahb_match_by_smmu(struct device *dev, const void *data)
> -{
> - struct tegra_ahb *ahb = dev_get_drvdata(dev);
> - const struct device_node *dn = data;
> -
> - return (ahb->dev->of_node == dn) ? 1 : 0;
> -}
> -
> int tegra_ahb_enable_smmu(struct device_node *dn)
> {
> struct device *dev;
> u32 val;
> struct tegra_ahb *ahb;
>
> - dev = driver_find_device(&tegra_ahb_driver.driver, NULL, dn,
> - tegra_ahb_match_by_smmu);
> + dev = driver_find_device_by_of_node(&tegra_ahb_driver.driver, dn);
> if (!dev)
> return -EPROBE_DEFER;
> ahb = dev_get_drvdata(dev);
> diff --git a/drivers/fpga/fpga-bridge.c b/drivers/fpga/fpga-bridge.c
> index 80bd8f1b2aa6..4bab9028940a 100644
> --- a/drivers/fpga/fpga-bridge.c
> +++ b/drivers/fpga/fpga-bridge.c
> @@ -19,11 +19,6 @@ static struct class *fpga_bridge_class;
> /* Lock for adding/removing bridges to linked lists*/
> static spinlock_t bridge_list_lock;
>
> -static int fpga_bridge_of_node_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> /**
> * fpga_bridge_enable - Enable transactions on the bridge
> *
> @@ -104,8 +99,7 @@ struct fpga_bridge *of_fpga_bridge_get(struct device_node *np,
> {
> struct device *dev;
>
> - dev = class_find_device(fpga_bridge_class, NULL, np,
> - fpga_bridge_of_node_match);
> + dev = class_find_device_by_of_node(fpga_bridge_class, np);
> if (!dev)
> return ERR_PTR(-ENODEV);
>
> diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c
> index c3866816456a..e05104f5e40c 100644
> --- a/drivers/fpga/fpga-mgr.c
> +++ b/drivers/fpga/fpga-mgr.c
> @@ -482,11 +482,6 @@ struct fpga_manager *fpga_mgr_get(struct device *dev)
> }
> EXPORT_SYMBOL_GPL(fpga_mgr_get);
>
> -static int fpga_mgr_of_node_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> /**
> * of_fpga_mgr_get - Given a device node, get a reference to a fpga mgr.
> *
> @@ -498,8 +493,7 @@ struct fpga_manager *of_fpga_mgr_get(struct device_node *node)
> {
> struct device *dev;
>
> - dev = class_find_device(fpga_mgr_class, NULL, node,
> - fpga_mgr_of_node_match);
> + dev = class_find_device_by_of_node(fpga_mgr_class, node);
> if (!dev)
> return ERR_PTR(-ENODEV);
>
> diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
> index ad19df0686c9..bd2498bbd74a 100644
> --- a/drivers/gpu/drm/drm_mipi_dsi.c
> +++ b/drivers/gpu/drm/drm_mipi_dsi.c
> @@ -93,11 +93,6 @@ static struct bus_type mipi_dsi_bus_type = {
> .pm = &mipi_dsi_device_pm_ops,
> };
>
> -static int of_device_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> /**
> * of_find_mipi_dsi_device_by_node() - find the MIPI DSI device matching a
> * device tree node
> @@ -110,7 +105,7 @@ struct mipi_dsi_device *of_find_mipi_dsi_device_by_node(struct device_node *np)
> {
> struct device *dev;
>
> - dev = bus_find_device(&mipi_dsi_bus_type, NULL, np, of_device_match);
> + dev = bus_find_device_by_of_node(&mipi_dsi_bus_type, np);
>
> return dev ? to_mipi_dsi_device(dev) : NULL;
> }
> diff --git a/drivers/i2c/i2c-core-of.c b/drivers/i2c/i2c-core-of.c
> index d1c48dec7118..6f632d543fcc 100644
> --- a/drivers/i2c/i2c-core-of.c
> +++ b/drivers/i2c/i2c-core-of.c
> @@ -113,11 +113,6 @@ void of_i2c_register_devices(struct i2c_adapter *adap)
> of_node_put(bus);
> }
>
> -static int of_dev_node_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> static int of_dev_or_parent_node_match(struct device *dev, const void *data)
> {
> if (dev->of_node == data)
> @@ -135,7 +130,7 @@ struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
> struct device *dev;
> struct i2c_client *client;
>
> - dev = bus_find_device(&i2c_bus_type, NULL, node, of_dev_node_match);
> + dev = bus_find_device_by_of_node(&i2c_bus_type, node);
> if (!dev)
> return NULL;
>
> diff --git a/drivers/mfd/altera-sysmgr.c b/drivers/mfd/altera-sysmgr.c
> index 2ee14d8a6d31..d2a13a547a3c 100644
> --- a/drivers/mfd/altera-sysmgr.c
> +++ b/drivers/mfd/altera-sysmgr.c
> @@ -87,16 +87,6 @@ static struct regmap_config altr_sysmgr_regmap_cfg = {
> .use_single_write = true,
> };
>
> -/**
> - * sysmgr_match_phandle
> - * Matching function used by driver_find_device().
> - * Return: True if match is found, otherwise false.
> - */
> -static int sysmgr_match_phandle(struct device *dev, const void *data)
> -{
> - return dev->of_node == (const struct device_node *)data;
> -}
> -
> /**
> * altr_sysmgr_regmap_lookup_by_phandle
> * Find the sysmgr previous configured in probe() and return regmap property.
> @@ -117,8 +107,8 @@ struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np,
> if (!sysmgr_np)
> return ERR_PTR(-ENODEV);
>
> - dev = driver_find_device(&altr_sysmgr_driver.driver, NULL,
> - (void *)sysmgr_np, sysmgr_match_phandle);
> + dev = driver_find_device_by_of_node(&altr_sysmgr_driver.driver,
> + (void *)sysmgr_np);
> of_node_put(sysmgr_np);
> if (!dev)
> return ERR_PTR(-EPROBE_DEFER);
> diff --git a/drivers/mux/core.c b/drivers/mux/core.c
> index d1271c1ee23c..1fb22388e7e0 100644
> --- a/drivers/mux/core.c
> +++ b/drivers/mux/core.c
> @@ -405,17 +405,12 @@ int mux_control_deselect(struct mux_control *mux)
> }
> EXPORT_SYMBOL_GPL(mux_control_deselect);
>
> -static int of_dev_node_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> /* Note this function returns a reference to the mux_chip dev. */
> static struct mux_chip *of_find_mux_chip_by_node(struct device_node *np)
> {
> struct device *dev;
>
> - dev = class_find_device(&mux_class, NULL, np, of_dev_node_match);
> + dev = class_find_device_by_of_node(&mux_class, np);
>
> return dev ? to_mux_chip(dev) : NULL;
> }
> diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
> index bd04fe762056..ce940871331e 100644
> --- a/drivers/net/phy/mdio_bus.c
> +++ b/drivers/net/phy/mdio_bus.c
> @@ -262,11 +262,6 @@ static struct class mdio_bus_class = {
> };
>
> #if IS_ENABLED(CONFIG_OF_MDIO)
> -/* Helper function for of_mdio_find_bus */
> -static int of_mdio_bus_match(struct device *dev, const void *mdio_bus_np)
> -{
> - return dev->of_node == mdio_bus_np;
> -}
> /**
> * of_mdio_find_bus - Given an mii_bus node, find the mii_bus.
> * @mdio_bus_np: Pointer to the mii_bus.
> @@ -287,9 +282,7 @@ struct mii_bus *of_mdio_find_bus(struct device_node *mdio_bus_np)
> if (!mdio_bus_np)
> return NULL;
>
> - d = class_find_device(&mdio_bus_class, NULL, mdio_bus_np,
> - of_mdio_bus_match);
> -
> + d = class_find_device_by_of_node(&mdio_bus_class, mdio_bus_np);
> return d ? to_mii_bus(d) : NULL;
> }
> EXPORT_SYMBOL(of_mdio_find_bus);
> diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
> index ac5d945be88a..057d1ff87d5d 100644
> --- a/drivers/nvmem/core.c
> +++ b/drivers/nvmem/core.c
> @@ -76,11 +76,6 @@ static struct bus_type nvmem_bus_type = {
> .name = "nvmem",
> };
>
> -static int of_nvmem_match(struct device *dev, const void *nvmem_np)
> -{
> - return dev->of_node == nvmem_np;
> -}
> -
> static struct nvmem_device *of_nvmem_find(struct device_node *nvmem_np)
> {
> struct device *d;
> @@ -88,7 +83,7 @@ static struct nvmem_device *of_nvmem_find(struct device_node *nvmem_np)
> if (!nvmem_np)
> return NULL;
>
> - d = bus_find_device(&nvmem_bus_type, NULL, nvmem_np, of_nvmem_match);
> + d = bus_find_device_by_of_node(&nvmem_bus_type, nvmem_np);
>
> if (!d)
> return NULL;
> diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
> index 44f53496cab1..000b95787df1 100644
> --- a/drivers/of/of_mdio.c
> +++ b/drivers/of/of_mdio.c
> @@ -280,12 +280,6 @@ int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
> }
> EXPORT_SYMBOL(of_mdiobus_register);
>
> -/* Helper function for of_phy_find_device */
> -static int of_phy_match(struct device *dev, const void *phy_np)
> -{
> - return dev->of_node == phy_np;
> -}
> -
> /**
> * of_phy_find_device - Give a PHY node, find the phy_device
> * @phy_np: Pointer to the phy's device tree node
> @@ -301,7 +295,7 @@ struct phy_device *of_phy_find_device(struct device_node *phy_np)
> if (!phy_np)
> return NULL;
>
> - d = bus_find_device(&mdio_bus_type, NULL, phy_np, of_phy_match);
> + d = bus_find_device_by_of_node(&mdio_bus_type, phy_np);
> if (d) {
> mdiodev = to_mdio_device(d);
> if (mdiodev->flags & MDIO_DEVICE_FLAG_PHY)
> diff --git a/drivers/of/platform.c b/drivers/of/platform.c
> index 7801e25e6895..b47a2292fe8e 100644
> --- a/drivers/of/platform.c
> +++ b/drivers/of/platform.c
> @@ -37,11 +37,6 @@ static const struct of_device_id of_skipped_node_table[] = {
> {} /* Empty terminated list */
> };
>
> -static int of_dev_node_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> /**
> * of_find_device_by_node - Find the platform_device associated with a node
> * @np: Pointer to device tree node
> @@ -55,7 +50,7 @@ struct platform_device *of_find_device_by_node(struct device_node *np)
> {
> struct device *dev;
>
> - dev = bus_find_device(&platform_bus_type, NULL, np, of_dev_node_match);
> + dev = bus_find_device_by_of_node(&platform_bus_type, np);
> return dev ? to_platform_device(dev) : NULL;
> }
> EXPORT_SYMBOL(of_find_device_by_node);
> diff --git a/drivers/regulator/of_regulator.c b/drivers/regulator/of_regulator.c
> index 397918ebba55..20dcc9c03adc 100644
> --- a/drivers/regulator/of_regulator.c
> +++ b/drivers/regulator/of_regulator.c
> @@ -460,16 +460,11 @@ struct regulator_init_data *regulator_of_get_init_data(struct device *dev,
> return NULL;
> }
>
> -static int of_node_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> struct regulator_dev *of_find_regulator_by_node(struct device_node *np)
> {
> struct device *dev;
>
> - dev = class_find_device(®ulator_class, NULL, np, of_node_match);
> + dev = class_find_device_by_of_node(®ulator_class, np);
>
> return dev ? dev_to_rdev(dev) : NULL;
> }
> diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
> index 75ac046cae52..a591da87981a 100644
> --- a/drivers/spi/spi.c
> +++ b/drivers/spi/spi.c
> @@ -3652,37 +3652,25 @@ EXPORT_SYMBOL_GPL(spi_write_then_read);
> /*-------------------------------------------------------------------------*/
>
> #if IS_ENABLED(CONFIG_OF)
> -static int __spi_of_device_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> /* must call put_device() when done with returned spi_device device */
> struct spi_device *of_find_spi_device_by_node(struct device_node *node)
> {
> - struct device *dev = bus_find_device(&spi_bus_type, NULL, node,
> - __spi_of_device_match);
> + struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
> +
> return dev ? to_spi_device(dev) : NULL;
> }
> EXPORT_SYMBOL_GPL(of_find_spi_device_by_node);
> #endif /* IS_ENABLED(CONFIG_OF) */
>
> #if IS_ENABLED(CONFIG_OF_DYNAMIC)
> -static int __spi_of_controller_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> /* the spi controllers are not using spi_bus, so we find it with another way */
> static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
> {
> struct device *dev;
>
> - dev = class_find_device(&spi_master_class, NULL, node,
> - __spi_of_controller_match);
> + dev = class_find_device_by_of_node(&spi_master_class, node);
> if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
> - dev = class_find_device(&spi_slave_class, NULL, node,
> - __spi_of_controller_match);
> + dev = class_find_device_by_of_node(&spi_slave_class, node);
> if (!dev)
> return NULL;
>
> diff --git a/include/linux/device.h b/include/linux/device.h
> index 3ba376b8b456..29d8d7ad41e6 100644
> --- a/include/linux/device.h
> +++ b/include/linux/device.h
> @@ -186,6 +186,18 @@ static inline struct device *bus_find_device_by_name(struct bus_type *bus,
> return bus_find_device(bus, start, name, device_match_name);
> }
>
> +/**
> + * bus_find_device_by_of_node : device iterator for locating a particular device
> + * matching the of_node.
> + * @bus: bus type
> + * @np: of_node of the device to match.
> + */
> +static inline struct device *
> +bus_find_device_by_of_node(struct bus_type *bus, const struct device_node *np)
> +{
> + return bus_find_device(bus, NULL, np, device_match_of_node);
> +}
> +
> struct device *subsys_find_device_by_id(struct bus_type *bus, unsigned int id,
> struct device *hint);
> int bus_for_each_drv(struct bus_type *bus, struct device_driver *start,
> @@ -366,6 +378,19 @@ static inline struct device *driver_find_device_by_name(struct device_driver *dr
> return driver_find_device(drv, NULL, name, device_match_name);
> }
>
> +/**
> + * driver_find_device_by_of_node- device iterator for locating a particular device
> + * by of_node pointer.
> + * @driver: the driver we're iterating
> + * @np: of_node pointer to match.
> + */
> +static inline struct device *
> +driver_find_device_by_of_node(struct device_driver *drv,
> + const struct device_node *np)
> +{
> + return driver_find_device(drv, NULL, np, device_match_of_node);
> +}
> +
> void driver_deferred_probe_add(struct device *dev);
> int driver_deferred_probe_check_state(struct device *dev);
> int driver_deferred_probe_check_state_continue(struct device *dev);
> @@ -507,6 +532,18 @@ static inline struct device *class_find_device_by_name(struct class *class,
> return class_find_device(class, NULL, name, device_match_name);
> }
>
> +/**
> + * class_find_device_by_of_node : device iterator for locating a particular device
> + * matching the of_node.
> + * @class: class type
> + * @np: of_node of the device to match.
> + */
> +static inline struct device *
> +class_find_device_by_of_node(struct class *class, const struct device_node *np)
> +{
> + return class_find_device(class, NULL, np, device_match_of_node);
> +}
> +
> struct class_attribute {
> struct attribute attr;
> ssize_t (*show)(struct class *class, struct class_attribute *attr,
> diff --git a/sound/soc/rockchip/rk3399_gru_sound.c b/sound/soc/rockchip/rk3399_gru_sound.c
> index c16b0ffe8cfc..d951100bf770 100644
> --- a/sound/soc/rockchip/rk3399_gru_sound.c
> +++ b/sound/soc/rockchip/rk3399_gru_sound.c
> @@ -422,11 +422,6 @@ static const struct dailink_match_data dailink_match[] = {
> },
> };
>
> -static int of_dev_node_match(struct device *dev, const void *data)
> -{
> - return dev->of_node == data;
> -}
> -
> static int rockchip_sound_codec_node_match(struct device_node *np_codec)
> {
> struct device *dev;
> @@ -438,8 +433,8 @@ static int rockchip_sound_codec_node_match(struct device_node *np_codec)
> continue;
>
> if (dailink_match[i].bus_type) {
> - dev = bus_find_device(dailink_match[i].bus_type, NULL,
> - np_codec, of_dev_node_match);
> + dev = bus_find_device_by_of_node(dailink_match[i].bus_type,
> + np_codec);
> if (!dev)
> continue;
> put_device(dev);
> --
> 2.21.0
>
Thanks,
Moritz
^ permalink raw reply
* Re: [PATCH v7 0/7] Solve postboot supplier cleanup and optimize probe ordering
From: Frank Rowand @ 2019-07-25 21:04 UTC (permalink / raw)
To: Greg Kroah-Hartman, Saravana Kannan
Cc: Rob Herring, Mark Rutland, Rafael J. Wysocki, devicetree,
linux-kernel, David Collins, kernel-team
In-Reply-To: <20190725134214.GD11115@kroah.com>
On 7/25/19 6:42 AM, Greg Kroah-Hartman wrote:
> On Tue, Jul 23, 2019 at 05:10:53PM -0700, Saravana Kannan wrote:
>> Add device-links to track functional dependencies between devices
>> after they are created (but before they are probed) by looking at
>> their common DT bindings like clocks, interconnects, etc.
>>
>> Having functional dependencies automatically added before the devices
>> are probed, provides the following benefits:
>>
>> - Optimizes device probe order and avoids the useless work of
>> attempting probes of devices that will not probe successfully
>> (because their suppliers aren't present or haven't probed yet).
>>
>> For example, in a commonly available mobile SoC, registering just
>> one consumer device's driver at an initcall level earlier than the
>> supplier device's driver causes 11 failed probe attempts before the
>> consumer device probes successfully. This was with a kernel with all
>> the drivers statically compiled in. This problem gets a lot worse if
>> all the drivers are loaded as modules without direct symbol
>> dependencies.
>>
>> - Supplier devices like clock providers, interconnect providers, etc
>> need to keep the resources they provide active and at a particular
>> state(s) during boot up even if their current set of consumers don't
>> request the resource to be active. This is because the rest of the
>> consumers might not have probed yet and turning off the resource
>> before all the consumers have probed could lead to a hang or
>> undesired user experience.
>>
>> Some frameworks (Eg: regulator) handle this today by turning off
>> "unused" resources at late_initcall_sync and hoping all the devices
>> have probed by then. This is not a valid assumption for systems with
>> loadable modules. Other frameworks (Eg: clock) just don't handle
>> this due to the lack of a clear signal for when they can turn off
>> resources. This leads to downstream hacks to handle cases like this
>> that can easily be solved in the upstream kernel.
>>
>> By linking devices before they are probed, we give suppliers a clear
>> count of the number of dependent consumers. Once all of the
>> consumers are active, the suppliers can turn off the unused
>> resources without making assumptions about the number of consumers.
>>
>> By default we just add device-links to track "driver presence" (probe
>> succeeded) of the supplier device. If any other functionality provided
>> by device-links are needed, it is left to the consumer/supplier
>> devices to change the link when they probe.
>>
>> v1 -> v2:
>> - Drop patch to speed up of_find_device_by_node()
>> - Drop depends-on property and use existing bindings
>>
>> v2 -> v3:
>> - Refactor the code to have driver core initiate the linking of devs
>> - Have driver core link consumers to supplier before it's probed
>> - Add support for drivers to edit the device links before probing
>>
>> v3 -> v4:
>> - Tested edit_links() on system with cyclic dependency. Works.
>> - Added some checks to make sure device link isn't attempted from
>> parent device node to child device node.
>> - Added way to pause/resume sync_state callbacks across
>> of_platform_populate().
>> - Recursively parse DT node to create device links from parent to
>> suppliers of parent and all child nodes.
>>
>> v4 -> v5:
>> - Fixed copy-pasta bugs with linked list handling
>> - Walk up the phandle reference till I find an actual device (needed
>> for regulators to work)
>> - Added support for linking devices from regulator DT bindings
>> - Tested the whole series again to make sure cyclic dependencies are
>> broken with edit_links() and regulator links are created properly.
>>
>> v5 -> v6:
>> - Split, squashed and reordered some of the patches.
>> - Refactored the device linking code to follow the same code pattern for
>> any property.
>>
>> v6 -> v7:
>> - No functional changes.
>> - Renamed i to index
>> - Added comment to clarify not having to check property name for every
>> index
>> - Added "matched" variable to clarify code. No functional change.
>> - Added comments to include/linux/device.h for add_links()
>>
>> I've also not updated this patch series to handle the new patch [1] from
>> Rafael. Will do that once this patch series is close to being Acked.
>>
>> [1] - https://lore.kernel.org/lkml/3121545.4lOhFoIcdQ@kreacher/
>
>
> This looks sane to me. Anyone have any objections for me queueing this
> up for my tree to get into linux-next now?
I would like for the series to get into linux-next sooner than later,
and spend some time there.
I am _slightly_ more optimistic than Rob that sitting in linux-next for
an extended period might reveal any latent issues, so I would like for
the series to be in linux-next for an extended period of time. (Yes,
my understanding is that Linus does not like patches to be in linux-next
if they are not targeted for the next merge window, but I prefer that
this patch series spend as much time in linux-next as possible).
I have been waiting for the changes to settle down before bringing up
the issue of devicetree overlays. Now that the code seems to be
settling down, I need to look at how these changes impact overlays.
So I do not think the patches will be ready for a Linus pull request
until overlays are considered.
-Frank
>
> thanks,
>
> greg k-h
>
^ permalink raw reply
* Re: [PATCH] dt-bindings: clock: imx8mn: Fix tab indentation for yaml file
From: Stephen Boyd @ 2019-07-25 21:06 UTC (permalink / raw)
To: Anson.Huang, devicetree, festevam, kernel, linux-arm-kernel,
linux-clk, linux-kernel, mark.rutland, mturquette, robh+dt,
s.hauer, shawnguo
Cc: Linux-imx
In-Reply-To: <20190725020551.27034-1-Anson.Huang@nxp.com>
Quoting Anson.Huang@nxp.com (2019-07-24 19:05:51)
> From: Anson Huang <Anson.Huang@nxp.com>
>
> YAML file can NOT contain tab as indentation, fix it.
>
Would be nice if checkpatch could check for this.
> Fixes: 6d6062553e3d ("dt-bindings: imx: Add clock binding doc for i.MX8MN")
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply
* [PATCH] riscv: dts: fu540-c000: drop "timebase-frequency"
From: Paul Walmsley @ 2019-07-25 21:30 UTC (permalink / raw)
To: linux-riscv; +Cc: linux-kernel, robh+dt, mark.rutland, palmer, devicetree
On FU540-based systems, the "timebase-frequency" (RTCCLK) is sourced
from an external crystal located on the PCB. Thus the
timebase-frequency DT property should be defined by the board that
uses the SoC, not the SoC itself. Drop the superfluous
timebase-frequency property from the SoC DT data. (It's already
present in the board DT data.)
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index 9bf63f0ab253..42b5ec223100 100644
--- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
@@ -21,7 +21,6 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
- timebase-frequency = <1000000>;
cpu0: cpu@0 {
compatible = "sifive,e51", "sifive,rocket0", "riscv";
device_type = "cpu";
--
2.22.0
^ permalink raw reply related
* Re: [PATCH] Revert "ARM: dts: rockchip: add startup delay to rk3288-veyron panel-regulators"
From: Heiko Stuebner @ 2019-07-25 21:33 UTC (permalink / raw)
To: Doug Anderson
Cc: Enric Balletbo i Serra, Matthias Kaehlcke, devicetree, LKML,
open list:ARM/Rockchip SoC..., Rob Herring, Mark Rutland,
Linux ARM
In-Reply-To: <CAD=FV=UhNfhVG422=huthFSptoV4FXED=xPtArO2KkyNb1U3Xw@mail.gmail.com>
Am Mittwoch, 3. Juli 2019, 06:54:58 CEST schrieb Doug Anderson:
> Hi,
>
> On Thu, Jun 20, 2019 at 1:31 PM Doug Anderson <dianders@chromium.org> wrote:
> >
> > Hi,
> >
> > On Thu, Jun 20, 2019 at 11:21 AM Douglas Anderson <dianders@chromium.org> wrote:
> > >
> > > This reverts commit 1f45e8c6d0161f044d679f242fe7514e2625af4a.
> > >
> > > This 100 ms mystery delay is not on downstream kernels and no longer
> > > seems needed on upstream kernels either [1]. Presumably something in the
> > > meantime has made things better. A few possibilities for patches that
> > > have landed in the meantime that could have made this better are
> > > commit 3157694d8c7f ("pwm-backlight: Add support for PWM delays
> > > proprieties."), commit 5fb5caee92ba ("pwm-backlight: Enable/disable
> > > the PWM before/after LCD enable toggle."), and commit 6d5922dd0d60
> > > ("ARM: dts: rockchip: set PWM delay backlight settings for Veyron")
> > >
> > > Let's revert and get our 100 ms back.
> > >
> > > [1] https://lkml.kernel.org/r/2226970.BAPq4liE1j@diego
> > >
> > > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > > ---
> > >
> > > arch/arm/boot/dts/rk3288-veyron-jaq.dts | 1 -
> > > arch/arm/boot/dts/rk3288-veyron-jerry.dts | 1 -
> > > arch/arm/boot/dts/rk3288-veyron-minnie.dts | 1 -
> > > arch/arm/boot/dts/rk3288-veyron-speedy.dts | 1 -
> > > 4 files changed, 4 deletions(-)
> >
> > Maybe wait before applying. I've been running reboot tests now with
> > this patch applied (among others) and with enough reboots I managed to
> > see:
> >
> > [ 5.682418] rockchip-dp ff970000.dp: eDP link training failed (-5)
> >
> > I'll see if I can confirm that it's this patch and why things are
> > different compared to downstream.
>
> OK, I finally got back to this and confirmed:
>
> 1. The above error is actually somewhat harmless. The eDP failure
> will be retried automatically despite the scary message. Specifically
> see the loop in analogix_dp_bridge_enable(). I confirmed that after
> seeing the error the screen came up just fine (I looked at the screen
> in two actual instances but I believe it's pretty much always fine).
>
> 2. I haven't seen any evidence that the eDP link training happens any
> more often with this revert in place. Specifically, I see the same
> message in the logs (at what appears to be the same rate) with or
> without this revert.
>
> 3. Probably the link-training failures here are the same ones we
> debugged for PSR for rk3399-gru-kevin that we fixed by making the eDP
> PCLK rate exactly 24 MHz. See <https://crrev.com/c/433393> for
> details. On rk3399-gru-kevin it was super important to resolve the
> root cause of these errors because we had PSR (which meant we were
> constantly taking to the eDP controller). On rk3288-veyron devices
> with no PSR the retry should be a fine solution and it doesn't seem
> like a good idea to fully rejigger our clock plan to fix the root
> cause.
>
>
> NOTE: I saw _one_ case on rk3288-veyron-minnie where the screen looked
> wonky at bootup and I saw the eDP link training error in the logs.
> That's what originally made me cautious. I haven't been able to
> reproduce this, but presumably I just got super unlucky in that one
> case. I've left devices rebooting all day at work and haven't seen
> the wonky screen since then.
>
>
> Summary: I think this revert is just fine.
it looks like by picking Matthias' cleanups of the veyron displays
first I broke this patch. I guess we just need to remove the
startup-delay-us = <100000>;
from the panel_regulator in the new rk3288-veyron-edp.dtsi ?
Heiko
^ permalink raw reply
* Re: [PATCH] dt-bindings: clock: imx8mn: Fix tab indentation for yaml file
From: Rob Herring @ 2019-07-25 21:37 UTC (permalink / raw)
To: Stephen Boyd
Cc: Anson Huang, devicetree, Fabio Estevam, Sascha Hauer,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-clk, linux-kernel@vger.kernel.org, Mark Rutland,
Michael Turquette, Sascha Hauer, Shawn Guo, NXP Linux Team
In-Reply-To: <20190725210619.5EB94218D4@mail.kernel.org>
On Thu, Jul 25, 2019 at 3:06 PM Stephen Boyd <sboyd@kernel.org> wrote:
>
> Quoting Anson.Huang@nxp.com (2019-07-24 19:05:51)
> > From: Anson Huang <Anson.Huang@nxp.com>
> >
> > YAML file can NOT contain tab as indentation, fix it.
> >
>
> Would be nice if checkpatch could check for this.
Would be nice if folks just ran 'make dt_binding_check'. :) It
wouldn't be hard to add a tab check to checkpatch, but that's just one
potential problem.
Rob
^ permalink raw reply
* Re: [PATCH V2 1/2] usb: dwc3: Add node to update cache type setting
From: Rob Herring @ 2019-07-25 21:55 UTC (permalink / raw)
To: Ran Wang
Cc: Greg Kroah-Hartman, Mark Rutland, Felipe Balbi,
linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <DB8PR04MB6826B4479A5A67A66025E89CF1C10@DB8PR04MB6826.eurprd04.prod.outlook.com>
On Wed, Jul 24, 2019 at 8:29 PM Ran Wang <ran.wang_1@nxp.com> wrote:
>
> Hi Rob,
>
> On Thursday, July 25, 2019 04:42 Rob Herring <robh@kernel.org> wrote:
> >
> > On Fri, Jul 12, 2019 at 02:42:05PM +0800, Ran Wang wrote:
> > > Some Layerscape paltforms (such as LS1088A, LS2088A, etc) encounter
> > > USB detect failues when adding dma-coherent to DWC3 node. This is
> > > because the HW default cache type configuration of those SoC are not
> > > right, need to be updated in DTS.
> > >
> > > Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
> > > ---
> > > Change in v2:
> > > - New file.
> > >
> > > Documentation/devicetree/bindings/usb/dwc3.txt | 43
> > > ++++++++++++++++++++++++++
> > > 1 file changed, 43 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
> > > b/Documentation/devicetree/bindings/usb/dwc3.txt
> > > index 8e5265e..7bc1cef 100644
> > > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> > > +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> > > @@ -110,6 +110,43 @@ Optional properties:
> > > - in addition all properties from usb-xhci.txt from the current directory are
> > > supported as well
> > >
> > > +* Cache type nodes (optional)
> > > +
> > > +The Cache type node is used to tell how to configure cache type on 4
> > > +different transfer types: Data Read, Desc Read, Data Write and Desc
> > > +write. For each treasfer type, controller has a 4-bit register field
> > > +to enable different cache type. Quoted from DWC3 data book Table 6-5
> > Cache Type Bit Assignments:
> > > +----------------------------------------------------------------
> > > +MBUS_TYPE| bit[3] |bit[2] |bit[1] |bit[0]
> > > +----------------------------------------------------------------
> > > +AHB |Cacheable |Bufferable |Privilegge |Data
> > > +AXI3 |Write Allocate|Read Allocate|Cacheable |Bufferable
> > > +AXI4 |Allocate Other|Allocate |Modifiable |Bufferable
> > > +AXI4 |Other Allocate|Allocate |Modifiable |Bufferable
> > > +Native |Same as AXI |Same as AXI |Same as AXI|Same as AXI
> > > +----------------------------------------------------------------
> > > +Note: The AHB, AXI3, AXI4, and PCIe busses use different names for
> > > +certain signals, which have the same meaning:
> > > + Bufferable = Posted
> > > + Cacheable = Modifiable = Snoop (negation of No Snoop)
> >
> > This should all be implied from the SoC specific compatible strings.
>
> Did you mean I could implement a soc driver which can be matched by compatible of 'fsl,ls1088a-dwc3' which will pass known bus type to DWC3 driver? If yes, how to pass?
Yes. The DT match table can have data associated with that compatible
string. Beyond that, I'm not really familiar with the DWC3 driver.
Rob
^ permalink raw reply
* [PATCH 00/11] JZ4740 SoC cleanup
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel
Hi,
This patchset converts the Qi LB60 MIPS board to devicetree and makes it
use all the shiny new drivers that have been developed or updated
recently.
All the crappy old drivers and custom code can be dropped since they
have been replaced by better alternatives.
Some of these alternatives are not yet in 5.3-rc1 but have already been
accepted by their respective maintainer for inclusion in 5.4-rc1.
To upstream this patchset, I think that as soon as MIPS maintainers
agree to take patches 01-03/11 and 11/11, the other patches can go
through their respective maintainer's tree.
Note for MIPS maintainers:
Patch 11/11 may conflict with the TCU patchset v15, should this one be
accepted upstream, but the conflict is tiny and easy to fix. Should this
case appear, don't hesitate to bother me about it.
Thanks,
-Paul
^ permalink raw reply
* [PATCH 01/11] MIPS: DTS: jz4740: Add missing nodes
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
Add nodes for the MMC, AIC, ADC, CODEC, MUSB, LCD, memory,
and BCH controllers.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
arch/mips/boot/dts/ingenic/jz4740.dtsi | 84 ++++++++++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index 3ffaf63f22dd..bceabf494af5 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -132,6 +132,35 @@
};
};
+ aic: audio-controller@10020000 {
+ compatible = "ingenic,jz4740-i2s";
+ reg = <0x10020000 0x38>;
+
+ #sound-dai-cells = <0>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <18>;
+
+ clocks = <&cgu JZ4740_CLK_AIC>,
+ <&cgu JZ4740_CLK_I2S>,
+ <&cgu JZ4740_CLK_EXT>,
+ <&cgu JZ4740_CLK_PLL_HALF>;
+ clock-names = "aic", "i2s", "ext", "pll half";
+
+ dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
+ dma-names = "rx", "tx";
+ };
+
+ codec: audio-codec@100200a4 {
+ compatible = "ingenic,jz4740-codec";
+ reg = <0x10020080 0x8>;
+
+ #sound-dai-cells = <0>;
+
+ clocks = <&cgu JZ4740_CLK_AIC>;
+ clock-names = "aic";
+ };
+
mmc: mmc@10021000 {
compatible = "ingenic,jz4740-mmc";
reg = <0x10021000 0x1000>;
@@ -172,6 +201,38 @@
clock-names = "baud", "module";
};
+ adc: adc@10070000 {
+ compatible = "ingenic,jz4740-adc";
+ reg = <0x10070000 0x30>;
+ #io-channel-cells = <1>;
+
+ clocks = <&cgu JZ4740_CLK_ADC>;
+ clock-names = "adc";
+
+ interrupt-parent = <&intc>;
+ interrupts = <12>;
+ };
+
+ nemc: memory-controller@13010000 {
+ compatible = "ingenic,jz4740-nemc";
+ reg = <0x13010000 0x54>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <1 0 0x18000000 0x4000000
+ 2 0 0x14000000 0x4000000
+ 3 0 0x0c000000 0x4000000
+ 4 0 0x08000000 0x4000000>;
+
+ clocks = <&cgu JZ4740_CLK_MCLK>;
+ };
+
+ ecc: ecc-controller@13010100 {
+ compatible = "ingenic,jz4740-ecc";
+ reg = <0x13010100 0x2C>;
+
+ clocks = <&cgu JZ4740_CLK_MCLK>;
+ };
+
dmac: dma-controller@13020000 {
compatible = "ingenic,jz4740-dma";
reg = <0x13020000 0xbc
@@ -197,4 +258,27 @@
status = "disabled";
};
+
+ udc: usb@13040000 {
+ compatible = "ingenic,jz4740-musb";
+ reg = <0x13040000 0x10000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <24>;
+ interrupt-names = "mc";
+
+ clocks = <&cgu JZ4740_CLK_UDC>;
+ clock-names = "udc";
+ };
+
+ lcd: lcd-controller@13050000 {
+ compatible = "ingenic,jz4740-lcd";
+ reg = <0x13050000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <30>;
+
+ clocks = <&cgu JZ4740_CLK_LCD_PCLK>, <&cgu JZ4740_CLK_LCD>;
+ clock-names = "lcd_pclk", "lcd";
+ };
};
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 02/11] MIPS: qi_lb60: Migrate to devicetree
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
Move all the platform data to devicetree.
The only bit dropped is the PWM beeper, which requires the PWM driver
to be updated. I figured it's okay to remove it here since it's really
a non-critical device, and it'll be re-introduced soon enough.
The other change is the CS line of the SPI is now set as active low. The
SPI core would have forced "active low" anyway, unless the 'spi-cs-high'
property is set.
In the process of moving to devicetree, we also switched to new drivers:
- We use the simple-audio-card and simple-amplifier drivers instead of
the custom ASoC code;
- We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0
DRM panel driver instead of the old framebuffer driver;
- We use the new jz4780-dma driver instead of the old jz4740-dma one;
- We use the ingenic-nand and jz4740-ecc drivers instead of the old
jz4740-nand driver;
- We use ingenic-battery instead of jz4740-battery;
- We use iio-hwmon instead of jz4740-hwmon;
- We use ingenic-iio instead of the old jz4740-adc MFD driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
arch/mips/boot/dts/ingenic/qi_lb60.dts | 295 ++++++++++++++-
arch/mips/jz4740/Makefile | 4 -
arch/mips/jz4740/board-qi_lb60.c | 491 -------------------------
3 files changed, 294 insertions(+), 496 deletions(-)
delete mode 100644 arch/mips/jz4740/board-qi_lb60.c
diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts
index cc26650562c2..8f3750981714 100644
--- a/arch/mips/boot/dts/ingenic/qi_lb60.dts
+++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts
@@ -4,6 +4,16 @@
#include "jz4740.dtsi"
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/iio/adc/ingenic,adc.h>
+#include <dt-bindings/input/input.h>
+
+#define KEY_QI_QI KEY_F13
+#define KEY_QI_UPRED KEY_RIGHTALT
+#define KEY_QI_VOLUP KEY_VOLUMEUP
+#define KEY_QI_VOLDOWN KEY_VOLUMEDOWN
+#define KEY_QI_FN KEY_LEFTCTRL
+
/ {
compatible = "qi,lb60", "ingenic,jz4740";
@@ -11,7 +21,16 @@
stdout-path = &uart0;
};
- mmc_power: fixedregulator {
+ vcc: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ mmc_power: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "mmc_vcc";
gpio = <&gpd 2 0>;
@@ -19,6 +38,203 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
+
+ amp_supply: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "amp_supply";
+ gpio = <&gpd 4 0>;
+ enable-active-high;
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ amp: analog-amplifier {
+ compatible = "simple-audio-amplifier";
+ enable-gpios = <&gpb 29 GPIO_ACTIVE_HIGH>;
+ VCC-supply = <&_supply>;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+
+ simple-audio-card,name = "QI LB60";
+ simple-audio-card,format = "i2s";
+
+ simple-audio-card,widgets =
+ "Speaker", "Speaker",
+ "Microphone", "Mic";
+ simple-audio-card,routing =
+ "MIC", "Mic",
+ "Speaker", "OUTL",
+ "Speaker", "OUTR",
+ "INL", "LOUT",
+ "INL", "ROUT";
+
+ simple-audio-card,aux-devs = <&>;
+
+ simple-audio-card,bitclock-master = <&dai_codec>;
+ simple-audio-card,frame-master = <&dai_codec>;
+
+ dai_cpu: simple-audio-card,cpu {
+ sound-dai = <&aic>;
+ };
+
+ dai_codec: simple-audio-card,codec {
+ sound-dai = <&codec>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ key {
+ label = "Power";
+ wakeup-source;
+ linux,code = <KEY_POWER>;
+ gpios = <&gpd 29 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ keyboard {
+ compatible = "gpio-matrix-keypad";
+
+ col-scan-delay-us = <10>;
+ debounce-delay-ms = <10>;
+ wakeup-source;
+
+ row-gpios = <&gpd 18 0 &gpd 19 0 &gpd 20 0 &gpd 21 0
+ &gpd 22 0 &gpd 23 0 &gpd 24 0 &gpd 26 0>;
+ col-gpios = <&gpc 10 0 &gpc 11 0 &gpc 12 0 &gpc 13 0
+ &gpc 14 0 &gpc 15 0 &gpc 16 0 &gpc 17 0>;
+ gpio-activelow;
+
+ linux,keymap = <
+ MATRIX_KEY(0, 0, KEY_F1) /* S2 */
+ MATRIX_KEY(0, 1, KEY_F2) /* S3 */
+ MATRIX_KEY(0, 2, KEY_F3) /* S4 */
+ MATRIX_KEY(0, 3, KEY_F4) /* S5 */
+ MATRIX_KEY(0, 4, KEY_F5) /* S6 */
+ MATRIX_KEY(0, 5, KEY_F6) /* S7 */
+ MATRIX_KEY(0, 6, KEY_F7) /* S8 */
+
+ MATRIX_KEY(1, 0, KEY_Q) /* S10 */
+ MATRIX_KEY(1, 1, KEY_W) /* S11 */
+ MATRIX_KEY(1, 2, KEY_E) /* S12 */
+ MATRIX_KEY(1, 3, KEY_R) /* S13 */
+ MATRIX_KEY(1, 4, KEY_T) /* S14 */
+ MATRIX_KEY(1, 5, KEY_Y) /* S15 */
+ MATRIX_KEY(1, 6, KEY_U) /* S16 */
+ MATRIX_KEY(1, 7, KEY_I) /* S17 */
+ MATRIX_KEY(2, 0, KEY_A) /* S18 */
+ MATRIX_KEY(2, 1, KEY_S) /* S19 */
+ MATRIX_KEY(2, 2, KEY_D) /* S20 */
+ MATRIX_KEY(2, 3, KEY_F) /* S21 */
+ MATRIX_KEY(2, 4, KEY_G) /* S22 */
+ MATRIX_KEY(2, 5, KEY_H) /* S23 */
+ MATRIX_KEY(2, 6, KEY_J) /* S24 */
+ MATRIX_KEY(2, 7, KEY_K) /* S25 */
+ MATRIX_KEY(3, 0, KEY_ESC) /* S26 */
+ MATRIX_KEY(3, 1, KEY_Z) /* S27 */
+ MATRIX_KEY(3, 2, KEY_X) /* S28 */
+ MATRIX_KEY(3, 3, KEY_C) /* S29 */
+ MATRIX_KEY(3, 4, KEY_V) /* S30 */
+ MATRIX_KEY(3, 5, KEY_B) /* S31 */
+ MATRIX_KEY(3, 6, KEY_N) /* S32 */
+ MATRIX_KEY(3, 7, KEY_M) /* S33 */
+ MATRIX_KEY(4, 0, KEY_TAB) /* S34 */
+ MATRIX_KEY(4, 1, KEY_CAPSLOCK) /* S35 */
+ MATRIX_KEY(4, 2, KEY_BACKSLASH) /* S36 */
+ MATRIX_KEY(4, 3, KEY_APOSTROPHE) /* S37 */
+ MATRIX_KEY(4, 4, KEY_COMMA) /* S38 */
+ MATRIX_KEY(4, 5, KEY_DOT) /* S39 */
+ MATRIX_KEY(4, 6, KEY_SLASH) /* S40 */
+ MATRIX_KEY(4, 7, KEY_UP) /* S41 */
+ MATRIX_KEY(5, 0, KEY_O) /* S42 */
+ MATRIX_KEY(5, 1, KEY_L) /* S43 */
+ MATRIX_KEY(5, 2, KEY_EQUAL) /* S44 */
+ MATRIX_KEY(5, 3, KEY_QI_UPRED) /* S45 */
+ MATRIX_KEY(5, 4, KEY_SPACE) /* S46 */
+ MATRIX_KEY(5, 5, KEY_QI_QI) /* S47 */
+ MATRIX_KEY(5, 6, KEY_RIGHTCTRL) /* S48 */
+ MATRIX_KEY(5, 7, KEY_LEFT) /* S49 */
+ MATRIX_KEY(6, 0, KEY_F8) /* S50 */
+ MATRIX_KEY(6, 1, KEY_P) /* S51 */
+ MATRIX_KEY(6, 2, KEY_BACKSPACE)/* S52 */
+ MATRIX_KEY(6, 3, KEY_ENTER) /* S53 */
+ MATRIX_KEY(6, 4, KEY_QI_VOLUP) /* S54 */
+ MATRIX_KEY(6, 5, KEY_QI_VOLDOWN) /* S55 */
+ MATRIX_KEY(6, 6, KEY_DOWN) /* S56 */
+ MATRIX_KEY(6, 7, KEY_RIGHT) /* S57 */
+
+ MATRIX_KEY(7, 0, KEY_LEFTSHIFT) /* S58 */
+ MATRIX_KEY(7, 1, KEY_LEFTALT) /* S59 */
+ MATRIX_KEY(7, 2, KEY_QI_FN) /* S60 */
+ >;
+ };
+
+ spi {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sck-gpios = <&gpc 23 GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpc 22 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpc 21 GPIO_ACTIVE_LOW>;
+ num-chipselects = <1>;
+
+ spi@0 {
+ compatible = "ili8960";
+ reg = <0>;
+ spi-max-frequency = <30000>;
+ spi-3wire;
+ };
+ };
+
+ usb_charger: charger {
+ compatible = "gpio-charger";
+ charger-type = "usb-sdp";
+ gpios = <&gpd 28 GPIO_ACTIVE_LOW>;
+ status-gpios = <&gpc 27 GPIO_ACTIVE_LOW>;
+ };
+
+ simple_battery: battery {
+ compatible = "simple-battery";
+ voltage-min-design-microvolt = <3600000>;
+ voltage-max-design-microvolt = <4200000>;
+ };
+
+ pmu {
+ compatible = "ingenic,jz4740-battery";
+ io-channels = <&adc INGENIC_ADC_BATTERY>;
+ io-channel-names = "battery";
+ power-supplies = <&usb_charger>;
+ monitored-battery = <&simple_battery>;
+ };
+
+ hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc INGENIC_ADC_AUX>;
+ };
+
+ panel: panel {
+ compatible = "giantplus,gpm940b0";
+
+ power-supply = <&vcc>;
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&panel_output>;
+ };
+ };
+ };
+
+ usb_phy: usb-phy {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+
+ vcc-supply = <&vcc>;
+ };
};
&ext {
@@ -34,7 +250,84 @@
pinctrl-0 = <&pins_uart0>;
};
+&uart1 {
+ status = "disabled";
+};
+
+&nemc {
+ nandc: nand-controller@1 {
+ compatible = "ingenic,jz4740-nand";
+ reg = <1 0 0x4000000>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ingenic,bch-controller = <&ecc>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_nemc>;
+
+ rb-gpios = <&gpc 30 GPIO_ACTIVE_LOW>;
+
+ nand@1 {
+ reg = <1>;
+
+ nand-ecc-step-size = <512>;
+ nand-ecc-strength = <4>;
+ nand-ecc-mode = "hw";
+ nand-is-boot-medium;
+ nand-on-flash-bbt;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x0 0x400000>;
+ };
+
+ partition@400000 {
+ label = "kernel";
+ reg = <0x400000 0x400000>;
+ };
+
+ partition@800000 {
+ label = "rootfs";
+ reg = <0x800000 0x0>;
+ };
+ };
+ };
+ };
+};
+
+&lcd {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_lcd>;
+
+ port {
+ panel_output: endpoint {
+ remote-endpoint = <&panel_input>;
+ };
+ };
+};
+
+&udc {
+ phys = <&usb_phy>;
+};
+
&pinctrl {
+ pins_lcd: lcd {
+ function = "lcd";
+ groups = "lcd-8bit";
+ };
+
+ pins_nemc: nemc {
+ function = "nand";
+ groups = "nand-cs1";
+ };
+
pins_uart0: uart0 {
function = "uart0";
groups = "uart0-data";
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index 88d6aa7d000b..390c82adc00c 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -10,10 +10,6 @@ obj-y += prom.o time.o reset.o setup.o \
CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
-# board specific support
-
-obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
-
# PM support
obj-$(CONFIG_PM) += pm.o
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
deleted file mode 100644
index f9dab810aab2..000000000000
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ /dev/null
@@ -1,491 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * linux/arch/mips/jz4740/board-qi_lb60.c
- *
- * QI_LB60 board support
- *
- * Copyright (c) 2009 Qi Hardware inc.,
- * Author: Xiangfu Liu <xiangfu@qi-hardware.com>
- * Copyright 2010, Lars-Peter Clausen <lars@metafoo.de>
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/gpio.h>
-#include <linux/gpio/machine.h>
-
-#include <linux/input.h>
-#include <linux/gpio_keys.h>
-#include <linux/input/matrix_keypad.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spi_gpio.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf-generic.h>
-#include <linux/power_supply.h>
-#include <linux/power/jz4740-battery.h>
-#include <linux/power/gpio-charger.h>
-#include <linux/pwm.h>
-
-#include <linux/platform_data/jz4740/jz4740_nand.h>
-
-#include <asm/mach-jz4740/gpio.h>
-#include <asm/mach-jz4740/jz4740_fb.h>
-
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-
-#include <asm/mach-jz4740/platform.h>
-
-/* GPIOs */
-#define QI_LB60_GPIO_KEYOUT(x) (JZ_GPIO_PORTC(10) + (x))
-#define QI_LB60_GPIO_KEYIN(x) (JZ_GPIO_PORTD(18) + (x))
-#define QI_LB60_GPIO_KEYIN8 JZ_GPIO_PORTD(26)
-
-/* NAND */
-
-/* Early prototypes of the QI LB60 had only 1GB of NAND.
- * In order to support these devices as well the partition and ecc layout is
- * initialized depending on the NAND size */
-static struct mtd_partition qi_lb60_partitions_1gb[] = {
- {
- .name = "NAND BOOT partition",
- .offset = 0 * 0x100000,
- .size = 4 * 0x100000,
- },
- {
- .name = "NAND KERNEL partition",
- .offset = 4 * 0x100000,
- .size = 4 * 0x100000,
- },
- {
- .name = "NAND ROOTFS partition",
- .offset = 8 * 0x100000,
- .size = (504 + 512) * 0x100000,
- },
-};
-
-static struct mtd_partition qi_lb60_partitions_2gb[] = {
- {
- .name = "NAND BOOT partition",
- .offset = 0 * 0x100000,
- .size = 4 * 0x100000,
- },
- {
- .name = "NAND KERNEL partition",
- .offset = 4 * 0x100000,
- .size = 4 * 0x100000,
- },
- {
- .name = "NAND ROOTFS partition",
- .offset = 8 * 0x100000,
- .size = (504 + 512 + 1024) * 0x100000,
- },
-};
-
-static int qi_lb60_ooblayout_ecc(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- if (section)
- return -ERANGE;
-
- oobregion->length = 36;
- oobregion->offset = 6;
-
- if (mtd->oobsize == 128) {
- oobregion->length *= 2;
- oobregion->offset *= 2;
- }
-
- return 0;
-}
-
-static int qi_lb60_ooblayout_free(struct mtd_info *mtd, int section,
- struct mtd_oob_region *oobregion)
-{
- int eccbytes = 36, eccoff = 6;
-
- if (section > 1)
- return -ERANGE;
-
- if (mtd->oobsize == 128) {
- eccbytes *= 2;
- eccoff *= 2;
- }
-
- if (!section) {
- oobregion->offset = 2;
- oobregion->length = eccoff - 2;
- } else {
- oobregion->offset = eccoff + eccbytes;
- oobregion->length = mtd->oobsize - oobregion->offset;
- }
-
- return 0;
-}
-
-static const struct mtd_ooblayout_ops qi_lb60_ooblayout_ops = {
- .ecc = qi_lb60_ooblayout_ecc,
- .free = qi_lb60_ooblayout_free,
-};
-
-static void qi_lb60_nand_ident(struct platform_device *pdev,
- struct mtd_info *mtd, struct mtd_partition **partitions,
- int *num_partitions)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
-
- if (chip->page_shift == 12) {
- *partitions = qi_lb60_partitions_2gb;
- *num_partitions = ARRAY_SIZE(qi_lb60_partitions_2gb);
- } else {
- *partitions = qi_lb60_partitions_1gb;
- *num_partitions = ARRAY_SIZE(qi_lb60_partitions_1gb);
- }
-
- mtd_set_ooblayout(mtd, &qi_lb60_ooblayout_ops);
-}
-
-static struct jz_nand_platform_data qi_lb60_nand_pdata = {
- .ident_callback = qi_lb60_nand_ident,
- .banks = { 1 },
-};
-
-static struct gpiod_lookup_table qi_lb60_nand_gpio_table = {
- .dev_id = "jz4740-nand.0",
- .table = {
- GPIO_LOOKUP("GPIOC", 30, "busy", 0),
- { },
- },
-};
-
-
-/* Keyboard*/
-
-#define KEY_QI_QI KEY_F13
-#define KEY_QI_UPRED KEY_RIGHTALT
-#define KEY_QI_VOLUP KEY_VOLUMEUP
-#define KEY_QI_VOLDOWN KEY_VOLUMEDOWN
-#define KEY_QI_FN KEY_LEFTCTRL
-
-static const uint32_t qi_lb60_keymap[] = {
- KEY(0, 0, KEY_F1), /* S2 */
- KEY(0, 1, KEY_F2), /* S3 */
- KEY(0, 2, KEY_F3), /* S4 */
- KEY(0, 3, KEY_F4), /* S5 */
- KEY(0, 4, KEY_F5), /* S6 */
- KEY(0, 5, KEY_F6), /* S7 */
- KEY(0, 6, KEY_F7), /* S8 */
-
- KEY(1, 0, KEY_Q), /* S10 */
- KEY(1, 1, KEY_W), /* S11 */
- KEY(1, 2, KEY_E), /* S12 */
- KEY(1, 3, KEY_R), /* S13 */
- KEY(1, 4, KEY_T), /* S14 */
- KEY(1, 5, KEY_Y), /* S15 */
- KEY(1, 6, KEY_U), /* S16 */
- KEY(1, 7, KEY_I), /* S17 */
- KEY(2, 0, KEY_A), /* S18 */
- KEY(2, 1, KEY_S), /* S19 */
- KEY(2, 2, KEY_D), /* S20 */
- KEY(2, 3, KEY_F), /* S21 */
- KEY(2, 4, KEY_G), /* S22 */
- KEY(2, 5, KEY_H), /* S23 */
- KEY(2, 6, KEY_J), /* S24 */
- KEY(2, 7, KEY_K), /* S25 */
- KEY(3, 0, KEY_ESC), /* S26 */
- KEY(3, 1, KEY_Z), /* S27 */
- KEY(3, 2, KEY_X), /* S28 */
- KEY(3, 3, KEY_C), /* S29 */
- KEY(3, 4, KEY_V), /* S30 */
- KEY(3, 5, KEY_B), /* S31 */
- KEY(3, 6, KEY_N), /* S32 */
- KEY(3, 7, KEY_M), /* S33 */
- KEY(4, 0, KEY_TAB), /* S34 */
- KEY(4, 1, KEY_CAPSLOCK), /* S35 */
- KEY(4, 2, KEY_BACKSLASH), /* S36 */
- KEY(4, 3, KEY_APOSTROPHE), /* S37 */
- KEY(4, 4, KEY_COMMA), /* S38 */
- KEY(4, 5, KEY_DOT), /* S39 */
- KEY(4, 6, KEY_SLASH), /* S40 */
- KEY(4, 7, KEY_UP), /* S41 */
- KEY(5, 0, KEY_O), /* S42 */
- KEY(5, 1, KEY_L), /* S43 */
- KEY(5, 2, KEY_EQUAL), /* S44 */
- KEY(5, 3, KEY_QI_UPRED), /* S45 */
- KEY(5, 4, KEY_SPACE), /* S46 */
- KEY(5, 5, KEY_QI_QI), /* S47 */
- KEY(5, 6, KEY_RIGHTCTRL), /* S48 */
- KEY(5, 7, KEY_LEFT), /* S49 */
- KEY(6, 0, KEY_F8), /* S50 */
- KEY(6, 1, KEY_P), /* S51 */
- KEY(6, 2, KEY_BACKSPACE),/* S52 */
- KEY(6, 3, KEY_ENTER), /* S53 */
- KEY(6, 4, KEY_QI_VOLUP), /* S54 */
- KEY(6, 5, KEY_QI_VOLDOWN), /* S55 */
- KEY(6, 6, KEY_DOWN), /* S56 */
- KEY(6, 7, KEY_RIGHT), /* S57 */
-
- KEY(7, 0, KEY_LEFTSHIFT), /* S58 */
- KEY(7, 1, KEY_LEFTALT), /* S59 */
- KEY(7, 2, KEY_QI_FN), /* S60 */
-};
-
-static const struct matrix_keymap_data qi_lb60_keymap_data = {
- .keymap = qi_lb60_keymap,
- .keymap_size = ARRAY_SIZE(qi_lb60_keymap),
-};
-
-static const unsigned int qi_lb60_keypad_cols[] = {
- QI_LB60_GPIO_KEYOUT(0),
- QI_LB60_GPIO_KEYOUT(1),
- QI_LB60_GPIO_KEYOUT(2),
- QI_LB60_GPIO_KEYOUT(3),
- QI_LB60_GPIO_KEYOUT(4),
- QI_LB60_GPIO_KEYOUT(5),
- QI_LB60_GPIO_KEYOUT(6),
- QI_LB60_GPIO_KEYOUT(7),
-};
-
-static const unsigned int qi_lb60_keypad_rows[] = {
- QI_LB60_GPIO_KEYIN(0),
- QI_LB60_GPIO_KEYIN(1),
- QI_LB60_GPIO_KEYIN(2),
- QI_LB60_GPIO_KEYIN(3),
- QI_LB60_GPIO_KEYIN(4),
- QI_LB60_GPIO_KEYIN(5),
- QI_LB60_GPIO_KEYIN(6),
- QI_LB60_GPIO_KEYIN8,
-};
-
-static struct matrix_keypad_platform_data qi_lb60_pdata = {
- .keymap_data = &qi_lb60_keymap_data,
- .col_gpios = qi_lb60_keypad_cols,
- .row_gpios = qi_lb60_keypad_rows,
- .num_col_gpios = ARRAY_SIZE(qi_lb60_keypad_cols),
- .num_row_gpios = ARRAY_SIZE(qi_lb60_keypad_rows),
- .col_scan_delay_us = 10,
- .debounce_ms = 10,
- .wakeup = 1,
- .active_low = 1,
-};
-
-static struct platform_device qi_lb60_keypad = {
- .name = "matrix-keypad",
- .id = -1,
- .dev = {
- .platform_data = &qi_lb60_pdata,
- },
-};
-
-/* Display */
-static struct fb_videomode qi_lb60_video_modes[] = {
- {
- .name = "320x240",
- .xres = 320,
- .yres = 240,
- .refresh = 30,
- .left_margin = 140,
- .right_margin = 273,
- .upper_margin = 20,
- .lower_margin = 2,
- .hsync_len = 1,
- .vsync_len = 1,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED,
- },
-};
-
-static struct jz4740_fb_platform_data qi_lb60_fb_pdata = {
- .width = 60,
- .height = 45,
- .num_modes = ARRAY_SIZE(qi_lb60_video_modes),
- .modes = qi_lb60_video_modes,
- .bpp = 24,
- .lcd_type = JZ_LCD_TYPE_8BIT_SERIAL,
- .pixclk_falling_edge = 1,
-};
-
-struct spi_gpio_platform_data qi_lb60_spigpio_platform_data = {
- .num_chipselect = 1,
-};
-
-static struct platform_device qi_lb60_spigpio_device = {
- .name = "spi_gpio",
- .id = 1,
- .dev = {
- .platform_data = &qi_lb60_spigpio_platform_data,
- },
-};
-
-static struct gpiod_lookup_table qi_lb60_spigpio_gpio_table = {
- .dev_id = "spi_gpio",
- .table = {
- GPIO_LOOKUP("GPIOC", 23,
- "sck", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("GPIOC", 22,
- "mosi", GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP("GPIOC", 21,
- "cs", GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-static struct spi_board_info qi_lb60_spi_board_info[] = {
- {
- .modalias = "ili8960",
- .chip_select = 0,
- .bus_num = 1,
- .max_speed_hz = 30 * 1000,
- .mode = SPI_3WIRE,
- },
-};
-
-/* Battery */
-static struct jz_battery_platform_data qi_lb60_battery_pdata = {
- .gpio_charge = JZ_GPIO_PORTC(27),
- .gpio_charge_active_low = 1,
- .info = {
- .name = "battery",
- .technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
- .voltage_max_design = 4200000,
- .voltage_min_design = 3600000,
- },
-};
-
-/* GPIO Key: power */
-static struct gpio_keys_button qi_lb60_gpio_keys_buttons[] = {
- [0] = {
- .code = KEY_POWER,
- .gpio = JZ_GPIO_PORTD(29),
- .active_low = 1,
- .desc = "Power",
- .wakeup = 1,
- },
-};
-
-static struct gpio_keys_platform_data qi_lb60_gpio_keys_data = {
- .nbuttons = ARRAY_SIZE(qi_lb60_gpio_keys_buttons),
- .buttons = qi_lb60_gpio_keys_buttons,
-};
-
-static struct platform_device qi_lb60_gpio_keys = {
- .name = "gpio-keys",
- .id = -1,
- .dev = {
- .platform_data = &qi_lb60_gpio_keys_data,
- }
-};
-
-/* beeper */
-static struct pwm_lookup qi_lb60_pwm_lookup[] = {
- PWM_LOOKUP("jz4740-pwm", 4, "pwm-beeper", NULL, 0,
- PWM_POLARITY_NORMAL),
-};
-
-static struct platform_device qi_lb60_pwm_beeper = {
- .name = "pwm-beeper",
- .id = -1,
-};
-
-/* charger */
-static char *qi_lb60_batteries[] = {
- "battery",
-};
-
-static struct gpio_charger_platform_data qi_lb60_charger_pdata = {
- .name = "usb",
- .type = POWER_SUPPLY_TYPE_USB,
- .gpio = JZ_GPIO_PORTD(28),
- .gpio_active_low = 1,
- .supplied_to = qi_lb60_batteries,
- .num_supplicants = ARRAY_SIZE(qi_lb60_batteries),
-};
-
-static struct platform_device qi_lb60_charger_device = {
- .name = "gpio-charger",
- .dev = {
- .platform_data = &qi_lb60_charger_pdata,
- },
-};
-
-/* audio */
-static struct platform_device qi_lb60_audio_device = {
- .name = "qi-lb60-audio",
- .id = -1,
-};
-
-static struct gpiod_lookup_table qi_lb60_audio_gpio_table = {
- .dev_id = "qi-lb60-audio",
- .table = {
- GPIO_LOOKUP("GPIOB", 29, "snd", 0),
- GPIO_LOOKUP("GPIOD", 4, "amp", 0),
- { },
- },
-};
-
-static struct platform_device *jz_platform_devices[] __initdata = {
- &jz4740_udc_device,
- &jz4740_udc_xceiv_device,
- &jz4740_nand_device,
- &qi_lb60_keypad,
- &qi_lb60_spigpio_device,
- &jz4740_framebuffer_device,
- &jz4740_pcm_device,
- &jz4740_i2s_device,
- &jz4740_codec_device,
- &jz4740_adc_device,
- &jz4740_pwm_device,
- &qi_lb60_gpio_keys,
- &qi_lb60_pwm_beeper,
- &qi_lb60_charger_device,
- &qi_lb60_audio_device,
-};
-
-static struct pinctrl_map pin_map[] __initdata = {
- /* NAND pin configuration */
- PIN_MAP_MUX_GROUP_DEFAULT("jz4740-nand",
- "10010000.pin-controller", "nand-cs1", "nand"),
-
- /* fbdev pin configuration */
- PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_DEFAULT,
- "10010000.pin-controller", "lcd-8bit", "lcd"),
- PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_SLEEP,
- "10010000.pin-controller", "lcd-no-pins", "lcd"),
-
- /* PWM pin configuration */
- PIN_MAP_MUX_GROUP_DEFAULT("jz4740-pwm",
- "10010000.pin-controller", "pwm4", "pwm4"),
-};
-
-
-static int __init qi_lb60_init_platform_devices(void)
-{
- jz4740_framebuffer_device.dev.platform_data = &qi_lb60_fb_pdata;
- jz4740_nand_device.dev.platform_data = &qi_lb60_nand_pdata;
- jz4740_adc_device.dev.platform_data = &qi_lb60_battery_pdata;
-
- gpiod_add_lookup_table(&qi_lb60_audio_gpio_table);
- gpiod_add_lookup_table(&qi_lb60_nand_gpio_table);
- gpiod_add_lookup_table(&qi_lb60_spigpio_gpio_table);
-
- spi_register_board_info(qi_lb60_spi_board_info,
- ARRAY_SIZE(qi_lb60_spi_board_info));
-
- pwm_add_table(qi_lb60_pwm_lookup, ARRAY_SIZE(qi_lb60_pwm_lookup));
- pinctrl_register_mappings(pin_map, ARRAY_SIZE(pin_map));
-
- return platform_add_devices(jz_platform_devices,
- ARRAY_SIZE(jz_platform_devices));
-
-}
-
-static int __init qi_lb60_board_setup(void)
-{
- printk(KERN_INFO "Qi Hardware JZ4740 QI LB60 setup\n");
-
- if (qi_lb60_init_platform_devices())
- panic("Failed to initialize platform devices");
-
- return 0;
-}
-arch_initcall(qi_lb60_board_setup);
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 03/11] MIPS: configs: LB60: update defconfig
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
Update the defconfig to select the new drivers instead of the old ones.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
arch/mips/configs/qi_lb60_defconfig | 44 ++++++++++++++---------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/mips/configs/qi_lb60_defconfig b/arch/mips/configs/qi_lb60_defconfig
index 208da8a55f48..d3f4d5248d9f 100644
--- a/arch/mips/configs/qi_lb60_defconfig
+++ b/arch/mips/configs/qi_lb60_defconfig
@@ -1,7 +1,6 @@
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
# CONFIG_CROSS_MEMORY_ATTACH is not set
-CONFIG_PREEMPT=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS_ALL=y
@@ -17,9 +16,8 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
# CONFIG_EFI_PARTITION is not set
-# CONFIG_IOSCHED_CFQ is not set
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-# CONFIG_COMPACTION is not set
+CONFIG_CMA=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
@@ -31,9 +29,6 @@ CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_MROUTE=y
CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
CONFIG_TCP_CONG_ADVANCED=y
# CONFIG_TCP_CONG_BIC is not set
@@ -44,7 +39,8 @@ CONFIG_TCP_CONG_WESTWOOD=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_RAW_NAND=y
-CONFIG_MTD_NAND_JZ4740=y
+CONFIG_MTD_NAND_JZ4780=y
+CONFIG_MTD_NAND_JZ4740_ECC=y
CONFIG_MTD_UBI=y
CONFIG_NETDEVICES=y
# CONFIG_WLAN is not set
@@ -66,18 +62,20 @@ CONFIG_SERIAL_8250_INGENIC=y
CONFIG_SPI=y
CONFIG_SPI_GPIO=y
CONFIG_POWER_SUPPLY=y
-CONFIG_BATTERY_JZ4740=y
+CONFIG_BATTERY_INGENIC=y
CONFIG_CHARGER_GPIO=y
-# CONFIG_HWMON is not set
+CONFIG_SENSORS_IIO_HWMON=y
CONFIG_WATCHDOG=y
CONFIG_JZ4740_WDT=y
-CONFIG_MFD_JZ4740_ADC=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_FB=y
-CONFIG_FB_JZ4740=y
-CONFIG_LCD_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+CONFIG_DRM=y
+CONFIG_DRM_FBDEV_OVERALLOC=200
+CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_INGENIC=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
@@ -92,13 +90,13 @@ CONFIG_SND=y
# CONFIG_SND_SPI is not set
# CONFIG_SND_MIPS is not set
CONFIG_SND_SOC=y
-CONFIG_SND_JZ4740_SOC=y
-CONFIG_SND_JZ4740_SOC_QI_LB60=y
-CONFIG_USB=y
-CONFIG_USB_OTG_BLACKLIST_HUB=y
+CONFIG_SND_JZ4740_SOC_I2S=y
+CONFIG_SND_SOC_JZ4740_CODEC=y
+CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y
+CONFIG_SND_SIMPLE_CARD=y
CONFIG_USB_MUSB_HDRC=y
-CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_MUSB_JZ4740=y
+CONFIG_USB_INVENTRA_DMA=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG=y
@@ -109,11 +107,13 @@ CONFIG_MMC_JZ4740=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_JZ4740=y
CONFIG_DMADEVICES=y
-CONFIG_DMA_JZ4740=y
+CONFIG_DMA_JZ4780=y
+CONFIG_MEMORY=y
+CONFIG_IIO=y
+CONFIG_INGENIC_ADC=y
CONFIG_PWM=y
CONFIG_PWM_JZ4740=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_VFAT_FS=y
CONFIG_PROC_KCORE=y
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 04/11] ASoC: jz4740: Drop lb60 board code
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
The board now uses the simple-audio-card driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
sound/soc/jz4740/Kconfig | 25 +--------
sound/soc/jz4740/Makefile | 5 --
sound/soc/jz4740/qi_lb60.c | 106 -------------------------------------
3 files changed, 2 insertions(+), 134 deletions(-)
delete mode 100644 sound/soc/jz4740/qi_lb60.c
diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
index 6b757168693e..e72f826062e9 100644
--- a/sound/soc/jz4740/Kconfig
+++ b/sound/soc/jz4740/Kconfig
@@ -1,30 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-only
-config SND_JZ4740_SOC
- tristate "SoC Audio for Ingenic JZ4740 SoC"
- depends on MIPS || COMPILE_TEST
- select SND_SOC_GENERIC_DMAENGINE_PCM
- help
- Say Y or M if you want to add support for codecs attached to
- the JZ4740 I2S interface. You will also need to select the audio
- interfaces to support below.
-
-if SND_JZ4740_SOC
-
config SND_JZ4740_SOC_I2S
tristate "SoC Audio (I2S protocol) for Ingenic JZ4740 SoC"
+ depends on MIPS || COMPILE_TEST
depends on HAS_IOMEM
+ select SND_SOC_GENERIC_DMAENGINE_PCM
help
Say Y if you want to use I2S protocol and I2S codec on Ingenic JZ4740
based boards.
-
-config SND_JZ4740_SOC_QI_LB60
- tristate "SoC Audio support for Qi LB60"
- depends on HAS_IOMEM
- depends on JZ4740_QI_LB60 || COMPILE_TEST
- select SND_JZ4740_SOC_I2S
- select SND_SOC_JZ4740_CODEC
- help
- Say Y if you want to add support for ASoC audio on the Qi LB60 board
- a.k.a Qi Ben NanoNote.
-
-endif
diff --git a/sound/soc/jz4740/Makefile b/sound/soc/jz4740/Makefile
index fb10e9ad9ff7..f8701c9b09fe 100644
--- a/sound/soc/jz4740/Makefile
+++ b/sound/soc/jz4740/Makefile
@@ -5,8 +5,3 @@
snd-soc-jz4740-i2s-objs := jz4740-i2s.o
obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o
-
-# Jz4740 Machine Support
-snd-soc-qi-lb60-objs := qi_lb60.o
-
-obj-$(CONFIG_SND_JZ4740_SOC_QI_LB60) += snd-soc-qi-lb60.o
diff --git a/sound/soc/jz4740/qi_lb60.c b/sound/soc/jz4740/qi_lb60.c
deleted file mode 100644
index 8ef6f41dcfbe..000000000000
--- a/sound/soc/jz4740/qi_lb60.c
+++ /dev/null
@@ -1,106 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/timer.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/soc.h>
-#include <linux/gpio/consumer.h>
-
-struct qi_lb60 {
- struct gpio_desc *snd_gpio;
- struct gpio_desc *amp_gpio;
-};
-
-static int qi_lb60_spk_event(struct snd_soc_dapm_widget *widget,
- struct snd_kcontrol *ctrl, int event)
-{
- struct qi_lb60 *qi_lb60 = snd_soc_card_get_drvdata(widget->dapm->card);
- int on = !SND_SOC_DAPM_EVENT_OFF(event);
-
- gpiod_set_value_cansleep(qi_lb60->snd_gpio, on);
- gpiod_set_value_cansleep(qi_lb60->amp_gpio, on);
-
- return 0;
-}
-
-static const struct snd_soc_dapm_widget qi_lb60_widgets[] = {
- SND_SOC_DAPM_SPK("Speaker", qi_lb60_spk_event),
- SND_SOC_DAPM_MIC("Mic", NULL),
-};
-
-static const struct snd_soc_dapm_route qi_lb60_routes[] = {
- {"Mic", NULL, "MIC"},
- {"Speaker", NULL, "LOUT"},
- {"Speaker", NULL, "ROUT"},
-};
-
-SND_SOC_DAILINK_DEFS(hifi,
- DAILINK_COMP_ARRAY(COMP_CPU("jz4740-i2s")),
- DAILINK_COMP_ARRAY(COMP_CODEC("jz4740-codec", "jz4740-hifi")),
- DAILINK_COMP_ARRAY(COMP_PLATFORM("jz4740-i2s")));
-
-static struct snd_soc_dai_link qi_lb60_dai = {
- .name = "jz4740",
- .stream_name = "jz4740",
- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBM_CFM,
- SND_SOC_DAILINK_REG(hifi),
-};
-
-static struct snd_soc_card qi_lb60_card = {
- .name = "QI LB60",
- .owner = THIS_MODULE,
- .dai_link = &qi_lb60_dai,
- .num_links = 1,
-
- .dapm_widgets = qi_lb60_widgets,
- .num_dapm_widgets = ARRAY_SIZE(qi_lb60_widgets),
- .dapm_routes = qi_lb60_routes,
- .num_dapm_routes = ARRAY_SIZE(qi_lb60_routes),
- .fully_routed = true,
-};
-
-static int qi_lb60_probe(struct platform_device *pdev)
-{
- struct qi_lb60 *qi_lb60;
- struct snd_soc_card *card = &qi_lb60_card;
-
- qi_lb60 = devm_kzalloc(&pdev->dev, sizeof(*qi_lb60), GFP_KERNEL);
- if (!qi_lb60)
- return -ENOMEM;
-
- qi_lb60->snd_gpio = devm_gpiod_get(&pdev->dev, "snd", GPIOD_OUT_LOW);
- if (IS_ERR(qi_lb60->snd_gpio))
- return PTR_ERR(qi_lb60->snd_gpio);
-
- qi_lb60->amp_gpio = devm_gpiod_get(&pdev->dev, "amp", GPIOD_OUT_LOW);
- if (IS_ERR(qi_lb60->amp_gpio))
- return PTR_ERR(qi_lb60->amp_gpio);
-
- card->dev = &pdev->dev;
-
- snd_soc_card_set_drvdata(card, qi_lb60);
-
- return devm_snd_soc_register_card(&pdev->dev, card);
-}
-
-static struct platform_driver qi_lb60_driver = {
- .driver = {
- .name = "qi-lb60-audio",
- },
- .probe = qi_lb60_probe,
-};
-
-module_platform_driver(qi_lb60_driver);
-
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_DESCRIPTION("ALSA SoC QI LB60 Audio support");
-MODULE_LICENSE("GPL v2");
-MODULE_ALIAS("platform:qi-lb60-audio");
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 05/11] video/fbdev: Drop JZ4740 driver
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
The JZ4740 fbdev driver has been replaced with the ingenic-drm driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
drivers/video/fbdev/Kconfig | 9 -
drivers/video/fbdev/Makefile | 1 -
drivers/video/fbdev/jz4740_fb.c | 690 --------------------------------
3 files changed, 700 deletions(-)
delete mode 100644 drivers/video/fbdev/jz4740_fb.c
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index 6b2de93bd302..6fce711f42c5 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -2211,15 +2211,6 @@ config FB_BROADSHEET
and could also have been called by other names when coupled with
a bridge adapter.
-config FB_JZ4740
- tristate "JZ4740 LCD framebuffer support"
- depends on FB && MACH_JZ4740
- select FB_SYS_FILLRECT
- select FB_SYS_COPYAREA
- select FB_SYS_IMAGEBLIT
- help
- Framebuffer support for the JZ4740 SoC.
-
config FB_PUV3_UNIGFX
tristate "PKUnity v3 Unigfx framebuffer support"
depends on FB && UNICORE32 && ARCH_PUV3
diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile
index 7dc4861a93e6..49502d6256cb 100644
--- a/drivers/video/fbdev/Makefile
+++ b/drivers/video/fbdev/Makefile
@@ -117,7 +117,6 @@ obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o
obj-$(CONFIG_FB_CARMINE) += carminefb.o
obj-$(CONFIG_FB_MB862XX) += mb862xx/
obj-$(CONFIG_FB_NUC900) += nuc900fb.o
-obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o
obj-$(CONFIG_FB_PUV3_UNIGFX) += fb-puv3.o
obj-$(CONFIG_FB_HYPERV) += hyperv_fb.o
obj-$(CONFIG_FB_OPENCORES) += ocfb.o
diff --git a/drivers/video/fbdev/jz4740_fb.c b/drivers/video/fbdev/jz4740_fb.c
deleted file mode 100644
index 0b6fa25f6924..000000000000
--- a/drivers/video/fbdev/jz4740_fb.c
+++ /dev/null
@@ -1,690 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 SoC LCD framebuffer driver
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/platform_device.h>
-#include <linux/pinctrl/consumer.h>
-
-#include <linux/clk.h>
-#include <linux/delay.h>
-
-#include <linux/console.h>
-#include <linux/fb.h>
-
-#include <linux/dma-mapping.h>
-
-#include <asm/mach-jz4740/jz4740_fb.h>
-
-#define JZ_REG_LCD_CFG 0x00
-#define JZ_REG_LCD_VSYNC 0x04
-#define JZ_REG_LCD_HSYNC 0x08
-#define JZ_REG_LCD_VAT 0x0C
-#define JZ_REG_LCD_DAH 0x10
-#define JZ_REG_LCD_DAV 0x14
-#define JZ_REG_LCD_PS 0x18
-#define JZ_REG_LCD_CLS 0x1C
-#define JZ_REG_LCD_SPL 0x20
-#define JZ_REG_LCD_REV 0x24
-#define JZ_REG_LCD_CTRL 0x30
-#define JZ_REG_LCD_STATE 0x34
-#define JZ_REG_LCD_IID 0x38
-#define JZ_REG_LCD_DA0 0x40
-#define JZ_REG_LCD_SA0 0x44
-#define JZ_REG_LCD_FID0 0x48
-#define JZ_REG_LCD_CMD0 0x4C
-#define JZ_REG_LCD_DA1 0x50
-#define JZ_REG_LCD_SA1 0x54
-#define JZ_REG_LCD_FID1 0x58
-#define JZ_REG_LCD_CMD1 0x5C
-
-#define JZ_LCD_CFG_SLCD BIT(31)
-#define JZ_LCD_CFG_PS_DISABLE BIT(23)
-#define JZ_LCD_CFG_CLS_DISABLE BIT(22)
-#define JZ_LCD_CFG_SPL_DISABLE BIT(21)
-#define JZ_LCD_CFG_REV_DISABLE BIT(20)
-#define JZ_LCD_CFG_HSYNCM BIT(19)
-#define JZ_LCD_CFG_PCLKM BIT(18)
-#define JZ_LCD_CFG_INV BIT(17)
-#define JZ_LCD_CFG_SYNC_DIR BIT(16)
-#define JZ_LCD_CFG_PS_POLARITY BIT(15)
-#define JZ_LCD_CFG_CLS_POLARITY BIT(14)
-#define JZ_LCD_CFG_SPL_POLARITY BIT(13)
-#define JZ_LCD_CFG_REV_POLARITY BIT(12)
-#define JZ_LCD_CFG_HSYNC_ACTIVE_LOW BIT(11)
-#define JZ_LCD_CFG_PCLK_FALLING_EDGE BIT(10)
-#define JZ_LCD_CFG_DE_ACTIVE_LOW BIT(9)
-#define JZ_LCD_CFG_VSYNC_ACTIVE_LOW BIT(8)
-#define JZ_LCD_CFG_18_BIT BIT(7)
-#define JZ_LCD_CFG_PDW (BIT(5) | BIT(4))
-#define JZ_LCD_CFG_MODE_MASK 0xf
-
-#define JZ_LCD_CTRL_BURST_4 (0x0 << 28)
-#define JZ_LCD_CTRL_BURST_8 (0x1 << 28)
-#define JZ_LCD_CTRL_BURST_16 (0x2 << 28)
-#define JZ_LCD_CTRL_RGB555 BIT(27)
-#define JZ_LCD_CTRL_OFUP BIT(26)
-#define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24)
-#define JZ_LCD_CTRL_FRC_GRAYSCALE_4 (0x1 << 24)
-#define JZ_LCD_CTRL_FRC_GRAYSCALE_2 (0x2 << 24)
-#define JZ_LCD_CTRL_PDD_MASK (0xff << 16)
-#define JZ_LCD_CTRL_EOF_IRQ BIT(13)
-#define JZ_LCD_CTRL_SOF_IRQ BIT(12)
-#define JZ_LCD_CTRL_OFU_IRQ BIT(11)
-#define JZ_LCD_CTRL_IFU0_IRQ BIT(10)
-#define JZ_LCD_CTRL_IFU1_IRQ BIT(9)
-#define JZ_LCD_CTRL_DD_IRQ BIT(8)
-#define JZ_LCD_CTRL_QDD_IRQ BIT(7)
-#define JZ_LCD_CTRL_REVERSE_ENDIAN BIT(6)
-#define JZ_LCD_CTRL_LSB_FISRT BIT(5)
-#define JZ_LCD_CTRL_DISABLE BIT(4)
-#define JZ_LCD_CTRL_ENABLE BIT(3)
-#define JZ_LCD_CTRL_BPP_1 0x0
-#define JZ_LCD_CTRL_BPP_2 0x1
-#define JZ_LCD_CTRL_BPP_4 0x2
-#define JZ_LCD_CTRL_BPP_8 0x3
-#define JZ_LCD_CTRL_BPP_15_16 0x4
-#define JZ_LCD_CTRL_BPP_18_24 0x5
-
-#define JZ_LCD_CMD_SOF_IRQ BIT(31)
-#define JZ_LCD_CMD_EOF_IRQ BIT(30)
-#define JZ_LCD_CMD_ENABLE_PAL BIT(28)
-
-#define JZ_LCD_SYNC_MASK 0x3ff
-
-#define JZ_LCD_STATE_DISABLED BIT(0)
-
-struct jzfb_framedesc {
- uint32_t next;
- uint32_t addr;
- uint32_t id;
- uint32_t cmd;
-} __packed;
-
-struct jzfb {
- struct fb_info *fb;
- struct platform_device *pdev;
- void __iomem *base;
- struct resource *mem;
- struct jz4740_fb_platform_data *pdata;
-
- size_t vidmem_size;
- void *vidmem;
- dma_addr_t vidmem_phys;
- struct jzfb_framedesc *framedesc;
- dma_addr_t framedesc_phys;
-
- struct clk *ldclk;
- struct clk *lpclk;
-
- unsigned is_enabled:1;
- struct mutex lock;
-
- uint32_t pseudo_palette[16];
-};
-
-static const struct fb_fix_screeninfo jzfb_fix = {
- .id = "JZ4740 FB",
- .type = FB_TYPE_PACKED_PIXELS,
- .visual = FB_VISUAL_TRUECOLOR,
- .xpanstep = 0,
- .ypanstep = 0,
- .ywrapstep = 0,
- .accel = FB_ACCEL_NONE,
-};
-
-/* Based on CNVT_TOHW macro from skeletonfb.c */
-static inline uint32_t jzfb_convert_color_to_hw(unsigned val,
- struct fb_bitfield *bf)
-{
- return (((val << bf->length) + 0x7FFF - val) >> 16) << bf->offset;
-}
-
-static int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green,
- unsigned blue, unsigned transp, struct fb_info *fb)
-{
- uint32_t color;
-
- if (regno >= 16)
- return -EINVAL;
-
- color = jzfb_convert_color_to_hw(red, &fb->var.red);
- color |= jzfb_convert_color_to_hw(green, &fb->var.green);
- color |= jzfb_convert_color_to_hw(blue, &fb->var.blue);
- color |= jzfb_convert_color_to_hw(transp, &fb->var.transp);
-
- ((uint32_t *)(fb->pseudo_palette))[regno] = color;
-
- return 0;
-}
-
-static int jzfb_get_controller_bpp(struct jzfb *jzfb)
-{
- switch (jzfb->pdata->bpp) {
- case 18:
- case 24:
- return 32;
- case 15:
- return 16;
- default:
- return jzfb->pdata->bpp;
- }
-}
-
-static struct fb_videomode *jzfb_get_mode(struct jzfb *jzfb,
- struct fb_var_screeninfo *var)
-{
- size_t i;
- struct fb_videomode *mode = jzfb->pdata->modes;
-
- for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) {
- if (mode->xres == var->xres && mode->yres == var->yres)
- return mode;
- }
-
- return NULL;
-}
-
-static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb)
-{
- struct jzfb *jzfb = fb->par;
- struct fb_videomode *mode;
-
- if (var->bits_per_pixel != jzfb_get_controller_bpp(jzfb) &&
- var->bits_per_pixel != jzfb->pdata->bpp)
- return -EINVAL;
-
- mode = jzfb_get_mode(jzfb, var);
- if (mode == NULL)
- return -EINVAL;
-
- fb_videomode_to_var(var, mode);
-
- switch (jzfb->pdata->bpp) {
- case 8:
- break;
- case 15:
- var->red.offset = 10;
- var->red.length = 5;
- var->green.offset = 6;
- var->green.length = 5;
- var->blue.offset = 0;
- var->blue.length = 5;
- break;
- case 16:
- var->red.offset = 11;
- var->red.length = 5;
- var->green.offset = 5;
- var->green.length = 6;
- var->blue.offset = 0;
- var->blue.length = 5;
- break;
- case 18:
- var->red.offset = 16;
- var->red.length = 6;
- var->green.offset = 8;
- var->green.length = 6;
- var->blue.offset = 0;
- var->blue.length = 6;
- var->bits_per_pixel = 32;
- break;
- case 32:
- case 24:
- var->transp.offset = 24;
- var->transp.length = 8;
- var->red.offset = 16;
- var->red.length = 8;
- var->green.offset = 8;
- var->green.length = 8;
- var->blue.offset = 0;
- var->blue.length = 8;
- var->bits_per_pixel = 32;
- break;
- default:
- break;
- }
-
- return 0;
-}
-
-static int jzfb_set_par(struct fb_info *info)
-{
- struct jzfb *jzfb = info->par;
- struct jz4740_fb_platform_data *pdata = jzfb->pdata;
- struct fb_var_screeninfo *var = &info->var;
- struct fb_videomode *mode;
- uint16_t hds, vds;
- uint16_t hde, vde;
- uint16_t ht, vt;
- uint32_t ctrl;
- uint32_t cfg;
- unsigned long rate;
-
- mode = jzfb_get_mode(jzfb, var);
- if (mode == NULL)
- return -EINVAL;
-
- if (mode == info->mode)
- return 0;
-
- info->mode = mode;
-
- hds = mode->hsync_len + mode->left_margin;
- hde = hds + mode->xres;
- ht = hde + mode->right_margin;
-
- vds = mode->vsync_len + mode->upper_margin;
- vde = vds + mode->yres;
- vt = vde + mode->lower_margin;
-
- ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16;
-
- switch (pdata->bpp) {
- case 1:
- ctrl |= JZ_LCD_CTRL_BPP_1;
- break;
- case 2:
- ctrl |= JZ_LCD_CTRL_BPP_2;
- break;
- case 4:
- ctrl |= JZ_LCD_CTRL_BPP_4;
- break;
- case 8:
- ctrl |= JZ_LCD_CTRL_BPP_8;
- break;
- case 15:
- ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */
- case 16:
- ctrl |= JZ_LCD_CTRL_BPP_15_16;
- break;
- case 18:
- case 24:
- case 32:
- ctrl |= JZ_LCD_CTRL_BPP_18_24;
- break;
- default:
- break;
- }
-
- cfg = pdata->lcd_type & 0xf;
-
- if (!(mode->sync & FB_SYNC_HOR_HIGH_ACT))
- cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW;
-
- if (!(mode->sync & FB_SYNC_VERT_HIGH_ACT))
- cfg |= JZ_LCD_CFG_VSYNC_ACTIVE_LOW;
-
- if (pdata->pixclk_falling_edge)
- cfg |= JZ_LCD_CFG_PCLK_FALLING_EDGE;
-
- if (pdata->date_enable_active_low)
- cfg |= JZ_LCD_CFG_DE_ACTIVE_LOW;
-
- if (pdata->lcd_type == JZ_LCD_TYPE_GENERIC_18_BIT)
- cfg |= JZ_LCD_CFG_18_BIT;
-
- if (mode->pixclock) {
- rate = PICOS2KHZ(mode->pixclock) * 1000;
- mode->refresh = rate / vt / ht;
- } else {
- if (pdata->lcd_type == JZ_LCD_TYPE_8BIT_SERIAL)
- rate = mode->refresh * (vt + 2 * mode->xres) * ht;
- else
- rate = mode->refresh * vt * ht;
-
- mode->pixclock = KHZ2PICOS(rate / 1000);
- }
-
- mutex_lock(&jzfb->lock);
- if (!jzfb->is_enabled)
- clk_enable(jzfb->ldclk);
- else
- ctrl |= JZ_LCD_CTRL_ENABLE;
-
- switch (pdata->lcd_type) {
- case JZ_LCD_TYPE_SPECIAL_TFT_1:
- case JZ_LCD_TYPE_SPECIAL_TFT_2:
- case JZ_LCD_TYPE_SPECIAL_TFT_3:
- writel(pdata->special_tft_config.spl, jzfb->base + JZ_REG_LCD_SPL);
- writel(pdata->special_tft_config.cls, jzfb->base + JZ_REG_LCD_CLS);
- writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_PS);
- writel(pdata->special_tft_config.ps, jzfb->base + JZ_REG_LCD_REV);
- break;
- default:
- cfg |= JZ_LCD_CFG_PS_DISABLE;
- cfg |= JZ_LCD_CFG_CLS_DISABLE;
- cfg |= JZ_LCD_CFG_SPL_DISABLE;
- cfg |= JZ_LCD_CFG_REV_DISABLE;
- break;
- }
-
- writel(mode->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC);
- writel(mode->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC);
-
- writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT);
-
- writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH);
- writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV);
-
- writel(cfg, jzfb->base + JZ_REG_LCD_CFG);
-
- writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
-
- if (!jzfb->is_enabled)
- clk_disable_unprepare(jzfb->ldclk);
-
- mutex_unlock(&jzfb->lock);
-
- clk_set_rate(jzfb->lpclk, rate);
- clk_set_rate(jzfb->ldclk, rate * 3);
-
- return 0;
-}
-
-static void jzfb_enable(struct jzfb *jzfb)
-{
- uint32_t ctrl;
-
- clk_prepare_enable(jzfb->ldclk);
-
- pinctrl_pm_select_default_state(&jzfb->pdev->dev);
-
- writel(0, jzfb->base + JZ_REG_LCD_STATE);
-
- writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
-
- ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
- ctrl |= JZ_LCD_CTRL_ENABLE;
- ctrl &= ~JZ_LCD_CTRL_DISABLE;
- writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
-}
-
-static void jzfb_disable(struct jzfb *jzfb)
-{
- uint32_t ctrl;
-
- ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
- ctrl |= JZ_LCD_CTRL_DISABLE;
- writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
- do {
- ctrl = readl(jzfb->base + JZ_REG_LCD_STATE);
- } while (!(ctrl & JZ_LCD_STATE_DISABLED));
-
- pinctrl_pm_select_sleep_state(&jzfb->pdev->dev);
-
- clk_disable_unprepare(jzfb->ldclk);
-}
-
-static int jzfb_blank(int blank_mode, struct fb_info *info)
-{
- struct jzfb *jzfb = info->par;
-
- switch (blank_mode) {
- case FB_BLANK_UNBLANK:
- mutex_lock(&jzfb->lock);
- if (jzfb->is_enabled) {
- mutex_unlock(&jzfb->lock);
- return 0;
- }
-
- jzfb_enable(jzfb);
- jzfb->is_enabled = 1;
-
- mutex_unlock(&jzfb->lock);
- break;
- default:
- mutex_lock(&jzfb->lock);
- if (!jzfb->is_enabled) {
- mutex_unlock(&jzfb->lock);
- return 0;
- }
-
- jzfb_disable(jzfb);
- jzfb->is_enabled = 0;
-
- mutex_unlock(&jzfb->lock);
- break;
- }
-
- return 0;
-}
-
-static int jzfb_alloc_devmem(struct jzfb *jzfb)
-{
- int max_videosize = 0;
- struct fb_videomode *mode = jzfb->pdata->modes;
- int i;
-
- for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) {
- if (max_videosize < mode->xres * mode->yres)
- max_videosize = mode->xres * mode->yres;
- }
-
- max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3;
-
- jzfb->framedesc = dma_alloc_coherent(&jzfb->pdev->dev,
- sizeof(*jzfb->framedesc),
- &jzfb->framedesc_phys, GFP_KERNEL);
-
- if (!jzfb->framedesc)
- return -ENOMEM;
-
- jzfb->vidmem_size = PAGE_ALIGN(max_videosize);
- jzfb->vidmem = dma_alloc_coherent(&jzfb->pdev->dev,
- jzfb->vidmem_size,
- &jzfb->vidmem_phys, GFP_KERNEL);
-
- if (!jzfb->vidmem)
- goto err_free_framedesc;
-
- jzfb->framedesc->next = jzfb->framedesc_phys;
- jzfb->framedesc->addr = jzfb->vidmem_phys;
- jzfb->framedesc->id = 0xdeafbead;
- jzfb->framedesc->cmd = 0;
- jzfb->framedesc->cmd |= max_videosize / 4;
-
- return 0;
-
-err_free_framedesc:
- dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
- jzfb->framedesc, jzfb->framedesc_phys);
- return -ENOMEM;
-}
-
-static void jzfb_free_devmem(struct jzfb *jzfb)
-{
- dma_free_coherent(&jzfb->pdev->dev, jzfb->vidmem_size,
- jzfb->vidmem, jzfb->vidmem_phys);
- dma_free_coherent(&jzfb->pdev->dev, sizeof(*jzfb->framedesc),
- jzfb->framedesc, jzfb->framedesc_phys);
-}
-
-static struct fb_ops jzfb_ops = {
- .owner = THIS_MODULE,
- .fb_check_var = jzfb_check_var,
- .fb_set_par = jzfb_set_par,
- .fb_blank = jzfb_blank,
- .fb_fillrect = sys_fillrect,
- .fb_copyarea = sys_copyarea,
- .fb_imageblit = sys_imageblit,
- .fb_setcolreg = jzfb_setcolreg,
-};
-
-static int jzfb_probe(struct platform_device *pdev)
-{
- int ret;
- struct jzfb *jzfb;
- struct fb_info *fb;
- struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data;
- struct resource *mem;
-
- if (!pdata) {
- dev_err(&pdev->dev, "Missing platform data\n");
- return -ENXIO;
- }
-
- fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev);
- if (!fb)
- return -ENOMEM;
-
- fb->fbops = &jzfb_ops;
- fb->flags = FBINFO_DEFAULT;
-
- jzfb = fb->par;
- jzfb->pdev = pdev;
- jzfb->pdata = pdata;
-
- jzfb->ldclk = devm_clk_get(&pdev->dev, "lcd");
- if (IS_ERR(jzfb->ldclk)) {
- ret = PTR_ERR(jzfb->ldclk);
- dev_err(&pdev->dev, "Failed to get lcd clock: %d\n", ret);
- goto err_framebuffer_release;
- }
-
- jzfb->lpclk = devm_clk_get(&pdev->dev, "lcd_pclk");
- if (IS_ERR(jzfb->lpclk)) {
- ret = PTR_ERR(jzfb->lpclk);
- dev_err(&pdev->dev, "Failed to get lcd pixel clock: %d\n", ret);
- goto err_framebuffer_release;
- }
-
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- jzfb->base = devm_ioremap_resource(&pdev->dev, mem);
- if (IS_ERR(jzfb->base)) {
- ret = PTR_ERR(jzfb->base);
- goto err_framebuffer_release;
- }
-
- platform_set_drvdata(pdev, jzfb);
-
- mutex_init(&jzfb->lock);
-
- fb_videomode_to_modelist(pdata->modes, pdata->num_modes,
- &fb->modelist);
- fb_videomode_to_var(&fb->var, pdata->modes);
- fb->var.bits_per_pixel = pdata->bpp;
- jzfb_check_var(&fb->var, fb);
-
- ret = jzfb_alloc_devmem(jzfb);
- if (ret) {
- dev_err(&pdev->dev, "Failed to allocate video memory\n");
- goto err_framebuffer_release;
- }
-
- fb->fix = jzfb_fix;
- fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8;
- fb->fix.mmio_start = mem->start;
- fb->fix.mmio_len = resource_size(mem);
- fb->fix.smem_start = jzfb->vidmem_phys;
- fb->fix.smem_len = fb->fix.line_length * fb->var.yres;
- fb->screen_base = jzfb->vidmem;
- fb->pseudo_palette = jzfb->pseudo_palette;
-
- fb_alloc_cmap(&fb->cmap, 256, 0);
-
- clk_prepare_enable(jzfb->ldclk);
- jzfb->is_enabled = 1;
-
- writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
-
- fb->mode = NULL;
- jzfb_set_par(fb);
-
- ret = register_framebuffer(fb);
- if (ret) {
- dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret);
- goto err_free_devmem;
- }
-
- jzfb->fb = fb;
-
- return 0;
-
-err_free_devmem:
- fb_dealloc_cmap(&fb->cmap);
- jzfb_free_devmem(jzfb);
-err_framebuffer_release:
- framebuffer_release(fb);
- return ret;
-}
-
-static int jzfb_remove(struct platform_device *pdev)
-{
- struct jzfb *jzfb = platform_get_drvdata(pdev);
-
- jzfb_blank(FB_BLANK_POWERDOWN, jzfb->fb);
-
- fb_dealloc_cmap(&jzfb->fb->cmap);
- jzfb_free_devmem(jzfb);
-
- framebuffer_release(jzfb->fb);
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-
-static int jzfb_suspend(struct device *dev)
-{
- struct jzfb *jzfb = dev_get_drvdata(dev);
-
- console_lock();
- fb_set_suspend(jzfb->fb, 1);
- console_unlock();
-
- mutex_lock(&jzfb->lock);
- if (jzfb->is_enabled)
- jzfb_disable(jzfb);
- mutex_unlock(&jzfb->lock);
-
- return 0;
-}
-
-static int jzfb_resume(struct device *dev)
-{
- struct jzfb *jzfb = dev_get_drvdata(dev);
- clk_prepare_enable(jzfb->ldclk);
-
- mutex_lock(&jzfb->lock);
- if (jzfb->is_enabled)
- jzfb_enable(jzfb);
- mutex_unlock(&jzfb->lock);
-
- console_lock();
- fb_set_suspend(jzfb->fb, 0);
- console_unlock();
-
- return 0;
-}
-
-static const struct dev_pm_ops jzfb_pm_ops = {
- .suspend = jzfb_suspend,
- .resume = jzfb_resume,
- .poweroff = jzfb_suspend,
- .restore = jzfb_resume,
-};
-
-#define JZFB_PM_OPS (&jzfb_pm_ops)
-
-#else
-#define JZFB_PM_OPS NULL
-#endif
-
-static struct platform_driver jzfb_driver = {
- .probe = jzfb_probe,
- .remove = jzfb_remove,
- .driver = {
- .name = "jz4740-fb",
- .pm = JZFB_PM_OPS,
- },
-};
-module_platform_driver(jzfb_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_DESCRIPTION("JZ4740 SoC LCD framebuffer driver");
-MODULE_ALIAS("platform:jz4740-fb");
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 06/11] dma: Drop JZ4740 driver
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
The newer and better JZ4780 driver is now used to provide DMA
functionality on the JZ4740.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
drivers/dma/Kconfig | 6 -
drivers/dma/Makefile | 1 -
drivers/dma/dma-jz4740.c | 623 ---------------------------------------
3 files changed, 630 deletions(-)
delete mode 100644 drivers/dma/dma-jz4740.c
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 03fa0c58cef3..7dd9831b4e6e 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -137,12 +137,6 @@ config DMA_BCM2835
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
-config DMA_JZ4740
- tristate "JZ4740 DMA support"
- depends on MACH_JZ4740 || COMPILE_TEST
- select DMA_ENGINE
- select DMA_VIRTUAL_CHANNELS
-
config DMA_JZ4780
tristate "JZ4780 DMA support"
depends on MIPS || COMPILE_TEST
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 5bddf6f8790f..f5ce8665e944 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -22,7 +22,6 @@ obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o
obj-$(CONFIG_BCM_SBA_RAID) += bcm-sba-raid.o
obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o
-obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o
obj-$(CONFIG_DMA_JZ4780) += dma-jz4780.o
obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
obj-$(CONFIG_DMA_SUN4I) += sun4i-dma.o
diff --git a/drivers/dma/dma-jz4740.c b/drivers/dma/dma-jz4740.c
deleted file mode 100644
index 39c676c47082..000000000000
--- a/drivers/dma/dma-jz4740.c
+++ /dev/null
@@ -1,623 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2013, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 DMAC support
- */
-
-#include <linux/dmaengine.h>
-#include <linux/dma-mapping.h>
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <linux/irq.h>
-#include <linux/clk.h>
-
-#include "virt-dma.h"
-
-#define JZ_DMA_NR_CHANS 6
-
-#define JZ_REG_DMA_SRC_ADDR(x) (0x00 + (x) * 0x20)
-#define JZ_REG_DMA_DST_ADDR(x) (0x04 + (x) * 0x20)
-#define JZ_REG_DMA_TRANSFER_COUNT(x) (0x08 + (x) * 0x20)
-#define JZ_REG_DMA_REQ_TYPE(x) (0x0C + (x) * 0x20)
-#define JZ_REG_DMA_STATUS_CTRL(x) (0x10 + (x) * 0x20)
-#define JZ_REG_DMA_CMD(x) (0x14 + (x) * 0x20)
-#define JZ_REG_DMA_DESC_ADDR(x) (0x18 + (x) * 0x20)
-
-#define JZ_REG_DMA_CTRL 0x300
-#define JZ_REG_DMA_IRQ 0x304
-#define JZ_REG_DMA_DOORBELL 0x308
-#define JZ_REG_DMA_DOORBELL_SET 0x30C
-
-#define JZ_DMA_STATUS_CTRL_NO_DESC BIT(31)
-#define JZ_DMA_STATUS_CTRL_DESC_INV BIT(6)
-#define JZ_DMA_STATUS_CTRL_ADDR_ERR BIT(4)
-#define JZ_DMA_STATUS_CTRL_TRANSFER_DONE BIT(3)
-#define JZ_DMA_STATUS_CTRL_HALT BIT(2)
-#define JZ_DMA_STATUS_CTRL_COUNT_TERMINATE BIT(1)
-#define JZ_DMA_STATUS_CTRL_ENABLE BIT(0)
-
-#define JZ_DMA_CMD_SRC_INC BIT(23)
-#define JZ_DMA_CMD_DST_INC BIT(22)
-#define JZ_DMA_CMD_RDIL_MASK (0xf << 16)
-#define JZ_DMA_CMD_SRC_WIDTH_MASK (0x3 << 14)
-#define JZ_DMA_CMD_DST_WIDTH_MASK (0x3 << 12)
-#define JZ_DMA_CMD_INTERVAL_LENGTH_MASK (0x7 << 8)
-#define JZ_DMA_CMD_BLOCK_MODE BIT(7)
-#define JZ_DMA_CMD_DESC_VALID BIT(4)
-#define JZ_DMA_CMD_DESC_VALID_MODE BIT(3)
-#define JZ_DMA_CMD_VALID_IRQ_ENABLE BIT(2)
-#define JZ_DMA_CMD_TRANSFER_IRQ_ENABLE BIT(1)
-#define JZ_DMA_CMD_LINK_ENABLE BIT(0)
-
-#define JZ_DMA_CMD_FLAGS_OFFSET 22
-#define JZ_DMA_CMD_RDIL_OFFSET 16
-#define JZ_DMA_CMD_SRC_WIDTH_OFFSET 14
-#define JZ_DMA_CMD_DST_WIDTH_OFFSET 12
-#define JZ_DMA_CMD_TRANSFER_SIZE_OFFSET 8
-#define JZ_DMA_CMD_MODE_OFFSET 7
-
-#define JZ_DMA_CTRL_PRIORITY_MASK (0x3 << 8)
-#define JZ_DMA_CTRL_HALT BIT(3)
-#define JZ_DMA_CTRL_ADDRESS_ERROR BIT(2)
-#define JZ_DMA_CTRL_ENABLE BIT(0)
-
-enum jz4740_dma_width {
- JZ4740_DMA_WIDTH_32BIT = 0,
- JZ4740_DMA_WIDTH_8BIT = 1,
- JZ4740_DMA_WIDTH_16BIT = 2,
-};
-
-enum jz4740_dma_transfer_size {
- JZ4740_DMA_TRANSFER_SIZE_4BYTE = 0,
- JZ4740_DMA_TRANSFER_SIZE_1BYTE = 1,
- JZ4740_DMA_TRANSFER_SIZE_2BYTE = 2,
- JZ4740_DMA_TRANSFER_SIZE_16BYTE = 3,
- JZ4740_DMA_TRANSFER_SIZE_32BYTE = 4,
-};
-
-enum jz4740_dma_flags {
- JZ4740_DMA_SRC_AUTOINC = 0x2,
- JZ4740_DMA_DST_AUTOINC = 0x1,
-};
-
-enum jz4740_dma_mode {
- JZ4740_DMA_MODE_SINGLE = 0,
- JZ4740_DMA_MODE_BLOCK = 1,
-};
-
-struct jz4740_dma_sg {
- dma_addr_t addr;
- unsigned int len;
-};
-
-struct jz4740_dma_desc {
- struct virt_dma_desc vdesc;
-
- enum dma_transfer_direction direction;
- bool cyclic;
-
- unsigned int num_sgs;
- struct jz4740_dma_sg sg[];
-};
-
-struct jz4740_dmaengine_chan {
- struct virt_dma_chan vchan;
- unsigned int id;
- struct dma_slave_config config;
-
- dma_addr_t fifo_addr;
- unsigned int transfer_shift;
-
- struct jz4740_dma_desc *desc;
- unsigned int next_sg;
-};
-
-struct jz4740_dma_dev {
- struct dma_device ddev;
- void __iomem *base;
- struct clk *clk;
-
- struct jz4740_dmaengine_chan chan[JZ_DMA_NR_CHANS];
-};
-
-static struct jz4740_dma_dev *jz4740_dma_chan_get_dev(
- struct jz4740_dmaengine_chan *chan)
-{
- return container_of(chan->vchan.chan.device, struct jz4740_dma_dev,
- ddev);
-}
-
-static struct jz4740_dmaengine_chan *to_jz4740_dma_chan(struct dma_chan *c)
-{
- return container_of(c, struct jz4740_dmaengine_chan, vchan.chan);
-}
-
-static struct jz4740_dma_desc *to_jz4740_dma_desc(struct virt_dma_desc *vdesc)
-{
- return container_of(vdesc, struct jz4740_dma_desc, vdesc);
-}
-
-static inline uint32_t jz4740_dma_read(struct jz4740_dma_dev *dmadev,
- unsigned int reg)
-{
- return readl(dmadev->base + reg);
-}
-
-static inline void jz4740_dma_write(struct jz4740_dma_dev *dmadev,
- unsigned reg, uint32_t val)
-{
- writel(val, dmadev->base + reg);
-}
-
-static inline void jz4740_dma_write_mask(struct jz4740_dma_dev *dmadev,
- unsigned int reg, uint32_t val, uint32_t mask)
-{
- uint32_t tmp;
-
- tmp = jz4740_dma_read(dmadev, reg);
- tmp &= ~mask;
- tmp |= val;
- jz4740_dma_write(dmadev, reg, tmp);
-}
-
-static struct jz4740_dma_desc *jz4740_dma_alloc_desc(unsigned int num_sgs)
-{
- return kzalloc(sizeof(struct jz4740_dma_desc) +
- sizeof(struct jz4740_dma_sg) * num_sgs, GFP_ATOMIC);
-}
-
-static enum jz4740_dma_width jz4740_dma_width(enum dma_slave_buswidth width)
-{
- switch (width) {
- case DMA_SLAVE_BUSWIDTH_1_BYTE:
- return JZ4740_DMA_WIDTH_8BIT;
- case DMA_SLAVE_BUSWIDTH_2_BYTES:
- return JZ4740_DMA_WIDTH_16BIT;
- case DMA_SLAVE_BUSWIDTH_4_BYTES:
- return JZ4740_DMA_WIDTH_32BIT;
- default:
- return JZ4740_DMA_WIDTH_32BIT;
- }
-}
-
-static enum jz4740_dma_transfer_size jz4740_dma_maxburst(u32 maxburst)
-{
- if (maxburst <= 1)
- return JZ4740_DMA_TRANSFER_SIZE_1BYTE;
- else if (maxburst <= 3)
- return JZ4740_DMA_TRANSFER_SIZE_2BYTE;
- else if (maxburst <= 15)
- return JZ4740_DMA_TRANSFER_SIZE_4BYTE;
- else if (maxburst <= 31)
- return JZ4740_DMA_TRANSFER_SIZE_16BYTE;
-
- return JZ4740_DMA_TRANSFER_SIZE_32BYTE;
-}
-
-static int jz4740_dma_slave_config_write(struct dma_chan *c,
- struct dma_slave_config *config,
- enum dma_transfer_direction direction)
-{
- struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
- struct jz4740_dma_dev *dmadev = jz4740_dma_chan_get_dev(chan);
- enum jz4740_dma_width src_width;
- enum jz4740_dma_width dst_width;
- enum jz4740_dma_transfer_size transfer_size;
- enum jz4740_dma_flags flags;
- uint32_t cmd;
-
- switch (direction) {
- case DMA_MEM_TO_DEV:
- flags = JZ4740_DMA_SRC_AUTOINC;
- transfer_size = jz4740_dma_maxburst(config->dst_maxburst);
- chan->fifo_addr = config->dst_addr;
- break;
- case DMA_DEV_TO_MEM:
- flags = JZ4740_DMA_DST_AUTOINC;
- transfer_size = jz4740_dma_maxburst(config->src_maxburst);
- chan->fifo_addr = config->src_addr;
- break;
- default:
- return -EINVAL;
- }
-
- src_width = jz4740_dma_width(config->src_addr_width);
- dst_width = jz4740_dma_width(config->dst_addr_width);
-
- switch (transfer_size) {
- case JZ4740_DMA_TRANSFER_SIZE_2BYTE:
- chan->transfer_shift = 1;
- break;
- case JZ4740_DMA_TRANSFER_SIZE_4BYTE:
- chan->transfer_shift = 2;
- break;
- case JZ4740_DMA_TRANSFER_SIZE_16BYTE:
- chan->transfer_shift = 4;
- break;
- case JZ4740_DMA_TRANSFER_SIZE_32BYTE:
- chan->transfer_shift = 5;
- break;
- default:
- chan->transfer_shift = 0;
- break;
- }
-
- cmd = flags << JZ_DMA_CMD_FLAGS_OFFSET;
- cmd |= src_width << JZ_DMA_CMD_SRC_WIDTH_OFFSET;
- cmd |= dst_width << JZ_DMA_CMD_DST_WIDTH_OFFSET;
- cmd |= transfer_size << JZ_DMA_CMD_TRANSFER_SIZE_OFFSET;
- cmd |= JZ4740_DMA_MODE_SINGLE << JZ_DMA_CMD_MODE_OFFSET;
- cmd |= JZ_DMA_CMD_TRANSFER_IRQ_ENABLE;
-
- jz4740_dma_write(dmadev, JZ_REG_DMA_CMD(chan->id), cmd);
- jz4740_dma_write(dmadev, JZ_REG_DMA_STATUS_CTRL(chan->id), 0);
- jz4740_dma_write(dmadev, JZ_REG_DMA_REQ_TYPE(chan->id),
- config->slave_id);
-
- return 0;
-}
-
-static int jz4740_dma_slave_config(struct dma_chan *c,
- struct dma_slave_config *config)
-{
- struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
-
- memcpy(&chan->config, config, sizeof(*config));
- return 0;
-}
-
-static int jz4740_dma_terminate_all(struct dma_chan *c)
-{
- struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
- struct jz4740_dma_dev *dmadev = jz4740_dma_chan_get_dev(chan);
- unsigned long flags;
- LIST_HEAD(head);
-
- spin_lock_irqsave(&chan->vchan.lock, flags);
- jz4740_dma_write_mask(dmadev, JZ_REG_DMA_STATUS_CTRL(chan->id), 0,
- JZ_DMA_STATUS_CTRL_ENABLE);
- chan->desc = NULL;
- vchan_get_all_descriptors(&chan->vchan, &head);
- spin_unlock_irqrestore(&chan->vchan.lock, flags);
-
- vchan_dma_desc_free_list(&chan->vchan, &head);
-
- return 0;
-}
-
-static int jz4740_dma_start_transfer(struct jz4740_dmaengine_chan *chan)
-{
- struct jz4740_dma_dev *dmadev = jz4740_dma_chan_get_dev(chan);
- dma_addr_t src_addr, dst_addr;
- struct virt_dma_desc *vdesc;
- struct jz4740_dma_sg *sg;
-
- jz4740_dma_write_mask(dmadev, JZ_REG_DMA_STATUS_CTRL(chan->id), 0,
- JZ_DMA_STATUS_CTRL_ENABLE);
-
- if (!chan->desc) {
- vdesc = vchan_next_desc(&chan->vchan);
- if (!vdesc)
- return 0;
- chan->desc = to_jz4740_dma_desc(vdesc);
- chan->next_sg = 0;
- }
-
- if (chan->next_sg == chan->desc->num_sgs)
- chan->next_sg = 0;
-
- sg = &chan->desc->sg[chan->next_sg];
-
- if (chan->desc->direction == DMA_MEM_TO_DEV) {
- src_addr = sg->addr;
- dst_addr = chan->fifo_addr;
- } else {
- src_addr = chan->fifo_addr;
- dst_addr = sg->addr;
- }
- jz4740_dma_write(dmadev, JZ_REG_DMA_SRC_ADDR(chan->id), src_addr);
- jz4740_dma_write(dmadev, JZ_REG_DMA_DST_ADDR(chan->id), dst_addr);
- jz4740_dma_write(dmadev, JZ_REG_DMA_TRANSFER_COUNT(chan->id),
- sg->len >> chan->transfer_shift);
-
- chan->next_sg++;
-
- jz4740_dma_write_mask(dmadev, JZ_REG_DMA_STATUS_CTRL(chan->id),
- JZ_DMA_STATUS_CTRL_NO_DESC | JZ_DMA_STATUS_CTRL_ENABLE,
- JZ_DMA_STATUS_CTRL_HALT | JZ_DMA_STATUS_CTRL_NO_DESC |
- JZ_DMA_STATUS_CTRL_ENABLE);
-
- jz4740_dma_write_mask(dmadev, JZ_REG_DMA_CTRL,
- JZ_DMA_CTRL_ENABLE,
- JZ_DMA_CTRL_HALT | JZ_DMA_CTRL_ENABLE);
-
- return 0;
-}
-
-static void jz4740_dma_chan_irq(struct jz4740_dmaengine_chan *chan)
-{
- spin_lock(&chan->vchan.lock);
- if (chan->desc) {
- if (chan->desc->cyclic) {
- vchan_cyclic_callback(&chan->desc->vdesc);
- } else {
- if (chan->next_sg == chan->desc->num_sgs) {
- list_del(&chan->desc->vdesc.node);
- vchan_cookie_complete(&chan->desc->vdesc);
- chan->desc = NULL;
- }
- }
- }
- jz4740_dma_start_transfer(chan);
- spin_unlock(&chan->vchan.lock);
-}
-
-static irqreturn_t jz4740_dma_irq(int irq, void *devid)
-{
- struct jz4740_dma_dev *dmadev = devid;
- uint32_t irq_status;
- unsigned int i;
-
- irq_status = readl(dmadev->base + JZ_REG_DMA_IRQ);
-
- for (i = 0; i < 6; ++i) {
- if (irq_status & (1 << i)) {
- jz4740_dma_write_mask(dmadev,
- JZ_REG_DMA_STATUS_CTRL(i), 0,
- JZ_DMA_STATUS_CTRL_ENABLE |
- JZ_DMA_STATUS_CTRL_TRANSFER_DONE);
-
- jz4740_dma_chan_irq(&dmadev->chan[i]);
- }
- }
-
- return IRQ_HANDLED;
-}
-
-static void jz4740_dma_issue_pending(struct dma_chan *c)
-{
- struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
- unsigned long flags;
-
- spin_lock_irqsave(&chan->vchan.lock, flags);
- if (vchan_issue_pending(&chan->vchan) && !chan->desc)
- jz4740_dma_start_transfer(chan);
- spin_unlock_irqrestore(&chan->vchan.lock, flags);
-}
-
-static struct dma_async_tx_descriptor *jz4740_dma_prep_slave_sg(
- struct dma_chan *c, struct scatterlist *sgl,
- unsigned int sg_len, enum dma_transfer_direction direction,
- unsigned long flags, void *context)
-{
- struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
- struct jz4740_dma_desc *desc;
- struct scatterlist *sg;
- unsigned int i;
-
- desc = jz4740_dma_alloc_desc(sg_len);
- if (!desc)
- return NULL;
-
- for_each_sg(sgl, sg, sg_len, i) {
- desc->sg[i].addr = sg_dma_address(sg);
- desc->sg[i].len = sg_dma_len(sg);
- }
-
- desc->num_sgs = sg_len;
- desc->direction = direction;
- desc->cyclic = false;
-
- jz4740_dma_slave_config_write(c, &chan->config, direction);
-
- return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
-}
-
-static struct dma_async_tx_descriptor *jz4740_dma_prep_dma_cyclic(
- struct dma_chan *c, dma_addr_t buf_addr, size_t buf_len,
- size_t period_len, enum dma_transfer_direction direction,
- unsigned long flags)
-{
- struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
- struct jz4740_dma_desc *desc;
- unsigned int num_periods, i;
-
- if (buf_len % period_len)
- return NULL;
-
- num_periods = buf_len / period_len;
-
- desc = jz4740_dma_alloc_desc(num_periods);
- if (!desc)
- return NULL;
-
- for (i = 0; i < num_periods; i++) {
- desc->sg[i].addr = buf_addr;
- desc->sg[i].len = period_len;
- buf_addr += period_len;
- }
-
- desc->num_sgs = num_periods;
- desc->direction = direction;
- desc->cyclic = true;
-
- jz4740_dma_slave_config_write(c, &chan->config, direction);
-
- return vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
-}
-
-static size_t jz4740_dma_desc_residue(struct jz4740_dmaengine_chan *chan,
- struct jz4740_dma_desc *desc, unsigned int next_sg)
-{
- struct jz4740_dma_dev *dmadev = jz4740_dma_chan_get_dev(chan);
- unsigned int residue, count;
- unsigned int i;
-
- residue = 0;
-
- for (i = next_sg; i < desc->num_sgs; i++)
- residue += desc->sg[i].len;
-
- if (next_sg != 0) {
- count = jz4740_dma_read(dmadev,
- JZ_REG_DMA_TRANSFER_COUNT(chan->id));
- residue += count << chan->transfer_shift;
- }
-
- return residue;
-}
-
-static enum dma_status jz4740_dma_tx_status(struct dma_chan *c,
- dma_cookie_t cookie, struct dma_tx_state *state)
-{
- struct jz4740_dmaengine_chan *chan = to_jz4740_dma_chan(c);
- struct virt_dma_desc *vdesc;
- enum dma_status status;
- unsigned long flags;
-
- status = dma_cookie_status(c, cookie, state);
- if (status == DMA_COMPLETE || !state)
- return status;
-
- spin_lock_irqsave(&chan->vchan.lock, flags);
- vdesc = vchan_find_desc(&chan->vchan, cookie);
- if (cookie == chan->desc->vdesc.tx.cookie) {
- state->residue = jz4740_dma_desc_residue(chan, chan->desc,
- chan->next_sg);
- } else if (vdesc) {
- state->residue = jz4740_dma_desc_residue(chan,
- to_jz4740_dma_desc(vdesc), 0);
- } else {
- state->residue = 0;
- }
- spin_unlock_irqrestore(&chan->vchan.lock, flags);
-
- return status;
-}
-
-static void jz4740_dma_free_chan_resources(struct dma_chan *c)
-{
- vchan_free_chan_resources(to_virt_chan(c));
-}
-
-static void jz4740_dma_desc_free(struct virt_dma_desc *vdesc)
-{
- kfree(container_of(vdesc, struct jz4740_dma_desc, vdesc));
-}
-
-#define JZ4740_DMA_BUSWIDTHS (BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
- BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES))
-
-static int jz4740_dma_probe(struct platform_device *pdev)
-{
- struct jz4740_dmaengine_chan *chan;
- struct jz4740_dma_dev *dmadev;
- struct dma_device *dd;
- unsigned int i;
- struct resource *res;
- int ret;
- int irq;
-
- dmadev = devm_kzalloc(&pdev->dev, sizeof(*dmadev), GFP_KERNEL);
- if (!dmadev)
- return -EINVAL;
-
- dd = &dmadev->ddev;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- dmadev->base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(dmadev->base))
- return PTR_ERR(dmadev->base);
-
- dmadev->clk = clk_get(&pdev->dev, "dma");
- if (IS_ERR(dmadev->clk))
- return PTR_ERR(dmadev->clk);
-
- clk_prepare_enable(dmadev->clk);
-
- dma_cap_set(DMA_SLAVE, dd->cap_mask);
- dma_cap_set(DMA_CYCLIC, dd->cap_mask);
- dd->device_free_chan_resources = jz4740_dma_free_chan_resources;
- dd->device_tx_status = jz4740_dma_tx_status;
- dd->device_issue_pending = jz4740_dma_issue_pending;
- dd->device_prep_slave_sg = jz4740_dma_prep_slave_sg;
- dd->device_prep_dma_cyclic = jz4740_dma_prep_dma_cyclic;
- dd->device_config = jz4740_dma_slave_config;
- dd->device_terminate_all = jz4740_dma_terminate_all;
- dd->src_addr_widths = JZ4740_DMA_BUSWIDTHS;
- dd->dst_addr_widths = JZ4740_DMA_BUSWIDTHS;
- dd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
- dd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
- dd->dev = &pdev->dev;
- INIT_LIST_HEAD(&dd->channels);
-
- for (i = 0; i < JZ_DMA_NR_CHANS; i++) {
- chan = &dmadev->chan[i];
- chan->id = i;
- chan->vchan.desc_free = jz4740_dma_desc_free;
- vchan_init(&chan->vchan, dd);
- }
-
- ret = dma_async_device_register(dd);
- if (ret)
- goto err_clk;
-
- irq = platform_get_irq(pdev, 0);
- ret = request_irq(irq, jz4740_dma_irq, 0, dev_name(&pdev->dev), dmadev);
- if (ret)
- goto err_unregister;
-
- platform_set_drvdata(pdev, dmadev);
-
- return 0;
-
-err_unregister:
- dma_async_device_unregister(dd);
-err_clk:
- clk_disable_unprepare(dmadev->clk);
- return ret;
-}
-
-static void jz4740_cleanup_vchan(struct dma_device *dmadev)
-{
- struct jz4740_dmaengine_chan *chan, *_chan;
-
- list_for_each_entry_safe(chan, _chan,
- &dmadev->channels, vchan.chan.device_node) {
- list_del(&chan->vchan.chan.device_node);
- tasklet_kill(&chan->vchan.task);
- }
-}
-
-
-static int jz4740_dma_remove(struct platform_device *pdev)
-{
- struct jz4740_dma_dev *dmadev = platform_get_drvdata(pdev);
- int irq = platform_get_irq(pdev, 0);
-
- free_irq(irq, dmadev);
-
- jz4740_cleanup_vchan(&dmadev->ddev);
- dma_async_device_unregister(&dmadev->ddev);
- clk_disable_unprepare(dmadev->clk);
-
- return 0;
-}
-
-static struct platform_driver jz4740_dma_driver = {
- .probe = jz4740_dma_probe,
- .remove = jz4740_dma_remove,
- .driver = {
- .name = "jz4740-dma",
- },
-};
-module_platform_driver(jz4740_dma_driver);
-
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_DESCRIPTION("JZ4740 DMA driver");
-MODULE_LICENSE("GPL v2");
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 07/11] mtd: rawnand: Drop obsolete JZ4740 NAND driver
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
It has been replaced with the newer Ingenic NAND driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
drivers/mtd/nand/raw/ingenic/Kconfig | 7 -
drivers/mtd/nand/raw/ingenic/Makefile | 1 -
drivers/mtd/nand/raw/ingenic/jz4740_nand.c | 536 ---------------------
3 files changed, 544 deletions(-)
delete mode 100644 drivers/mtd/nand/raw/ingenic/jz4740_nand.c
diff --git a/drivers/mtd/nand/raw/ingenic/Kconfig b/drivers/mtd/nand/raw/ingenic/Kconfig
index 66b7cffdb0c2..e30feb56b650 100644
--- a/drivers/mtd/nand/raw/ingenic/Kconfig
+++ b/drivers/mtd/nand/raw/ingenic/Kconfig
@@ -1,11 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
-config MTD_NAND_JZ4740
- tristate "JZ4740 NAND controller"
- depends on MACH_JZ4740 || COMPILE_TEST
- depends on HAS_IOMEM
- help
- Enables support for NAND Flash on JZ4740 SoC based boards.
-
config MTD_NAND_JZ4780
tristate "JZ4780 NAND controller"
depends on JZ4780_NEMC
diff --git a/drivers/mtd/nand/raw/ingenic/Makefile b/drivers/mtd/nand/raw/ingenic/Makefile
index b63d36889263..4c53f5e759c3 100644
--- a/drivers/mtd/nand/raw/ingenic/Makefile
+++ b/drivers/mtd/nand/raw/ingenic/Makefile
@@ -1,5 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
obj-$(CONFIG_MTD_NAND_JZ4780) += ingenic_nand.o
ingenic_nand-y += ingenic_nand_drv.o
diff --git a/drivers/mtd/nand/raw/ingenic/jz4740_nand.c b/drivers/mtd/nand/raw/ingenic/jz4740_nand.c
deleted file mode 100644
index acdf674fcc87..000000000000
--- a/drivers/mtd/nand/raw/ingenic/jz4740_nand.c
+++ /dev/null
@@ -1,536 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 SoC NAND controller driver
- */
-
-#include <linux/io.h>
-#include <linux/ioport.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/rawnand.h>
-#include <linux/mtd/partitions.h>
-
-#include <linux/gpio/consumer.h>
-
-#include <linux/platform_data/jz4740/jz4740_nand.h>
-
-#define JZ_REG_NAND_CTRL 0x50
-#define JZ_REG_NAND_ECC_CTRL 0x100
-#define JZ_REG_NAND_DATA 0x104
-#define JZ_REG_NAND_PAR0 0x108
-#define JZ_REG_NAND_PAR1 0x10C
-#define JZ_REG_NAND_PAR2 0x110
-#define JZ_REG_NAND_IRQ_STAT 0x114
-#define JZ_REG_NAND_IRQ_CTRL 0x118
-#define JZ_REG_NAND_ERR(x) (0x11C + ((x) << 2))
-
-#define JZ_NAND_ECC_CTRL_PAR_READY BIT(4)
-#define JZ_NAND_ECC_CTRL_ENCODING BIT(3)
-#define JZ_NAND_ECC_CTRL_RS BIT(2)
-#define JZ_NAND_ECC_CTRL_RESET BIT(1)
-#define JZ_NAND_ECC_CTRL_ENABLE BIT(0)
-
-#define JZ_NAND_STATUS_ERR_COUNT (BIT(31) | BIT(30) | BIT(29))
-#define JZ_NAND_STATUS_PAD_FINISH BIT(4)
-#define JZ_NAND_STATUS_DEC_FINISH BIT(3)
-#define JZ_NAND_STATUS_ENC_FINISH BIT(2)
-#define JZ_NAND_STATUS_UNCOR_ERROR BIT(1)
-#define JZ_NAND_STATUS_ERROR BIT(0)
-
-#define JZ_NAND_CTRL_ENABLE_CHIP(x) BIT((x) << 1)
-#define JZ_NAND_CTRL_ASSERT_CHIP(x) BIT(((x) << 1) + 1)
-#define JZ_NAND_CTRL_ASSERT_CHIP_MASK 0xaa
-
-#define JZ_NAND_MEM_CMD_OFFSET 0x08000
-#define JZ_NAND_MEM_ADDR_OFFSET 0x10000
-
-struct jz_nand {
- struct nand_chip chip;
- void __iomem *base;
- struct resource *mem;
-
- unsigned char banks[JZ_NAND_NUM_BANKS];
- void __iomem *bank_base[JZ_NAND_NUM_BANKS];
- struct resource *bank_mem[JZ_NAND_NUM_BANKS];
-
- int selected_bank;
-
- struct gpio_desc *busy_gpio;
- bool is_reading;
-};
-
-static inline struct jz_nand *mtd_to_jz_nand(struct mtd_info *mtd)
-{
- return container_of(mtd_to_nand(mtd), struct jz_nand, chip);
-}
-
-static void jz_nand_select_chip(struct nand_chip *chip, int chipnr)
-{
- struct jz_nand *nand = mtd_to_jz_nand(nand_to_mtd(chip));
- uint32_t ctrl;
- int banknr;
-
- ctrl = readl(nand->base + JZ_REG_NAND_CTRL);
- ctrl &= ~JZ_NAND_CTRL_ASSERT_CHIP_MASK;
-
- if (chipnr == -1) {
- banknr = -1;
- } else {
- banknr = nand->banks[chipnr] - 1;
- chip->legacy.IO_ADDR_R = nand->bank_base[banknr];
- chip->legacy.IO_ADDR_W = nand->bank_base[banknr];
- }
- writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
-
- nand->selected_bank = banknr;
-}
-
-static void jz_nand_cmd_ctrl(struct nand_chip *chip, int dat,
- unsigned int ctrl)
-{
- struct jz_nand *nand = mtd_to_jz_nand(nand_to_mtd(chip));
- uint32_t reg;
- void __iomem *bank_base = nand->bank_base[nand->selected_bank];
-
- BUG_ON(nand->selected_bank < 0);
-
- if (ctrl & NAND_CTRL_CHANGE) {
- BUG_ON((ctrl & NAND_ALE) && (ctrl & NAND_CLE));
- if (ctrl & NAND_ALE)
- bank_base += JZ_NAND_MEM_ADDR_OFFSET;
- else if (ctrl & NAND_CLE)
- bank_base += JZ_NAND_MEM_CMD_OFFSET;
- chip->legacy.IO_ADDR_W = bank_base;
-
- reg = readl(nand->base + JZ_REG_NAND_CTRL);
- if (ctrl & NAND_NCE)
- reg |= JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);
- else
- reg &= ~JZ_NAND_CTRL_ASSERT_CHIP(nand->selected_bank);
- writel(reg, nand->base + JZ_REG_NAND_CTRL);
- }
- if (dat != NAND_CMD_NONE)
- writeb(dat, chip->legacy.IO_ADDR_W);
-}
-
-static int jz_nand_dev_ready(struct nand_chip *chip)
-{
- struct jz_nand *nand = mtd_to_jz_nand(nand_to_mtd(chip));
- return gpiod_get_value_cansleep(nand->busy_gpio);
-}
-
-static void jz_nand_hwctl(struct nand_chip *chip, int mode)
-{
- struct jz_nand *nand = mtd_to_jz_nand(nand_to_mtd(chip));
- uint32_t reg;
-
- writel(0, nand->base + JZ_REG_NAND_IRQ_STAT);
- reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
-
- reg |= JZ_NAND_ECC_CTRL_RESET;
- reg |= JZ_NAND_ECC_CTRL_ENABLE;
- reg |= JZ_NAND_ECC_CTRL_RS;
-
- switch (mode) {
- case NAND_ECC_READ:
- reg &= ~JZ_NAND_ECC_CTRL_ENCODING;
- nand->is_reading = true;
- break;
- case NAND_ECC_WRITE:
- reg |= JZ_NAND_ECC_CTRL_ENCODING;
- nand->is_reading = false;
- break;
- default:
- break;
- }
-
- writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
-}
-
-static int jz_nand_calculate_ecc_rs(struct nand_chip *chip, const uint8_t *dat,
- uint8_t *ecc_code)
-{
- struct jz_nand *nand = mtd_to_jz_nand(nand_to_mtd(chip));
- uint32_t reg, status;
- int i;
- unsigned int timeout = 1000;
- static uint8_t empty_block_ecc[] = {0xcd, 0x9d, 0x90, 0x58, 0xf4,
- 0x8b, 0xff, 0xb7, 0x6f};
-
- if (nand->is_reading)
- return 0;
-
- do {
- status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);
- } while (!(status & JZ_NAND_STATUS_ENC_FINISH) && --timeout);
-
- if (timeout == 0)
- return -1;
-
- reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
- reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
- writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
-
- for (i = 0; i < 9; ++i)
- ecc_code[i] = readb(nand->base + JZ_REG_NAND_PAR0 + i);
-
- /* If the written data is completly 0xff, we also want to write 0xff as
- * ecc, otherwise we will get in trouble when doing subpage writes. */
- if (memcmp(ecc_code, empty_block_ecc, 9) == 0)
- memset(ecc_code, 0xff, 9);
-
- return 0;
-}
-
-static void jz_nand_correct_data(uint8_t *dat, int index, int mask)
-{
- int offset = index & 0x7;
- uint16_t data;
-
- index += (index >> 3);
-
- data = dat[index];
- data |= dat[index+1] << 8;
-
- mask ^= (data >> offset) & 0x1ff;
- data &= ~(0x1ff << offset);
- data |= (mask << offset);
-
- dat[index] = data & 0xff;
- dat[index+1] = (data >> 8) & 0xff;
-}
-
-static int jz_nand_correct_ecc_rs(struct nand_chip *chip, uint8_t *dat,
- uint8_t *read_ecc, uint8_t *calc_ecc)
-{
- struct jz_nand *nand = mtd_to_jz_nand(nand_to_mtd(chip));
- int i, error_count, index;
- uint32_t reg, status, error;
- unsigned int timeout = 1000;
-
- for (i = 0; i < 9; ++i)
- writeb(read_ecc[i], nand->base + JZ_REG_NAND_PAR0 + i);
-
- reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
- reg |= JZ_NAND_ECC_CTRL_PAR_READY;
- writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
-
- do {
- status = readl(nand->base + JZ_REG_NAND_IRQ_STAT);
- } while (!(status & JZ_NAND_STATUS_DEC_FINISH) && --timeout);
-
- if (timeout == 0)
- return -ETIMEDOUT;
-
- reg = readl(nand->base + JZ_REG_NAND_ECC_CTRL);
- reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
- writel(reg, nand->base + JZ_REG_NAND_ECC_CTRL);
-
- if (status & JZ_NAND_STATUS_ERROR) {
- if (status & JZ_NAND_STATUS_UNCOR_ERROR)
- return -EBADMSG;
-
- error_count = (status & JZ_NAND_STATUS_ERR_COUNT) >> 29;
-
- for (i = 0; i < error_count; ++i) {
- error = readl(nand->base + JZ_REG_NAND_ERR(i));
- index = ((error >> 16) & 0x1ff) - 1;
- if (index >= 0 && index < 512)
- jz_nand_correct_data(dat, index, error & 0x1ff);
- }
-
- return error_count;
- }
-
- return 0;
-}
-
-static int jz_nand_ioremap_resource(struct platform_device *pdev,
- const char *name, struct resource **res, void __iomem **base)
-{
- int ret;
-
- *res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
- if (!*res) {
- dev_err(&pdev->dev, "Failed to get platform %s memory\n", name);
- ret = -ENXIO;
- goto err;
- }
-
- *res = request_mem_region((*res)->start, resource_size(*res),
- pdev->name);
- if (!*res) {
- dev_err(&pdev->dev, "Failed to request %s memory region\n", name);
- ret = -EBUSY;
- goto err;
- }
-
- *base = ioremap((*res)->start, resource_size(*res));
- if (!*base) {
- dev_err(&pdev->dev, "Failed to ioremap %s memory region\n", name);
- ret = -EBUSY;
- goto err_release_mem;
- }
-
- return 0;
-
-err_release_mem:
- release_mem_region((*res)->start, resource_size(*res));
-err:
- *res = NULL;
- *base = NULL;
- return ret;
-}
-
-static inline void jz_nand_iounmap_resource(struct resource *res,
- void __iomem *base)
-{
- iounmap(base);
- release_mem_region(res->start, resource_size(res));
-}
-
-static int jz_nand_detect_bank(struct platform_device *pdev,
- struct jz_nand *nand, unsigned char bank,
- size_t chipnr, uint8_t *nand_maf_id,
- uint8_t *nand_dev_id)
-{
- int ret;
- char res_name[6];
- uint32_t ctrl;
- struct nand_chip *chip = &nand->chip;
- struct mtd_info *mtd = nand_to_mtd(chip);
- struct nand_memory_organization *memorg;
- u8 id[2];
-
- memorg = nanddev_get_memorg(&chip->base);
-
- /* Request I/O resource. */
- sprintf(res_name, "bank%d", bank);
- ret = jz_nand_ioremap_resource(pdev, res_name,
- &nand->bank_mem[bank - 1],
- &nand->bank_base[bank - 1]);
- if (ret)
- return ret;
-
- /* Enable chip in bank. */
- ctrl = readl(nand->base + JZ_REG_NAND_CTRL);
- ctrl |= JZ_NAND_CTRL_ENABLE_CHIP(bank - 1);
- writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
-
- if (chipnr == 0) {
- /* Detect first chip. */
- ret = nand_scan(chip, 1);
- if (ret)
- goto notfound_id;
-
- /* Retrieve the IDs from the first chip. */
- nand_select_target(chip, 0);
- nand_reset_op(chip);
- nand_readid_op(chip, 0, id, sizeof(id));
- *nand_maf_id = id[0];
- *nand_dev_id = id[1];
- } else {
- /* Detect additional chip. */
- nand_select_target(chip, chipnr);
- nand_reset_op(chip);
- nand_readid_op(chip, 0, id, sizeof(id));
- if (*nand_maf_id != id[0] || *nand_dev_id != id[1]) {
- ret = -ENODEV;
- goto notfound_id;
- }
-
- /* Update size of the MTD. */
- memorg->ntargets++;
- mtd->size += nanddev_target_size(&chip->base);
- }
-
- dev_info(&pdev->dev, "Found chip %zu on bank %i\n", chipnr, bank);
- return 0;
-
-notfound_id:
- dev_info(&pdev->dev, "No chip found on bank %i\n", bank);
- ctrl &= ~(JZ_NAND_CTRL_ENABLE_CHIP(bank - 1));
- writel(ctrl, nand->base + JZ_REG_NAND_CTRL);
- jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
- nand->bank_base[bank - 1]);
- return ret;
-}
-
-static int jz_nand_attach_chip(struct nand_chip *chip)
-{
- struct mtd_info *mtd = nand_to_mtd(chip);
- struct device *dev = mtd->dev.parent;
- struct jz_nand_platform_data *pdata = dev_get_platdata(dev);
- struct platform_device *pdev = to_platform_device(dev);
-
- if (pdata && pdata->ident_callback)
- pdata->ident_callback(pdev, mtd, &pdata->partitions,
- &pdata->num_partitions);
-
- return 0;
-}
-
-static const struct nand_controller_ops jz_nand_controller_ops = {
- .attach_chip = jz_nand_attach_chip,
-};
-
-static int jz_nand_probe(struct platform_device *pdev)
-{
- int ret;
- struct jz_nand *nand;
- struct nand_chip *chip;
- struct mtd_info *mtd;
- struct jz_nand_platform_data *pdata = dev_get_platdata(&pdev->dev);
- size_t chipnr, bank_idx;
- uint8_t nand_maf_id = 0, nand_dev_id = 0;
-
- nand = kzalloc(sizeof(*nand), GFP_KERNEL);
- if (!nand)
- return -ENOMEM;
-
- ret = jz_nand_ioremap_resource(pdev, "mmio", &nand->mem, &nand->base);
- if (ret)
- goto err_free;
-
- nand->busy_gpio = devm_gpiod_get_optional(&pdev->dev, "busy", GPIOD_IN);
- if (IS_ERR(nand->busy_gpio)) {
- ret = PTR_ERR(nand->busy_gpio);
- dev_err(&pdev->dev, "Failed to request busy gpio %d\n",
- ret);
- goto err_iounmap_mmio;
- }
-
- chip = &nand->chip;
- mtd = nand_to_mtd(chip);
- mtd->dev.parent = &pdev->dev;
- mtd->name = "jz4740-nand";
-
- chip->ecc.hwctl = jz_nand_hwctl;
- chip->ecc.calculate = jz_nand_calculate_ecc_rs;
- chip->ecc.correct = jz_nand_correct_ecc_rs;
- chip->ecc.mode = NAND_ECC_HW_OOB_FIRST;
- chip->ecc.size = 512;
- chip->ecc.bytes = 9;
- chip->ecc.strength = 4;
- chip->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
-
- chip->legacy.chip_delay = 50;
- chip->legacy.cmd_ctrl = jz_nand_cmd_ctrl;
- chip->legacy.select_chip = jz_nand_select_chip;
- chip->legacy.dummy_controller.ops = &jz_nand_controller_ops;
-
- if (nand->busy_gpio)
- chip->legacy.dev_ready = jz_nand_dev_ready;
-
- platform_set_drvdata(pdev, nand);
-
- /* We are going to autodetect NAND chips in the banks specified in the
- * platform data. Although nand_scan_ident() can detect multiple chips,
- * it requires those chips to be numbered consecuitively, which is not
- * always the case for external memory banks. And a fixed chip-to-bank
- * mapping is not practical either, since for example Dingoo units
- * produced at different times have NAND chips in different banks.
- */
- chipnr = 0;
- for (bank_idx = 0; bank_idx < JZ_NAND_NUM_BANKS; bank_idx++) {
- unsigned char bank;
-
- /* If there is no platform data, look for NAND in bank 1,
- * which is the most likely bank since it is the only one
- * that can be booted from.
- */
- bank = pdata ? pdata->banks[bank_idx] : bank_idx ^ 1;
- if (bank == 0)
- break;
- if (bank > JZ_NAND_NUM_BANKS) {
- dev_warn(&pdev->dev,
- "Skipping non-existing bank: %d\n", bank);
- continue;
- }
- /* The detection routine will directly or indirectly call
- * jz_nand_select_chip(), so nand->banks has to contain the
- * bank we're checking.
- */
- nand->banks[chipnr] = bank;
- if (jz_nand_detect_bank(pdev, nand, bank, chipnr,
- &nand_maf_id, &nand_dev_id) == 0)
- chipnr++;
- else
- nand->banks[chipnr] = 0;
- }
- if (chipnr == 0) {
- dev_err(&pdev->dev, "No NAND chips found\n");
- goto err_iounmap_mmio;
- }
-
- ret = mtd_device_register(mtd, pdata ? pdata->partitions : NULL,
- pdata ? pdata->num_partitions : 0);
-
- if (ret) {
- dev_err(&pdev->dev, "Failed to add mtd device\n");
- goto err_cleanup_nand;
- }
-
- dev_info(&pdev->dev, "Successfully registered JZ4740 NAND driver\n");
-
- return 0;
-
-err_cleanup_nand:
- nand_cleanup(chip);
- while (chipnr--) {
- unsigned char bank = nand->banks[chipnr];
- jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
- nand->bank_base[bank - 1]);
- }
- writel(0, nand->base + JZ_REG_NAND_CTRL);
-err_iounmap_mmio:
- jz_nand_iounmap_resource(nand->mem, nand->base);
-err_free:
- kfree(nand);
- return ret;
-}
-
-static int jz_nand_remove(struct platform_device *pdev)
-{
- struct jz_nand *nand = platform_get_drvdata(pdev);
- size_t i;
-
- nand_release(&nand->chip);
-
- /* Deassert and disable all chips */
- writel(0, nand->base + JZ_REG_NAND_CTRL);
-
- for (i = 0; i < JZ_NAND_NUM_BANKS; ++i) {
- unsigned char bank = nand->banks[i];
- if (bank != 0) {
- jz_nand_iounmap_resource(nand->bank_mem[bank - 1],
- nand->bank_base[bank - 1]);
- }
- }
-
- jz_nand_iounmap_resource(nand->mem, nand->base);
-
- kfree(nand);
-
- return 0;
-}
-
-static struct platform_driver jz_nand_driver = {
- .probe = jz_nand_probe,
- .remove = jz_nand_remove,
- .driver = {
- .name = "jz4740-nand",
- },
-};
-
-module_platform_driver(jz_nand_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_DESCRIPTION("NAND controller driver for JZ4740 SoC");
-MODULE_ALIAS("platform:jz4740-nand");
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 08/11] power/supply: Drop obsolete JZ4740 driver
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
It has been replaced with the more mature ingenic-battery driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
drivers/power/supply/Kconfig | 11 -
drivers/power/supply/Makefile | 1 -
drivers/power/supply/jz4740-battery.c | 421 --------------------------
3 files changed, 433 deletions(-)
delete mode 100644 drivers/power/supply/jz4740-battery.c
diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
index 5d91b5160b41..6ba602ed7979 100644
--- a/drivers/power/supply/Kconfig
+++ b/drivers/power/supply/Kconfig
@@ -417,17 +417,6 @@ config CHARGER_PCF50633
help
Say Y to include support for NXP PCF50633 Main Battery Charger.
-config BATTERY_JZ4740
- tristate "Ingenic JZ4740 battery"
- depends on MACH_JZ4740
- depends on MFD_JZ4740_ADC
- help
- Say Y to enable support for the battery on Ingenic JZ4740 based
- boards.
-
- This driver can be build as a module. If so, the module will be
- called jz4740-battery.
-
config BATTERY_RX51
tristate "Nokia RX-51 (N900) battery driver"
depends on TWL4030_MADC
diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile
index 96c2b74b36bf..6c7da920ea83 100644
--- a/drivers/power/supply/Makefile
+++ b/drivers/power/supply/Makefile
@@ -58,7 +58,6 @@ obj-$(CONFIG_BATTERY_S3C_ADC) += s3c_adc_battery.o
obj-$(CONFIG_BATTERY_TWL4030_MADC) += twl4030_madc_battery.o
obj-$(CONFIG_CHARGER_88PM860X) += 88pm860x_charger.o
obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o
-obj-$(CONFIG_BATTERY_JZ4740) += jz4740-battery.o
obj-$(CONFIG_BATTERY_RX51) += rx51_battery.o
obj-$(CONFIG_AB8500_BM) += ab8500_bmdata.o ab8500_charger.o ab8500_fg.o ab8500_btemp.o abx500_chargalg.o pm2301_charger.o
obj-$(CONFIG_CHARGER_CPCAP) += cpcap-charger.o
diff --git a/drivers/power/supply/jz4740-battery.c b/drivers/power/supply/jz4740-battery.c
deleted file mode 100644
index 6366bd61ea9f..000000000000
--- a/drivers/power/supply/jz4740-battery.c
+++ /dev/null
@@ -1,421 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Battery measurement code for Ingenic JZ SOC.
- *
- * Copyright (C) 2009 Jiejing Zhang <kzjeef@gmail.com>
- * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- *
- * based on tosa_battery.c
- *
- * Copyright (C) 2008 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/io.h>
-
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/gpio.h>
-#include <linux/mfd/core.h>
-#include <linux/power_supply.h>
-
-#include <linux/power/jz4740-battery.h>
-#include <linux/jz4740-adc.h>
-
-struct jz_battery {
- struct jz_battery_platform_data *pdata;
- struct platform_device *pdev;
-
- void __iomem *base;
-
- int irq;
- int charge_irq;
-
- const struct mfd_cell *cell;
-
- int status;
- long voltage;
-
- struct completion read_completion;
-
- struct power_supply *battery;
- struct power_supply_desc battery_desc;
- struct delayed_work work;
-
- struct mutex lock;
-};
-
-static inline struct jz_battery *psy_to_jz_battery(struct power_supply *psy)
-{
- return power_supply_get_drvdata(psy);
-}
-
-static irqreturn_t jz_battery_irq_handler(int irq, void *devid)
-{
- struct jz_battery *battery = devid;
-
- complete(&battery->read_completion);
- return IRQ_HANDLED;
-}
-
-static long jz_battery_read_voltage(struct jz_battery *battery)
-{
- long t;
- unsigned long val;
- long voltage;
-
- mutex_lock(&battery->lock);
-
- reinit_completion(&battery->read_completion);
-
- enable_irq(battery->irq);
- battery->cell->enable(battery->pdev);
-
- t = wait_for_completion_interruptible_timeout(&battery->read_completion,
- HZ);
-
- if (t > 0) {
- val = readw(battery->base) & 0xfff;
-
- if (battery->pdata->info.voltage_max_design <= 2500000)
- val = (val * 78125UL) >> 7UL;
- else
- val = ((val * 924375UL) >> 9UL) + 33000;
- voltage = (long)val;
- } else {
- voltage = t ? t : -ETIMEDOUT;
- }
-
- battery->cell->disable(battery->pdev);
- disable_irq(battery->irq);
-
- mutex_unlock(&battery->lock);
-
- return voltage;
-}
-
-static int jz_battery_get_capacity(struct power_supply *psy)
-{
- struct jz_battery *jz_battery = psy_to_jz_battery(psy);
- struct power_supply_info *info = &jz_battery->pdata->info;
- long voltage;
- int ret;
- int voltage_span;
-
- voltage = jz_battery_read_voltage(jz_battery);
-
- if (voltage < 0)
- return voltage;
-
- voltage_span = info->voltage_max_design - info->voltage_min_design;
- ret = ((voltage - info->voltage_min_design) * 100) / voltage_span;
-
- if (ret > 100)
- ret = 100;
- else if (ret < 0)
- ret = 0;
-
- return ret;
-}
-
-static int jz_battery_get_property(struct power_supply *psy,
- enum power_supply_property psp, union power_supply_propval *val)
-{
- struct jz_battery *jz_battery = psy_to_jz_battery(psy);
- struct power_supply_info *info = &jz_battery->pdata->info;
- long voltage;
-
- switch (psp) {
- case POWER_SUPPLY_PROP_STATUS:
- val->intval = jz_battery->status;
- break;
- case POWER_SUPPLY_PROP_TECHNOLOGY:
- val->intval = jz_battery->pdata->info.technology;
- break;
- case POWER_SUPPLY_PROP_HEALTH:
- voltage = jz_battery_read_voltage(jz_battery);
- if (voltage < info->voltage_min_design)
- val->intval = POWER_SUPPLY_HEALTH_DEAD;
- else
- val->intval = POWER_SUPPLY_HEALTH_GOOD;
- break;
- case POWER_SUPPLY_PROP_CAPACITY:
- val->intval = jz_battery_get_capacity(psy);
- break;
- case POWER_SUPPLY_PROP_VOLTAGE_NOW:
- val->intval = jz_battery_read_voltage(jz_battery);
- if (val->intval < 0)
- return val->intval;
- break;
- case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
- val->intval = info->voltage_max_design;
- break;
- case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
- val->intval = info->voltage_min_design;
- break;
- case POWER_SUPPLY_PROP_PRESENT:
- val->intval = 1;
- break;
- default:
- return -EINVAL;
- }
- return 0;
-}
-
-static void jz_battery_external_power_changed(struct power_supply *psy)
-{
- struct jz_battery *jz_battery = psy_to_jz_battery(psy);
-
- mod_delayed_work(system_wq, &jz_battery->work, 0);
-}
-
-static irqreturn_t jz_battery_charge_irq(int irq, void *data)
-{
- struct jz_battery *jz_battery = data;
-
- mod_delayed_work(system_wq, &jz_battery->work, 0);
-
- return IRQ_HANDLED;
-}
-
-static void jz_battery_update(struct jz_battery *jz_battery)
-{
- int status;
- long voltage;
- bool has_changed = false;
- int is_charging;
-
- if (gpio_is_valid(jz_battery->pdata->gpio_charge)) {
- is_charging = gpio_get_value(jz_battery->pdata->gpio_charge);
- is_charging ^= jz_battery->pdata->gpio_charge_active_low;
- if (is_charging)
- status = POWER_SUPPLY_STATUS_CHARGING;
- else
- status = POWER_SUPPLY_STATUS_NOT_CHARGING;
-
- if (status != jz_battery->status) {
- jz_battery->status = status;
- has_changed = true;
- }
- }
-
- voltage = jz_battery_read_voltage(jz_battery);
- if (voltage >= 0 && abs(voltage - jz_battery->voltage) > 50000) {
- jz_battery->voltage = voltage;
- has_changed = true;
- }
-
- if (has_changed)
- power_supply_changed(jz_battery->battery);
-}
-
-static enum power_supply_property jz_battery_properties[] = {
- POWER_SUPPLY_PROP_STATUS,
- POWER_SUPPLY_PROP_TECHNOLOGY,
- POWER_SUPPLY_PROP_HEALTH,
- POWER_SUPPLY_PROP_CAPACITY,
- POWER_SUPPLY_PROP_VOLTAGE_NOW,
- POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
- POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
- POWER_SUPPLY_PROP_PRESENT,
-};
-
-static void jz_battery_work(struct work_struct *work)
-{
- /* Too small interval will increase system workload */
- const int interval = HZ * 30;
- struct jz_battery *jz_battery = container_of(work, struct jz_battery,
- work.work);
-
- jz_battery_update(jz_battery);
- schedule_delayed_work(&jz_battery->work, interval);
-}
-
-static int jz_battery_probe(struct platform_device *pdev)
-{
- int ret = 0;
- struct jz_battery_platform_data *pdata = pdev->dev.parent->platform_data;
- struct power_supply_config psy_cfg = {};
- struct jz_battery *jz_battery;
- struct power_supply_desc *battery_desc;
- struct resource *mem;
-
- if (!pdata) {
- dev_err(&pdev->dev, "No platform_data supplied\n");
- return -ENXIO;
- }
-
- jz_battery = devm_kzalloc(&pdev->dev, sizeof(*jz_battery), GFP_KERNEL);
- if (!jz_battery) {
- dev_err(&pdev->dev, "Failed to allocate driver structure\n");
- return -ENOMEM;
- }
-
- jz_battery->cell = mfd_get_cell(pdev);
-
- jz_battery->irq = platform_get_irq(pdev, 0);
- if (jz_battery->irq < 0) {
- dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
- return jz_battery->irq;
- }
-
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-
- jz_battery->base = devm_ioremap_resource(&pdev->dev, mem);
- if (IS_ERR(jz_battery->base))
- return PTR_ERR(jz_battery->base);
-
- battery_desc = &jz_battery->battery_desc;
- battery_desc->name = pdata->info.name;
- battery_desc->type = POWER_SUPPLY_TYPE_BATTERY;
- battery_desc->properties = jz_battery_properties;
- battery_desc->num_properties = ARRAY_SIZE(jz_battery_properties);
- battery_desc->get_property = jz_battery_get_property;
- battery_desc->external_power_changed =
- jz_battery_external_power_changed;
- battery_desc->use_for_apm = 1;
-
- psy_cfg.drv_data = jz_battery;
-
- jz_battery->pdata = pdata;
- jz_battery->pdev = pdev;
-
- init_completion(&jz_battery->read_completion);
- mutex_init(&jz_battery->lock);
-
- INIT_DELAYED_WORK(&jz_battery->work, jz_battery_work);
-
- ret = request_irq(jz_battery->irq, jz_battery_irq_handler, 0, pdev->name,
- jz_battery);
- if (ret) {
- dev_err(&pdev->dev, "Failed to request irq %d\n", ret);
- return ret;
- }
- disable_irq(jz_battery->irq);
-
- if (gpio_is_valid(pdata->gpio_charge)) {
- ret = gpio_request(pdata->gpio_charge, dev_name(&pdev->dev));
- if (ret) {
- dev_err(&pdev->dev, "charger state gpio request failed.\n");
- goto err_free_irq;
- }
- ret = gpio_direction_input(pdata->gpio_charge);
- if (ret) {
- dev_err(&pdev->dev, "charger state gpio set direction failed.\n");
- goto err_free_gpio;
- }
-
- jz_battery->charge_irq = gpio_to_irq(pdata->gpio_charge);
-
- if (jz_battery->charge_irq >= 0) {
- ret = request_irq(jz_battery->charge_irq,
- jz_battery_charge_irq,
- IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- dev_name(&pdev->dev), jz_battery);
- if (ret) {
- dev_err(&pdev->dev, "Failed to request charge irq: %d\n", ret);
- goto err_free_gpio;
- }
- }
- } else {
- jz_battery->charge_irq = -1;
- }
-
- if (jz_battery->pdata->info.voltage_max_design <= 2500000)
- jz4740_adc_set_config(pdev->dev.parent, JZ_ADC_CONFIG_BAT_MB,
- JZ_ADC_CONFIG_BAT_MB);
- else
- jz4740_adc_set_config(pdev->dev.parent, JZ_ADC_CONFIG_BAT_MB, 0);
-
- jz_battery->battery = power_supply_register(&pdev->dev, battery_desc,
- &psy_cfg);
- if (IS_ERR(jz_battery->battery)) {
- dev_err(&pdev->dev, "power supply battery register failed.\n");
- ret = PTR_ERR(jz_battery->battery);
- goto err_free_charge_irq;
- }
-
- platform_set_drvdata(pdev, jz_battery);
- schedule_delayed_work(&jz_battery->work, 0);
-
- return 0;
-
-err_free_charge_irq:
- if (jz_battery->charge_irq >= 0)
- free_irq(jz_battery->charge_irq, jz_battery);
-err_free_gpio:
- if (gpio_is_valid(pdata->gpio_charge))
- gpio_free(jz_battery->pdata->gpio_charge);
-err_free_irq:
- free_irq(jz_battery->irq, jz_battery);
- return ret;
-}
-
-static int jz_battery_remove(struct platform_device *pdev)
-{
- struct jz_battery *jz_battery = platform_get_drvdata(pdev);
-
- cancel_delayed_work_sync(&jz_battery->work);
-
- if (gpio_is_valid(jz_battery->pdata->gpio_charge)) {
- if (jz_battery->charge_irq >= 0)
- free_irq(jz_battery->charge_irq, jz_battery);
- gpio_free(jz_battery->pdata->gpio_charge);
- }
-
- power_supply_unregister(jz_battery->battery);
-
- free_irq(jz_battery->irq, jz_battery);
-
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int jz_battery_suspend(struct device *dev)
-{
- struct jz_battery *jz_battery = dev_get_drvdata(dev);
-
- cancel_delayed_work_sync(&jz_battery->work);
- jz_battery->status = POWER_SUPPLY_STATUS_UNKNOWN;
-
- return 0;
-}
-
-static int jz_battery_resume(struct device *dev)
-{
- struct jz_battery *jz_battery = dev_get_drvdata(dev);
-
- schedule_delayed_work(&jz_battery->work, 0);
-
- return 0;
-}
-
-static const struct dev_pm_ops jz_battery_pm_ops = {
- .suspend = jz_battery_suspend,
- .resume = jz_battery_resume,
-};
-
-#define JZ_BATTERY_PM_OPS (&jz_battery_pm_ops)
-#else
-#define JZ_BATTERY_PM_OPS NULL
-#endif
-
-static struct platform_driver jz_battery_driver = {
- .probe = jz_battery_probe,
- .remove = jz_battery_remove,
- .driver = {
- .name = "jz4740-battery",
- .pm = JZ_BATTERY_PM_OPS,
- },
-};
-
-module_platform_driver(jz_battery_driver);
-
-MODULE_ALIAS("platform:jz4740-battery");
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_DESCRIPTION("JZ4740 SoC battery driver");
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 09/11] hwmon: Drop obsolete JZ4740 driver
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
The JZ4740 boards now use the iio-hwmon driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
drivers/hwmon/Kconfig | 10 ---
drivers/hwmon/Makefile | 1 -
drivers/hwmon/jz4740-hwmon.c | 135 -----------------------------------
3 files changed, 146 deletions(-)
delete mode 100644 drivers/hwmon/jz4740-hwmon.c
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 650dd71f9724..2199ac1d0ba7 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -660,16 +660,6 @@ config SENSORS_IT87
This driver can also be built as a module. If so, the module
will be called it87.
-config SENSORS_JZ4740
- tristate "Ingenic JZ4740 SoC ADC driver"
- depends on MACH_JZ4740 && MFD_JZ4740_ADC
- help
- If you say yes here you get support for reading adc values from the ADCIN
- pin on Ingenic JZ4740 SoC based boards.
-
- This driver can also be built as a module. If so, the module will be
- called jz4740-hwmon.
-
config SENSORS_JC42
tristate "JEDEC JC42.4 compliant memory module temperature sensors"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 8db472ea04f0..1e82e912a5c4 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -85,7 +85,6 @@ obj-$(CONFIG_SENSORS_INA2XX) += ina2xx.o
obj-$(CONFIG_SENSORS_INA3221) += ina3221.o
obj-$(CONFIG_SENSORS_IT87) += it87.o
obj-$(CONFIG_SENSORS_JC42) += jc42.o
-obj-$(CONFIG_SENSORS_JZ4740) += jz4740-hwmon.o
obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o
obj-$(CONFIG_SENSORS_K10TEMP) += k10temp.o
obj-$(CONFIG_SENSORS_LINEAGE) += lineage-pem.o
diff --git a/drivers/hwmon/jz4740-hwmon.c b/drivers/hwmon/jz4740-hwmon.c
deleted file mode 100644
index bec5befd1d8b..000000000000
--- a/drivers/hwmon/jz4740-hwmon.c
+++ /dev/null
@@ -1,135 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 SoC HWMON driver
- */
-
-#include <linux/err.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/io.h>
-
-#include <linux/completion.h>
-#include <linux/mfd/core.h>
-
-#include <linux/hwmon.h>
-
-struct jz4740_hwmon {
- void __iomem *base;
- int irq;
- const struct mfd_cell *cell;
- struct platform_device *pdev;
- struct completion read_completion;
- struct mutex lock;
-};
-
-static irqreturn_t jz4740_hwmon_irq(int irq, void *data)
-{
- struct jz4740_hwmon *hwmon = data;
-
- complete(&hwmon->read_completion);
- return IRQ_HANDLED;
-}
-
-static ssize_t in0_input_show(struct device *dev,
- struct device_attribute *dev_attr, char *buf)
-{
- struct jz4740_hwmon *hwmon = dev_get_drvdata(dev);
- struct platform_device *pdev = hwmon->pdev;
- struct completion *completion = &hwmon->read_completion;
- long t;
- unsigned long val;
- int ret;
-
- mutex_lock(&hwmon->lock);
-
- reinit_completion(completion);
-
- enable_irq(hwmon->irq);
- hwmon->cell->enable(pdev);
-
- t = wait_for_completion_interruptible_timeout(completion, HZ);
-
- if (t > 0) {
- val = readw(hwmon->base) & 0xfff;
- val = (val * 3300) >> 12;
- ret = sprintf(buf, "%lu\n", val);
- } else {
- ret = t ? t : -ETIMEDOUT;
- }
-
- hwmon->cell->disable(pdev);
- disable_irq(hwmon->irq);
-
- mutex_unlock(&hwmon->lock);
-
- return ret;
-}
-
-static DEVICE_ATTR_RO(in0_input);
-
-static struct attribute *jz4740_attrs[] = {
- &dev_attr_in0_input.attr,
- NULL
-};
-
-ATTRIBUTE_GROUPS(jz4740);
-
-static int jz4740_hwmon_probe(struct platform_device *pdev)
-{
- int ret;
- struct device *dev = &pdev->dev;
- struct jz4740_hwmon *hwmon;
- struct device *hwmon_dev;
-
- hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
- if (!hwmon)
- return -ENOMEM;
-
- hwmon->cell = mfd_get_cell(pdev);
-
- hwmon->irq = platform_get_irq(pdev, 0);
- if (hwmon->irq < 0) {
- dev_err(&pdev->dev, "Failed to get platform irq: %d\n",
- hwmon->irq);
- return hwmon->irq;
- }
-
- hwmon->base = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(hwmon->base))
- return PTR_ERR(hwmon->base);
-
- hwmon->pdev = pdev;
- init_completion(&hwmon->read_completion);
- mutex_init(&hwmon->lock);
-
- ret = devm_request_irq(dev, hwmon->irq, jz4740_hwmon_irq, 0,
- pdev->name, hwmon);
- if (ret) {
- dev_err(&pdev->dev, "Failed to request irq: %d\n", ret);
- return ret;
- }
- disable_irq(hwmon->irq);
-
- hwmon_dev = devm_hwmon_device_register_with_groups(dev, "jz4740", hwmon,
- jz4740_groups);
- return PTR_ERR_OR_ZERO(hwmon_dev);
-}
-
-static struct platform_driver jz4740_hwmon_driver = {
- .probe = jz4740_hwmon_probe,
- .driver = {
- .name = "jz4740-hwmon",
- },
-};
-
-module_platform_driver(jz4740_hwmon_driver);
-
-MODULE_DESCRIPTION("JZ4740 SoC HWMON driver");
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:jz4740-hwmon");
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 10/11] mfd: Drop obsolete JZ4740 driver
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
It has been replaced with the ingenic-iio driver for the ADC.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
drivers/mfd/Kconfig | 9 --
drivers/mfd/Makefile | 1 -
drivers/mfd/jz4740-adc.c | 324 ---------------------------------------
3 files changed, 334 deletions(-)
delete mode 100644 drivers/mfd/jz4740-adc.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index f129f9678940..4a07afe50b35 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -649,15 +649,6 @@ config MFD_JANZ_CMODIO
host many different types of MODULbus daughterboards, including
CAN and GPIO controllers.
-config MFD_JZ4740_ADC
- bool "Janz JZ4740 ADC core"
- select MFD_CORE
- select GENERIC_IRQ_CHIP
- depends on MACH_JZ4740
- help
- Say yes here if you want support for the ADC unit in the JZ4740 SoC.
- This driver is necessary for jz4740-battery and jz4740-hwmon driver.
-
config MFD_KEMPLD
tristate "Kontron module PLD device"
select MFD_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index f026ada68f6a..446d5df7cacb 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -191,7 +191,6 @@ obj-$(CONFIG_LPC_SCH) += lpc_sch.o
obj-$(CONFIG_LPC_ICH) += lpc_ich.o
obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o
obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o
-obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o
obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o
obj-$(CONFIG_MFD_VX855) += vx855.o
obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o
diff --git a/drivers/mfd/jz4740-adc.c b/drivers/mfd/jz4740-adc.c
deleted file mode 100644
index 082f16917519..000000000000
--- a/drivers/mfd/jz4740-adc.c
+++ /dev/null
@@ -1,324 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 SoC ADC driver
- *
- * This driver synchronizes access to the JZ4740 ADC core between the
- * JZ4740 battery and hwmon drivers.
- */
-
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-
-#include <linux/clk.h>
-#include <linux/mfd/core.h>
-
-#include <linux/jz4740-adc.h>
-
-
-#define JZ_REG_ADC_ENABLE 0x00
-#define JZ_REG_ADC_CFG 0x04
-#define JZ_REG_ADC_CTRL 0x08
-#define JZ_REG_ADC_STATUS 0x0c
-
-#define JZ_REG_ADC_TOUCHSCREEN_BASE 0x10
-#define JZ_REG_ADC_BATTERY_BASE 0x1c
-#define JZ_REG_ADC_HWMON_BASE 0x20
-
-#define JZ_ADC_ENABLE_TOUCH BIT(2)
-#define JZ_ADC_ENABLE_BATTERY BIT(1)
-#define JZ_ADC_ENABLE_ADCIN BIT(0)
-
-enum {
- JZ_ADC_IRQ_ADCIN = 0,
- JZ_ADC_IRQ_BATTERY,
- JZ_ADC_IRQ_TOUCH,
- JZ_ADC_IRQ_PENUP,
- JZ_ADC_IRQ_PENDOWN,
-};
-
-struct jz4740_adc {
- struct resource *mem;
- void __iomem *base;
-
- int irq;
- struct irq_chip_generic *gc;
-
- struct clk *clk;
- atomic_t clk_ref;
-
- spinlock_t lock;
-};
-
-static void jz4740_adc_irq_demux(struct irq_desc *desc)
-{
- struct irq_chip_generic *gc = irq_desc_get_handler_data(desc);
- uint8_t status;
- unsigned int i;
-
- status = readb(gc->reg_base + JZ_REG_ADC_STATUS);
-
- for (i = 0; i < 5; ++i) {
- if (status & BIT(i))
- generic_handle_irq(gc->irq_base + i);
- }
-}
-
-
-/* Refcounting for the ADC clock is done in here instead of in the clock
- * framework, because it is the only clock which is shared between multiple
- * devices and thus is the only clock which needs refcounting */
-static inline void jz4740_adc_clk_enable(struct jz4740_adc *adc)
-{
- if (atomic_inc_return(&adc->clk_ref) == 1)
- clk_prepare_enable(adc->clk);
-}
-
-static inline void jz4740_adc_clk_disable(struct jz4740_adc *adc)
-{
- if (atomic_dec_return(&adc->clk_ref) == 0)
- clk_disable_unprepare(adc->clk);
-}
-
-static inline void jz4740_adc_set_enabled(struct jz4740_adc *adc, int engine,
- bool enabled)
-{
- unsigned long flags;
- uint8_t val;
-
- spin_lock_irqsave(&adc->lock, flags);
-
- val = readb(adc->base + JZ_REG_ADC_ENABLE);
- if (enabled)
- val |= BIT(engine);
- else
- val &= ~BIT(engine);
- writeb(val, adc->base + JZ_REG_ADC_ENABLE);
-
- spin_unlock_irqrestore(&adc->lock, flags);
-}
-
-static int jz4740_adc_cell_enable(struct platform_device *pdev)
-{
- struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent);
-
- jz4740_adc_clk_enable(adc);
- jz4740_adc_set_enabled(adc, pdev->id, true);
-
- return 0;
-}
-
-static int jz4740_adc_cell_disable(struct platform_device *pdev)
-{
- struct jz4740_adc *adc = dev_get_drvdata(pdev->dev.parent);
-
- jz4740_adc_set_enabled(adc, pdev->id, false);
- jz4740_adc_clk_disable(adc);
-
- return 0;
-}
-
-int jz4740_adc_set_config(struct device *dev, uint32_t mask, uint32_t val)
-{
- struct jz4740_adc *adc = dev_get_drvdata(dev);
- unsigned long flags;
- uint32_t cfg;
-
- if (!adc)
- return -ENODEV;
-
- spin_lock_irqsave(&adc->lock, flags);
-
- cfg = readl(adc->base + JZ_REG_ADC_CFG);
-
- cfg &= ~mask;
- cfg |= val;
-
- writel(cfg, adc->base + JZ_REG_ADC_CFG);
-
- spin_unlock_irqrestore(&adc->lock, flags);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(jz4740_adc_set_config);
-
-static struct resource jz4740_hwmon_resources[] = {
- {
- .start = JZ_ADC_IRQ_ADCIN,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = JZ_REG_ADC_HWMON_BASE,
- .end = JZ_REG_ADC_HWMON_BASE + 3,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct resource jz4740_battery_resources[] = {
- {
- .start = JZ_ADC_IRQ_BATTERY,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = JZ_REG_ADC_BATTERY_BASE,
- .end = JZ_REG_ADC_BATTERY_BASE + 3,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static const struct mfd_cell jz4740_adc_cells[] = {
- {
- .id = 0,
- .name = "jz4740-hwmon",
- .num_resources = ARRAY_SIZE(jz4740_hwmon_resources),
- .resources = jz4740_hwmon_resources,
-
- .enable = jz4740_adc_cell_enable,
- .disable = jz4740_adc_cell_disable,
- },
- {
- .id = 1,
- .name = "jz4740-battery",
- .num_resources = ARRAY_SIZE(jz4740_battery_resources),
- .resources = jz4740_battery_resources,
-
- .enable = jz4740_adc_cell_enable,
- .disable = jz4740_adc_cell_disable,
- },
-};
-
-static int jz4740_adc_probe(struct platform_device *pdev)
-{
- struct irq_chip_generic *gc;
- struct irq_chip_type *ct;
- struct jz4740_adc *adc;
- struct resource *mem_base;
- int ret;
- int irq_base;
-
- adc = devm_kzalloc(&pdev->dev, sizeof(*adc), GFP_KERNEL);
- if (!adc)
- return -ENOMEM;
-
- adc->irq = platform_get_irq(pdev, 0);
- if (adc->irq < 0) {
- ret = adc->irq;
- dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret);
- return ret;
- }
-
- irq_base = platform_get_irq(pdev, 1);
- if (irq_base < 0) {
- dev_err(&pdev->dev, "Failed to get irq base: %d\n", irq_base);
- return irq_base;
- }
-
- mem_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!mem_base) {
- dev_err(&pdev->dev, "Failed to get platform mmio resource\n");
- return -ENOENT;
- }
-
- /* Only request the shared registers for the MFD driver */
- adc->mem = request_mem_region(mem_base->start, JZ_REG_ADC_STATUS,
- pdev->name);
- if (!adc->mem) {
- dev_err(&pdev->dev, "Failed to request mmio memory region\n");
- return -EBUSY;
- }
-
- adc->base = ioremap_nocache(adc->mem->start, resource_size(adc->mem));
- if (!adc->base) {
- ret = -EBUSY;
- dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
- goto err_release_mem_region;
- }
-
- adc->clk = clk_get(&pdev->dev, "adc");
- if (IS_ERR(adc->clk)) {
- ret = PTR_ERR(adc->clk);
- dev_err(&pdev->dev, "Failed to get clock: %d\n", ret);
- goto err_iounmap;
- }
-
- spin_lock_init(&adc->lock);
- atomic_set(&adc->clk_ref, 0);
-
- platform_set_drvdata(pdev, adc);
-
- gc = irq_alloc_generic_chip("INTC", 1, irq_base, adc->base,
- handle_level_irq);
-
- ct = gc->chip_types;
- ct->regs.mask = JZ_REG_ADC_CTRL;
- ct->regs.ack = JZ_REG_ADC_STATUS;
- ct->chip.irq_mask = irq_gc_mask_set_bit;
- ct->chip.irq_unmask = irq_gc_mask_clr_bit;
- ct->chip.irq_ack = irq_gc_ack_set_bit;
-
- irq_setup_generic_chip(gc, IRQ_MSK(5), IRQ_GC_INIT_MASK_CACHE, 0,
- IRQ_NOPROBE | IRQ_LEVEL);
-
- adc->gc = gc;
-
- irq_set_chained_handler_and_data(adc->irq, jz4740_adc_irq_demux, gc);
-
- writeb(0x00, adc->base + JZ_REG_ADC_ENABLE);
- writeb(0xff, adc->base + JZ_REG_ADC_CTRL);
-
- ret = mfd_add_devices(&pdev->dev, 0, jz4740_adc_cells,
- ARRAY_SIZE(jz4740_adc_cells), mem_base,
- irq_base, NULL);
- if (ret < 0)
- goto err_clk_put;
-
- return 0;
-
-err_clk_put:
- clk_put(adc->clk);
-err_iounmap:
- iounmap(adc->base);
-err_release_mem_region:
- release_mem_region(adc->mem->start, resource_size(adc->mem));
- return ret;
-}
-
-static int jz4740_adc_remove(struct platform_device *pdev)
-{
- struct jz4740_adc *adc = platform_get_drvdata(pdev);
-
- mfd_remove_devices(&pdev->dev);
-
- irq_remove_generic_chip(adc->gc, IRQ_MSK(5), IRQ_NOPROBE | IRQ_LEVEL, 0);
- kfree(adc->gc);
- irq_set_chained_handler_and_data(adc->irq, NULL, NULL);
-
- iounmap(adc->base);
- release_mem_region(adc->mem->start, resource_size(adc->mem));
-
- clk_put(adc->clk);
-
- return 0;
-}
-
-static struct platform_driver jz4740_adc_driver = {
- .probe = jz4740_adc_probe,
- .remove = jz4740_adc_remove,
- .driver = {
- .name = "jz4740-adc",
- },
-};
-
-module_platform_driver(jz4740_adc_driver);
-
-MODULE_DESCRIPTION("JZ4740 SoC ADC driver");
-MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:jz4740-adc");
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* [PATCH 11/11] MIPS: jz4740: Drop dead code
From: Paul Cercueil @ 2019-07-25 22:02 UTC (permalink / raw)
To: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Guenter Roeck, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown
Cc: od, devicetree, linux-mips, linux-kernel, dmaengine, linux-hwmon,
linux-mtd, linux-pm, dri-devel, linux-fbdev, alsa-devel,
Paul Cercueil, Artur Rojek
In-Reply-To: <20190725220215.460-1-paul@crapouillou.net>
Remove all the source files that are not used anywhere anymore.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
---
arch/mips/include/asm/mach-jz4740/gpio.h | 15 --
arch/mips/include/asm/mach-jz4740/jz4740_fb.h | 58 ----
.../mips/include/asm/mach-jz4740/jz4740_mmc.h | 12 -
arch/mips/include/asm/mach-jz4740/platform.h | 26 --
arch/mips/jz4740/Makefile | 3 +-
arch/mips/jz4740/platform.c | 250 ------------------
arch/mips/jz4740/prom.c | 5 -
arch/mips/jz4740/setup.c | 3 +-
8 files changed, 2 insertions(+), 370 deletions(-)
delete mode 100644 arch/mips/include/asm/mach-jz4740/gpio.h
delete mode 100644 arch/mips/include/asm/mach-jz4740/jz4740_fb.h
delete mode 100644 arch/mips/include/asm/mach-jz4740/jz4740_mmc.h
delete mode 100644 arch/mips/include/asm/mach-jz4740/platform.h
delete mode 100644 arch/mips/jz4740/platform.c
diff --git a/arch/mips/include/asm/mach-jz4740/gpio.h b/arch/mips/include/asm/mach-jz4740/gpio.h
deleted file mode 100644
index 2092a3597734..000000000000
--- a/arch/mips/include/asm/mach-jz4740/gpio.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 GPIO pin definitions
- */
-
-#ifndef _JZ_GPIO_H
-#define _JZ_GPIO_H
-
-#define JZ_GPIO_PORTA(x) ((x) + 32 * 0)
-#define JZ_GPIO_PORTB(x) ((x) + 32 * 1)
-#define JZ_GPIO_PORTC(x) ((x) + 32 * 2)
-#define JZ_GPIO_PORTD(x) ((x) + 32 * 3)
-
-#endif
diff --git a/arch/mips/include/asm/mach-jz4740/jz4740_fb.h b/arch/mips/include/asm/mach-jz4740/jz4740_fb.h
deleted file mode 100644
index e84a48f73285..000000000000
--- a/arch/mips/include/asm/mach-jz4740/jz4740_fb.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
- */
-
-#ifndef __ASM_MACH_JZ4740_JZ4740_FB_H__
-#define __ASM_MACH_JZ4740_JZ4740_FB_H__
-
-#include <linux/fb.h>
-
-enum jz4740_fb_lcd_type {
- JZ_LCD_TYPE_GENERIC_16_BIT = 0,
- JZ_LCD_TYPE_GENERIC_18_BIT = 0 | (1 << 4),
- JZ_LCD_TYPE_SPECIAL_TFT_1 = 1,
- JZ_LCD_TYPE_SPECIAL_TFT_2 = 2,
- JZ_LCD_TYPE_SPECIAL_TFT_3 = 3,
- JZ_LCD_TYPE_NON_INTERLACED_CCIR656 = 5,
- JZ_LCD_TYPE_INTERLACED_CCIR656 = 7,
- JZ_LCD_TYPE_SINGLE_COLOR_STN = 8,
- JZ_LCD_TYPE_SINGLE_MONOCHROME_STN = 9,
- JZ_LCD_TYPE_DUAL_COLOR_STN = 10,
- JZ_LCD_TYPE_DUAL_MONOCHROME_STN = 11,
- JZ_LCD_TYPE_8BIT_SERIAL = 12,
-};
-
-#define JZ4740_FB_SPECIAL_TFT_CONFIG(start, stop) (((start) << 16) | (stop))
-
-/*
-* width: width of the lcd display in mm
-* height: height of the lcd display in mm
-* num_modes: size of modes
-* modes: list of valid video modes
-* bpp: bits per pixel for the lcd
-* lcd_type: lcd type
-*/
-
-struct jz4740_fb_platform_data {
- unsigned int width;
- unsigned int height;
-
- size_t num_modes;
- struct fb_videomode *modes;
-
- unsigned int bpp;
- enum jz4740_fb_lcd_type lcd_type;
-
- struct {
- uint32_t spl;
- uint32_t cls;
- uint32_t ps;
- uint32_t rev;
- } special_tft_config;
-
- unsigned pixclk_falling_edge:1;
- unsigned date_enable_active_low:1;
-};
-
-#endif
diff --git a/arch/mips/include/asm/mach-jz4740/jz4740_mmc.h b/arch/mips/include/asm/mach-jz4740/jz4740_mmc.h
deleted file mode 100644
index 9a7de47c7c79..000000000000
--- a/arch/mips/include/asm/mach-jz4740/jz4740_mmc.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __LINUX_MMC_JZ4740_MMC
-#define __LINUX_MMC_JZ4740_MMC
-
-struct jz4740_mmc_platform_data {
- unsigned card_detect_active_low:1;
- unsigned read_only_active_low:1;
-
- unsigned data_1bit:1;
-};
-
-#endif
diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h
deleted file mode 100644
index 241270d3ea14..000000000000
--- a/arch/mips/include/asm/mach-jz4740/platform.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 platform device definitions
- */
-
-
-#ifndef __JZ4740_PLATFORM_H
-#define __JZ4740_PLATFORM_H
-
-#include <linux/platform_device.h>
-
-extern struct platform_device jz4740_udc_device;
-extern struct platform_device jz4740_udc_xceiv_device;
-extern struct platform_device jz4740_mmc_device;
-extern struct platform_device jz4740_i2c_device;
-extern struct platform_device jz4740_nand_device;
-extern struct platform_device jz4740_framebuffer_device;
-extern struct platform_device jz4740_i2s_device;
-extern struct platform_device jz4740_pcm_device;
-extern struct platform_device jz4740_codec_device;
-extern struct platform_device jz4740_adc_device;
-extern struct platform_device jz4740_pwm_device;
-extern struct platform_device jz4740_dma_device;
-
-#endif
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index 390c82adc00c..6de14c0deb4e 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -5,8 +5,7 @@
# Object file lists.
-obj-y += prom.o time.o reset.o setup.o \
- platform.o timer.o
+obj-y += prom.o time.o reset.o setup.o timer.o
CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
deleted file mode 100644
index c74c99f5951d..000000000000
--- a/arch/mips/jz4740/platform.c
+++ /dev/null
@@ -1,250 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
- * JZ4740 platform devices
- */
-
-#include <linux/clk.h>
-#include <linux/device.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/resource.h>
-
-#include <linux/dma-mapping.h>
-
-#include <linux/usb/musb.h>
-
-#include <asm/mach-jz4740/platform.h>
-#include <asm/mach-jz4740/base.h>
-#include <asm/mach-jz4740/irq.h>
-
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-/* USB Device Controller */
-struct platform_device jz4740_udc_xceiv_device = {
- .name = "usb_phy_generic",
- .id = 0,
-};
-
-static struct resource jz4740_udc_resources[] = {
- [0] = {
- .start = JZ4740_UDC_BASE_ADDR,
- .end = JZ4740_UDC_BASE_ADDR + 0x10000 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = JZ4740_IRQ_UDC,
- .end = JZ4740_IRQ_UDC,
- .flags = IORESOURCE_IRQ,
- .name = "mc",
- },
-};
-
-struct platform_device jz4740_udc_device = {
- .name = "musb-jz4740",
- .id = -1,
- .dev = {
- .dma_mask = &jz4740_udc_device.dev.coherent_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(jz4740_udc_resources),
- .resource = jz4740_udc_resources,
-};
-
-/* MMC/SD controller */
-static struct resource jz4740_mmc_resources[] = {
- {
- .start = JZ4740_MSC_BASE_ADDR,
- .end = JZ4740_MSC_BASE_ADDR + 0x1000 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = JZ4740_IRQ_MSC,
- .end = JZ4740_IRQ_MSC,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-struct platform_device jz4740_mmc_device = {
- .name = "jz4740-mmc",
- .id = 0,
- .dev = {
- .dma_mask = &jz4740_mmc_device.dev.coherent_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(jz4740_mmc_resources),
- .resource = jz4740_mmc_resources,
-};
-
-/* I2C controller */
-static struct resource jz4740_i2c_resources[] = {
- {
- .start = JZ4740_I2C_BASE_ADDR,
- .end = JZ4740_I2C_BASE_ADDR + 0x1000 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = JZ4740_IRQ_I2C,
- .end = JZ4740_IRQ_I2C,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-struct platform_device jz4740_i2c_device = {
- .name = "jz4740-i2c",
- .id = 0,
- .num_resources = ARRAY_SIZE(jz4740_i2c_resources),
- .resource = jz4740_i2c_resources,
-};
-
-/* NAND controller */
-static struct resource jz4740_nand_resources[] = {
- {
- .name = "mmio",
- .start = JZ4740_EMC_BASE_ADDR,
- .end = JZ4740_EMC_BASE_ADDR + 0x1000 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "bank1",
- .start = 0x18000000,
- .end = 0x180C0000 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "bank2",
- .start = 0x14000000,
- .end = 0x140C0000 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "bank3",
- .start = 0x0C000000,
- .end = 0x0C0C0000 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "bank4",
- .start = 0x08000000,
- .end = 0x080C0000 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device jz4740_nand_device = {
- .name = "jz4740-nand",
- .num_resources = ARRAY_SIZE(jz4740_nand_resources),
- .resource = jz4740_nand_resources,
-};
-
-/* LCD controller */
-static struct resource jz4740_framebuffer_resources[] = {
- {
- .start = JZ4740_LCD_BASE_ADDR,
- .end = JZ4740_LCD_BASE_ADDR + 0x1000 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device jz4740_framebuffer_device = {
- .name = "jz4740-fb",
- .id = -1,
- .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources),
- .resource = jz4740_framebuffer_resources,
- .dev = {
- .dma_mask = &jz4740_framebuffer_device.dev.coherent_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-/* I2S controller */
-static struct resource jz4740_i2s_resources[] = {
- {
- .start = JZ4740_AIC_BASE_ADDR,
- .end = JZ4740_AIC_BASE_ADDR + 0x38 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device jz4740_i2s_device = {
- .name = "jz4740-i2s",
- .id = -1,
- .num_resources = ARRAY_SIZE(jz4740_i2s_resources),
- .resource = jz4740_i2s_resources,
-};
-
-/* PCM */
-struct platform_device jz4740_pcm_device = {
- .name = "jz4740-pcm-audio",
- .id = -1,
-};
-
-/* Codec */
-static struct resource jz4740_codec_resources[] = {
- {
- .start = JZ4740_AIC_BASE_ADDR + 0x80,
- .end = JZ4740_AIC_BASE_ADDR + 0x88 - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-struct platform_device jz4740_codec_device = {
- .name = "jz4740-codec",
- .id = -1,
- .num_resources = ARRAY_SIZE(jz4740_codec_resources),
- .resource = jz4740_codec_resources,
-};
-
-/* ADC controller */
-static struct resource jz4740_adc_resources[] = {
- {
- .start = JZ4740_SADC_BASE_ADDR,
- .end = JZ4740_SADC_BASE_ADDR + 0x30,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = JZ4740_IRQ_SADC,
- .end = JZ4740_IRQ_SADC,
- .flags = IORESOURCE_IRQ,
- },
- {
- .start = JZ4740_IRQ_ADC_BASE,
- .end = JZ4740_IRQ_ADC_BASE,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device jz4740_adc_device = {
- .name = "jz4740-adc",
- .id = -1,
- .num_resources = ARRAY_SIZE(jz4740_adc_resources),
- .resource = jz4740_adc_resources,
-};
-
-/* PWM */
-struct platform_device jz4740_pwm_device = {
- .name = "jz4740-pwm",
- .id = -1,
-};
-
-/* DMA */
-static struct resource jz4740_dma_resources[] = {
- {
- .start = JZ4740_DMAC_BASE_ADDR,
- .end = JZ4740_DMAC_BASE_ADDR + 0x400 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = JZ4740_IRQ_DMAC,
- .end = JZ4740_IRQ_DMAC,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-struct platform_device jz4740_dma_device = {
- .name = "jz4740-dma",
- .id = -1,
- .num_resources = ARRAY_SIZE(jz4740_dma_resources),
- .resource = jz4740_dma_resources,
-};
diff --git a/arch/mips/jz4740/prom.c b/arch/mips/jz4740/prom.c
index 88f33af4403b..ff4555c3fb15 100644
--- a/arch/mips/jz4740/prom.c
+++ b/arch/mips/jz4740/prom.c
@@ -4,15 +4,10 @@
* JZ4740 SoC prom code
*/
-#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/string.h>
-
-#include <linux/serial_reg.h>
#include <asm/bootinfo.h>
#include <asm/fw/fw.h>
-#include <asm/mach-jz4740/base.h>
void __init prom_init(void)
{
diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
index 4264eaf030c3..73ed2724d4c7 100644
--- a/arch/mips/jz4740/setup.c
+++ b/arch/mips/jz4740/setup.c
@@ -15,10 +15,9 @@
#include <asm/bootinfo.h>
#include <asm/prom.h>
-#include <asm/mach-jz4740/base.h>
-
#include "reset.h"
+#define JZ4740_EMC_BASE_ADDR 0x13010000
#define JZ4740_EMC_SDRAM_CTRL 0x80
--
2.21.0.593.g511ec345e18
^ permalink raw reply related
* Re: [PATCH 09/11] hwmon: Drop obsolete JZ4740 driver
From: Guenter Roeck @ 2019-07-25 22:16 UTC (permalink / raw)
To: Paul Cercueil
Cc: Ralf Baechle, Paul Burton, James Hogan, Rob Herring, Mark Rutland,
Vinod Koul, Jean Delvare, Lee Jones, Miquel Raynal,
Richard Weinberger, Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Liam Girdwood, Mark Brown, od, devicetree, linux-mips,
linux-kernel, dmaengine, linux-hwmon, linux-mtd, linux-pm,
dri-devel
In-Reply-To: <20190725220215.460-10-paul@crapouillou.net>
On Thu, Jul 25, 2019 at 06:02:13PM -0400, Paul Cercueil wrote:
> The JZ4740 boards now use the iio-hwmon driver.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> Tested-by: Artur Rojek <contact@artur-rojek.eu>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> drivers/hwmon/Kconfig | 10 ---
> drivers/hwmon/Makefile | 1 -
> drivers/hwmon/jz4740-hwmon.c | 135 -----------------------------------
> 3 files changed, 146 deletions(-)
> delete mode 100644 drivers/hwmon/jz4740-hwmon.c
>
> diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
> index 650dd71f9724..2199ac1d0ba7 100644
> --- a/drivers/hwmon/Kconfig
> +++ b/drivers/hwmon/Kconfig
> @@ -660,16 +660,6 @@ config SENSORS_IT87
> This driver can also be built as a module. If so, the module
> will be called it87.
>
> -config SENSORS_JZ4740
> - tristate "Ingenic JZ4740 SoC ADC driver"
> - depends on MACH_JZ4740 && MFD_JZ4740_ADC
> - help
> - If you say yes here you get support for reading adc values from the ADCIN
> - pin on Ingenic JZ4740 SoC based boards.
> -
> - This driver can also be built as a module. If so, the module will be
> - called jz4740-hwmon.
> -
> config SENSORS_JC42
> tristate "JEDEC JC42.4 compliant memory module temperature sensors"
> depends on I2C
> diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
> index 8db472ea04f0..1e82e912a5c4 100644
> --- a/drivers/hwmon/Makefile
> +++ b/drivers/hwmon/Makefile
> @@ -85,7 +85,6 @@ obj-$(CONFIG_SENSORS_INA2XX) += ina2xx.o
> obj-$(CONFIG_SENSORS_INA3221) += ina3221.o
> obj-$(CONFIG_SENSORS_IT87) += it87.o
> obj-$(CONFIG_SENSORS_JC42) += jc42.o
> -obj-$(CONFIG_SENSORS_JZ4740) += jz4740-hwmon.o
> obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o
> obj-$(CONFIG_SENSORS_K10TEMP) += k10temp.o
> obj-$(CONFIG_SENSORS_LINEAGE) += lineage-pem.o
> diff --git a/drivers/hwmon/jz4740-hwmon.c b/drivers/hwmon/jz4740-hwmon.c
> deleted file mode 100644
> index bec5befd1d8b..000000000000
> --- a/drivers/hwmon/jz4740-hwmon.c
> +++ /dev/null
> @@ -1,135 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-or-later
> -/*
> - * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
> - * JZ4740 SoC HWMON driver
> - */
> -
> -#include <linux/err.h>
> -#include <linux/interrupt.h>
> -#include <linux/kernel.h>
> -#include <linux/module.h>
> -#include <linux/mutex.h>
> -#include <linux/platform_device.h>
> -#include <linux/slab.h>
> -#include <linux/io.h>
> -
> -#include <linux/completion.h>
> -#include <linux/mfd/core.h>
> -
> -#include <linux/hwmon.h>
> -
> -struct jz4740_hwmon {
> - void __iomem *base;
> - int irq;
> - const struct mfd_cell *cell;
> - struct platform_device *pdev;
> - struct completion read_completion;
> - struct mutex lock;
> -};
> -
> -static irqreturn_t jz4740_hwmon_irq(int irq, void *data)
> -{
> - struct jz4740_hwmon *hwmon = data;
> -
> - complete(&hwmon->read_completion);
> - return IRQ_HANDLED;
> -}
> -
> -static ssize_t in0_input_show(struct device *dev,
> - struct device_attribute *dev_attr, char *buf)
> -{
> - struct jz4740_hwmon *hwmon = dev_get_drvdata(dev);
> - struct platform_device *pdev = hwmon->pdev;
> - struct completion *completion = &hwmon->read_completion;
> - long t;
> - unsigned long val;
> - int ret;
> -
> - mutex_lock(&hwmon->lock);
> -
> - reinit_completion(completion);
> -
> - enable_irq(hwmon->irq);
> - hwmon->cell->enable(pdev);
> -
> - t = wait_for_completion_interruptible_timeout(completion, HZ);
> -
> - if (t > 0) {
> - val = readw(hwmon->base) & 0xfff;
> - val = (val * 3300) >> 12;
> - ret = sprintf(buf, "%lu\n", val);
> - } else {
> - ret = t ? t : -ETIMEDOUT;
> - }
> -
> - hwmon->cell->disable(pdev);
> - disable_irq(hwmon->irq);
> -
> - mutex_unlock(&hwmon->lock);
> -
> - return ret;
> -}
> -
> -static DEVICE_ATTR_RO(in0_input);
> -
> -static struct attribute *jz4740_attrs[] = {
> - &dev_attr_in0_input.attr,
> - NULL
> -};
> -
> -ATTRIBUTE_GROUPS(jz4740);
> -
> -static int jz4740_hwmon_probe(struct platform_device *pdev)
> -{
> - int ret;
> - struct device *dev = &pdev->dev;
> - struct jz4740_hwmon *hwmon;
> - struct device *hwmon_dev;
> -
> - hwmon = devm_kzalloc(dev, sizeof(*hwmon), GFP_KERNEL);
> - if (!hwmon)
> - return -ENOMEM;
> -
> - hwmon->cell = mfd_get_cell(pdev);
> -
> - hwmon->irq = platform_get_irq(pdev, 0);
> - if (hwmon->irq < 0) {
> - dev_err(&pdev->dev, "Failed to get platform irq: %d\n",
> - hwmon->irq);
> - return hwmon->irq;
> - }
> -
> - hwmon->base = devm_platform_ioremap_resource(pdev, 0);
> - if (IS_ERR(hwmon->base))
> - return PTR_ERR(hwmon->base);
> -
> - hwmon->pdev = pdev;
> - init_completion(&hwmon->read_completion);
> - mutex_init(&hwmon->lock);
> -
> - ret = devm_request_irq(dev, hwmon->irq, jz4740_hwmon_irq, 0,
> - pdev->name, hwmon);
> - if (ret) {
> - dev_err(&pdev->dev, "Failed to request irq: %d\n", ret);
> - return ret;
> - }
> - disable_irq(hwmon->irq);
> -
> - hwmon_dev = devm_hwmon_device_register_with_groups(dev, "jz4740", hwmon,
> - jz4740_groups);
> - return PTR_ERR_OR_ZERO(hwmon_dev);
> -}
> -
> -static struct platform_driver jz4740_hwmon_driver = {
> - .probe = jz4740_hwmon_probe,
> - .driver = {
> - .name = "jz4740-hwmon",
> - },
> -};
> -
> -module_platform_driver(jz4740_hwmon_driver);
> -
> -MODULE_DESCRIPTION("JZ4740 SoC HWMON driver");
> -MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
> -MODULE_LICENSE("GPL");
> -MODULE_ALIAS("platform:jz4740-hwmon");
> --
> 2.21.0.593.g511ec345e18
>
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