* [PATCH] of/platform: Add missing const qualifier in of_link_property
From: Nathan Chancellor @ 2019-07-31 18:17 UTC (permalink / raw)
To: saravanak
Cc: collinsd, corbet, devicetree, frowand.list, gregkh, kernel-team,
linux-doc, linux-kernel, mark.rutland, rafael, robh+dt,
Nathan Chancellor, kbuild test robot
In-Reply-To: <20190729221101.228240-4-saravanak@google.com>
Clang errors:
drivers/of/platform.c:632:28: error: initializing 'struct
supplier_bindings *' with an expression of type 'const struct
supplier_bindings [4]' discards qualifiers
[-Werror,-Wincompatible-pointer-types-discards-qualifiers]
struct supplier_bindings *s = bindings;
^ ~~~~~~~~
1 error generated.
Fixes: 05f812549f53 ("of/platform: Add functional dependency link from DT bindings")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
---
Given this is still in the driver-core-testing branch, I am fine with
this being squashed in if desired.
drivers/of/platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index e2da90e53edb..21838226d68a 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -629,7 +629,7 @@ static bool of_link_property(struct device *dev, struct device_node *con_np,
const char *prop)
{
struct device_node *phandle;
- struct supplier_bindings *s = bindings;
+ const struct supplier_bindings *s = bindings;
unsigned int i = 0;
bool done = true, matched = false;
--
2.22.0
^ permalink raw reply related
* Re: [PATCH net-next v2 1/4] dt-bindings: net: Add aspeed,ast2600-mdio binding
From: Rob Herring @ 2019-07-31 18:00 UTC (permalink / raw)
To: Andrew Jeffery
Cc: netdev, David Miller, Mark Rutland, Joel Stanley, Andrew Lunn,
Florian Fainelli, Heiner Kallweit, devicetree,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-aspeed, linux-kernel@vger.kernel.org
In-Reply-To: <20190731053959.16293-2-andrew@aj.id.au>
On Tue, Jul 30, 2019 at 11:39 PM Andrew Jeffery <andrew@aj.id.au> wrote:
>
> The AST2600 splits out the MDIO bus controller from the MAC into its own
> IP block and rearranges the register layout. Add a new binding to
> describe the new hardware.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
>
> ---
> v2:
> * aspeed: Utilise mdio.yaml
> * aspeed: Drop status from example
> ---
> .../bindings/net/aspeed,ast2600-mdio.yaml | 45 +++++++++++++++++++
> 1 file changed, 45 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v2 1/6] dt-bindings: thermal: Add DT bindings documentation for Amlogic Thermal
From: Rob Herring @ 2019-07-31 17:59 UTC (permalink / raw)
To: Guillaume La Roque
Cc: Daniel Lezcano, Kevin Hilman, open list:THERMAL, devicetree,
linux-amlogic, linux-kernel@vger.kernel.org,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190731153529.30159-2-glaroque@baylibre.com>
On Wed, Jul 31, 2019 at 9:36 AM Guillaume La Roque
<glaroque@baylibre.com> wrote:
>
> Adding the devicetree binding documentation for the Amlogic temperature
> sensor found in the Amlogic Meson G12 SoCs.
> the G12A and G12B SoCs are supported.
>
> Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
> ---
> .../bindings/thermal/amlogic,thermal.yaml | 58 +++++++++++++++++++
> 1 file changed, 58 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
>
> diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> new file mode 100644
> index 000000000000..f10537ab4c8b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/thermal/amlogic,thermal.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Amlogic Thermal Driver
This is not a driver.
> +
> +maintainers:
> + - Guillaume La Roque <glaroque@baylibre.com>
> +
> +description: Amlogic Thermal driver
> +
> +properties:
> + compatible:
> + oneOf:
oneOf is not necessary as there is only one of.
> + - items:
> + - enum:
> + - amlogic,g12-cpu-thermal
> + - amlogic,g12-ddr-thermal
> + - const:
> + - amlogic,g12-thermal
Please run 'make dt_binding_check'. You'll find this is not valid json-schema.
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + amlogic,ao-secure:
> + description: phandle to the ao-secure syscon
> + allOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32
> +
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - amlogic,ao-secure
> +
> +examples:
> + - |
> + cpu_temp: temperature-sensor@ff634800 {
> + compatible = "amlogic,g12-cpu-thermal",
> + "amlogic,g12-thermal";
> + reg = <0x0 0xff634800 0x0 0x50>;
Examples are built now and this will have an error. The default
address and size cells are 1 for examples, so you either have to
override them or adjust this.
> + interrupts = <0x0 0x24 0x0>;
> + clocks = <&clk 164>;
> + status = "okay";
Don't show status in examples.
> + #thermal-sensor-cells = <0>;
> + amlogic,ao-secure = <&sec_AO>;
> + };
> +...
> \ No newline at end of file
> --
> 2.17.1
>
^ permalink raw reply
* Re: [PATCH 3/3] drm/bridge: Add NWL MIPI DSI host controller support
From: Fabio Estevam @ 2019-07-31 17:40 UTC (permalink / raw)
To: Jernej Škrabec
Cc: Guido Günther, David Airlie, Daniel Vetter, Rob Herring,
Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
NXP Linux Team, Andrzej Hajda, Neil Armstrong, Laurent Pinchart,
Jonas Karlman, Lee Jones, DRI mailing list,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
In-Reply-To: <13373313.BzCyiC4ED7@jernej-laptop>
On Wed, Jul 31, 2019 at 1:40 PM Jernej Škrabec <jernej.skrabec@siol.net> wrote:
> > Yes, I understood the idea, but this would print:
> >
> > ensabling or dissabling :-)
>
> No, it wouldn't. That extra "s" is part of "%s", e.g. part of format specifier.
Ops, you are right. Sorry about that!
^ permalink raw reply
* Re: [PATCH 5/8] arm64: use ZONE_DMA on DMA addressing limited devices
From: Catalin Marinas @ 2019-07-31 17:07 UTC (permalink / raw)
To: Nicolas Saenz Julienne
Cc: hch, wahrenst, marc.zyngier, Robin Murphy, linux-arm-kernel,
devicetree, iommu, linux-mm, Will Deacon, phill, f.fainelli,
linux-kernel, robh+dt, eric, mbrugger, akpm, frowand.list,
m.szyprowski, linux-rpi-kernel
In-Reply-To: <20190731154752.16557-6-nsaenzjulienne@suse.de>
On Wed, Jul 31, 2019 at 05:47:48PM +0200, Nicolas Saenz Julienne wrote:
> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> index 1c4ffabbe1cb..f5279ef85756 100644
> --- a/arch/arm64/mm/init.c
> +++ b/arch/arm64/mm/init.c
> @@ -50,6 +50,13 @@
> s64 memstart_addr __ro_after_init = -1;
> EXPORT_SYMBOL(memstart_addr);
>
> +/*
> + * We might create both a ZONE_DMA and ZONE_DMA32. ZONE_DMA is needed if there
> + * are periferals unable to address the first naturally aligned 4GB of ram.
> + * ZONE_DMA32 will be expanded to cover the rest of that memory. If such
> + * limitations doesn't exist only ZONE_DMA32 is created.
> + */
Shouldn't we instead only create ZONE_DMA to cover the whole 32-bit
range and leave ZONE_DMA32 empty? Can__GFP_DMA allocations fall back
onto ZONE_DMA32?
--
Catalin
^ permalink raw reply
* Re: [PATCH 1/6] dt-bindings: thermal: Add DT bindings documentation for Amlogic Thermal
From: Rob Herring @ 2019-07-31 17:00 UTC (permalink / raw)
To: Neil Armstrong, Guillaume La Roque
Cc: Daniel Lezcano, Kevin Hilman, devicetree, linux-amlogic,
linux-kernel@vger.kernel.org,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list:THERMAL
In-Reply-To: <f0f0dfe5-0cd3-5275-53ff-cfc4bb44f7e6@baylibre.com>
On Wed, Jul 31, 2019 at 6:44 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> On 31/07/2019 14:14, Guillaume La Roque wrote:
> > Adding the devicetree binding documentation for the Amlogic temperature
> > sensor found in the Amlogic Meson G12 SoCs.
> > the G12A and G12B SoCs are supported.
> >
> > Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
> > ---
> > .../bindings/thermal/amlogic,thermal.yaml | 58 +++++++++++++++++++
> > 1 file changed, 58 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> > new file mode 100644
> > index 000000000000..1e2fe84da13d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml
> > @@ -0,0 +1,58 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/thermal/amlogic,thermal.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Amlogic Thermal Driver
> > +
> > +maintainers:
> > + - Guillaume La Roque <glaroque@baylibre.com>
> > +
> > +description: Amlogic Thermal driver
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - amlogic,g12-cpu-thermal
> > + - amlogic,g12-ddr-thermal
> > + - enum:
> > + - amlogic,g12-thermal
>
> Shouldn't be :
> compatible:
> items:
> - enum:
> - amlogic,g12-cpu-thermal
> - amlogic,g12-ddr-thermal
> - const:
> - amlogic,g12-thermal
>
> instead ?
Yes, except 'const' is a string, not list value.
>
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + amlogic,ao-secure:
> > + description: phandle to the ao-secure syscon
> > + allOf:
> > + - $ref: /schemas/types.yaml#/definitions/uint32
phandle, not uint32
> > +
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - amlogic,ao-secure
> > +
> > +examples:
> > + - |
> > + cpu_temp: temperature-sensor@ff634800 {
> > + compatible = "amlogic,g12-cpu-thermal",
> > + "amlogic,g12-thermal";
> > + reg = <0x0 0xff634800 0x0 0x50>;
> > + interrupts = <0x0 0x24 0x0>;
> > + clocks = <&clk 164>;
> > + status = "okay";
> > + #thermal-sensor-cells = <1>;
> > + amlogic,ao-secure = <&sec_AO>;
> > + };
> > +...
> > \ No newline at end of file
Fix this.
> >
>
^ permalink raw reply
* Re: [PATCH 4/6] dt-bindings: arm: amlogic: add support for the Khadas VIM3
From: Rob Herring @ 2019-07-31 16:55 UTC (permalink / raw)
To: Neil Armstrong
Cc: Kevin Hilman, devicetree, Christian Hewitt, linux-amlogic,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-kernel@vger.kernel.org
In-Reply-To: <20190731124000.22072-5-narmstrong@baylibre.com>
On Wed, Jul 31, 2019 at 6:40 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> From: Christian Hewitt <christianshewitt@gmail.com>
>
> The Khadas VIM3 uses the Amlogic S922X or A311S SoC, both based on the
> Amlogic G12B SoC family, on a board with the same form factor as the
> VIM/VIM2 models. It ships in two variants; basic and
> pro which differ in RAM and eMMC size:
>
> - 2GB (basic) or 4GB (pro) LPDDR4 RAM
> - 16GB (basic) or 32GB (pro) eMMC 5.1 storage
> - 16MB SPI flash
> - 10/100/1000 Base-T Ethernet
> - AP6398S Wireless (802.11 a/b/g/n/ac, BT5.0)
> - HDMI 2.1 video
> - 1x USB 2.0 + 1x USB 3.0 ports
> - 1x USB-C (power) with USB 2.0 OTG
> - 3x LED's (1x red, 1x blue, 1x white)
> - 3x buttons (power, function, reset)
> - IR receiver
> - M2 socket with PCIe, USB, ADC & I2C
> - 40pin GPIO Header
> - 1x micro SD card slot
>
> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> Documentation/devicetree/bindings/arm/amlogic.yaml | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH 3/6] dt-bindings: arm: amlogic: add bindings for the Amlogic G12B based A311D SoC
From: Rob Herring @ 2019-07-31 16:55 UTC (permalink / raw)
To: Neil Armstrong
Cc: Kevin Hilman, devicetree, linux-amlogic,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-kernel@vger.kernel.org, Christian Hewitt
In-Reply-To: <20190731124000.22072-4-narmstrong@baylibre.com>
On Wed, Jul 31, 2019 at 6:40 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> Add a specific compatible for the Amlogic G12B bases A311D SoC used
> in the Khadas VIM3.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> Documentation/devicetree/bindings/arm/amlogic.yaml | 5 +++++
> 1 file changed, 5 insertions(+)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH 2/6] dt-bindings: arm: amlogic: add bindings for G12B based S922X SoC
From: Rob Herring @ 2019-07-31 16:54 UTC (permalink / raw)
To: Neil Armstrong
Cc: Kevin Hilman, devicetree, linux-amlogic,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
linux-kernel@vger.kernel.org, Christian Hewitt
In-Reply-To: <20190731124000.22072-3-narmstrong@baylibre.com>
On Wed, Jul 31, 2019 at 6:40 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> Add a specific compatible for the Amlogic G12B family based S922X SoC
> to differentiate with the A311D SoC from the same family.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> Documentation/devicetree/bindings/arm/amlogic.yaml | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH 3/3] drm/bridge: Add NWL MIPI DSI host controller support
From: Guido Günther @ 2019-07-31 16:54 UTC (permalink / raw)
To: Fabio Estevam
Cc: David Airlie, Daniel Vetter, Rob Herring, Mark Rutland, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, NXP Linux Team,
Andrzej Hajda, Neil Armstrong, Laurent Pinchart, Jonas Karlman,
Jernej Skrabec, Lee Jones, DRI mailing list,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <CAOMZO5Djoi7EuXapkg+dQ6HR2oZZHrw+vnjc837Gxee-Nh00Hw@mail.gmail.com>
Hi,
On Wed, Jul 31, 2019 at 11:43:47AM -0300, Fabio Estevam wrote:
> Hi Guido,
>
> On Wed, Jul 31, 2019 at 11:35 AM Guido Günther <agx@sigxcpu.org> wrote:
>
> > The idea is to have
> >
> > "%sabling platform clocks", enable ? "en" : "dis");
> >
> > depending whether clocks are enabled/disabled.
>
> Yes, I understood the idea, but this would print:
>
> ensabling or dissabling :-)
The 's' is from the '%s' format specifier:
[ 2610.804174] imx-nwl-dsi 30a00000.mipi_dsi: [drm:imx_nwl_dsi_bridge_disable] disabling platform clocks
[ 2710.996279] imx-nwl-dsi 30a00000.mipi_dsi: [drm:imx_nwl_dsi_bridge_pre_enable] enabling platform clocks
I'll change that to use the full strings though since i also had to look
twice to be sure there's no double 's'.
>
> > > Same here. Please return 'int' instead.
> >
> > This is from drm_bridge_funcs so the prototype is fixed. I'm not sure
> > how what's the best way to bubble up fatal errors through the drm layer?
>
> Ok, so let's not change this one.
>
> > I went for DRM_DEV_ERROR() since that what i used in the rest of the
> > driver and these ones were omission. Hope that's o.k.
>
> No strong preferences here. I just think dev_err() easier to type and shorter.
>
> Thanks for this work!
Thanks again for having a look!
-- Guido
^ permalink raw reply
* Re: [PATCH v4 2/2] dt-bindings: iio: potentiometer: add max5432.yaml binding
From: Rob Herring @ 2019-07-31 16:50 UTC (permalink / raw)
To: Martin Kaiser
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
open list:IIO SUBSYSTEM AND DRIVERS, devicetree,
linux-kernel@vger.kernel.org
In-Reply-To: <20190731140706.2765-2-martin@kaiser.cx>
On Wed, Jul 31, 2019 at 8:07 AM Martin Kaiser <martin@kaiser.cx> wrote:
>
> Add a binding for the Maxim Integrated MAX5432-MAX5435 family of digital
> potentiometers.
>
> Signed-off-by: Martin Kaiser <martin@kaiser.cx>
> ---
> changes in v4
> - fix the dt bindings
> - replace ic20 with i2c
> - document the reg property
> - add additionalProperties and required
>
> changes in v3
> - split dt bindings and driver code into separate patches
> - use yaml format for dt bindings
> - fix formatting of parameter lists
>
> changes in v2
> - use MAX5432_ prefix for all defines
> - fix indentation
> - convert void * to unsigned long, not to u32
> (warning from kbuild test robot)
>
> .../bindings/iio/potentiometer/max5432.yaml | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/potentiometer/max5432.yaml
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH 2/2] reset: imx7: Fix IMX8MQ_RESET_MIPI_DSI_ defines
From: Lucas Stach @ 2019-07-31 16:46 UTC (permalink / raw)
To: Guido Günther, Philipp Zabel, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Rob Herring, Mark Rutland, linux-arm-kernel, linux-kernel,
devicetree
In-Reply-To: <bd1504122f6797536a253a37f3604f5c46f02ab2.1564591352.git.agx@sigxcpu.org>
Am Mittwoch, den 31.07.2019, 18:43 +0200 schrieb Guido Günther:
> Some of the mipi dsi resets were called
>
> IMX8MQ_RESET_MIPI_DIS_
>
> instead of
>
> IMX8MQ_RESET_MIPI_DSI_
>
> Since they're DSI related this looks like a typo.
>
> I wasn't sure if this should be a single patch since it otherwise breaks
> bisectability. I couldn't find any device trees using this yet.
Yes, I think this should be squashed into a single commit. Other than
that, the change looks correct.
Regards,
Lucas
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> ---
> drivers/reset/reset-imx7.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
> index 3ecd770f910b..1443a55a0c29 100644
> --- a/drivers/reset/reset-imx7.c
> +++ b/drivers/reset/reset-imx7.c
> @@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
> > > [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
> > > [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
> > > [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
> > > - [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
> > > - [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
> > > - [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
> > > + [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
> > > + [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
> > > + [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
> > > [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
> > BIT(2) | BIT(1) },
> > > [IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
> @@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
>
> > case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
> > > case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
> > > - case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */
> > > - case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
> > > - case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
> > > + case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */
> > > + case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
> > > + case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
> > > case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
> > > case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
> > value = assert ? 0 : bit;
^ permalink raw reply
* [PATCH 2/2] reset: imx7: Fix IMX8MQ_RESET_MIPI_DSI_ defines
From: Guido Günther @ 2019-07-31 16:43 UTC (permalink / raw)
To: Philipp Zabel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Rob Herring, Mark Rutland,
linux-arm-kernel, linux-kernel, devicetree
In-Reply-To: <cover.1564591352.git.agx@sigxcpu.org>
Some of the mipi dsi resets were called
IMX8MQ_RESET_MIPI_DIS_
instead of
IMX8MQ_RESET_MIPI_DSI_
Since they're DSI related this looks like a typo.
I wasn't sure if this should be a single patch since it otherwise breaks
bisectability. I couldn't find any device trees using this yet.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
---
drivers/reset/reset-imx7.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 3ecd770f910b..1443a55a0c29 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
[IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
[IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
- [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
- [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
- [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
+ [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
+ [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
[IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
BIT(2) | BIT(1) },
[IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
@@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
- case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */
- case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
- case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
value = assert ? 0 : bit;
--
2.20.1
^ permalink raw reply related
* [PATCH 1/2] dt-bindings: reset: Fix typo in imx8mq resets
From: Guido Günther @ 2019-07-31 16:43 UTC (permalink / raw)
To: Philipp Zabel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Rob Herring, Mark Rutland,
linux-arm-kernel, linux-kernel, devicetree
In-Reply-To: <cover.1564591352.git.agx@sigxcpu.org>
Some of the mipi dsi resets were called
IMX8MQ_RESET_MIPI_DIS__
instead of
IMX8MQ_RESET_MIPI_DSI__
Since they're DSI related this looks like a typo.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
---
include/dt-bindings/reset/imx8mq-reset.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h
index 57c592498aa0..bfa41b0e24f6 100644
--- a/include/dt-bindings/reset/imx8mq-reset.h
+++ b/include/dt-bindings/reset/imx8mq-reset.h
@@ -31,9 +31,9 @@
#define IMX8MQ_RESET_OTG2_PHY_RESET 20
#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21
#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22
-#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N 23
-#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N 24
-#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N 25
+#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23
+#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24
+#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25
#define IMX8MQ_RESET_PCIEPHY 26
#define IMX8MQ_RESET_PCIEPHY_PERST 27
#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28
--
2.20.1
^ permalink raw reply related
* [PATCH 0/2] imx: Fix typo in iMQ8MQ reset names
From: Guido Günther @ 2019-07-31 16:43 UTC (permalink / raw)
To: Philipp Zabel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Rob Herring, Mark Rutland,
linux-arm-kernel, linux-kernel, devicetree
Some of the mipi dsi resets were called
IMX8MQ_RESET_MIPI_DIS_
instead of
IMX8MQ_RESET_MIPI_DSI_
Since they're DSI related this looks like a typo.
Guido Günther (2):
dt-bindings: reset: Fix typo in imx8mq resets
reset: imx7: Fix IMX8MQ_RESET_MIPI_DSI_ defines
drivers/reset/reset-imx7.c | 12 ++++++------
include/dt-bindings/reset/imx8mq-reset.h | 6 +++---
2 files changed, 9 insertions(+), 9 deletions(-)
--
2.20.1
^ permalink raw reply
* Re: [PATCH] arm64: dts: renesas: r8a77995: draak: Fix backlight regulator name
From: Rob Herring @ 2019-07-31 16:40 UTC (permalink / raw)
To: Mark Brown
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Laurent Pinchart, Geert Uytterhoeven, Magnus Damm, Johan Hovold,
Linux-Renesas, Simon Horman, Geert Uytterhoeven, Laurent Pinchart,
Linux ARM, Marek Vasut
In-Reply-To: <20190731150909.GD4369@sirena.org.uk>
On Wed, Jul 31, 2019 at 9:09 AM Mark Brown <broonie@kernel.org> wrote:
>
> On Wed, Jul 31, 2019 at 08:47:38AM -0600, Rob Herring wrote:
>
> > As long as we have a consistent base name that we can match schema
> > with, then I'm happy. But for regulators, we have a lot of node names
> > like 'buck1', 'LDO2', etc.
>
> Those are all types of regulator (LDOs and DCDCs are the main types of
> voltage regulator, and buck is another term for DCDC).
Yes, I know.
> I'm still not clear what meaningful effect any of this node name stuff
> has :(
It is primarily just what I said. Standard names or patterns allow for
applying schemas. Otherwise, we only have schema checks when we have a
device specific schema. Of course, we do have those too, but generic
ones are useful when we don't. If there are errors in the DT causing
the device specific schema to not match (say a typo in the compatible
string), we still have some checking.
Rob
^ permalink raw reply
* Re: [PATCH 3/3] drm/bridge: Add NWL MIPI DSI host controller support
From: Jernej Škrabec @ 2019-07-31 16:40 UTC (permalink / raw)
To: Fabio Estevam
Cc: Guido Günther, David Airlie, Daniel Vetter, Rob Herring,
Mark Rutland, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
NXP Linux Team, Andrzej Hajda, Neil Armstrong, Laurent Pinchart,
Jonas Karlman, Lee Jones, DRI mailing list,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
In-Reply-To: <CAOMZO5Djoi7EuXapkg+dQ6HR2oZZHrw+vnjc837Gxee-Nh00Hw@mail.gmail.com>
Hi!
Dne sreda, 31. julij 2019 ob 16:43:47 CEST je Fabio Estevam napisal(a):
> Hi Guido,
>
> On Wed, Jul 31, 2019 at 11:35 AM Guido Günther <agx@sigxcpu.org> wrote:
> > The idea is to have
> >
> > "%sabling platform clocks", enable ? "en" : "dis");
> >
> > depending whether clocks are enabled/disabled.
>
> Yes, I understood the idea, but this would print:
>
> ensabling or dissabling :-)
No, it wouldn't. That extra "s" is part of "%s", e.g. part of format specifier.
Best regards,
Jernej
>
> > > Same here. Please return 'int' instead.
> >
> > This is from drm_bridge_funcs so the prototype is fixed. I'm not sure
> > how what's the best way to bubble up fatal errors through the drm layer?
>
> Ok, so let's not change this one.
>
> > I went for DRM_DEV_ERROR() since that what i used in the rest of the
> > driver and these ones were omission. Hope that's o.k.
>
> No strong preferences here. I just think dev_err() easier to type and
> shorter.
>
> Thanks for this work!
^ permalink raw reply
* [PATCH v3 3/3] media: dt-bindings: imx7-csi: add i.MX6UL/L support
From: Sébastien Szymanski @ 2019-07-31 16:33 UTC (permalink / raw)
To: Rui Miguel Silva, Mauro Carvalho Chehab, Rob Herring,
Mark Rutland, Shawn Guo, Sascha Hauer, Steve Longerbeam,
Philipp Zabel
Cc: devel, devicetree, Rob Herring, Greg Kroah-Hartman,
NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
linux-arm-kernel, linux-media
Document "fsl,imx6ul-csi" entry.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
---
Changes for v3:
- none
Changes for v2:
- New patch to document new "fsl,imx6ul-csi" entry.
Documentation/devicetree/bindings/media/imx7-csi.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/imx7-csi.txt b/Documentation/devicetree/bindings/media/imx7-csi.txt
index 443aef07356e..d80ceefa0c00 100644
--- a/Documentation/devicetree/bindings/media/imx7-csi.txt
+++ b/Documentation/devicetree/bindings/media/imx7-csi.txt
@@ -9,7 +9,7 @@ to connect directly to external CMOS image sensors.
Required properties:
-- compatible : "fsl,imx7-csi";
+- compatible : "fsl,imx7-csi" or "fsl,imx6ul-csi";
- reg : base address and length of the register set for the device;
- interrupts : should contain CSI interrupt;
- clocks : list of clock specifiers, see
--
2.21.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v3 2/3] media: imx7-media-csi: add i.MX6UL support
From: Sébastien Szymanski @ 2019-07-31 16:33 UTC (permalink / raw)
To: Rui Miguel Silva, Mauro Carvalho Chehab, Rob Herring,
Mark Rutland, Shawn Guo, Sascha Hauer, Steve Longerbeam,
Philipp Zabel
Cc: devel, devicetree, Greg Kroah-Hartman, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel,
linux-media
i.MX7 and i.MX6UL/L have the same CSI controller. So add i.MX6UL/L support
to imx7-media-csi driver.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
---
Changes for v3:
- rebase on Linux v5.3-rc2
- remove csi_soc_id var as it's not needed anymore thanks to commit
e0c76a7d3428 ("media: imx7-media-csi: get csi upstream endpoint")
Changes for v2:
- rebase on top of linuxtv/master
- mention i.MX6UL/L in header and Kconfig help text
- rename csi_type to csi_soc_id
drivers/staging/media/imx/Kconfig | 4 +--
drivers/staging/media/imx/imx7-media-csi.c | 30 +++++++++++++++-------
2 files changed, 23 insertions(+), 11 deletions(-)
diff --git a/drivers/staging/media/imx/Kconfig b/drivers/staging/media/imx/Kconfig
index 4c726345dc25..f51476243016 100644
--- a/drivers/staging/media/imx/Kconfig
+++ b/drivers/staging/media/imx/Kconfig
@@ -22,11 +22,11 @@ config VIDEO_IMX_CSI
A video4linux camera sensor interface driver for i.MX5/6.
config VIDEO_IMX7_CSI
- tristate "i.MX7 Camera Sensor Interface driver"
+ tristate "i.MX6UL/L / i.MX7 Camera Sensor Interface driver"
depends on VIDEO_IMX_MEDIA && VIDEO_DEV && I2C
default y
help
Enable support for video4linux camera sensor interface driver for
- i.MX7.
+ i.MX6UL/L or i.MX7.
endmenu
endif
diff --git a/drivers/staging/media/imx/imx7-media-csi.c b/drivers/staging/media/imx/imx7-media-csi.c
index 500b4c08d967..4ca79ff4c9b3 100644
--- a/drivers/staging/media/imx/imx7-media-csi.c
+++ b/drivers/staging/media/imx/imx7-media-csi.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * V4L2 Capture CSI Subdev for Freescale i.MX7 SOC
+ * V4L2 Capture CSI Subdev for Freescale i.MX6UL/L / i.MX7 SOC
*
* Copyright (c) 2019 Linaro Ltd
*
@@ -765,6 +765,7 @@ static int imx7_csi_configure(struct imx7_csi *csi)
struct v4l2_pix_format *out_pix = &vdev->fmt.fmt.pix;
__u32 in_code = csi->format_mbus[IMX7_CSI_PAD_SINK].code;
u32 cr1, cr18;
+ int width = out_pix->width;
if (out_pix->field == V4L2_FIELD_INTERLACED) {
imx7_csi_deinterlace_enable(csi, true);
@@ -774,15 +775,27 @@ static int imx7_csi_configure(struct imx7_csi *csi)
imx7_csi_buf_stride_set(csi, 0);
}
- imx7_csi_set_imagpara(csi, out_pix->width, out_pix->height);
+ cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);
+
+ if (!csi->is_csi2) {
+ if (out_pix->pixelformat == V4L2_PIX_FMT_UYVY ||
+ out_pix->pixelformat == V4L2_PIX_FMT_YUYV)
+ width *= 2;
+
+ imx7_csi_set_imagpara(csi, width, out_pix->height);
+
+ cr18 |= (BIT_BASEADDR_SWITCH_EN | BIT_BASEADDR_SWITCH_SEL |
+ BIT_BASEADDR_CHG_ERR_EN);
+ imx7_csi_reg_write(csi, cr18, CSI_CSICR18);
- if (!csi->is_csi2)
return 0;
+ }
+
+ imx7_csi_set_imagpara(csi, width, out_pix->height);
cr1 = imx7_csi_reg_read(csi, CSI_CSICR1);
cr1 &= ~BIT_GCLK_MODE;
- cr18 = imx7_csi_reg_read(csi, CSI_CSICR18);
cr18 &= BIT_MIPI_DATA_FORMAT_MASK;
cr18 |= BIT_DATA_FROM_MIPI;
@@ -817,11 +830,9 @@ static void imx7_csi_enable(struct imx7_csi *csi)
{
imx7_csi_sw_reset(csi);
- if (csi->is_csi2) {
- imx7_csi_dmareq_rff_enable(csi);
- imx7_csi_hw_enable_irq(csi);
- imx7_csi_hw_enable(csi);
- }
+ imx7_csi_dmareq_rff_enable(csi);
+ imx7_csi_hw_enable_irq(csi);
+ imx7_csi_hw_enable(csi);
}
static void imx7_csi_disable(struct imx7_csi *csi)
@@ -1302,6 +1313,7 @@ static int imx7_csi_remove(struct platform_device *pdev)
static const struct of_device_id imx7_csi_of_match[] = {
{ .compatible = "fsl,imx7-csi" },
+ { .compatible = "fsl,imx6ul-csi" },
{ },
};
MODULE_DEVICE_TABLE(of, imx7_csi_of_match);
--
2.21.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v3 1/3] ARM: dts: imx6ul: Add csi node
From: Sébastien Szymanski @ 2019-07-31 16:32 UTC (permalink / raw)
To: Rui Miguel Silva, Mauro Carvalho Chehab, Rob Herring,
Mark Rutland, Shawn Guo, Sascha Hauer, Steve Longerbeam,
Philipp Zabel
Cc: devel, devicetree, Greg Kroah-Hartman, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel,
linux-media
Add csi node for i.MX6UL SoC.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
---
Changes for v3:
- none
Changes for v2:
- only "mclk" clock is required now.
arch/arm/boot/dts/imx6ul.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 81d4b4925127..56cfcf0e5084 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -957,6 +957,15 @@
};
};
+ csi: csi@21c4000 {
+ compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
+ reg = <0x021c4000 0x4000>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CSI>;
+ clock-names = "mclk";
+ status = "disabled";
+ };
+
lcdif: lcdif@21c8000 {
compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
reg = <0x021c8000 0x4000>;
--
2.21.0
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 8/8] mm: comment arm64's usage of 'enum zone_type'
From: Nicolas Saenz Julienne @ 2019-07-31 15:47 UTC (permalink / raw)
To: catalin.marinas, hch, wahrenst, marc.zyngier, Robin Murphy,
linux-arm-kernel, devicetree, iommu, linux-mm, linux-kernel
Cc: phill, f.fainelli, will, robh+dt, eric, mbrugger, nsaenzjulienne,
akpm, frowand.list, m.szyprowski, linux-rpi-kernel
In-Reply-To: <20190731154752.16557-1-nsaenzjulienne@suse.de>
arm64 uses both ZONE_DMA and ZONE_DMA32 for the same reasons x86_64
does: peripherals with different DMA addressing limitations. This
updates both ZONE_DMAs comments to inform about the usage.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
include/linux/mmzone.h | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index d77d717c620c..8fa6bcf72e7c 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -365,23 +365,24 @@ enum zone_type {
*
* Some examples
*
- * Architecture Limit
- * ---------------------------
- * parisc, ia64, sparc <4G
- * s390, powerpc <2G
- * arm Various
- * alpha Unlimited or 0-16MB.
+ * Architecture Limit
+ * ----------------------------------
+ * parisc, ia64, sparc, arm64 <4G
+ * s390, powerpc <2G
+ * arm Various
+ * alpha Unlimited or 0-16MB.
*
* i386, x86_64 and multiple other arches
- * <16M.
+ * <16M.
*/
ZONE_DMA,
#endif
#ifdef CONFIG_ZONE_DMA32
/*
- * x86_64 needs two ZONE_DMAs because it supports devices that are
- * only able to do DMA to the lower 16M but also 32 bit devices that
- * can only do DMA areas below 4G.
+ * x86_64 and arm64 need two ZONE_DMAs because they support devices
+ * that are only able to DMA a fraction of the 32 bit addressable
+ * memory area, but also devices that are limited to that whole 32 bit
+ * area.
*/
ZONE_DMA32,
#endif
--
2.22.0
^ permalink raw reply related
* [PATCH 7/8] arm64: update arch_zone_dma_bits to fine tune dma-direct min mask
From: Nicolas Saenz Julienne @ 2019-07-31 15:47 UTC (permalink / raw)
To: catalin.marinas, hch, wahrenst, marc.zyngier, Robin Murphy,
linux-arm-kernel, devicetree, iommu, linux-mm, linux-kernel
Cc: phill, f.fainelli, will, robh+dt, eric, mbrugger, nsaenzjulienne,
akpm, frowand.list, m.szyprowski, linux-rpi-kernel
In-Reply-To: <20190731154752.16557-1-nsaenzjulienne@suse.de>
With the introduction of ZONE_DMA in arm64 devices are not forced to
support 32 bit DMA masks. We have to inform dma-direct of this
limitation whenever it happens.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
arch/arm64/mm/init.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index f5279ef85756..b809f3259340 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -22,6 +22,7 @@
#include <linux/of_fdt.h>
#include <linux/dma-mapping.h>
#include <linux/dma-contiguous.h>
+#include <linux/dma-direct.h>
#include <linux/efi.h>
#include <linux/swiotlb.h>
#include <linux/vmalloc.h>
@@ -439,10 +440,14 @@ void __init arm64_memblock_init(void)
early_init_fdt_scan_reserved_mem();
- if (IS_ENABLED(CONFIG_ZONE_DMA))
+ if (IS_ENABLED(CONFIG_ZONE_DMA)) {
arm64_dma_phys_limit = max_zone_dma_phys();
- else
+
+ if (arm64_dma_phys_limit)
+ arch_zone_dma_bits = ilog2(arm64_dma_phys_limit) + 1;
+ } else {
arm64_dma_phys_limit = 0;
+ }
/* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA32))
--
2.22.0
^ permalink raw reply related
* [PATCH 6/8] dma-direct: turn ARCH_ZONE_DMA_BITS into a variable
From: Nicolas Saenz Julienne @ 2019-07-31 15:47 UTC (permalink / raw)
To: catalin.marinas, hch, wahrenst, marc.zyngier, Robin Murphy,
linux-arm-kernel, devicetree, iommu, linux-mm, Marek Szyprowski
Cc: phill, f.fainelli, will, linux-kernel, robh+dt, eric, mbrugger,
nsaenzjulienne, akpm, frowand.list, linux-rpi-kernel,
Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
Heiko Carstens, Vasily Gorbik, Christian Borntraeger,
linuxppc-dev, linux-s390
In-Reply-To: <20190731154752.16557-1-nsaenzjulienne@suse.de>
Some architectures, notably arm64, are interested in tweaking this
depending on their runtime dma addressing limitations.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
arch/powerpc/include/asm/page.h | 9 ---------
arch/powerpc/mm/mem.c | 14 ++++++++++++--
arch/s390/include/asm/page.h | 2 --
arch/s390/mm/init.c | 1 +
include/linux/dma-direct.h | 2 ++
kernel/dma/direct.c | 8 +++-----
6 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 0d52f57fca04..73668a21ae78 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -319,13 +319,4 @@ struct vm_area_struct;
#endif /* __ASSEMBLY__ */
#include <asm/slice.h>
-/*
- * Allow 30-bit DMA for very limited Broadcom wifi chips on many powerbooks.
- */
-#ifdef CONFIG_PPC32
-#define ARCH_ZONE_DMA_BITS 30
-#else
-#define ARCH_ZONE_DMA_BITS 31
-#endif
-
#endif /* _ASM_POWERPC_PAGE_H */
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 9191a66b3bc5..3792a998ca02 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -31,6 +31,7 @@
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/memremap.h>
+#include <linux/dma-direct.h>
#include <asm/pgalloc.h>
#include <asm/prom.h>
@@ -201,7 +202,7 @@ static int __init mark_nonram_nosave(void)
* everything else. GFP_DMA32 page allocations automatically fall back to
* ZONE_DMA.
*
- * By using 31-bit unconditionally, we can exploit ARCH_ZONE_DMA_BITS to
+ * By using 31-bit unconditionally, we can exploit arch_zone_dma_bits to
* inform the generic DMA mapping code. 32-bit only devices (if not handled
* by an IOMMU anyway) will take a first dip into ZONE_NORMAL and get
* otherwise served by ZONE_DMA.
@@ -237,9 +238,18 @@ void __init paging_init(void)
printk(KERN_DEBUG "Memory hole size: %ldMB\n",
(long int)((top_of_ram - total_ram) >> 20));
+ /*
+ * Allow 30-bit DMA for very limited Broadcom wifi chips on many
+ * powerbooks.
+ */
+ if (IS_ENABLED(CONFIG_PPC32))
+ arch_zone_dma_bits = 30;
+ else
+ arch_zone_dma_bits = 31;
+
#ifdef CONFIG_ZONE_DMA
max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
- 1UL << (ARCH_ZONE_DMA_BITS - PAGE_SHIFT));
+ 1UL << (arch_zone_dma_bits - PAGE_SHIFT));
#endif
max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
#ifdef CONFIG_HIGHMEM
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 823578c6b9e2..a4d38092530a 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -177,8 +177,6 @@ static inline int devmem_is_allowed(unsigned long pfn)
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define ARCH_ZONE_DMA_BITS 31
-
#include <asm-generic/memory_model.h>
#include <asm-generic/getorder.h>
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index 20340a03ad90..07d93955d3e4 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -118,6 +118,7 @@ void __init paging_init(void)
sparse_memory_present_with_active_regions(MAX_NUMNODES);
sparse_init();
+ arch_zone_dma_bits = 31;
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS);
max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
diff --git a/include/linux/dma-direct.h b/include/linux/dma-direct.h
index adf993a3bd58..a1b353b77858 100644
--- a/include/linux/dma-direct.h
+++ b/include/linux/dma-direct.h
@@ -5,6 +5,8 @@
#include <linux/dma-mapping.h>
#include <linux/mem_encrypt.h>
+extern unsigned int arch_zone_dma_bits;
+
#ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA
#include <asm/dma-direct.h>
#else
diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c
index 59bdceea3737..40dfc9b4ee4c 100644
--- a/kernel/dma/direct.c
+++ b/kernel/dma/direct.c
@@ -19,9 +19,7 @@
* Most architectures use ZONE_DMA for the first 16 Megabytes, but
* some use it for entirely different regions:
*/
-#ifndef ARCH_ZONE_DMA_BITS
-#define ARCH_ZONE_DMA_BITS 24
-#endif
+unsigned int arch_zone_dma_bits __ro_after_init = 24;
static void report_addr(struct device *dev, dma_addr_t dma_addr, size_t size)
{
@@ -72,7 +70,7 @@ static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
* Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
* zones.
*/
- if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS))
+ if (*phys_mask <= DMA_BIT_MASK(arch_zone_dma_bits))
return GFP_DMA;
if (*phys_mask <= DMA_BIT_MASK(32))
return GFP_DMA32;
@@ -387,7 +385,7 @@ int dma_direct_supported(struct device *dev, u64 mask)
u64 min_mask;
if (IS_ENABLED(CONFIG_ZONE_DMA))
- min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS);
+ min_mask = DMA_BIT_MASK(arch_zone_dma_bits);
else
min_mask = DMA_BIT_MASK(32);
--
2.22.0
^ permalink raw reply related
* [PATCH 5/8] arm64: use ZONE_DMA on DMA addressing limited devices
From: Nicolas Saenz Julienne @ 2019-07-31 15:47 UTC (permalink / raw)
To: catalin.marinas, hch, wahrenst, marc.zyngier, Robin Murphy,
linux-arm-kernel, devicetree, iommu, linux-mm, Will Deacon
Cc: phill, f.fainelli, linux-kernel, robh+dt, eric, mbrugger,
nsaenzjulienne, akpm, frowand.list, m.szyprowski,
linux-rpi-kernel
In-Reply-To: <20190731154752.16557-1-nsaenzjulienne@suse.de>
So far all arm64 devices have supported 32 bit DMA masks for their
peripherals. This is not true anymore for the Raspberry Pi 4. Most of
it's peripherals can only address the first GB or memory of a total of
up to 4 GB.
This goes against ZONE_DMA32's original intent, and breaks other
subsystems as it's expected for ZONE_DMA32 to be addressable with a 32
bit mask. So it was decided to use ZONE_DMA for this specific case.
Devices with with 32 bit DMA addressing support will still bypass
ZONE_DMA but those who don't will create both zones. ZONE_DMA will
contain the memory addressable by all the SoC's devices and ZONE_DMA32
the rest of the 32 bit addressable memory.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
arch/arm64/Kconfig | 4 ++++
arch/arm64/mm/init.c | 38 ++++++++++++++++++++++++++++++++------
2 files changed, 36 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 3adcec05b1f6..a9fd71d3bc8e 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -266,6 +266,10 @@ config GENERIC_CSUM
config GENERIC_CALIBRATE_DELAY
def_bool y
+config ZONE_DMA
+ bool "Support DMA zone" if EXPERT
+ default y
+
config ZONE_DMA32
bool "Support DMA32 zone" if EXPERT
default y
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 1c4ffabbe1cb..f5279ef85756 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -50,6 +50,13 @@
s64 memstart_addr __ro_after_init = -1;
EXPORT_SYMBOL(memstart_addr);
+/*
+ * We might create both a ZONE_DMA and ZONE_DMA32. ZONE_DMA is needed if there
+ * are periferals unable to address the first naturally aligned 4GB of ram.
+ * ZONE_DMA32 will be expanded to cover the rest of that memory. If such
+ * limitations doesn't exist only ZONE_DMA32 is created.
+ */
+phys_addr_t arm64_dma_phys_limit __ro_after_init;
phys_addr_t arm64_dma32_phys_limit __ro_after_init;
#ifdef CONFIG_KEXEC_CORE
@@ -193,6 +200,9 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
{
unsigned long max_zone_pfns[MAX_NR_ZONES] = {0};
+#ifdef CONFIG_ZONE_DMA
+ max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit);
+#endif
#ifdef CONFIG_ZONE_DMA32
max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit);
#endif
@@ -207,14 +217,19 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
{
struct memblock_region *reg;
unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
+ unsigned long max_dma = PFN_DOWN(arm64_dma_phys_limit);
unsigned long max_dma32 = min;
memset(zone_size, 0, sizeof(zone_size));
+#ifdef CONFIG_ZONE_DMA
+ if (max_dma)
+ zone_size[ZONE_DMA] = max_dma - min;
+#endif
/* 4GB maximum for 32-bit only capable devices */
#ifdef CONFIG_ZONE_DMA32
max_dma32 = PFN_DOWN(arm64_dma32_phys_limit);
- zone_size[ZONE_DMA32] = max_dma32 - min;
+ zone_size[ZONE_DMA32] = max_dma32 - max_dma - min;
#endif
zone_size[ZONE_NORMAL] = max - max_dma32;
@@ -226,11 +241,17 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
if (start >= max)
continue;
-
+#ifdef CONFIG_ZONE_DMA
+ if (start < max_dma) {
+ unsigned long dma_end = min_not_zero(end, max_dma);
+ zhole_size[ZONE_DMA] -= dma_end - start;
+ }
+#endif
#ifdef CONFIG_ZONE_DMA32
if (start < max_dma32) {
- unsigned long dma_end = min(end, max_dma32);
- zhole_size[ZONE_DMA32] -= dma_end - start;
+ unsigned long dma32_end = min(end, max_dma32);
+ unsigned long dma32_start = max(start, max_dma);
+ zhole_size[ZONE_DMA32] -= dma32_end - dma32_start;
}
#endif
if (end > max_dma32) {
@@ -418,6 +439,11 @@ void __init arm64_memblock_init(void)
early_init_fdt_scan_reserved_mem();
+ if (IS_ENABLED(CONFIG_ZONE_DMA))
+ arm64_dma_phys_limit = max_zone_dma_phys();
+ else
+ arm64_dma_phys_limit = 0;
+
/* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA32))
arm64_dma32_phys_limit = max_zone_dma32_phys();
@@ -430,7 +456,7 @@ void __init arm64_memblock_init(void)
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
- dma_contiguous_reserve(arm64_dma32_phys_limit);
+ dma_contiguous_reserve(arm64_dma_phys_limit ? : arm64_dma32_phys_limit);
}
void __init bootmem_init(void)
@@ -533,7 +559,7 @@ static void __init free_unused_memmap(void)
*/
void __init mem_init(void)
{
- if (swiotlb_force == SWIOTLB_FORCE ||
+ if (swiotlb_force == SWIOTLB_FORCE || arm64_dma_phys_limit ||
max_pfn > (arm64_dma32_phys_limit >> PAGE_SHIFT))
swiotlb_init(1);
else
--
2.22.0
^ permalink raw reply related
* [PATCH 4/8] arm64: re-introduce max_zone_dma_phys()
From: Nicolas Saenz Julienne @ 2019-07-31 15:47 UTC (permalink / raw)
To: catalin.marinas, hch, wahrenst, marc.zyngier, Robin Murphy,
linux-arm-kernel, devicetree, iommu, linux-mm, linux-kernel
Cc: phill, f.fainelli, will, robh+dt, eric, mbrugger, nsaenzjulienne,
akpm, frowand.list, m.szyprowski, linux-rpi-kernel
In-Reply-To: <20190731154752.16557-1-nsaenzjulienne@suse.de>
Some devices might have multiple interconnects with different DMA
addressing limitations. This function provides the higher physical
address accessible by all peripherals on the SoC. If such limitation
doesn't exist it'll return 0.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
arch/arm64/mm/init.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 8956c22634dd..1c4ffabbe1cb 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -174,6 +174,19 @@ static phys_addr_t __init max_zone_dma32_phys(void)
return min(offset + (1ULL << 32), memblock_end_of_DRAM());
}
+static phys_addr_t __init max_zone_dma_phys(void)
+
+{
+ u64 memory_size = memblock_end_of_DRAM() - memblock_start_of_DRAM();
+ u64 zone_dma_size;
+
+ of_scan_flat_dt(early_init_dt_dma_zone_size, &zone_dma_size);
+ if (zone_dma_size && zone_dma_size < min(memory_size, SZ_4G))
+ return memblock_start_of_DRAM() + zone_dma_size;
+
+ return 0;
+}
+
#ifdef CONFIG_NUMA
static void __init zone_sizes_init(unsigned long min, unsigned long max)
--
2.22.0
^ permalink raw reply related
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